US Patent No. 9,661,761

CARRIER SUBSTRATE AND MANUFACTURING METHOD THEREOF


Patent No. 9,661,761
Issue Date May 23, 2017
Title Carrier Substrate And Manufacturing Method Thereof
Inventorship Chun-Ting Lin, Hsinchu County (TW)
Assignee Unimicron Technology Corp., Taoyuan (TW)

Claim of US Patent No. 9,661,761

1. A carrier substrate, comprising:
an insulation layer having a first surface and a second surface relative to each other and a plurality of first openings extending
from the first surface to the second surface, wherein an aperture of each of the first openings gradually increases from the
first surface of the insulation layer towards the second surface;

a plurality of conductive towers disposed on the first surface of the insulation layer, each of the conductive towers having
a top surface and a bottom surface relative to each other, and a diameter of each of the conductive towers gradually increasing
from the top surface towards the bottom surface, wherein the conductive towers comprise a plurality of first conductive towers
and a plurality of second conductive towers surrounding the first conductive towers, and a diameter of the second conductive
towers is greater than a diameter of the first conductive towers, wherein all portions of a side surface of each of the conductive
towers are completely exposed; and

a circuit structure layer disposed on the second surface of the insulation layer and comprising at least one dielectric layer,
at least two circuit layers and a plurality of conductive vias, wherein the dielectric layer and the circuit layers are alternately
stacked, one of the circuit layers is disposed on the second surface of the insulation layer, the conductive vias comprise
a plurality of first conductive vias extending from the circuit layers, disposed in the first openings and extending to the
conductive towers, the conductive vias further comprise a plurality of second conductive vias passing through the dielectric
layer and electrically connecting the circuit layers, a diameter of the first conductive vias gradually increases from the
first surface of the insulation ayer towards the second surface, each of the second conductive towers correspondingly connects
to at least two of the first conductive vias, and each of the first conductive towers correspondingly connects to one of the
first conductive vias, wherein an interface exists between the first conductive vias and the first conductive towers as well
as the second conductive towers, and cross-sectional profiles of the first conductive towers and the second conductive towers
are concave shaped, and cross-sectional profiles of the first conductive vias are flat shaped.