US Patent No. 9,337,124

METHOD OF INTEGRATION OF WAFER LEVEL HEAT SPREADERS AND BACKSIDE INTERCONNECTS ON MICROELECTRONICS WAFERS


Patent No. 9,337,124
Issue Date May 10, 2016
Title Method Of Integration Of Wafer Level Heat Spreaders And Backside Interconnects On Microelectronics Wafers
Inventorship Florian G. Herrault, Agoura Hills, CA (US)
Alexandros Margomenos, Pasadena, CA (US)
Miroslav Micovic, Los Angeles, CA (US)
Melanie S. Yajima, Los Angeles, CA (US)
Eric M. Prophet, Santa Barbara, CA (US)
Assignee HRL Laboratories, LLC, Malibu, CA (US)

Claim of US Patent No. 9,337,124

1. A method for forming a wafer level heat spreader comprising:
providing a mesh wafer, the mesh wafer having a plurality of openings and mesh regions between the openings;
bonding the mesh wafer to a backside of an integrated circuit (IC) wafer, the IC wafer comprising a plurality of circuits;
and

electroplating a heat sink material through the plurality of openings and onto to the backside of the IC wafer;
wherein each mesh region of the mesh wafer consists of a same material.