US Patent No. 9,230,895

PACKAGE SUBSTRATE AND FABRICATION METHOD THEREOF


Patent No. 9,230,895
Issue Date January 05, 2016 
Title Package Substrate And Fabrication Method Thereof
Inventorship Pao-Hung Chou, Taoyuan (TW)
Hsien-Min Chang, Taoyuan (TW)
Assignee Unimicron Technology Corporation, Taoyuan (TW)

Claim of US Patent No. 9,230,895

1. A fabrication method of a plurality of single-wiring-layer package substrates, comprising the steps of:
providing a carrier board having two opposite surfaces each having a first metal layer and a second metal layer sequentially
formed thereon;

forming a separate wiring layer on each of the second metal layers by electroplating, wherein each of the formed wiring layers
comprises solder pads, conductive pads, and circuit wires electrically connecting the solder pads and the conductive pads;

forming dielectric layers on the second metal layers and the wiring layers;
removing portions of the dielectric layers on the wiring layers so as to expose one surface of each of the wiring layers;
removing the carrier board and the first metal layers;
removing the second metal layers so as to expose the other surfaces of the wiring layers;
after the carrier board, the first metal layers, and the second metal layers are removed, forming on one surface of each of
the dielectric layers a first insulating protection layer to cover the dielectric layer and the corresponding wiring layer
to form the plurality of single-wiring-layer package substrates, and forming a plurality of first openings in the first insulating
protection layer for exposing the conductive pads, respectively; and

forming on the other surface of each of the dielectric layers a second insulating protection layer to cover the dielectric
layer and the corresponding wiring layer, and forming a plurality of second openings in the second insulating protection layer
for exposing the solder pads, respectively.