US Patent No. 9,083,906

A/D CONVERTER AND SOLID-STATE IMAGING APPARATUS WITH OFFSET VOLTAGE CORRECTION


Patent No. 9,083,906
Issue Date July 14, 2015
Title A/d Converter And Solid-state Imaging Apparatus With Offset Voltage Correction
Inventorship Kohichi Nakamura, Kawasaki (JP)
Hiroki Hiyama, Sagamihara (JP)
Tetsuya Itano, Sagamihara (JP)
Kazuhiro Saito, Tokyo (JP)
Assignee Canon Kabushiki Kaisha, Tokyo (JP)

Claim of US Patent No. 9,083,906

1. An A/D converter comprising:
an input terminal for inputting an analog signal;
a reference signal line for connecting to a signal source that generates a reference signal which changes temporally;
a comparator which includes a non-inverting input terminal, an inverting input terminal, and an output terminal, and outputs,
from the output terminal, an output signal according to a comparison result between a voltage supplied to the non-inverting
input terminal and a voltage supplied to the inverting input terminal;

a correction capacitor connected to the inverting input terminal of said comparator; and
an output circuit which outputs digital data corresponding to the analog signal input to said input terminal,
wherein in a first state in which a total charge of a first analog signal and an offset voltage of said comparator is held
in said correction capacitor, a second analog signal input to said input terminal is supplied to the non-inverting input terminal
of said comparator, and the second analog signal supplied to the non-inverting input terminal of said comparator or the total
voltage held in said correction capacitor is changed using the reference signal, thereby outputting, from said output circuit,
digital data depending on a time from the beginning of the change until the output signal of said comparator changes as digital
data corresponding to the second analog signal.