US Patent No. 10,973,122

DIFFERENTIAL VIA STACK


Patent No. 10,973,122
Issue Date April 06, 2021
Title Differential Via Stack
Inventorship Melvin K. Benedict, Houston, TX (US)
Assignee Hewlett Packard Enterprise Development LP, Houston, TX (US)

Claim of US Patent No. 10,973,122

1. A printed circuit board comprising:a top conducting layer including two connecting pads for receiving a pair of differential signals;
an escaping layer including escaping lines for transmitting the differential signals at the escaping layer;
one or more first reference layers interposed between the top conducting layer and the escaping layer;
a second reference layer disposed under the escaping layer;
a pair of vias extending vertically to penetrate the top conducting layer, the one or more first reference layers, the escaping layer, and the second reference layer;
a third reference layer disposed under the second reference layer; and
back-drilled holes, wherein:
the vias connects the top conducting layer with the escaping layer;
each of the one or more first reference layers includes a continuous via void surrounding the pair of vias, wherein the continuous via void is filled with a first dielectric material;
the second reference layer includes two round via voids each surrounding one of the vias;
a portion of an outer periphery of the continuous via void is aligned with a portion of an outer periphery of the round via voids of the second reference layer;
the third reference layer includes two round via voids each surrounding one of the vias;
the round via voids of the second reference layer and the third reference layer are filled with a second dielectric material;
the back-drilled holes penetrate the two round via voids of the third reference layer and stop at or about the two round via voids of the second reference layer without penetrating the two round via voids of the second reference layer; and
the second reference layer includes a conductive film disposed between the two round via voids of the second reference layer.