US Patent No. 10,893,595

DIGITAL LOAD CONTROL SYSTEM PROVIDING POWER AND COMMUNICATION VIA EXISTING POWER WIRING


Patent No. 10,893,595
Issue Date January 12, 2021
Title Digital Load Control System Providing Power And Communication Via Existing Power Wiring
Inventorship Mark S. Taipale, Harleysville, PA (US)
Timothy P. Gredler, Center Valley, PA (US)
Akshay Bhat, Allentown, PA (US)
Assignee Lutron Technology Company LLC, Coopersburg, PA (US)

Claim of US Patent No. 10,893,595

1. A controller for use in a load control system for controlling power delivered from an AC power source to an electrical load, the controller comprising:a controllably conductive device adapted to be coupled in series electrical connection on a power wiring between the AC power source and a power device of the load control system;
a control circuit coupled to the controllably conductive device for rendering the controllably conductive device conductive during each half-cycle of the AC power source to generate a phase-control signal, the control circuit configured to transmit a forward digital message to the power device by encoding digital information in timing edges of the phase-control signal, and to generate a reference edge at a reference edge time during a first half-cycle of a reverse digital message, the reference edge time being after a zero-crossing of the first half-cycle; and
a reverse receiving circuit coupled in parallel electrical connection with the controllably conductive device for receiving a controller-drop voltage developed across the controllably conductive device, the reverse receiving circuit configured to receive a reverse digital message from the power device via the power wiring, the reverse digital message transmitted by the power device in response to the forward digital message;
wherein the control circuit is configured to:
receive, via the reverse receiving circuit, an acknowledgement (ACK) pulse in a window time period during a second half-cycle of the reverse digital message, wherein a start time of the window time period during the second half-cycle of the reverse digital message is based on the reference edge time during the first half-cycle; and
receive, via the reverse receiving circuit, a data pulse in a window time period during a third half-cycle of the reverse digital message, wherein a start time of the window time period during the third half-cycle of the reverse digital message is based on the reference edge time during the first half-cycle.