US Patent No. 10,716,214

HYBRID MICROELECTRONIC SUBSTRATE AND METHODS FOR FABRICATING THE SAME


Patent No. 10,716,214
Issue Date July 14, 2020
Title Hybrid Microelectronic Substrate And Methods For Fabricating The Same
Inventorship Robert Starkston, Phoenix, AZ (US)
Richard C. Stamey, Portland, OR (US)
Robert L. Sankman, Phoenix, AZ (US)
Scott M. Mokler, Hillsboro, OR (US)
Assignee Intel Corporation, Santa Clara, CA (US)

Claim of US Patent No. 10,716,214

1. A hybrid microelectronic substrate, comprising:a lower density microelectronic substrate comprising a plurality of dielectric layers, having a first surface and an opposing second surface, and having a recess defined by at least one side and a bottom surface, wherein the recess extends into the lower density microelectronic substrate from the first surface of the lower density microelectronic substrate;
a high density microelectronic patch substrate having a first surface, an opposing second surface, and at least one side, wherein the high density microelectronic patch substrate resides within the lower density microelectronic substrate recess and is attached therein with an adhesive material disposed between the high density microelectronic patch substrate second surface and the bottom surface of the recess of the lower density microelectronic substrate; and
at least one conductive blind via comprising a single via extending from the second surface of the lower density microelectronic substrate entirely through at least two dielectric layers of the plurality of dielectric layers of the lower density microelectronic substrate to the bottom surface of the recess of the lower density microelectronic substrate and a conformal layer of conductive material in the via, wherein the at least one conductive blind via electrically contacts at least one conductive route of a plurality of conductive routes within the lower density microelectronic substrate, contacts at least two dielectric layers of the plurality of dielectric layers of the lower density microelectronic substrate, and contacts at least one conductive route of a plurality conductive routes within the high density microelectronic patch substrate.