US Patent No. 10,599,574


Patent No. 10,599,574
Issue Date March 24, 2020
Title Memory Control Device And Operating Method Thereof
Inventorship Hong Chan Roh, Seoul (KR)
Sang Hyun Park, Seoul (KR)
Jong Chan Lee, Seoul (KR)
Hong Kyu Park, Seoul (KR)
Jae Hyung Kim, Incheon (KR)
Assignee SK TELECOM CO., LTD., Seoul (KR)

Claim of US Patent No. 10,599,574

1. A memory control device comprising a processor, wherein said processor comprises:an activation control unit configured to activate a distribution function according to a state of a cache memory when a read request for cache hit data is identified;
a distribution target identification unit configured to determine whether a process generating the read request corresponds to a target process to be distributed when the distribution function is activated; and
a read request distribution unit configured to distribute the read request to a hard disk to allow the hard disk to process the read request instead of the cache memory when the process is identified to be the target process.