US Patent No. 10,560,892

ADVANCED GRAPHICS POWER STATE MANAGEMENT


Patent No. 10,560,892
Issue Date February 11, 2020
Title Advanced Graphics Power State Management
Inventorship Eric C. Samson, Folsom, CA (US)
Murali Ramadoss, Folsom, CA (US)
Marc Beuchat, Yakum (IL)
Assignee Intel Corporation, Santa Clara, CA (US)

Claim of US Patent No. 10,560,892

1. An apparatus comprising:measurement logic, at least a portion of which is in hardware, to detect information about idle transitions and active transitions of one or more of a plurality of power-wells of a processor; and
determination logic to determine performance loss or energy gain based at least in part on the detected information and power-on latency from one or more of the plurality of power-wells of the processor, wherein the measurement logic is to detect information about the idle transitions and the active transitions of each of the plurality of power-wells of the processor, wherein power management logic is to cause each of the plurality of power-wells to pre-wake in response to a global power-on request.