1. A molded chip combination, comprising:a first semiconductor chip having a first PHY region;
a second semiconductor chip having a second PHY region;
an interconnect chip interconnecting the first PHY region to the second PHY region;
a first molding layer laterally joining together the first semiconductor chip and the second semiconductor chip;
a second molding layer at least partially encapsulating the interconnect chip; and
a polymer layer positioned between the first molding layer and the second molding layer.