US Patent No. 10,510,721


Patent No. 10,510,721
Issue Date December 17, 2019
Title Molded Chip Combination
Inventorship Milind S. Bhagavat, Los Altos, CA (US)
Lei Fu, Austin, TX (US)
Ivor Barber, Los Altos, CA (US)
Chia-Ken Leong, San Jose, CA (US)
Rahul Agarwal, San Jose, CA (US)
Assignee Advanced Micro Devices, Inc., Santa Clara, CA (US)

Claim of US Patent No. 10,510,721

1. A molded chip combination, comprising:a first semiconductor chip having a first PHY region;
a second semiconductor chip having a second PHY region;
an interconnect chip interconnecting the first PHY region to the second PHY region;
a first molding layer laterally joining together the first semiconductor chip and the second semiconductor chip;
a second molding layer at least partially encapsulating the interconnect chip; and
a polymer layer positioned between the first molding layer and the second molding layer.