1. A method for manufacturing a semiconductor device, the method comprising:forming a memory cell protruding from a substrate;
forming a dielectric layer covering the memory cell;
forming a dummy layer covering the dielectric layer; and
performing a chemical mechanical polishing/planarization (CMP) process to completely remove the dummy layer,
wherein a material of the dummy layer has a slower removal rate to the CMP process than a material of the dielectric layer,
the memory cell includes a bottom electrode, a memory film, and a top electrode stacking on each other in a thickness direction of the substrate, and
the memory film is made of a magnetic tunnel junction (MTJ) film.