US Patent No. 10,460,646

DISPLAY SYSTEM, DISPLAY DEVICE, ELECTRONIC APPARATUS, AND IMAGE SIGNAL TRANSMISSION METHOD FOR DISPLAYING AN ORIGINAL IMAGE BASED ON COMBINING DIVIDED IMAGE SIGNALS


Patent No. 10,460,646
Issue Date October 29, 2019
Title Display System, Display Device, Electronic Apparatus, And Image Signal Transmission Method For Displaying An Original Image Based On Combining Divided Image Signals
Inventorship Yutaka Arai, Tokyo (JP)
Assignee NEC DISPLAY SOLUTIONS, LTD., Tokyo (JP)

Claim of US Patent No. 10,460,646

16. An image signal transmission method that is carried out in a display system that includes a display device and an electronic apparatus that is electrically connected by a connector to said display device, said method comprising:said electronic apparatus receiving or generating an original image signal that indicates an original image that is to be displayed and supplying a plurality of divided image signals that each indicate a respective image of a plurality of partial images obtained by dividing said original image; and
said display device displaying said original image on a basis of a combined image signal realized by combining said plurality of divided image signals that are supplied from said electronic apparatus,
wherein said electronic apparatus supplies a first divided image signal that indicates a first partial image of two partial images obtained by dividing said original image either vertically or horizontally, and a second divided image signal that indicates a second partial image of the two partial images,
wherein said display device combines said first and second divided image signals to supply a combined image signal that indicates said original image,
wherein said display device comprises:
a first memory into which is written first data that indicates said first partial image that is indicated by said first divided image signal;
a second memory into which is written second data that indicates said second partial image that is indicated by said second divided image signal;
a first memory input circuit that reads said first data from said first memory;
a second memory input circuit that reads said second data from said second memory, wherein said first and second memory input circuits use a same clock signal to perform reading of said first and second data from said first and second memories;
a first signal receiver circuit that receives said first divided image signal from said electronic apparatus and supplies as output each of said first data, a first clock signal, and a first Data Enable signal;
a second signal receiver circuit that receives said second divided image signal from said electronic apparatus and supplies as output each of said second data, a second clock signal of a same frequency as said first clock signal, and a second Data Enable signal;
a first memory input circuit that, at a write timing indicated by said first Data Enable signal, writes said first data to said first memory in synchronization with said first clock signal;
a second memory input circuit that, at a write timing indicated by said second Data Enable signal, writes said second data to said second memory in synchronization with said second clock signal; and
a clock generation circuit that supplies a third clock signal of a same frequency as said first or second clock signal, and
wherein each of said first and second memory input circuits uses, of said first and said second Data Enable signals, the Data Enable signal having the later timing or a Data Enable signal having a later timing than both said first and second Data Enable signal to read data on the basis of said third clock signal from, of said first and second memories, a corresponding memory at a read timing that is indicated by the Data Enable signal.