US Patent No. 10,298,241

WIDE BANDWIDTH BIDIRECTIONAL CLOCK SYNCHRONIZATION CIRCUIT


Patent No. 10,298,241
Issue Date May 21, 2019
Title Wide Bandwidth Bidirectional Clock Synchronization Circuit
Inventorship David Anthony Cananzi, Santa Clara, CA (US)
Assignee ARISTA NETWORKS, INC., Santa Clara, CA (US)

Claim of US Patent No. 10,298,241

1. A bidirectional clock synchronization circuit, comprising:a bidirectional port having an input/output terminal;
a transceiver, having a first interface and a second interface, the first interface having a unidirectional input and a unidirectional output, the second interface having a bidirectional input/output coupled to the input/output terminal of the bidirectional port; and
a phase locked loop (PLL), having an output coupled to the unidirectional input of the transceiver, and having an input coupled to the unidirectional output of the transceiver, the phase locked loop configured to select a frequency range for the input of the phase locked loop coupled to the unidirectional output of the transceiver or the output of the phase locked loop coupled to the unidirectional input of the transceiver.