US Patent No. 10,219,390

FABRICATION METHOD OF PACKAGING SUBSTRATE HAVING EMBEDDED PASSIVE COMPONENT


Patent No. 10,219,390
Issue Date February 26, 2019
Title Fabrication Method Of Packaging Substrate Having Embedded Passive Component
Inventorship Shih-Pin Hsu, Taoyuan (TW)
Zhao-Chong Zeng, Taoyuan (TW)
Assignee Unimicron Technology Corp., Taoyuan (TW)

Claim of US Patent No. 10,219,390

1. A fabrication method of a packaging substrate having at least an embedded passive component, comprising:providing a carrier board having two opposite surfaces and sequentially forming a releasing film and a metal layer on each of the opposite surfaces of the carrier board;
forming a plurality of positioning pads on each of the metal layer on each of the opposite surfaces;
covering each of the metal layer on each of the opposite surfaces with a first hot-melt dielectric layer;
disposing at least a passive component on each of the first hot-melt dielectric layer on each of the metal layer at a position corresponding to the positioning pads, wherein the passive component has upper and lower surfaces each having a plurality of electrode pads disposed thereon;
disposing on each of the first hot-melt dielectric layer on each of the metal layer a core board having at least a cavity so as to receive the passive component on the first hot-melt dielectric layer in the cavity;
stacking a second hot-melt dielectric layer on each of the core on each of the first hot-melt dielectric layer;
heat pressing the first hot-melt dielectric layer and the second hot-melt dielectric layer so as to form two dielectric layer units each having an upper surface and a lower surface and each having the core board corresponding and the passive component embedded therein and the positioning pads corresponding embedded in the lower surface thereof;
removing the carrier board and the releasing film on each of the opposite surfaces so as to separate the two dielectric layer units; and
forming a first wiring layer on the upper surface of each of the dielectric layer units and forming a second wiring layer on the lower surface of each of the dielectric layer units, wherein the first wiring layer is electrically connected to the electrode pads of the upper surface of the passive component through a plurality of first conductive vias, and the second wiring layer is electrically connected to the electrode pads of the lower surface of the passive component through a plurality of second conductive vias.