US Patent No. 10,201,085

METHODS OF FORMING BLIND VIAS FOR PRINTED CIRCUIT BOARDS


Patent No. 10,201,085
Issue Date February 05, 2019
Title Methods Of Forming Blind Vias For Printed Circuit Boards
Inventorship Shinichi Iketani, San Jose, CA (US)
Assignee SANMINA CORPORATION, San Jose, CA (US)

Claim of US Patent No. 10,201,085

1. A printed circuit board (PCB) having a blind plated through hole, the PCB manufactured by a method comprising:forming a first sub-composite core having a first core structure sandwiched between a first conductive layer and a second conductive layer, the first core structure including one or more dielectric layers and conductive layers;
forming a first via hole through the first core structure;
plating an inner surface of the first via hole with a conductive material to form a first plated via hole, wherein the first plated via hole electrically couples the first conductive layer to an internal layer or trace within the first core structure;
filling the first plated via hole with a conductive ink;
backdrilling the first plated via hole along a segment between the second conductive layer and the internal layer or trace to form a first blind plated through hole, wherein such backdrilling removes both the conductive material and conductive ink along the segment; and
laminating the second conductive layer of the first sub-composite core to a second sub-composite core.