1. A circuit package, comprising:a substrate;
a dielectric layer on a surface of the substrate;
a plurality of metal layers within the dielectric layer; and
an ultra-thick-metal (UTM) conductor on a surface of the dielectric layer; wherein the plurality of metals layers are configured into a plurality of metal pads, and wherein the dielectric layer within a footprint of the UTM conductor is configured with a plurality of vias connecting individual ones of the metal pads between neighboring pairs of the metal layers into a plurality interrupted via stacks that do not extend across more than three of the metal layers.