US Patent No. 10,194,524

ANTI-PAD FOR SIGNAL AND POWER VIAS IN PRINTED CIRCUIT BOARD


Patent No. 10,194,524
Issue Date January 29, 2019
Title Anti-pad For Signal And Power Vias In Printed Circuit Board
Inventorship Il-Young Park, Fremont, CA (US)
Jayanthi Natarajan, Sunnyvale, CA (US)
Assignee Cisco Technology, Inc., San Jose, CA (US)

Claim of US Patent No. 10,194,524

1. An apparatus comprising: a plurality of layers in a printed circuit board comprising at least one power plane and at least one ground plane; a plurality of vias extending through said plurality of layers and connecting two or more of said layers, said plurality of vias comprising two pairs of differential signal vias and at least one pair of power vias interposed between said two pairs of differential signal vias, each of said pairs of differential signal vias aligned in a row with said pair of power vias; a plurality of ground vias surrounding said at least one pair of differential signal vias and said at least one pair of power vias; a bridging trace extending between said pair of power vias; wherein said ground plane comprises an anti-pad formed therein by an opening defined by removal of material, said two pairs of differential signal vias and said at least one pair of power vias extending through said anti-pad in said ground plane to reduce power via resonance; and at least one via extending through said ground plane and located outside of the anti-pad.