US Pat. No. 10,923,774

BATTERY STATE ESTIMATING DEVICE AND POWER SUPPLY DEVICE

DENSO CORPORATION, Kariy...

1. A battery state estimating device comprising:a battery module;
a plurality of secondary batteries in the battery module;
a temperature acquiring section that acquires temperatures of at least two of the secondary batteries;
a temperature difference comparing section that compares the temperature difference of at least two temperatures acquired h the temperature acquiring section as a specific value;
a temperature difference comparing section that compares the temperature difference calculated by the temperature difference calculating section with a preset temperature difference threshold value;
a target number setting section that sets the number of targets based on a comparison result calculated by the temperature difference comparing section; and
a battery state estimating section that estimates the battery states of the secondary batteries in the number corresponding to the target number set by the target number setting section;
the battery state estimating device being configured to:
estimate a battery state of the battery module; and
be able to change a number of targets which is a number of the secondary batteries subject to estimation of a battery state of the plurality of secondary batteries based on the specific value; or
be able to change a calculation formula for estimating the battery state of the battery module to a calculation formula with a smaller calculation load,
wherein the target number setting section reduces the number of targets when the comparison result calculated by the temperature difference comparing section indicates that the temperature difference calculated by the temperature difference calculating section is smaller than the temperature difference threshold value.

US Pat. No. 10,923,773

CONTACTING UNIT FOR ELECTRICALLY CONTACTING AT LEAST ONE ELECTRONICS SEGMENT OF AN ELECTRONICS MODULE AND METHOD

TE Connectivity Germany G...

1. A contact unit comprising:a flexible substrate with a contact side having a module connector having a first unit terminal connected to a second unit terminal by a terminal conductor extending along a longitudinal axis thereof, and a segment connector having a first contact connected to the terminal conductor by a first contact conductor and a first fold of the flexible substrate, the first fold extends along a first folding axis that is formed at an oblique angle ? with respect the longitudinal axis, the first contact electrically connects with a first electrical terminal of an electronic segment of an electronic module, the segment connector includes a second contact for contacting a second terminal of the electronic segment.

US Pat. No. 10,923,772

CABLE-TYPE SECONDARY BATTERY AND METHOD FOR MANUFACTURING THE SAME

LG Chem, Ltd.

1. A cable-type secondary battery which comprises:an inner electrode;
a separation layer formed to surround an outer surface of the inner electrode and configured to prevent a short of the inner electrode;
a sheet-type outer electrode surrounding the separation layer or the inner electrode and formed by spiral winding; and
a polymer electrolyte coating layer formed to surround the sheet-type outer electrode, the polymer electrolyte coating layer having a thickness of 1-100 ?m,
wherein the polymer electrolyte coating layer is impregnated with an electrolyte, so that the polymer electrolyte coating layer has conductivity, and
wherein the outer electrode includes an outer current collector, an outer electrode active material layer formed on one surface of the outer current collector, and a first support layer formed on the other surface of the outer current collector, and the sheet-type outer electrode is formed by spiral winding to avoid an overlap.

US Pat. No. 10,923,771

METHOD FOR MANUFACTURING LAMINATED ELECTRODE BODY

TOYOTA JIDOSHA KABUSHIKI ...

1. A method for manufacturing a laminated electrode body, the method comprising the steps of:preparing a wound body having a flat portion and two curved portions by using a laminate formed of an elongated positive electrode, an elongated negative electrode, and an elongated separator that insulates the positive electrode and the negative electrode from each other;
preparing an electrode laminate structure having two cut surfaces by cutting out and removing the two curved portions of the wound body; and
removing active materials on the cut surfaces of the electrode laminate structure by spraying an inactive gas or electrically insulating particles onto the cut surfaces while applying, to the electrode laminate structure, one voltage of 25 V or more and less than another voltage causing a dielectric breakdown of the separator.

US Pat. No. 10,923,770

LITHIUM ION SECONDARY BATTERY

NEC CORPORATION, Tokyo (...

1. A lithium ion secondary battery comprising an electrolyte solution comprising a sulfone compound represented by formula (1), a fluorinated ether compound represented by formula (2) and LiN(FSO2)2, and a negative electrode comprising a silicon material, wherein a content of LiN(FSO2)2 in the electrolyte solution is more than 5 weight % and 20 weight % or less,R1?—SO2—R2?  (1)
wherein R1? and R2? are each independently a substituted or unsubstituted alkyl group or alkylene group, and in the case of the alkylene group, R1? and R2? are bonded via a single bond or a double bond to form a ring,
R1—O—R2  (2)
wherein R1 and R2 are each independently an alkyl group, and at least one of R1 and R2 is a fluorine-containing alkyl group.

US Pat. No. 10,923,769

ELECTROLYTIC SOLUTION FOR NON-AQUEOUS SECONDARY BATTERY AND NON-AQUEOUS SECONDARY BATTERY

FUJIFILM Corporation, To...

1. An electrolytic solution for a non-aqueous secondary battery comprising:an electrolyte;
an organic solvent; and
a compound represented by any of General Formulae (I) to (III),

in the formulae, M represents a transition metal,
R1, R2, and R3 each independently represent an alkyl group, an alkylsilyl group, an alkenyl group, an alkynyl group, an alkoxy group, a thioalkoxy group, an amino group, an amide group, an acyloxy group, a cyano group, a carboxy group, a carbonyl group-containing group, a sulfonyl group-containing group, a phosphino group, or a halogen atom, a represents an integer of 0 to 5, b represents an integer of 0 or more, c represents an integer of 0 to 5,
Ar1 represents an aromatic ring, and, in General Formula (II), a plurality of Ar1's may be linked together, and
Ar2 represents a nitrogen-containing aromatic hetero ring.

US Pat. No. 10,923,768

ALKYNYL-CONTAINING COMPOUND ADDITIVE FOR NON-AQUEOUS ELECTROLYTE SOLUTION, AND NON-AQUEOUS ELECTROLYTE SOLUTION FOR LITHIUM SECONDARY BATTERY AND LITHIUM SECONDARY BATTERY WHICH INCLUDE THE SAME

LG Chem, Ltd.

1. A non-aqueous electrolyte solution for a lithium secondary battery, the non-aqueous electrolyte solution comprising:a lithium salt;
an organic solvent; and
an additive for a non-aqueous electrolyte solution, wherein the additive comprises at least one compound represented by Formulae 1 or 2:

wherein, in Formula 1 or 2,
R1 and R2 are each independently hydrogen, an alkyl group having 1 to 6 carbon atoms, or alkoxy having 1 to 6 carbon atoms,
R3 is an alkylene group having 1 to 3 carbon atoms,
R4 is hydrogen, an alkyl group having 1 to 6 carbon atoms, an aryl group having 6 to 18 carbon atoms, a heterocycloalkyl group having 5 to 8 carbon atoms, an alkenyl group having 2 to 4 carbon atoms, or an alkynyl group having 2 to 4 carbon atoms, wherein the alkyl group, the aryl group, the heterocycloalkyl group, the alkenyl group and the alkynyl group are not further substituted,
R5 is an alkyl group having 2 to 4 carbon atoms which includes an ether group,
R6 is hydrogen, an alkyl group having 1 to 6 carbon atoms, an aryl group having 6 to 18 carbon atoms, a heterocycloalkyl group having 5 to 8 carbon atoms, an alkenyl group having 2 to 4 carbon atoms, or an alkynyl group having 2 to 4 carbon atoms, and
n is an integer of 0 to 3,
wherein when R4 is H or an aryl group having 6 carbon atoms, and n is 0, R1 is not hydrogen, and
wherein when R6 is an alkyl group having 1 to 6 carbon atoms, the alkyl group is not further substituted; and when R6 is an aryl group having 6 to 18 carbon atoms, the aryl group is a phenyl group, a halophenyl group, a tolyl group, a naphthyl group, a trihalophenyl group, a trihalomethylphenyl group, an anthryl group, or a phenanthryl group, each of which is not further substituted.

US Pat. No. 10,923,767

ORGANIC ELECTROLYTE SOLUTION AND LITHIUM BATTERY INCLUDING ORGANIC ELECTROLYTE SOLUTION

SAMSUNG SDI CO., LTD., Y...

1. An organic electrolyte solution, comprising:an organic solvent;
a lithium salt;
a first compound, the first compound being represented by Formula 1 or Formula 2; and
a second compound, the second compound being a succinonitrile-based compound represented by Formula 3:

wherein, in Formulae 1, 2, and 3,
X is sulfur (S),
L is a substituted or unsubstituted C1-C5 alkylene group or a substituted or unsubstituted C1-C5 dialkoxy alkylene group,
R is a substituted or unsubstituted C1-C5 alkyl group or a C2-C10 alkenyl group,
M is an alkali metal or an alkaline earth-metal,
m is 0 or 1,
n is 1, and
R1, R2, R3, and R4 are each independently selected from hydrogen, a substituted or unsubstituted C1-C5 alkyl group, a substituted or unsubstituted C4-C10 cycloalkyl group, a substituted or unsubstituted C5-C10 aryl group, a substituted or unsubstituted C2-C10 heteroaryl group, a substituted or unsubstituted C2-C10 alkenyl group, a substituted or unsubstituted C2-C10 alkynyl group, a substituted or unsubstituted C1-C5 alkoxy group, a substituted or unsubstituted C1-C5 dialkoxy group, a substituted or unsubstituted C1-C5 alkylene amine group, and —Si(Rg)(Rh)(Ri), wherein Rg, Rh, and Ri are each independently a substituted or unsubstituted C1-C5 alkyl group.

US Pat. No. 10,923,766

HYBRID SOLID ELECTROLYTE FOR SECONDARY BATTERY AND MANUFACTURING METHOD THEREOF

SEVEN KING ENERGY CO., LT...

1. A hybrid solid electrolyte comprising:a hybrid film including (i) 60 to 100 parts by weight of an ion conductive ceramic and (ii) 1 to 40 parts by weight of a polymer; and
a liquid electrolyte including (i) an ion compound selected from the group consisting of lithium ions and sodium ions and (ii) a non-aqueous organic solvent,
wherein the hybrid solid electrolyte includes (i) 60 to 100 parts by weight of the hybrid film and (ii) 1 to 40 parts by weight of the liquid electrolyte,
wherein the liquid electrolyte is impregnated in the hybrid film in a manner in which the liquid electrolyte physically contacts the ion conductive ceramic and the polymer.

US Pat. No. 10,923,765

LITHIUM CONDUCTING CERAMIC OXIDE DECONTAMINATION METHOD

ROBERT BOSCH GMBH, Stutt...

1. A method of decontaminating a lithium conducting ceramic oxide material, the method comprises:soaking the lithium conducting ceramic oxide material having a first thickness of surface contaminants in a first organic solvent containing an inorganic salt at an inorganic salt concentration to obtain a soaked lithium conducting ceramic oxide material; and
rinsing the soaked lithium conducting ceramic oxide material in a second organic solvent to obtain a decontaminated lithium conducting ceramic oxide material having a second thickness of surface contaminants less than the first thickness of surface contaminants.

US Pat. No. 10,923,764

ELECTROLYTE SOLUTION, ELECTROCHEMICAL DEVICE, LITHIUM ION SECONDARY BATTERY, AND MODULE

DAIKIN INDUSTRIES, LTD., ...

1. An electrolyte solution comprising:a lithium salt;
a compound (1) represented by following formula (1):
CF3CFX11COOR11 (1),
wherein, in formula (1), X11 is a hydrogen atom, or a C1-C3 alkyl group in which one or more hydrogen atoms are optionally replaced by fluorine atoms; and R11 is a C1-C3 alkyl group in which one or more hydrogen atoms are optionally replaced by fluorine atoms;
a fluorinated carbonate;
a compound (2) represented by following formula (2); and
a compound (3) represented by following formula (3);
wherein the electrolyte solution contains the compound (2) and the compound (3) in amounts of 0.08 to 2.50% by mass and 0.02 to 1.50% by mass, respectively, relative to the electrolyte solution,
wherein the fluorinated carbonate is at least one selected from the group consisting of a fluorinated acyclic carbonate and a fluorinated saturated cyclic carbonate compound represented by following formula (A);

wherein, in formula (A), X1 to X4 are the same as or different from each other and are each —H, —C, —O, or —F, a fluorinated alkyl group optionally having an ether bond, or a fluorinated alkoxy group optionally having an ether bond; at least one of X1 to X4 is —F, a fluorinated alkyl group optionally having an ether bond, or a fluorinated alkoxy group optionally having an ether bond,

wherein, in formula (2), X31 to X34 are the same as or different from each other and are each a group containing at least H, C, O, or F,
wherein in formula (3), X41 and X42 are the same as or different from each other and are each a group containing at least H, C, O, or F.

US Pat. No. 10,923,763

LITHIUM METAL SULFIDES AS LITHIUM SUPER IONIC CONDUCTORS, SOLID ELECTROLYTE AND COATING LAYER FOR LITHIUM METAL BATTERY AND LITHIUM-ION BATTERY

UNIVERSITY OF MARYLAND, C...

1. A solid-state lithium ion electrolyte, comprising:at least one material selected from the group of materials consisting of compounds of formulae (I), (II), (III), (IV) and (V):
Liy(M1)x1InSiS6  (I)
wherein x1 is a number from greater than 0 to less than 2, y is a value such that charge neutrality of the formula is obtained, and M1 is at least one element different from Li selected from elements of groups 1, 2, 13 and a transition metal;
LiyIn2-x2(M2)x2SiS6  (II)
wherein
x2 is a number from greater than 0 to less than 2; y is a value such that the formula (II) is charge neutral; and M2 is at least one element different from In selected from elements of groups 3, 4, 5, 6, 8, 9, 11, 13, 14, 16 and 17;
Liy In2Si1-x3(M3)x3 S6  (III)
wherein x3 is from greater than 0 to less than 1; y is a value such that the formula (III) is charge neutral, and M3 is at least one element different from Si selected from elements of groups 2, 3, 5, 6, 7, 8, 9, 10, 12, 14, 15 and 16;
LiyIn2SiS6-x4(X)x4  (IV)
wherein x4 is from greater than 0 to less than 6, y is a value such that the formula (IV) is charge neutral and X is an element different from S selected from elements of groups 16 and 17;andLi2In2SiS6  (V)
wherein the at least one material selected from the group of materials consisting of compounds of formulae (I), (II), (III), (IV) and (V) comprises a monoclinic structure.

US Pat. No. 10,923,762

LITHIUM-ION BATTERY

SHENZHEN CAPCHEM TECHNOLO...

1. A lithium-ion battery, comprising a battery case, and a cathode, an anode and a non-aqueous electrolyte inside the battery case;the cathode comprising a cathode active material and a coating layer coated on a surface of the cathode active material; the cathode active material having at least one of the component represented by general formula 1 or general formula 2,
LixNiyM1-yO2,  general formula 1:
wherein 0.5?x?1.2, 0.5?y?1, and M is at least one selected from the group consisting of Co, Mn, Al, Ti, Fe, Zn, Zr, and Cr;
LikCozL1-zO2,  general formula 2:
wherein 0.5?k?1.2, 0.5 the coating layer is a metal oxide and/or a metal fluoride;
the anode includes an anode active material selected from at least one of graphite or a silicon-containing carbon material;
the non-aqueous electrolyte contains at least one of the unsaturated phosphate ester compounds represented by structural formula 1,

wherein R1, R2 and R3 are each independently selected from a saturated hydrocarbon group, an unsaturated hydrocarbon group or a halogenated hydrocarbon group having 1 to 5 carbon atoms, and at least one of R1, R2 and R3 is an unsaturated hydrocarbon group.

US Pat. No. 10,923,760

ELECTRODE ASSEMBLIES

GRST INTERNATIONAL LIMITE...

1. An electrode assembly for a lithium-ion battery, comprising at least one anode, at least one cathode and at least one separator interposed between the at least one anode and at least one cathode, wherein the at least one anode comprises an anode current collector and an anode electrode layer comprising an anode material and a binder material, and the at least one cathode comprises a cathode current collector and a cathode electrode layer comprising a cathode material and a binder material;wherein each of the cathode and anode electrode layers independently has a void volume between 10% and 35%, based on the total volume of the electrode layer;
wherein the amount of each of the binder materials is independently at least 3% by weight, based on the total weight of the electrode layer;
wherein the at least one separator is made of polymeric fibers selected from the group consisting of polyamide, polycarbonate, polyimide, polyetherether ketone, polysulfones, polyphenylene oxide, polyphenylene sulfide, polyacrylonitrile, polyvinyl pyrrolidone, polyester, polyethylene terephthalate, polybutylene terephthalate, polyethylene naphthalene, polybutylene naphthalate, and combinations thereof;
wherein the water content of the electrode assembly is less than 20 ppm by weight, based on the total weight of the electrode assembly;
wherein the cathode electrode layer and the anode electrode layer each further comprises only one conductive agent independently selected from the group consisting of carbon, carbon black, graphite, expanded graphite, graphene, graphene nanoplatelets, carbon fibers, carbon nano-fibers, graphitized carbon flake, carbon tubes, carbon nanotubes, activated carbon and mesoporous carbon;
wherein the density of each of the cathode and anode electrode layers is independently from 1.0 g/cm3 to 6.5 g/cm3, and
wherein each of the binder materials is independently selected from the group consisting of styrene-butadiene rubber, acrylated styrene-butadiene rubber, acrylonitrile copolymer, acrylonitrile-butadiene rubber, nitrile butadiene rubber, acrylonitrile-styrene-butadiene copolymer, acryl rubber, butyl rubber, fluorine rubber, polytetrafluoroethylene, polyethylene, polypropylene, ethylene/propylene copolymers, polybutadiene, polyethylene oxide, chlorosulfonated polyethylene, polyvinylpyrrolidone, polyvinylpyridine, polyvinyl alcohol, polyvinyl acetate, polyepichlorohydrin, polyphosphazene, polyacrylonitrile, polystyrene, latex, acrylic resins, phenolic resins, epoxy resins, carboxymethyl cellulose, hydroxypropyl cellulose, cellulose acetate, cellulose acetate butyrate, cellulose acetate propionate, cyanoethylcellulose, cyanoethylsucrose, polyester, polyamide, polyether, polyimide, polycarboxylate, polycarboxylic acid, polyacrylic acid, polyacrylate, polymethacrylic acid, polymethacrylate, polyacrylamide, polyurethane, fluorinated polymer, chlorinated polymer, a salt of alginic acid, polyvinylidene fluoride, poly(vinylidene fluoride)-hexafluoropropene, and combinations thereof.

US Pat. No. 10,923,759

ELECTROLYTE SOLUTION FOR LITHIUM-SULFUR BATTERY AND LITHIUM-SULFUR BATTERY COMPRISING SAME

LG CHEM, LTD., Seoul (KR...

1. A liquid electrolyte for a lithium-sulfur battery comprising:a lithium salt; and
a non-aqueous solvent,
wherein the non-aqueous solvent includes
i) 1,3-dioxolane (DOL), included in 10% by volume to 40% by volume of a total weight of the non-aqueous solvent;
ii) glycol ether represented by the following Chemical Formula 1; and
iii) linear ether represented by the following Chemical Formula 2:
R1—O—(CH2CH2O)x—R2   [Chemical Formula 1]
R3—O—(CH2CH2O)y—R4   [Chemical Formula 2]
in Chemical Formulae 1 and 2,
R1 to R4 are the same as or different from each other, and each independently a C1 to C6 alkyl group, a C6 to C12 aryl group, or a C7 to C13 arylalkyl group;
x is an integer of 1 to 4;
y is an integer of 0 to 4; and
the ether of Chemical Formula 1 is different from the ether of Chemical Formula 2.

US Pat. No. 10,923,758

ELECTRODE ASSEMBLY HAVING STEP, SECONDARY BATTERY, BATTERY PACK AND DEVICE INCLUDING ELECTRODE ASSEMBLY, AND METHOD OF MANUFACTURING ELECTRODE ASSEMBLY

LG Chem, Ltd.

1. An electrode assembly including a first electrode laminate having at least one or more electrode units having a first area, stacked therein, a second electrode laminate having at least one or more electrode units having a second area smaller than the first area, stacked therein, and a step portion provided by stacking the first electrode laminate and the second electrode laminate in a direction perpendicular to a plane and having a step formed due to a difference in areas of the first and second electrode laminates, the electrode assembly being characterized in that,the at least one or more electrode units of the first electrode laminate and the second electrode laminate are wound and surrounded by a rectangular-shaped separation film such that at least a portion of the rectangular-shaped separation film covers the step portion of the electrode assembly, the rectangular-shaped separation film initially having a constant thickness when wound around the at least one or more electrode units of the first electrode laminate and the second electrode laminate, wherein the rectangular-shaped separation film forms a separator step having a shape identical to the step portion, and wherein the rectangular-shaped separation film covering the step portion of the electrode assembly is elongated while being wound so as to result in a reduced thickness equal to 90% or less of the constant thickness of the rectangular-shaped separation film located in the first and the second electrode laminates.

US Pat. No. 10,923,757

FUEL CELL MODULE HOUSING WITH FIELD REPLACEABLE STACKS

FuelCell Energy, Inc., D...

1. A power plant comprising:a plurality of fuel cell modules, wherein each fuel cell module comprises:
a plurality of fuel cell stacks;
a manifold configured to provide process gases to and receive process gases from the plurality of fuel cell stacks; and
a module housing enclosing the plurality of fuel cell stacks and the manifold;
wherein each fuel cell stack is individually installable onto the manifold by lowering the fuel cell stack onto the manifold, and is individually removable from the manifold by raising the fuel cell stack from the manifold;
wherein each module housing defines a hot region, and a cool region located above the hot region;
wherein each fuel cell module comprises a thermally insulating wall separating the hot region from the cool region;
wherein each thermally insulating wall comprises a plurality of openings and a plurality of closure plates, each closure plate removably closing a respective opening among the plurality of openings, wherein each opening and each respective closure plate corresponds to a respective fuel cell stack among the plurality of fuel cell stacks;
wherein each fuel cell stack of each fuel cell module is individually installable onto the manifold by removing the respective closure plate from the respective opening of the thermally insulating wall, and lowering the fuel cell stack from the cool region through the respective opening to the hot region and onto the manifold; and
wherein each fuel cell stack of each fuel cell module is individually removable from the manifold by removing the respective closure plate from the respective opening of the thermally insulating wall, and raising the fuel cell stack off of the manifold and from the hot region through the respective opening to the cool region.

US Pat. No. 10,923,756

JOINING STRUCTURE

NGK INSULATORS, LTD., Na...

1. A joining structure comprising:a first bonded member; and
a glass portion bonded to a surface of the first bonded member, wherein
the glass portion includes an interface region not exceeding 5 ?m from the surface of the first bonded member, and an inner region more than 5 ?m from the surface of the first bonded member,
the interface region and inner region respectively include rod-shaped crystal particles that have three or more aspect ratios when viewed in cross section,
an average orientation angle of the rod-shaped crystal particles included in the interface region is greater than or equal to 60 degrees and less than or equal to 120 degrees, and
a standard deviation of orientation angle of the rod-shaped crystal particles included in the inner region is greater than a standard deviation of orientation angle of the rod-shaped crystal particles included in the interface region.

US Pat. No. 10,923,755

MOUNT STRUCTURE FOR FUEL CELL STACK

Honda Motor Co., Ltd., T...

1. A mount structure for fixing a fuel cell stack to a first installation member and a second installation member that are provided as separate members, the fuel cell stack including a plurality of fuel cells for generating electrical energy by electrochemical reactions of a fuel gas and an oxygen-containing gas, the fuel cells being stacked together,the mount structure comprising:
a first bracket member configured to support the fuel cell stack and fix the fuel cell stack to the first installation member; and
a second bracket member configured to support the fuel cell stack and fix the fuel cell stack to the second installation member,
wherein the second bracket member has a plate portion configured to be fixed to a lower surface of the fuel cell stack by a plurality of bolts, and
wherein the plate portion has a plurality of bolt holes through which the plurality of bolts are inserted, and in the plate portion, on a side opposite to a side configured to contact the lower surface of the fuel cell stack, each of the plurality of bolt holes has a depression extending therearound and configured such that a thickness of the plate portion at the depressions is less than a thickness of the plate portion at other parts thereof,
and wherein a cutout portion is formed in the plate portion and extends straight between two of the plurality of bolt holes adjacent to each other along a direction in which said two of the plurality of bolt holes are separated from each other, and
both ends of the cutout portion, respectively, are connected to the depressions surrounding said two of the plurality of bolt holes.

US Pat. No. 10,923,753

METHOD AND SYSTEM FOR REBALANCING ELECTROLYTES IN A REDOX FLOW BATTERY SYSTEM

ESS TECH, INC., Wilsonvi...

1. A redox flow battery, comprising:a redox flow battery cell, and
a catalyst bed positioned in a rebalancing reactor fluidly coupled to the redox flow battery cell, the catalyst bed including,
a substrate layer, a spacing layer, and a catalyst layer interposed between and attached to the substrate layer and the spacing layer to form a one-piece removable catalyst bed, wherein the rebalancing reactor rebalances electrolyte without connection to an external load.

US Pat. No. 10,923,752

MEMBRANE-ELECTRODE ASSEMBLY, METHOD FOR MANUFACTURING SAME, AND FUEL CELL COMPRISING SAME

KOLON INDUSTRIES, INC., ...

1. A membrane-electrode assembly comprising:a catalyst layer having pores therein;
an interfacial adhesive layer having a first part disposed on the catalyst layer and a second part filling a portion of the pores of the catalyst layer; and
an ion exchange membrane which is positioned on the interfacial adhesive layer and bonded to the catalyst layer by means of the interfacial adhesive layer,
wherein the interfacial adhesive layer includes a fluorine-based ionomer having an equivalent weight (EW) of 500 to 1000 g/eq,
wherein the interfacial adhesive layer further includes a nanopowder having an average particle diameter of 1 to 50 nm, and
wherein the nanopowder is an ionic conductor, and
wherein the ionic conductor is any one hydrophilic inorganic additive selected from the group consisting of SnO2, fumed silica, clay, alumina, mica, zeolite, phosphotungstic acid, silicon tungstic acid, zirconium hydrogen phosphate, and a mixture thereof.

US Pat. No. 10,923,751

SYSTEMS AND METHODS FOR FUEL DESULFURIZATION

HONEYWELL INTERNATIONAL I...

1. A method of fuel desulfurization onboard an aircraft, comprising:receiving fuel from a fuel source in a liquid phase;
depressurizing the fuel in the liquid phase in a vacuum system to convert at least a portion of the fuel into a gaseous phase, the vacuum system including a tank that receives the fuel in the liquid phase from the fuel source and a vacuum blower that applies a negative pressure to the tank to convert the portion of the fuel from the liquid phase to the gaseous phase with a fuel bypass conduit coupled between the fuel tank and the vacuum system that is opened or closed by a valve;
directing a flow of the fuel in the gaseous phase from the tank to a reformer;
reforming the portion of the fuel in the gaseous phase in the reformer to create a hydrogen enriched fuel in the gaseous phase;
delivering the hydrogen enriched fuel in the gaseous phase to a fuel cell stack; and
opening or closing the valve to enable the fuel to be removed from the fuel source directly based on an altitude of the aircraft.

US Pat. No. 10,923,750

DC VOLTAGE BROWNOUT PROTECTION FOR PARALLEL-CONNECTED FUEL-CELL POWER PLANTS IN ISLANDED MODE

DOOSAN FUEL CELL AMERICA,...

1. A fuel cell power plant, comprising:a cell stack assembly including a plurality of fuel cells;
a single stage converter configured to couple the cell stack assembly to a power network; and
a controller configured to
determine whether the fuel cell power plant has a DC voltage brownout condition, and
adjust a frequency droop gain of the fuel cell power plant to change a power output from the fuel cell power plant during the DC voltage brownout condition while satisfying at least three criteria of a set of criteria consisting of
(i) avoiding overloading other fuel cell power plants of the power network,
(ii) remaining below a maximum load step-up capability of the power network,
(iii) remaining below a maximum load step-up capability of the fuel cell power plant,
(iv) maintaining a power frequency within an acceptable frequency range, and
(v) avoiding repeating the DC voltage brownout condition.

US Pat. No. 10,923,749

METHOD FOR OPERATING A FUEL CELL AND FUEL CELL SYSTEM

VOLKSWAGEN AG, Wolfsburg...

1. A method for operating a fuel cell including at least one individual fuel cell with a membrane and catalysts, the method comprising:actively influencing a humidity within the fuel cell as a function of a voltage of the fuel cell, the influencing comprising:
specifying a first humidity at a first operating-point-related voltage, wherein the first humidity is a relative humidity of 100%; and
specifying a second humidity that is lower than the first humidity at a second operating-point-related voltage that is higher than the first operating-point-related voltage.

US Pat. No. 10,923,748

AIR CELL

Nissan Motor Co., Ltd., ...

1. An air cell comprising:a first electrode structure including a first filling chamber for electrolyte liquid interposed between a first air electrode and a first metal negative electrode;
a second electrode structure including a second filling chamber for the electrolyte liquid interposed between a second air electrode and a second metal negative electrode;
an electrode housing portion individually housing the first electrode structure and the second electrode structure adjacent to one another;
a liquid supply unit that supplies the electrolyte liquid from a storage tank to the first and second electrode structures via a liquid injection device,
wherein a liquid junction prevention portion, a first liquid injection hole, and a second liquid injection hole are directly provided on an upper surface of the electrode housing portion;
wherein the first liquid injection hole is associated with the first electrode structure to inject the electrolyte liquid into the first filling chamber of the first electrode structure;
wherein the second liquid injection hole is associated with the second electrode structure to inject the electrolyte liquid into the second filling chamber of the second electrode structure;
wherein the liquid junction prevention portion divides a first space between the first liquid injection hole and the liquid injection device and a second space between the second liquid injection hole and the liquid injection device,
wherein the liquid injection device is separated from each of the first liquid injection hole and the second liquid injection hole by an empty space, and there is no structure interposed between the liquid injection device and the first liquid injection hole and between the liquid injection device and the second liquid injection hole,
wherein the electrode housing portion is connected to the first filling chamber via the first liquid injection hole, and the electrode housing portion is connected to the second filling chamber via the second liquid injection hole, and
wherein the liquid junction prevention portion protrudes upward from the upper surface of the electrode housing portion.

US Pat. No. 10,923,747

STOP CONTROL METHOD FOR FUEL CELL SYSTEM

Hyundai Motor Company, S...

1. A stop control method for a fuel cell system of a vehicle, the stop control method comprising:determining, by a controller, whether a fuel cell of the fuel cell system is shut down when a key-off signal is received indicating that key-off of the vehicle is required;
comparing, by the controller, a voltage of the fuel cell with a first set voltage when it is determined that the fuel cell is not shut down;
controlling, by the controller, a voltage of a high-voltage terminal downwardly when the voltage of the fuel cell is larger than the first set voltage;
turning on, by the controller, a cathode oxygen depletion (COD) relay a first time after controlling the voltage of the high-voltage terminal downwardly;
turning off, by the controller, a high-voltage terminal relay a first time after turning on the COD relay, the high-voltage relay disposed between the fuel cell and the high-voltage terminal; and
shutting down, by the controller, the fuel cell and performing key-off control after turning off the high-voltage terminal relay,
wherein the turning off of the high-voltage terminal relay the first time comprises turning off, by the controller, the high-voltage terminal relay the first time when a difference between the voltage of the fuel cell and the voltage of the high-voltage terminal is less than a second set voltage.

US Pat. No. 10,923,746

FUEL CELL STACK

HONDA MOTOR CO., LTD., T...

1. A fuel cell stack comprising:a cell stack body comprising a plurality of power generation cells stacked in a stacking direction, the power generation cells each including an electrolyte electrode assembly, and separators sandwiching the electrolyte electrode assembly, the electrolyte electrode assembly including an electrolyte, and an anode and a cathode provided on both sides of the electrolyte; and
terminal plates, insulating plates, and end plates provided at both ends of the cell stack body,
wherein a single reactant gas supply passage configured to supply a reactant gas to be supplied to the anode or the cathode, and a first reactant gas discharge passage and a second reactant gas discharge passage configured to communicate with the single reactant gas supply passage, respectively, and discharge branched flows of a partially consumed reactant gas discharged from the anode or the cathode, extend through at least the cell stack body, the insulating plates, and the end plates in the stacking direction;
the reactant gas supply passage is formed at one end of the cell stack body in a horizontal direction, and the first reactant gas discharge passage and the second reactant gas discharge passage are formed at another end of the cell stack body in the horizontal direction;
the first reactant gas discharge passage is positioned below the reactant gas supply passage, and the second reactant gas discharge passage is positioned above the reactant gas supply passage; and
a bypass channel configured to connect the reactant gas supply passage and the first reactant gas discharge passage is formed between the cell stack body and the end plates.

US Pat. No. 10,923,745

SYSTEMS AND METHODS FOR FUEL CELL GAS CIRCULATION

Nuvera Fuel Cells, LLC, ...

1. A fuel cell system, comprising:a fuel cell comprising an anode compartment having an inlet, an outlet, and an open flowfield made of a material chosen from metal foam, metal mesh, metal screen, corrugated metal sheet, graphite foam, and graphite mesh;
an anode gas in the anode compartment and creating an anode pressure ranging from 1 psig to 30 psig;
a source of a hydrogen-containing fuel gas fluidly connected to the inlet of the anode compartment through a first conduit;
a control valve installed in the first conduit, the control valve comprising a spring and a poppet, the spring being in contact with the poppet;
a single gas ejector, the gas ejector being installed in the first conduit between the control valve and the anode compartment;
a fixed orifice plate, the fixed orifice plate being installed in the first conduit between the single gas ejector and the anode compartment;
a second conduit fluidly connecting the outlet of the anode compartment and the gas ejector;
a liquid separator installed in the second conduit between the outlet of the anode compartment and the gas ejector, the liquid separator being connected to a first exhaust line and a second exhaust line;
an anode exhaust gas flowing from the outlet of the anode compartment into the gas ejector,
wherein when the anode pressure inside the anode compartment is lower than a preset value corresponding to a force exerted by the spring on the poppet, the spring moves the poppet to open the control valve, allowing the hydrogen-containing fuel gas to flow into the gas ejector and mix with the anode exhaust gas in the gas-delivery means to form the anode gas, and
wherein the liquid separator separates water and impurities gas from the anode exhaust before the anode exhaust enters the gas ejector, drains the water through the first exhaust line, and purges the impurities gas through the second exhaust line.

US Pat. No. 10,923,744

ELECTROCHEMICAL SYSTEMS FOR DIRECT GENERATION OF ELECTRICITY AND HEAT PUMPING

KD INNOVATION LTD., Hsin...

1. An electrochemical system, comprising:a first electrode assembly maintained at and operating at a first temperature, the first electrode assembly including a first electrode set and a second electrode set;
a second electrode assembly maintained at and operating at a second temperature different from the first temperature, the second electrode assembly including a first electrode set and a second electrode set;
a first electrolyte—that flows and recirculates between the first electrode set of the first electrode assembly and the first electrode set of the second electrode assembly; and
a second electrolyte that flows and recirculates between the second electrode set of the first electrode assembly and the second electrode set of the second electrode assembly; and
a separator between the first and second electrode sets of the first electrode assembly or between the first and second electrode sets of the second electrode assembly, wherein the separator includes a non-permselective membrane provided with insoluble iron hexacyanoferrate Prussian Blue (Fe(III)4[Fe(II)(CN)6]3) insoluble in the first electrolyte including species composed of hexacyano complex of iron or potassium and the second electrolyte including species composed of Cu(I)/Cu(II) pair or Fe(II)/Fe(III) pair, and the separator forms insoluble hexacyanoferrates insoluble in the first electrolyte and the second electrolyte to block the transfer of electroactive species between the first electrolyte and the second electrolyte while maintaining ionic conductivity between the first and second electrode sets of the first electrode assembly and the first and second electrode sets of the second electrode assembly,
wherein the first electrolyte and the second electrolyte recirculate between the first electrode assembly and the second electrode assembly.

US Pat. No. 10,923,743

GAS SUPPLY, CONDITIONING, AND DISCHARGE SYSTEMS AND METHODS

REINZ-DICHTUNGS-GMBH, Ne...

1. A method for leading a first gas onto at least one electrode of a fuel cell arrangement and for leading a second gas away from the at least one electrode, comprising the steps;leading the first gas which is to be fed to the electrode into a gas-gas heat exchanger and leading the second gas which is led away from the electrode into the gas-gas heat exchanger, for transferring heat between the first gas and the second gas in the gas-gas heat exchanger, wherein an outlet for the second gas in the gas-gas heat exchanger is in direct fluid connection with an inlet of a humidifier for the second gas;
coming from the gas-gas heat exchanger, leading the first and second gas which are temperature adjusted in the gas-gas heat exchanger into a humidifier for transferring humidity between the first gas and the second gas in the humidifier; and
coming from the humidifier, leading the first gas which is humidified or dehumidified in the humidifier onto the electrode.

US Pat. No. 10,923,742

FUEL CELL AND METHOD FOR MANUFACTURING FUEL CELL

PANASONIC INTELLECTUAL PR...

1. A fuel cell comprising:a membrane electrode assembly including
an electrolyte film having a first surface and a second surface disposed at a side opposite to the first surface,
an anode catalyst layer disposed so as to face the first surface of the electrolyte film, and
a cathode catalyst layer disposed so as to face the second surface of the electrolyte film;
an anode gas diffusion layer disposed on the anode catalyst layer at a side opposite to the electrolyte film;
a cathode gas diffusion layer disposed on the cathode catalyst layer at a side opposite to the electrolyte film;
a fuel gas fluid flow path for flowing fuel gas which is to be supplied to the anode gas diffusion layer; and
an oxidant gas fluid flow path for flowing oxidant gas which is to be supplied to the cathode gas diffusion layer;
a pair of separators disposed on the anode gas diffusion layer at a side opposite to the membrane electrode assembly and on the cathode gas diffusion layer at a side opposite to the membrane electrode assembly, respectively, the pair of separators being configured to clamp a laminate that includes the membrane electrode assembly, the anode gas diffusion layer, and the cathode gas diffusion layer; and
a frame disposed between the pair of separators and surrounding a periphery of the laminate, wherein:
at least one gas diffusion layer among the anode gas diffusion layer and the cathode gas diffusion layer has stiffness lower than stiffness of the frame and has a groove-shaped fluid flow path on a surface facing one of the pair of separators, the at least one gas diffusion layer having a protrusion protruding beyond a level of a surface of the frame which faces the one of the pair of separators in a state that the laminate is not clamped between the pair of separators under a pressure,
the protrusion is pressed by the one of the pair of separators so that the at least one gas diffusion layer is deformed and put into contact with the frame in a state that the laminate is clamped between the pair of separators under the pressure,
the at least one gas diffusion layer of the anode gas diffusion layer and the cathode gas diffusion layer has anisotropic elasticity,
the at least one gas diffusion layer of the anode gas diffusion layer and the cathode gas diffusion layer has a higher degree of elasticity in a first direction than in a second direction, the first direction being parallel to a main surface of the at least one gas diffusion layer which faces one of the pair of separators, and the second direction being parallel to the main surface and intersecting the first direction,
the second direction is an extension direction of a fluid flow path selected from the fuel gas fluid flow path and the oxidant gas fluid flow path, the fluid flow path flowing gas which is to be supplied to the at least one gas diffusion layer,
by the pair of separators clamping the laminate, the at least one gas diffusion layer expands to the first direction more than the second direction,
the pair of separators have coolant flow paths on a main surface at a side opposite to the anode gas diffusion layer and on a main surface at a side opposite to the cathode gas diffusion layer, respectively,
the coolant flow path on the main surface at the side opposite to the anode gas diffusion layer is coincidence with the groove-shaped fluid flow path which the anode gas diffusion layer has from the view outside the main surface at the side opposite to the anode gas diffusion layer, and
the coolant flow path on the main surface at the side opposite to the cathode gas diffusion layer is coincidence with the groove-shaped fluid flow path which the cathode gas diffusion layer has from the view outside the main surface at the side opposite to the cathode gas diffusion layer.

US Pat. No. 10,923,741

FUEL CELL SEPARATOR

TOYOTA BOSHOKU KABUSHIKI ...

1. A fuel cell separator comprising:a plate-shaped conductive separator body configured to be arranged between membrane electrode assemblies in a fuel cell; and
recesses and projections formed in the separator body such that the recesses and the projections are alternately arranged in parallel to each other, wherein
the projections include first projections that are configured to face an electrode layer of the membrane electrode assembly,
a thin film is arranged on a surface of each of the first projections, the thin film having a higher conductivity than the separator body,
the first projections are configured to be in contact with the electrode layer of the membrane electrode assembly with the thin films located in between,
the recesses include first recesses that open in a protruding direction of the first projections,
each of the first recesses is configured to form a passage through which oxidizing gas or fuel gas is supplied to the electrode layer of the membrane electrode assembly, the passage being located on an inner side of each of the first recesses, and
a portion of each of the thin films that is in contact with the electrode layer of the membrane electrode assembly includes a groove, the groove extending in a direction intersecting the recesses and the projections and connecting to at least one of the passages located on opposite sides of one of the first projections that includes the thin film.

US Pat. No. 10,923,740

FUEL CELL SEPARATOR, FUEL CELL JOINT SEPARATOR, AND POWER GENERATION CELL

HONDA MOTOR CO., LTD., T...

1. A rectangular fuel cell separator comprising:a reactant gas flow field configured to allow a reactant gas to flow in a separator surface direction; and
a plurality of fluid passages extending through the fuel cell separator in a separator thickness direction, and formed along opposing sides of the fuel cell separator, on both sides of the reactant gas flow field,
wherein a reactant gas supply passage is provided at a central position of one side of the opposing sides of the fuel cell separator;
a pair of reactant gas discharge passages are provided in another side of the opposing sides of the fuel cell separator, on both sides of a position opposing the reactant gas supply passage;
the reactant gas supply passage is provided at a position closest to the reactant gas flow field among the plurality of fluid passages provided along the one side;
an identification mark of the fuel cell separator is provided between the reactant gas supply passage and an outer peripheral end of the fuel cell separator;
the reactant gas flow field allows the reactant gas to be distributed from the reactant gas supply passage toward the pair of reactant gas discharge passages on both sides of the position opposing the reactant gas supply passage; and
the reactant gas supply passage and the identification mark are arranged side by side in a direction perpendicular to the opposing sides of the fuel cell separator.

US Pat. No. 10,923,738

COOLANT INJECTION CONTROLLER

Intelligent Energy Limite...

9. A method for controlling a fuel cell system comprising the step of:actively controlling the flow of a coolant to a fuel cell assembly for cooling and/or hydrating the fuel cell assembly in response to a measure of fuel cell assembly performance, and providing for a first mode of operation if the measure of fuel cell assembly performance is below a predetermined threshold and a second mode of operation if the measure of fuel cell assembly performance is above the predetermined threshold, the first and second modes having different coolant injection profiles; and,
wherein, in the first mode of operation, the coolant injection profile provides for control of the flow of coolant by alternating between at least two different injection flow rates such that electrical power is provided to a heater element for heating a predetermined quantity of coolant for delivery to said fuel cell assembly, and
wherein the heater element is located in a coolant storage module and configured to heat, during the first mode, frozen coolant such that the predetermined quantity is thawed for the delivery.

US Pat. No. 10,923,736

METHOD FOR PRODUCING FUEL CELL SEPARATOR, AND SEPARATOR MATERIAL

TOYOTA JIDOSHA KABUSHIKI ...

1. A method for producing a fuel cell separator, the fuel cell separator having formed thereon a gas flow channel through which one of fuel gas or oxidant gas to be supplied to a fuel cell flows, the method comprising:preparing a plate-shaped separator material including a metal substrate, a carbon layer covering the metal substrate, and a resin layer covering the carbon layer;
press-forming the prepared separator material into a shape of the separator such that the separator has the gas flow channel formed thereon; and
removing the resin layer entirely from the press-formed separator.

US Pat. No. 10,923,735

COMPLIANT CONTACT MATERIAL FOR FUEL CELLS AND METHOD OF MAKING THEREOF

Bloom Energy Corporation,...

1. A solid oxide fuel cell (SOFC) stack, comprising:an interconnect comprising ribs separated by channels;
a solid oxide fuel cell comprising an electrolyte located between an anode electrode and a cathode electrode; and
a contact material composition comprising a compliant contact print ink, the compliant contact print ink comprising:
an electrically conductive material;
a plasticizer;
a solvent; and
a binder,
wherein the contact material composition is located between and contacts the cathode electrode and the ribs of the interconnect.

US Pat. No. 10,923,734

TEMPERATURE-CONTROL ARRANGEMENT FOR AN ELECTRICAL ENERGY STORE

Dr. Ing. h.c. F. Porsche ...

1. A temperature-control arrangement comprising:controllable valves,
an electrical energy store,
a thermal device,
a cooling device, and
a coolant circuit with coolant lines, the coolant lines at least partially activatable and deactivatable by the controllable valves,
wherein the temperature-control arrangement is configured to permit at least a first state and a second state of the coolant circuit through actuation of the controllable valves,
wherein the coolant circuit is configured to, in the first state, permit coolant flow between the cooling device and both the thermal device and the electrical energy store in order to cool the thermal device and the electrical energy store, and
wherein the coolant circuit is configured to, in the second state, permit coolant flow between the thermal device and the electrical energy store in order to heat the electrical energy store,
wherein the thermal device and the electrical energy store are connected fluidically in parallel in the first state and are connected fluidically in series in the second state.

US Pat. No. 10,923,733

NANOCATALYST SUITABLE FOR AN ANODE OF A SOLID OXIDE FUEL CELL

Korea Institute of Scienc...

1. A nanocatalyst for an anode of a solid oxide fuel cell formed in internal pores of a porous electrode, the nanocatalyst comprising:a ceramic that is doped with a plurality of metal particles which are dispersed on a surface of the ceramic, which are present in a mixed form of ions with metal, and which comprise a metal selected from the group consisting of Au, Ag, Pd, Ir, Rh, Ru, Os, and combinations thereof, and that is fluorite represented by Chemical Formula 1 below:
A1-a-bCeaZrbO2-?,
where A is an element selected from the group consisting of Y, Sc, Gd, Sm, La, Nb, Nd, Pr, Yb, Er, Tb and Ca, and
each of a, b and ? is a real number satisfying 0?a?1, 0?b?1 and 0???1,
wherein the ions in the mixed form or ions with metal are an ionic species present in a ratio of 30 wt % or more based on total weight of metallic components as determined by X-ray photoelectron spectroscopy (XPS) analysis.

US Pat. No. 10,923,731

LITHIUM SECONDARY BATTERY INCLUDING NONAQUEOUS ELECTROLYTE HAVING LITHIUM-ION CONDUCTIVITY

PANASONIC INTELLECTUAL PR...

1. A lithium secondary battery comprising:a nonaqueous electrolyte having lithium-ion conductivity; and
an electrode group including:
a positive electrode containing a positive electrode active material containing lithium;
a negative electrode including a negative electrode current collector and protrusions disposed on the negative electrode current collector; and
a separator disposed between the positive electrode and the negative electrode, wherein:
the positive electrode, the negative electrode, and the separator of the electrode group are wound,
lithium metal is deposited on the negative electrode during charging, and the lithium metal is dissolved in the nonaqueous electrolyte during discharging,
the negative electrode current collector has a first surface facing outward of the winding of the electrode group and a second surface facing inward of the winding of the electrode group,
one of the first surface or the second surface includes a first region and a second region that is closer to an innermost circumference of the winding of the electrode group than the first region,
the protrusions include outer-circumference-side protrusions disposed on the first region and inner-circumference-side protrusions disposed on the second region, and
a first average height of the outer-circumference-side protrusions is smaller than a second average height of the inner-circumference-side protrusions.

US Pat. No. 10,923,730

ELECTRODEPOSITED COPPER FOIL WITH ANTI-BURR PROPERTY

CHANG CHUN PETROCHEMICAL ...

1. An electrodeposited copper foil having a deposited side and a drum side comprising:a specific burst strength measured in accordance with IPC-TM-650 2.4.2 in the range of 1.5 to 4.3 kPa*m2/g;
a tensile strength in the range of 30.2 to 39.8 kgf/mm2;
wherein the deposited side exhibits a hardness in the range of 0.2-2.0 GPa by nano indentation analysis measured at a depth of 300 nm; and,
wherein the electrodeposited copper foil exhibits a reduced copper burr property on a clipping edge of the electrodeposited copper foil, wherein the reduced copper burr property defined as the number of copper burrs per 5 cm of the clipping edge, is in the range of 0˜9, and that a maximum length of any copper burr on the clipping edge is 35 ?m; and wherein the electrodeposited copper foil, after roll pressing, does not include wrinkles.

US Pat. No. 10,923,729

DEVICE AND METHOD OF MANUFACTURING HIGH ASPECT RATIO STRUCTURES

1. A method of manufacturing a lithium battery with a current collector formed of pillars on a substrate face, wherein the method comprises: forming elongate and aligned structures forming electrically conductive pillars on the substrate face, each of the pillars having an upstanding pillar wall that extends from a pillar base to a pillar top,wherein individual ones of the pillars are each covered with a laminate comprising:
a first electrode layer comprising a first electrode;
a solid state electrolyte layer;
a second electrode layer comprising a second electrode; and
a topstrate forming an electrode part; and
wherein the first electrode layer has a minimum distance above the pillar base ranging between 300 and 1000 nanometers, and
wherein the first electrode layer and the second electrode layer do not extend between the pillars,
thereby preventing lithium intercalation into the first electrode and/or the second electrode at a location near the pillar base.

US Pat. No. 10,923,728

CURRENT COLLECTOR STRUCTURES FOR RECHARGEABLE BATTERY

1. A battery cell electrode comprising:a current collector including a polymer film coupled with a plurality of wires of a conductive material, wherein:
the current collector comprises a first region and a second region;
the first region is characterized by an extension of the conductive material;
the polymer film is contained within the second region of the current collector;
the plurality of wires comprise a first plurality of wires extending across a first surface of the polymer film and a second plurality of wires extending across a second surface of the polymer film opposite the first surface of the polymer film; and
the first plurality of wires and the second plurality of wires extend from the extension of the conductive material along the polymer film.

US Pat. No. 10,923,727

ANTI-CORROSION FOR BATTERY CURRENT COLLECTOR

American Lithium Energy C...

1. A battery, comprising:an electrolyte;
a current collector;
a first anti-corrosion layer and a second anti-corrosion layer, the current collector interposed between the first anti-corrosion layer and the second anti-corrosion layer, the first anti-corrosion layer and/or the second anti-corrosion layer configured to prevent the current collector from being corroded by an exposure to the electrolyte by at least preventing contact between the current collector and the electrolyte, and the first anti-corrosion layer and/or the second anti-corrosion layer further configured to prevent the current collector from being corroded by a byproduct from the electrolyte including by participating in a sacrificial reaction in which the first anti-corrosion layer and/or the second anti-corrosion layer react with the byproduct to prevent the byproduct from reacting with the current collector.

US Pat. No. 10,923,726

ARTIFICIAL SOLID ELECTROLYTE INTERPHASE OF A METALLIC ANODE FOR A SECONDARY BATTERY INCLUDING AMINO-FUNCTIONALIZED CARBON STRUCTURES TO PROTECT THE ANODE MATERIAL, A METHOD FOR PRODUCING THE ANODE AND A LITHIUM METAL SECONDARY BATTERY INCLUDING THE ANODE

Korea Institute of Scienc...

1. An artificial solid electrolyte interphase (ASEI) of an anode for a secondary battery, comprising:a first film comprised of amino-functionalized, reduced graphene oxide (rGO) that is amino-functionalized by binding with polyethyleneimine present in an amount of from 1 to 50% by weight, based on total weight of the amino-functionalized, reduced graphene oxide (rGO) and that is disposed in contact with an anode material to protect the anode material; and
a second film comprised of amino-functionalized, multi-walled carbon nanotubes that is amino-functionalized by binding with polyethyleneimine and that is stacked on the first film.

US Pat. No. 10,923,725

METHOD FOR PRODUCING AN ANODE FOR A LITHIUM METAL SECONDARY BATTERY INCLUDING A MXENE THIN FILM

Korea Institute of Scienc...

1. A method for producing an anode for a lithium metal secondary battery, comprising:coating a thin film comprised of Nb2C, Ti2C or Ti3C2 on a substrate;
providing a lithium metal electrode; and
laminating the thin film to a surface of the lithium metal electrode.

US Pat. No. 10,923,724

DEVICE AND METHOD OF MANUFACTURING HIGH ASPECT RATIO STRUCTURES

1. A method of manufacturing a 3D thin film current collector with a high-aspect ratio structure of pillars formed on a metal substrate, wherein the method comprises:forming elongate and aligned carbon nanotube pillars on a face of a seed layer covering the metal substrate with a micro-pattern mask, the micro-pattern mask arranging the carbon nanotube pillars to have a minimum interdistance in a range between 600 nm and 10 ?m;
sensitizing the carbon nanotube pillars with a seed metal;
electroless plating the sensitized carbon nanotube pillars to electrically bridge the carbon nanotube pillars across the seed layer to the metal substrate by a plated electroconductive material deposited by said electroless plating step, said plated electroconductive material electrically connecting said metal substrate to said sensitized carbon nanotube pillars to form a sensitized carbon nanotube structure of pillars;
covering the sensitized carbon nanotube structure of pillars with a conductive layer deposited by an electroplating step; and
conformally covering the conductive layer with subsequent layers of a coating that is a battery multilayer or a photovoltaic multilayer, wherein the subsequent layers comprise a solid state electrolyte layer.

US Pat. No. 10,923,723

ELECTRO-CONDUCTIVE POLYMERS OF HALOGENATED PARA-AMINOPHENOL, AND ELECTROCHEMICAL CELLS EMPLOYING SAME

1. A method comprising:(a) halogenating para-aminophenol to produce a para-aminophenol halogenation product; and
(b) polymerizing the para-aminophenol halogenation product to produce an electro-conductive halogenated poly-aminophenol redox polymer.

US Pat. No. 10,923,722

MATERIALS WITH EXTREMELY DURABLE INTERCALATION OF LITHIUM AND MANUFACTURING METHODS THEREOF

GROUP14 TECHNOLOGIES, INC...

1. A process for preparing silicon-carbon composite particles, the process comprising:a. providing a porous carbon framework comprising micropores;
b. heating the porous carbon framework at an elevated temperature in the presence of a silicon-containing gas, thereby impregnating silicon within the micropores of the porous carbon framework to provide a silicon-carbon composite; and
c. performing a particle size reduction of the silicon-carbon composite to provide silicon-carbon composite particles, wherein the silicon-carbon composite particles have a nitrogen-inaccessible volume ranging from 0.05 to 0.5 cm3/g.

US Pat. No. 10,923,720

GRAPHENE-ENABLED SELENIUM CATHODE ACTIVE MATERIAL FOR AN ALKALI METAL-SELENIUM SECONDARY BATTERY

Global Graphene Group, In...

1. A graphene-enabled hybrid particulate for use as a cathode active material of an alkali metal battery wherein said hybrid particulate comprises a single or a plurality of graphene sheets and a plurality of fine selenium particles or coatings, having a diameter or thickness from 0.5 nm to 10 ?m, and the graphene sheets and the selenium particles or coatings are mutually bonded or agglomerated into said hybrid particulate containing an exterior graphene sheet or multiple exterior graphene sheets embracing said selenium particles or coatings, and wherein said graphene is in an amount of from 0.01% to 30% by weight based on the total weight of graphene and selenium combined, wherein said graphene-enabled hybrid particulate contains at least one interior graphene sheet.

US Pat. No. 10,923,719

POSITIVE-ELECTRODE ACTIVE MATERIAL FOR LITHIUM SECONDARY BATTERY, POSITIVE ELECTRODE FOR LITHIUM SECONDARY BATTERY, AND LITHIUM SECONDARY BATTERY

SUMITOMO CHEMICAL COMPANY...

1. A positive-electrode active material for a lithium secondary battery, comprising:a secondary particle in which a plurality of primary particles of a lithium composite metal oxide are aggregated,
wherein the secondary particle has a void formed therein and a through-hole that connects the void to a surface of the secondary particle,
the positive-electrode active material for the lithium secondary battery satisfies all of (i) to (iii),
a first void fraction in a center portion of the secondary particle is calculated by Formula (I) and is 20% or more and 40% or less,
the first void fraction=a first area of a void part present in the center portion of a cross section of the secondary particle/an area of the center portion of the cross section of the secondary particle×100  (I),
the center portion is a portion surrounded by a circle having a radius of r calculated by Formula (II) in which S is an area of a figure surrounded by an outer edge of the cross section of the secondary particle, and a center of the circle is a center of mass of the figure,
r=(S/?)0.5/2  (II),
a second void fraction in a surface portion of the secondary particle is calculated by Formula (III) and is 0.10% or more and 3% or less,
the second void fraction=a second area of a void part present in a surface portion of a cross section of the secondary particle/an area of the surface portion of the cross section of the secondary particle×100  (III),
the surface portion is a portion excluding a center portion in the figure, and
a composition formula of the lithium composite metal oxide is represented by Formula (IV),
(i) a ratio (B/A) of a minor axis length B of the figure to a major axis length A of the figure is 0.75 or more and 1.0 or less,
(ii) a proportion of a total area of the void exposed in the cross section of the secondary particle to an area of the figure is 2.0% or more and 20% or less, and
(iii) a proportion of an area of the void present in the center portion of the secondary particle among the void exposed in the cross section of the secondary particle to the total area of the void exposed in the cross section is 60% or more and 99% or less,
where the major axis length is a longest diameter among diameters of the figure passing through a position of center of mass of the figure, and
Li[Lix(Ni(1-y-z-w)CoyMnzMw)1-x]O2  (IV)
wherein in Formula (IV), 0?x?0.2, 0

US Pat. No. 10,923,718

CONCENTRATED METAL SALT SOLUTION IN A NON-AQUEOUS SOLVENT SYSTEM

The Government of the Uni...

1. A concentrated solution of a metal salt in a non-aqueous solvent system made from the steps comprising:adding a water soluble polymer to a water solution;
dissolving a metal salt in the water solution;
wherein the metal salt comprises titanium (IV) sulfate;
forming a dissolved metal salt solution;
adding a non-aqueous solvent to the dissolved metal salt solution;
forming a non-aqueous solvent system;
flowing oxygen over the non-aqueous solvent system;
heating the non-aqueous solvent system; and
forming a concentrated solution of a metal salt in a non-aqueous solvent system.

US Pat. No. 10,923,717

LITHIUM ION SECONDARY BATTERY

LG CHEM, LTD., Seoul (KR...

1. A lithium ion secondary battery which comprises:an electrode assembly and
an electrolyte,
wherein the electrode assembly comprises a positive electrode, a negative electrode and a separator interposed between the positive electrode and the negative electrode,
the positive electrode comprises vanadium oxide as a positive electrode active material,
the electrolyte comprises a non-aqueous solvent and a lithium salt,
the non-aqueous solvent comprises ethylene glycol dimethyl ether (DME), and
the lithium salt comprises lithium bis(fluorosulfonyl)imide (LiFSI);
wherein the vanadium oxide comprises secondary particles formed by assemblage of primary particles;
wherein the positive electrode comprises the vanadium oxide in an amount of 50 wt % or more based on a total weight of the positive electrode active material contained in the positive electrode; and
wherein the vanadium oxide comprises the vanadium oxide secondary particles in an amount of 70 wt % to 100 wt % based on a total weight of the vanadium oxide.

US Pat. No. 10,923,716

GRAPHENE-CARBON NANOTUBE HYBRID ELECTRODE MATERIAL

Northrop Grumman Systems ...

1. A hybrid electrode, comprising:a well-interconnected, non-woven sheet of carbon-nanotubes (CNTs), the CNTs being selected between single-walled, having a diameter of approximately 1 to 20 nanometers and an aspect ratio ranging from approximately 50 to 5000, or multi-walled, having a diameter of approximately 2-80 nanometers and an aspect ratio ranging from approximately 50 to 5000; and
a layer of lithiated graphene nanoparticles deposited on said sheet of CNTs, the graphene nanoparticles being high defect single sheet of graphene having adsorbed lithium ions of the formula Li1+nC6, where n=1 to 5 and are processed to comprise reduced conducting graphene.

US Pat. No. 10,923,715

ANODE ACTIVE MATERIAL FOR LITHIUM SECONDARY BATTERY, METHOD OF PREPARING THE SAME, AND LITHIUM SECONDARY BATTERY CONTAINING THE SAME

SK INNOVATION CO., LTD., ...

1. An anode active material for a lithium secondary battery, the anode active material comprising:a carbon based particle;
a first carbon coating layer positioned on the carbon based particle and including pores;
a silicon coating layer positioned on the pores and/or a pore-free surface of the first carbon coating layer; and
a second carbon coating layer positioned on the silicon coating layer.

US Pat. No. 10,923,714

STRUCTURES FOR INTERDIGITATED FINGER CO-EXTRUSION

PALO ALTO RESEARCH CENTER...

1. A structure, comprising:a substrate;
a first material on the substrate, the first material having a binder and a first active material, the first material having a top surface opposite from the substrate;
periodically located voids having trapezoidal cross sections that only partially extend from the top surface of the first active material towards the substrate;
a second active material residing on at least a portion of an inside surface of the trapezoidal voids, the second active material having a lower density that the first material; and
an electrolyte material filling the voids.

US Pat. No. 10,923,712

PREPARING ANODES FOR LITHIUM ION CELLS FROM ALUMINUM ANODE ACTIVE MATERIAL PARTICLES

STOREDOT LTD., Herzeliya...

1. A method comprising:replacing a native oxide on a surface of aluminum particles by a lithium-containing layer thereby forming anode active material particles, and
preparing an anode from the anode active material particles, and
preparing a lithium ion cell using the prepared anode.

US Pat. No. 10,923,711

LITHIUM SECONDARY BATTERY INCLUDING NONAQUEOUS ELECTROLYTE HAVING LITHIUM-ION CONDUCTIVITY

PANASONIC INTELLECTUAL PR...

1. A lithium secondary battery comprising:a nonaqueous electrolyte having lithium-ion conductivity; and
an electrode group including:
a positive electrode containing a positive electrode active material containing lithium;
a negative electrode including a negative electrode current collector and protrusions disposed on the negative electrode current collector; and
a separator disposed between the positive electrode and the negative electrode,
wherein:
the positive electrode, the negative electrode, and the separator of the electrode group are wound,
lithium metal is deposited on the negative electrode during charging, and the lithium metal is dissolved in the nonaqueous electrolyte during discharging,
the negative electrode current collector has a first surface facing outward of the winding of the electrode group and a second surface facing inward of the winding of the electrode group,
one of the first surface or the second surface includes a first region and a second region that is closer to an innermost circumference of the winding of the electrode group than the first region,
the protrusions include outer-circumference-side protrusions disposed on the first region and inner-circumference-side protrusions disposed on the second region,
in the one of the first surface or the second surface including the first region and the second region, a first area rate is smaller than a second area rate, where the first area rate refers to (AOP/AO)×100%, AOP refers to a sum of the projection areas of the outer-circumference-side protrusions onto the first region, AO refers to an area of the first region, the second area rate refers to (AIP/AI)×100%, AIP refers to a sum of the projection areas of the inner-circumference-side protrusions onto the second region, and AI refers to an area of the second region,
the projection shapes of the outer-circumference-side protrusions onto the first region are line shapes along a direction perpendicular to the winding axis of the electrode group, and
the projection shapes of the inner-circumference-side protrusions onto the second region are line shapes along a direction perpendicular to the winding axis of the electrode group.

US Pat. No. 10,923,710

ELECTRODE MATERIAL FOR A LITHIUM-ION BATTERY

Robert Bosch GmbH, Stutt...

1. An electrode material for an electrochemical energy store, comprising particles of a lithiatable active material, wherein the particles are partly coated with a lithium-ion-conducting solid electrolyte layer, wherein the solid electrolyte layer has recesses.

US Pat. No. 10,923,709

METHODS AND SYSTEMS FOR MAKING AN ELECTRODE FREE FROM A POLYMER BINDER

Changs Ascending Enterpri...

1. An electrode assembly comprising:an Al substrate of a battery electrode;
a layer of inorganic binder film over a top surface of the Al substrate, wherein the inorganic binder film is formed of Al from the Al substrate, a source of P—O elements, and at least one transition metal element; and
a layer of lithium ion battery active material over the inorganic binder film layer of the Al substrate to form the battery electrode,
wherein the inorganic binder film layer formed of the Al from the Al substrate, the source of P—O elements, and the at least one transition metal element binds the lithium ion battery active material with the Al substrate of the battery electrode, wherein the battery electrode has not been subject to a charge-discharge cycle within a lithium ion battery.

US Pat. No. 10,923,708

FIBER-REINFORCED SINTERED ELECTRODE

Bayerische Motoren Werke ...

1. A sintered electrode comprising a sintered composite material, the composite material comprising:(A) active material particles;
(B) solid-state electrolyte particles from an inorganic lithium ion conductor;
(C) a particulate conductivity additive from an electrically conductive material; and
(D) a fibrous material;
wherein weight proportions N(A) to N(D) of the components (A) to (D) in the composite material satisfy the following: N(A)>N(B)>N(C), N(D).

US Pat. No. 10,923,706

STORAGE BATTERY ELECTRODE, MANUFACTURING METHOD THEREOF, STORAGE BATTERY, AND ELECTRONIC DEVICE

Semiconductor Energy Labo...

1. A method for manufacturing a storage battery electrode, comprising:forming a first aqueous solution by mixing an active material with an aqueous solution including an oxidized derivative of a first conductive additive;
forming a first mixture by drying the aqueous solution;
forming a second mixture by mixing a second conductive additive and a binder;
forming a third mixture by mixing the first mixture and the second mixture and reducing the oxidized derivative of the first conductive additive; and
coating a current collector with the third mixture.

US Pat. No. 10,923,705

METHOD OF PRODUCING NEGATIVE ELECTRODE FOR NONAQUEOUS ELECTROLYTE SECONDARY BATTERY AND METHOD OF PRODUCING NONAQUEOUS ELECTROLYTE SECONDARY BATTERY

TOYOTA JIDOSHA KABUSHIKI ...

1. A method of producing a negative electrode for a nonaqueous electrolyte secondary battery, the method comprising:preparing a first dispersion solution consisting of mixing a negative electrode active material having a BET specific surface area of 3 m2/g or more and 8 m2/g or less, a first carbon material having a BET specific surface area of 30 m2/g or more and 100 m2/g or less, a thickener, and a solvent so that the thickener is adsorbed to the negative electrode active material and the first carbon material;
preparing a second dispersion solution by mixing the first dispersion solution and a second carbon material having a BET specific surface area of 200 m2/g or more and 500 m2/g or less;
prepare a negative electrode paint consisting of mixing the second dispersion solution and a binder so that the binder is selectively adsorbed to the second carbon material; and
applying the negative electrode paint to a surface of a negative electrode current collector and drying the negative electrode paint,
wherein the binder is different than the thickener, when
a mass of the negative electrode active material is represented as M,
a mass of the first carbon material is represented as M1, and
a mass of the second carbon material is represented as M2, M, M1, and M2 satisfy the following formulae (I) and (II):
M:M1=80:20 to 95:5  (I)
(M+M1):M2=100:0.5 to 100:2  (II).

US Pat. No. 10,923,704

ELECTRODE COATED WITH A FILM OBTAINED FROM AN AQUEOUS SOLUTION COMPRISING A WATER-SOLUBLE BINDER, PRODUCTION METHOD THEREOF AND USES OF SAME

1. An electrode consisting of a support coated at least in part with a film containing an active material comprising LiFePO4 coated with graphite and/or carbon,said electrode being obtained by
preparing the active material by mechano-fusion or hybridization, and
spreading on a support an aqueous solution comprising the active material, at least one water soluble binder and at least one water soluble thickening agent,
wherein the at least one water soluble binder is non-fluorinated.

US Pat. No. 10,923,703

ELECTRICITY STORAGE APPARATUS

KABUSHIKI KAISHA TOYOTA J...

1. An electricity storage apparatus comprising:an electrode assembly including a positive electrode and a negative electrode;
a tab including one end which is electrically connected to the electrode assembly; a conductive member disposed above the electrode assembly, and electrically connected to the tab;
a casing housing the electrode assembly; and
an insulating member disposed between the casing and the tab,
wherein
the tab comprises:
a first bent part provided on a side close to the one end of the tab,
a second bent part provided on a side close to another end of the tab, and
a joining part provided between the first bent part and the second bent part, the joining part joined to the conductive member,
the joining part extends along a surface of the conductive member,
the second bent part is bent upward from a direction in which the joining part extends,
the another end of the tab is in contact with the insulating member, and
wherein the casing comprises a body and a lid covering an upper portion of the body, and the insulating member is fixed to a lower surface of the lid.

US Pat. No. 10,923,702

CONNECTION MODULE

AUTONETWORKS TECHNOLOGIES...

1. A connection module configured to be attached to a power storage element group that includes a plurality of power storage elements arranged side by side, comprising:a plurality of bus bars each connecting adjacent power storage elements among the plurality of power storage elements;
a wire bundle that is a bundle of wires for transmitting information regarding the plurality of bus bars or the plurality of power storage elements; and
an insulating protector that holds the plurality of bus bars,
wherein the insulating protector includes a protector body that insulates the plurality of bus bars from each other and a wire fixing portion that is provided on an outer wall of the protector body at a position of the protector body at which the wire bundle is drawn out from the outer wall of the protector body, and
the wire fixing portion includes an extension portion to which the wire bundle is to be fixed and that extends outwardly from the outer wall of the protector body in a first direction in which the wire bundle is drawn out from the outer wall of the protector body, and at least one reinforcing portion that extends from the extension portion in a second direction which intersects with the first direction such that the at least one reinforcing portion is continuous with the extension portion and the protector body.

US Pat. No. 10,923,701

SENSING BLOCK AND BATTERY PACKAGE INCLUDING SAME

Tyco Electronics AMP Kore...

1. A sensing block comprising:a block body having a terminal seat section, a first lock positioned on one side of the terminal seat section, and a cell lead coupling section formed for a cell lead to be inserted and disposed on one or both sides of the terminal seat section; and
a first connecting member of conductive material positioned to correspond to the terminal seat section, wherein the first connecting member includes a terminal body section and a bend section fitting over, and enclosing the terminal seat section along both sides and along the top of the terminal seat section, and the cell lead is welded to the first connecting member.

US Pat. No. 10,923,699

LITHIUM-SULFUR BATTERY INCLUDING POLYMER NON-WOVEN FABRIC BETWEEN POSITIVE ELECTRODE AND SEPARATOR

LG CHEM, LTD., Seoul (KR...

1. A lithium-sulfur battery, comprising:a positive electrode;
a negative electrode;
a separator;
a liquid electrolyte, and
a polymer non-woven fabric provided between the positive electrode and the separator,
wherein a material of the polymer non-woven fabric is one or more selected from the group consisting of polyimide, polyethylene oxide, polyethylene terephthalate, polyvinyl alcohol, polyacrylonitrile and polyurethane,
wherein the polymer non-woven fabric has an average pore diameter of 0.2 ?m to less than 0.5 ?m, and
wherein the polymer non-woven fabric has tensile strength of 15 MPa to less than 30 MPa.

US Pat. No. 10,923,697

ELECTRODE ASSEMBLY AND METHOD FOR MANUFACTURING THE SAME

LG Chem, Ltd.

1. A method for manufacturing an electrode assembly comprising:preparing a plurality of unit cells, each of which comprises a positive electrode, a negative electrode, and a separator, and a separation film;
seating the plurality of unit cells successively arranged on a first surface of the separation film; and
folding the separation film on which the unit cells are seated to dispose the separation film between the plurality of unit cells,
wherein, in the folding, the separation film is folded at least two times to come into contact with and surround a first unit cell, which is disposed at an initial position of the separation film, of the plurality of unit cells, and
wherein a distance between the first unit cell and a second unit cell adjacent to the first unit cell of the plurality of unit cells is defined as a1, a width of the first unit cell is defined as w1, and a height of the first unit cell is defined as h1, the unit cells are arranged to satisfy a following equation: 2*w1+4*h1

US Pat. No. 10,923,696

ELECTROCHEMICAL CELL HOUSING

Sargent Manufacturing Com...

1. An electrochemical cell housing comprising:an enclosure having an interior chamber constructed and arranged to receive at least one electrochemical cell;
an outlet formed in the enclosure;
at least one flow restriction constructed and arranged to allow gas emitted from the at least one electrochemical cell to flow from the interior chamber through the at least one flow restriction to the outlet; and
at least one catalyst, wherein gas emitted from the at least one electrochemical cell flows from the interior chamber through the at least one catalyst to the outlet, and wherein the catalyst catalyzes lithium.

US Pat. No. 10,923,695

BATTERY PACK

Samsung SDI Co., Ltd., Y...

1. A battery pack comprising:a housing accommodating a battery cell and having a throughhole; and
a pressure equalization device coupled to the throughhole and equalizing internal and external pressures of the housing, wherein the pressure equalization device comprises:
a first pressure equalization member located within the housing in the throughhole and configured to equalize the internal and external pressures of the housing when a variation in the internal pressure of the housing is smaller than a reference pressure variation; and
a second pressure equalization member located within the housing in the throughhole and configured to equalize the internal and external pressures of the housing when the variation in the internal pressure of the housing is greater than the reference pressure variation,
wherein the throughhole passes in a first direction from an interior of the housing to an outer surface of the housing,
wherein the pressure equalization device is configured to release a first amount of pressure from inside the housing along a first path through the first pressure equalization member made of an air permeable material to an exterior of the housing and an exterior of the second pressure equalization member when the variation in the internal pressure of the housing is smaller than the reference pressure variation, and is configured to release a second amount of pressure greater than the first amount of pressure along both the first path and a second path that is spaced apart from the first path when the variation in the internal pressure of the housing is greater than the reference pressure variation,
wherein the pressure equalization device comprises an inner body connected to the throughhole and accommodating the first and second pressure equalization members,
wherein the second pressure equalization member defines an annular outer portion,
wherein the first pressure equalization member and the second pressure equalization member are integrally formed with each other, and
wherein the pressure equalization device is entirely located within the housing.

US Pat. No. 10,923,692

BATTERY CELL WITH HOUSING COMPONENTS WHICH ARE ADHESIVELY BONDED TO ONE ANOTHER IN A SEALED MANNER BY A THREE-LAYER ADHESIVE COMPOSITE, AND METHOD AND APPARATUS FOR MANUFACTURING SAID BATTERY CELL

Robert Bosch GmbH, Stutt...

1. A battery cell (1), comprising:electrodes (9),
an electrolyte (7), and
a housing (3) which encloses the electrodes (9) and the electrolyte (7), the housing (3) being composed of at least first and second housing components (11),
characterized in that
the first and second housing components (11) each have an outer surface and are adhesively bonded to one another in a sealed manner by an adhesive composite (13) along mutually opposing abutment faces (21), the adhesive composite (13) comprising:
a first adhesive composite component (15), which is in part interposed between the mutually opposing abutment faces (21) of the housing components (11), which includes first and second portions contacting the outer surfaces of the first and second housing components (11), respectively, adjacent the mutually opposing abutment surfaces, and which is resistant and impermeable to the electrolyte (7),
a second adhesive composite component (17) which includes first and second portions contacting the outer surfaces of the first and second housing components (11), respectively, adjacent the first and second portions, respectively, of the first adhesive composite component (15), which includes a middle portion extending over the first adhesive composite component (15) and extending continuously from the first portion of the second adhesive composite (17) component to the second portion of the second adhesive composite component (17), and which consists of a fluidly processable, cured material, and
a third adhesive composite component (19), which includes first and second portions contacting the outer surfaces of the first and second housing components (11), respectively, adjacent the first and second portions, respectively, of the second adhesive composite component (17), which includes a middle portion extending over the second adhesive composite component (17) and extending continuously from the first portion of the third adhesive composite component (19) to the second portion of the third adhesive composite component (19), and which is water-impermeable and/or oxygen-impermeable.

US Pat. No. 10,923,690

THIN FILM BATTERY, THIN FILM BATTERY MANUFACTURING METHOD AND REFINED MICROCRYSTALLINE ELECTRODE MANUFACTURING METHOD

INSTITUTE OF NUCLEAR ENER...

1. A thin film battery manufacturing method, comprising the steps of:depositing an active material on a conductive substrate by sputtering to form a first active material electrode layer, wherein the first active material electrode layer is in a solid form;
enabling the first active material electrode layer in the solid form to be subjected to an annealing process, while allowing the annealing process to further include the following steps:
enabling the first active material electrode layer in the solid form to be subjected to a conventional thermal annealing (CTA) process in an oxygen-containing environment at a first temperature interval to form a first active material crystallization precursor; and
enabling the first active material crystallization precursor to be subjected to a rapid thermal annealing (RTA) process in the oxygen-containing environment at a second temperature interval to form a first active material coating layer with uniformly distributed fine microcrystal grains, in a manner that the temperature range of the second temperature interval is greater than the temperature range of the first temperature interval;
forming an electrolyte layer on the first active material coating layer; and
forming an electrode layer on the electrolyte layer while allowing the electrode layer and the first active material coating layer to have opposite polarities.

US Pat. No. 10,923,689

METHOD FOR MASK-FREE OLED DEPOSITION AND MANUFACTURE

OLEDWorks LLC, Rochester...

1. A method for making an OLED lighting panel on a substrate having length and width dimensions comprising the steps of:patterning a first electrode layer over the substrate so that some portions of the substrate are not covered by the first electrode layer;
patterning an inorganic insulation layer at least partially over the first electrode layer such that:
a) the inorganic insulation layer surrounds an enclosed area of the first electrode layer where portions of the inorganic insulation layer are in the width dimension and have at least one horizontal thickness HTW-iil and portions of the inorganic insulation layer are in the length dimension and have at least one horizontal thickness HTL-iil;
b) where at least part of one of the portions in the length or width dimension has a horizontal thickness that is greater than at least part of the same or other dimension; and
c) the inorganic insulating layer is arranged such that at least some part of the first electrode layer lies outside the enclosed area adjacent to the portion(s) of inorganic insulation layer whose horizontal thickness is greater and at least some part of the substrate lies outside the enclosed area adjacent to the portion(s) of inorganic insulation layer whose horizontal thickness is less;
depositing at least one organic layer for light emission over the length and width of the substrate;
removing the at least one organic layer over a sealing region; the sealing region being located in part over the inorganic insulation layer wherein:
a) the horizontal thickness of at least one portion of the sealing region (HTW-s or HTL-s) is less than the at least one portion of the horizontal thickness of the inorganic insulation layer (HTW-iil or HTL-iil) so that the least one portion of the sealing region lies entirely over at least one of the portions of the inorganic insulation layer whose horizontal thickness is greater; and
b) where at least another portion of the sealing region (HTW-s or HTL-s) lies partially over the portion of inorganic insulation layer (HTW-iil or HTL-iil) whose horizontal thickness is less and partially over at least the part of the substrate located on the opposite side from the enclosed area; and
depositing a second electrode layer over the length and width of the substrate.

US Pat. No. 10,923,687

MANUFACTURING METHOD OF DISPLAY PANEL AND DISPLAY PANEL

WUHAN CHINA STAR OPTOELEC...

1. A manufacturing method of a display panel, comprising steps of:providing a substrate having a first surface and a second surface, wherein the first surface is disposed opposite to the second surface, and forming a plurality of deposition regions and a plurality of non-deposition regions alternately arranged on the first surface;
providing a mask comprising a plurality of blocking regions and a plurality of hollow regions spaced apart from each other, wherein the blocking regions are disposed corresponding to the deposition regions and the hollow regions are disposed corresponding to the non-deposition regions;
providing a light source to irradiate the mask, wherein the light source in the hollow region irradiates the non-deposition regions after passing through the hollow regions, and the light source in the blocking region is blocked by the blocking region; and
generating an organic material vapor by an evaporation source, wherein the organic material vapor contacts the first surface to form an organic material block on each of the deposition regions by the organic material vapor, and the organic material vapor does not form the organic material block on the non-deposition regions, wherein an edge of a side of the organic material block protrudes from a boundary between the deposition regions and the non-deposition regions;
wherein the manufacturing method further comprises an aligning step to adjust positions of the substrate and the mask, so that the blocking regions are disposed corresponding to the deposition regions, and the hollow regions are disposed corresponding to the non-deposition regions.

US Pat. No. 10,923,685

DISPLAY AND METHOD OF FABRICATING THE DISPLAY

BOE TECHNOLOGY GROUP CO.,...

1. A display comprising:an encapsulation sidewall;
at least one isolation column adjacent to the encapsulation sidewall; and
a processing module coupled with the at least one isolation column, configured to apply a voltage signal to the at least one isolation column according to a height of the encapsulation sidewall, such that the at least one isolation column deforms, wherein:
a first metal layer is arranged on a bottom of the at least one isolation column, a second metal layer is arranged at a top thereof, and the first metal layer and the second metal layer are respectively connected with the processing module, so as to form a loop comprising the first metal layer, the at least one isolation column, the second metal layer and the processing module; and
a pixel definition layer is arranged below the first metal layer, a metal wire is arranged in a via of the pixel definition layer, and the metal wire is used for connecting the first metal layer and the processing module.

US Pat. No. 10,923,684

ORGANIC LIGHT-EMITTING DISPLAY DEVICE INCLUDING MICROLENSES AND METHOD OF FABRICATING THE SAME

LG DISPLAY CO., LTD., Se...

1. An organic light-emitting display device comprising:a substrate comprising a plurality of subpixels;
a protective layer disposed on the substrate;
an overcoat layer disposed on the protection layer and disposed in a plurality of light-emitting areas of the plurality of subpixels;
a first electrode disposed on the overcoat layer in the plurality of light-emitting areas such that the overcoat layer is disposed between the substrate and the first electrode; and
a plurality of organic electroluminescent devices disposed on the first electrode,
wherein the overcoat layer comprises a plurality of microlenses having a plurality of concave portions and a plurality of connecting portions, each of the plurality of connecting portions connecting two adjacent concave portions,
wherein the plurality of microlenses comprise a plurality of first microlenses and a plurality of second microlenses positioned in at least one subpixel of the plurality of subpixels,
wherein the plurality of second microlenses are different from the plurality of first microlenses,
wherein the plurality of first microlenses and the plurality of second microlenses are formed on an upper surface of the overcoat layer,
wherein each of the plurality of concave portions of the first microlenses has a diameter D1 in a horizontal plane and each of the plurality of concave portions of the second microleneses has a diameter D2 in the horizontal plane, and the diameter D1 is greater than the diameter D2,
wherein the plurality of first microlenses are only disposed in a first area of the at least one subpixel of the plurality of subpixels and the plurality of second microlenses are only disposed in a second area of the at least one subpixel of the plurality of subpixels,
wherein, between the center of two adjacent concave portions in a plan view, a width of each of the plurality of connecting portions connecting two adjacent concave portions of the second microlenses is greater than a width of each of the plurality of the connecting portions connecting two adjacent concave portions of the first microlenses,
wherein the first area and the second area are divided from each other in the subpixel,
wherein a first full width at half maximum of each of the plurality of connecting portions connecting two adjacent concave portions of the first microlenses is smaller than a second full width at half maximum of each of the plurality of connecting portions connecting two adjacent concave portions of the second microlenses, and
wherein, between the center of two adjacent concave portions in a plan view, the first full width at half maximum and the second full width at half maximum is a length of the connecting portion at half of the maximum height of a length from a bottom of the concave portions to a top of the connecting portions of the first microlenses and the second microlenses, respectively.

US Pat. No. 10,923,683

SUBSTRATE, METHOD FOR MANUFACTURING THE SAME, AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

9. A method for manufacturing a color filter substrate, the method comprising:forming a light scattering layer on a transparent supporting base, such that a projected region of the light scattering layer on the transparent supporting base is located in a light transmission formation region of the transparent supporting base; and
forming a light scattering structure comprising a diffuse reflection surface by using ion beams or electron beams to bombard a surface of the light scattering layer away from the transparent supporting base or by using a cleaning solution to clean soluble substance contained in the surface of the light scattering layer away from the transparent supporting base, such that light emitted by pixels corresponding to the color filter substrate to break a total reflection chain of light is scattered by the light scattering structure,
wherein forming a light scattering layer comprises forming a color filter layer,
wherein forming a light scattering structure comprises forming a diffuse reflection surface located on a surface of the color filter layer away from the transparent supporting base, and
wherein forming the diffuse reflection surface comprises forming a concave-convex structure.

US Pat. No. 10,923,681

PACKAGING METHOD OF OLED DISPLAY DEVICE USING SACRIFICIAL LAYER IN BONDING REGION

HEFEI XINSHENG OPTOELECTR...

1. A packaging method of OLED display device, comprising:providing a substrate comprising a package region and a bonding region around the package region, the bonding region being provided with a bonding electrode lead;
forming a sacrificial layer on the bonding electrode lead;
forming an OLED display device in the package region;
forming a packaging film which covers the package region and the bonding region; and
removing the sacrificial layer to separate the sacrificial layer and a part of the packaging film positioned on the sacrificial layer from the substrate;
wherein, after forming the packaging film which covers the package region and the bonding region and before removing the sacrificial layer, the packaging method further comprises:
forming an adhering layer on a part of the packaging film positioned in the package region; and
covering the adhering layer with a packaging cover plate.

US Pat. No. 10,923,680

MULTIFUNCTIONAL COMPOSITE PANELS AND METHODS FOR THE SAME

THE BOEING COMPANY, Chic...

1. A method for fabricating a multifunctional composite panel, the method comprising:forming a plurality of structural layers directly on a mandrel, wherein forming the plurality of structural layers on the mandrel comprises forming a plurality of alternating layers on the mandrel, wherein each of the plurality of alternating layers comprises a first layer and a second layer, and wherein forming the plurality of alternating layers comprises:
forming a first layer of each of the plurality of alternating layers from one or more polymers; and
forming a second layer of each of the plurality of alternating layers directly adjacent the first layer of each of the plurality of alternating layers, wherein the second layer of each of the plurality of alternating layers is formed from one or more of aluminum oxide (Al2O3), graphene, silicon oxide, or combinations thereof;
forming a plurality of photovoltaic layers adjacent the plurality of structural layers, wherein the multifunctional composite panel has a thickness of from about 1 mm to about 30 mm.

US Pat. No. 10,923,677

FILM STRUCTURE, DISPLAY DEVICE AND METHOD FOR FABRICATING THE FILM STRUCTURE

HEFEI XINSHENG OPTOELECTR...

1. A film structure comprising:a first organic layer disposed on the substrate, wherein the first organic layer is of a single layer structure, and wherein the first organic layer is a functional layer in a functional structure on the substrate;
a first additional layer disposed on the first organic layer, wherein the first additional layer comprises a first inorganic layer, wherein the first organic layer has a sloped edge, wherein a climbing angle between the sloped edge and the substrate is less than a first breakable angle, and wherein the first breakable angle is an angle at which the first additional layer on the sloped edge of the first organic layer cracks or is about to crack; and
at least one stack consisting of a second organic layer and a second inorganic layer on the first inorganic layer, wherein a climbing angle between the second organic layer and the substrate is less than a second breakable angle, and wherein the second breakable angle is an angle at which the second inorganic layer on the second organic layer cracks or is about to crack.

US Pat. No. 10,923,676

ENCAPSULATING STRUCTURE OF ORGANIC LIGHT EMITTING DIODE DISPLAY PANEL HAVING CONCAVE-CONVEX STRUCTURE IN ENCAPSULATING PORTION

HEFEI BOE OPTOELECTRONICS...

1. An encapsulating structure of an organic light emitting diode display panel, comprising a display substrate and a glass cover plate opposite to each other, and an encapsulating portion disposed between a non-display area of the display substrate and a portion of the glass cover plate which is corresponding to the non-display area, whereinthe display substrate comprises organic light emitting diode elements, the organic light emitting diode elements are located in a sealed chamber surrounded by the display substrate, the glass cover plate, and the encapsulating portion;
the encapsulating portion comprises:
a first concavo-convex structure disposed on a surface of the display substrate which faces the glass cover plate;
a second concavo-convex structure disposed on a surface of the glass cover plate which faces the display substrate;
an encapsulant material disposed between the first concavo-convex structure and the second concavo-convex structure;
a first dense layer disposed between the first concavo-convex structure and the encapsulant material; and
a second dense layer disposed between the second concavo-convex structure and the encapsulant material;
wherein the first concavo-convex structure, the encapsulant material and the second concavo-convex structure are disposed in sequence in a direction perpendicular to a plate surface of the display substrate.

US Pat. No. 10,923,674

COLOR FILM SUBSTRATE AND PREPARATION METHOD THEREFOR, AND DISPLAY PANEL AND DISPLAY DEVICE

BOE Technology Group Co.,...

1. A color film substrate in electroluminescent diode, comprising:a base substrate;
an auxiliary cathode layer arranged on the base substrate and configured to couple to a cathode of the electroluminescent diode;
a black matrix layer arranged on the auxiliary cathode layer, and the black matrix layer comprising a plurality of first via holes penetrating through the black matrix layer in a direction perpendicular to the base substrate to expose the auxiliary cathode layer;
a flat layer arranged on the black matrix layer, and the flat layer comprising a plurality of second via holes corresponding to the first via holes one by one to expose the auxiliary cathode layer;
a plurality of spacers arranged at intervals on the flat layer, wherein the spacers are at positions other than the first via holes in the black matrix layer; and
a transparent conductive layer arranged on the spacers, wherein the transparent conductive layer is connected with the auxiliary cathode layer through the first via holes and the second via holes.

US Pat. No. 10,923,673

ORGANIC LIGHT EMITTING PANEL, MANUFACTURING METHOD THEREOF, AND ORGANIC LIGHT EMITTING DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. An organic light emitting panel, comprising: an organic layer, a first electrode disposed on one side of the organic layer, and a second electrode disposed on the other side of the organic layer,wherein the second electrode comprises a buffer electrode layer and a conductive electrode layer sequentially stacked on the organic layer, and the buffer electrode layer is disposed between the conductive electrode layer and the organic layer,
a thickness of the buffer electrode layer is smaller than a thickness of the conductive electrode layer,
the buffer electrode layer has a thickness of 20 nm to 100 nm, and the conductive electrode layer has a thickness of 100 nm to 300 nm,
the buffer electrode layer and the conductive electrode layer have the same type of element,
the buffer electrode layer and the conductive electrode layer are each made of transparent conductive oxide,
the first electrode is formed by a compound composed of indium, tin and oxygen (ITO), and the second electrode is formed by a compound composed of indium, zinc and oxygen (IZO),
an oxygen ratio of the buffer electrode layer is greater than an oxygen ratio of the conductive electrode layer,
a value of a block resistance of the buffer electrode layer is greater than a value of a block resistance of the conductive electrode layer,
the buffer electrode layer has a resistivity greater than 0.1 ohm*cm, and
the value of a block resistance of the buffer electrode layer is 0.9 G ?/? to 1.1 G ?/?, and the value of a block resistance of the conductive electrode layer is 14 ?/? to 16 ?/?.

US Pat. No. 10,923,671

NANOFILM, THIN FILM TRANSISTOR, AND MANUFACTURE METHODS THEREOF

BOE TECHNOLOGY GROUP CO.,...

1. A method for manufacturing a nanofilm, comprising:preparing a dispersion in which at least two kinds of nanomaterials are dispersed;
preparing an initial film on a base substrate by using the dispersion, said initial film comprising the at least two kinds of nanomaterials; and
forming a plurality of regions in the initial film, with one kind of the nanomaterials remaining in one region, to form a nanofilm, wherein nanomaterials of adjacent regions are different from each other,
wherein the plurality of regions are in the same layer and their orthographic projections on the base substrate are not overlapped each other, and
wherein the dispersion comprises a silicon nanowire material and a carbon nanotube material, and
said forming a plurality of regions in the initial film, with one kind of the nanomaterials remaining in one region comprises etching the initial film with different mask plates sequentially, such that one kind of the nanomaterials remains in one region, and
said etching the initial film with different mask plates sequentially such that one kind of the nanomaterials remains in one region comprises:
etching the initial film via a first mask plate by using an oxygen plasma etching process, such that the silicon nanowire material remains in a first region; and
etching the etched initial film via a second mask plate by using a sulfur hexafluoride dry etching process, such that the carbon nanotube material remains in a second region,
wherein the first region is adjacent to the second region.

US Pat. No. 10,923,670

METHOD OF FABRICATING RIGID ISLAND PATTERN ON STRETCHABLE LAYER WITH LOW YOUNG'S MODULUS AND STRETCHABLE ELECTRONIC DEVICE PLATFORM USING THE SAME

KOREA ADVANCED INSTITUTE ...

1. A stretchable electronic device platform comprising:a stretchable substrate having a first Young's modulus;
a stretchable layer disposed on the stretchable substrate, wherein the stretchable layer has a second Young's modulus lower than the first Young's modulus; and
a rigid fixed layer having a third Young's modulus higher than the first Young's modulus and including a rigid island and an interconnector,
wherein one entire surface of the rigid fixed layer contacts with the stretchable layer, and
wherein the rigid fixed layer is fully supported by the stretchable layer such that strain and stress applied to the rigid fixed layer are reduced when the stretchable electronic device platform is stretched.

US Pat. No. 10,923,668

ELECTROLUMINESCENT DEVICE, AND DISPLAY DEVICE COMPRISING THEREOF

SAMSUNG ELECTRONICS CO., ...

1. An electroluminescent device, comprisinga first electrode;
a hole transport layer disposed on the first electrode;
an emission layer disposed on the hole transport layer and comprising light emitting particles;
an electron transport layer disposed on the emission layer and comprising nanoparticles having electron transport capability; and
a second electrode disposed on the electron transport layer,
wherein at least a portion of the nanoparticles having electron transport capability comprises
an inorganic oxide core represented by Chemical Formula 1, and
a metal-organic compound chemically bound to the surface of the inorganic oxide core:
MxOy  Chemical Formula 1
wherein, in Chemical Formula 1,
M is Zn, Ti, Zr, Sn, W, Ta, Mg, Al, In, Ga, or a combination thereof, and
x and y are independently an integer ranging from 1 to 5.

US Pat. No. 10,923,666

HOLE TRANSPORTING MATERIAL, MANUFACTURING METHOD THEREOF, AND ORGANIC PHOTODIODE THEREOF

RAYNERGY TEK INC., Hsinc...

1. A method of manufacturing a hole transporting material, comprising the steps as following:providing a precursor solution of a transition metal oxide;
providing a conductive polymer solution;
adding the precursor solution of the transition metal oxide into the conductive polymer; and
stirring the mixture of the precursor solution of the transition metal oxide and the conductive polymer solution to cause a sol-gel reaction, and form a hole transporting material which comprises a conductive polymer coil and a plurality of transition metal oxide particles.

US Pat. No. 10,923,665

MATERIALS FOR ORGANIC ELECTROLUMINESCENT DEVICES

Merck Patent GmbH, Darms...

1. A compound of formula (3)
wherein X is the same or different at each instance and is CR or N;
Ar is an aromatic or heteroaromatic ring system which has 5 to 40 aromatic ring atoms and may be substituted by one or more R radicals, or is a group of the formula —Ar4—N(Ar2)(Ar3) where Ar2, Ar3 and Ar4 are the same or different at each instance and are an aromatic or heteroaromatic ring system which has 5 to 24 aromatic ring atoms and may be substituted in each case by one or more R1 radicals;
R is the same or different at each instance and is H, D, F, Cl, Br, I, N(Ar?)2, N(R1)2, CN, NO2, OR1, SR1, COOR1, C(?O)N(R1)2, Si(R1)3, B(OR1)2, C(?O)R1, P(?O)(R1)2, S(?O)R1, S(?O)2R1, OSO2R1, a straight-chain alkyl group having 1 to 20 carbon atoms or an alkenyl or alkynyl group having 2 to 20 carbon atoms or a branched or cyclic alkyl group having 3 to 20 carbon atoms, where the alkyl, alkenyl or alkynyl group may in each case be substituted by one or more R1 radicals, where one or more nonadjacent CH2 groups may be replaced by Si(R1)2, C?O, NR1, O, S or CONR1, or an aromatic or heteroaromatic ring system which has 5 to 60 aromatic ring atoms, preferably 5 to 40 aromatic ring atoms, and may be substituted in each case by one or more R1 radicals; at the same time, two R radicals together may also form a ring system, or is a group of the formula —Ar4—N(Ar2)(Ar3) where Ar2, Ar3 and Ar4 are the same or different at each instance and are an aromatic or heteroaromatic ring system which has 5 to 24 aromatic ring atoms and may be substituted in each case by one or more R1 radicals;
Ar? is the same or different at each instance and is an aromatic or heteroaromatic ring system which has 5 to 40 aromatic ring atoms and may be substituted by one or more R1 radicals or is a group of the formula —Ar4—N(Ar2)(Ar3) where Ar2, Ar3 and Ar4 are the same or different at each instance and are an aromatic or heteroaromatic ring system which has 5 to 24 aromatic ring atoms and may be substituted in each case by one or more R1 radicals;
R1 is the same or different at each instance and is H, D, F, Cl, Br, I, N(R2)2, CN, NO2, OR2, SR2, Si(R2)3, B(OR2)2, C(?O)R2, P(?O)(R2)2, S(?O)R2, S(?O)2R2, OSO2R2, a straight-chain alkyl group having 1 to 20 carbon atoms or an alkenyl or alkynyl group having 2 to 20 carbon atoms or a branched or cyclic alkyl group having 3 to 20 carbon atoms, where the alkyl, alkenyl or alkynyl group may in each case be substituted by one or more R2 radicals, where one or more nonadjacent CH2 groups may be replaced by Si(R2)2, C?O, NR2, O, S or CONR2, or an aromatic or heteroaromatic ring system which has 5 to 40 aromatic ring atoms and may be substituted in each case by one or more R2 radicals; at the same time, two or more R1 radicals together may form a ring system;
R2 is the same or different at each instance and is H, D, F or an aliphatic, aromatic or heteroaromatic organic radical, especially a hydrocarbyl radical, having 1 to 20 carbon atoms, in which one or more hydrogen atoms may also be replaced by F;
where the following compounds are excluded from the invention:

US Pat. No. 10,923,664

COMPOSITION, THIN FILM, AND ORGANIC LIGHT EMITTING DEVICE INCLUDING COMPOSITION AND THIN FILM

SAMSUNG ELECTRONICS CO., ...

17. An organic light-emitting device comprising:a first electrode;
a second electrode; and
an organic layer disposed between the first electrode and the second electrode,
wherein the organic layer comprises the composition claim 1.

US Pat. No. 10,923,663

MONOAMINE COMPOUND AND ORGANIC ELECTROLUMINESCENCE DEVICE INCLUDING THE SAME

Samsung Display Co., Ltd....

16. An organic electroluminescence device, comprising:a first electrode;
a hole transport region provided on the first electrode;
an emission layer provided on the hole transport region;
an electron transport region provided on the emission layer; and
a second electrode provided on the electron transport region,
wherein at least one of the hole transport region, the emission region, and the electron transport region includes a monoamine compound represented by the following Formula 1:

where L1 is a substituted or unsubstituted arylene group having 6 to 30 carbon atoms for forming a ring, or a substituted or unsubstituted heteroarylene group having 2 to 30 carbon atoms for forming a ring,
n is 1 or 2,
L2 and L3 are each independently a direct linkage, a substituted or unsubstituted arylene group having 6 to 30 carbon atoms for forming a ring, or a substituted or unsubstituted heteroarylene group having 2 to 30 carbon atoms for forming a ring,
R1 is a substituted or unsubstituted alkyl group having 1 to 10 carbon atoms, a substituted or unsubstituted aryl group having 6 to 30 carbon atoms for forming a ring, a substituted or unsubstituted heteroaryl group having 2 to 30 carbon atoms for forming a ring, or a substituted or unsubstituted aryl silyl group,
when R1 is substituted, the substituent is a deuterium atom, a cyano group, a substituted or unsubstituted alkyl group having 1 to 10 carbon atoms, or a substituted or unsubstituted aryl group having 6 to 30 carbon atoms for forming a ring,
Ar1 and Ar2 are each independently a substituted or unsubstituted aryl group having 6 to 30 carbon atoms for forming a ring, or a substituted or unsubstituted dibenzofuranyl group, a substituted or unsubstituted dibenzothiophenyl group, a substituted or unsubstituted benzonaphthofuranyl group, or a substituted or unsubstituted benzonaphthothiophenyl group, and
wherein when at least one of L2, L3, Ar1 and Ar2 is substituted with a heterocycle, the heterocycle does not include N as a heteroatom.

US Pat. No. 10,923,661

ORGANIC LIGHT EMITTING DIODE AND FABRICATING METHOD THEREOF

Shenzhen China Star Optoe...

1. An organic light emitting diode, comprising:a thin film transistor substrate;
a pixel electrode layer disposed on the thin film transistor substrate;
a pixel defining layer disposed on the thin film transistor substrate, the pixel defining layer comprising banks and a pixel defining groove surrounded by the banks, the pixel defining groove disposed corresponding to the pixel electrode layer, and at least a portion of the pixel electrode layer exposed in the pixel defining groove; and
a pixel layer disposed on the pixel electrode layer in the pixel defining groove,
wherein the pixel layer is formed by spraying pixel ink on the pixel electrode layer in the pixel defining groove by inkjet printing, wherein the pixel ink is dried to form a film, and wherein the pixel ink contains a hydrophobic solvent and is hydrophobic,
wherein a surface of the pixel electrode layer is hydrophobic.

US Pat. No. 10,923,660

LIQUID FORMULATION AND A METHOD FOR MAKING ELECTRONIC DEVICES BY SOLUTION PROCESS

Beijing Summer Sprout Tec...

1. A method of making an electronic device including an anode and a cathode, comprising at least one of the following steps:i) forming a liquid composition comprising a liquid organic solvent and a solute dissolved or dispersed in the liquid organic solvent and comprising a hole injection material, and then forming a hole injection layer, between the anode and the cathode, by deposition or printing;
ii) forming a liquid composition comprising the liquid organic solvent and a solute dissolved or dispersed in the liquid organic solvent and comprising a hole transporting material, and then forming a hole transporting layer, between the anode and the cathode, by deposition or printing;
iii) forming a liquid composition comprising the liquid organic solvent and a solute dissolved or dispersed in the liquid organic solvent and comprising a host and an emitter, and then forming an emissive layer, between the anode and the cathode, by deposition or printing; and
iv) forming a liquid composition comprising the liquid organic solvent and a solute dissolved or dispersed in the liquid organic solvent and comprising an electron transporting material, and then forming an electron transport layer, between the anode and the cathode, by deposition or printing;
wherein the liquid organic solvent is partially or fully deuterated.

US Pat. No. 10,923,659

WAFERS FOR USE IN ALIGNING NANOTUBES AND METHODS OF MAKING AND USING THE SAME

Taiwan Semiconductor Manu...

1. A method, comprising:providing a first wafer comprising:
a semiconductor substrate;
a first insulating layer of a first material on the semiconductor substrate;
a second insulating layer of a second material, which is different than the first material, on the first insulating layer;
a first hardmask on second insulating layer;
providing a patterned first hardmask, the patterned first hardmask including openings, the openings exposing a portion of the second insulating layer;
etching the exposed portion of the second insulating layer;
removing the patterned first hardmask; and
depositing the first material on exposed portions of the first insulating layer to provide a second wafer comprising:
a plurality of first areas of the second material, each first area of the plurality of first areas having four edges and a first diagonal between a first vertex and a second vertex, the first diagonal extending in a first direction; and
a plurality of second areas of the first material, the four edges of each first area of the plurality of first areas abutting at least one second area of the plurality of second areas.

US Pat. No. 10,923,657

METHODS OF FORMING MEMORY CELLS AND MEMORY DEVICES

Micron Technology, Inc., ...

1. A method of forming a memory cell, the method comprising:forming a first electrode comprising a metal, a metal silicide, or polysilicon;
forming a threshold switching material comprising amorphous silicon doped with p-type dopants or n-type dopants proximate the first electrode;
forming a first dielectric material between the threshold switching material and the first electrode;
forming a second electrode adjacent to the threshold switching material; and
forming a memory material adjacent to the second electrode.

US Pat. No. 10,923,655

VARIABLE RESISTANCE MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME

SAMSUNG ELECTRONICS CO., ...

1. A variable resistance memory device, comprising:a first conductive line extending in a first direction;
a second conductive line extending in a second direction intersecting the first direction;
a first memory cell at an intersection between the first conductive line and the second conductive line;
a first electrode between the first conductive line and the first memory cell; and
a second electrode between the second conductive line and the first memory cell,
wherein the first memory cell comprises a first switching pattern, an first intermediate electrode, a first variable resistance pattern, and a first resistivity control pattern that are connected in series between the first conductive line and the second conductive line, and
wherein a resistivity of the first resistivity control pattern is greater than a resistivity of the first intermediate electrode.

US Pat. No. 10,923,654

VARIABLE RESISTANCE MEMORY DEVICE

SAMSUNG ELECTRONICS CO., ...

1. A variable resistance memory device, comprising:a word line extending in a first direction;
a bit line on the word line and extending in a second direction intersecting the first direction;
a switching pattern between the bit line and the word line;
a phase change pattern between the switching pattern and the word line; and
a bottom electrode between the phase change pattern and the word line,
wherein the phase change pattern has a bottom area greater than a top area of the bottom electrode, a thickness of the phase change pattern being greater than a thickness of the bottom electrode;
wherein the bottom and top areas are defined in the first and second directions, and the thicknesses are defined in a third direction intersecting the first and second directions,
wherein the switching pattern has a same bottom area as the bottom area of the phase change pattern, and has a thickness of about 10 nm to about 15 nm, and
wherein a threshold voltage of the switching pattern is about 3 V to about 4 V.

US Pat. No. 10,923,651

SPIN ORBIT MATERIALS FOR EFFICIENT SPIN CURRENT GENERATION

National University of Si...

1. A spin-orbit torque (SOT) device, the SOT device comprising:a magnetic layer; and
a non-magnetic layer (NM) layer adjacent to the magnetic layer that is configured to generate spin current that diffuses into the magnetic layer, the NM layer including
a complementary metal oxide semiconductor (CMOS)-compatible composite alloy that includes nonmagnetic impurities added to a CMOS-compatible metal host and is configured to generate the spin current via an extrinsic spin Hall effect (SHE) involving electron scattering on centers of the nonmagnetic impurities,
a topological insulator (TI) configured to generate the spin current via topological protected spin-momentum-locked surface states (TSS), or
a TT/non-magnetic metal interface configured to generate the spin current via Rashba effect.

US Pat. No. 10,923,650

MAGNETO-RESISTIVE CHIP PACKAGE INCLUDING SHIELDING STRUCTURE

SAMSUNG ELECTRONICS CO., ...

1. A magneto-resistive chip package comprising:a circuit board;
a shielding body comprising a shielding base part positioned on the circuit board and a shielding intermediate part extending from one side of the shielding base part;
a magneto-resistive chip positioned on the shielding base part;
an internal connection part electrically connecting the magneto-resistive chip to the circuit board;
an encapsulation part encapsulating the magneto-resistive chip on the circuit board; and
a shielding cover positioned on the shielding intermediate part and on the encapsulation part,
wherein the magneto-resistive chip is positioned on an inner portion of the shielding base part,
wherein the shielding cover is disposed over substantially the entire area of the circuit board by further extending beyond the shielding intermediate part of the shielding body,
wherein the shielding intermediate part comprises a plurality of columns spaced apart from each other on one side of the shielding base part,
wherein at least one of the plurality of columns is provided at a location different from a corner of the shielding base part, and
wherein each of the plurality of columns has a rectangular cross-section in a plan view integrally formed with the shielding base part and each of the plurality of columns extends perpendicularly from an upper surface of the shielding base part.

US Pat. No. 10,923,649

SPIN CURRENT MAGNETIZATION ROTATION MAGNETORESISTANCE EFFECT ELEMENT, AND MAGNETIC MEMORY

TDK CORPORATION, Tokyo (...

1. A spin current magnetization rotation magnetoresistance effect element, comprising:a spin-orbit torque wiring layer;
a first ferromagnetic layer;
an antiferromagnetic coupling layer;
a second ferromagnetic layer;
a nonmagnetic layer; and
a magnetization reference layer, in an order,
wherein a magnitude of the product of the saturation magnetization of the first ferromagnetic layer and the film thickness of the first ferromagnetic layer is larger than a magnitude of the product of the saturation magnetization of the second ferromagnetic layer and the film thickness of the second ferromagnetic layer, and
wherein the first ferromagnetic layer has a lower spin resistance than the second ferromagnetic layer.

US Pat. No. 10,923,646

SUPERCONDUCTING SWITCH HAVING A PERSISTENT AND A NON-PERSISTENT STATE

Microsoft Technology Lice...

8. A superconducting switch comprising:a first superconducting layer;
a first magnetic layer having a first fixed magnetization state;
a second magnetic layer capable of being at least in a first magnetization state or a second magnetization state different from the first magnetization state;
a third magnetic layer having a second fixed magnetization state;
a conductor inductively coupled to the second magnetic layer such that a flow of a current through the conductor results in an application of a magnetic field to the second magnetic layer; and
a second superconducting layer, wherein the superconducting switch is capable of being in a first state or a second state, and wherein the second state corresponds to an opposite state of the first state, and wherein the superconducting switch is configured such that the application of the magnetic field changes a magnetization of the second magnetic layer from the first magnetization state to the second magnetization state placing the superconducting switch in the second state and a removal of the magnetic field automatically returns the switch from the second state to the first state.

US Pat. No. 10,923,644

EMBEDDED ELECTRODE SUBSTRATE FOR TRANSPARENT LIGHT EMITTING DEVICE DISPLAY AND METHOD FOR MANUFACTURING THEREOF

LG CHEM, LTD., Seoul (KR...

13. A method for manufacturing an embedded electrode substrate for a transparent light emitting device display, the method comprising:forming a structure comprising a transparent substrate, an adhesive layer provided on the transparent substrate, and a metal foil provided on the adhesive layer;
forming a wiring electrode portion comprising a first metal foil pattern and a light emitting device mounted portion comprising a second metal foil pattern by patterning the metal foil;
forming a blackening layer on both upper surfaces and side surfaces of the first and second metal foil patterns;
embedding the first and second metal foil patterns into the adhesive layer by heat-treating a structure comprising the blackening layer at a temperature of 70° C. to 100° C. and exposing the upper surface of the second metal foil pattern; and
removing the blackening layer provided on the upper surface of the second metal foil pattern.

US Pat. No. 10,923,641

LIGHT-EMITTING DEVICE AND MANUFACTURING METHOD THEREOF

EPISTAR CORPORATION, Hsi...

1. A method of manufacturing a light-emitting device, comprising:providing a first substrate;
forming a first adhesive unit on the first substrate;
forming a first light-emitting element on the first substrate;
providing a second substrate;
forming a second light-emitting element on the second substrate;
forming a third light-emitting element on the second substrate; and
connecting the second light-emitting element to the first adhesive unit,
wherein the third light-emitting element is overlapped with the first light-emitting element during connecting the second light-emitting element to the first adhesive unit.

US Pat. No. 10,923,640

OPTOELECTRONIC COMPONENT AND METHOD OF PRODUCING SAME

OSRAM OLED GmbH, Regensb...

1. An optoelectronic component comprising a carrier,a first optoelectronic semiconductor chip arranged at a top side of the carrier,
a second optoelectronic semiconductor chip arranged at the top side of the carrier, and
a housing material arranged above the top side of the carrier,
wherein a cavity is configured in the housing material,
a top side of the first optoelectronic semiconductor chip is arranged in the cavity and a top side of the second optoelectronic semiconductor chip is arranged in a further cavity of the housing material, the cavity and the further cavity being separated from one another,
the first optoelectronic semiconductor chip has a first electrical connection pad arranged at the top side of the first optoelectronic semiconductor chip, and electrically conductively connects by a bond wire to a first contact pad arranged at the top side of the carrier,
a first section of the bond wire is arranged in the cavity and a second section of the bond wire is embedded in the housing material, and
the first electrical connection pad of the first optoelectronic semiconductor chip and an electrical connection pad of the second optoelectronic semiconductor chip arranged at the top side of the second optoelectronic semiconductor chip are electrically conductively connected by the bond wire.

US Pat. No. 10,923,639

METHOD FOR PRODUCING AN OPTICAL SEMICONDUCTOR DEVICE

EPISTAR CORPORATION, Hsi...

1. A method of producing an optical semiconductor device, comprising:providing a plurality of optical semiconductor elements which are arranged on a sheet, each optical semiconductor element having a light emitting surface and peripheral side surfaces, wherein the plurality of optical semiconductor elements are spaced apart from each other;
forming a phosphor layer onto the plurality of optical semiconductor elements in a configuration of covering the light emitting surface and the peripheral side surfaces;
disposing a fixing sheet to the optical semiconductor elements and the phosphor layer;
peeling the sheet from the phosphor layer and the optical semiconductor elements;
separating the plurality of optical semiconductor elements from each other by using a dicing saw having an inner side and an outer side, in which its blade thickness gradually becomes narrow in a direction from the inner side toward the outer side so that to form a plurality of gaps inside the phosphor layer; and
pressing a light reflective layer into the gaps.

US Pat. No. 10,923,638

ELECTRONIC DEVICE COMPRISING AN OPTICAL CHIP AND METHOD OF FABRICATION

STMicroelectronics (Greno...

1. An electronic device, comprising:a carrier substrate having a front mounting face;
an electronic chip mounted on the front mounting face of the carrier substrate, said electronic chip having an optical component at its front face;
an encapsulation cover which bounds a chamber in which the electronic chip is situated and which has a front opening situated in front of the optical component of the electronic chip, said encapsulation cover mounted on top of the front face of the carrier substrate;
an optical element configured to allow light to pass, said optical element including a central region designed to deviate light and a positioning pattern;
wherein the optical element is mounted on the encapsulation cover over the front opening of the encapsulation cover at a position where the central region deviates light passing through the front opening of the encapsulation cover and wherein the positioning pattern is located between the central region and an edge of the front opening of the encapsulation cover; and
an additional mask mounted on the encapsulation cover, which extends in front of the optical element and which has a local opening situated in front of the optical component of the electronic chip.

US Pat. No. 10,923,636

WAVELENGTH CONVERTING PARTICLE, METHOD FOR MANUFACTURING WAVELENGTH CONVERTING PARTICLE, AND LIGHT-EMITTING DIODE CONTAINING WAVELENGTH CONVERTING PARTICLE

POSTECH ACADEMY-INDUSTRY ...

1. A perovskite wavelength-converting layer, the layer comprising:a wavelength-converting particle comprising one or more nanocrystals of a perovskite material having a nanocrystal size greater than 10 nm and smaller than 300 nm that is configured to absorb light having a first wavelength and to emit light having a second wavelength,
wherein the second wavelength of the light emitted from the perovskite material does not change substantially over the nanocrystal size thereof unlike a quantum dot that substantially changes a wavelength of light emitted therefrom over a nanocrystal size thereof; and
wherein the perovskite material has a crystal structure of A2BX4, ABX4, ABX3, or An?1BnX3n+1 (n is an integer ranging from 2 to 6); and
wherein A is organic ammonium or organic cation, B is a metal, and X is a halogen; and
a plurality of ligands attached to the one or more nanocrystals and configured to make the one or more nanocrystals more dispersible than without such ligands in a medium;
a dispersion medium configured to disperse the wavelength-converting nanoparticle; and
wherein the wavelength-converting particle is dispersed in the dispersion medium.

US Pat. No. 10,923,635

PHOSPHOR DEPOSITION SYSTEM FOR LEDS

Lumileds LLC, San Jose, ...

1. A light-emitting device comprising:a light-emitting diode (LED) die comprising:
a growth substrate;
an array of semiconductor diode junctions comprising a first plurality of semiconductor diode junctions disposed on a first side of the growth substrate; and a second plurality of semiconductor diode junctions disposed on the first side of the growth substrate;
a first group of series connected transparent conductors disposed on a second side of the growth substrate opposite from the first side of the growth substrate and opposite from corresponding ones of the first plurality of semiconductor diode junctions;
a second group of series connected transparent conductors disposed on the second side of the growth substrate and disposed opposite from corresponding ones of the second plurality of semiconductor diode junctions; and
wavelength converters disposed on the transparent conductors, each wavelength converter located opposite from a corresponding different one of the semiconductor diode junctions, wavelength converters disposed opposite from the first plurality of semiconductor diode junctions differ in composition from wavelength converters disposed opposite from the second plurality of semiconductor diode junctions.

US Pat. No. 10,923,634

WAVELENGTH CONVERTER HAVING A POLYSILOXANE MATERIAL, METHOD OF MAKING, AND SOLID STATE LIGHTING DEVICE CONTAINING SAME

OSRAM Opto Semiconductors...

1. A method of making a wavelength converter comprising:(a) combining a luminescent material and inorganic nanoparticles with a liquid methoxy methyl polysiloxane precursor to form a liquid dispersion, the precursor having a methoxy content of 10 to 50 weight percent (wt %), the inorganic nanoparticles comprising at least 10 weight percent of the dispersion;
(b) applying the liquid dispersion to a non-stick surface;
(c) curing the liquid dispersion to form a filled polymer sheet; and
(d) cutting the sheet to form individual wavelength converters having a desired shape.

US Pat. No. 10,923,632

LIGHT EMITTING ELEMENT AND LIGHT EMITTING DEVICE

NICHIA CORPORATION, Anan...

1. A light emitting element, comprising:a semiconductor structure comprising:
a first semiconductor layer of a first conductivity type, the first semiconductor layer comprising a first region and a second region located inward of the first region,
an active layer located on the second region, and
a second semiconductor layer of a second conductivity type, the second semiconductor layer being located on the active layer,
wherein the first region of the first semiconductor layer comprises:
an outer peripheral region located along an outer perimeter of the second region in a plan view, and
a plurality of extending portions, each extending into the second region from the outer peripheral region;
a first electrode covering a top surface of the second semiconductor layer;
a first insulating layer covering the semiconductor structure and the first electrode, wherein the extending portions of the first region and a portion of the first electrode located above part of the second region are exposed from the first insulating layer;
a first internal electrode located above the first insulating layer and electrically connected with the first semiconductor layer;
a second internal electrode located above the first insulating layer and electrically connected with the first electrode;
a second insulating layer covering the first internal electrode and the second internal electrode, the second insulating layer comprising:
a first through-hole located above the first internal electrode, and
a second through-hole located above the second internal electrode;
a first external electrode electrically connected with the first internal electrode via the first through-hole and comprising a plurality of corner portions; and
a second external electrode electrically connected with the second internal electrode via the second through-hole and comprising a plurality of corner portions,
wherein, in a plan view, the plurality of extending portions of the first region are each located in an area on a top surface of the first semiconductor layer other than an area overlapping any of the plurality of corner portions of the first external electrode and other than an area overlapping any of the plurality of corner portions of the second external electrode.

US Pat. No. 10,923,629

RADIATION-EMITTING SEMICONDUCTOR BODY AND METHOD OF PRODUCING A SEMICONDUCTOR LAYER SEQUENCE

OSRAM OLED GmbH, Regensb...

1. A radiation-emitting semiconductor body comprising a semiconductor layer sequence comprising an active region that generates radiation, an n-conducting semiconductor layer and a p-conducting semiconductor layer, wherein the active region is arranged between the n-conducting semiconductor layer and the p-conducting semiconductor layer and the p-conducting semiconductor layer comprises a first doping region with a first dopant and a second doping region with a second dopant different from the first dopant, and the p-conducting semiconductor layer comprises a further doping region doped with the first dopant and has a thickness of at most 2 nm.

US Pat. No. 10,923,628

MICROMETER SCALE LIGHT EMITTING DIODE DISPLAYS ON PATTERNED TEMPLATES AND SUBSTRATES

Lumileds LLC, San Jose, ...

1. A micro-light emitting diode (uLED) comprising a plurality of epitaxial layers including an n-layer, an active layer, and a p-layer, the plurality of epitaxial layers forming a structure comprising:a first flat region, at a first height from an LED base, comprising a first portion of the n-layer, a first portion of the active layer, and a first portion of the p-layer;
a second flat region, at a second height from the LED base and parallel to the first flat region, comprising a second portion of the n-layer;
a sloped sidewall connecting the first flat region and the second flat region and comprising at least a third portion of the n-layer, a second portion of the active layer, and a second portion of the p-layer, the first portion of the p-layer of the first flat region being thicker than the second portion of the p-layer of the sloped sidewall;
a p-contact formed on the first portion of the p-layer; and
an n-contact formed on the second portion of the n-layer.

US Pat. No. 10,923,627

LIGHT EMITTING DIODES AND ASSOCIATED METHODS OF MANUFACTURING

Micron Technology, Inc., ...

1. A light emitting diode (LED) device, comprising: a substrate having a width defined by a first side edge and a second side edge opposite the first side edge, a backside, and a front side, wherein the front side is planar across the width of the substrate from the first side edge to the second side edge; a first semiconductor material carried by the substrate, the first semiconductor material having—a first major surface that is planar across the width of the substrate from the first side edge to the second side edge, a second major surface opposite the first major surface and farther from the substrate than the first major surface, indentations tapering inwardly from the second major surface toward the substrate to define non-planar areas having an irregular pattern of peaks and valleys; and an active region operably connected to the first semiconductor material via the second major surface, wherein the active region conforms to the indentations; wherein the non-planar areas are spaced apart by planar areas in an irregular pattern that extends from the first side edge to the second side edge.

US Pat. No. 10,923,626

LED SIDEWALL PROCESSING TO MITIGATE NON-RADIATIVE RECOMBINATION

1. A light emitting structure comprising:a body including:
a first cladding layer doped with a first dopant type;
a barrier layer; and
an active layer between the first cladding layer and the barrier layer;
a pillar structure that protrudes from a first surface of the body, wherein the pillar structure includes a second cladding layer doped with a second dopant type opposite the first dopant type;
a center vertical axis that extends through the body and pillar structure; and
a current confinement region dopant concentration of the second dopant type characterized by a vertical depth that extends from the first surface of the body and through the barrier layer, the active layer, and into the first cladding layer, while additionally encroaches from sidewalls of the body including the barrier layer, the active layer, and at least a portion of the first cladding layer toward the center vertical axis.

US Pat. No. 10,923,622

MICRO LIGHT-EMITTING DIODE (LED) ELEMENTS AND DISPLAY

Intel Corporation, Santa...

1. A red-emitting diode structure, comprising:a GaN nanowire above a substrate;
an InGaN shell layer on the GaN nanowire;
an InGaN active layer on the InGaN shell layer, wherein the InGaN active layer has a greater concentration of In than the InGaN shell layer; and
a cladding layer directly on the InGaN active layer, the cladding layer comprising p-type ZnO.

US Pat. No. 10,923,621

METHOD FOR REDUCTION OF INTERFACIAL STRESS ACCUMULATION BETWEEN DOUBLE SIDE COPPER-PLATED LAYERS AND ALUMINUM NITRIDE SUBSTRATE

National Chung-Shan Insti...

1. A method for the reduction of the interfacial stress accumulation between double side copper-plated layers and an aluminum nitride substrate, comprising:providing an aluminum nitride substrate;
coating an adhesion layer on the aluminum nitride substrate by sputtering, wherein the adhesion layer is one of a titanium alloy or a titanium/tungsten alloy;
coating a copper seed layer on the adhesion layer by sputtering;
plating a symmetrical structural copper buffer layer on the copper seed layer by electroplating;
plating a copper-plated layer on the symmetrical structural copper buffer layer by electroplating; and
forming a nickel-plated layer to cover the adhesion layer, the copper seed layer, the symmetric structural copper buffer layer and the copper-plated layer.

US Pat. No. 10,923,620

METHOD OF MANUFACTURING OF A GAN LIGHT EMITTING DIODE

1. A method for manufacturing a light-emitting diode, comprising the following steps in succession, while maintaining a substrate in a vapour-phase epitaxial growth chamber:epitaxial deposition, with an atmosphere having a first non-zero concentration of ammonia in the vapour-phase epitaxial growth chamber, of a first GaN alloy layer P-doped with magnesium;
epitaxial deposition, on the first GaN alloy layer, of a sacrificial GaN alloy layer in a second atmosphere in the vapour-phase epitaxial growth chamber that is not supplied with magnesium;
placing the second atmosphere inside the vapour-phase epitaxial growth chamber under conditions with a second concentration of ammonia that is at least equal to a third of the first non-zero concentration so as to remove the sacrificial GaN layer; and then
epitaxial deposition of a second N-type doped GaN alloy layer so as to form a tunnel junction with the first GaN alloy layer.

US Pat. No. 10,923,619

SEMICONDUCTOR HETEROSTRUCTURE WITH AT LEAST ONE STRESS CONTROL LAYER

Sensor Electronic Technol...

1. A semiconductor heterostructure, comprising:a substrate;
a plurality of semiconductor layers located on the substrate; and
at least one stress control layer located within the plurality of semiconductor layers, each of the at least one stress control layer inducing one of: a tensile stress or a compressive stress, in an adjacent semiconductor layer in the plurality of semiconductor layers, the induced stress changing a stress in the adjacent semiconductor layer by at least 10% as compared to a semiconductor heterostructure having no stress control layer, the change in stress of the adjacent semiconductor layer extending from a boundary with the stress control layer into an interior portion of the adjacent semiconductor layer that is at least twice a thickness of the stress control layer, wherein each at least one stress control layer includes a plurality of stress control regions, each stress control region separated from adjacent stress control regions by a predetermined spacing, each stress control region having a characteristic size that is approximately equivalent to one of: a square root of an inverse dislocation density in the adjacent semiconductor layer or a distance resulting in a critical strain within the adjacent semiconductor layer;
wherein some of the plurality of stress control regions in the at least one stress control layer extend into adjacent semiconductor layers of the plurality of semiconductor layers,
wherein some of the plurality of stress control regions that extend into adjacent semiconductor layers form a void region in those adjacent semiconductor layers, and
wherein some of the plurality of stress control regions that extend into adjacent semiconductor layers include a surface roughness extending from a portion of the stress control region in the stress control layer to a portion of the stress control region extending into the adjacent semiconductor layers.

US Pat. No. 10,923,618

METHOD FOR MANUFACTURING A PHOTOVOLTAIC DEVICE

NEWSOUTH INNOVATIONS PTY ...

1. A method for forming a hybrid silicon photovoltaic device, the method comprising the steps of:providing a substrate comprising doped silicon material;
forming a region of silicon material with a first polarity into the doped silicon material on a first surface of the substrate; and
forming a layer of poly-silicon with a second polarity on a second surface of the substrate; the second polarity being opposite to the first polarity; the second surface being opposite to the first surface;
forming a dielectric layer that contains hydrogen on the region with the first polarity;
subsequent to forming the dielectric layer, performing a first hydrogen passivation process at a temperature above 500° C. in a manner such that excess minority carriers are generated in the silicon material;
forming metallic contacts to extract charge carriers from the region of silicon material with the first polarity and the layer of poly-silicon with the second polarity; and
performing a second hydrogen passivation process at a temperature below 500° C. in a manner such that excess minority carriers are generated in the poly-silicon material;
wherein the first hydrogen passivation process or the second hydrogen passivation process enables passivation of electrically active defects in the bulk region of the silicon material;
wherein the second hydrogen passivation process comprises exposing the device to electromagnetic radiation, the electromagnetic radiation being such that photons with an energy higher than a bandgap of the poly-silicon material provide a power density of at least 10 mW/cm2; and
wherein at least one layer of poly-silicon is formed by thermally treating a layer of amorphous silicon and during the step of performing the second passivation process excess hydrogen formed during crystallisation of the amorphous silicon diffuses through the device to passivate electrically active defects.

US Pat. No. 10,923,614

PHOTODIODE, PHOTODIODE ARRAY, AND SOLID-STATE IMAGING DEVICE

PANASONIC INTELLECTUAL PR...

1. A photodiode that multiplies a charge generated by photoelectric conversion in an avalanche region, the photodiode comprising:a semiconductor layer including silicon, the semiconductor layer having a first surface and a second surface that faces the first surface;
a first semiconductor region located inside the semiconductor layer and in contact with the first surface;
a second semiconductor region located inside the semiconductor layer and connected to the first semiconductor region; and
a third semiconductor region located between the second semiconductor region and the second surface,
wherein the semiconductor layer and the third semiconductor region are a first conductivity type,
the first semiconductor region and the second semiconductor region are a second conductivity type opposite to the first conductivity type,
the first semiconductor region, the second semiconductor region, and the third semiconductor region each have a higher impurity concentration than the semiconductor layer,
the avalanche region is a region between the second semiconductor region and the third semiconductor region inside the semiconductor layer,
the first semiconductor region has a smaller area than the second semiconductor region in planar view, and
the second semiconductor region is disposed further from the first surface than the first semiconductor region in a thickness direction of the photodiode.

US Pat. No. 10,923,613

ENERGY HARVESTING APPARATUS HAVING LIGHT COLLECTING PARTICLES

Samsung Electronics Co., ...

1. An energy harvesting apparatus comprising:a light guide plate configured to guide light incident from outside, the light guide plate including a plurality of light collecting particles;
a first charging member on an upper surface of the light guide plate;
a second charging member on a lower surface of the light guide plate; and
solar cells on lateral surfaces of the light guide plate, the solar cells being configured to generate electrical energy based on light received from the light guide plate,
wherein the first charging member and the second charging member are configured to be charged by triboelectrification and configured to apply an electric field to the light guide plate, and
wherein an excitation intensity of the plurality of light collecting particles is increased by the electric field.

US Pat. No. 10,923,610

SOLAR CELL AND SOLAR CELL MODULE

PANASONIC INTELLECTUAL PR...

1. A solar cell comprisinga first conductive-type silicon substrate, and
a second conductive-type amorphous silicon layer positioned on a first main-surface side of the silicon substrate,
wherein
the silicon substrate has a low-doped region which has been doped to be the first conductive-type, and a first main-surface side highly doped region which is provided between the low-doped region and the second conductive-type amorphous silicon layer and has a concentration of a first conductive-type dopant higher than that in the low-doped region, wherein
the silicon substrate has a highly doped side-region which is provided so as to cover the side extending in a thickness direction of the silicon substrate and has a concentration of the first conductive-type dopant higher than that in the low-doped region, and
the highly doped side-region does not form a p-n junction with a portion of the silicon substrate that is adjacent to the highly doped side-region and other than the highly doped side-region.

US Pat. No. 10,923,609

SOLAR CELL MODULE

ZEON CORPORATION, Tokyo ...

1. A solar cell module comprising:a connected body including one or more photoelectric conversion cells in which a first electrode at a side of a first base plate and a second electrode at a side of a second base plate are in opposition via a functional layer;
at least one barrier packaging material that is sealed by a seal and encloses the connected body;
a first lead-out electrode connected to the first electrode via a first electrical connector; and
a second lead-out electrode connected to the second electrode via a second electrical connector, wherein
the solar cell module includes a filling member in at least in part of a gap between the barrier packaging material and a periphery of the connected body in a base plate surface direction that includes a surface direction of the first base plate and a surface direction of the second base plate, and
at least part of the seal and the filling member are formed from the same material and a joint is not present therebetween.

US Pat. No. 10,923,608

CONDUCTIVE PASTE FOR SOLAR CELL, SOLAR CELL AND MANUFACTURING METHOD THEREOF, AND SOLAR CELL MODULE

GIGA SOLAR MATERIALS CORP...

1. A conductive paste for a solar cell, comprising:a silver powder;
a glass;
an organic vehicle; and
a tellurium alloy compound, wherein the tellurium alloy compound has a melting point at least 300° C. higher than a softening point of the glass, and the melting point of the tellurium alloy compound is 900° C. or more, the tellurium alloy compound is not zinc telluride,
wherein a material of the glass comprises lead oxide and bismuth oxide, and based on a total weight of the conductive paste for the solar cell, an amount of the tellurium alloy compound is 0.5 wt % to 3 wt %.

US Pat. No. 10,923,607

SOLID STATE IMAGING APPARATUS, PRODUCTION METHOD THEREOF AND ELECTRONIC DEVICE

Sony Corporation, Tokyo ...

1. A light detecting device, comprising:a first semiconductor section including a semiconductor substrate, the semiconductor substrate including a plurality of photoelectric conversion elements disposed in a pixel region of the light detecting device;
a second semiconductor section including a logic circuit, the first semiconductor section and the second semiconductor section being stacked together;
a first insulation region, wherein at least a portion of the first insulation region is disposed in the semiconductor substrate and in a region other than the pixel region;
a second insulation region, wherein at least a portion of the second insulation region is disposed in the semiconductor substrate and in the region other than the pixel region; and
an electrode pad disposed between the first insulation region and the second insulation region in a cross-sectional view,
wherein, in the cross-sectional view, a first width of the first insulation region at a light receiving surface side of the semiconductor substrate is greater than a second width of the first insulation region at a side of the semiconductor substrate opposite the light receiving surface side.

US Pat. No. 10,923,606

PHOTOELECTRIC CONVERSION ELEMENT

KANEKA CORPORATION, Osak...

1. A photoelectric conversion element, comprising:a plurality of finger electrodes, which extend in a first direction, and are aligned with each other and separated by a first interval along a second direction orthogonal to the first direction; and
an identification mark positioned in an electrode opening area and arranged so that a second interval, which is greater than the first interval, separates the identification mark from the plurality of finger electrodes in the second direction,
wherein the plurality of finger electrodes produce a higher reflectance as compared to the electrode opening area.

US Pat. No. 10,923,605

OPTOELECTRONIC APPARATUS

Vishay Semiconductor GmbH...

1. An optoelectronic apparatus, comprising:a carrier device that has a longitudinal extent and a transverse extent, the longitudinal extent being greater than the transverse extent, wherein the carrier device has a plurality of electrically conductive contact tracks aligned in parallel with the longitudinal extent,
wherein the carrier device has an integrally formed frame formed at least in part by a light-impermeable material or covered at least in part by a light-impermeable layer and defining a plurality of contact chambers, the plurality of contact chambers aligned in parallel with the transverse extent at an upper side, at least two adjacent contact chambers having a length along the transverse extent greater than a width along the longitudinal extent, and at least one contact chamber having a width along the longitudinal extent greater than the width along the longitudinal extent of each of the at least two adjacent contact chambers and positioned adjacent to only one of the at least two adjacent contact chambers,
wherein each of the plurality of contact tracks extends continuously along and is electrically contactable in each of the plurality of contact chambers such that at least one of at least one optoelectronic transmitter and at least one optoelectronic receiver is installable in the respective contact chamber in a variable mounting, and
wherein at least one contact track is wider relative to other contact tracks adjacent to the wider contact track.

US Pat. No. 10,923,604

TERMINATION STRUCTURE FOR INSULATED GATE SEMICONDUCTOR DEVICE AND METHOD

SEMICONDUCTOR COMPONENTS ...

1. A semiconductor device structure, comprising:a region of semiconductor material comprising:
a first conductivity type;
a first major surface;
a second major surface opposite to the first major surface;
an active region; and
a termination region;
an active structure disposed in the active region comprising:
a first active trench extending from the first major surface into the region of semiconductor material to a first depth; and
a first conductive structure within the first active trench and electrically isolated from the region of semiconductor material by a first dielectric structure, wherein the first active trench has a first width proximate to the first major surface;
a termination structure disposed in the termination region comprising:
a first termination trench extending from the first major surface into the region of semiconductor material to a second depth;
a second conductive structure within the first termination trench and electrically isolated from the region of semiconductor material by a second dielectric structure, wherein:
the first termination trench comprises:
a second width proximate to the first major surface;
a first side surface;
a second side surface opposite to the first side surface; and
a first lower surface extending between the first side surface and the second side surface;
the first side surface is interposed between the second side surface and the first active trench; and
the second conductive structure comprises:
a first conductive spacer disposed proximate to the first side surface of the first termination trench; and
a second conductive spacer disposed proximate to the second side surface of the first termination trench; and
a dielectric layer disposed overlying at least a portion of the first lower surface of the first termination trench and overlying at least a portion of the second conductive spacer;
a doped structure comprising a second conductivity type opposite to the first conductivity type in the region of semiconductor material disposed adjacent to the first major surface and adjacent to the second side surface of the first termination trench;
a Schottky contact structure having a first portion disposed adjacent to the first major surface on opposing sides of the first active trench; and
a first conductive layer disposed overlying the first major surface and electrically coupled to the first portion of the Schottky contact structure and electrically coupled to the doped structure.

US Pat. No. 10,923,603

SEMICONDUCTOR DEVICE COMPRISING SCHOTTKY BARRIER DIODES

Key Foundry Co., Ltd., C...

1. A semiconductor device comprising:an N-type deep well region formed in a substrate;
a P-type well region formed in the N-type deep well region;
a silicide layer formed directly on the N-type deep well region, wherein a Schottky barrier diode is formed between the silicide layer and the N-type deep well region;
an N-type buried layer formed below the N-type deep well region; and
a deep trench isolation region in direct contact with the N-type deep well region and the N-type buried layer, respectively, having a depth larger than a depth of the N-type deep well region, and surrounding the N-type deep well region,
wherein a horizontal length of the N-type deep well region is equal to that of the N-type buried layer.

US Pat. No. 10,923,601

CHARGE TRAPPING SPLIT GATE DEVICE AND METHOD OF FABRICATING SAME

Cypress Semiconductor Cor...

1. A split gate device, comprising:a select gate disposed over a substrate;
a memory gate disposed over the substrate;
a dielectric structure having a first portion disposed between the memory gate and the substrate and a second portion disposed along an inner sidewall of the select gate to separate the select gate from the memory gate;
first and second silicide layers disposed over the select gate and the memory gate respectively; and
a spacer formed over the select gate along an inner sidewall of the memory gate, the spacer covering a portion of the inner sidewall of the memory gate that extends above a top surface of the select gate, wherein the spacer is disposed directly above a top surface of the second portion of the dielectric structure, and wherein the spacer is disposed above the top surface of the select gate partially such that at least a portion of the top surface of the select gate is not covered by the spacer.

US Pat. No. 10,923,600

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Semiconductor Energy Labo...

1. A semiconductor device comprising:a first conductor embedded in an opening in a first insulator;
a second insulator in contact with a top surface of the first conductor and a top surface of the first insulator;
a first oxide semiconductor over the second insulator;
a second oxide semiconductor over the first oxide semiconductor;
a third oxide semiconductor over the second oxide semiconductor;
a gate insulator over the third oxide semiconductor;
a second conductor over the gate insulator;
a source electrode and a drain electrode electrically connected to the third oxide semiconductor;
a third insulator over the source electrode and the drain electrode; and
a fourth insulator in contact with a top surface of the second conductor and a top surface of the third insulator,
wherein the gate insulator has a region interposed between the third insulator and the second conductor, and
wherein the third oxide semiconductor has a region in contact with the fourth insulator.

US Pat. No. 10,923,598

GATE-ALL-AROUND STRUCTURE AND METHODS OF FORMING THE SAME

TAIWAN SEMICONDUCTOR MANU...

19. A semiconductor device, comprising:a fin disposed over a substrate, wherein the fin comprises a channel region and a source/drain region;
a gate structure disposed over the substrate and wrapping around the channel region of the fin;
a source/drain feature epitaxially grown in the source/drain region of the fin; and
a dielectric inner spacer disposed between the source/drain feature and the gate structure and between the source/drain feature and the substrate, wherein a bottom surface of the dielectric inner spacer is below a bottom surface of the gate structure.

US Pat. No. 10,923,595

SEMICONDUCTOR DEVICE HAVING A SIGE EPITAXIAL LAYER CONTAINING GA

TAIWAN SEMICONDUCTOR MANU...

1. A semiconductor device including a field effect transistor (FET), the FET comprising:a fin structure having an upper portion protruding from an isolation insulating layer, the upper portion of the fin structure including a channel region and a source/drain region disposed adjacent to the channel region;
a gate electrode disposed over the channel region;
a source/drain epitaxial layer disposed over the source/drain region; and
a source/drain contact contacting the source/drain epitaxial layer and the isolation insulating layer, wherein:
a part of the source/drain contact is disposed between the isolation insulating layer and a dielectric layer disposed between the fin structure and an adjacent fin structure,
the channel region and the source/drain region of the fin structure are made of Si,
the source/drain epitaxial layer includes Ge containing Ga, and
a concentration of Ga is in a range from 1×1018 atoms/cm3 to 1×1022 atoms/cm3.

US Pat. No. 10,923,594

METHODS TO REDUCE OR PREVENT STRAIN RELAXATION ON PFET DEVICES AND CORRESPONDING NOVEL IC PRODUCTS

GLOBALFOUNDRIES U.S. INC....

1. An integrated circuit product, comprising:a base semiconductor substrate;
a buried insulation layer positioned above said base semiconductor layer;
first and second spaced-apart P-active regions positioned above at least a portion of said buried insulation layer, said first and second spaced-apart P-active regions being electrically isolated from one another;
at least one first PFET transistor positioned in said first P-active region, said at least one PFET transistor having a gate length that extends in a gate length direction;
a plurality of second PFET transistors positioned in said second P-active region, wherein said first P-active region has a first length in said gate length direction and said second P-active region has a second length in said gate length direction, wherein said second length is greater than said first length and wherein the number of said second PFET transistors is greater than the number of said first PFET transistors;
a tensile-stressed layer of material positioned on said at least one first PFET transistor and above said first P-active region; and
a compressive-stressed layer of material positioned on said plurality of second PFET transistors and above said second P-active region.

US Pat. No. 10,923,593

TRANSISTOR AND METHODS OF FORMING TRANSISTORS

Micron Technology, Inc., ...

1. A transistor comprising:an upper material comprising:
1 atomic percent to 10 atomic percent elemental-form H; and
0 total atomic percent to less than 0.1 total atomic percent of one or more noble elements;
a lower material directly below the upper material, comprising:
0 atomic percent to less than 1 atomic percent elemental-form H; and
0.1 total atomic percent to 10 total atomic percent of one or more noble elements;
at least one of a top source/drain region, a bottom source/drain region, and a channel region of the transistor comprising the upper material and at least one of the top source/drain region, the bottom source/drain region, and the channel region comprising the lower material; and
a gate operatively laterally-adjacent the channel region.

US Pat. No. 10,923,590

WRAP-AROUND CONTACT FOR VERTICAL FIELD EFFECT TRANSISTORS

INTERNATIONAL BUSINESS MA...

1. A method for forming a semiconductor device, the method comprising:forming a top spacer on a surface of a gate;
forming a sacrificial spacer on the top spacer;
forming a source or drain (S/D) region over the top spacer and between sidewalls of the sacrificial spacer; and
replacing the sacrificial spacer with a wrap-around contact.

US Pat. No. 10,923,589

HIGH VOLTAGE DEVICE AND MANUFACTURING METHOD THEREOF

RICHTEK TECHNOLOGY CORPOR...

1. A manufacturing method of a high voltage device, comprising:forming a crystalline silicon layer on a semiconductor substrate;
forming a well in the crystalline silicon layer, wherein the well has an N-type conductivity type;
forming a body region in the well, wherein the body region has a P-type conductivity type;
forming a gate on and in contact with the well; and
forming a source and a drain having the N-type conductivity type, wherein the source and the drain are located below, outside, and at different sides of the gate, and are located in the body region and the well, respectively;
wherein an inverse region is defined in the body region, between the source and the well; the inverse region serving as an inverse current channel when the high voltage device is in an ON operation; wherein the inverse region includes a germanium distribution region which has a germanium atom concentration higher than 1*1013 atoms/cm2;
wherein a drift region is defined in the well, between the body region and the drain; the drift region serving as a drift current channel when the high voltage device is in the ON operation;
wherein the inverse region further includes a boron distribution region; the germanium distribution region being configured to restrict a diffusion area of the boron distribution region;
wherein the step of forming the body region in the well includes the steps of:
implanting a plurality of germanium atoms in the germanium distribution region via a first ion implantation process step, so that the germanium distribution region has an amorphous region;
after the plurality of germanium atoms have been implanted in the germanium distribution region, implanting a plurality of boron atoms via a second ion implantation process step, in a part of the well which includes the germanium distribution region; and
after the plurality of boron atoms have been implanted in the well, transforming the germanium distribution region to a crystalline region via a thermal annealing process, and forming the body region and the inverse region within the body region.

US Pat. No. 10,923,588

SGT MOSFET WITH ADJUSTABLE CRSS AND CISS

HUNTECK SEMICONDUCTOR (SH...

1. A method for manufacturing a power device in a semiconductor substrate that includes an active area and a termination area, wherein the method comprising:applying a trench mask for opening a plurality of trenches extend longitudinally as continuous straight trenches from the active area to the termination area and filling the trenches with a conductive gate material;
applying a mask to covet the trenches in the termination area and selected trenches in the active area for carrying out a time etch for selectively etching back the conductive gate material from in the active area not covered by the mask thus leaving a bottom portion of the gate conductive material as a bottom electrode in each of the selected trenches not covered by the mask in the active area and wherein at least one of the trenches in the active area is covered by the mask and that is not etched back and is entirely filled with the gate conductive material to extend from the active area to the termination area as a longitudinal continuous straight full trench electrode ready for connecting to a selected electrode pad.

US Pat. No. 10,923,587

POWER MOSFET AND METHOD FOR PRODUCING A POWER MOSFET

Robert Bosch GmbH, Stutt...

2. A power MOSFET, comprising:a substrate that has a substrate surface into which a trench structure is provided, wherein first trenches and second trenches form the trench structure, the first trenches and the second trenches being arranged in alternation, the first trenches being filled at least partially with a first material and the second trenches being filled with a second material, the first material having a first conductivity type and the second material having a second conductivity type, the first conductivity type and the second conductivity type differing from each other,
wherein the substrate includes at least one source layer, a body layer, an epilayer, and a silicon layer, the source layer being situated directly on the body layer, the body layer being situated directly on the epilayer, and the epilayer being situated on the silicon layer, the source layer including a third material, the epilayer including a fifth material, and the silicon layer including a sixth material, the third material, the fifth material and the sixth material having the first conductivity type, the body layer including a fourth material, the fourth material having the second conductivity type, the first trenches and the second trenches extending at least into the epilayer.

US Pat. No. 10,923,586

HIGH ELECTRON MOBILITY TRANSISTOR (HEMT)

UNITED MICROELECTRONICS C...

1. A high electron mobility transistor (HEMT), comprising: a buffer layer on a substrate; a carrier transit layer on the buffer layer; a carrier supply layer on the carrier transit layer; a gate on the carrier supply layer; a source electrode and a drain electrode at two opposite sides of the gate, wherein each of the source electrode and the drain electrode comprises a metal layer and a conductive oxide layer stacked from bottom to top, in which a thickness of the conductive oxide layer is less than a thickness of the metal layer and the conductive oxide layer only covers a top surface of the metal layer, wherein the source electrode and the drain electrode are partially in the carrier supply layer, and a bottom surface of the source electrode, a bottom surface of the drain electrode and a bottom surface of the carrier supply layer are coplanar; and further comprising: doping regions only located right below the source electrode and the drain electrode, wherein the doping regions are only in parts of the carrier transit layer right below the source electrode and the drain electrode.

US Pat. No. 10,923,585

HIGH ELECTRON MOBILITY TRANSISTORS HAVING IMPROVED CONTACT SPACING AND/OR IMPROVED CONTACT VIAS

Cree, Inc., Durham, NC (...

1. A high electron mobility transistor (HEMT), comprising:a substrate;
a semiconductor structure on the substrate;
a first via and a second via, each extending in the substrate and the semiconductor structure;
a first ohmic source contact on the first via and a second ohmic source contact on the second via;
a drain contact on the semiconductor structure and between, in plan view, the first via and the second via; and
a gate contact between the first ohmic source contact and the drain contact, wherein a width of the first via decreases as the first via extends from a bottom surface of the substrate to a top surface of the substrate.

US Pat. No. 10,923,584

GRADED CHANNELS FOR HIGH FREQUENCY III-N TRANSISTORS

Intel Corporation, Santa...

1. An integrated circuit comprising:a layer comprising a first III-N material;
a gate structure above the layer;
a source region and a drain region located on the layer and to respective sides of the gate structure; and
a semiconductor region located in the layer between the source region and the drain region, wherein said semiconductor region includes a graded portion, a first non-graded portion adjacent to the graded portion between the graded portion and the source region, and a second non-graded portion adjacent to the graded portion between the graded portion and the drain region, wherein the first non-graded portion and the second non-graded portion are the same material, and wherein the graded portion comprises both the first III-N material and a second III-N material, the second III-N material being compositionally different than the first III-N material.

US Pat. No. 10,923,583

IGBT DEVICE WITH MOS CONTROLLABLE HOLE PATH

UNIVERSITY OF ELECTRONIC ...

1. An IGBT device with a MOS controllable hole path, wherein:a cell structure of the IGBT device comprises a collector metal electrode, a P+ collector region, an N-type buffer layer, an N-type drift region, and an emitter metal electrode; the collector metal electrode, the P+ collector region, the N-type buffer layer, the N-type drift region, and the emitter metal electrode are stacked in order from bottom to top;
a P+ floating p-body region is disposed on a middle upper surface of the N-drift region; P+ base regions are disposed on both sides of the P+ floating p-body region, respectively; the N+ emitter region is disposed on an upper surface of the P+ base region; the N+ emitter region and the P+ base region are respectively connected to the emitter metal electrode;
an IGBT gate structure is set between the N+ emitter region, the P+ base regions and the P+ floating p-body region; the IGBT gate structure is not in the P+ floating p-body region; the IGBT gate structure comprises a gate electrode and a gate dielectric layer; the gate dielectric layer extends along a longitudinal direction of the IGBT device into the N-drift region to form a trench, and the gate electrode is embedded in the trench; a first side of the gate dielectric layer is in contact with the P+ base region, the N+ emitter region, and the N-drift region; the P+ floating p-body region is not adjacent to a second side of the gate dielectric layer and is separated with the second side of the gate dielectric layer by the N-drift region; and
a MOS control gate structure comprising the gate dielectric layer, a MOS control gate electrode and a P-type MOS channel region is embedded in the P+ floating p-body region; the P-type MOS channel region is disposed on a middle upper surface of the P+ floating p-body region; a P+ contact region is disposed on an upper surface of the P-type MOS channel region and a surface of the P+ contact region is connected to the P+ base region and the N+ emitter region by the emitter metal electrode; the MOS control gate electrode is symmetrically disposed on both sides of the P-type MOS channel region and is isolated from the P-type MOS channel region by the gate dielectric layer; the MOS control gate electrode is isolated from the P+ floating p-body region by the gate dielectric layer; the MOS control gate electrode is connected to the IGBT gate electrode through a connecting bridge; and the connecting bridge and the N-drift region are respectively separated from the emitter metal electrode by a dielectric layer.

US Pat. No. 10,923,582

TRENCH-TYPE INSULATED GATE SEMICONDUCTOR DEVICE INCLUDING AN EMITTER TRENCH AND AN OVERLAPPED FLOATING REGION

ROHM CO., LTD., Kyoto (J...

1. A semiconductor device comprising:a semiconductor layer;
a plurality of gate trenches formed in the semiconductor layer;
a gate electrode filled via a gate insulating film in the plurality of gate trenches;
an n+-type emitter region, a p-type base region, and an n?-type drift region disposed laterally to each gate trench, in order in a depth direction of the gate trench from a front surface side of the semiconductor layer, the n+-type emitter region, the p-type base region, and the n?-type drift region forming a transistor cell region;
a p+-type collector region disposed on a back surface side of the semiconductor layer with respect to the n?-type drift region;
a plurality of emitter trenches formed between the plurality of gate trenches adjacent to each other;
a buried electrode filled via an insulating film in the plurality of emitter trenches, electrically connected with the n+-type emitter region;
a dummy trench formed between each of the gate trenches and each adjacent emitter trench such that the n+-type emitter region, the p-type base region, and the n?-type drift region are formed between the dummy trench and the gate trench;
a buried insulating film filled in the dummy trench and having an upper surface with a portion offset towards a bottom side of the dummy trench with respect to the front surface of the semiconductor layer, for selectively exposing as a contact region a part of the p-type base region at a part from the front surface of the semiconductor layer to the upper surface of the buried insulating film in a side surface of the dummy trench; and
a contact electrode filled in a region over the buried insulating film of the dummy trench, connected to the contact region on the side surface of the dummy trench,
wherein each gate trench is sandwiched between the plurality of emitter trenches such that a non-transistor cell region is formed between each of the gate trenches and each adjacent emitter trench,
wherein the transistor cell region and the non-transistor cell region are formed alternatively along the front surface of the semiconductor layer,
wherein the n+-type emitter region selectively has a pullout portion pulled out in a transverse direction along the front surface of the semiconductor layer from a side surface of the gate trench, and
the semiconductor device further comprising an n-type buffer region disposed between a part of the n?-type drift region and the p+-type collector region.

US Pat. No. 10,923,581

METHOD FOR FORMING SEMICONDUCTOR STRUCTURE

Taiwan Semiconductor Manu...

1. A method for manufacturing a semiconductor structure, comprising:forming a first type semiconductor layer;
forming a semiconductor interlayer over the first type semiconductor layer;
forming a second type semiconductor layer over the semiconductor interlayer;
etching the first type semiconductor layer, the semiconductor interlayer, and the second type semiconductor layer to form a fin structure; and
oxidizing the semiconductor interlayer.

US Pat. No. 10,923,580

SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME

Semiconductor Energy Labo...

2. The semiconductor device according to claim 1, wherein the side surface of the gate insulating layer and a side surface of the gate electrode layer form a continuous surface.

US Pat. No. 10,923,579

SEMICONDUCTOR DEVICE WITH INTERCONNECT TO SOURCE/DRAIN

GLOBALFOUNDRIES U.S. INC....

9. A device, comprising:an SOI substrate comprising a semiconductor bulk substrate, a buried insulation layer positioned on said semiconductor bulk substrate and a semiconductor layer positioned on said buried insulation layer;
a trench formed in said SOI substrate, said trench extending through said buried insulation layer and into said semiconductor bulk substrate; and
an isolation structure positioned at least partially in said trench, said isolation structure comprising:
a first dielectric layer positioned in a portion of said trench that extends into said bulk semiconductor substrate, said first dielectric layer comprising a first upper surface that is substantially coplanar with an upper surface of said bulk semiconductor substrate;
a first material layer positioned above said first dielectric layer, said first material layer being made of a material that is different from a material of said first dielectric layer, said first material layer comprising an upper surface, wherein said upper surface of said first material layer is positioned at a level that is below a level of an upper surface of said buried insulation layer;
a second dielectric layer positioned above said first material layer, said second dielectric layer being made of a material that is different from said material of said first material layer; and
a liner layer positioned in said trench on said bulk semiconductor substrate and on said buried insulation layer, wherein said first material layer is positioned within said liner layer,
wherein said first material layer is a spacer that comprises an opening that exposes a portion of an upper surface of said first dielectric layer and wherein a portion of said second dielectric layer is positioned in said opening in said first material layer and said second dielectric layer contacts said upper surface of said first dielectric layer.

US Pat. No. 10,923,578

SEMICONDUCTOR DEVICE COMPRISING A BARRIER REGION

Infineon Technologies Aus...

1. A semiconductor device comprising a transistor, the transistor comprising:a drift region of a first conductivity type in a semiconductor substrate having a first main surface;
a body region of a second conductivity type between the drift region and the first main surface;
a plurality of trenches in the first main surface and patterning the semiconductor substrate into a plurality of mesas comprising a first mesa and a dummy mesa, the plurality of trenches comprising at least one active trench, wherein the first mesa is arranged at a first side of the active trench and the dummy mesa is arranged at a second side of the active trench;
a gate electrode arranged in the active trench; and
a source region of the first conductivity type in the first mesa,
wherein a one-sided channel of the transistor is configured to be formed in the first mesa.

US Pat. No. 10,923,577

CAVITY STRUCTURES UNDER SHALLOW TRENCH ISOLATION REGIONS

GLOBALFOUNDRIES U.S. INC....

1. A structure comprising:one or more cavity structures provided in a substrate material and sealed with an epitaxial material; and
a shallow trench isolation region located in a substrate layer and which is located over the one or more cavity structures in the substrate material.

US Pat. No. 10,923,576

ATOMIC LAYER DEPOSITION METHODS AND STRUCTURES THEREOF

TAIWAN SEMICONDUCTOR MANU...

1. A processing system, comprising:first and second processing chambers each of which adjoins a wafer handling chamber including a transfer arm that transfers a substrate from one to another of the first and second processing chambers; and
a vacuum system coupled to the first and second processing chambers and the wafer handling chamber, wherein the vacuum system maintains a vacuum condition of each of the first and second processing chambers and the wafer handling chamber;
wherein the first processing chamber is configured to perform a Cl-based treatment process of a work-function metal layer to form a treated work-function metal layer; and
wherein the second processing chamber is configured to deposit a subsequent metal layer over the treated work-function metal layer.

US Pat. No. 10,923,575

LOW RESISTANCE CONTACT FOR TRANSISTORS

INTERNATIONAL BUSINESS MA...

1. A semiconductor device comprising:a fin coupled to a source or a drain (S/D);
a work function metal coupled to the fin and a gate;
a liner coupled to the work function metal;
a first contact coupled to the gate, wherein the liner provides a barrier between the first contact and the work function metal;
a trench silicide region coupled to the fin; and
a second contact coupled to the trench silicide region, wherein the liner is comprised of silicon nitride.

US Pat. No. 10,923,574

TRANSISTOR WITH INNER-GATE SPACER

Intel Corporation, Santa...

1. An integrated circuit structure comprising:a body including semiconductor material;
a gate structure at least above the body, the gate structure having a first portion and a second portion, the first portion being wider than the second portion;
a source region and a drain region on opposing sides of the body, the source region and the drain region including semiconductor material and dopant;
a first spacer including a dielectric material, the first spacer between the source region and the gate structure;
a second spacer including the dielectric material, the second spacer between the drain region and the gate structure;
a first additional spacer between the first spacer and the gate structure;
a second additional spacer between the second spacer and the gate structure; and
a gate dielectric between the body and the gate structure.

US Pat. No. 10,923,573

FORMING METAL CONTACTS ON METAL GATES

TAIWAN SEMICONDUCTOR MANU...

1. A semiconductor structure, comprising:a gate stack including a metal gate electrode disposed over a gate dielectric layer;
a metal layer disposed on the gate stack, wherein a top portion of the metal layer spans across a width of the metal gate electrode, and wherein a bottom portion of the metal layer extends into the metal gate electrode;
an interlayer dielectric (ILD) layer disposed over the gate stack; and
a gate contact disposed in the ILD layer and over the top portion of the metal layer, wherein the top portion of the metal layer laterally extends beyond one or both sidewalls of the gate contact.

US Pat. No. 10,923,572

HEAT SINK LAYOUT DESIGNS FOR ADVANCED FINFET INTEGRATED CIRCUITS

TAIWAN SEMICONDUCTOR MANU...

1. A layout of a semiconductor device, the layout stored on a non-transitory computer-readable medium and comprising:a first transistor in an active device region, the first transistor comprising a first channel region in a first semiconductor fin, a first gate structure across the first channel region, and a first source region and a first drain region in the first semiconductor fin on opposite sides of the first channel region; and
a second transistor in a guard ring region, the second transistor comprising a second channel region in a second semiconductor fin, a second gate structure across the second channel region, and a second source region and a second drain region in the second semiconductor fin on opposite sides of the second channel region,
wherein the second channel region comprises a semiconductor material having a higher thermal conductivity than a semiconductor material of the first channel region.

US Pat. No. 10,923,571

SEMICONDUCTOR DEVICE SUPPRESSING ELECTRIC FIELD CONCENTRATION AND METHOD FOR MANUFACTURING

ROHM CO., LTD., Kyoto (J...

1. A semiconductor device comprising:a semiconductor layer of a first conductivity type having a main surface;
an active region that is formed at an inner region in the main surface of the semiconductor layer and in which a functional element is formed;
an outer side region that is formed outside the active region in the main surface of the semiconductor layer;
a semiconductor region of a second conductivity type having a second conductivity type impurity concentration greater than the first conductivity type impurity concentration of the semiconductor layer of the first conductivity type, the semiconductor region of the second conductivity type formed in a surface layer portion of the main surface of the semiconductor layer along a periphery of the active region so as to define the active region and having an inner side edge portion positioned at the active region side and an outer side edge portion positioned at an opposite side with respect to the active region;
an insulating film selectively covering the main surface of the semiconductor layer at the outer side region;
a protective film extending on the outer side region from the active region so as to cover the insulating film, the protective film formed at an interval from an end of the semiconductor layer so as to expose an end portion of the main surface of the semiconductor layer, the protective film having a thickness greater than a thickness of the insulating film; and
an electrode that has a first portion interposed between the main surface of the semiconductor layer and the protective film so as to be connected to the main surface of the semiconductor layer and the protective film and a second portion interposed between the insulating film and the protective film so as to be connected to the insulating film and the protective film.

US Pat. No. 10,923,570

MANUFACTURING METHOD FOR CONTROLLING CARRIER LIFETIMES IN SEMICONDUCTOR SUBSTRATES THAT INCLUDES INJECTION AND ANNEALING

FUJI ELECTRIC CO., LTD., ...

1. A manufacturing method of manufacturing a semiconductor device having:an n-type semiconductor substrate;
a p-type anode region formed in the semiconductor substrate on its front surface side;
an n-type field stop region formed in the semiconductor substrate on its rear surface side with protons as a donor; and
an n-type cathode region formed in the semiconductor substrate to be closer to its rear surface than the field stop region is, the method comprising:
injecting protons from the rear surface side of the semiconductor substrate such that a concentration distribution of the donor in the field stop region in its depth direction has a plurality of peaks including a first peak, and a second peak that is closer to the rear surface of the semiconductor substrate than the first peak is, and has a concentration lower than that of the first peak; and
annealing the semiconductor substrate to diffuse the protons so that a carrier lifetime in at least a partial region including the first peak becomes longer than a carrier lifetime in the anode region, wherein
the first peak is a peak closest to the front surface of the semiconductor substrate among the plurality of peaks,
in the annealing, a carrier lifetime at a depth position at which the concentration distribution of the donor exhibits the first peak is made longer than the carrier lifetime in the anode region, and
in the annealing, the region that has a carrier lifetime longer than that in the anode region is caused to extend toward the front surface side of the semiconductor substrate past a position at which the concentration distribution of the donor exhibits the first peak.

US Pat. No. 10,923,569

P-TYPE OXIDE, P-TYPE OXIDE-PRODUCING COMPOSITION, METHOD FOR PRODUCING P-TYPE OXIDE, SEMICONDUCTOR DEVICE, DISPLAY DEVICE, IMAGE DISPLAY APPARATUS, AND SYSTEM

RICOH COMPANY, LTD., Tok...

1. A p-type oxide, wherein the p-type oxide is represented by the following compositional formula:xAO.yCu2O
wherein x denotes a proportion by mole of AO, y denotes a proportion by mole of Cu2O, and A is any one of Mg, Ca, Sr, and Ba, or a mixture containing at least two selected from the group consisting of Mg, Ca, Sr, and Ba, and wherein
in a case that A is any one of Mg, Ca, and Ba or a mixture containing at least two selected from the group consisting of Mg, Ca, Sr, and Ba, x and y satisfy the following expressions (i) and (ii):
0?x<100 and  (i)
x+y 100,  (ii)
in a case that A is Sr only, x and y satisfy each of the following expressions (iii) and (iv):
either 0.1?x<50 or 50 x+y=100  (iv)
wherein the p-type oxide has no diffraction peak between 10° and 70° by X-ray diffraction.

US Pat. No. 10,923,568

SEMICONDUCTOR DEVICE, INVERTER CIRCUIT, AND VEHICLE

Kabushiki Kaisha Toshiba,...

1. A semiconductor device, comprising:a p-type SiC layer;
a gate electrode; and
a gate insulating layer provided between the SiC layer and the gate electrode, the gate insulating layer including:
a first layer,
a second layer provided between the first layer and the gate electrode, the second layer having a higher oxygen density than the first layer,
a first region provided across the first layer and the second layer, the first region including at least one first element selected from the group consisting of N (nitrogen), P (phosphorus), As (arsenic), Sb (antimony), and Bi (bismuth) and the first region having a first concentration peak of the at least one first element, and
a second region provided in the second layer, the second region including at least one second element selected from the group consisting of Ta (tantalum), Nb (niobium), and V (vanadium) and, the second region having a second concentration peak of the at least one second element.

US Pat. No. 10,923,567

GRAPHENE FET WITH GRAPHITIC INTERFACE LAYER AT CONTACTS

TEXAS INSTRUMENTS INCORPO...

1. A graphene field-effect transistor (FET), comprising:a graphene layer on a substrate;
a metal oxide layer covering portions of the graphene layer;
a metal layer including a first metal portion providing a source contact over the graphene layer and a second metal portion providing a drain contact over the graphene layer, wherein the metal layer includes a carbon; and
a graphitic interface layer between the source contact and the graphene layer and between the drain contact and the graphene layer.

US Pat. No. 10,923,566

SEMICONDUCTOR STRUCTURES AND METHODS OF FORMING THE SAME

Taiwan Semiconductor Manu...

15. A semiconductor structure comprising:a semiconductor substrate;
an annular nanowire disposed directly on the semiconductor substrate, the annular nanowire extending around an axis, the axis being perpendicular to the semiconductor substrate;
a gate oxide completely surrounding the annular nanowire in a plan view; and
a gate metal completely surrounding the gate oxide in the plan view.

US Pat. No. 10,923,565

SELF-ALIGNED CONTACT AIR GAP FORMATION

TAIWAN SEMICONDUCTOR MANU...

1. A method for integrated circuit (IC) fabrication, comprising:providing a device structure including:
a substrate;
a source/drain (S/D) feature on the substrate;
a first gate stack on the substrate;
a contact hole over the S/D feature; and
a dummy feature over the S/D feature and between the first gate stack and the contact hole;
forming in the contact hole a contact plug that is electrically coupled to the S/D feature;
after forming the contact plug, selectively removing the dummy feature to form a first air gap that extends higher than a top surface of the first gate stack; and
forming over the contact plug a seal layer that covers the first air gap, wherein a portion of the S/D feature is exposed to the first air gap after the forming of the seal layer.

US Pat. No. 10,923,564

SUPER-JUNCTION STRUCTURE AND METHOD FOR MANUFACTURING SAME

Shanghai Huahong Grace Se...

1. A super-junction structure, wherein the super-junction structure is formed by a plurality of N-pillars and a plurality of P-pillars which are alternately arrayed, the P-pillars are formed by P-type materials filled in super-junction trenches, the super-junction trenches are formed in an N-type epitaxial layer, the N-pillars are formed by portions, between the P-pillars, of the N-type epitaxial layer, and the N-type epitaxial layer is formed on a surface of a semiconductor substrate;each said super-junction trench is formed by a bottom trench and a top trench which are stacked together;
the bottom trenches and the top trenches have trapezoidal sections, a side angle of each said bottom trench is an apex angle of the trapezoidal section of the bottom trench, and a side angle of each said top trench is an apex angle of the trapezoidal section of the top trench;
the side angle of each said bottom trench is greater than 90°, and a width of a bottom surface of each said bottom trench is greater than that of a top surface of the bottom trench;
the side angle of each said top trench is smaller than 90°, and a width of a bottom surface of each said top trench is smaller than that of a top surface of the top trench;
the super-junction trenches are formed by etching the N-type epitaxial layer segment-by-segment twice from a side of the N-type epitaxial layer spaced from and opposing the semiconductor substrate, the top trenches are formed through primary etching, and the bottom trenches are formed at bottoms of the top trenches through secondary etching;
the primary etching and the secondary etching are dry etching;
an etching angle for the primary etching is smaller than 90°, so that the side angle of each said top trench is smaller than 90°; and an etching angle for the secondary etching is greater than 90°, so that the side angle of each said bottom trench is greater than 90°; and
the bottom surface of each said top trench is the top surface of the corresponding bottom trench, the whole super-junction trenches are each of a waisted structure, and the bottom trenches increase a bottom width of the super-junction trenches and improve the depletion of bottoms of the N-pillars, thus, increasing the breakdown voltage of the super-junction structure.

US Pat. No. 10,923,563

POWER DEVICE

HANGZHOU SILAN MICROELECT...

1. A power device comprising:a semiconductor substrate;
a first doped region on the semiconductor substrate;
a plurality of second doped regions located in a first region of the first doped region; and
a plurality of third doped regions located in a second region of the first doped region,
wherein the semiconductor substrate and the first doped region are first doping type, the plurality of second doped regions and the plurality of third doped regions are second doping type, the second doping type is opposite to the first doping type,
wherein the plurality of second doped regions are separated from each other at a first predetermined spacing, a first charge compensation structure is formed by the plurality of second doped regions and the first doped region, the first charge compensation structure and the semiconductor substrate are located on a current channel,
wherein the plurality of third doped regions are separated with each other at a second predetermined spacing, a second charge compensation structure is formed by the plurality of third doped regions and the first doped region, the second charge compensation structure is configured to disperse continuous surface electric field of the power device,
wherein the first charge compensation structure is located in a cell region of the power device, the second charge compensation structure is located in a loop region of the power device, an average doping concentration of the plurality of second doped regions is greater than that of the plurality of third doped regions.

US Pat. No. 10,923,562

SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING SEMICONDCUTOR DEVICE

ROHM CO., LTD., Kyoto (J...

1. A semiconductor device comprising:a first conductivity type semiconductor layer that has a front surface, a rear surface on an opposite side of the front surface, and an end surface, the semiconductor layer having an active region and a peripheral region surrounding the active region;
a circuit element formed at a front-surface portion of the semiconductor layer in the active region;
a first electrode that is joined to the semiconductor layer in the rear surface of the semiconductor layer; and
an electric-field relaxation region reaching the rear surface from the front surface of the semiconductor layer in the peripheral region, the electric-field relaxation region being either a high-resistance region having higher resistance than the semiconductor layer or a second conductivity type impurity region, and the electric-field relaxation region formed inwardly away from the end surface of the semiconductor layer such that the electric-field relaxation region surrounds the active region; and
a first conductivity type peripheral impurity region formed between the electric-field relaxation region and the end surface of the semiconductor layer, wherein
the first electrode is in contact with a part of the semiconductor layer in the active region and the peripheral impurity region in the rear surface of the semiconductor layer such that the first electrode forms a Schottky junction with the part of the semiconductor layer and the peripheral impurity region.

US Pat. No. 10,923,561

SEMICONDUCTOR DEVICE

DENSO CORPORATION, Kariy...

1. A semiconductor device comprising:a semiconductor substrate having a major surface;
a first semiconductor region that is of a first conductive type and provided on the major surface of the semiconductor substrate; and
an element-forming region and an outer peripheral voltage-withstanding region both of which are provided on the major surface side of the semiconductor substrate,
wherein
the element-forming region includes both a cell region and a circuit element region,
the cell region includes a second semiconductor region that is of a second conductive type and provided in a surface region of the first semiconductor region to form a power element,
the circuit element region includes a third semiconductor region that is of the second conductive type and provided in the surface region of the first semiconductor region to form at least one circuit element,
the circuit element region is interposed between the outer peripheral voltage-withstanding region and the cell region,
the outer peripheral voltage-withstanding region includes a boundary region that adjoins the element-forming region,
the boundary region includes a fourth semiconductor region that is of the second conductive type and provided in the surface region of the first semiconductor region,
in the fourth semiconductor region, there is provided one or more voltage-withstanding regions, and
at least one of the one or more voltage-withstanding regions has a withstand voltage lower than both a withstand voltage of the cell region and a withstand voltage of the circuit element region.

US Pat. No. 10,923,560

CAPACITOR INCLUDING ELECTRODE AND DIELECTRIC LAYER EACH CONTAINING SILICON, AND METHOD FOR MANUFACTURING CAPACITOR

PANASONIC INTELLECTUAL PR...

1. A capacitor comprising:a first electrode;
a second electrode facing the first electrode; and
a dielectric layer which is disposed between the first electrode and the second electrode and which is in contact with the first electrode, wherein
an interface is defined between the first electrode and the dielectric layer,
the first electrode includes a first portion facing the interface,
the dielectric layer includes a second portion facing the interface,
the first portion and the second portion each contain silicon,
along a thickness direction of the first portion and the second portion, a concentration distribution of the silicon in the first portion and the second portion increases from a first value in the first portion to a second value, and decreases from the second value to a third value in the second portion, and
a concentration of the silicon in the first portion and the second portion is maximum at the second value.

US Pat. No. 10,923,559

DISPLAY PANEL OF PORTABLE ELECTRONIC DEVICE AND DESIGN METHOD THEREFOR

Galaxycore Shanghai Limit...

1. A method for designing a display panel of a portable electronic device, whereina display module comprises a display panel, a drive chip and a flexible circuit board;
the display panel comprises a display area and a non-display area, and the drive chip corresponds to the non-display area of the display panel; and
the display panel is provided with an electrical connection point for connecting with the flexible circuit board, and the electrical connection point corresponds to a side of the drive chip so as to reduce a height of the non-display area of the display panel.

US Pat. No. 10,923,558

DISPLAY DEVICE AND METHOD OF MANUFACTURING DISPLAY DEVICE

Japan Display Inc., Mina...

1. A display device comprising:a substrate that includes a display region and a peripheral region;
a display element including a thin film transistor that is provided on the display region of the substrate; and
an electronic component that is provided in the peripheral region on an opposite surface from a surface of the substrate on which the display element is provided, wherein
the substrate includes a through hole in the peripheral region,
the through hole includes a through electrode formed by a laminate structure of a plurality of conductive layers,
the through electrode electrically connect the display element to the electronic component, and
the plurality of conductive layers of the through electrode include a same material as a gate electrode and a drain or a source electrode of the thin film transistor.

US Pat. No. 10,923,557

ACTIVE-MATRIX LIGHT-EMITTING DIODE (AMOLED) FREE OF TFT WITHIN AN ACTIVE AREA

AROLLTECH CO., LTD., Gra...

1. An AMOLED, comprising:a first substrate;
an organic light-emitting diode (OLED) device disposed on the first substrate;
a plurality of conductive lines disposed on the first substrate and connected to the OLED device; and
a driving device connected to the OLED device through the conductive lines, and configured to drive the OLED device, and disposed outside of the active area;
wherein the AMOLED is free of thin-film transistors (TFT) in the active area.

US Pat. No. 10,923,556

DISPLAY DEVICE

Samsung Display Co., Ltd....

1. A display device, comprising:a substrate comprising a display area and a non-display area;
pixels disposed on the display area, the pixels being arranged in pixel columns;
data lines respectively connected to the pixel columns, the data lines being configured to apply data signals to the pixel columns; and
a data drive unit coupled to one side of the substrate via a chip on film configuration, the data drive unit being configured to provide a data signal to the data lines,
wherein the non-display area comprises a fan-out area, a bent area, and a pad area that are sequentially arranged,
wherein each data line of the display device comprises a first portion disposed on the fan-out area and a second portion disposed on the pad area,
wherein the first portion of each data line and the second portion of each data line adjacent to the first portion are disposed on different layers and not in a same layer, and
wherein the second portion of each data line is connected to the data drive unit.

US Pat. No. 10,923,555

ORGANIC LIGHT-EMITTING DISPLAY APPARATUS

SAMSUNG DISPLAY CO., LTD....

1. An organic light-emitting apparatus, comprising:a substrate comprising an active area and a pad area in an outer region of the active area;
at least one thin-film transistor disposed in the active area;
at least one pixel electrode disposed in the active area and electrically connected to the at least one thin-film transistor;
a common electrode facing the substrate and comprising a protrusion, the protrusion being disposed at an end portion of the common electrode adjacent to the pad area and extending towards the pad area;
a first voltage supply unit disposed between the active area and the pad area and contacting the protrusion of the common electrode, the first voltage supply unit being configured to apply a first voltage to the common electrode; and
an insulating layer disposed between the common electrode and the at least one thin-film transistor,
wherein the insulating layer clad an end portion of the first voltage supply unit adjacent to the active area,
wherein the common electrode is disposed on the at least one thin-film transistor and the at least one pixel electrode.

US Pat. No. 10,923,554

DISPLAY PANEL AND DISPLAY DEVICE

Wuhan China Star Optoelec...

1. A display panel, comprising:a substrate;
a first metal layer, arranged on the substrate, wherein the first metal layer comprises a first metal line and a second metal line; the first metal layer is spaced apart along a first direction; the second metal line is spaced apart along a second direction; the first metal line and the second metal line are connected at an intersection;
a first insulating layer, disposed on the first metal layer;
a second metal layer, disposed on the first insulating layer, wherein the second metal layer comprises a peripheral metal line electrically connected to the first metal line and the second metal line; and
a pixel unit;
wherein the first metal line and the second metal line are connected to the pixel unit and configured to supply the pixel unit with a signal voltage; wherein the first metal layer further comprises a signal routing; one or more of the first metal line and the second metal line are connected with the signal routing at the intersection with a bridge; wherein two terminals of the bridge are connected to a second hole of the first insulating layer, respectively; the second metal layer is electrically connected to the first metal line and the second metal line through the second hole; and wherein the first metal layer is a second gate metal layer; the first insulating layer is a second gate insulating layer; the second metal layer is a source and drain metal layer.

US Pat. No. 10,923,553

DISPLAY DEVICE

SHARP KABUSHIKI KAISHA, ...

15. A display device comprising:a thin-film transistor (TFT) layer including a plurality of inorganic insulating films;
a barrier layer below the TFT layer;
a light emitting element layer above the TFT layer; and
a first slit pattern and a second slit pattern each extending through at least one of the plurality of inorganic insulating films, wherein
the TFT layer includes a terminal region including a plurality of terminals, the terminal region being provided outside an active region,
the first slit pattern is between the active region and the terminal region in a plan view,
the terminal region is sandwiched between the first slit pattern and the second slit pattern in the plan view,
the first slit pattern includes a continuous slit extending in a direction crossing the first terminal wiring line, and
the first slit pattern and the second slit pattern extend through the plurality of inorganic insulating films and expose an inside of the barrier layer, or extend through the plurality of inorganic insulating films and the barrier layer.

US Pat. No. 10,923,552

DISPLAY PANEL HAVING A PLURALITY OF LINES BYPASSING AROUND AREA EDGES

Samsung Display Co., Ltd....

1. A display panel comprising:a substrate comprising a first area and a second area that are spaced apart from each other in a first direction;
a plurality of display elements located in a display area, the display area being adjacent to the first area and the second area; and
a plurality of lines extending in a second direction that intersects the first direction, the plurality of lines being electrically connected to the plurality of display elements, respectively,
wherein the plurality of lines comprise:
a first line and a second line adjacent to each other and bypassing around an edge of the first area; and
a third line and a fourth line adjacent to each other and bypassing around an edge of the second area,
wherein the first area and the second area are different from each other in at least one of size or shape.

US Pat. No. 10,923,551

DISPLAY PANEL WITH STRETCHING UNITS AND DISPLAY DEVICE HAVING THE SAME

BOE TECHNOLOGY GROUP CO.,...

1. A display panel, comprising:an underlying film; and
a plurality of display units; and
a plurality of stretching units, the display units and the stretching units being arranged on the underlying film, each of the stretching units comprising an annular deformation portion and a plurality of connection portions, one end of each of the connection portions being connected to the deformation portion while the other end of each of the connection portions being connected to the display unit, the stretching unit being constructed in such a way that the deformation portion of the stretching unit is elastically deformed when the display panel is stretched, wherein:
the plurality of display units are arranged in multiple rows and multiple columns;
two adjacent display units are connected by the stretching unit;
each of the stretching units comprises four connection portions;
the four connection portions are connected to four of the display units respectively;
each of the display units is connected to four of the stretching units; and
a first hollowed-out region is defined between two adjacent display units and two stretching units connected between the two adjacent display units.

US Pat. No. 10,923,550

DISPLAY DEVICE WITH ORGANIC LAYER WITH DIFFERENT THICKNESS

Japan Display Inc., Toky...

1. A display device comprising:a display region including a plurality of first regions, and a plurality of second regions arranged with a certain gap between the plurality of first regions;
wherein
one of the plurality of second regions is in between two of the plurality of the first regions, each of the plurality of first regions includes a transistor, a first planarization layer on the transistor, a wiring, a first organic insulating layer on the wiring and the transistor, a display element on the first organic insulating layer, and a first sealing layer on the display element and stacked in order with a first inorganic insulating layer, a second organic insulating layer and a second inorganic insulating layer, each of the plurality of second regions includes the wiring, a second planarization layer on the wiring, a second sealing layer stacked in order with the first inorganic insulating layer and the second inorganic insulating layer,
the first planarization layer includes an organic resin,
the second planarization layer includes an organic resin,
the first planarization layer has a first thickness, the first thickness is a constant thickness of a first area where the first planarization layer is located without overlapping with the transistor and the wiring,
the second planarization layer has a second thickness, the second thickness is a constant thickness of a second area where the second planarization layer is located without overlapping with the transistor and the wiring,
the second thickness is smaller than the first thickness,
each of the plurality of first regions includes a light emitting region where the display element emits light, and each of the plurality of second regions is a non-light emitting region,
the plurality of second regions are arranged along a first direction of the display region,
the plurality of first regions are arranged parallel along the first direction,
the first direction is parallel to the short side of the display device,
the plurality of first regions are arranged continuously in three or more in the second direction, and
the plurality of second regions are repeatedly arranged at intervals of three or more first regions in the second direction.