US Pat. No. 10,461,887

METHODS AND SYSTEMS FOR BLIND DETECTION WITH POLAR CODE

HUAWEI TECHNOLOGIES CO., ...

1. A method for encoding, the method comprising:generating a codeword intended for a recipient user equipment (UE) using an encoder for a polar code, an input vector to the encoder including a UE-specific frozen sequence in a selected subset of frozen bit positions and further including data for transmission in information bit positions, the UE-specific frozen sequence being associated with the recipient UE;
wherein the selected subset of frozen bit positions is selected from frozen bit positions that occur after a first information bit position; and
transmitting the codeword.

US Pat. No. 10,461,886

TRANSPORT LAYER IDENTIFYING FAILURE CAUSE AND MITIGATION FOR DETERMINISTIC TRANSPORT ACROSS MULTIPLE DETERMINISTIC DATA LINKS

CISCO TECHNOLOGY, INC., ...

1. A method comprising:detecting, by a transport layer executed by a processor circuit in an apparatus, a request message received via a non-deterministic data link from one of a plurality of deterministic network interface circuits, the request message for a transport layer packet having been stored in a buffer circuit storing a plurality of transport layer packets in the apparatus, the deterministic network interface circuits providing respective deterministic links for deterministic transmission of the transport layer packets in a deterministic data network, the request message specifying a first number identifying any missed transmission opportunities on the corresponding deterministic link;
determining, by the transport layer, a cause of failure in one or more of the missed transmission opportunities; and
selectively executing, by the transport layer based on determining the cause of failure, a corrective action for preventing an increase in latency of the transport layer packets among the deterministic network interface circuits.

US Pat. No. 10,461,885

TRANSMISSION APPARATUS, COMMUNICATION SYSTEM, AND TRANSMISSION METHOD

Sony Corporation, Tokyo ...

1. A transmission apparatus, comprising:a communication circuitry configured to
transmit a signal to a reception apparatus via a first signal line, the reception apparatus being AC-coupled to the transmission apparatus via the first signal line, and
transmit a first control signal to the reception apparatus via a second signal line that is different than the first signal line; and
a communication control circuitry configured to
control transmission of the signal to the reception apparatus,
determine whether the transmission of the signal to the reception apparatus will be restored from a suspended state,
responsive to determining that the transmission of the signal to the reception apparatus will be restored from the suspended state, control the communication circuitry to transmit the first control signal via the second signal line, and
control the communication circuitry to transmit a charging signal that charges an AC coupling capacitance serially connected to the first signal line via the first signal line before a timing when the transmission of the first control signal is ended.

US Pat. No. 10,461,884

SERVER SELECTED VARIABLE BITRATE STREAMING

COMCAST CABLE COMMUNICATI...

1. A method comprising:receiving a request for a portion of a content item at a first bitrate, wherein the request comprises a first identifier associated with the portion of the content item at the first bitrate;
determining, based on at least one network heuristic and independently from the first bitrate, a second bitrate from a plurality of bitrates associated with the portion of the content item;
determining, based on the first identifier and the second bitrate, a second identifier associated with the portion of the content item at the second bitrate;
sending, to a user device, the portion of the content item at the second bitrate, wherein the portion of the content item at the second bitrate is associated with the first identifier; and
sending, to the user device via a server push, a subsequent portion of the content item at the second bitrate.

US Pat. No. 10,461,883

COMMUNICATION LINK ADJUSTMENTS IN WIRELESS NETWORKS BASED UPON COMPOSITE LQI MEASUREMENTS

NXP USA, Inc., Austin, T...

1. A method to adjust a communication link for a network node in a wireless network, comprising:receiving packet communications through a wireless communication link from a separate network node within a wireless network;
measuring signal strength for the received packets to produce signal strength measurements;
measuring signal quality for the received packets to produce signal quality measurements;
generating composite LQI (link quality indicator) measurements for the received packet communications based upon the signal strength measurements and the signal quality measurements, wherein each composite LQI is generated by applying a first weight to the signal strength measurement and a second weight to the signal quality measurement and combining the weighted signal strength measurement with the weighted signal quality measurement; and
adjusting the wireless communication link based upon the composite LQI measurements.

US Pat. No. 10,461,882

OPTICAL NETWORK UNIT FOR OPTICAL TRANSMISSION IN BURST MODE

ELECTRONICS AND TELECOMMU...

1. An optical network unit (ONU) comprising:an electro-absorption modulated laser (EML) transmitter comprising a laser diode (LD) and configured to transmit an uplink optical signal through the LD;
an electro-absorption modulator (EAM) driver integrated circuit (IC) (EAM driver IC) configured to amplify an uplink data signal and provide the amplified data signal to the EML transmitter;
an LD burst-mode driving circuit configured to control an operation of turning on or off the LD based on a burst-enable signal; and
a media access control (MAC) configured to transmit the data signal to the EAM driver IC and transmit the burst-enable signal to the LD burst-mode driving circuit,
wherein the LD burst-mode driving circuit comprises:
an operational amplifier (OPAMP) configured to compare an input voltage value and a set voltage value and control the voltage values to be equal;
a current monitoring IC configured to monitor a current value flowing to the EML transmitter and convert the current value to a voltage, and then input the voltage to the OPAMP as the input voltage value;
a first transistor configured to receive the set voltage value from an MCU and receive the burst-enable signal from the MAC, and then input the set voltage value to the OPAMP; and
a second transistor configured to receive a signal output from the OPAMP and allow a current to flow to the EML transmitter.

US Pat. No. 10,461,881

METHOD AND SYSTEM FOR ASSIGNING MODULATION FORMAT IN OPTICAL NETWORKS

Fujitsu Limited, Kawasak...

1. A method for assigning a modulation format in optical networks, the method comprising:identifying a pair of nodes of a plurality of nodes of a virtual optical network (VON);
identifying an optical route between the pair of nodes;
determining a desired availability of the optical route;
determining a probability density function (PDF) of a signal-to-noise ratio (SNR) of a signal of the optical route;
determining a SNR threshold such that an integration of the PDF of the SNR of the signal above the SNR threshold corresponds to the desired availability of the optical route;
determining a plurality of spectral efficiencies that corresponds to the SNR threshold, each spectral efficiency of the plurality of spectral efficiencies associated with a respective modulation format of a plurality of modulation formats;
identifying a particular modulation format of the plurality of modulation formats that corresponds to a maximum spectral efficiency of the plurality of spectral efficiencies;
assigning the particular modulation format to the virtual optical network; and
transmitting or receiving traffic over the virtual optical network using the particular modulation format.

US Pat. No. 10,461,880

FLEXIBLE GRID OPTICAL SPECTRUM TRANSMITTER, RECEIVER, AND TRANSCEIVER

Ciena Corporation, Hanov...

1. A flexible grid optical transmitter communicatively coupled to an optical network, the flexible optical transmitter comprising:a coherent optical transmitter configured to generate a signal modulated with a configured modulation format at a respective center frequency on an optical spectrum and spanning n bins about the respective center frequency, wherein n is an integer greater than 1, wherein the coherent optical transmitter is configured to tune across the optical spectrum to the respective center frequency and to use the n bins based on the configured modulation format, and wherein the n bins is an amount of the optical spectrum needed based on the configured modulation format,
wherein the respective center frequency and the n bins are specified to the coherent optical transmitter by a management system for Operations, Administration, Maintenance, and Provisioning (OAM&P) functions.

US Pat. No. 10,461,879

DEVICE AND METHOD FOR TRANSMITTING WAVELENGTH DIVISION MULTIPLEXED OPTICAL SIGNAL

FUJITSU LIMITED, Kawasak...

1. An optical transmission device, comprising:a first optical amplifier configured to amplify a wavelength division multiplexed optical signal received via an optical fiber;
a wavelength selective switch configured to control optical powers of respective wavelength channels multiplexed in the wavelength division multiplexed optical signal that is amplified by the first optical amplifier;
a second optical amplifier configured to amplify the wavelength division multiplexed optical signal output from the wavelength selective switch;
an optical channel monitor configured to detect optical powers of respective wavelength channels multiplexed in the wavelength division multiplexed optical signal; and
a processor configured to:
control a gain of the first optical amplifier based on initial setting information,
calculate an average optical power of the plurality of wavelength channels multiplexed in the wavelength division multiplexed optical signal that is amplified by the first optical amplifier based on the optical powers detected by the optical channel monitor, and
correct the gain of the first optical amplifier such that the average optical power of a plurality of wavelength channels multiplexed in the wavelength division multiplexed optical signal that is amplified by the first optical amplifier approaches a target level after a specified period of time has elapsed from when the gain of the first optical amplifier is controlled based on the initial setting information.

US Pat. No. 10,461,878

POLARIZATION DIVERSE WAVELENGTH SELECTIVE SWITCH

Finisar Corporation, Hor...

1. A dual-source wavelength selective switch comprising:a) a first source comprising a first plurality of ports and carrying a first group of beams and a second source comprising a second plurality of ports and carrying a second group of beams;
b) a first and second polarizing port selecting module element, the first source transmitting a plurality of beams from the first group of beams to the first polarizing port selecting module element and the second source transmitting a plurality of beams from the second group of beams to the second polarizing port selecting module element, the first and second polarizing port selecting module elements generating a respective first and second output beam that are orthogonally polarized;
c) a first beam confining module coupled to the first and second polarizing port selecting module elements, the first beam confining module confining and realigning the first and second output beam that are orthogonally polarized along a direction of propagation to generate confined and realigned orthogonally polarized beams;
d) a collimating element positioned in the path of the confined and realigned orthogonally polarized beams;
e) a wavelength dispersive element positioned in the path of the confined and realigned orthogonally polarized beams for spatially dispersing individual wavelength channels;
f) a focusing element positioned in the path of the confined and realigned orthogonally polarized beams for focusing the beams;
g) a first polarization beam splitter coupled to the focusing element for separating at least one of the first and second output beams that are orthogonally polarized into first and second orthogonal polarization components; and
h) a processing device positioned in the path of the confined and realigned orthogonally polarized beams that includes a series of independent wavelength processing elements for separately processing each of the spatially dispersed individual wavelength channels thereby steering the spatially dispersed individual wavelength channels along predetermined paths such that the first source is configured to switch an optical beam from one of the first plurality of ports to another one of the first plurality of ports and independently the second source is configured to switch an optical beam from one of the second plurality of ports to another one of the second plurality of ports.

US Pat. No. 10,461,877

DEVICE AND METHOD OF CONFIGURABLE SYNCHRONIZATION SIGNAL AND CHANNEL DESIGN

Intel IP Corporation, Sa...

1. An apparatus of user equipment (UE) comprising:a transceiver arranged to communicate with an evolved NodeB (eNB); and
processing circuitry arranged to:
configure the transceiver to receive a primary synchronization signal (xPSS) transmission and one of a secondary synchronization signal (xSSS) and a synchronization channel (xS-SCH) transmission after the xPSS transmission, comprising one of:
a plurality (Nrep) of xPSS symbols each comprising an xPSS subcarrier spacing an integer times a PSS subcarrier spacing and an xPSS duration the integer divided by a PSS duration, and
an Interleaved Frequency Division Multiple Access (IFDMA) structure comprising sets of xPSS symbols separated by non-xPSS symbols;
obtain a physical layer cell identification and achieve synchronization with the eNB using the xPSS transmission;
configure the transceiver to communicate with the eNB after synchronization is achieved with the eNB; and
configure the transceiver to receive information regarding the xPSS transmission from a primary cell (Pcell) via UE-specific dedicated Radio Resource Control (RRC) signaling, the information including at least one of an indication of whether the xPSS transmission is one of a beamformed and a repeated xPSS transmission, an indication of whether Power Spectral Density (PSD) boosting is being used for the xPSS transmission, an indication of whether a cyclic prefix (CP) is used for the xPSS transmission and a type of the CP, and a periodicity, an aggregation level (K) and a repetition level of the xPSS transmission.

US Pat. No. 10,461,876

TECHNIQUES FOR TRANSMITTING OR USING A PULL-IN SIGNAL TO LOCATE A SYNCHRONIZATION CHANNEL

QUALCOMM Incorporated, S...

1. A method for wireless communications at a wireless device, comprising:searching for a synchronization channel on a first raster point of a frequency raster identified for synchronization channel transmissions, the frequency raster comprising a plurality of raster points in a radio frequency spectrum;
identifying a pull-in signal on the first raster point;
determining, from the pull-in signal, a second raster point of the frequency raster on which the synchronization channel is transmitted; and
receiving the synchronization channel on the second raster point.

US Pat. No. 10,461,875

NETWORK NODE AND A METHOD THEREIN, AND A RADIO BASE STATION AND A METHOD THEREIN FOR PROTECTING CONTROL CHANNELS OF A NEIGHBOURING RADIO BASE STATION

TELEFONAKTIEBOLAGET LM ER...

1. A method performed by a first Radio Base Station (RBS) for protecting control channels of a neighbouring second RBS, the first RBS and the second RBS being operable in an Orthogonal Frequency Division Multiplexing (OFDM) based radio communication network, the method comprising:determining at least one subframe out of a predetermined number of subframes in which control channels of the first RBS are to be transmitted with reduced transmission power in relation to a nominal transmission power; and
informing the second RBS of the determined at least one subframe;
wherein determining the at least one subframe is performed independently of in which subframe(s) data channels of the first RBS are to be transmitted with reduced transmission power; and
wherein, for each subframe of the determined at least one subframe, the control-channel transmissions of the first RBS are performed in a control region that spans up to the first three OFDM symbols of the subframe, and wherein the method further includes indicating to the second RBS that the first RBS will, for each of the determined at least one subframe, transmit the first three OFDM symbols with the reduced transmission power, irrespective of whether the control region in each such subframe spans the three first OFDM symbols.

US Pat. No. 10,461,874

OPTICAL LINE TERMINAL EFFICIENTLY UTILIZING MULTILANE AND PASSIVE OPTICAL NETWORK COMPRISING THE OPTICAL LINE TERMINAL

ELECTRONICS AND TELECOMMU...

1. A method of transmitting, by an optical line terminal (OLT) including a first queue and a second queue, a user frame, the method comprising:storing the user frame in the first queue of the OLT, the first queue corresponding to an optical network unit (ONU) that receives the user frame;
transmitting the user frame stored in the first queue to the second queue of the OLT;
storing the transmitted user frame in the second queue of the OLT, the second queue corresponding to a transmission rate supported by the ONU; and
outputting an envelope payload stored in the second queue to a lane that connects the OLT and the ONU, according to whether the lane is in use,
wherein the storing of the user frame in the first queue comprises:
generating a hash value from a destination address included in the user frame;
searching a table that stores a physical layer identifier (PLID) of the ONU based on the hash value, and acquiring the PLID of the ONU; and
storing the user frame in the first queue corresponding to the acquired PLID.

US Pat. No. 10,461,873

DISAGGREGATED HYBRID OPTICAL TRANSPORT NETWORK, INTERNET PROTOCOL, AND ETHERNET SWITCHING SYSTEM

Fujitsu Limited, Kawasak...

1. An optical transport network (OTN), Internet Protocol (IP), and Ethernet switching system comprising:an Ethernet fabric including a set of M Ethernet switches each comprising a set of N switch ports, wherein a variable i having a value ranging from 1 to M to denote the ith Ethernet switch of the set of M Ethernet switches and a variable j having a value ranging from 1 to N to denote the jth switch port of the set of N switch ports;
a set of O input/output (IO) devices each comprising:
a set of M Ethernet ports, wherein a variable u having a value ranging from 1 to O to denote the uth IO device of the set of O IO devices, and wherein the jth Ethernet port of the uth IO device is connected to the uth switch port of the ith Ethernet switch;
an IO side packet processor (IOSP) configured to:
establish a set of M hierarchical virtual output queues (H-VOQs) each comprising a set of N ingress-IOSP queues (I-IOSPQs) and I-VOQs;
create M virtual lanes (v-lanes) including a first v-lane and a second v-lane, each of the M v-lanes corresponds to a respective H-VOQ of the set of M H-VOQs;
create A equal cost multi-path (ECMP) pipes including B ECMP pipes and C ECMP pipes, each of the A ECMP pipes connects to one of the M v-lanes, each of the B ECMP pipes connects to the first v-lane, and each of the C ECMP pipes connects to the second v-lane;
generate micro-flows by 5-Tuple look-up based on packet header information of a received IP packet and an I-IOSP forwarding information base (FIB);
distribute the micro-flows into the A ECMP pipes; and
queue the IP packet including first metadata to an I-IOSPQ of an H-VOQ corresponding to an egress IO device and a switch number of a corresponding Ethernet switch based on the micro-flows and an identified micro-flow for an ECMP hash key in a ECMP pipe hash of the IOSP.

US Pat. No. 10,461,872

METHODS FOR TRANSPORTING DIGITAL MEDIA

Audinate Pty Limited, Ul...

1. A data network suitable for transporting at least one of audio and video packets, the network comprising:a master clock device to generate a system time signal for the network;
a plurality of network devices interconnected such that the network devices can send at least one of audio and video packets to other network devices, and to receive at least one of audio and video packets from other network devices;
wherein at least one network device is configured to receive at least one of audio and video signals from a media device and to transmit at least one of audio and video signals to a media device; and
wherein, the network devices are coupled to the master clock device and use the system time signal and a network time protocol to generate a local clock signal synchronised to the system time signal for both rate and offset, the local clock signal governing both the rate and offset of the received or transmitted at least one of audio and video signals.

US Pat. No. 10,461,871

MANAGEMENT APPARATUS AND INFORMATION PROCESSING SYSTEM

FUJITSU LIMITED, Kawasak...

1. A management apparatus, comprising:a memory; and
a processor coupled to the memory and the processor configured to:
broadcast an activation request to a plurality of information processing devices having a reception period during which the activation request is received, the reception period occurring in a predetermined cycle;
receive a confirmation response from first information processing devices among the plurality of information processing devices, the first information processing devices receiving the activation request;
issue an activation instruction to a predetermined number of second information processing devices among the first information processing devices, the activation instruction instructing to activate the second information processing devices;
issue, to the first information processing devices other than the second information processing devices, an activation prohibition instruction to prohibit activation;
calculate a cycle of the reception period to make an average number of information processing devices which transmit the confirmation response corresponding to the activation request be a predetermined expectation value, basis of a number of third information processing devices among the plurality of information processing devices, the third information processing devices not being activated; and
set the calculated cycle, as the predetermined cycle, in at least one of the plurality of information processing devices.

US Pat. No. 10,461,870

PARALLEL IDENTIFICATION OF MEDIA SOURCE

iHeartMedia Management Se...

1. A method for use in a computing device implementing an identification server, the method comprising:obtain, at the identification server, first representations of broadcast content broadcast by a plurality of different media stations;
storing each of the first representations of broadcast content in separate buffers as buffered representations, wherein particular separate buffers are associated with particular media stations of the plurality of different media stations;
receiving, at the identification server, a second representation of media content captured by an end user device;
performing comparisons in parallel between the second representation of media content and each of a plurality of the buffered representations; and
identifying, at the identification server, a media station associated with the second representation of media content based, at least in part, on a result of the comparisons.

US Pat. No. 10,461,869

METHOD FOR DOWNLINK POWER TESTS, TEST SYSTEM AS WELL AS TEST SETUP

1. A method for downlink power tests of a device under test using a test system comprising a signal generator, a control unit and a test chamber having a quiet zone, the method comprising:arranging said device under test in said quiet zone;
generating a downlink signal with a predefined downlink power level in said quiet zone by said signal generator;
measuring in a first test phase a first absolute power level received by said device under test and transmitting said measured first power level to said control unit;
determining by said control unit whether said measured first power level lies within a predefined first range around said predefined downlink power level,
if said measured first power level lies within a predefined first range, repeatedly measuring subsequent power levels received by said device under test in a second test phase and transmitting said measured subsequent power levels to said control unit; and
determining by said control unit whether said measured subsequent power levels lie within a predefined second range around the measured first power level with respect to the current downlink power level.

US Pat. No. 10,461,868

SYSTEMS AND METHODS FOR REDUCING UNDESIRABLE BEHAVIORS IN RF COMMUNICATIONS

CalAmp Wireless Networks ...

1. A vehicle telematics device, comprising:a processor;
a transceiver coupled to the processor to receive data to be transmitted;
an amplifier coupled to the transceiver to receive a transceiver output signal, the amplifier coupled to the processor to receive an amplification control signal to control the amplification of the transceiver output signal by the amplifier; and
a memory coupled to the processor, the memory storing a transmission control application;
wherein the transmission control application directs the processor to:
format the data, including prepending a buffer signal to the data before data modulation begins, to be transmitted by the transceiver;
generate the amplification control signal;
direct the amplifier to sequentially amplify the transceiver output signal based on the amplification control signal;
transmit the formatted data; and
direct the amplifier to sequentially de-amplify the transceiver output signal based on the amplification control signal;
wherein the transmission control application further directs the processor to dynamically adjust the sequential amplification and the sequential de-amplification of the amplifier based upon monitored conditions of the transceiver.

US Pat. No. 10,461,867

TRANSIMPEDANCE AMPLIFIER FOR HIGH-SPEED OPTICAL COMMUNICATIONS BASED ON LINEAR MODULATION

KNOWLEDGE DEVELOPMENT FOR...

1. An optical receiver circuit (200) comprising:at least one photo detector (207) configured to convert a received light signal to an input current signal,
a transimpedance amplifier circuit (201) with an input to receive the input current signal from the at least one photo detector (207) and being configured to convert the received input current signal to an output voltage signal to generate an output signal of the transimpedance amplifier circuit (201), wherein the transimpedance amplifier circuit comprises a plurality of gain amplifier stages (209, 210, 211),
a DC restoration component (205), wherein the DC restoration component (205) is configured to receive the output voltage signal of the transimpedance amplifier circuit (201) for restoring the DC component of the received current signal and configured for outputting a corresponding current signal,
an automatic gain control component (204) configured for controlling via at least one programmable feedback resistor (226, 227) the equivalent transimpedance of the transimpedance amplifier circuit based on the signal output by the DC restoration component (205) to provide a constant output voltage amplitude for different current ranges of the input current signal;
wherein at least some of the gain amplifier stages (209, 210, 211) comprise a gain amplifier (212, 213, 214) and at least one local programmable feedback resistor (215, 216, 217, 218, 219, 220, 224) for controlling the gain of the respective gain amplifier stage (209, 210, 211, 214), wherein some of the local programmable feedback resistors are arranged to shorten the outputs of some of the gain amplifier stages (224), and wherein the automatic gain control component (204) is further configured to control at least some of the local programmable feedback resistors (215, 216, 217, 218, 219, 220) of the gain amplifier stages based on the signal output by the DC restoration component (205), and
wherein the at least one programmable feedback resistor (227, 227) for controlling the equivalent transimpedance of the transimpedance amplifier circuit (201) is arranged between the input of transimpedance amplifier circuit and the output signal of the transimpedance amplifier circuit.

US Pat. No. 10,461,866

LINEARIZED OPTICAL DIGITAL-TO-ANALOG MODULATOR

Ramot at Tel-Aviv Univers...

1. A modulation system for modulating and transmitting an optical signal over at least one optical fiber in response to an input digital data word of N bits, the modulation system comprising:an input enabled for receiving the digital data word into the modulation system;
an electrically controllable modulator having one or more waveguide branches, where each branch receives an input of an unmodulated optical signal;
a digital to digital converter enabled for converting the N bits of the input digital data word to a digital drive vector corresponding to M drive voltage values, where M>N and N>1;
the electrically controllable modulator further enabled for coupling the drive voltage values corresponding to the digital drive vector to the unmodulated optical signal(s), said coupling enabling pulse modulation of the unmodulated optical signal(s), thereby generating pulse modulated optical signal(s), and outputting said pulse modulated optical signal(s) to one or more outputs;
the one or more outputs enabled for transmitting the pulse modulated optical signal(s) over at least one optical fiber.

US Pat. No. 10,461,865

CONTAINING DEVICE OF OPTICAL TRANSCEIVER

Delta Networks, Inc., Ta...

1. A containing device for affixing a plurality of optical transceivers, wherein each of the optical transceivers comprises a first surface and a second surface opposite to the first surface, and the containing device comprises:a housing; and
at least one passage, formed in the housing and comprising a first abutting surface and a second abutting surface, wherein the optical transceivers are disposed in the passage, wherein when the containing device moves along a first direction relative to the optical transceivers, the first abutting surface contacts the first surfaces of the optical transceivers, and when the containing device moves along a second direction relative to the optical transceivers, the second abutting surface contacts the second surfaces of the optical transceivers, wherein the first direction is opposite to the second direction, wherein the distance between the first abutting surface and the second abutting surface is the same as or greater than the distance between the first surface and the second surface.

US Pat. No. 10,461,864

CHANNEL BONDING TECHNIQUES IN A NETWORK

Calix, Inc., Petaluma, C...

1. A method of virtually bonding together at least two physical channels in an optical network terminal (ONT) of a passive optical network (PON), the method comprising:receiving, via the ONT, a plurality of frames from a network device;
classifying, using a processor of the ONT, the plurality of frames into one of a plurality of services;
assigning the service to the at least two physical channels of the ONT, wherein each physical channel is associated with a corresponding laser of the ONT, and wherein each laser of the ONT is configured to transmit at a different wavelength; and
transmitting the plurality of frames of the service toward an optical line terminal (OLT) using at least two different wavelengths corresponding to the at least two physical channels during an assigned time slot.

US Pat. No. 10,461,863

OPTICAL SOURCE, COMMUNICATIONS NETWORK OPTICAL APPARATUS AND METHOD OF PROVIDING AN OPTICAL SIGNAL

Telefonaktiebolaget LM Er...

1. An optical source comprising:a first laser arranged to generate a first optical signal having a first state of polarization and a first optical frequency;
a second laser arranged to generate a second optical signal having a second state of polarization, substantially orthogonal to the first state of polarization, and having a second optical frequency, different to the first optical frequency by a preselected frequency difference, ??;
a polarization beam coupler arranged to combine the first optical signal and the second optical signal into a composite optical signal comprising both the first optical signal and the second optical signal having said substantially orthogonal states of polarization;
an output arranged to output the composite optical signal; and
a feeder optical fiber coupled at one end to the output and having a polarization mode dispersion coefficient and a length,wherein the preselected frequency difference, ??, is inversely proportional to a differential group delay, ?, which is proportional to the polarization mode dispersion coefficient and the length of the feeder optical fiber.

US Pat. No. 10,461,862

SUBSEA FIBER OPTICAL TERMINATION MODULE

SIEMENS AKTIENGESELLSCHAF...

1. A subsea fiber optical termination for terminating at least one fiber optical cable, the subsea fiber optical termination being configured for deployment in a subsea environment, the subsea fiber optical termination, comprising:at least one fiber optical termination to terminate a fiber optical cable, the fiber optical cable including a plurality of optical fibers, wherein the at least one fiber optical termination includes a high-pressure section and a low-pressure section therein, wherein when deployed in the subsea environment, a pressure in the high-pressure section is relatively higher than a pressure in the low-pressure section;
at least one optical connector;
at least one connecting tube, the at least one connecting tube containing one or more of the plurality of optical fibers, wherein the at least one connecting tube is configured to connect one or more of the plurality of optical fibers from the high-pressure section to the at least one optical connector; and
a support structure including
at least one recess to accommodate the at least one optical connector, and at least one support element configured to connect the at least one fiber optical termination to the support structure, wherein
the at least one fiber optical termination includes
a separating portion, to separate the low-pressure section from the high-pressure section,
at least one opening, configured to connect the low-pressure section to the high-pressure section, and
at least one fiber optical penetrator, each of the at least one fiber optical penetrator being configured to supply at least one optical fiber from the low-pressure section through a corresponding opening in the separating portion to the high-pressure section, and each of the at least one fiber optical penetrator being configured to provide at least one seal between the low-pressure section and the high-pressure section of the at least one fiber optical termination.

US Pat. No. 10,461,861

PHOTOVOLTAIC RECEIVER OPTIMISED FOR COMMUNICATION BY CODED LIGHT

Garmin Switzerland GmbH, ...

1. A communication device for communication by coded light in which the communication has an initial signal-to-noise ratio, denoted SNR1, that is variable depending on the illumination conditions, the communication device comprising at least one light receiver of photoreceptor type including an anode and a cathode and having an initial shunt resistance with a value Rsh1, the receiver being liable to be exposed simultaneously to a source of coded light carrying a signal and to a source of uncoded light,wherein said anode and cathode are short-circuited by at least one short-circuit resistor Rp arranged inside the photoreceptor, with a value Rsh2 chosen such that the new value of the shunt resistance of said photoreceptor, denoted Rsh3 and resulting from the connection of the initial shunt resistance Rsh1 and of the short-circuit resistor Rp, gives the communication device a new resultant signal-to-noise ratio SNR2 that remains substantially independent of the intensity of said uncoded light,
wherein said photoreceptor is semitransparent and is formed of an array of photovoltaic cells spaced apart from one another by zones of transparency.

US Pat. No. 10,461,860

SCHEDULING METHOD FOR UPLINK AND DOWNLINK OF AN OPTICAL TRANSMISSION SYSTEM

1. A method of allocating transmission time slots in an optical wireless system including (1) a plurality of access points each having a corresponding access point identifier, connected to a wired network and controlled by a network controller, and (2) a plurality of terminals, each having a corresponding terminal identifier, the method comprising:associating an access point among said plurality of access points with each terminal of the plurality of terminals, such that an average quality of an uplink and a downlink between the associated access point and said each terminal is maximum;
determining, via each terminal of the plurality of terminals associated with each of the plurality of access points, coverage information containing access point identifiers of access points of the plurality of access points received by the each terminal; and
allocating downlink transmission time slots to each terminal of the plurality of terminals according to:
when the coverage information of the each terminal includes only the access point identifier of the associated access point associated with the each terminal, allocating via the associated access point a downlink transmission time slot to the downlink between the each terminal and its associated access point, within an available time range managed by the network controller (CFPfreedown(APn));
when the coverage information of the each terminal includes a plurality of the access point identifiers, allocating via the network controller a downlink transmission time slot to the downlink between the each terminal and its associated access point, within an available time range (CFPfreedown(APn)) and correspondingly eliminating the downlink transmission time slot thus allocated from the available time ranges of access points belonging to the coverage information of the each terminal.

US Pat. No. 10,461,859

METHOD OF OUTPUTTING COLOR CODE FOR DATA COMMUNICATION TO DISPLAY SCREEN AND METHOD OF TRANSMITTING DATA USING COLOR CODE

1. A processor-implemented method of outputting, for data communication, color codes to a display screen, the method comprising:determining respective locations of a plurality of sections, each section divided in the display screen, wherein the respective locations of the plurality of sections each has a different binary code;
generating the color codes, using a color code table for the data communication, by mapping a predetermined respective color to each of the plurality of sections corresponding to source data to be communicated; and
outputting the predetermined respective color to the display screen.

US Pat. No. 10,461,858

VEHICLE COMMUNICATIONS USING VISIBLE LIGHT COMMUNICATIONS

1. An apparatus comprising:a pixel array having a plurality of photosensitive detectors, a first subset of the plurality of photosensitive detectors configured to capture an image of a light source, a second subset of the plurality of photosensitive detectors configured to capture data from an encoded pulsed light signal of the light source; and
processing circuitry configured to process data captured by pixels of the pixel array to provide image information and to detect data on an encoded pulsed light signal, processing circuitry configured to process data by:
sampling the light source at a first ratio corresponding to a sampling rate of the image to a sampling rate of the encoded pulsed light signal; and
detecting a data source in the light source, and based thereon, sampling the light source at a second ratio, the sampling rate of the encoded pulsed light signal in accordance with the second ratio being greater than the sampling rate of the encoded pulsed light signal in accordance with the first ratio.

US Pat. No. 10,461,857

CLOCK RECOVERY FOR A CODED LIGHT RECEIVER

SIGNIFY HOLDING B.V., Ei...

1. A signal processing module for receiving a coded light signal from light captured by a rolling-shutter camera, wherein the coded light signal comprises a periodically repeating message repeating with a message period; and wherein the signal processing module is configured to receive the coded light signal by performing operations of:receiving a respective portion of the message in each of a plurality of frames captured by the rolling-shutter camera, with different ones of said portions being received in different ones of the frames;
based on each respective one of a discrete group of trial values of the message period, using the respective trial value to reconstruct a respective first version of the message from the portions received in a first subset of said frames, and to reconstruct a respective second version of the message from the portions received in a second subset of said frames, wherein one or more of the frames in the second subset are not members of the first subset;
for each of the trial values, generating a respective value of a measure of similarity between the respective reconstructed first and second versions of the message; and
determining an estimate of the message period based on the values of said measure of similarity, and determining an output version of the message based on said estimate.

US Pat. No. 10,461,856

WIRELESS TRANSMISSION OF SERVER STATUS INFORMATION

Lenovo Enterprise Solutio...

1. A system, comprising:a wireless communication device operable to establish a wireless connection and transmit server status information over the wireless connection; and
an optical sensor operable to detect optical signals from an optical source of a server,
wherein the wireless communication device and the optical sensor are coupled together by a physical or wireless connection.

US Pat. No. 10,461,855

METHOD OF COMMUNICATION LINK ACQUISITION USING SEARCH PATTERN

X Development LLC, Mount...

1. A method comprising:detecting, by one or more processors, a misalignment between a first optical system of a first communication device and a second optical system of a second communication device;
rotating, by the one or more processors, the second optical system according to a series of positions ordered in increasing distance from a starting position;
capturing, by the one or more processors, a set of frames for each of the series of positions at the second communication device;
determining, by the one or more processors, whether a beacon beam transmitted from the first communication device is detected in one or more of the captured frames at the second communication device;
digitally cropping, by the one or more processors, a frame of the one or more of the captured frames after the beacon beam is detected, the digitally cropped frame including a pixel region where the beacon beam is detected in the frame; and
forming, by the one or more processors, a communication link between the first communication device and the second communication device when the beacon beam is detected.

US Pat. No. 10,461,854

OPTICAL CIRCULATOR FOR FREE SPACE OPTICAL COMMUNICATION

X Development LLC, Mount...

1. A system, comprising:an optical circulator having a first port, a second port, and a third port;
a single mode fiber coupled to the first port of the optical circulator;
a double clad fiber coupled to the second port of the optical circulator; and
a multimode fiber coupled to the third port of the optical circulator;
a transmitter coupled to the single mode fiber, the transmitter transmitting first optical signals using a first channel, wherein the transmitter comprises a tunable transmitter;
a receiver coupled to the multimode fiber, the receiver receiving second optical signals using a second channel simultaneously with the transmitting by the transmitters; and
a multimode tunable filter coupled between the multimode fiber and the receiver;
wherein the optical circulator routes the first or second optical signals among the single mode, double clad, and multimode fibers.

US Pat. No. 10,461,853

OPTICAL MEMORY GATES

Hewlett Packard Enterpris...

1. A method, comprising:receiving at least one optical signal via a waveguide of an optical memory gate;
comparing a wavelength of the at least one optical signal to a resonant wavelength associated with a resonator;
reading out a value that is stored in the resonator via the at least one optical signal when the wavelength of the at least one optical signal matches the resonant wavelength;
transmitting the at least one optical signal with the value that is read out;
receiving an optical pump signal associated with a power level;
routing the optical pump signal into a feedback loop via a second resonator that applies a phase shift to the optical pump signal; and
monitoring a total power level of the optical memory gate.

US Pat. No. 10,461,852

SUBMARINE CABLE NETWORK ARCHITECTURE

Facebook, Inc., Menlo Pa...

15. A method, comprising:monitoring a status of a channel associated with an offshore switching unit connected to a trunk submarine cable, wherein a plurality of feeder submarine cables are connected to the offshore switching unit;
detecting a reduction in availability of one or more data communication channels of the plurality of feeder submarine cables; and
dynamically connecting a data communication channel of a selected feeder submarine cable among the plurality of feeder submarine cables with a data communication channel of the trunk submarine cable based at least in response to the detected reduction in availability of the one or more data communication channels of the plurality of feeder submarine cables.

US Pat. No. 10,461,851

PREDICTING OPTICAL TRANSCEIVER FAILURE

Facebook, Inc., Menlo Pa...

1. A method, comprising:calibrating a monitoring sensitivity of a power monitor that monitors a power output of an optical network transceiver device;
monitoring an amount of current provided to a laser diode of the optical network transceiver device;
detecting that the amount of current has reached a threshold limit;
monitoring the power output of the optical network transceiver device using the power monitor, including by determining a range based on a difference between a beginning-of-life transceiver power output level and an end-of-life transceiver power output level, determining a threshold magnitude that is a relative portion of the determined range, and detecting whether the power output drops by a magnitude that is greater than the threshold magnitude associated with the determined range; and
based at least in part on the detection that the amount of current has reached the threshold limit and the monitored power output of the optical network transceiver device, providing an indication associated with a likelihood of failure of the optical network transceiver device.

US Pat. No. 10,461,850

FREQUENCY SYNTHESIS-BASED OPTICAL FREQUENCY DOMAIN REFLECTOMETRY METHOD AND SYSTEM

SHANGHAI JIAOTONG UNIVERS...

8. A frequency synthesis-based optical frequency domain reflectometry system comprising:a reference optical branch and a modulation optical branch homogenous therewith;
a coupling unit; and
a demodulation unit, wherein:
an output end of the reference optical branch and an output end of the modulation optical branch are both connected with the coupling unit, and an output end of the coupling unit is connected with the demodulation unit;
the modulation optical branch comprises an electro-optic modulator, an acousto-optic modulator, an erbium-doped optical fiber amplifier, an optical fiber circulator and a test optical fiber which are sequentially connected in series;
the electro-optic modulator performs a modulation by a single frequency signal to generate an optical comb signal;
the optical comb signal input into the acousto-optic modulator is modulated by a pulse signal to obtain a multi-frequency sweep optical pulse signal, amplified by the erbium-doped optical fiber amplifier, and then output to the optical fiber circulator and the test optical fiber in turn;
a reflecting end of the optical fiber circulator serves as an output of the modulation optical branch and is connected with the coupling unit.

US Pat. No. 10,461,849

FAST OPTICAL LINK CONTROL ADAPTATION USING A CHANNEL MONITOR

1. A method comprising:receiving, at an amplifier, an optical signal;
detecting a plurality of labeled channels of the optical signal, wherein a number of the plurality of labeled channels being received is less than a number of labeled channels previously received;
decoding each label of the plurality of labeled channels to determine a respective wavelength corresponding to each of the plurality of labeled channels;
determining a spectral distribution of the plurality of labeled channels based on the decoding;
adjusting a parameter of the amplifier based on the number of labeled channels being received and the spectral distribution of the plurality of labeled channels; and
amplifying the optical signal received based on the adjusting.

US Pat. No. 10,461,848

CONVEYING HYPOTHESES THROUGH RESOURCE SELECTION OF SYNCHRONIZATION AND BROADCAST CHANNELS

QUALCOMM Incorporated, S...

1. A method of wireless communication by a base station, comprising:determining parameter information of one or more parameters;
selecting, based on the parameter information, synchronization resources from a plurality of candidate resources for transmission of one or more synchronization signals, wherein the selected synchronization resources correspond to the parameter information; and
transmitting the one or more synchronization signals using the selected synchronization resources.

US Pat. No. 10,461,847

TERRESTRIAL WIRELESS POSITIONING IN LICENSED AND UNLICENSED FREQUENCY BANDS

QUALCOMM Incorporated, S...

12. An apparatus for determining a distance from a first wireless entity to a second wireless entity, comprising:a transceiver of the first wireless entity configured to:
transmit a first pilot signal to the second wireless entity at a first time, wherein the first pilot signal is received by the second wireless entity at a second time, and wherein the first time corresponds to the start of a first subframe of a cellular radio access technology (RAT); and
receive a second pilot signal from the second wireless entity at a third time, wherein the second pilot signal is transmitted by the second wireless entity at a fourth time, and wherein the fourth time corresponds to the start of a second subframe of the cellular RAT; and
at least one processor of the first wireless entity configured to:
enable the distance to be determined by a location computing entity based on the first time, the second time, the third time, and the fourth time, and
wherein the first wireless entity is a base station or a user equipment (UE), the second wireless entity is the other of the base station and the UE, and the location computing entity is the first wireless entity, the second wireless entity, or a location server.

US Pat. No. 10,461,846

DISTRIBUTED SIMULCAST ARCHITECTURE

E.F. JOHNSON COMPANY, Ir...

1. A system for providing communication in a distributed land mobile radio (LMR) system architecture, the distributed LMR system architecture comprising one or more subsystems in communication with a data network, the system comprising:a plurality of LMR sites for providing radio communication between land mobile radios associated with the system, the plurality of LMR sites comprising at least one of the one or more subsystems;
one or more subsystem controllers disposed at one or more of the plurality of LMR sites, the one or more of the plurality of LMR sites comprising one or more of the at least one or more subsystems, and one or more of the subsystem controllers having at least an active mode and a standby mode, wherein at least one subsystem controller is configured in the active mode to control communication between one or more of the land mobile radios and to control communication between LMR sites; and
one or more repeaters disposed at one or more of the plurality of LMR sites in the at least one or more subsystems, one or more of the repeaters configured to provide a communication channel for at least one of the land mobile radios to communicate with one or more of the plurality of LMR sites,
wherein one or more repeater has at least an active mode and a standby mode, and wherein at least one repeater is configured in the active mode to initiate at least one of a voter comparator operation and a simulcast controller operation,
wherein the simulcast controller operation comprises transmitting a radio call at least substantially simultaneously by repeaters on the communication channel, and
wherein subsystem controllers in a standby mode are configurable to switch to the active mode upon failure of at least a portion of the one or more sites comprising a subsystem controller operating in the active mode.

US Pat. No. 10,461,845

FLEXIBLE PAYLOAD ARCHITECTURE FOR VHTS AND HTS APPLICATIONS

THALES, Courbevoie (FR)

1. A multibeam telecommunications payload for applications of very-high-throughput space telecommunications or of high-throughput space telecommunications comprising:a first multibeam antenna system of passive antennas, which is configured to receive from satellite receive Rx access station GW spots and transmit to satellite transmit Tx access station GW spots, respectively in a first satellite receive Rx band and a first satellite transmit Tx band; and
a second multibeam antenna system of passive antennas, which is configured to receive from and transmit to a user coverage zone respectively in a second satellite receive Rx band and a second satellite transmit Tx band, by generating multiple satellite receive user spots and multiple satellite transmit user spots;
the payload being wherein it comprises:
a digital core, based on a digital transparent processor DTP, dimensioned through a sufficient number of accesses at input and at output to be connected to all the spots of the access stations and all the user spots, and configured to offer total connectivity and total flexibility of allocation of frequency slots to the access station and user spots; and
an RF switching set, made up of one or more matrices of RF switches on source accesses of user spots in satellite transmit Tx only or in satellite transmit Tx and in satellite receive Rx so as to implement operation by beam hopping on clusters Gj/G?j of Tx and/or Rx user spots for which the number of spots Rj/R?j is less than or equal to the total number P of access station spots.

US Pat. No. 10,461,842

OPEN WIRELESS ARCHITECTURE (OWA) UNIFIED AIRBORNE AND TERRESTRIAL COMMUNICATIONS ARCHITECTURE

1. An airborne mesh network based on Open Wireless Architecture (OWA), said system comprising:a) Ground Airport as mesh gateway connecting nearby multiple aircrafts in the sky with Ground Networks through OWA connections,
b) Mesh Router Aircraft (MRA) as mesh router connecting to said airport (mesh gateway) when close to said airport before landing, after takeoff or passing-by,
c) Ground Cell, as ATG (Aircraft To Ground) gateway, either on ground or at the top of mountain, connecting nearby multiple aircrafts in the sky with Ground Networks through OWA connections,
d) Non-Router Aircraft (NRA) as mesh client or ATG client connecting to said MRA (mesh router) or said Ground Cell (ATG gateway) when far away from said airport,
e) processor and memory in said ATG client to process airborne mobile handover protocol when connecting said NRA with said Ground Cell,
f) processor and memory in said mesh client to process mesh networking protocol when connecting said NRA with said airport through said MRA, and
g) Aircraft Status and Connection Table (ASCT) of mesh network group, distributed to each member aircraft of said group, updating aircraft status (said NRA or said MRA) and connection information among group aircrafts, andwherein NRA connections comprise MRA-NRA mode, Relay+ATG mode and ATG Handover mode.

US Pat. No. 10,461,841

SATELLITE COMMUNICATION NETWORK TERMINAL INSTALLATION METHOD AND SYSTEM

HUGHES NETWORK SYSTEMS, L...

1. A method for installing a terrestrial antenna for a satellite communication network, the method comprising:providing a remote unit to an installation location for the terrestrial antenna, the remote unit being configured to communicate with a satellite of the satellite communication network and including a memory in which is stored antenna information pertaining to positioning of the terrestrial antenna with respect to a virtual beam generated by the satellite, the antenna information being accessible by entering a code that is associated with the virtual beam generated by the satellite;
accessing the antenna information from the memory at the installation location using the code; and
positioning the terrestrial antenna in relation to a virtual beam generated by the satellite based on the antenna information accessed from the memory at the installation location.

US Pat. No. 10,461,840

SUDAC, USER EQUIPMENT, BASE STATION AND SUDAC SYSTEM

Fraunhofer-Gesellschaft z...

1. A Shared User Equipment-Side Distributed Antenna Component (SUDAC) comprising:a first wireless communication interface, configured for using ultra-high frequency in order to establish at least one backend communication link with a base station; and
a second wireless communication interface, configured for using extremely-high frequency in order to establish at least one frontend communication link with a user equipment; and
a processor,
wherein the processor is configured for at least partially forwarding a first user information signal received via the frontend communication link as a first communication signal to be transmitted via the backend communication link while frequency converting the extremely-high frequency to the ultra-high frequency; or
wherein the processor is configured for at least partially forwarding a second communication signal received via the backend communication link as a second user information signal to be transmitted via the frontend communication link while frequency converting the ultra-high frequency to the extremely-high frequency;
wherein the processor is configured for extracting control information from the first user information signal and for controlling forward parameters of the first or the second wireless communication interface based on the control information,
wherein the control information is a transmit power, a modulation scheme or is related to a frequency, a code, a space and/or a time slot to be utilized by the SUDAC;
wherein the forward parameters relates at least to one of a time, a frequency, a space or a code resource of the backend communication link or the frontend communication link; and
wherein the processor is configured for frequency converting the first user information signal received at extremely-high frequency to the first communication signal at the ultra-high frequency and for frequency converting the second communication signal at the ultra-high frequency to the second user information signal at the extremely-high frequency; or
wherein the SUDAC comprises an analog to digital converter configured for digitizing the user information signal received at extremely-high frequency, and a digital to analog converter configured for analogizing a digitalized communication signal to acquire the communication signal at the ultra-high frequency wherein the processor is configured for generating the digitalized communication signal based on the digitalized user information signal.

US Pat. No. 10,461,839

DIGITAL REPEATER SYSTEM

Andrew Wireless Systems G...

1. A digital repeater system for repeating RF signals, the digital repeater system comprising:a receiving section comprising an analog-to-digital converter, the receiving section configured for receiving an RF input signal that includes at least one frequency band having at least one subband associated with at least one communication channel of a telecommunications network, the receiving section being configured to digitize the RF input signal to obtain a digital signal;
a filter device comprising at least one digital filter having a passband for digitally filtering the digital signal, the at least one digital filter being configurable by setting filter coefficients;
a gain control device configurable to set a gain of at least a portion of the digital signal;
at least one transmitting section comprising a digital-to-analog converter, the at least one transmitting section configured for transmitting an RF output signal and for converting the digital signal to the RF output signal for transmission; and
a control unit adapted to configure the filter coefficients of the at least one digital filter in response to a change in the gain setting of the gain control device, wherein the filter coefficients are configured based on the change in the gain setting to optimize group delay.

US Pat. No. 10,461,838

REPEATER AND METHOD FOR OPERATING SUCH A REPEATER

Andrew Wireless Systems G...

1. A telecommunications system, comprising:a master unit;
remote units;
wherein the remote units are configured to communicate with mobile radio terminals and to communicate with the master unit, where at least one of the remote units including a sensor and a control circuit, the sensor being configured to detect a parameter about a coverage environment, the control circuit being configured to cause the at least one of the remote units to switch between a passive operating state and an active operating state based on the parameter; and
wherein the at least one of the remote units transmits signals wirelessly at a higher power in the active operating state as compared to the passive operating state, wherein the control circuit is further configured to cause the at least one of the remote units to switch between the passive operating state and the active operating state at a rate that maintains a transmission of downlink signals by the at least one of the remote units.

US Pat. No. 10,461,837

METHOD AND SYSTEM FOR ALLOCATING RESOURCES FOR RELAYING CHANNELS IN CELLULAR NETWORKS

SONY CORPORATION, Tokyo ...

1. A node of a cellular network, comprising:an interface configured to communicate with a plurality of communication devices attached to the cellular network via a radio link, and
at least one processor configured to allocate first reoccurring time-frequency resources to some of the plurality of communication devices that are assigned to a first set and on the radio link of the cellular network to a first relaying channel, the first relaying channel being established via a first relaying node and between an access point node of the cellular network and the some of the plurality of communication devices that are assigned to the first set,
wherein the at least one processor is further configured to allocate second reoccurring time-frequency resources to some of the plurality of communication devices that are assigned to a second set and on the radio link of the cellular network to a second relaying channel, the second relaying channel being established via a second relaying node and between the access point node of the cellular network and the some of the plurality of communication devices that are assigned to the second set,
wherein at least one of the first relaying node or the second relaying node is a user equipment (UE) selected from the plurality of communication devices,
wherein the first reoccurring time-frequency resources are shared between the communication devices assigned to the first set such that collision may occur between multiple communication devices of the first set attempting to transmit at the same time-frequency resource,
wherein the second reoccurring time-frequency resources are shared between the communication devices assigned to the second set such that collision may occur between multiple communication devices of the second set attempting to transmit at the same time-frequency resource,
wherein the at least one processor is configured to receive, via the interface, a connection message, the connection message indicating a given one of the plurality of communication devices,
wherein the at least one processor is configured to assign the given one of the plurality of communication devices to the first set or the second set in response to receiving the connection message,
wherein the connection message further indicates at least one element selected from the group comprising:
a Machine Type Communication functionality of the given one of the plurality of communication devices; and
a traffic pattern of the given one of the plurality of communication devices, wherein the traffic pattern corresponds to a periodicity or frequency of occurrence with which data to be transmitted is expected to occur, a size of individual data blocks to be transmitted, an overall size of data, or peak times for data to be transmitted; and
wherein the at least one processor is configured to assign the given one of the plurality of communication devices to the first set or the second set depending on the indicated at least one element.

US Pat. No. 10,461,836

DUAL-POLARIZATION BEAMFORMING

TELEFONAKTIEBOLAGET LM ER...

1. A wireless device for dual-polarization beamforming, the wireless device comprising:an antenna array comprising a baseband chain and at least a pair of antenna elements,
wherein each pair of antenna elements comprises a first antenna element and a second antenna element of mutually orthogonal polarizations, and
wherein each pair of antenna elements is operatively connected to the baseband chain.

US Pat. No. 10,461,835

COMMUNICATION METHOD, BASE STATION, AND USER EQUIPMENT

HUAWEI TECHNOLOGIES CO., ...

1. A communication method, comprising:performing, by a base station, beam scanning and alignment together with a first terminal in a first subframe, to determine a beam that is used for sending data in the first subframe, wherein a quantity of beams used for sending data is greater than or equal to 1;
when sending data to the first terminal by using the beam, sending, by the base station, beam information of the beam to a second terminal, wherein the first terminal is a terminal that already has an access to the base station, and the second terminal is a terminal that is yet to access the base station, the beam information comprising at least identification information of the beam and a synchronization signal; and
wherein the synchronization signal is used by a second terminal to synchronize with the base station and the identification information of the beam is used by the first terminal and the second terminal to identify the beam sent by the base station.

US Pat. No. 10,461,834

METHOD AND DEVICE FOR SELECTING AND ALLOCATING TRANSMISSION BEAM INDEX HAVING PRIORITY

Samsung Electronics Co., ...

1. A method of a base station in a wireless communication system, the method comprising:transmitting reference signals using a plurality of beams and information on priorities of the plurality of beams;
receiving, from a terminal, index information on at least one beam selected from the plurality of beams; and
scheduling a beam selected from the at least one beam to the terminal,
wherein the at least one beam is selected from beams having a reference signal received power greater than a predetermined threshold based on the priorities of the plurality of beams, and
wherein the priorities of the plurality of beams are determined based on types of data transmitted through the plurality of beams.

US Pat. No. 10,461,833

METHOD FOR REPORTING CHANNEL STATE INFORMATION IN WIRELESS COMMUNICATION SYSTEM AND APPARATUS FOR THE SAME

LG Electronics Inc., Seo...

1. A method of reporting, by a user equipment (UE), channel state information (CSI) in a wireless communication system, the method comprising:receiving, by the UE and from a base station (BS), downlink control information (DCI) related to an aperiodic CSI report that is to be performed by the UE in a slot n;
determining, by the UE, a value nCQI_ref based on a number of symbols Z? related to a time for computing the CSI;
determining, by the UE, a CSI reference resource as being a slot n?nCQI_ref in a time domain that is to be used for the aperiodic CSI report; and
transmitting, by the UE and to the BS, the aperiodic CSI report in the slot n, based on the CSI reference resource being slot n?nCQI_ref,
wherein the nCQI_ref is a smallest value greater than or equal to ?Z?/Nsymbslot? such that the slot n?nCQI_ref satisfies a valid downlink slot criteria, and
wherein ?·? is a floor function and Nsymbslot is a number of symbols in one slot.

US Pat. No. 10,461,832

CHANNEL STATUS INFORMATION FEEDBACK AND CONTROL METHOD AND DEVICE

1. A method for feeding back channel state information, the method comprising:receiving, by a user equipment, a trigger signaling transmitted by a base station, wherein the trigger signaling is configured to indicate the user equipment to report Channel State Information (CSI) obtained in a specified measurement window; and
reporting, by the user equipment, the CSI measured by the user equipment in the measurement window to the base station;
wherein reporting, by the user equipment, the CSI measured in the measurement window to the base station comprises:
reporting, by the user equipment, CSI measured by the user equipment in a first measurement window to the base station after M sub-frames elapse since the trigger signaling is received, wherein the first measurement window is a measurement window before the trigger signaling is received and closest to a sub-frame in which the trigger signaling is received, and M is an integer more than or equal to 0; or
reporting, by the user equipment, CSI measured by the user equipment in a second measurement window to the base station after M sub-frames elapse following the end of the second measurement window, wherein the second measurement window is a specified measurement window after the trigger signaling is received and closest to a sub-frame in which the trigger signaling is received, and M is an integer more than or equal to 0; or
reporting, by the user equipment, CSI measured by the user equipment in a second measurement window to the base station after M sub-frames elapse since the trigger signaling is received, wherein the second measurement window is a specified measurement window after the trigger signaling is received and closest to a sub-frame in which the trigger signaling is received, and M is an integer more than or equal to 0.

US Pat. No. 10,461,831

CHANNEL STATE INFORMATION REPORT OF HIGH-SPEED MOVING USER EQUIPMENT

LG ELECTRONICS INC., Seo...

1. A method of reporting channel state information (CSI) by a user equipment (UE) in a wireless communication system, the method comprising:measuring primary CSIs in a plurality of antenna units positioned at distributed locations of the UE;
determining reception modes for each of the antenna units based on combined gain of the primary CSIs and determining secondary CSI based on the determined reception mode; and
reporting information on the determined reception mode and the determined secondary CSI to a network,
wherein the primary CSIs include a predetermined number of rank indicator (RI), precoding matrix index (PMI), and channel quality indicator (CQI) sets having quality of a predetermined level or more,
wherein the secondary CSI is determined based on a data rate requirement parameter value and a link stability requirement parameter value,
wherein the link stability requirement parameter value is related to a degree of importance of link stability and the data rate requirement parameter value is related to a degree of importance of data rate,
wherein the secondary CSI is determined based on a set having a common RI and a common PMI among the primary CSIs, when a difference between the data rate requirement parameter value and the link stability requirement parameter value is less than a threshold, and
wherein the secondary CSI is determined based on a set having a largest CQI among the primary CSIs, when the difference between the data rate requirement parameter value and the link stability requirement parameter value is equal to or greater than the threshold.

US Pat. No. 10,461,830

METHODS, NETWORK NODE AND COMMUNICATION DEVICE FOR TRANSMITTING DATA

Telefonaktiebolaget LM Er...

1. A method performed in a network node for transmitting data in a wireless network, the network node being configurable for controlling a multiple input multiple output antenna system, the method comprising:beamforming user specific data streams to one or more communication devices, UE1, . . . , UEK, wherein the beamforming is based on respective channel information available for each of the one or more communication devices, UE1, . . . , UEK;
precoding information streams using a transmit diversity scheme; and
transmitting the beamformed user specific data streams and the diversity-precoded information streams in a same transmission time and frequency resource.

US Pat. No. 10,461,829

MULTIPLE ACCESS METHOD IN A MASSIVE MIMO SYSTEM

TELEFONAKTIEBOLAGET LM ER...

1. A method performed by a Radio Network Node (RNN), wherein the RNN serves a first wireless device and a second wireless device in a wireless communications system, the method comprising:assigning a shared uplink pilot signal to the first wireless device and to the second wireless device;
transmitting, to the first wireless device, an indication of how possible second data intended for the second wireless device will be comprised in a transmission signal to be transmitted from the RNN to the first wireless device;
estimating a combined channel based on a received shared uplink pilot signal from the first wireless device and/or the second wireless device;
determining a beamforming vector for the estimated combined channel; and
transmitting, by using the beamforming vector, the transmission signal to the first wireless device, wherein
the transmission signal comprises first data and the possible second data and
the first data is decodable only by the first wireless device.

US Pat. No. 10,461,828

MILLIMETER WAVE DISTRIBUTED NETWORK ANTENNA SECTOR SWITCH

Intel IP Corporation, Sa...

1. A device of an initiator for performing time division duplex (TDD) sector switch, the device comprising memory and processing circuitry, the processing circuitry coupled to the memory, and the processing circuitry configured to:determine one or more antenna sector configurations based on time division duplex (TDD) beamforming, wherein the one or more antenna sector configurations are associated with first antenna sectors used to communicate with a first station device (STA);
initiate a TDD sector switch with the first STA to switch from the one or more first antenna sectors to one or more second antenna sectors;
cause to send, to the first STA, an action frame comprising TDD sector setting parameters associated with the TDD sector switch;
identify a response frame received from the first STA, wherein the response frame comprises the TDD sector setting parameters; and
perform the TDD sector switch by switching from the one or more first antenna sectors to the one or more second antenna sectors.

US Pat. No. 10,461,827

METHOD AND SYSTEM FOR MULTIPLE-HOP RELAYED DIRECTIONAL WIRELESS COMMUNICATION

SONY CORPORATION, Tokyo ...

1. An apparatus for wireless communication between stations (STAs) using directional transmission/reception, comprising:(a) a wireless communication station (STA) configured for mm-wave communication, in which said STA, and nearby STA instances of the apparatus are configured for performing sector sweep and feedback signaling to exchange antenna sector information;
(b) a transmitter of said wireless communication station (STA) configured for generating directional radio transmissions to other wireless radio communication devices which are in range;
(c) a receiver of said wireless communication station (STA) configured for receiving radio transmissions from other wireless radio communication devices;
(d) a computer processor coupled to said transmitter and said receiver for controlling communications between itself and other wireless radio communication devices;
(e) a non-transitory computer-readable memory storing instructions executable by the computer processor;
(f) wherein said instructions, when executed by the computer processor, perform steps comprising:
(i) exchanging quantized channel gain, or path loss, information of each antenna sector with one or more neighboring stations;
(ii) recording received quantized channel gain information from communication with neighboring stations;
(iii) generating route discovery messages to neighboring stations when establishing a multiple hop routing path from an originating station to a destination station;
(iv) processing received route discovery messages by (A) determining transmit antenna sector for the communication with a neighboring station that generated the route discovery message; (B) determining link metrics with the neighboring station that generated the route discovery message, (C) propagating the route discovery message to a neighbor station if the station is not the destination station; and
(v) determining link metrics, based on channel time utilization information, when establishing the multiple hop routing path.

US Pat. No. 10,461,826

ASSISTING A USER EQUIPMENT (UE) IN REFERENCE SIGNAL MEASUREMENTS BASED ON MEASUREMENT REPORT

QUALCOMM Incorporated, S...

1. A method for wireless communication by a base station (BS), comprising:transmitting, to a user equipment (UE), a request for information regarding one or more beams received by the UE in a synchronization region of a subframe;
receiving, from the UE, a measurement report including the information;
transmitting, to the UE, information for measuring one or more reference signals; and
transmitting, to the UE, additional information regarding direction information associated with the one or more reference signals to be used by the UE to measure the one or more reference signals, wherein the direction information is based, at least in part, on the measurement report.

US Pat. No. 10,461,825

DISTRIBUTED MIMO AND/OR TRANSMIT DIVERSITY IN A CLOUD-RAN SYSTEM

CommScope Technologies LL...

1. A method of reusing a resource element to transmit user data to a plurality of items of user equipment using a downlink transmission mode that uses multiple antenna ports, wherein the downlink transmission mode precodes sequences of symbols using a precoder matrix selected from a codebook, wherein the precoding produces sequences of precoded symbols, the method comprising:performing linear transformations on the sequences of precoded symbols using a distribution matrix, wherein the distribution matrix is configured so that each of a plurality of precoder matrices provides perfect steering of transmit power to a corresponding one of a plurality of disjoint subsets of the antenna ports used for the downlink transmission mode;
determining if the resource element can be reused to transmit user data to the plurality of items of user equipment; and
when the resource element can be reused, reusing the resource element to transmit user data to the plurality of items of user equipment by:
assigning a respective simulcast group to each of the plurality of items of user equipment that uses a respective one of the plurality of disjoint subsets of antenna ports; and
transmitting user data to each of the items of user equipment using a respective precoder matrix that provides perfect steering to the respective subset of antenna ports in the respective simulcast group for that item of user equipment.

US Pat. No. 10,461,824

LINEAR PRECODING IN FULL-DIMENSIONAL MIMO SYSTEMS AND DYNAMIC VERTICAL SECTORIZATION

QUALCOMM Incorporated, S...

1. A method for wireless communication by a base station, comprising:generating a port precoding matrix which compresses a larger number of antenna elements to a smaller number of antenna ports;
transmitting user equipment (UE)-specific port reference signals to a UE using the port precoding matrix, wherein each of the UE-specific port reference signals corresponds to one of the antenna ports;
receiving feedback regarding channel state information (CSI) measured by the UE based on the UE-specific port reference signals, wherein the CSI comprises quantized measurements for at least one of the antenna ports corresponding to more than one of the antenna elements;
mapping multiple data layers to UE-specific antenna ports based on the feedback regarding CSI;
mapping each of the UE-specific antenna ports to physical antenna elements, wherein mapping each of the UE-specific antenna ports to physical antenna elements occurs after mapping the multiple data layers to the UE-specific antenna ports; and
transmitting data to the UE, based on the mapping of the multiple data layers and the mapping of antenna ports to the physical antenna elements.

US Pat. No. 10,461,823

APERTURE CONSTRAINT FOR NEW RADIO UPLINK MULTIPLE-INPUT MULTIPLE-OUTPUT

NOKIA TECHNOLOGIES OY, E...

1. A method comprising:receiving or calculating aperture constraint parameters, wherein the aperture constraint parameters are indicated by a network node in a downlink measurement indication; and
applying the aperture constraint parameters to limit uplink precoder candidates for transmission.

US Pat. No. 10,461,822

COMMUNICATION METHOD, NETWORK DEVICE, AND TERMINAL DEVICE

HUAWEI TECHNOLOGIES CO., ...

11. A communication method, comprising:determining, by a terminal device, and according to a value of a resource bundling granularity, at least one resource block bundling group in a scheduling resource corresponding to the terminal device, wherein the value of the resource bundling granularity is one of a first-type value and a second-type value, and wherein a resource block bundling group determining method corresponding to the first-type value is different from a resource block bundling group determining method corresponding to the second-type value; and
receiving, by the terminal device by using the at least one resource block bundling group, data transmitted by a network device.

US Pat. No. 10,461,821

FACILITATION OF BEAMFORMING GAINS FOR FRONTHAUL LINKS FOR 5G OR OTHER NEXT GENERATION NETWORK

1. A method, comprising:receiving, by a wireless network device comprising a processor, an uplink reference signal associated with a channel;
based on a characteristic of the channel, generating, by the wireless network device, a first precoder matrix;
in response to the generating the first precoder matrix, determining, by the wireless network device, a channel coefficient associated with a linear combination of basis vectors associated with the wireless network device;
in response to the determining the channel coefficient, transmitting, by the wireless network device, the channel coefficient to a radio unit device;
based on receiving channel state data from a mobile device and in response to the transmitting the channel coefficient to the radio unit device, generating, by the wireless network device, a second precoder matrix; and
in response to the generating the second precoder matrix, applying, by the wireless network device, the second precoder matrix to a transmission, associated with the channel state data, and a demodulation reference signal associated with the mobile device.

US Pat. No. 10,461,820

WIRELESS COMMUNICATION USING WIRELESS ACTIVE ANTENNAS

RF DSP INC., Irvine, CA ...

1. Wireless Smart Antenna apparatus comprising a Base Station Side Radio Unit (BSSRU) and one or more User Equipment Side Radio Units (UESRUs),wherein if the BSSRU is distributed in a coverage area of a Base Station (BS), the BSSRU communicates with the BS using a first frequency band F1 and simultaneously communicates with a plural of UESRUs selected from said one or more UESRUs using a second frequency band F2, OR wherein if the BSSRU is integrated into a BS, the BSSRU communicates with the BS baseband through circuits and communicates with a plural of UESRUs selected from said one or more UESRUs in the second frequency band F2 using Multi-User Multiple Input Multiple Output (MU-MIMO) spatial multiplexing,
wherein a UESRU selected from said one or more UESRUs communicates with one or more distributed OR integrated BSSRUs using the second frequency band F2 and simultaneously communicates with one or more User Equipment (UEs) using the first frequency band F1, and
wherein a UESRU selected from said one or more UESRUs with a plural of radio transmitting and receiving paths and antennas, or a plural of UESRUs selected from said one or more UESRUs collectively, simultaneously communicate in the F1 frequency band with a plural of UEs distributed over the coverage area of the UESRU or the plural of UESRUs using MU-MIMO spatial multiplexing.

US Pat. No. 10,461,819

MEDIA ACCESS CONTROL RANGE EXTENSION

Intel IP Corporation, Sa...

1. A device, the device comprising memory and processing circuitry configured to:cause to append a training field to at least one of one or more beacon frames;
cause to send the one or more beacon frames directionally using a sector sweep to one or more responder devices during a first interval;
determine an extended schedule element to be sent to the one or more responder devices, the extended schedule element including a field indicating one or more directional antenna sectors allocated by the device for receiving communications from the one or more responder devices during a second interval;
identify a first frame from a first responder device, during the second interval, wherein the first frame is received on a directional antenna sector of the one or more directional antenna sectors corresponding to an operating sector of the first responder device; and
cause to send a first acknowledgment frame to the first responder device, wherein the first acknowledgment frame acknowledges reception of the first frame.

US Pat. No. 10,461,818

SYSTEM AND METHOD FOR SPATIAL MULTIPLEXING IN LOS ENVIRONMENTS

Cable Television Laborato...

1. An analog, line of sight (LoS) spatial multiplexing system, comprising:a transmit analog processor;
a transmit array configured with a first transmit element and a second transmit element spaced apart by no less than a distance D, the first transmit element in communication with the transmit analog processor for receiving a first modulation symbol for transmitting as a first transmit signal, the second transmit elements in communication with the transmit analog processor for receiving a second modulation symbol for transmitting as a second transmit signal;
a receive array configured with a first and a second receive element, the first receive element configured to receive a first receive signal comprising a combination of at least the first and the second transmit signals, the second receive element configured to receive a second receive signal comprising a different combination of at least the first and second transmit signals; and
a receive analog processor in communication with the receive array, utilizing at least the distance D, for processing the first and second receive signals in the analog domain to recover at least one of the first transmit signal and the second transmit signal.

US Pat. No. 10,461,817

ENHANCED MULTIPLE-INPUT MULTIPLE-OUTPUT BEAM REFINEMENT PROTOCOL TRANSMIT SECTOR SWEEP

Intel IP Corporation, Sa...

1. A device of an initiator for performing multiple-input multiple-output (MIMO) beamforming training the device comprising processing circuitry and storage, the processing circuitry coupled to the storage, and the processing circuitry configured to:establish a first communication link using a first antenna transmit chain of one or more transmit chains of the initiator, wherein the one or more antenna transmit chains further comprise a second antenna transmit chain;
initiate a MIMO beam refinement protocol (BRP) transmit sector sweep (TXSS) over the one or more antenna transmit chains;
map a single space-time stream over the one or more antenna transmit chains;
cause to send, to a responder device, an enhanced directional multi-gigabit (EDMG) frame using spatial expansion based on the mapping of the single space-time stream;
identify a feedback frame from the responder device; and
determine one or more antenna weight vectors (AWVs) to use in a MIMO phase of the MIMO beamforming training based on the feedback frame.

US Pat. No. 10,461,816

TRANSMISSION/RECEPTION APPARATUS AND METHOD FOR SUPPORTING MIMO TECHNOLOGY IN A FORWARD LINK OF A HIGH RATE PACKET DATA SYSTEM

Samsung Electronics Co., ...

1. A method of a transmitter for transmitting data in a communication system with a plurality of antennas, the method comprising the steps of:generating, by the transmitter, a first pilot signal and a second pilot signal; and
transmitting data, the first pilot signal, and the second pilot signal over a wireless network,
wherein the first pilot signal is transmitted at a first position in each slot for the data in a time domain and over each frequency that is used to transmit the data in a frequency domain, and the second pilot signal is transmitted at a second position, which is defined in the transmitter and a receiver, in the time domain and the frequency domain,
wherein each slot for the data comprises a first part of the slot for transmitting data and a second part of the slot for transmitting data,
wherein the first position is located adjacent to the first part and the second part in the time domain, and
wherein the defined second position comprises only one specific position within one slot, in the time domain.

US Pat. No. 10,461,815

MULTI-INPUT AND MULTI-OUTPUT SATELLITE SERVICE TERMINAL

1. A Multi-Input and Multi-Output (MIMO) satellite service terminal including:an antenna adapted to receive and transmit a satellite signal in a frequency range of a plurality of different satellite communication systems;
an interface circuit connected to the antenna;
a receive signal processing module of an integrated circuit connected to the interface circuit to RF (radio frequency) sample the received satellite signal to obtain a radio frequency digital signal from the received satellite signal, and the receive signal processing module of the integrated circuit demodulates, dispreads, and decodes the radio frequency digital signal to obtain a broadcast message or a destination address in all the satellite signals as a receive message of the terminal;
a scheduling software module of the integrated circuit that acquires a set of connectable systems of all the MIMO satellite service terminals from the broadcast message, determines, a set of connectable systems of the terminal based on the detected satellite communication link status and selects the satellite communication system with the best link status as the satellite communication system selected by the terminal, wherein the set of connectable systems is the set of the satellite communication systems whose link status satisfy transmission and receive requirements;
a wireless communication connection that wirelessly transmits the receive message to the general-purpose data processing terminal; and
a transmission signal processing module of the integrated circuit periodically generates a satellite signal adapted to be transmitted by the satellite communication system selected by the terminal with terminal status information as message content and a gateway platform address as the destination address and transmits the generated satellite signal to the interface circuit, wherein the terminal status information includes the set of connectable systems.

US Pat. No. 10,461,814

MASSIVE MIMO MULTI-USER BEAMFORMING AND SINGLE CHANNEL FULL DUPLEX FOR WIRELESS NETWORKS

RF DSP INC., Irvine, CA ...

1. A method for wireless networking comprising one or more Base Stations (BSs) with Nbs antennas; two or more Small Cells (SCs) in a range of a BS of said one or more BSs where a SC has Nsc antennas, uses Nsc1?Nsc antennas for communication with the BS and uses Nsc2?Nsc antennas for communication with one or more User Equipment (UEs); at the same time the BS transmitting Downlink (DL) signals to K SCs using a multi-user transmit beamforming (BE) in a frequency channel where K>1 and Nbs?KNsc1, based on evaluation of the BS-UE interferences and the SC-SC interferences using analysis of the deployment and path loss assessment, allocating frequency resources for the one or more SCs to simultaneously transmitting DL signals to one or more UEs in their ranges; and, at the same time the BS receiving Uplink (UL) signals from K SCs using the multi-user receive BF in a frequency channel where K>1 and Nbs?KNsc1, based on evaluation of the BS-UE interferences and the SC-SC interferences using analysis of the deployment and path loss assessment, allocating frequency resources for the one or more SC to simultaneously receiving UL signals from one or more UEs in their ranges;wherein the wireless networking further comprising choosing the number of antennas on the BS Nbs to be sufficiently larger than the total number of antennas for communicating with the BS on all the SCs served using the same frequency resource to match the throughput of the link between the BS and SCs with the sum throughput of the SCs.

US Pat. No. 10,461,813

INDUCTIVE POWER TRANSMITTER

Apple Inc., Cupertino, C...

1. An inductive power transmitter comprising:transmission circuitry having a coil, the transmission circuitry adapted to transmit wireless power to an inductive power receiver at a first frequency;
an inverter configured to drive the coil; and
control circuitry configured to:
control the inverter to cause the coil to produce a handshake signal at a second frequency that is higher than the first frequency;
responsive to receiving, via the coil, a response to the handshake signal from a non-authorised device proximate the coil, forgo transmission of the wireless power at the first frequency with the coil; and
responsive to not receiving, via the coil, a response to the handshake signal from a non-authorised device proximate the coil, transmit the wireless power at the first frequency with the coil.

US Pat. No. 10,461,812

NEAR-FIELD COMMUNICATION (NFC) TAGS OPTIMIZED FOR HIGH PERFORMANCE NFC AND WIRELESS POWER RECEPTION WITH SMALL ANTENNAS

NAN JING QIWEI TECHNOLOGY...

1. A device for concurrent near-field communication (NFC) and wireless power reception (WPR) using a magnetic field, comprising:a low-Q antenna resonant circuit configured to perform the NFC, and including
a first antenna for magnetic flux of the magnetic field to flow therethrough, to thereby receive a NFC signal for the NFC, and
a first antenna matching circuit that is connected to the first antenna and is so configured that a quality factor (Q-factor) of the low-Q antenna resonant circuit is no higher than 25; and
a high-Q antenna resonant circuit configured to perform the WPR, and including
a second antenna for the magnetic flux of the magnetic field to flow therethrough, to thereby receive wireless power for the WPR, and
a second antenna matching circuit that is connected to the second antenna and is so configured that the Q-factor of the high-Q antenna resonant circuit is no lower than 50, wherein
the low-Q and high-Q antenna resonant circuits are separate from each other,
the high-Q antenna resonant circuit operates to perform WPR, responsive to strength of the magnetic field being larger than a predetermined threshold, and
the high-Q antenna resonant circuit and the low-Q antenna resonant circuit operate to perform NFC, responsive to the strength of the magnetic field being no larger than the predetermined threshold.

US Pat. No. 10,461,811

METHOD AND SYSTEM FOR AUTOMATIC POWER CONTROL (APC) IN A COMMUNICATIONS DEVICE THAT COMMUNICATES VIA INDUCTIVE COUPLING

NXP B.V., Eindhoven (NL)...

1. A method for automatic power control (APC) in a communications device that communicates via inductive coupling, the method comprising:obtaining a plurality of system parameters that include a particular system parameter having a monotonic relationship with respect to a distance between the communications device and a counterpart communications device;
determining an APC configuration of the communications device from the plurality of system parameters, wherein determining the APC configuration of the communications device from the plurality of system parameters comprises using the system parameters as input variables, selecting a transmission configuration profile from a lookup table of profiles; and
controlling a transmission configuration of the communications device based on the APC configuration.

US Pat. No. 10,461,810

LAUNCH TOPOLOGY FOR FIELD CONFINED NEAR FIELD COMMUNICATION SYSTEM

TEXAS INSTRUMENTS INCORPO...

1. A system comprising a module, the module comprising:a substrate;
a radio frequency (RF) transmitter mounted on the substrate;
a near field communication (NFC) coupler, on the substrate, coupled to the RF transmitter, wherein the NFC coupler has a front side and a back side, and wherein the NFC coupler comprises an antenna, comprising:
an outer conductive region; and
a non-conducting slot surrounded by the outer conductive region;
a housing that surrounds the substrate, the housing having a port region;
a field confiner, between the front side of the NFC coupler and the port region of the housing, arranged to propagate a first portion of near-field electromagnetic energy through the port region, the near-field electromagnetic energy being emanated from the NFC coupler; and
a reflective surface, facing the back side of the NFC coupler, arranged to reflect a second portion of the near-field electromagnetic energy towards the port region.

US Pat. No. 10,461,809

CONTROLLING POWER TO A LOAD WITH SIGNALS ALONG A POWER LINE

LIGHTING AND ILLUMINATION...

1. A circuit for controlling electrical power to a load, the circuit comprising:a controller including power supply input nodes and a controller data input node;
power supply input terminals for supplying electrical power to the circuit;
a digital control signal pre-processing unit coupling one of the power supply input terminals to the controller data input node, the digital control signal pre-processing unit including a capacitor arranged to block voltage biasing resulting from power supplied to electrical power supply input terminals from being supplied to the controller data input node, wherein the digital control signal pre-processing unit is arranged to generate positive and negative voltage impulses in response to corresponding rising and falling edges of a digital control signal provided at the power supply input terminals and wherein the digital control signal pre-processing unit is further arranged to generate a revised version of the digital control signal without the voltage biasing, and
a bridge rectifier coupling the power supply input terminals to the power supply input nodes, wherein the bridge rectifier couples one of the supply input terminals to the digital control signal pre-processing unit.

US Pat. No. 10,461,808

SIGNAL TRANSMISSION ASSEMBLY

ASUSTEK COMPUTER INC., T...

1. A signal transmission assembly, comprising:a substrate;
a first transmission line, disposed on the substrate, extending along a first direction, and comprising at least one first transmission section and at least one second transmission section, wherein the first transmission section has a first width in a second direction that intersects the first direction, the second transmission section has a second width in the second direction, and the second width of the second transmission section is different from the first width of the first transmission section; and
a second transmission line, disposed on the substrate, and extending along the first direction, wherein the first transmission section is apart from the second transmission line by a first distance, the second transmission section is apart from the second transmission line by a second distance, and the first distance is greater than or equal to the second distance,
wherein a first edge of the first transmission section is proximal to the second transmission line and parallel to the first direction, and a second edge of the second transmission section is also proximal to the second transmission line and parallel to the first direction, and the second transmission line is not in contact with an edge extension line extending from the second edge along the first direction.

US Pat. No. 10,461,807

POWER AND DATA TRANSMISSION SYSTEM AND METHOD

Philip Morris Products S....

1. A handheld, battery powered, electrically operated aerosol-generating device, comprising:an input comprising a single pair of electrical contacts connectable to a host device to receive a time-multiplexed signal from the host device, the time-multiplexed signal comprising power and data time-multiplexed with one another and solely being received by the single pair of electrical contacts;
a power receiving circuit;
a data receiving circuit; and
a switch element configured to automatically and sequentially provide the time-multiplexed signal received at the input to the power receiving circuit such that the power receiving circuit receives the power in the time-multiplexed signal and to the data receiving circuit such that the data receiving circuit receives the data in the time-multiplexed signal, dependent on a voltage of the time-multiplexed signal.

US Pat. No. 10,461,806

METHOD FOR MEASURING INTERFERENCE TO CM, APPARATUS, AND SYSTEM

Hauwei Technologies Co., ...

1. A method for measuring interference to a cable modem (CM), the method comprising:sending, by a cable modem termination system (CMTS), a broadcast message to all CMs connected to the CMTS, wherein the broadcast message comprises information designating one of the CMs to send a probing signal by using a spectrum S in a timeslot T, and wherein the spectrum S is one of overlapping parts between uplink and downlink spectrums;
broadcasting, by the CMTS, a pseudo random binary sequence by using the spectrum S in a downlink direction in the timeslot T; and
obtaining, by the CMTS, modulation error ratio (MER) information recorded in the timeslot T by other CMs, and using a difference between MER information in the timeslot T and MER information in a normal data timeslot, of each of the other CMs, as intensity of interference to the corresponding CM, wherein the other CMs are CMs remaining after the designated CM is removed from all the CMs connected to the CMTS, and wherein the normal data timeslot is a timeslot in which the CMTS sends service data in the downlink direction.

US Pat. No. 10,461,805

VALID LANE TRAINING

Intel Corporation, Santa...

1. An apparatus comprising:physical layer logic to:
receive one or more link training signals comprising instances of a link training pattern on a plurality of lanes of a physical link, wherein the plurality of lanes comprise at least one valid lane and a plurality of data lanes;
train the plurality of lanes using the link training signals to synchronize sampling of the valid lane with sampling of the plurality of data lanes;
enter an active link state;
receive a valid signal on the valid lane during the active link state, wherein the valid signal comprises a signal held at a value for a defined first duration and indicates that data is to be received on the plurality of data lanes in a second defined duration subsequent to the first duration; and
receive the data, during the active link state, on the plurality of data lanes during the second defined duration.

US Pat. No. 10,461,804

ELIMINATION OF CROSSTALK EFFECTS IN NON-VOLATILE STORAGE

WESTERN DIGITAL TECHNOLOG...

1. An arrangement, comprising:a flash interface module connected to the application specific integrated circuit, the flash interface module having a flash interface;
a flash memory interface configured to accept and transmit data;
a flash memory configured to receive and transmit data from the flash memory interface;
at least two lines configured to transmit data from the flash interface module to the flash memory interface; and
at least one spare line configured to transmit data from the flash interface module to the flash memory interface, the at least one spare line; and
an application specific integrated circuit configured to replace one of the at least two lines configured to transmit data from the flash interface to the flash memory interface.

US Pat. No. 10,461,803

METHOD FOR RENDEZVOUS OF UNLICENSED USERS HAVING MULTIPLE TRANSCEIVERS IN COGNITIVE RADIO NETWORKS

HOHAI UNIVERSITY, CHANGZH...

1. A method for rendezvous of unlicensed users having multiple transceivers in cognitive radio networks, comprising four stages:(1) an initial stage: setting an initial environment for the method for rendezvous of unlicensed users;
(2) a stage of selecting a rendezvous method: selecting a corresponding rendezvous method according to the quantity of transceivers that an unlicensed user is equipped with;
(3) a stage of generating a channel hopping sequence: generating a channel hopping sequence by using the corresponding rendezvous method; and
(4) a rendezvous stage: running, by the unlicensed user, on a corresponding channel according to the channel hopping sequence generated in the stage of generating a channel hopping sequence, and attempting to rendezvous with a destination node of the unlicensed user, wherein if rendezvous is achieved, the rendezvous process ends; and if rendezvous is not achieved, the rendezvous process continues until rendezvous is achieved.

US Pat. No. 10,461,802

METHOD AND APPARATUS FOR AN ADAPTIVE FILTER ARCHITECTURE

ISCO International, LLC, ...

1. A device, comprising:a processing system including a processor; and
a memory that stores executable instructions that, when executed by the processing system, facilitate performance of operations, comprising:
obtaining a signal strength for each of a first plurality of channels within a first Direct Sequence Spread Spectrum (DSSS) signal within a radio frequency spectrum resulting in a first plurality of signal strengths for a first time period;
sorting the first plurality of signal strengths of the first plurality of channels according to signal strength;
selecting a first portion of the first plurality of signal strengths and a second portion of the first plurality of signal strengths, wherein each of the signal strengths of the first portion has a higher value than each of the signal strengths of the second portion;
identifying a channel for each of the first portion of the first plurality of signal strengths resulting in a first portion of the first plurality of channels;
obtaining a signal strength for each of a second plurality of channels within a second DSSS signal resulting in a second plurality of signal strengths for a second time period;
sorting the second plurality of signal strengths of the second plurality of channels according to signal strength;
selecting a third portion of the second plurality of signal strengths and a fourth portion of the second plurality of signal strengths, wherein each of the signal strengths of the third portion has a higher value than each of the signal strengths of the fourth portion;
identifying a channel for each of the third portion of the second plurality of signal strengths resulting in a second portion of the second plurality of channels;
identifying common channels between the first portion of the first plurality of channels and the second portion of the second plurality of channels;
determining the common channels are above a threshold;
receiving a third DSSS signal for a third time period within the radio frequency spectrum; and
filtering the third DSSS signal to filter a first portion of a group of interference signals using a filter.

US Pat. No. 10,461,801

USING HARMONICS FOR FULFILLING MULTIPLE JOBS SIMULTANEOUSLY

Raytheon Company, Waltha...

1. A device comprising:transmit circuitry;
a memory including job data indicating characteristics of jobs to be completed using the transmit circuitry, the characteristics indicating a frequency, power, and location of a transmission required to complete a job of the jobs;
at least one hardware processor coupled to the transmit circuitry and the memory, the at least one hardware processor configured to:
determine whether, based on the job characteristics and in completing a first job of the jobs with a signal at a fundamental frequency, a harmonic frequency of the fundamental frequency satisfies all characteristics of a second job of the jobs, the first job associated with a first device and the second job associated with a different, second device;
in response to a determination that the harmonic frequency of the fundamental frequency does not satisfy all characteristics of the second job, adjusting a beam width of the fundamental frequency of the signal so that the harmonic frequency of the signal satisfies the second job; and
cause the transmit circuitry to transmit the signal including the fundamental frequency and the harmonic frequency to fulfill the first and second jobs, respectively and simultaneously.

US Pat. No. 10,461,800

COMMUNICATION CONTROL METHOD AND RELATED APPARATUS

Huawei Technologies Co., ...

1. A base station comprising:an antenna;
a processor coupled to the antenna; and
a non-transitory computer readable storage medium storing a program for execution by the processor, the program including instructions to:
transmit, by the base station to N user terminals using the antenna, a configuration message, wherein the configuration message carries a secondary configuration indication, the secondary configuration indication indicating a secondary transmission configuration configured by the base station for the N user terminals, and wherein the secondary transmission configuration of the N user terminals is different from a primary transmission configuration of M user terminals in a cell, the N user terminals being a subset of the M user terminals, and N and M being positive integers;
obtain interference parameters about interference that the N user terminals receive from neighboring user terminals in a full-duplex subframe, wherein the full-duplex subframe is a subframe in which the primary transmission configuration corresponds to uplink transmission and the secondary transmission configuration corresponds to downlink transmission in the same subframes of the same band;
activate the secondary transmission configuration for K user terminals of the N user terminals using an activation message, wherein interference parameters about interference that the K user terminals receive from neighboring user terminals meet a specified activation condition, the K user terminals being a subset of the N user terminals, and K being a positive integer; and
use directional downlink transmission in the full-duplex subframe, wherein a beam corresponding to the directional downlink transmission covers at least one user terminal of the K user terminals,
wherein the primary transmission configuration is a primary carrier, and the secondary transmission configuration is a secondary carrier, and
wherein an uplink band of the primary carrier is the same as a downlink band of the secondary carrier, and a downlink band of the primary carrier is the same as an uplink band of the secondary carrier, or a band of the primary carrier is the same as a band of the secondary carrier, and a time division duplex (TDD) uplink-downlink configuration of the primary carrier is different from a TDD uplink-downlink configuration of the secondary carrier.

US Pat. No. 10,461,799

INTEGRATED TRANSMITTER AND RECEIVER FRONT END MODULE, TRANSCEIVER, AND RELATED METHOD

TAIWAN SEMICONDUCTOR MANU...

1. A transceiver comprising:an antenna; and
a first package comprising:
an integrated circuit die comprising:
a die-side part of a transmitter path network, the die-side part of the transmitter path network including first and second portions, wherein the first portion of the die-side part of the transmitter path network comprises a power amplifier comprising a plurality of metal-oxide-semiconductor field effect transistors (MOSFETs);
a die-side part of a receiver path network;
a transmitter electrically connected to the first portion of the die-side part of the transmitter path network, wherein the transmitter is connected to a gate of a MOSFET of the plurality of MOSFETs; and
a receiver connected to the die-side part of the receiver path network;
the second portion of the die-side part of the transmitter path network including a selectable capacitance unit; and
a package-side part of the transmitter path network electrically connected to the die-side part of the transmitter path network and the antenna, the package-side part of the transmitter path network is directly connected to the first portion of the die-side part of the transmitter path network; and
a package-side part of the receiver path network electrically connected to the die-side part of the receiver path network and the antenna;
at least one of the package-side part of the transmitter path network or the package-side part of the receiver path network including an inductor.

US Pat. No. 10,461,798

HIGH-FREQUENCY MODULE

Murata Manufacturing Co.,...

1. A high-frequency module comprising:a first directional coupler including a first main line located in a first signal path and a first sub line which is electromagnetically coupled to the first main line; and
a switch unit that switches directivity of coupled output in the first sub line; wherein
the switch unit includes:
a first input terminal which is connected to one end portion of the first sub line;
a second input terminal which is coupled to another end portion of the first sub line;
an output terminal from which the coupled output that is input to the first input terminal or the second input terminal in the first line is output;
a directivity switching switch unit which connects one of the first input terminal and the output terminal in a switching manner;
a first termination resistor which is connected to the first input terminal in parallel;
a second termination resistor which is connected to the second input terminal in parallel;
a first resistor switching switch unit which connects the first termination resistor to the first input terminal when the directivity switching switch unit connects the second input terminal to the output terminal; and
a second resistor switching switch unit which connects the second termination resistor to the second input terminal when the directivity switching switch unit connects the first input terminal to the output terminal; and
a variable capacitance is connected between the first input terminal and a ground and/or the second input terminal and a ground.

US Pat. No. 10,461,797

NARROWBAND COMMUNICATION FOR DIFFERENT DEVICE CAPABILITIES IN UNLICENSED SPECTRUM

QUALCOMM Incorporated, S...

1. A method for wireless communication, comprising:transmitting an indication of a capability of a wireless device on resources of a first carrier in a first narrowband region of a radio frequency spectrum band;
receiving a configuration message on the resources of the first carrier;
identifying, based at least in part on the configuration message, a configuration of one or more additional carriers that are in a different narrowband regions of the radio frequency spectrum band, wherein the configuration of the one or more additional carriers is based at least in part on the capability of the wireless device;
receiving, on the resources of the first carrier, an assignment of resources on the one or more additional carriers in the different narrowband regions of the radio frequency spectrum band; and
communicating on the one or more additional carriers in the different narrowband regions of the radio frequency spectrum band according to the assignment.

US Pat. No. 10,461,796

MULTIMODE RECEIVING DEVICE, MULTIMODE TRANSMITTING DEVICE AND MULTIMODE TRANSCEIVING METHOD

Silergy Semiconductor Tec...

1. A multimode receiving device configured to receive a standard Bluetooth data packet and a physical layer data packet with enhanced performance, the multimode receiving device comprising:a) a receiving circuit configured to convert a received radio frequency signal to a baseband modulated signal;
b) a demodulation circuit configured to select a demodulation scheme that conforms to a Bluetooth standard or one of a plurality of despread demodulation schemes, in order to demodulate said baseband modulated signal;
c) said plurality of despread demodulation schemes being configured to correspond to a plurality of predetermined spread-spectrum modulation schemes; and
d) wherein said plurality of spread-spectrum modulation schemes converts a Bluetooth baseband signal to a spread signal with its chip rate being the same as a symbol rate of said Bluetooth baseband signal.

US Pat. No. 10,461,795

MOBILE COMPUTING/COMMUNICATING ATTACHMENT DEVICE

1. An attachment system for holding at least one mobile computing device comprising:a. a first attachment device attached to a first mobile computing device, comprising:
i. a removable, flexible plate attached to a portion of one side the of first mobile computing device;
ii. a first elongated rail mounted on the plate, and
iii. at least two first elongated structures defining a first elongated opening between them;
b. a second attachment device attached to a second mobile computing device, comprising:
i. a second elongated rail; and
ii. at least two second elongated structures defining a second elongated opening between them such that the second elongated rail is sized and shaped to receive and hold the at least two first elongated structures and the at least two second elongated structures are sized and shaped to receive and hold the first elongated rail in order to interact with and attach the second mobile computing device to the first attachment device, wherein the first and second elongated structures have a first and second end and the first and second elongated structures narrow in width at their first end to create a widened beveled opening.

US Pat. No. 10,461,794

MOBILE TERMINAL

LG ELECTRONICS INC., Seo...

1. A bar-type mobile terminal, comprising:a wireless communication unit configured to communicate wireless signals; and
a frame comprised of a metallic material and configured to form an upper side, a lower side, and lateral sides of an outer appearance of the mobile terminal,
wherein the frame comprises:
a first non-metallic coupling portion disposed at an upper portion of the frame;
a second non-metallic coupling portion disposed at a lower portion of the frame;
a first edge member and a second edge member provided at the upper side of the frame and configured to transmit or receive wireless signals at different frequency bands, wherein the first edge member and the second edge member are isolated from each other by a portion of the first non-metallic coupling portion;
a first slit defined between the first edge member and the second edge member, wherein the portion of the first non-metallic coupling portion is disposed in the first slit;
a third edge member and a fourth edge member provided at the lower portion of the frame and configured to transmit or receive wireless signals at different frequency bands, wherein the third edge member and the fourth edge member are isolated from each other by a portion of the second non-metallic coupling portion; and
a second slit defined between the third edge member and the fourth edge member, wherein the portion of the second non-metallic coupling portion is disposed in the second slit,
wherein the first, second, third, and fourth edge members are configured to operate as radiators of a plurality of antennas of the mobile terminal.

US Pat. No. 10,461,793

COVER OF A MOBILE DEVICE AND MOBILE DEVICE INCLUDING THE SAME

Samsung Electronics Co., ...

1. A mobile device comprising:a wireless communication chip configured to perform a wireless communication;
a matching circuit coupled to the wireless communication chip; and
a cover including,
a plate configured to cover at least one surface of the mobile device, and including a slit and an opening,
two terminals directly on the plate, the two terminals directly connected to the matching circuit, and
an insulating pattern dividing the plate into an inner region and an outer region surrounding the inner region, the insulating pattern surrounding the inner region of the plate at which a signal path from one of the two terminals to the other of the two terminals is formed,
wherein the slit is located between the two terminals, and extends from the opening,
at least a portion of the cover is configured to operate as an antenna for the wireless communication of the mobile device, and
the matching circuit is configured to perform an impedance matching between the wireless communication chip and the antenna for the wireless communication.

US Pat. No. 10,461,792

RADIO COMMUNICATION DEVICE AND RADIO COMMUNICATION SYSTEM

Panasonic Intellectual Pr...

1. A radio communication device, detachably mounted on a base, comprising:first and second communication units;
a first antenna terminal used to receive one of first and second signals from the base;
a second antenna terminal used to receive another one of the first and second signals from the base;
a terminal switch configured to perform switching between a first coupling state in which the first communication unit and the first antenna terminal are coupled, and the second communication unit and the second antenna terminal are coupled, and a second coupling state in which the first communication unit and the second antenna terminal are coupled, and the second communication unit and the first antenna terminal are coupled; and
a controller configured to control the terminal switch so as to switch to the first coupling state when in a first reception state in which the first antenna terminal receives the first signal from a third antenna terminal of the base, and the second antenna terminal receives the second signal from a fourth antenna terminal of the base, and to control the terminal switch so as to switch to the second coupling state when in a second reception state in which the first antenna terminal receives the second signal from the fourth antenna terminal of the base, and the second antenna terminal receives the first signal from the third antenna terminal of the base.

US Pat. No. 10,461,791

INTERFERENCE ANALYSIS IN WIRELESS NETWORKS

TELEFONAKTIEBOLAGET LM ER...

1. A method for managing interference in a wireless communication network, the method comprising:receiving measurement data from a plurality of measurement devices in the network;
processing the measurement data to detect signal patterns of one or more of a plurality of signal strength pattern types in the network and to generate pattern characterization data that characterizes the detected signal strength patterns, each of the signal strength pattern types corresponding to a different type of interference;
receiving a user selection of a signal strength pattern type; and
selecting, in response to the user selection and for display to the user, pattern characterization data that characterizes signals of the selected signal strength pattern type.

US Pat. No. 10,461,790

METHOD FOR COMPENSATION OF PHASE NOISE EFFECT ON DATA TRANSMISSION IN RADIO CHANNEL

1. A method for estimation and compensation of phase noise effect on data transmission comprising:a. Reception of a sequence of multiple signal samples;
b. Estimation of phase noise in the sequence of multiple signal samples;
c. Compensation of the phase noise in the sequence of multiple signal samples using a phase noise estimate,
wherein the phase noise estimation comprises the successive steps of:
b1. Selection of a sequence of several signal samples from a variety of signal samples;
b2. Direct estimation of phase noise realization from the sequence of several signal samples;
b3. Generation of a sequence of estimates of the phase noise realization;
b4. Estimation and extraction of one or several phase noise low-frequency spectral components by a linear combination of the phase noise realization estimates with weighted coefficients;
b5. Estimation of the phase noise in a sequence of multiple signal samples in a time domain using an inverse Fourier transform of the estimated low-frequency phase noise components.

US Pat. No. 10,461,789

LOW-POWER RECEIVING USING A JAMMING DETECTION MODE

APPLE INC., Cupertino, C...

1. A receiver system, comprising:a first receiver configured to receive and decode data signals from an antenna;
a second receiver configured to receive waveforms from the antenna, wherein the second receiver consumes relatively lower power than the first receiver when both of the receivers are in operation, wherein the second receiver is configured to receive the waveforms from the antenna that indicate whether jamming signals coexist with data to be received by the first receiver; and
receiver logic configured to control the first receiver based at least in part on an indication of whether jamming signals coexist with data to be received by the first receiver.

US Pat. No. 10,461,787

SPUR MITIGATION FOR PULSE OUTPUT DRIVERS IN RADIO FREQUENCY (RF) DEVICES

Silicon Laboratories Inc....

1. An integrated circuit, comprising:a first clock generator having a digital clock as an output;
a second clock generator having a local oscillator (LO) clock as an output;
radio frequency (RF) circuitry coupled to operate using the LO clock;
a circuit coupled to receive the digital clock and the LO clock as inputs and having a retimed clock as an output, the retimed clock representing the digital clock retimed with the LO clock;
digital circuitry coupled to have internal timing based upon the digital clock; and
one or more drivers coupled to be timed by the retimed clock, each driver being coupled to provide a pulse output signal to an output pad.

US Pat. No. 10,461,786

APPARATUS AND METHOD FOR CONTROLLING AMPLIFIERS

Telefonaktiebolaget LM Er...

1. A method of controlling at least one amplifier of a network node, the network node being configured to communicate with a plurality of user equipment devices within a cell of a wireless communication network, the method comprising:evaluating back-off criteria relating to the plurality of user equipment devices, wherein the back-off criteria comprises positional information relating to the position of the plurality of user equipment devices within the cell; and
selectively controlling at least one amplifier to operate in one of a reduced power mode and a predistortion mode, based on the result of the evaluation,wherein the method further comprises:determining the location of each of the plurality of user equipment devices within the cell;
determining what percentage of user equipment devices are within a predetermined distance of the cell center; and
controlling at least one amplifier to operate in the reduced power mode instead of the predistortion mode if the determined percentage is above a threshold value.

US Pat. No. 10,461,785

APPARATUS AND METHODS FOR FRONT-END SYSTEMS WITH REACTIVE LOOPBACK

Skyworks Solutions, Inc.,...

1. A front-end system comprising:a plurality of ports including an antenna port, a transmit port, and a receive port;
an antenna switch configured to selectively provide a transmit signal from the transmit port to the antenna port;
a low noise amplifier having an input electrically connected to the antenna port and an output electrically connected to the receive port; and
a loopback circuit including a reactive loopback impedance and a back switch electrically connected in series between the antenna switch and the receive port, the reactive loopback impedance including a plurality of capacitors in series with the back switch and operable to provide a portion of the transmit signal to the receive port when the back switch is activated.

US Pat. No. 10,461,784

COMMUNICATION APPARATUS

SOUNDPOWER CORPORATION, ...

1. A communication apparatus, comprising:at least one manipulating unit;
at least one power generating unit that generates electric power using force externally applied via the manipulating unit;
at least one transmitting unit that transmits a signal; and
at least one control unit that causes, when the manipulating unit is manipulated, the transmitting unit to transmit the signal with priority over another process other than the transmission of the signal using first electric power which is part of the electric power generated by the power generating unit and then performs the other process using second electric power other than the first electric power among the electric power generated by the power generating unit.

US Pat. No. 10,461,783

RADIO FREQUENCY COMMUNICATION DEVICES HAVING BACKSCATTER AND NON-BACKSCATTER COMMUNICATION MODES AND HARDWARE RE-USE

University of Washington,...

1. A radio frequency communication device, comprising:a backscatter transmitter circuit;
a non-backscatter transceiver circuit;
an antenna; and
a transistor in a transmit path of the non-backscatter transceiver circuit and electrically coupled to the antenna, the transistor configured to, in a backscatter modulator mode, vary an impedance presented to the antenna via the transmit path of the non-backscatter transceiver circuit;
wherein each of the backscatter transmitter circuit and the non-backscatter transmitter circuit are in electrical communication with the antenna.

US Pat. No. 10,461,782

METHOD AND APPARATUS FOR DYNAMIC TUNING

BLACKBERRY LIMITED, Onta...

1. A communication device, comprising:a matching network including a tunable reactive element;
a processing system including a processor, the processing system being coupled with the matching network; and
a memory that stores executable instructions that, when executed by the processing system, facilitate performance of operations, comprising:
during Frequency Division Duplex (FDD) communication, selecting first, second, and third tuning states from first, second and third groups of tuning states, respectively, wherein the first, second and third groups of tuning states are stored in the memory and are predetermined tuning states based on increasing performance in transmit, receive and duplex operation, respectively;
determining a weighted tuning state based on a weighting factor, and the first, second and third tuning states, wherein the first, second and third tuning states comprise sets of digital to analog converter values, and wherein the weighting factor is based on an interpolation that utilizes digital to analog converter values of at least two of the first, second and third tuning states;
adjusting the matching network utilizing the weighted tuning state resulting in a tuning;
responsive to the tuning, determining a first performance metric according to a first measurement associated with the FDD communication;
selecting first, second, and third reference metrics from first, second and third groups of reference metrics stored in the memory, wherein the first, second and third groups of reference metrics are predetermined expected metrics based on the increasing performance in the transmit, receive and duplex operation, respectively;
determining a weighted reference metric based on the weighting factor, and the first, second and third reference metrics;
comparing the first performance metric to the weighted reference metric resulting in a first comparison; and
responsive to a first determination that the first performance metric satisfies a first threshold according to the first comparison, continuing the tuning utilizing the weighted tuning state.

US Pat. No. 10,461,781

APPARATUS AND METHOD FOR COMMUNICATING DATA OVER A COMMUNICATION CHANNEL

INPHI CORPORATION, Santa...

1. A modulator comprising:a symbol mapper for mapping a bit stream into symbols; and
a multi-level encoder comprising an inner encoder and an outer encoder for encoding only a portion of the bit stream such that an information block size of the inner encoder is a multiple of a field size of the outer encoder;
wherein a portion of the bit stream comprises a least significant bit (LSB) sequence and a non-LSB sequence having p-times as many bits, p being an average number of bits per LSB; and
the symbol mapper being configured for mapping the bit stream into the symbols from a constellation of 2N symbols, where N is an integer and is variable from symbol to symbol.

US Pat. No. 10,461,780

MALLEABLE ERROR CONTROL CODE STRUCTURES SUITABLE FOR ADAPTIVE ERROR PROTECTION

Cisco Technology, Inc., ...

1. A method comprising:determining a sequence of source packets, wherein the sequence of source packets satisfies a windowing condition;
synthesizing a first set of parity packets as a function of a first set of source packets in the sequence, wherein the first set of source packets satisfies a first encoding pattern; and
synthesizing a second set of parity packets as a function of a second set of source packets in the sequence, wherein the second set of source packets satisfies a second encoding pattern that is different from the first encoding pattern, wherein each of the first encoding pattern and the second encoding pattern characterizes an encoding structure determined as a function of a channel characterization vector, and wherein each of the first encoding pattern and the second encoding pattern are selected based on the channel characterization vector to provide unequal protection for the source packets.

US Pat. No. 10,461,779

RATE-COMPATIBLE POLAR CODES

Telefonaktiebolaget LM Er...

1. A transmit node operable for use in a wireless communications system, comprising:a rate-compatible polar encoder operable to encode a plurality of information bits at a plurality of different code rates and to concatenate output bits produced at one or more of the plurality of different code rates to provide a plurality of coded bits at a desired code rate; and
a transmitter operable to transmit the plurality of coded bits.

US Pat. No. 10,461,778

INTERLEAVING AND PUNCTURING APPARATUS AND METHOD THEREOF

SAMSUNG ELECTRONICS CO., ...

5. A method comprising:writing bits in a plurality of columns; and
reading the written bits,
wherein the plurality of columns comprise a first column, a second column and a third column, and
wherein the reading reads the written bits by skipping a first bit written in a row of the first column and sequentially reading a second bit written in the row of the second column and a third bit written in the row of the third column.

US Pat. No. 10,461,777

ERROR LOCATOR POLYNOMIAL DECODER AND METHOD

WESTERN DIGITAL TECHNOLOG...

1. A decoding apparatus comprising:a syndrome generator circuit configured to receive data and generate at least two different sets of syndromes;
an error locator polynomial generator circuit configured to receive the at least two different sets of syndromes and generate a mutual error locator polynomial; and
a convergence detector circuit coupled to the error locator polynomial generator circuit, the convergence detector circuit including:
at least two computation circuits configured to generate at least two convergence signals based on the mutual error locator polynomial from the error locator polynomial generator circuit and on the at least two different sets of syndromes, wherein each of the different sets of syndromes corresponds to a different one of the convergence signals.

US Pat. No. 10,461,776

DEVICE AND METHOD OF CONTROLLING AN ITERATIVE DECODER

Realtek Semiconductor Cor...

8. A controlling method, for controlling operations of an iterative decoder, comprising:receiving at least one coded signal;
performing an iterative decoding on the at least one coded signal, to generate a plurality of decoded signals, wherein the plurality of decoded signals comprise a first decoded signal from a first iteration, a second decoded signal from a second iteration and a third decoded signal from a third iteration;
determining whether the plurality of decoded signals diverge, to generate a first determination result;
generating a control signal according to at least the first determination result, wherein the control signal indicates the iterative decoder whether to stop performing the iterative decoding on the at least one coded signal;
performing an error detection on the plurality of decoded signals, to generate a second determination result; and
generating the control signal according to the first determination result and the second determination result.

US Pat. No. 10,461,775

COMPRESSION AWARE SSD

Samsung Electronics Co., ...

1. A compression system on a storage drive comprising:one or more compressibility inputs;
a compression predictor configured to predict the compressibility of data based on the one or more compressibility inputs;
a compressor configured to compress the data;
one or more compression inputs,
wherein at least one of the compression predictor or the compressor is configured to determine how to compress the data based on the one or more compression inputs.

US Pat. No. 10,461,774

TECHNOLOGIES FOR ASSIGNING WORKLOADS BASED ON RESOURCE UTILIZATION PHASES

Intel Corporation, Santa...

1. An orchestrator server to assign workloads among a set of managed nodes based on resource utilization phases, the orchestrator server comprising:one or more processors;
one or more memory devices having stored therein a plurality of instructions that, when executed by the one or more processors, cause the orchestrator server to:
assign a set of workloads to the managed nodes;
receive telemetry data from the managed nodes, wherein the telemetry data is indicative of resource utilization by each of the managed nodes as the workloads are performed and wherein each managed node includes a set of sleds that define pools of different types of disaggregated resources;
identify, as a function of the telemetry data, historical resource utilization phases of the workloads, wherein each historical resource utilization phase is indicative of a utilization of a particular type of managed node component that satisfies a predefined threshold amount over a time period;
determine, as a function of the historical resource utilization phases and as the workloads are performed, predicted resource utilization phases for the workloads, wherein each predicted resource utilization phase is indicative of a predicted utilization of a particular type of managed node component that satisfies the predefined threshold amount over a second time period; and
apply, as a function of the predicted resources utilization phases, an adjustment to the assignments of the workloads among the managed nodes to delay an execution of a first workload to temporally align a first predicted resource utilization phase of the first workload with a second predicted resource utilization phase of a second workload on the same managed node to cause the first predicted resource utilization phase and the second predicted resource utilization phase to occur concurrently and wherein the first predicted resource utilization phase and the second resource utilization phase are predicted to utilize complementary amounts of the same resource.

US Pat. No. 10,461,773

ENCODER, DECODER AND METHOD

GURULOGIC MICROSYSTEMS OY...

1. An encoder for compressing input data to generate corresponding encoded data, the encoder comprising:a data processor which is operable to:
divide the input data into a plurality of data blocks or data packets of data bits or data symbols, the plurality of data blocks or data packets including multi-dimensional patterns of data bits or data symbols,
process the plurality of data blocks or data packets to identify reoccurrence of mutually similar multi-dimensional patterns of data bits or data symbols in the input data, and
represent one or more duplicate reoccurrences of the mutually similar multi-dimensional patterns of data bits or data symbols by way of one or more duplication symbols uniquely identifying the mutually similar multi-dimensional patterns,
wherein the data processor is operable to generate the one or more duplication symbols as a decremented or incremented chronological sequence of duplication symbol values,
wherein the data processor is operable to assign a same predetermined duplication symbol to data blocks that have not previously been duplicated, and
wherein the sequence of duplication symbol values refers to a data file in which information describing the mutually similar multi-dimensional patterns of data bits or data symbols is stored.

US Pat. No. 10,461,772

CODE CONVERSION

INTERNATIONAL BUSINESS MA...

1. A computer-implemented method comprising:obtaining, by one or more processors, a first code point from a source data string in a first character encoding, wherein the source data string is to be converted to a target data string in a second character encoding;
looking up, by one or more processors, a target code point corresponding to the first code point in a map table, the target code point being in the second character encoding;
determining, by one or more processors, whether the first code point is a first combining character in response to receiving a lookup failure generated from the looking up operation;
identifying, by one or more processors, a combination unit comprising the first combining character and at least one base character next to the first combining character in the source data string in response to determining that the first code point is the first combining character; and
converting, by one or more processors, the combination unit to a substitute character in the target data string.

US Pat. No. 10,461,771

SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTER WITH MULTIPLE COUNTERS

TEXAS INSTRUMENTS INCORPO...

1. A sigma-delta analog-to-digital converter (ADC), comprising:a first set of switches coupled to a first node and a second node, the first set of switches configured to receive a first voltage signal;
a second set of switches coupled to the first node and the second node, the second set of switches configured to receive a second voltage signal;
an integrator including a first input sampling capacitor coupled to the first node and a second input sampling capacitor coupled to the second node, wherein the integrator configured to generate a first output signal;
a comparator coupled to the integrator and configured to generate a second output signal based on the first output signal; and
a controller unit having a first counter, a second counter, and a processor, the controller unit coupled to the first and second sets of switches, the integrator, and the comparator,
wherein the processor is configured to increment a first counter value of the first counter based on the second output signal and a second counter value of the second counter based on the second output signal,
wherein the processor is configured to compute a value based on the first and second counter values;
wherein the controller unit is configured to change the first output signal based on the second output signal;
wherein if the second output signal is 1, the controller unit is configured to subtract the first output signal by the second voltage signal, wherein if the second output signal is 0, the controller unit is configured to add the first output signal with first voltage signal.

US Pat. No. 10,461,769

?? MODULATOR

ABLIC INC., Chiba (JP)

1. A ?? modulator comprising:a first integrator which has first and second capacitors and integrates an analog input signal and a feedback analog signal;
a second integrator which has third and fourth capacitors and integrates an output signal of the first integrator;
a shared differential amplifier alternatingly shared between the first integrator at a first time and the second integrator at a second time, which has input and output terminals, both of which are switched and connected via a switch circuit to the first and second capacitors at the first time and the third and fourth capacitors at the second time;
a chopper switch which switches a polarity of the input terminal and a polarity of the output terminal, to both terminals of which the first capacitor and the second capacitor are connected;
a quantizer which compares a signal obtained by adding the analog input signal, the output signal of the first integrator, and an output signal of the second integrator and a reference signal to output a digital value; and
a digital/analog converter which outputs the feedback analog signal according to the digital value provided from the quantizer.

US Pat. No. 10,461,768

DIGITAL-TO-ANALOG CONVERTER (DAC) DESIGN WITH REDUCED SETTLING TIME

QUALCOMM Incorporated, S...

1. A digital-to-analog converter (DAC), comprising:a plurality of transistors selectively coupled to an output of the DAC; and
a biasing circuit coupled to gates of the plurality of transistors, wherein the biasing circuit comprises:
a first transistor having a gate coupled to a drain of the first transistor;
a first buffer having an input coupled to the gate of the first transistor;
a second transistor having a gate coupled to an output of the first buffer;
a first resistive-capacitive (RC) circuit having a first resistive element and a first capacitive element, the first RC circuit being coupled between the gate of the first transistor and the gate of the second transistor; and
a first switch coupled between the first resistive element and the first capacitive element.

US Pat. No. 10,461,766

SEMICONDUCTOR DEVICE, SIGNAL PROCESSING SYSTEM, AND SIGNAL PROCESSING METHOD

Renesas Electronics Corpo...

1. A semiconductor device comprising:a reference voltage generation circuit that generates a reference voltage;
an analog signal processing circuit that outputs a first processing signal according to the reference voltage;
a test signal output section that outputs, as a test signal, a second processing signal having a lower voltage than the first processing signal;
an input section that receives a regulation signal for the outputted test signal; and
a regulator circuit that regulates an output of the analog signal processing circuit in response to the regulation signal,
wherein the test signal output section outputs, as the test signal, one of the second processing signal and the reference voltage.

US Pat. No. 10,461,765

SUCCESSIVE APPROXIMATION TYPE AD CONVERTER AND SENSOR DEVICE

Hitachi, Ltd., Tokyo (JP...

1. A successive approximation type AD converter comprising:a first capacitance DA converter that samples a first input analog signal and outputs a voltage corresponding to a sampled value;
a second capacitance DA converter that samples a second input analog signal and outputs a voltage corresponding to a sampled value;
a comparator that compares an output of the first capacitance DA converter and an output of the second capacitance DA converter;
a successive approximation logic unit that supplies a control signal to the first capacitance DA converter and the second capacitance DA converter on the basis of a comparison result of the comparator; and
an in-phase voltage detection and supply circuit that, in a sampling period, supplies an in-phase voltage obtained by impedance voltage division of the first input analog signal and the second input analog signal to the first capacitance DA converter and the second capacitance DA converter,
wherein the first capacitance DA converter samples the first input analog signal with reference to the in-phase voltage in the sampling period, the second capacitance DA converter samples the second input analog signal with reference to the in-phase voltage,
after the sampling period ends, the comparator compares the output of the first capacitance DA converter and the output of the second capacitance DA converter, output voltages of the first capacitance DA converter and the second capacitance DA converter are changed by the control signal of the successive approximation logic unit on the basis of a comparison result, comparison processing is repeated, and thereby, a digital signal of a successive approximation result is output.

US Pat. No. 10,461,764

SYSTEM AND METHOD FOR INTERLEAVED DIGITAL-TO-ANALOG CONVERTER (DAC) CALIBRATION

IQ-Analog Corporation, S...

1. A system for calibrating an interleaved digital-to-analog converter (DAC), the system comprising:an interleaved DAC comprising 2N selectively enabled sub-DACs, where N is an integer greater than or equal to 1, each sub-DAC having an input to accept a digital data signal, a clock input to accept a first clock signal at a first frequency with unique phase, and an output to supply an analog signal converted from the data signal;
a data generator having 2N outputs to respectively supply 2N data signals to the 2N sub-DACs corresponding to a fundamental analog signal, and an input to accept signal generation commands;
a clock generator having an output to supply 2N unique phases of the first clock signal;
a clock calibration module having an input to accept the 2N phases of the first clock signal, an input to accept calibration signals, and 2N outputs to selectively supply unique phases of the first clock signal to the enabled sub-DACs in response to the calibration signals;
a summing device having 2N inputs to accept analog signals from enabled sub-DACs, and an output to supply a summed analog signal comprising the fundamental analog signal with spurious signals offset from a multiple of the first frequency of the first clock signal, where the spurious signals are responsive to duty cycle mismatch and first clock signal phases errors between enabled sub-DACs;
an analog-to-digital converter (ADC) having a signal input to accept the summed analog signal, a clock input to accept a second clock signal, and an output to supply a digital conversion signal converted from the summed analog signal; and,
a control module having an input to accept the conversion signal, an output to supply the signal generation commands, and an output to supply the calibration signals to the clock calibration module.

US Pat. No. 10,461,763

DOUBLE DATA RATE TIME INTERPOLATING QUANTIZER WITH REDUCED KICKBACK NOISE

Huawei Technologies Co., ...

1. An apparatus comprising:a first double data rate comparator circuit configured to determine a relative voltage of a first differential input signal during each of a rising edge and a falling edge in a single clock cycle of a comparator clock input to the first double data rate comparator circuit;
a second double data rate comparator circuit configured to determine a relative voltage of a second differential input signal during each of the rising edge and the falling edge in the single clock cycle of the comparator clock input to the second double data rate comparator circuit;
a third double data rate comparator circuit configured to determine a relative voltage of a third differential input signal during each of a rising edge and a falling edge in the single clock cycle of an inverted comparator clock input to the third double data rate comparator circuit; and
a first floating voltage reference circuit configured to shift a voltage of a differential comparator input signal by a first fixed amount, and produce the first differential input signal;
a second floating voltage reference circuit configured to shift the differential comparator input signal by a second fixed amount and produce the second differential input signal; and
a clock inverter circuit connected to the comparator clock signal and configured to produce the inverted comparator clock signal;
wherein the third differential input signal is cross connected to the first differential input signal and the second differential input signal.

US Pat. No. 10,461,762

SUCCESSIVE APPROXIMATION REGISTER ANALOG-TO-DIGITAL CONVERTER CHOPPING

QUALCOMM Incorporated, S...

1. An analog-to-digital converter (ADC) comprising:a comparator comprising a first input and a second input;
a switch connected between the first and second inputs of the comparator;
a first capacitive array having a first terminal coupled to the first input of the comparator;
a second capacitive array having a first terminal coupled to the second input of the comparator; and
a reference buffer selectively coupled to second terminals of the first and second capacitive arrays and configured to apply inverse digital codes to the first and second capacitive arrays, wherein the switch is configured to short the first and second inputs of the comparator while the inverse digital codes are being applied to the first and second capacitive arrays such that charges of the first and second capacitive arrays are redistributed via the reference buffer.

US Pat. No. 10,461,761

PIPELINED SAR WITH TDC CONVERTER

Taiwan Semiconductor Manu...

1. An analog-to-digital converter (ADC), comprising:a successive approximation register configured to receive an input signal and to generate a first digital signal and a residue voltage;
a voltage-to-time conversion element configured to convert the residue voltage to a time domain representation, the voltage-to-time conversion element comprising:
an amplifier comprising an input coupled to an output of the successive approximation register;
a zero crossing detector directly coupled to an output of the amplifier; and
a time-to-digital converter coupled to an output of the zero crossing detector and configured to generate a second digital signal.

US Pat. No. 10,461,760

ALKALI VAPOR CELL

1. An alkali vapor cell comprising a sealed chamber enclosing an alkali atomic gas therein and having at least one optically transparent window, the chamber and the transparent window defining an optical beam path through which a light beam can pass and interact with the alkali atomic gas in the chamber, wherein said alkali vapor cell comprises at least one localized condensation area of alkali atoms at a predetermined location in the sealed chamber, said at least one localized condensation area comprising a metal layer, wherein the metal of said metal layer is made of copper, tantalum, gold, platinum, nickel, or a combination thereof.

US Pat. No. 10,461,759

DLL CIRCUIT HAVING VARIABLE CLOCK DIVIDER

Micron Technology, Inc., ...

1. An apparatus, comprising:a variable clock divider configured to generate a divided clock signal based on feedback of a delay amount;
a delay circuit configured to input the divided clock signal, delay and output the divided clock signal based on the delay amount, and provide the feedback of the delay amount to the variable clock divider; and
a phase detector configured to:
compare phases of the divided clock signal and the delayed divided clock signal, and
control the delay circuit to match phases of the divided clock signal and the delayed divided clock signal.

US Pat. No. 10,461,758

RING OSCILLATOR HAVING A FLAT FREQUENCY CHARACTERISTIC CURVE

Infineon Technologies AG,...

1. A ring oscillator comprising:a feedback chain including a plurality of inverters, and
for at least one of the inverters of the feedback chain: a further inverter, which is connected in parallel with a corresponding inverter of the feedback chain by a capacitor and which comprises an input that is directly coupled with an input of the corresponding inverter of the feedback chain.

US Pat. No. 10,461,757

REFERENCE-LESS FREQUENCY DETECTOR WITH HIGH JITTER TOLERANCE

Futurewei Technologies, I...

1. An apparatus comprising:a not-and (NAND) gate comprising a first NAND gate input port, a second NAND gate input port, and a NAND gate output port;
a charge pump comprising a charge pump activation port and a charge pump output current port, the charge pump activation port is coupled to the NAND gate output port, and the charge pump output current port is configured to couple to a frequency detection loop filter;
an inverter module coupled to the NAND gate and the charge pump so that the inverter module is positioned between the NAND gate and the charge pump; and
a buffer module coupled to the NAND gate and the charge pump so that the buffer module is positioned between the NAND gate and the charge pump,
the buffer module is configured to buffer or delay a signal by a period of time.

US Pat. No. 10,461,756

PLL CIRCUIT

MITSUBISHI ELECTRIC CORPO...

1. A PLL circuit comprising:a voltage-controlled oscillator to transmit a frequency signal corresponding to a voltage of a supplied signal;
a variable frequency divider to perform frequency dividing on an output signal of the voltage-controlled oscillator at a supplied frequency dividing ratio;
a phase frequency comparator to compare an output signal of the variable frequency divider with a reference signal;
a charge pump to output a signal corresponding to a result of the comparison performed by the phase frequency comparator;
a loop filter to supply a signal obtained by smoothing the output signal of the charge pump to the voltage-controlled oscillator;
a ?? modulator to generate the frequency dividing ratio for the variable frequency divider depending on a supplied signal;
a first frequency accumulator to operate using the output signal of the variable frequency divider as a clock, and generate an output value corresponding to the clock as an input value for the ?? modulator;
a second frequency accumulator to operate using the reference signal as a clock, and generate an output value corresponding to the clock;
a comparison operating circuit to compare the output values of the first frequency accumulator and the second frequency accumulator, and calculate a parameter so that a result of the comparison falls within a set value; and
a digital-analog converting circuit to output a signal to be added to an output of the loop filter depending on the parameter output from the comparison operating circuit.

US Pat. No. 10,461,755

DIGITALLY ASSISTED FEEDBACK LOOP FOR DUTY-CYCLE CORRECTION IN AN INJECTION-LOCKED PLL

Oracle International Corp...

1. A duty-cycle correction circuit for an injection-locked phase-locked loop (PLL), comprising a digital calibration circuit, which performs a duty-cycle correction operation by:obtaining a pattern of positive and negative error pulses at rising and falling edges of a reference clock signal for the injection-locked PLL, wherein the pattern specifies deviations of the reference clock signal from a 50% duty cycle;
multiplying the pattern of positive and negative error pulses by a duty-cycle distortion (DCD) template, which specifies a sign of a duty-cycle error for the reference clock signal, to calculate duty-cycle distortion values;
accumulating the duty-cycle distortion values to produce a duty-cycle-error amplitude;
multiplying the duty-cycle-error amplitude by the DCD template to produce a duty-cycle correction signal; and
using the duty-cycle correction signal to compensate for timing errors in the injection-locked PLL, which are caused by duty-cycle variations in the reference clock signal.

US Pat. No. 10,461,754

SWITCH BETWEEN INPUT REFERENCE CLOCKS OF DIFFERENT FREQUENCIES IN A PHASE LOCKED LOOP (PLL) WITHOUT PHASE IMPACT

TEXAS INSTRUMENTS INCORPO...

1. A phase-locked loop (PLL), comprising:a selection circuit including a plurality of inputs, each input to receive a separate reference clock;
a programmable reference clock divider to divide down the reference clock selected by the selection circuit to generate a divided down reference clock;
an analog phase-locked loop (APLL) to generate an output clock;
a feedback clock divider coupled to an output of the APLL, the feedback clock divider to divide down the output clock to generate a feedback clock;
a time-to-digital converter (TDC) coupled to an output of the reference clock divider and an output of the feedback clock divider, the TDC to generate a digital output value based on a phase difference between the divided down reference clock and the feedback clock;
an invalid clock detection circuit to detect whether each of the reference clocks provided to the selection circuit is valid or invalid, wherein, for a reference clock detected by the invalid clock detection circuit to be invalid, the invalid clock detection circuit is to assert an error signal; and
a circuit including a finite state machine, the circuit to cause, responsive to assertion of the error signal for a current reference clock, the reference clock divider and the feedback clock divider to be held in a reset state, the divide ratio of the reference clock divider to be modified, and then to release the reset state.

US Pat. No. 10,461,753

PULSE-BASED SYNCHRONIZATION TRAINING FOR SYNCHRONOUS DIGITAL AND MIXED-SIGNAL SYSTEMS

SEAKR ENGINEERING, INC., ...

1. A method of synchronizing clock signals in a system implemented in a space-based or high-altitude asset, the system comprising a central device having a central device clock and a destination device having a destination device clock, the method comprising:(a) obtaining a first delay amount;
(b) providing, by the central device, a pulse signal to the destination device, wherein the pulse signal is advanced or retarded by the delay amount;
(c) detecting, at the destination device, the pulse signal;
(d) in response to detecting the pulse signal, obtaining, at the destination device, a sample of the destination device clock and storing the sample in a register;
(e) providing the sample of the destination device clock to the central device;
(f) determining, by the central device, whether enough samples are stored in the register to enable calculation of a phase offset between the central device clock and the destination device clock, wherein the phase offset may be calculated when an edge of the destination device clock is detected based on the samples;
(g) in accordance with a determination that a phase offset cannot be calculated, adjusting the first delay amount and repeating steps (a)-(f); and
(h) in accordance with a determination that the phase offset can be calculated, then calculating, by the central device, the phase offset based on a position, in the register, of the sample representing the edge of the destination device clock.

US Pat. No. 10,461,751

FE-FET-BASED XNOR CELL USABLE IN NEUROMORPHIC COMPUTING

Samsung Electronics Co., ...

1. A computing cell for performing a XNOR operation of an input signal with a weight comprising:at least one pair of FE-FETs coupled with a plurality of input lines and storing the weight, the at least one pair of FE-FETs including a first FE-FET and a second FE-FET, the first FE-FET receiving the input signal and storing a first weight, the second FE-FET receiving the input signal complement and storing a second weight, the first FE-FET and the second FE-FET being coupled to form a dynamic storage node;
a plurality of selection transistors coupled with the at least one pair of FE-FETs; and
a reset transistor having a reset transistor source, a reset transistor gate and a reset transistor drain, the reset transistor source being connected to the dynamic storage node, the reset transistor gate being coupled with a reset line.

US Pat. No. 10,461,750

SEMICONDUCTOR DEVICE

Toshiba Memory Corporatio...

1. A semiconductor device comprising:an input/output (IO) signal receiver circuit; and
a latch circuit connected to the IO signal receiver circuit,
wherein the latch circuit includes
a first inverter configured to output a first signal based on an input signal received from the IO signal receiver circuit,
a plurality of N1 inverters connected in series with the first inverter,
a second inverter configured to output a first clock signal based on a first strobe signal,
a plurality of N2 inverters connected in series with the second inverter,
a third inverter configured to output a second clock signal based on a second strobe signal which is an inversion signal of the first strobe signal,
a plurality of N3 inverters connected in series with the third inverter,
a first clock generation circuit which is connected to an output terminal of the second inverter and is configured to generate a third clock signal from the first clock signal, wherein logical level transitions in the third clock signal are delayed with respect to the first clock signal and are completed in a shorter amount of time than the first clock signal,
a second clock generation circuit which is connected to an output terminal of the third inverter and is configured to generate a fourth clock signal from the second clock signal, wherein logical level transitions in the fourth clock signal are delayed with respect to the second clock signal and are completed in a shorter amount of time than the first clock signal,
a fourth inverter configured to output an inversion signal of the first signal in accordance with the third and fourth clock signals, and
a data latch circuit configured to latch an output signal of the fourth inverter in accordance with the third and fourth clock signals, and
wherein (N1+1) is an odd integer equal to 3 or more and both N2 and N3 are equal to (N1+1).

US Pat. No. 10,461,748

ANTI-INTERFERENCE INTEGRATED CIRCUIT

AU OPTRONICS CORPORATION,...

1. An anti-interference integrated circuit (IC), adapted for avoiding an error in a frequency pulse caused by an interference of an adjacent IC, wherein the anti-interference IC outputs a first time signal, the adjacent IC outputs a second time signal, and the anti-interference IC comprises:a logic circuit, receiving the second time signal, and outputting a gate pulse according to a sequence of the second time signal;
an adder, connected to the logic circuit, and adding a first signal and the gate pulse;
a comparator, connected to the adder, and outputting the frequency pulse according to a signal adding result of the adder, wherein a period of the frequency pulse is the same as a period of the first time signal; and
a constant-on-time (COT) control circuit, outputting a first original time signal according to the period of the frequency pulse, wherein the first original time signal is a digital signal, and is a time signal originally generated when the anti-interference IC is not interfered with by the adjacent IC;
wherein the first signal is the first time signal, the adder adds the first time signal and the gate pulse to output an added signal, the comparator compares a reference signal with the added signal, and when the reference signal has a voltage value greater than or equal to that of the added signal, the comparator outputs the frequency pulse.

US Pat. No. 10,461,747

LOW POWER CLOCK GATING CIRCUIT

Apple Inc., Cupertino, C...

1. A circuit comprising:an input circuit configured to receive an enable signal;
clock enable circuitry configured to receive a clock signal;
a latch configured to capture and store an enabled state of the enable signal, wherein the enabled state corresponds to the enable signal being in an active state, wherein the latch comprises a feed forward circuit having a feed forward node and a feedback circuit having a feedback node, wherein the feedback circuit is coupled to provide a feedback signal to the feed forward circuit, wherein the feed forward circuit is configured to capture a current state of the enable signal when the clock signal is inactive, and wherein the feedback circuit is configured to cause the feed forward circuit to retain the enabled state of the enable signal when the clock signal transitions from a logic high state to a logic low state, wherein respective states of a signal on the feed forward node and the feedback signal are independent of a state of the clock signal when the latch is in the enabled state, and wherein the state of the feedback signal is dependent on the state of the signal of the feed forward node;
an output circuit configured to provide an output signal corresponding to a state of the clock signal when the latch is storing the enabled state;
wherein the circuit is configured such that dynamic power consumption does not change responsive to a change in the state of the clock signal when the latch is not storing the enabled state.

US Pat. No. 10,461,746

PROXIMITY SWITCH ASSEMBLY AND METHOD THEREFOR

Ford Global Technologies,...

1. A proximity switch assembly comprising:a proximity switch comprising a proximity sensor providing an activation field; and
control circuitry monitoring a signal responsive to the activation field and determining an activation of the switch based on detecting a first peak value above a threshold when the signal is not stable, followed by a drop and a subsequent rise to a second peak value followed by a sharp drop, wherein the control circuitry further delays recalibration of the switch assembly by a predetermined time period when the signal is detected dropping fast.

US Pat. No. 10,461,745

SENSOR ELECTRODE FOR CAPACITIVE SENSOR DEVICE IN A KEYBOARD HAVING A WIDTH DECREASING TOWARDS ITS CENTER

MICROCHIP TECHNOLOGY GERM...

1. A sensor electrode (SE) for a capacitive sensor device, comprising a plurality of sensor segments separated by insulating spaces and distributed along a line, wherein each sensor segment has a width extending along the line, wherein the width of a sensor segment arranged at a longitudinal center area of the line is smaller than the width of a sensor segment arranged at a beginning or an end of the line defining the sensor electrode, wherein the width of each sensor element is chosen such that the capacity between the sensor electrode and an object (F) with constant distance between the sensor electrode and the object (F) substantially is equal in size for each position of the object (F) relative to the sensor electrode along a longitudinal axis of the sensor electrode and wherein the plurality of sensor segments are electrically short-circuited to one another.

US Pat. No. 10,461,744

PROXIMITY SENSOR CONNECTION MECHANISM

Google LLC, Mountain Vie...

1. An electronic device, comprising:a display assembly comprising an electronic display configured to generate an optical image viewable from in front of the electronic device;
a proximity sensor coupled to at least a portion of the display assembly, the proximity sensor comprising a sensing element configured to be responsive to presence of an object in front of the electronic device, the sensing element supported by a support structure having an upper surface facing a frontal direction of the electronic device, wherein the support structure comprises a body carrying a housing of the proximity sensor within which the sensing element is disposed; and
a conductor that electrically connects the sensing element of the proximity sensor and the portion of the display assembly, the conductor comprising a conductive path extending along the support structure to the upper surface of the support structure.

US Pat. No. 10,461,743

INTERACTIVE DISPLAY SYSTEM AND METHOD FOR USE WITH LOW EMISSIVITY GLASS USING INFRARED ILLUMINATION

imageSurge, Inc., Cambri...

1. A method for operating an interface device on a retail storefront with low emissivity glass, the method comprising:providing the interface device mounted to a first surface of the low emissivity glass with all components of the interface device inside the retail storefront and opposite a second surface of the low emissivity glass outside of retail storefront, the interface device comprising a plurality of infrared(IR) mountable switches each comprising:
at least one infrared (IR) emitter configured to emit IR radiation through the low emissivity glass; and
at least one IR sensor configured to detect a reflection of the IR radiation through the low emissivity glass;
generating, using emitted IR radiation transmitted directly through the low emissivity glass by the at least one IR emitter, at least one trigger area with a reflective zone on the second surface of the low emissivity glass opposite the first surface and at a location substantially opposite the at least one IR emitter of the interface device;
wherein the at least one IR sensor is calibrated to detect reflection of IR radiation reflected back through the low emissivity glass by an IR-reflective object when the at least one IR emitter emits the IR radiation through the low emissivity glass;
detecting, by the at least one IR sensor, a no touch value of IR radiation when no object is in front of the reflective zone, the no touch value comprising a measured value of IR radiation caused by ambient light;
detecting, by the at least one IR sensor, a touch value when the IR radiation emitted from the at least one IR emitter impacts the IR-reflective object located at the reflective zone and reflects back through the low emissivity glass in the reflective zone to the at least one IR sensor, the touch value of IR radiation being greater than the no touch value of IR radiation;
wherein the at least one IR sensor both emits and detects IR radiation in a combined configuration working in conjunction with the at least one IR emitter;
wherein the at least one emitter, the at Ieast one IR sensor and printed circuit board (PCB) components are placed within a multi-layered system further comprising at least one decoupling capacitor placed between the least one IR sensor and the at least one IR emitter as a physical radiation barrier between the at least one IR sensor and at least one IR emitter; and
providing the touch value as a signal input to an interactive display device.

US Pat. No. 10,461,742

CHIP, SELECTABLE MODE BUFFER CIRCUIT AND MODE SELECTING METHOD THEREOF

Novatek Microelectronics ...

1. A selectable mode buffer circuit, comprising:a plurality of pads;
a binary mode selecting circuit, having a plurality of switches, coupled to the pads, the binary mode selecting circuit selecting only one of a charge pumping operation and an interfacing operation for operating according to on or off status of at least one of the switches changed by a mode selecting signal; and
a control circuit, receiving the mode selecting signal, and generating a plurality of input signals for controlling the switches according to the mode selecting signal,
wherein, when the binary mode selecting circuit selecting the charge pumping operation for operating, the binary mode selecting circuit pumps up a power voltage to generate an output voltage,
when the binary mode selecting circuit selecting the interfacing operation for operating, the binary mode selecting circuit buffers an input signal to generate an output signal.

US Pat. No. 10,461,741

POWER SWITCH AND SEMICONDUCTOR DEVICE THEREOF

UPI SEMICONDUCTOR CORPORA...

1. A power switch, comprising:a first transistor cell comprising a first electrode;
a second transistor cell comprising a second electrode;
a body region disposed between the first transistor cell and the second transistor cell; and
a conductive layer electrically connected with the body region, the first electrode and the second electrode respectively,
wherein the body region has a base electrode voltage selectively maintained at a lower one of a first voltage and a second voltage, the first transistor cell is controlled by the second voltage and the second transistor cell is controlled by the first voltage.

US Pat. No. 10,461,740

CLAMP FOR A HYBRID SWITCH

Power Integrations, Inc.,...

1. A switch having a drain terminal, a source terminal and a control terminal, the switch comprising:a normally-on device including a first terminal, a second terminal, and a control terminal, wherein the first terminal of the normally-on device is the drain terminal of the switch and the control terminal of the normally-on device is coupled to the source terminal of the switch;
a normally-off device including a first terminal, a second terminal, and a control terminal, wherein the control terminal of the normally-off device is coupled to the control terminal of the switch, the second terminal of the normally off-device is the source terminal of the switch, and the first terminal of the normally-off device is coupled to the second terminal of the normally-on device; and
a clamp circuit coupled across the normally-off device, wherein the clamp circuit comprises:
a first transistor coupled to the first terminal of the normally-off device;
a resistor coupled to the first transistor and to the second terminal of the normally-off device; and
a second transistor coupled between the first terminal and the second terminal of the normally-off device.

US Pat. No. 10,461,739

TRANSISTOR DEVICE

Infineon Technologies Aus...

1. A transistor device comprising:a unipolar transistor coupled between a first terminal and a second terminal; and
a bipolar transistor coupled in parallel to the unipolar transistor between the first terminal and the second terminal,
wherein the bipolar transistor has a threshold voltage higher than a threshold voltage of the unipolar transistor,
wherein a difference between the threshold voltage of the bipolar transistor and the threshold voltage of the unipolar transistor is at least 1 V, and
wherein the bipolar transistor is configured to carry a majority of a current flowing through the transistor device, from the first terminal to the second terminal, when the current exceeds a predetermined threshold; and
gate control circuitry configured to switch the bipolar transistor on only upon detection of an overcurrent event, wherein the gate control circuitry is configured to distinguish the overcurrent event between a short circuit event and a surge current event and to switch on the bipolar transistor only if the overcurrent event is a surge current event.

US Pat. No. 10,461,738

COMPARATOR ARCHITECTURE AND RELATED METHODS

QUALCOMM Incorporated, S...

1. A system including:a first stage configured to receive an input voltage and a reference voltage, the first stage including an input transistor pair, wherein:
the input voltage is coupled to the input transistor pair;
the input transistor pair is coupled to ground; and
the input transistor pair includes at a common drain a high-gain node having a high-gain node voltage; and
a second stage coupled to the high-gain node and configured to generate an output voltage based on a difference between the input voltage and the reference voltage, the second stage comprising a resistor and an inverter transistor pair, wherein:
gates of the inverter transistor pair are coupled to the high-gain node of the first stage; and
the resistor couples the high-gain node of the first stage to a common drain of the inverter transistor pair and is configured to provide and/or draw current to and/or from the high-gain node of the first stage.

US Pat. No. 10,461,737

CONFIGURABLE CLAMP CIRCUIT

Infineon Technologies Aus...

1. A circuit comprising:a clamp driver circuit comprising a pull-up circuit coupled between a first power supply terminal and an output terminal of the clamp driver circuit, and a pull-down circuit coupled between a second power supply terminal and the output terminal of the clamp driver circuit;
a voltage regulator coupled between the first power supply terminal and the pull-up circuit; and
a logic circuit coupled to the pull-up circuit and the pull-down circuit, the logic circuit comprising a clamp driver configuration input and a clamp driver input, wherein the logic circuit is configured to:
operate the pull-up circuit and the pull-down circuit according to a first polarity when the clamp driver configuration input is in a first state, and
operate the pull-up circuit and the pull-down circuit according to a second polarity opposite the first polarity and deactivate the voltage regulator when the clamp driver configuration input is in a second state different from the first state.

US Pat. No. 10,461,736

SEMICONDUCTOR DEVICE

DENSO CORPORATION, Kariy...

1. A semiconductor device controlling a power switching device to turn on and off, the power switching device having a gate terminal and output terminals between which an output current is produced by a gate voltage applied to the gate terminal, the semiconductor device comprising:an output current detector configured to detect a current value correlated with the output current;
a voltage detector configured to detect a voltage, which is across the output terminals of the power switching device or is correlated with the voltage across the output terminals;
a clamp circuit configured to clamp the gate voltage at a predetermined value; and
a controller configured to control the clamp circuit to adjust the gate voltage based on the voltage detected by the voltage detector, wherein:
the controller controls the clamp circuit to set the gate voltage to be at a minimum voltage according to the detected voltage to cause the output current, which flows during having a short circuit in the power switching device, to be larger than a threshold current required for detecting the short circuit in the power switching device.

US Pat. No. 10,461,735

ELECTRICAL SWITCHING APPARATUS COMPRISING AN IMPROVED ELECTRICALLY INTERCONNECT DEVICE

ALSTOM Transport Technolo...

1. An electrical switching apparatus, comprising:at least two power components, each including first and second power transistors, wherein each first power transistor includes first and second control electrodes, and each second power transistor includes third and fourth control electrodes,
a driver control device of the transistors, configured to deliver a first control signal to each of the first power transistors and a second control signal to each of the second power transistors,
an electrical interconnect device connecting the driver control device to the power components to transmit the first and second control signals to the first and second power transistors,
wherein the electrical interconnect device comprises first, second, third and fourth electrically conductive plates extending parallel to one another, each of these electrically conductive plates electrically connecting the first, second, third and fourth control electrodes, respectively, to the respective outputs of the driver control device, and
wherein the first and second electrically conductive plates are arranged on opposite sides of a first electrically insulating support and in that the third and fourth electrically conductive plates are arranged on opposite sides of a second electrically insulating support.

US Pat. No. 10,461,734

ACTIVE LOAD GENERATION CIRCUIT AND FILTER USING SAME

REALTEK SEMICONDUCTOR COR...

1. An active load generation circuit comprising:a transistor that provides an impedance and has a control terminal and an input terminal, wherein the control terminal receives a control voltage, the input terminal receives an input signal, and the impedance is related to the control voltage;
a voltage control circuit configured to generate an intermediate voltage according to a power supply voltage and a first reference voltage;
a voltage offset and tracking circuit coupled between the voltage control circuit and the transistor and configured to generate the control voltage according to the input signal and the intermediate voltage, wherein the control voltage varies with the input signal; and
a temperature sensing circuit coupled to the voltage control circuit and configured to sense an ambient temperature of the active load generation circuit and adjust the first reference voltage according to the ambient temperature.

US Pat. No. 10,461,733

PARALLELING POWER SWITCHES USING A DIFFERENTIAL MODE CHOKE IN THE GATE DRIVE LOOP

Power Integrations, Inc.,...

1. A power module, comprising:a first power switch having a first gate;
a second power switch paralleled with the first power switch and having a second gate;
a third power switch paralleled with the first and the second power switches and having a third gate;
a terminal coupled to receive a gate drive signal from a gate driver;
a first conduction path to couple the gate drive signal to the first gate;
a second conduction path to couple the gate drive signal to the second gate;
a third conduction path to couple the gate drive signal to the third gate;
a distribution choke to distribute the gate drive signal to the first and second power switches, the distribution choke having a first winding disposed in the first conduction path and a second winding disposed in the second conduction path, the distribution choke coupled in a differential mode;
a second distribution choke to distribute the gate drive signal, the second distribution choke comprising a third winding disposed in the first conduction path and a fourth winding disposed in the third conduction path; and
a third distribution choke to distribute the gate drive signal, the third distribution choke comprising a fifth winding disposed in the second conduction path.

US Pat. No. 10,461,732

SYSTEM AND METHOD OF DRIVING A POWER SWITCH IN COMBINATION WITH REGULATED DI/DT AND/OR DV/DT

Infineon Technologies Aus...

1. A gate drive circuit for controlling a gate-controlled component, the gate drive circuit comprising:a dynamic controller configured to receive an input reference signal and to control a gate voltage of the gate-controlled component via an output terminal of the gate drive circuit;
at least one component feedback circuit for the dynamic controller, the at least one component feedback circuit configured to provide feedback from at least one of a time derivative of a load path voltage or a time derivative of a load path current of the gate-controlled component to the dynamic controller; and
a gate drive feedback circuit for the dynamic controller, the gate drive feedback circuit configured to provide feedback from a time derivative of a voltage at the output terminal of the gate drive circuit.

US Pat. No. 10,461,731

POWER SUPPLY DEVICE

ULVAC, INC., Chigasaki (...

1. A power supply device comprising:a DC power source configured to output a DC voltage;
a high frequency amplifying circuit configured to generate a high frequency current by repeatedly turning on and turning off a semiconductor switch connected to the DC power source;
a high frequency output circuit configured to supply the high frequency current to a load;
a main reactance circuit having a predetermined reactance value, the main reactance circuit having a first end connected to the high frequency amplifying circuit and a second end connected to the high frequency output circuit;
a protection circuit connected in parallel to the main reactance circuit between the high frequency amplifying circuit and the high frequency output circuit, the protection circuit including:
a DC voltage source configured to supply a predetermined reference voltage;
a switch circuit configured to turn on when a turning on voltage larger than the predetermined reference voltage is applied, the switch circuit including:
a reference capacitance element to be charged by the reference voltage; and
a diode element to be reverse-biased by a charged voltage of the reference capacitance element; and
a sub-reactance circuit having a predetermined reactance value, wherein:
an absolute value of an impedance of a parallel connection circuit of the protection circuit and the main reactance circuit, when the switch circuit is turned on, is set to be larger than an absolute value of an impedance of the parallel connection circuit of the protection circuit and the main reactance circuit when the switch circuit is turned off,
once the switch circuit is turned on, an absolute value of an impedance on a load side of the high frequency amplifying circuit becomes larger than an absolute value of an impedance when the protection circuit is turned off, so that the high frequency current is limited, and
the turning on voltage is applied to the switch circuit, the diode element is forward-biased to turn on, and the switch circuit is then turned on.

US Pat. No. 10,461,730

ADAPTIVE MULTI-LEVEL GATE DRIVER

Infineon Technologies Aus...

1. A gate driver circuit for driving a power switch comprising:a gate driver having a first input for receiving an input signal and an output coupled to the power switch, the gate driver configured for providing a primary gate current and an auxiliary gate current; and
a differential voltage sensor having a first input for receiving the input signal, a second input coupled to a power supply voltage, a third input coupled to a terminal of the power switch, and an output coupled to a second input of the gate driver,
wherein the gate driver comprises a primary driver configured for providing the primary gate current and an auxiliary driver configured for providing the auxiliary gate current, and
wherein the primary driver is coupled to the first input of the gate driver and the auxiliary driver is coupled to the second input of the gate driver.

US Pat. No. 10,461,729

STACKED RF SWITCH WITH FAST SWITCHING SPEED

Qorvo US, Inc., Greensbo...

1. A first stacked RF switch comprising a plurality of RF switching circuits coupled in series between a first RF switch connection node and a second RF switch connection node, comprising:a first RF switching circuit of the plurality of RF switching circuits, comprising:
a first switching transistor element coupled between a first source connection node and a first drain connection node;
a first source/drain (S/D) bias resistive element coupled across the first switching transistor element; and
a first S/D shorting circuit coupled across the first S/D bias resistive element, such that the first switching transistor element is coupled in series between the first RF switch connection node and the second RF switch connection node; and
a second RF switching circuit of the plurality of RF switching circuits, comprising a second switching transistor element coupled between the first drain connection node and a second drain connection node;
wherein:
the first stacked RF switch is configured to operate in one of an ON mode and an OFF mode;
during the ON mode, the first switching transistor element and the second switching transistor element are configured to be ON and the first S/D shorting circuit is configured to be ON; and
during a first interval immediately following a transition from the ON mode to the OFF mode, the first S/D shorting circuit is further configured to be ON.

US Pat. No. 10,461,728

SEMI-CONTROLLABLE DEVICE DRIVING METHOD AND APPARATUS, AND HYBRID DEVICE

Qiaoshi Guo, Guangdong (...

1. A semi-controllable device driving apparatus, comprising a voltage detection switch, wherein an input end of the voltage detection switch is connected to two ends of a semi-controllable device that needs to be driven; the voltage detection switch is connected, in series, in a driving loop of the semi-controllable device; the voltage detection switch is turned on when a potential difference at the two ends of the semi-controllable device is not greater than an on-state voltage of the semi-controllable device; and the voltage detection switch is turned when the semi-controllable device is on, wherein there is no insulated isolation between an input loop of the voltage detection switch, an output loop of the voltage detection switch, and the semi-controllable device; and the voltage detection switch is turned on when the potential difference at the two ends of the semi-controllable device is greater than 0 and meets a voltage direction in which the semi-controllable device is turned on.

US Pat. No. 10,461,727

SYSTEM AND METHOD FOR GENERATING PLURALITY OF SHORT RF PULSES

H6 SYSTEMS INC., Nashua,...

1. A system for generating a plurality of short RF pulses for use in determining susceptibility of an electronic target to interference from microwaves, the system comprising:a first circuit comprising a first power supply and a plurality of first networks for generating a first output signal in a form of a high voltage pedestal pulse which is supplied to a common node;
a second circuit comprising a second power supply and a plurality of second networks for generating a second output signal in a form of a high voltage short pulse which is supplied to the common node;
the high voltage pedestal pulse passing through a blocking inductor and being combined with the high voltage short pulse such that the high voltage short pulse being stacked on top of the high voltage pedestal pulse to form a stacked combined high voltage pulse; and
a low frequency magnetron being coupled to the common node for receiving the stacked combined high voltage pulse and generating a short RF pulse which has a duration of time which is less than 130 nanoseconds and useful in determining the susceptibility of an electronic target to interference from microwaves.

US Pat. No. 10,461,726

COMPENSATED COMPARATOR

1. A compensated comparator, comprising:first and second inputs configured to receive, respectively, first (Vin1) and second (Vin2) input potentials to be compared;
a differential stage provided with first and second transistors of a same type, connected by sources thereof in a node (S) and respectively comprising a first gate and a second gate;
a decision stage connected to drains of the first and second transistors and delivering a comparison signal on an output of the comparator;
first and second capacitors intercalated, respectively, between the first gate and the first input and between the second gate and the second input;
first and second decision switches disposed between the decision stage and the drains of the first and second transistors of the differential stage; and
pre-charge, sharing, and decision devices commanded by a control circuit, configured to implement successive pre-charge, sharing, and decision phases,
the pre-charge device being configured to impose a charge on the first and second capacitors such that a pre-charge voltage is present at terminals of the capacitors at an end of the pre-charge phase,
the sharing device being configured to short circuit a gate and a drain of each of the first and second transistors, the short circuit causing a charge transfer from the first and second capacitors to the node (S), the charge transfer being interrupted from a moment that gate-source voltages of the first and second transistors become lower than respective threshold voltages of the first and second transistors, and
the decision device being configured to switch on the decision switches and to make a comparison between the first (Vin1) and second (Vin2) input potentials applied on the first and second inputs.

US Pat. No. 10,461,725

VOLTAGE COMPARATOR, VOLTAGE COMPARISON METHOD OF THE SAME, AND RESET METHOD OF THE SAME

ELECTRONICS AND TELECOMMU...

1. A voltage comparator comparing a voltage of a first input signal and a voltage of a second input signal, comprising:a first switch pair transmitting, respectively, the first input signal and the second input signal to a gate of a first transistor and a gate of a second transistor in response to a clock signal;
a second switch pair connecting a drain and a source of the first transistor and connecting a drain and a source of the second transistor in response to at least one of the clock signal and a reset signal; and
a first reset switch connecting the gate of the first transistor and the gate of the second transistor in response to the reset signal.

US Pat. No. 10,461,724

RELAXATION OSCILLATOR WITH OVERSHOOT ERROR INTEGRATION

Analog Devices Global, H...

1. A method of using a relaxation oscillator to generate a clock signal, the method comprising:charging a first oscillation capacitor with a current from a first current source or sink during a first charging phase, until a first comparator determines that a first oscillation capacitor voltage meets a target voltage;
in response to the first oscillator capacitor voltage meeting the target voltage, interrupting charging of the first oscillation capacitor before a first error integration phase commences;
during the first error integration phase, adjusting the target voltage by integrating an overshoot error of a voltage on the first oscillation capacitor beyond a reference voltage, the reference voltage generated by passing a current from the first current source or sink, or a replicate thereof through an oscillation resistor to generate the reference voltage, after the charging of the first oscillation capacitor has been interrupted;
after the first error integration phase, interrupting integration of the overshoot error of the voltage on the first oscillation capacitor before a first reset phase commences; and
during the first reset phase, discharging the first oscillation capacitor.

US Pat. No. 10,461,723

FULL RANGE REALIGNMENT RING OSCILLATOR

Taiwan Semiconductor Manu...

1. A realignment ring-cell circuit, comprising:a single-to-differential unit having an input configured to receive a realignment signal, a first output for outputting a first differential output and a second output for outputting a second differential output;
an OR gate, wherein the first output for outputting is a first input to the OR gate;
an AND gate, wherein the second output for outputting is a first input to the AND gate;
a first P-type metal-oxide-semiconductor transistor, wherein a gate of the P-type metal-oxide-semiconductor transistor is electrically connected to an output of the OR gate; and
a first N-type metal-oxide-semiconductor transistor, wherein a gate of the N-type metal-oxide-semiconductor transistor is electrically connected to an output of the AND gate, wherein a drain of the P-type metal-oxide-semiconductor transistor and a drain of the N-type metal-oxide-semiconductor transistor are electrically connected to each other and are further electrically connected to a second input of the OR gate and a second input of the AND gate.

US Pat. No. 10,461,722

FREQUENCY SPREADING CIRCUIT

DENSO CORPORATION, Kariy...

1. A frequency spreading circuit comprising:a ring oscillator configured with a multiple number of logic inverting circuits in a ring shape for generating multi-phase clock signals;
a period measuring unit configured to measure a period of a reference clock, which is inputted, by the multi-phase clock signals of the ring oscillator and output a measured period as a period data value;
a frequency spreading calculation unit configured to calculate a frequency spreading command value in accordance with a frequency spreading rate, a frequency spreading period and the period data value of the period measuring unit, which are inputted; and
a pulse generation unit configured to generate a clock pulse corresponding to the frequency spreading command value in accordance with a data value determined by addition of the frequency spreading command value to the period data value.

US Pat. No. 10,461,721

SEMICONDUCTOR APPARATUS, DEGRADATION VALUE DETERMINATION SYSTEM AND PROCESSING SYSTEM

RENESAS ELECTRONICS CORPO...

1. A semiconductor apparatus comprising:an operation oscillator;
a reference oscillator;
a first operation switch connected in series with the operation oscillator between a power supply potential and a ground potential;
a first reference switch connected in series with the reference oscillator between the power supply potential and the ground potential;
a second reference switch connected in parallel with the reference oscillator between the power supply potential and the ground potential;
an operation counter configured to count a number of first output pulses from the operation oscillator in a predetermined measurement period;
a reference counter configured to count a number of second output pulses from the reference oscillator in the predetermined measurement period;
a first gating component inputs the number of first output pulses; and
a second gating component inputs the number of second output pulses,
wherein the predetermined measurement period is set as a period during which the first gating component and the second gating component are in a through state.

US Pat. No. 10,461,720

ACOUSTIC FILTER

SnapTrack, Inc., San Die...

12. A surface acoustic wave (SAW) filter having a first longitudinal end and a second longitudinal end, the SAW filter comprising:a piezoelectric material;
a first reflector on the piezoelectric material and at the first longitudinal end, the first reflector configured to reflect acoustic waves within the SAW filter;
a first group of inter-digital transducers (IDTs) on the piezoelectric material and adjacent to the first reflector, the first group of IDTs including:
a first input IDT coupled to an input terminal, the first input IDT configured to receive a first input electric signal and propagate a first set of acoustic signals via a first portion of the piezoelectric material; and
a first output IDT coupled to an output terminal, the first output IDT configured to receive at least a portion of the first set of acoustic signals and propagate a first output electric signal to the output terminal;
a partial-IDT on the piezoelectric material and adjacent to the first group of IDTs, the partial-IDT:
configured to electrically float on the piezoelectric material;
including a first bus bar and a second bus bar, at least one of the first bus bar or the second bus bar being uncoupled from ground;
spaced from the first group of IDTs at a cavity distance configured to facilitate propagation of the first set of acoustic signals from the first group of IDTs within, or between elements of, the partial-IDT;
a second group of IDTs on the piezoelectric material and adjacent to the partial-IDT, the second group of IDTs:
including a second input IDT coupled to the input terminal, the second input IDT configured to receive a second input electric signal and propagate a second set of acoustic signals via a second portion of the piezoelectric material;
including a second output IDT coupled to the output terminal, the second output IDT configured to receive at least a portion of the second set of acoustic signals and propagate a second output electric signal to the output terminal; and
spaced from the partial-IDT at a reflector distance configured to reduce propagation of the second set of acoustic signals from the second group of IDTs within, or between elements of, the partial-IDT; and
a second reflector on the piezoelectric material and at the second longitudinal end, the second reflector adjacent to the second group of IDTs and configured to reflect the second set of acoustic signals toward the second input IDT.

US Pat. No. 10,461,719

ACOUSTIC RESONATOR STRUCTURE HAVING AN ELECTRODE WITH A CANTILEVERED PORTION

Avago Technologies Intern...

1. An acoustic resonator, comprising:a first electrode;
a second electrode comprising a plurality of sides, wherein at least one of the sides comprises a cantilevered portion, wherein the second electrode comprises a first surface disposed substantially at a first height, and the cantilevered portion comprises a second surface disposed substantially at a second height, which is higher than the first height;
a piezoelectric layer disposed between the first and second electrodes, the cantilevered portion extending above the piezoelectric layer, wherein a first gap exists between the cantilevered portion and the piezoelectric layer, and the first gap is substantially filled with a low acoustic impedance material; and
a bridge comprising a second gap, which exists in a region between the second electrode and the piezoelectric layer, wherein the second gap is substantially filled with the low acoustic impedance material, and is disposed adjacent to one of the sides of the second electrode.

US Pat. No. 10,461,718

ACOUSTIC WAVE RESONATOR, FILTER, AND MULTIPLEXER

TAIYO YUDEN CO., LTD., T...

1. An acoustic wave resonator comprising:a piezoelectric substrate; and
an IDT that is located on the piezoelectric substrate and includes first regions and second regions alternately arranged in an extension direction of electrode fingers, which excite an acoustic wave, in an overlap region in which the electrode fingers overlap, at least one electrode finger of the electrode fingers in the second regions having a different width from the at least one electrode finger in the first regions, a width of an outer second region of the second regions in the extension direction differing from a width of an inner second region of the second regions,
wherein a width of an outermost first region of the first regions in the overlap region in the extension direction is less than a width of an inner first region of the first regions in the extension direction.

US Pat. No. 10,461,717

BALUNS FOR RF SIGNAL CONVERSION AND IMPEDANCE MATCHING

TEXAS INSTRUMENTS INCORPO...

1. An integrated circuit (IC) device comprising:a substrate;
metal layers arranged over the substrate; and
a magnetically coupled structure including:
a first coil having first and second terminals and first metal windings, wherein the first metal windings form a first continuous spiral-like electrical path between the first and second terminals, wherein the first metal windings include turns arranged in a first metal layer of the metal layers, and wherein each turn of the first metal windings is connected to another turn of the first metal windings by a crossing connection arranged in a metal layer other than the first metal layer; and
a second coil having third and fourth terminals and second metal windings, wherein the second metal windings form a second continuous spiral-like electrical path between the third and fourth terminals, wherein the second metal windings include turns arranged in a second metal layer of the metal layers.

US Pat. No. 10,461,716

LOW-PASS FILTER

TDK CORPORATION, Tokyo (...

3. A low-pass filter comprising:a first input/output port;
a second input/output port;
a first LC parallel resonator and a second LC parallel resonator connected in series and provided between the first input/output port and the second input/output port;
a first path;
a second path;
a third path;
a multilayer stack for integrating the first and second input/output ports, the first and second LC parallel resonators and the first to third paths, the multilayer stack including a plurality of dielectric lavers stacked to be aligned in a first direction, the multilayer stack having a first end face and a second end face located at opposite ends in the first direction; and
a ground terminal provided on the first end face of the multilayer stack and connected to the third path, wherein
the first LC parallel resonator has a plurality of ends including a first end, the first end being closest to the first input/output port in circuit configuration as compared to all other ones of the plurality of ends of the first LC parallel resonator,
the second LC parallel resonator has a plurality of ends including a second end, the second end being closest to the second input/output port in circuit configuration as compared to all other ones of the plurality of ends of the second LC parallel resonator,
the first path includes a first LC series resonator and connects the first end to a ground,
the second path includes a second LC series resonator and connects the second end to the ground,
the third path include, a third-path capacitor and connects a connection point between the first and second LC parallel resonators to the ground,
the third path has an inductance lower than an inductance of each of the first path and the second path, and
a physical connection corresponding to the connection point between the first and second LC parallel resonators, the third-path capacitor, and the ground terminal are arranged to intersect or contact one imaginary straight line extending in the first direction.

US Pat. No. 10,461,715

MITIGATING POWER NOISE USING A CURRENT SUPPLY

INTERNATIONAL BUSINESS MA...

11. A system for mitigating power noise using a current supply, the system comprising:an integrated circuit operably coupled to a first circuit over a first path;
a controller configured to determine a variation of a current level in the integrated circuit; and
a second circuit operably coupled to the integrated circuit over a second path, wherein the second circuit is configured to provide additional power to the integrated circuit based at least in part on the determined variation of the current level.

US Pat. No. 10,461,714

CLASS D AMPLIFIER CIRCUIT

Cirrus Logic, Inc., Aust...

1. A Class-D amplifier circuit for amplifying a digital input signal comprising a controller configured to control the Class-D amplifier circuit to selectively transition between an open-loop operational mode and a closed-loop operational mode based on indication of amplitude of said digital input signal, wherein the controller is configured to control the Class-D amplifier circuit in the open-loop operational mode if the indication of the amplitude of the digital input signal is below a first amplitude threshold and to control the Class-D amplifier circuit in the closed-loop operational mode if the indication of the amplitude of the digital input signal is above said first amplitude threshold.

US Pat. No. 10,461,713

RADIO-FREQUENCY AMPLIFIER DEVICE

Nordic Semiconductor ASA,...

1. A radio-frequency (RF) amplifier device, comprising:a signal input for receiving an RF electrical signal;
a variable-gain amplifier for amplifying the received RF electrical signal;
a signal output for outputting the amplified RF electrical signal;
a serial input for receiving serialised data encoding a custom gain level;
a memory for storing data representative of the custom gain level;
a binary input for switching a gain of the amplifier between a first level and the custom gain level;
configuration logic configured to receive serialised data encoding the custom gain level at the serial input, and to store data representative of the custom gain level in the memory; and
gain-control logic configured to read the data representative of the custom gain level from the memory, and to set the gain of the amplifier to the first level or to the custom gain level in dependence on a state of the binary input.

US Pat. No. 10,461,712

AUTOMATIC VOLUME LEVELING

AMAZON TECHNOLOGIES, INC....

1. A method of automatic volume leveling, the method comprising:receiving, by an audio device, an audio signal;
receiving, by the audio device, indicator data indicating that the audio signal is of a first type;
determining a volume index value of the audio device, wherein the volume index value is a user-selected volume setting of the audio device;
determining a first gain of the audio signal, wherein the first gain is determined by using the volume index value to lookup the first gain in a volume curve table for signals of the first type;
determining an estimated root mean square (RMS) value of a first portion of the audio signal using a formula: x2rms(n)=(1?k)·x2rms (n?1)+k·[x(n)]2 where x2rms(n?1) represents a previous estimated RMS value for a previous portion of the audio signal sampled prior to the first portion, x(n) represents the first portion of the audio signal, and k=1?exp(?2.2/(fs*t/1000)), where t is a time constant in milliseconds, and fs is a sampling rate of the audio signal;
determining a second gain of the first portion of the audio signal, wherein the second gain is determined by using the estimated RMS value of the first portion to lookup the second gain on a static level curve of input level versus gain;
generating a modified first portion of the audio signal by multiplying the first portion of the audio signal by the second gain;
equalizing the modified first portion of the audio signal by reducing an audio level for a first frequency range of the modified first portion of the audio signal to reduce an output level of a loudspeaker at the first frequency range; and
outputting the modified first portion of the audio signal to the loudspeaker.

US Pat. No. 10,461,711

METHOD AND APPARATUS FOR OUTPUTTING AUDIO SIGNAL, METHOD FOR CONTROLLING VOLUME

Gaonda Corporation, Goya...

1. A method for outputting an audio signal, the method comprising:measuring, by a processor, a first hearing threshold of a user in a frequency band among a plurality of predefined frequency bands;
setting, by the processor, an output level of a modulated signal in the frequency band to a level less than or equal to a level of the first hearing threshold;
setting, by the processor, an output level of an audio signal in the frequency band to a level greater than the level of the first hearing threshold, wherein the output level of the audio signal is determined using a weight value and the level of the first hearing threshold, such that an increase of the level of the first hearing threshold causes a decrease of a rate of increase of the output level of the audio signal in the frequency band;
outputting, by the processor, the modulated signal and the audio signal simultaneously via an audio output unit, wherein the modulated signal is outputted at a level that is equal to the level of the first hearing threshold;
outputting, by the processor, an interface via a display unit, the interface including:
i) a frequency selection module for selecting one of the plurality of predefined frequency bands on a display unit,
ii) a visual information output module for outputting a visual signal which changes in synchronization with a modulation pattern of the modulated signal for each respective frequency band of the plurality of predefined frequency bands, the visual signal being output in a different visual pattern for each frequency band according to the modulation pattern, and
iii) a volume adjustment module for dynamically adjusting the first hearing threshold according to an improvement in hearing of the user by adjusting an intensity of a modulated signal of the selected frequency band such that the modulated signal of the selected frequency band is not audible,
wherein the visual information output module is outputted at a position in a central area of the volume adjustment module, the visual signal outputted by the visual information output module for each frequency band changes according to the same modulation pattern as that of the corresponding modulation signal, and the visual signal is outputted at a fixed position when the volume adjustment module is adjusted;
receiving, by the processor, response information of the user via the interface responding to the visual signals for the respective frequency bands when the user perceives one or more of the modulated signals for the respective frequency bands as a result of the improvement in hearing of the user;
adjusting, by the processor, an output level of the one or more perceived modulated signals based on the response information of the user until the modulated signal is no longer heard by the user;
measuring, by the processor, a second hearing threshold of the user in the frequency band that is lower than the first hearing threshold based on response information received from the user; and
adjusting, by the processor, the respective output levels of the modulated signal and the audio signal based on the second hearing threshold,
wherein the adjusting of the respective output levels of the modulated signal and the audio signal includes lowering the output level of the modulated signal to a level less than or equal to a level of the second hearing threshold and lowering the output level of the audio signal to a level greater than the level of the second hearing threshold.

US Pat. No. 10,461,710

MEDIA PLAYBACK SYSTEM WITH MAXIMUM VOLUME SETTING

Sonos, Inc., Santa Barba...

1. A controller device of a media playback system, the controller device comprising:a network interface configured to communicatively couple the controller device to at least one playback device of the media playback system;
an input interface;
at least one processor;
a non-transitory computer-readable medium having instructions stored thereon, wherein the instructions, when executed by the at least one processor, cause the controller device to:
receive, via the input interface, a request to change a volume level of the at least one playback device to a requested volume level;
send, via the network interface to the at least one playback device, an instruction indicative of the requested change to the volume level, wherein sending the instruction causes the at least one playback device to adjust a volume level of the at least one playback device to a first adapted volume level that is lower than the requested volume level; and
after the volume level of the at least one playback device has been adjusted to the first adapted volume level, output an indication of an adjustment to the volume level of the at least one playback device, wherein the indication of the adjustment is representative of the requested volume level.

US Pat. No. 10,461,709

AMPLIFIER WITH AUXILIARY PATH FOR MAXIMIZING POWER SUPPLY REJECTION RATIO

Cirrus Logic, Inc., Aust...

1. An amplifier, comprising:a main signal path having a plurality of stages compensated by feedback elements, the plurality of stages comprising an output stage configured to receive electrical energy from a power supply; and
an auxiliary path independent of the main signal path and comprising an output stage compensation circuit configured to:
generate a compensation current proportional to noise present in the power supply; and
apply the compensation current to cancel a power supply-induced current present in at least one of the feedback elements.

US Pat. No. 10,461,708

SIGNAL AMPLIFIER, SIGNAL RECEIVING CIRCUIT INCLUDING THE SAME, AND DEVICE INCLUDING THE SAME

SAMSUNG ELECTRONICS CO., ...

1. A signal amplifier, comprising:a first amplifier to amplify a first input signal to form a first amplified output signal, the first input signal having a common mode voltage in a first voltage range and the first amplified output signal having a common mode voltage in a second voltage range different from the first voltage range;
a second amplifier to amplify a second input signal to form a second amplified output signal, the second input signal, different from the first input signal, having a common mode voltage in the second voltage range and the second amplified output signal having a common mode voltage in the second voltage range, wherein the first amplifier is off when the second amplifier is on and the second amplifier is off when the first amplifier is on; and
an output to output the first amplified output signal or the second amplified output signal as an amplified output signal.

US Pat. No. 10,461,707

AMPLIFIER CLASS AB OUTPUT STAGE

TEXAS INSTRUMENTS INCORPO...

1. An amplifier, comprising:an input stage;
a folded cascode stage coupled to the input stage; and
a class AB output stage coupled to the folded cascode stage, the class AB output stage comprising:
a high-side output transistor;
a low-side output transistor; and
a high-side feedback circuit coupled to the high-side output transistor, the high-side feedback circuit comprising:
a high-side sense transistor comprising a control terminal, wherein the control terminal of the high-side sense transistor is coupled to a control terminal of the high-side output transistor; and
a high-side feedback transistor coupled to an output of the high-side sense transistor and to the folded cascode stage;
wherein a first output of the folded cascode stage is coupled to the control terminal of the high-side sense transistor and the control terminal of the high-side output transistor;
wherein the high-side feedback transistor is configured to operate as a degeneration resistor.

US Pat. No. 10,461,706

DIFFERENTIAL AMPLIFIER INCLUDING CANCELLATION CAPACITORS

TEXAS INSTRUMENTS INCORPO...

1. A system, comprising:a differential amplifier coupled to a parasitic capacitor positioned between a first node and a first reference voltage source;
a buffer amplifier having an input terminal and an output terminal, the input terminal coupled to the first node and the output terminal coupled to a cancellation capacitor;
a controlled current source coupled to the first node and the input terminal, the controlled current source coupled to a second reference voltage source; and
a current sense circuit coupled to the cancellation capacitor and the second reference voltage source.