US Pat. No. 10,892,810

APPARATUS AND METHOD FOR DYNAMICALLY SELECTING BEAMFORMING CODEBOOK AND HIERARCHICALLY GENERATING BEAMFORMING CODEBOOKS

Samsung Electronics Co., ...

1. An apparatus for determining a beamforming codebook for a next beam sweeping period, comprising:a channel estimation processor configured to receive a signal using a current beamforming codebook in a current beam sweeping period;
a look-up table configured to store a plurality of beamforming codebooks;
a state abstraction processor connected between the channel estimation processor and the look-up table, and configured to determine a codebook index based on a current channel condition as a function of the received signal and the current beamforming codebook, and select one of the plurality of beam sweeping codebooks in the look-up table as the beamforming codebook for the next beam sweeping period based on the codebook index.

US Pat. No. 10,892,809

METHOD AND APPARATUS FOR TRANSMITTING CSI FEEDBACK INFORMATION FOR MULTIPLE BEAMS

NTT DOCOMO, INC., Tokyo ...

1. A method performed by a terminal, the method comprising:transmitting information for indicating a type of channel state information feedback information;
transmitting a first type of channel state information feedback information in the channel state information feedback information for multiple beams by using a first type of channel state information feedback manner, wherein the first type of channel state information feedback information includes at least first transmission rank information, first channel quality information and feedback information for a first beam in the multiple beams;
transmitting a second type of channel state information feedback information in the channel state information feedback information for the multiple beams by using a second type of channel state information feedback manner, wherein the second type of channel state information feedback information includes at least second transmission rank information, second channel quality information and feedback information for beams other than the first beam in the multiple beams.

US Pat. No. 10,892,808

METHOD OF ACQUIRING CHANNEL STATE INFORMATION

NTT DOCOMO, INC., Tokyo ...

1. A method of acquiring Channel State Information (CSI) in a wireless communication system, the method comprising:transmitting, from a Base Station (BS) to a User Equipment (UE), a resource setting including time-domain behavior of CSI-Reference Signals (RSs) transmission that designates aperiodic, periodic, or semi-persistent; and
transmitting, from the BS to the UE, the CSI-RSs based on the designated aperiodic, periodic, or semi-persistent,
wherein the resource setting includes precoding information that indicates whether precoders applied to the CSI-RSs is the same or different.

US Pat. No. 10,892,807

CODEBOOK ADAPTATION

QUALCOMM Incorporated, S...

1. A method of wireless communication performed by a transmitter device, comprising:determining an adapted codebook for beamforming transmission based at least in part on an initial codebook and one or more spatial parameters,
wherein the adapted codebook is associated with an adapted set of candidate beams with an adapted angular range that is different than an initial angular range of an initial set of candidate beams of the initial codebook, and
wherein a number of candidate beams in the adapted set of candidate beams is smaller than a number of candidate beams in the initial set of candidate beams; and
transmitting information using at least one beam of the adapted set of candidate beams based at least in part on determining the adapted codebook.

US Pat. No. 10,892,806

ENCODING AND DECODING OF INFORMATION FOR WIRELESS TRANSMISSION USING MULTI-ANTENNA TRANSCEIVERS

Virginia Tech Intellectua...

1. A method performed by at least one processor to communicate using multiple transmit antennas and multiple receive antennas over a multi-input-multi-output (MIMO) communication channel, the method comprising:determining first information for transmission over the MIMO communication channel;
processing the first information for transmission over the MIMO communication channel using a transmitter corresponding to the multiple transmit antennas, the transmitter including an encoding mapping that is realized using an encoder machine-learning network trained to learn one or more encoding and decoding techniques for communicating over different types of MIMO channels, wherein processing the first information includes:
applying the first information to a particular channel modeling layer that models the MIMO communication channel,
obtaining an output of the particular channel modeling layer that provides an estimate of the first information modified by one or more effects of the MIMO communication channel, and
generating, using the encoding mapping, a plurality of first RF signals corresponding to the first information, the plurality of first RF signals generated based on at least the estimate of the first information obtained as the output of the particular channel modeling layer; and
transmitting, to a destination device, the plurality of first RF signals through the MIMO communication channel using a plurality of transmit antennas of the multiple transmit antennas.

US Pat. No. 10,892,805

BEAM SCANNING METHOD AND RELATED DEVICE

China Academy of Telecomm...

1. A beam scanning method, comprising:determining, by a first communication node, at least one transmission beam according to an optimum group of reception beams between a receiver of the first communication node and a transmitter of a second communication node; wherein at least one beam is selected from a set of transmission beams as the at least one transmission beam; and the set of transmission beams comprises a part or all of beams in the optimum group of reception beams, or the set of transmission beams comprises a part of all available beams determined by centering on each of a part or all of beams in the optimum group of reception beams;
transmitting, by the first communication node, a signal to the second communication node through a transmitter of the first communication node using the determined at least one transmission beam in sequence until an optimum transmission beam is determined; and
wherein identification information of a part or all of beams in an optimum group of transmission beams, corresponding to the optimum group of reception beams, of the transmitter of the second communication node is carried in the signal transmitted by the first communication node to the second communication node through the transmitter of the first communication node using the determined at least one transmission beam.

US Pat. No. 10,892,804

METHODS FOR UPLINK MULTIUSER SIGNALING AND TRANSMISSION

NEWRACOM, INC., Lake For...

19. A network device to function as station (STA) in a Wireless Local Area Network (WLAN) to participate in an uplink (UL) multi-user (MU) simultaneous transmission to an access point (AP), the network device comprising:a Radio Frequency (RF) transceiver; and
a set of one or more processors, wherein the set of one or more processors are to:
process a first trigger frame that initiates the UL MU simultaneous transmission, wherein the trigger frame includes (1) a UL MU Physical Layer Convergence Protocol (PLCP) Protocol Data Unit (PPDU) attributes field to indicate attributes pertaining to a UL MU PPDU transmitted to the AP during the UL MU simultaneous transmission that are common to the STA and one or more other STAs and (2) a STA Physical Layer Service Data Unit (PSDU) attributes field for the STA to indicate attributes pertaining to the UL MU PPDU that are specific to the STA, wherein the UL MU PPDU attributes field includes a cascade trigger subfield to indicate whether a second trigger frame is scheduled to be transmitted following the first trigger frame and during a designated period, and wherein the STA PSDU attributes field for the STA includes an assignment subfield to indicate a transmission resource unit that the STA is to use to transmit a set of Media Access Control (MAC) Protocol Data Units (MPDUs) within the UL MU PPDU to the AP during the UL MU simultaneous transmission,
determine whether the second trigger frame is scheduled to be transmitted following the first trigger frame and during the designated period, and
generate the UL MU PPDU for transmission to the AP through a wireless medium during the UL MU simultaneous transmission based on the first trigger frame.

US Pat. No. 10,892,803

ANTENNA STRUCTURE AND OPERATION METHOD THEREOF

Inventec (Pudong) Technol...

1. An antenna structure used for receiving a millimeter wave signal, comprising:a curved base having a convex curved surface;
a plurality of multi-input multi-output (MIMO) antenna cells, uniformly and movably disposed on the convex curved surface, wherein each of the MIMO antenna cells has a plurality of receiving units and a plurality of transmission units to receive the millimeter wave signal independently; and
a plurality of connecting rods, wherein each of the MIMO antenna cells is connected to the convex curved surface of the curved base through a corresponding one of the connecting rods, and each of the connecting rods comprises:
an extendable rod, connected to the convex curved surface to adjust length between the corresponding one of the MIMO antenna cells and a source of the millimeter wave signal.

US Pat. No. 10,892,802

METAL PLATING COMPOSITIONS

Rohm and Haas Electronic ...

1. A reaction product comprising one or more diamines comprising primary or secondary amine moieties with a reaction product comprising one or more monoamines comprising primary or secondary amine moieties and one or more compounds having formula:where R is a linking group having formula:where R1, R2 may be the same or different and comprise hydrogen, linear or branched (C1-C4)alkyl, hydroxyl, hydroxy(C1-C3)alkyl, carboxyl, carboxy(C1-C3)alkyl or (C1-C3)alkoxy; and m is an integer of 1 to 15, wherein the one or more diamines comprises a formula:where R? is a linking group and R42 and R43 may be the same or different and comprise hydrogen, linear or branched (C1-C12)alkyl, alkyleneoxy or substituted or unsubstituted (C6-C18)aryl, wherein R? comprises:ora substituted or unsubstituted (C6-C18)aryl; where R44-R51 may be the same or different and comprise hydrogen, linear or branched (C1-C5)alkyl, linear or branched hydroxy(C1- C5)alkyl or linear or branched (C1-C5)alkoxy; and Z is a carbon atom or nitrogen atom; and p and t may be the same or different and are independently integers of one or greater, e is an integer of 0 to 3, and a, b, c and d may be the same or different and are numbers from 1 or greater.

US Pat. No. 10,892,801

METHOD FOR SIGNALING FOR PHASE FEEDBACK, AND DEVICE FOR SAME

LG Electronics Inc., Seo...

1. A method for receiving signaling for a phase feedback by a User Equipment (UE), the method comprising:receiving, from a base station (BS), control information including first information indicating whether the UE should perform the phase feedback for a plurality of beams;
determining whether to perform the phase feedback based on the control information; and
receiving, from the BS, a downlink channel based on performing beam cycling in a unit of a resource element (RE), based on the first information indicating that the phase feedback should not be performed,
wherein first REs to which a first beam is applied and second REs to which a second beam is applied are configured to be interlaced within one symbol based on performing the beam cycling, and
wherein the first beam and the second beam are differently configured based on a different combination of precoding matrix indices used for reception of the downlink channel.

US Pat. No. 10,892,800

SYSTEMS AND METHODS FOR WIRELESS POWER TRANSFER INCLUDING PULSE WIDTH ENCODED DATA COMMUNICATIONS

NuCurrent, Inc., Chicago...

1. A wireless receiver system for a wireless power transfer system, the wireless receiver system configured to wirelessly receive electrical power from a wireless transmission system, the wireless receiver system comprising:an antenna, the antenna configured to receive electrical energy signals from the wireless transmission system and transmit electrical data signals to the wireless transmission system, the electrical data signals including an encoded message signal, the encoded message signal comprising one or more encoded message words; and
a controller, including a processor, the controller configured to
determine a message signal, the message signal including one or more message words,
encode the one or more message words into one or more encoded message words of the encoded message signal based on a coding format,
the coding format correlating each of a plurality of correlated ratios, respectively, with one of a plurality of format words, each of the plurality of correlated ratios corresponding to one of a plurality of format words,
wherein each of the plurality of correlated ratios is a ratio of a duty cycle of a pulse to a respective period associated with one or both of the duty cycle and the pulse,
wherein each of the one or more encoded message words are encoded as one of the plurality of correlated ratios,
determine the encoded message signal based on the plurality of encoded message words, and
communicate the encoded message signal to the wireless transmission system.

US Pat. No. 10,892,799

SYSTEMS AND METHODS FOR LONG-DISTANCE MOBILE WIRELESS POWER

Electric Sky Holdings, In...

1. A method of operating a first antenna capable of magnetically coupling in a reactive near field to a second antenna, the method comprising:coupling a magnetic field between the first antenna and the second antenna, the first and second antennas (i) resonant at an operating frequency, and (ii) located within the reactive near field, wherein the reactive near field covers a region that is less than a distance of 0.159 of a free space wavelength for the operating frequency away from the first antenna; and
providing a receiving system with a threshold amount of wireless inductive power exceeding 1 watt,
wherein each of the first and second antennas are sized to fit inside a spherical volume with a diameter less than 1/20 of a free space wavelength of the operating frequency;
wherein energy dissipated to far-field radiation, per cycle, due to circulating currents from the first antenna is less than ½ the peak energy stored in the magnetic field; and
wherein one or both of the first antenna and the second antenna is a dipole resonant at the operating frequency.

US Pat. No. 10,892,798

COMMUNICATION APPARATUS, COMMUNICATION METHOD, AND PROGRAM FOR EXCHANGING DATA WITH A TARGET

SONY CORPORATION, Tokyo ...

1. A communication device, comprising:a first processing circuitry;
a second processing circuitry; and
an interface between the first processing circuitry and the second processing circuitry, wherein
the first processing circuitry is configured to send a first command to the second processing circuitry;
the second processing circuitry is configured to send a first information to the first processing circuitry based on the first command,
the first processing circuitry is configured to send a second command to the second processing circuitry based on the first information,
the second processing circuitry is configured to set an interface based on the second command, and is configured to send a second information to the first processing circuitry indicating that the interface is set,
the first processing circuitry is configured to send a third command to the second processing circuitry, and
the second processing circuitry is configured to transmit a message to identify a communication target.

US Pat. No. 10,892,797

METHOD AND APPARATUS FOR PROCESSING UPLINK SIGNAL IN CABLE BROADCASTING NETWORK

Electronics and Telecommu...

6. A method for processing an uplink signal of cable broadcasting network, the method comprising:modulating uplink data to be transmitted to a broadcasting station which is located at an end of the cable broadcasting network into a plurality of symbols;
performing a correlation-coding on the plurality of symbols; and
outputting an analog radio frequency (RF) signal corresponding to the plurality of correlation-coded symbols.

US Pat. No. 10,892,796

UWB SPREAD SPECTRUM POWER SPATIAL COMBINING ANTENNA ARRAY

Rockwell Collins, Inc., ...

1. An ultra-wide band spread spectrum communication system comprising:a log periodic antenna comprising a plurality of radiating elements;
a plurality of active driving elements, each uniquely associated with one or more of the plurality of radiating elements, each active driving element comprising:
a modem;
a mixer;
a low-noise amplifier; and
a local oscillator,
wherein:
each active driving element defines a separate channel operating in a distinct sub-band; and
each active driving element is configured to broadcast at least a portion of a data packet within the corresponding distinct sub-band.

US Pat. No. 10,892,795

TRANSMISSION METHOD, NETWORK DEVICE, AND TERMINAL DEVICE

HUAWEI TECHNOLOGIES CO., ...

1. A transmission method, comprising:determining, by a network device, a frequency hopping sequence of each of N terminal devices grouped by the network device into G groups in each of L adjacent slots, wherein a length of the frequency hopping sequence is L, any two terminal devices in each group of terminal devices in each slot use a same frequency resource, any two groups of terminal devices in each slot use different frequency resources, and each group of terminal devices in each slot comprises a maximum of K terminal devices, wherein N>2, G?2, L?2, 2?K sending, by the network device, first indication information to a first terminal device in the N terminal devices, wherein the first indication information determines a frequency hopping sequence of the first terminal device and a pilot signal used by the first terminal device in each slot.

US Pat. No. 10,892,794

MULTI-CHANNEL TRANSMISSION DEVICE

Global Unichip Corporatio...

1. A multi-channel transmission device, comprising:a clock generator, configurated to generate a plurality of input clocks; and
a plurality of transmitters, coupled to the clock generator, and configurated to operate based on a spread spectrum clock respectively, wherein each of the plurality of transmitters comprises:
a phase rotator, configurated to provide a selection signal and an interpolation signal of multiple bits, select two of the plurality of input clocks as a first selected input clock and a second selected input clock according to the selection signal, and generate a spread spectrum clock according to the interpolation signal, the first selected input clock and the second selected input clock,
wherein frequency offset ranges and spread spectrum periods of a plurality of spread spectrum clocks are different from each other, wherein the spread spectrum periods are change periods of frequency offsets of the spread spectrum clocks respectively.

US Pat. No. 10,892,793

AERODYNAMIC MOUNT FOR A MODULE

Juggernaut Defense, LLC, ...

1. A mount comprising:a mount body collectively defined by a front side, a rear side, a top side, a bottom side, and first and second opposite sides;
a plurality of engagement apertures defined through the mount body; and
a plurality of securing members, wherein one of the plurality of securing members is disposed within each of the plurality of engagement apertures of the mount body;
wherein the mount body defines curved edges formed along a peripheral edge of the mount body, each of the curved edges defining a tapered surface forming a slope portion; and
wherein each of the plurality of engagement apertures and each of the securing members are configured for alignment with a module.

US Pat. No. 10,892,792

PROTECTIVE DEVICE FOR AN ELECTRONIC DEVICE, IN PARTICULAR A MOBILE TELEPHONE, PROVIDED WITH A UNIT FOR DISPENSING A PRODUCT

ALBEA LE TREPORT, Le Tre...

1. A protective device for an electronic device, in particular a mobile telephone, comprising:a protective casing, said casing being capable of being fastened to the electronic device,
the device comprising a dispensing unit dispensing a product, in particular a cosmetic product,
the dispensing unit being provided with a container for said product and with means for actuating the dispensing of the product,
the dispensing unit being mounted on the casing such that the container is movable with respect to the casing,
the movement together of the container with respect to the protective casing actuating the dispensing of the product
while the means for actuating the dispensing of the product remains fixed and immobile with respect to the protective casing during the dispensing of the product occurring in consequence of the movement together of the container and the protective casing.

US Pat. No. 10,892,791

PAM-4 DFE ARCHITECTURES WITH SYMBOL-TRANSITION DEPENDENT DFE TAP VALUES

Rambus Inc., San Jose, C...

1. A receiver circuit comprising:an analog summer circuit to receive a first input signal and to produce an output data signal based on a first error removal voltage and a second error removal voltage;
a first data sampler to sample a first sampler input signal based on the output data signal using a first reference voltage to produce a first sampler decision for a symbol period; and,
a second data sampler to sample a second sampler input signal based on the output data signal using a second reference voltage to produce a second sampler decision for the symbol period, wherein the first error removal voltage is generated from the first sampler decision and the second error removal voltage is generated from the second sampler decision.

US Pat. No. 10,892,790

RECEPTION APPARATUS AND RECEPTION METHOD

SONY SEMICONDUCTOR SOLUTI...

1. A reception apparatus, comprising:a control circuit configured to compare a difference, between a frequency of a desired signal and a central frequency of an interference signal, and a specific threshold value; and
a filter configured to:
select one of a band stop characteristic or a low pass characteristic as a signal transmission characteristic of the filter based on a result of the comparison,
set, based on the selection of the band stop characteristic, a first frequency of the filter, wherein the first frequency is between an upper limit for a band of the frequency of the desired signal and the central frequency of the interference signal, and
set, based on the selection of the low pass characteristic, a second frequency of the filter, wherein the second frequency is higher than the upper limit for the band of the frequency of the desired signal.

US Pat. No. 10,892,789

METHODS, SYSTEMS, AND DEVICES FOR ADJUSTING RESOURCE BLOCK SCHEDULES FOR USER END DEVICES TO DIFFERENT FREQUENCY BANDS

ISCO International, LLC, ...

1. A device, comprising:a processing system including a processor; and
a memory that stores executable instructions that, when executed by the processing system, facilitate performance of operations, comprising:
obtaining a first measurement associated with a first uplink wireless signal associated with a first physical resource block (PRB) during a first time slot transmitted by a first communication device of a plurality of communication devices in a cellular network and obtaining a second measurement associated with a second uplink wireless signal associated with a second PRB during a second time slot transmitted by a second communication device of the plurality of communication devices resulting in a plurality of measurements, wherein the plurality of measurements is obtained by monitoring uplink signals supplied by a plurality of remote radio units, and wherein the first measurement provides a first quality measure of the first uplink wireless signal and the second measurement provides a second quality measure of the second uplink wireless signal;
determining the first measurement of the plurality of measurements associated with the first communication device of the plurality of communication devices does not conform to a first signal quality condition and determining the second measurement of the plurality of measurements associated with the second communication device of the plurality of communication devices does not confirm to a second signal quality condition;
identifying that the first communication device and the second communication device are assigned to a first uplink frequency band; and
generating a first frequency band reassignment strategy to direct the first communication device and the second communication device to use a second uplink frequency band responsive to the first measurement not conforming to the first signal quality condition, the second measurement not conforming to the second signal quality condition, and the first communication device and the second communication device being assigned to the first uplink frequency band, wherein the second uplink frequency band is assigned to fewer communication devices than the first uplink frequency band.

US Pat. No. 10,892,788

LOW COMPLEXITY MIMO DIGITAL PRE-DISTORTION

TELEFONAKTIEBOLAGET LM ER...

9. A transmitter arrangement for cancelling crosstalk and correcting power amplifier (PA) distortion for a transmitter branch of a multiple-input multiple-output (MIMO) configuration having multiple branches, comprising:an interface for receiving an original baseband signal of a first MIMO branch;
processing circuitry configured to combine the original baseband input signal of the first MIMO branch with a crosstalk output signal generated from two or more signals associated with two or more respective MIMO branches to produce a combined signal, wherein the two or more signals are used as input to, and processed by, a crosstalk model;
digitally pre-distorting the combined signal; and
the processing circuitry further configured to process the combined signal to generate an output signal in order to minimize error of the original baseband input signal caused by the crosstalk and/or PA distortion.

US Pat. No. 10,892,787

LOAD MODULATION IN SIGNAL TRANSMISSION

Airbus Defence and Space ...

1. A transmitter for transmitting a signal, the transmitter comprising:a power amplifier;
a driver amplifier, an output of the driver amplifier being connected to an input of the power amplifier via a first load modulation device operable to match an impedance of the driver amplifier output with an impedance of the power amplifier input;
a second load modulation device connected to an output of the power amplifier and operable to match an impedance of the power amplifier output with an input impedance of a further device;
an envelope amplifier for applying envelope tracking to the power amplifier and the driving amplifier; and
a predistortion device operable to apply predistortion to the signal to compensate for non-linearity of the driver amplifier and the power amplifier and the load modulation devices, wherein the predistortion device comprises at least one of:
a first predistortion device connected to the second load modulation device and arranged to provide a control signal thereto, and operable to apply predistortion to compensate non-linearity of the power amplifier and the second load modulation device, and
a second predistortion device connected to the first load modulation device and arranged to provide a control signal thereto, and operable to apply predistortion to compensate non-linearity of the driver amplifier and the first load modulation device.

US Pat. No. 10,892,786

DIGITAL PREDISTORTION WITH OUT-OF-BAND AND PEAK EXPANSION REGULARIZATION

ANALOG DEVICES INTERNATIO...

1. An apparatus for applying digital predistortion to an input signal, the apparatus comprising:an actuator circuit, configured to use a model of a nonlinear electronic component to apply a predistortion to at least a portion of an input signal to generate an output of the actuator circuit, the input signal comprising a range of in-band frequency components;
an adaptation circuit, configured to update the model based on a feedback signal indicative of an output of the nonlinear electronic component; and
an out-of-band (OOB) regularization circuit, configured to:
receive the output of the actuator circuit, and
generate an OOB error signal indicative of OOB frequency components in the output of the actuator circuit,
wherein:
the model includes a loss function that is indicative of a sum of a first term and a second term,
the first term is indicative of a difference between the feedback signal and the output of the actuator circuit,
the second term is indicative of the OOB error signal, and
the adaptation circuit is configured to update the model further based on the OOB error signal in a way that decreases the loss function.

US Pat. No. 10,892,785

METHOD FOR DETERMINING MIMO DETECTION MATRIX OF SCHEDULED UE

China Academy of Telecomm...

1. A method for processing a signal, comprising:receiving, by a front end device of a base station system, a time-domain signal transmitted by an antenna element;
performing, by the front end device, multiple-input and multiple-output (MIMO) detection and related baseband processing on the time-domain signal; and
transmitting, by the front end device, the signal, on which the baseband processing is performed, to a backend device of the base station system;
wherein the method further comprises:
estimating, by the front end device, a channel, interference, and noise of a scheduled UE, and transmitting information about the estimated channel, interference, and noise to the backend device; and
performing, by the backend device, uplink scheduling, and determining an MIMO detection matrix of the scheduled UE, according to the estimation information, and transmitting uplink resource allocation scheme information and the MIMO detection matrix of the scheduled UE to the front end device.

US Pat. No. 10,892,784

MEMORY DEVICE WITH ENHANCED ERROR CORRECTION VIA DATA REARRANGEMENT, DATA PARTITIONING, AND CONTENT AWARE DECODING

Western Digital Technolog...

1. A memory controller, comprising:one or more circuits configured to:
receive encoded data from a memory device,
segment the encoded data into multiple segments,
determine that two segments of the multiple segments should be combined into a new segment based on a comparison of a distance between the same two segments to a predefined join threshold,
combine the two segments into the new segment,
decode the new segment via application of a first set of decoder parameters,
decode a first segment of the multiple segments different from the new segment via application of a second set of decoder parameters different from the first set of decoder parameters, and
transmit decoded data including the decoded new segment and the decoded first segment to a host system.

US Pat. No. 10,892,783

APPARATUS AND METHOD FOR DECODING POLAR CODES

Korea University Research...

1. A polar code decoding method by a polar code decoding apparatus, the polar code decoding method comprising:receiving a code word vector generated by polar encoding; and
decoding the encoding vector based on a soft cancellation (SCAN) decoding method and a round-trip belief propagation (BP) decoding method,
in the decoding, an inner code of the code word vector is decoded by the round-trip BP decoding method and an outer code is decoded by the SCAN decoding method,
wherein the decoding includes:
updating an input L message of the outer code with a channel LLR as an input value in accordance with a schedule of the round-trip BP, wherein the input L message is a LLR message propagated to leftmost mode of the outer code;
updating an L message and a B message of the inner code in accordance with a schedule of the SCAN, wherein the L message is a LLR message propagated from left node to right node and the B message is a LLR message propagated from right node to left node; and
updating an input B message of the outer code with an output LLR updated in accordance with the schedule of the SCAN as an input value in accordance with a schedule of the round-trip BP, wherein the input B message is a LLR message propagated to rightmost node of the inner code.

US Pat. No. 10,892,782

FLEXIBLE SYSTEM AND METHOD FOR COMBINING ERASURE-CODED PROTECTION SETS

EMC IP Holding Company LL...

1. A system, comprising:a processor; and
a memory that stores executable instructions that, when executed by the processor, facilitate performance of operations, comprising:
selecting source chunks of data stored within a geographically distributed data storage system that are determined to have fewer than a defined number of data fragments, wherein a first source chunk, of the source chunks, is divided into first indexed data fragments, and wherein the first indexed data fragments are erasure-coded to generate first coding fragments associated with the first source chunk;
modifying an index of a data fragment of the first indexed data fragments and modifying the first coding fragments of the first source chunk to convert the source chunks into complementary source chunks, wherein the complementary source chunks do not have data fragments with a common index, and wherein the modifying the first coding fragments generates modified coding fragments independent of performing an erasure-coding operation; and
subsequent to the modifying, generating a meta chunk based on combining the complementary source chunks, wherein combined coding fragments, associated with the meta chunk, are determined based on adding the modified coding fragments with second coding fragments generated based on erasure coding second indexed data fragments of a second source chunk of the source chunks.

US Pat. No. 10,892,781

METHOD AND DEVICES FOR A REDUCED REPAIR AND UPDATE ERASURE CODE

ZEBWARE AB, Stockholm (S...

1. An apparatus comprising:processing circuitry configured to:
encode data using a Mojette transform based on generating encoded representations of data blocks, wherein the processing circuitry, for generating the encoded representations of data blocks, is further configured to:
read data in the form of a data block formatted according to specified settings to comprise rows and columns,
create a set of projections that includes the processing circuitry further configured to:
apply the Mojette transform on the data block, and
create a first number of projections based on mapping each row of the data block to a corresponding projection, the first number of projections including the same information as a corresponding row,
output the created set of projections to enable a storage of the data in the form of the set of projections, and
transmit the encoded data over a network to another device.

US Pat. No. 10,892,780

POLAR POLAR CODE ENCODING AND DECODING METHOD AND APPARATUS

Huawei Technologies Co., ...

1. A polar code decoding method, comprising:obtaining a polar code and a code length N of the polar code;
determining a survivor path quantity L of the polar code according to the code length N of the polar code and a signal-to-noise ratio (SNR) for receiving the polar code, wherein L is a positive integer;
performing successive cancellation list (SCL) decoding on the polar code according to the survivor path quantity L, to obtain L survivor paths; and
checking at least one of the L survivor paths, to obtain a decoding result of the polar code.

US Pat. No. 10,892,779

ERROR CORRECTION DEVICE, OPERATING METHOD THEREOF AND ELECTRONIC DEVICE INCLUDING THE SAME

SK hynix Inc., Gyeonggi-...

1. An error correction device comprising:a bit reliability value determination circuit configured to determine bit reliability values corresponding to hard decision bits, based on soft decision bit sets corresponding to the hard decision bits; and
a decoder including a variable node configured to receive and store the hard decision bits and the bit reliability values, and perform a decoding operation for the hard decision bits by restoring reliability values from the bit reliability values,
wherein the reliability values correspond to elements except a same element as a decision symbol configured by the hard decision bits, in a Galois field (GF) defined in the variable node.

US Pat. No. 10,892,778

ENCODING METHOD AND DEVICE AND DECODING METHOD AND DEVICE FOR STRUCTURED LDPC

ZTE CORPORATION, Guangdo...

1. An encoding method for a structured low-density parity-check (LDPC) code, comprising:determining a base matrix Hb used for encoding, wherein the base matrix Hb comprises an Mb×Kb block A corresponding to a plurality of systematic bits and an Mb×Mb block B corresponding to a plurality of parity bits to have Hb=[A, B], and hbij denotes an entry in an i-th row and a j-th column of the base matrix Hb, wherein i is a row index of the base matrix Hb, j is a column index of the base matrix Hb, wherein Kb=Nb?Mb, Kb is an integer greater than or equal to 4 and less than or equal to 10, Nb is an integer, i=1, . . . , Mb and j=1, . . . , Nb, and Nb is greater than or equal to 3×Kb;
wherein the base matrix Hb comprises a plurality of submatrices, the plurality of submatrices comprises an upper-left submatrix Hb1 and an upper-left submatrix Hb2, a number of rows of the upper-left submatrix Hb1 and a number of rows of the upper-left submatrix Hb2 both are smaller than a number of rows of the base matrix Hb, a numbers of columns of the upper-left submatrix Hb1 and a number of columns of the upper-left submatrix Hb2 both are smaller than a number of columns of the base matrix Hb, and the upper-left submatrix Hb1 is an upper-left submatrix of the upper-left submatrix Hb2; and
performing an LDPC encoding operation on a source information bit sequence according to the base matrix Hb and an expansion factor Z corresponding to the base matrix Hb to obtain a codeword sequence, wherein Z is a positive integer greater than or equal to 1;
wherein the upper-left submatrix Hb1 consists of an intersection of the first 4 rows and the first Kb+4 columns of the matrix Hb, a number of entries corresponding to a Z×Z non-zero square matrix in each row of the upper-left submatrix Hb1 is less than or equal to Kb+2 and greater than or equal to Kb?2, and a square matrix comprising the last four columns of the upper-left submatrix Hb1 is a lower-left triangular matrix or a quasi-lower-left triangular matrix;
wherein the lower-left triangular matrix refers to a square matrix each entry above a main diagonal of which corresponds to a Z×Z zero square matrix, and each entry on the main diagonal of which corresponds to a Z×Z identity matrix; and
wherein the quasi-lower-left triangular matrix refers to a 4×4 square matrix which comprises a L×L upper-right submatrix, wherein the L×L upper-right submatrix is a lower-left triangular matrix, and wherein the L×L upper-right submatrix consists of an intersection of the last L rows and the last L columns of the upper-left submatrix Hb1, L is equal to 2 or 3.

US Pat. No. 10,892,777

FAST ERROR RECOVERY WITH ERROR CORRECTION CODE (ECC) SYNDROME WEIGHT ASSIST

Seagate Technology LLC, ...

1. A method for decoding data, comprising:applying at least two reference voltages to extract an initial code word representative of data stored in a memory;
using an error correction code (ECC) decoder to decode the initial code word;
determining an initial syndrome weight for the initial code word;
performing a coarse search by, over a first plurality of iterations, concurrently adjusting each of the at least two reference voltages to generate a succession of first updated code words, decoding the first updated code words using the ECC decoder and determining a corresponding syndrome weight for each of the first updated code words;
subsequently performing a fine search by, over a second plurality of iterations, individually adjusting each of the at least two reference voltages in turn to generate a succession of second updated code words, decoding the second updated code words using the ECC decoder and determining a corresponding syndrome weight for each of the second updated code words;
identifying final values for the at least two reference voltages that generate a selected one of the second updated code words having the minimum syndrome weight; and
extracting a user data portion of the data stored in the memory using the final set of the at least two reference voltages.

US Pat. No. 10,892,776

MEMORY CONTROLLER AND METHOD OF ACCESSING FLASH MEMORY

SILICON MOTION, INC., Jh...

1. A memory controller, for use in a data storage device, wherein a low-density parity check (LDPC) process performed by the memory controller comprises an initial phase, a decoding phase, and an output phase, the memory controller comprising:a variable-node circuit; and
a check-node circuit,
wherein during each LDPC decoding iterative operation in the decoding phase:
the check-node circuit obtains a codeword difference from the variable-node circuit, and calculates a syndrome according to the codeword difference, and the variable-node circuit is configured to:
determine a syndrome weight according to the syndrome from the check-node circuit;
obtain a previous codeword, that is generated in a previous LDPC iterative operation, from a variable-node memory without obtaining a channel value, that is read from a flash memory of the data storage device, from a channel-value memory;
perform bit-flipping on one or more codeword bits in the previous codeword according to the calculated syndrome weight to generate an updated codeword; and
subtract the previous codeword from the updated codeword to obtain the codeword difference.

US Pat. No. 10,892,775

TRANSMITTING SYSTEM, APPARATUS AND METHOD FOR UNIFYING PARALLEL INTERFACES

SAMSUNG ELECTRONICS CO., ...

1. A transmitting apparatus for unifying parallel interfaces, the transmitting apparatus comprising:an input clock generator configured to generate an input clock signal of a desired frequency;
a dynamic divider circuit configured to,
receive the input clock signal,
generate a parallel clock signal by dividing the desired frequency of the input clock signal based on a variable division input, the variable division input selected based on a variable parallel data input, and
provide the parallel clock signal to one or more shift registers;
the one or more shift registers configured to receive the variable parallel data input based on the parallel clock signal, and shift the variable parallel data input to generate a bit stream; and
at least one multiplexer associated with a serial clock signal, the at least one multiplexer configured to receive the bit stream from each of the one or more shift registers, and output at least one bit of a serial bit stream based on a serial clock frequency of the serial clock signal.

US Pat. No. 10,892,774

RE-QUANTIZATION DEVICE HAVING NOISE SHAPING FUNCTION, SIGNAL COMPRESSION DEVICE HAVING NOISE SHAPING FUNCTION, AND SIGNAL TRANSMISSION DEVICE HAVING NOISE SHAPING FUNCTION

NAGOYA INSTITUTE OF TECHN...

1. A re-quantization device having a noise shaping function, the re-quantization device comprising:a subtractor which is configured to input a high resolution signal being a pulse code modulation signal and output a low resolution signal being a pulse code modulation signal to detect re-quantization noise which is a difference between the high resolution signal and the low resolution signal;
a discrete time filter which is configured to perform frequency weighting;
a quantizer;
an adder which is configured to add an additional signal to an output signal of the quantizer; and
an additional signal selector which is configured to generate the additional signal,
wherein the high resolution signal is input to the quantizer,
a signal obtained by adding the additional signal to the output signal of the quantizer is set to be the low resolution signal,
the re-quantization noise is input to the discrete time filter,
the additional signal is calculated on the basis of values of the output signal of the discrete time filter from a present time to a finite step future,
the additional signal has 31 or less values, and
these processes are executed through batch processing.

US Pat. No. 10,892,773

ANALOG-TO-DIGITAL CONVERTER AND SENSOR ARRANGEMENT INCLUDING THE SAME

TDK ELECTRONICS AG, Muni...

1. An analog-to-digital converter, comprising:an input terminal for an analog signal to be converted;
a first output terminal for a digital signal representing the analog signal to be converted;
a terminal for a reference signal;
a summing node connected to the input terminal for the analog signal to be converted, the summing node having a second output terminal;
an integrator connected downstream of the summing node;
a comparator connected downstream of the integrator and having a terminal for a clock signal and further having an output;
a feedback loop including a switch controlled by the output of the comparator, the switch connected between an input of the summing node and the terminal for the reference signal;
a gain element connected between the second output terminal of the summing node and the integrator, the gain element configured to switch between a first gain and a second gain, the first gain being different from the second gain, wherein the gain element is configured to operate with the first gain during a first number of cycles of the clock signal and to operate with the second gain during a consecutive second number of cycles of the clock signal; and
a counter connected downstream from the comparator, the counter configured to selectively count one of a first increment step size and a second increment step size in response to a signal from the comparator and dependent on one of the first gain or second gain, the counter connected to the first output terminal to provide the digital signal.

US Pat. No. 10,892,772

LOW POWER ALWAYS-ON MICROPHONE USING POWER REDUCTION TECHNIQUES

INVENSENSE, INC., San Jo...

1. A device comprising:a closed loop feedback regulating circuit that supplies an input signal representative of a time-varying voltage signal to a quantizer circuit, wherein the quantizer circuit, as a function of the input signal, converts the input signal to a quantizer discrete-time signal;
a first circuit that, as a function of the discrete-time signal, determines a key quantizer statistic value for the quantizer discrete-time signal; and
a second circuit that, as a function of the key quantizer statistic value, determines a signal statistic value for the input signal and a gain control value.

US Pat. No. 10,892,771

SEGMENTED RESISTOR DIGITAL-TO-ANALOG CONVERTER

Texas Instruments Incorpo...

1. An analog-to-digital converter (ADC), comprising:a digital-to-analog converter (DAC) including a resistor network, the resistor network including a first segment and a second segment, the first segment including a first switch coupled between a first supply voltage node and a first set of resistors, and the second segment including a second switch coupled between the first supply voltage node and a second set of resistors;
the first segment including a third switch coupled in series with a second resistor, the series-combination of the third switch and second resistor being coupled in parallel with at least one resistor of the first set of resistors; and
the second segment including a fourth switch coupled in series with a third resistor, the series-combination of the fourth switch and third resistor being coupled in parallel with at least one resistor of the second set of resistors.

US Pat. No. 10,892,770

NOISE SHAPING IN A DIGITAL-TO-ANALOG CONVERTOR

TEXAS INSTRUMENTS INCORPO...

1. A method for shaping low frequency noise comprising:converting a binary input to a thermometric code;
extracting signal information from the thermometric code;
decimating the signal information;
converting the signal information into a lower bit-count signal;
upsampling the lower bit-count signal;
applying mismatch shaping on a plurality of unit elements in the lower bit-count signal at a first DAC; and
outputting from the first DAC a signal component of the lower bit-count signal.

US Pat. No. 10,892,769

ANALOG-TO-DIGITAL CONVERTER WITH HYSTERESIS

Texas Instruments Incorpo...

1. A circuit, comprising:an analog-to-digital converter (ADC) having an ADC output;
a direction detection circuit having a direction detection circuit input and a first direction detection circuit output, the first direction detection circuit input coupled to the ADC output;
an adder having first and second adder inputs and an adder output, the first adder input coupled to the first direction detection circuit output, and the second adder input coupled to a hysteresis storage element;
a first latch having a first latch input and a first latch output, the first latch input coupled to the adder output; and
a first comparator having first and second comparator inputs, the first comparator input coupled to the ADC output, and the second comparator input coupled to the first latch output.

US Pat. No. 10,892,768

LOW NOISE AND LOW DISTORTION TEST METHOD AND SYSTEM FOR ANALOG-TO-DIGITAL CONVERTERS

TEXAS INSTRUMENTS INCORPO...

1. A method of testing an analog-to-digital converter (ADC), the ADC including an input with a first ADC input terminal, and a second ADC input terminal to receive an input signal, the method comprising:receiving, by a processor, a first set of data values sampled by the ADC while the first and second ADC input terminals are connected to one another;
receiving, by the processor, a second set of data values sampled by the ADC while: (i) the first and second ADC input terminals are connected to a test circuit signal chain of a test circuit, and (ii) a test circuit signal source applies a zero volt source voltage signal to the test circuit signal chain;
receiving, by the processor, a third set of data values sampled by the ADC while: (i) the first and second ADC input terminals are connected to the test circuit signal chain, and (ii) the test circuit signal source applies a full scale source voltage signal to the test circuit signal chain; and
computing, by the processor, an ADC SNR value that represents a noise performance of the ADC based on the first set of data values, the second set of data values, and the third set of data values.

US Pat. No. 10,892,767

HIGH ACCURACY MATCHING SYSTEM AND METHOD THEREFOR

NXP USA, INC., Austin, T...

1. A circuit comprising:an analog to digital converter (ADC) configured to generate an output code;
a current source configured to provide an input signal to the ADC, the current source comprising:
a first current branch including a first unit element group, the first unit element group comprising a first unit element coupled by way of a first set of switches to a first node and a second node and a second unit element coupled by way of a second set of switches to the first node and the second node; and
a second current branch including a second unit element group, the second unit element group comprising a third unit element coupled by way of a third set of switches to the first node and the second node and a fourth unit element coupled by way of a fourth set of switches to the first node and the second node; and
a control circuit configured to provide control signals to the sets of switches based on the output code, the control circuit further configured to sort unit element currents and to dynamically switch unit elements during an element matching operation, wherein the output code is used to sort the unit element currents based on a relationship between a current ratio and the output code.

US Pat. No. 10,892,766

RECONFIGURABLE DIGITAL CONVERTER FOR CONVERTING SENSING SIGNAL OF PLURALITY OF SENSORS INTO DIGITAL VALUE

DAEGU GYEONGBUK INSTITUTE...

1. A digital converter comprising:a sensing oscillator including a plurality of tri-state buffers configured to generate a sensing clock period signal corresponding to a change value of at least one of a resistive sensor and a capacitive sensor;
a reference oscillator configured to generate a predetermined fixed clock period signal;
a processor configured to change a connection state of the plurality of tri-state buffers;
a frequency divider configured to scale up the generated sensing clock period signal based on a predetermined value; and
a counter configured to count the scaled up sensing clock period signal based on the generated fixed clock cycle signal and output a counted digital value,
wherein the reference oscillator comprises:
a first inverse voltage controller, a second inverse voltage controller, a first tri-state buffer, and a second tri-state buffer,
wherein an output terminal of the first tri-state buffer is connected to an end of a first zero temperature coefficient resistor that is robust to temperature change, and an output terminal of the second tri-state buffer is connected to an end of a first reference capacitor,
wherein an input terminal of the first inverse voltage controller is connected to another end of the first zero temperature coefficient resistor and another end of the first reference capacitor,
wherein the output terminal of the first inverse voltage controller is connected to an input terminal of the second tri-state buffer and an input terminal of the second inverse voltage controller, and
wherein an output terminal of the second inverse voltage controller is connected to an input terminal of the first tri-state buffer, and the predetermined fixed clock period signal which is proportional to a resistance value of the first zero temperature coefficient resistor and a capacitance value of the first reference capacitor is outputted.

US Pat. No. 10,892,765

RELOCKING A PHASE LOCKED LOOP UPON CYCLE SLIPS BETWEEN INPUT AND FEEDBACK CLOCKS

Aura Semiconductor Pvt. L...

1. A phase locked loop (PLL) comprising:a phase detector coupled to receive an input clock and a feedback clock, said phase detector to generate an error signal representing a phase difference between said input clock and said feedback clock;
a first low-pass filter to generate a first filtered error signal by filtering said error signal, wherein said first low-pass filter has a first bandwidth (BW);
an oscillator coupled to receive said first filtered error signal as an input, said oscillator to generate an output clock, wherein a frequency of said output clock is determined by a magnitude of said first filtered error signal;
a feedback divider generating each of successive cycles of said feedback clock on counting of a pre-determined number of cycles of said output clock; and
a cycle slip detector operable to:
detect at a first time instance, a cycle slip between said input clock and said feedback clock; and
upon detecting of said cycle slip, increase a loop BW of said PLL,
wherein said cycle slip is the first cycle slip that occurs, wherein said cycle slip detector is operable to increase said loop BW at said first time instance, but not later,
wherein said cycle slip detector is operable to increase said loop BW of said PLL by causing said filtering of said error signal to be performed using a second bandwidth (BW) for said first low-pass filter, wherein said second BW is greater than said first BW.

US Pat. No. 10,892,764

DELAY LOCKED LOOP DEVICE AND UPDATE METHOD THEREOF

Winbond Electronics Corp....

1. A delay locked loop device adaptable for a memory device, comprising:a delay locked loop configured to receive an input clock after being enabled according to an enable signal and delay the input clock to provide a delayed clock; and
an update circuit, comprising:
a flag generating circuit configured to provide an update flag based on a default time interval; and
an enable circuit, coupled to the flag generating circuit and the delay locked loop, configured to trigger an enable signal to a first logic level according to the update flag and transition the enable signal from the first logic level to a second logic level before the end of the default time interval,
wherein the default time interval is shorter than a refresh cycle of the memory device.

US Pat. No. 10,892,763

SECOND-ORDER CLOCK RECOVERY USING THREE FEEDBACK PATHS

Credo Technology Group Li...

1. An integrated receiver circuit that comprises:a fractional-N phase lock loop that provides a clock signal;
a phase interpolator that applies a controllable phase shift to the clock signal to provide a sampling signal;
a sampling element that produces a digital receive signal by sampling an analog receive signal in accordance with the sampling signal;
a timing error estimator that produces a timing error signal indicating an estimated timing error of the sampling signal relative to the analog receive signal;
at least one feedback path coupling the timing error signal to the phase interpolator, the at least one feedback path using a phase error accumulator to minimize a phase component of the estimated timing error and using a frequency error accumulator to minimize a frequency offset component of the estimated timing error;
and
an additional feedback path coupling the timing error signal to the fractional-N phase lock loop to minimize the frequency offset component of the estimated timing error in parallel with said at least one feedback path.

US Pat. No. 10,892,762

PHASE-CONTINUOUS REFERENCE CLOCK FREQUENCY SHIFT FOR DIGITAL PHASE LOCKED LOOP

Intel Corporation, Santa...

1. A reference clock frequency shifting circuitry for a digital phase locked loop (DPLL) comprising a digitally controlled oscillator (DCO) and a feedback loop, wherein the DPLL generates a local oscillator signal based on an analog reference signal having a reference clock frequency fREF, the reference clock frequency shifting circuitry comprising:a multiplier circuitry comprising:
a multiplier configured to multiply an oscillator signal by N to generate a multiplied oscillator signal;
a multiplexor configured to output an analog reference signal selectively based on either the oscillator signal or the multiplied oscillator signal;
a digital clock circuitry comprising clock gating circuitry configured to receive a master clock signal and pass every xth pulse of the master clock signal to generate a digital reference clock signal;
a scaling circuitry comprising:
a divider configured to divide an input channel word by N to generate a scaled channel word;
a multiplexor configured to selectively output either the channel word or the scaled channel word to control the feedback loop to generate a feedback signal; and
control circuitry configured to identify a target reference clock frequency NfREF and receive a target time, and in response, control the multiplier circuitry, the digital clock circuitry, and the scaling circuitry to cause the DPLL to generate, at the target time, a subsequent analog reference signal having the frequency NfREF.

US Pat. No. 10,892,761

INVERTING WPL GATES WITH EDGE-TRIGGERED READOUT

NORTHROP GRUMMAN SYSTEMS ...

1. A reciprocal quantum logic (RQL) wave-pipeline logic (WPL) inverting gate comprising:a first stage comprising an XOR-enforcing Josephson junction, the first stage configured to receive at least two data input signals each as single flux quantum (SFQ) pulses and to process the data input signals with the XOR-enforcing Josephson junction to provide an intermediate signal;
a second stage comprising a comparator configured to receive the intermediate signal and a clocking input signal as SFQ pulses, the second stage being configured to propagate to an output of the RQL WPL inverting gate the intermediate signal at a time of an edge of the clocking input signal.

US Pat. No. 10,892,760

DYNAMIC TRANSISTOR GATE OVERDRIVE FOR INPUT/OUTPUT (I/O) DRIVERS AND LEVEL SHIFTERS

QUALCOMM Incorporated, S...

1. An apparatus for generating an output voltage signal based on an input voltage signal, comprising:a first field effect transistor (FET) including a first gate configured to receive a first gate voltage based on the input voltage signal;
a second FET including a second gate configured to receive a second gate voltage based on the input voltage signal, wherein the first and second FETs are coupled in series between a first voltage rail and a second voltage rail, and wherein the output voltage signal is produced at an output node between the first and second FETs;
a gate overdrive circuit configured to temporarily reduce the first gate voltage during a first portion of a transition of the output voltage signal from a logic low level to a logic high level; and
a third FET coupled between the output node and the first FET, wherein the third FET includes a third gate configured to receive a third gate voltage, and wherein the gate overdrive circuit is configured to temporarily reduce the third gate voltage substantially coincidental with the reduction of the first gate voltage of the first FET.

US Pat. No. 10,892,759

BUS DRIVER MODULE WITH CONTROLLED CIRCUIT AND TRANSITION CONTROLLED CIRCUIT THEREOF

Amazing Microelectronic C...

1. A bus driver module with controlled circuit, generating an output bus signal and electrically connected to a controller area network, comprising:a transition controlled circuit, electrically connected to an input terminal and comprising a first pathway controlled unit connected in parallel with a second pathway controlled unit for generating a side switching voltage, each of said first pathway controlled unit and said second pathway controlled unit comprising a plurality of switches, wherein said first pathway controlled unit is connected between said input terminal, said side switching voltage and a ground voltage, and said first pathway controlled unit comprises at least one first main switch and multiple first auxiliary switches connected in parallel;
at least one switch control circuit, being connected between said input terminal and said first pathway controlled unit for generating a plurality of first control signals, wherein each of said first control signals determines an on and off state of each of said first auxiliary switches, and wherein said switch control circuit comprises a pulse generator and a pulse sequential delay circuit in series connection with said pulse generator, said pulse generator receives said input signal and generates a pulse signal, said pulse sequential delay circuit receives said pulse signal and outputs the plurality of first control signals for controlling said plurality of first auxiliary switches accordingly, and wherein said pulse generator comprises:
an inverter, having a first end connected to said input terminal and a second end;
a capacitor, connected between said second end of said inverter and said ground voltage;
a comparator having two input ends respectively connected to said second end of said inverter and a reference voltage, and one output end; and
an AND gate having two input ends respectively connected to said input terminal and said output end of said comparator and generating said pulse signal; and
an output driver being connected in series with said transition controlled circuit and receiving said side switching voltage so as to accordingly generate said output bus signal,
wherein when an input signal is injected through said input terminal, either said first pathway controlled unit or said second pathway controlled unit is active, and the plurality of switches of either said first pathway controlled unit or said second pathway controlled unit are sequentially turned on and off such that said side switching voltage encounters a smooth phase transition.

US Pat. No. 10,892,758

TRACKING VOLTAGE REFERENCE FOR SINGLE ENDED RECEIVER

NXP B.V., Eindhoven (NL)...

1. A receiver, comprising:an input node coupled to receive an analog signal;
a first switch coupled between the input node and a first node;
a second switch coupled between the input node and a second node;
a first resistive element coupled between the first node and a reference node;
a second resistive element coupled between the second node and the reference node;
a first capacitive element coupled to the first node;
a second capacitive element coupled to the second node; and
a comparator having a first input coupled to the input node to receive the analog signal, a second input coupled to the reference node to receive a reference voltage, wherein an output of the comparator controls the first and second switches.

US Pat. No. 10,892,757

REVERSE BODY BIASING OF A TRANSISTOR USING A PHOTOVOLTAIC SOURCE

1. A circuit, comprising:a metal oxide semiconductor (MOS) transistor having a source terminal, a drain terminal, a gate terminal and a body terminal;
wherein the source terminal is connected to receive a supply voltage;
a photovoltaic circuit having a first terminal connected to the source terminal of the MOS transistor and a second terminal connected to the body terminal of the MOS transistor, wherein the photovoltaic circuit converts received photons to generate a reverse body bias voltage applied to the body terminal of the MOS transistor to increase a threshold voltage of the MOS transistor; and
an imaging circuit including an array of pixels, with first pixels of the array forming an array of photodetectors and with second pixels of the array forming the photovoltaic circuit.

US Pat. No. 10,892,756

REDUCING NOISE EFFECTS IN ELECTROSTATIC DISCHARGE CIRCUITS

Texas Instruments Incorpo...

1. A direct power injection (DPI) circuit for reducing noise effects in an electrostatic discharge (ESD) circuit coupled to a protected node, the DPI circuit comprising:an output node adapted to be coupled to a gate of a power transistor that is coupled between the protected node and a ground;
an input node adapted to be coupled to the protected node, the protected node receiving ESD events that turn on the power transistor and receiving smaller, cumulative, oscillating voltage noise effects that can cause the power transistor to turn on;
a first transistor having a drain coupled to the output node, a source coupled to the ground, and a gate;
a charge accumulation circuit connected between the input node and the gate of the first transistor, the charge accumulation circuit including:
a first capacitor having a first terminal connected to the input node and having a second terminal connected to an intermediate node;
a first diode having an anode connected to the intermediate node and having a cathode connected to the gate of the first transistor;
a second diode having a cathode connected to the intermediate node and having an anode connected to the ground; and
a second capacitor having a first terminal connected to the gate of the first transistor and having a second terminal connected to the ground; and
a first resistor having a first terminal coupled to the gate of the first transistor and a second terminal coupled to the ground;
the first capacitor, the second capacitor, and the resistor being tuned in response to the cumulative, oscillating voltage noise effects to build up charge on the gate of the first transistor to turn on the first transistor and turn off the power transistor.

US Pat. No. 10,892,755

DRIVER CIRCUITRY FOR FAST, EFFICIENT STATE TRANSITIONS

CogniPower, LLC, Malvern...

1. An article of manufacture comprising:driven circuitry configured to transition between first and second states; and
driver circuitry configured to generate drive signals to drive the driven circuitry to transition between the first and second states, the driver circuitry comprising:
a first-to-second driver circuit configured to generate a first drive signal to drive the driven circuitry to transition from the first state to the second state; and
a second-to-first driver circuit configured to generate a second drive signal to drive the driven circuitry to transition from the second state to the first state, wherein each driver circuit comprises:
an n-type transistor having a base, a collector, and an emitter and characterized by a turn-on threshold voltage;
a p-type transistor having a base, a collector, and an emitter and characterized by a turn-on threshold voltage, wherein the collector and emitter of the n-type transistor are connected in series with the collector and emitter of the p-type transistor such that, when the two transistors are turned on, current flows from the collector of the n-type transistor to the collector of the p-type transistor; and
a positive-feedback capacitor connected between the collector of a first of the two transistors and the base of a second of the two transistors, wherein:
the trigger circuit is configured such that (i) the two transistors turn on together when the voltage at the base of the n-type transistor exceeds the voltage at the base of the p-type transistor by at least the sum of the turn-on threshold voltages of the two transistors and (ii) the two transistors turn off together when the voltage at the base of the n-type transistor fails to exceed the voltage at the base of the p-type transistor by at least the sum of the turn-on threshold voltages of the two transistors; and
the positive-feedback capacitor ensures that the two transistors turn fully on and off together.

US Pat. No. 10,892,754

SEMICONDUCTOR APPARATUS INCLUDING POWER GATING CIRCUITS

SK hynix Inc., Icheon-si...

1. A semiconductor apparatus comprising:a first logic circuit;
a second logic circuit;
a first power gating circuit configured to supply a first power supply voltage to the first logic circuit through a first power supply node based on a first gating signal;
a second power gating circuit configured to supply the first power supply voltage to the second logic circuit through a second power supply node based on a second gating signal;
a first switching circuit configured to couple the first power supply node and the second power supply node based on a first switching control signal;
a characteristic monitoring circuit configured to monitor characteristics of the first logic circuit and the second logic circuit and generate a characteristic information; and
a power gating control circuit configured to generate the first switching control signal based on the characteristic information.

US Pat. No. 10,892,753

INPUT DEVICE WITH AN ARRAY OF FORCE SENSORS OF A LAMINATED CONSTRUCTION WITH BACKLIGHTING

PREH GMBH, Bad Neustadt ...

1. An input device comprising:a flat panel defining an array of control surfaces, and an array of capacitive sensors as well as a support, wherein:
the control surfaces are disposed on a surface of the panel facing towards an operator, and the support is disposed on a side of the panel facing away from the operator;
at least one of the capacitive sensors forms a measuring capacitance assigned to one of the control surfaces, and each of the capacitive sensors is formed by a translucent or transparent, substantially flat film layer structure;
the film layer structure, for each capacitive sensor, includes at least one first electrode associated with the panel for forming the measuring capacitance; and
on a side of the support, at least one lighting means is provided for each control surface for backlighting the associated control surface and transmitting light through the film layer structure, wherein the input device is further configured to reduce the passage of light from one capacitive sensor to an adjacent capacitive sensor;
the input device further includes a through-hole within the film layer structure;
the support has a web that reaches through the through-hole; and
the web formed by the support projects above the film layer in a direction towards the panel to reduce the passage of light.

US Pat. No. 10,892,752

SENSOR SYSTEM FOR PROTECTING MOVABLE OBJECTS AND METHOD FOR OPERATING A SENSOR SYSTEM

1. A sensor system for protecting movable objects comprising at least one capacitive sensor and at least one control unit, wherein the at least one control unit is designed to generate a transmission signal for the at least one capacitive sensor and to evaluate a first reception signal from the at least one capacitive sensor, further including at least one further electrode which is separate from the at least one capacitive sensor and that is connected to the at least one control unit, wherein the at least one capacitive sensor and the at least one further electrode are movable relative to one another, and further including means for generating a transmission signal for the at least one further electrode and/or means for evaluating a second reception signal from the at least one further electrode.

US Pat. No. 10,892,751

LOSSLESS SWITCH CONTROLLED BY THE PHASE OF A MICROWAVE DRIVE

INTERNATIONAL BUSINESS MA...

1. A lossless multiport device comprising:ports; and
a node connectable to the ports via switches, each of the switches comprising a first three wave mixer and a second three wave mixer, the first and second three wave mixers each comprising first resonators and second resonators, the second resonators of both the first and second three wave mixers being coupled together in one connection only such that the one connection makes a communication exclusive between the second resonators, wherein any two ports of the ports are operable to communicatively couple together according to a pump drive.

US Pat. No. 10,892,750

SEMICONDUCTOR APPARATUS

SK hynix Inc., Icheon-si...

1. A semiconductor apparatus comprising:a data input and output (input/output) circuit configured to operate by receiving a first voltage;
a core circuit configured to operate by receiving a second voltage; and
a control circuit configured to output a power control signal for activating the data input/output circuit when the first voltage is higher than a first set voltage and the second voltage is higher than a second set voltage,
wherein the control circuit is configured to lower the second voltage after outputting the power control signal.

US Pat. No. 10,892,749

ELECTRONIC CIRCUIT, METHOD, AND NON-TRANSITORY RECORDING MEDIUM

Kabushiki Kaisha Toshiba,...

1. An electronic circuit that switches a state of a semiconductor switching element between a driven state and a non-driven state, comprising:a current supply circuit including at least one first n-type transistor and at least one first p-type transistor and supply a current to a control terminal of the semiconductor switching element;
a detection circuit configured to acquire a value associated with a voltage at a first terminal different from the control terminal of the semiconductor switching element; and
a control circuit configured to perform at least one of (i) and (ii) based on the value associated with the voltage,
(i) causing the first n-type transistors to be in the non-driven state during a first period and causing at least one of the first p-type transistors to be in the driven state during a second period within the first period to switch the state of the semiconductor switching element from the driven state to the non-driven state, and
(ii) causing the first p-type transistors to be in the non-driven state during a third period and causing at least one of the first n-type transistors to be in the driven state during a fourth period within the third period to switch the state of the semiconductor switching element from the non-driven state to the driven state.

US Pat. No. 10,892,748

POWER MODULE

SHARP KABUSHIKI KAISHA, ...

1. A power module comprising:a power circuit which includes one or more power semiconductors; and
a control circuit which supplies a gate signal to each of the one or more power semiconductors, the control circuit including
one or more gate drivers which generate the gate signal in accordance with a control signal and in which a side to which the control signal is input and a side on which the gate signal is generated are insulated,
a control input circuit to which the control signal is input and which supplies the control signal to the one or more gate drivers, and
a control output circuit which supplies the gate signal to each of the power semiconductors,
wherein a ground of the power circuit and a ground of the control circuit are separated, and
at least a part of the control output circuit of the control circuit and the ground of the control circuit are arranged at respective positions to face each other in different layers with an insulating layer interposed therebetween.

US Pat. No. 10,892,747

CIRCUITS, METHODS AND SYSTEMS FOR SETTING A CURRENT LEVEL TO BE USED BY A CURRENT-MODE GATE DRIVER

Infineon Technologies Aus...

1. A current-mode gate driver circuit, comprising:an analog current-setting terminal configured to input an analog electrical signal from a source external to the current-mode gate driver circuit;
an adjustable current generator having an input coupled to the analog current-setting terminal and configured to generate a reference current level that follows a voltage or current level at the analog current-setting terminal;
an output terminal for coupling to a gate terminal of a power device;
an output stage configured to drive the output terminal with a current drive level that is based upon the reference current level, the output stage comprising:
a first current mirror configured to source current to the output terminal, based upon the reference current level; and/or
a second current mirror configured to sink current from the output terminal, based upon the reference current level; and
an input control terminal for switching the output stage.

US Pat. No. 10,892,746

SWITCH ON-TIME CONTROLLER WITH DELAY LINE MODULATOR

Texas Instruments Incorpo...

1. A system, comprising:a voltage supply input; and
a switching converter coupled to the voltage supply input and configured to provide an output voltage on a voltage output based on a switch on-time, the switching converter including a switch on-time controller, and the switch on-time controller includes:
an analog-to-digital converter (ADC);
a delay line coupled to the ADC; and
a delay line modulator coupled to the delay line and configured to determine an amount of times the delay line is used to determine the switch on-time.

US Pat. No. 10,892,745

SIGNAL DETECTOR FOR GPON OPTICAL LINE TERMINAL

Semtech Corporation, Cam...

6. A circuit for detecting a digital pattern of an optical signal from an optical receiving circuit, comprising:a first counter including an input coupled for receiving the digital pattern of the optical signal, and an output providing an output signal with a first logic state after detecting a first predetermined number of pulses of the digital pattern of the optical signal during a first time period and otherwise provides the output signal with a second logic state;
a second counter including an input coupled for receiving the digital pattern of the optical signal, and an output providing an output signal with a first logic state after detecting a second predetermined number of pulses of the digital pattern of the optical signal during a second time period and otherwise provides the output signal with a second logic state;
a logic gate comprising a first input coupled to the output of the first counter, and a second input coupled to the output of the second counter; and
a latch having an input coupled to an output of the logic gate for latching an output signal of the logic gate.

US Pat. No. 10,892,744

CORRECTING DUTY CYCLE AND COMPENSATING FOR ACTIVE CLOCK EDGE SHIFT

International Business Ma...

1. A system comprising:at least one control circuit logically configured to receive duty cycle correction control signals and logically configured to output at least one first adjustment signal, at least one second adjustment signal, at least one first correction signal, and at least one second correction signal, and wherein the at least one control circuit is configured to maintain a constant delay between at least one adjustment circuit and at least one correction circuit;
the at least one adjustment circuit logically coupled to the at least one control circuit and logically configured to change a duty cycle value of an input clock signal in response to receiving the at least one first adjustment signal on a first adjustment input of the at least one adjustment circuit and the at least one second adjustment signal on a second adjustment input of the at least one adjustment circuit, wherein changing a duty cycle value comprises introducing a first delay in the input clock signal, resulting in a second clock signal;
the at least one correction circuit logically coupled to the at least one control circuit, logically coupled to the at least one adjustment circuit, and logically configured to compensate for a shift of an active clock edge of the input clock signal in response to receiving the at least one first correction signal on a first correction input of the at least one correction circuit and the at least one second correction signal on a second correction input of the at least one correction circuit, wherein compensating for a shift of an active clock edge comprises introducing a second delay in the second clock signal, resulting in a corrected output clock signal;
wherein the value of the second delay is based on the constant delay, the first delay, and the shift;
wherein the difference between the input clock signal and the corrected output clock signal is the constant delay;
wherein one of the set of the at least one adjustment circuit and the at least one correction circuit is logically configured to transmit the corrected output clock signal, in response to the at least one adjustment circuit receiving the at least one first adjustment signal and the at least one second adjustment signal and in response to the at least one correction circuit receiving the at least one first correction signal and the at least one second correction signal.

US Pat. No. 10,892,743

FINE DELAY STRUCTURE WITH PROGRAMMABLE DELAY RANGES

INTERNATIONAL BUSINESS MA...

1. A method for controlling a fine delay circuit, the method comprising:controlling a state of a first switch connected to a first capacitive device connected in parallel with a first node and a second node;
controlling a state of a second switch connected to a second capacitive device connected in parallel with the first node and the second node, wherein the state of the first switch and the state of the second switch controls a total capacitance of the fine delay circuit;
controlling a variable resistive device arranged in parallel with the first capacitive device and the second capacitive device to control a delay of a signal input to the fine delay circuit, wherein the variable resistive device includes a field effect transistor (FET); and
controlling a switching device to implement the controlling the variable resistive device, wherein the switching device is coupled to the variable resistive device and the controlling the switching device includes controlling a supply voltage to the FET of the variable resistive device from the switching device.

US Pat. No. 10,892,742

DUTY-CYCLE CALIBRATION BASED ON DIFFERENTIAL CLOCK SENSING

TEXAS INSTRUMENTS INCORPO...

1. A system, comprising:a pseudo-differential clock path configured to convey a first clock signal and a second clock signal, wherein the second clock signal is inverted relative to the first clock signal;
a sensing circuit coupled to sensing nodes of the pseudo-differential clock path, wherein the sensing circuit is configured to provide a sense signal based on a comparison of the first clock signal and the second clock signal at the sensing nodes; and
a correction circuit coupled to the sensing circuit and to adjustment nodes of the pseudo-differential clock path, wherein the correction circuit is configured to adjust the first clock signal and the second clock signal using digital-to-analog converters (DACs) and the sense signal;
wherein the sensing circuit comprises:
a first low-pass filter configured to filter the first clock signal;
a second low-pass filter configured to filter the second clock signal; and
a comparator configured to compare an output of the first low-pass filter and an output of the second low-pass filter.

US Pat. No. 10,892,741

POWER DEVICE DRIVING APPARATUS

DENSO CORPORATION, Kariy...

1. A power device driving apparatus for driving a plurality of power devices that are connected in parallel to one another, the power device driving apparatus comprising:a plurality of drive circuits that are separately provided for at least a first power device and a second power device of the plurality of drive circuits, and that output drive signals to the respective power devices, one of the first power device and the second power device comprising an MOSFET, the other of the first power device and the second power device comprising an IGBT, and voltages for driving the plurality of power devices are different between the first power device and the second power device; and
an isolated power supply that supplies a supply voltage to enable the plurality of drive circuits to output the drive signals, the isolated power supply including
a first isolated power supply unit that supplies a first supply voltage, and
a second isolated power supply unit that supplies a second supply voltage which is different from the first supply voltage,
the plurality of drive circuits including
a first drive circuit that uses the first supply voltage supplied from the first isolated power supply unit to output the drive signal to the first power device, and
a second drive circuit that uses the second supply voltage supplied from the second isolated power supply unit to output the drive signal to the second power device.

US Pat. No. 10,892,740

DIGITAL FILTERING METHOD, CORRESPONDING CIRCUIT AND DEVICE

STMICROELECTRONICS S.R.L....

1. A method comprising:receiving an input digital signal comprising a sequence of samples; and
filtering the input digital signal by performing a set of multiplication operations by alternately using a first set of multiplication coefficients and a second set of multiplication coefficients different from the first set of multiplication coefficients, wherein each multiplication coefficient in the first set of multiplication coefficients and the second set of multiplication coefficients is a function of negative power-of-two values and the multiplication operations are performed by shifting, wherein the first and second sets of multiplication coefficients respectively comprise first and second sets of approximate multiplication coefficients that are selected to approximate a set of filter multiplication coefficients that, when applied to the input digital signal, will produce a filtered output digital signal with a corner frequency, and wherein the filtering produces a filtered output digital signal with an approximate corner frequency that approximates the corner frequency, wherein each of the approximate multiplication coefficients of the first and second sets are different from respective filter multiplication coefficients of the set of filter multiplication coefficients, and wherein the approximate corner frequency is different from the corner frequency.

US Pat. No. 10,892,739

ACOUSTIC WAVE FILTER DEVICE

MURATA MANUFACTURING CO.,...

1. An acoustic wave filter device comprising:a plurality of acoustic wave resonators; wherein
each of the plurality of acoustic wave resonators includes:
a piezoelectric substrate including a LiNbO3 layer,
an IDT electrode disposed on the LiNbO3 layer, and
a dielectric film disposed on the piezoelectric substrate and covering a top surface of the IDT electrode;
one or more of the plurality of acoustic wave resonators utilize a Rayleigh wave;
a main electrode layer of the IDT electrode of the one or more of the plurality of acoustic wave resonators is made of Pt, an alloy including Pt, W, or an alloy including W as a main ingredient, and a thickness of the main electrode layer is not smaller than about 0.061?; and
the piezoelectric substrate of the one or more of the plurality of acoustic wave resonators has Euler Angles (0°±within range of about 5°, ?, 0°±within range of about 10°), ? being in a range of not smaller than about 20° and not larger than about 50°.

US Pat. No. 10,892,738

ACOUSTIC WAVE FILTER DEVICE AND MULTIPLEXER

MURATA MANUFACTURING CO.,...

1. An acoustic wave filter device comprising:a parallel arm resonator connected between a ground and a transmission path of a high-frequency signal, which connects a first terminal and a second terminal to or from which the high-frequency signal is input or output;
a first longitudinally coupled resonance device including a plurality of first acoustic wave resonators disposed side by side in a propagation direction of acoustic waves and provided on the transmission path; and
a second longitudinally coupled resonance device including a plurality of second acoustic wave resonators disposed side by side in the propagation direction of the acoustic waves and cascade-connected to the first longitudinally coupled resonance device; wherein
each of the plurality of first acoustic wave resonators and each of the plurality of second acoustic wave resonators includes a first end connected to the ground;
the parallel arm resonator, the first longitudinally coupled resonance device, and the second longitudinally coupled resonance device are provided on one substrate having piezoelectricity; and
all of the grounds on the substrate, including the ground to which the parallel arm resonator is connected, the ground to which each of the plurality of first acoustic wave resonators is connected, and the ground to which each of the plurality of second acoustic wave resonators is connected, are commonly connected to one ground terminal on the substrate.

US Pat. No. 10,892,737

BULK-ACOUSTIC WAVE RESONATOR

Samsung Electro-Mechanics...

1. A bulk-acoustic wave resonator comprising:a substrate;
a membrane layer forming a cavity with the substrate;
a first electrode at least partially disposed on an upper portion of the cavity and comprising an end portion that is thicker than other portions of the first electrode;
an insertion layer comprising a first portion disposed adjacent to the end portion of the first electrode and a second portion disposed on an upper portion of the first electrode;
a piezoelectric layer disposed to cover the insertion layer; and
a second electrode disposed on an upper portion of the piezoelectric layer.

US Pat. No. 10,892,736

FINE DUST CONCENTRATION SENSOR

Samsung Electro-Mechanics...

1. A fine dust concentration sensor comprising:a bulk acoustic resonator; and
a cap comprising an upper portion with holes, a lateral portion connected to the upper portion, and an internal space formed by the upper portion and the lateral portion accommodating the bulk acoustic resonator,
wherein an upper surface of the upper portion of the cap comprises a hydrophobic material.

US Pat. No. 10,892,735

PASSIVE WIRELESS SENSOR INCLUDING PIEZOELECTRIC MEMS RESONATOR

University of Central Flo...

1. A passive wireless sensor, comprising;a substrate having a plurality of Microelectromechanical system (MEMS) piezoelectric resonators thereon, each of said plurality of MEMS piezoelectric resonators including:
a piezoelectric layer directly between a top metal layer (top electrode layer) and a bottom metal layer (bottom electrode layer), said bottom electrode layer being on said substrate,
wherein said top electrode layer is a patterned top electrode layer including at least a first electrode for sensing an electrical signal and a second electrode for providing a ground reference; and
an antenna connected to at least one of the first electrode and said second electrode for wirelessly transmitting said electrical signal and for receiving a wireless interrogation signal,
wherein each of said plurality of said MEMS piezoelectric resonators comprises a contour-mode piezoelectric resonator that varying planar dimensions of at least one of said substrate, said bottom electrode layer, said piezoelectric layer, and said top electrode layer to collectively provide two or more different resonant frequencies.

US Pat. No. 10,892,734

RESONATOR ELEMENT, RESONATOR, OSCILLATOR, ELECTRONIC DEVICE, AND VEHICLE

SEIKO EPSON CORPORATION, ...

1. A resonator element comprising:a substrate including main surfaces on front and rear sides of the substrate, respectively, each of the main surfaces having a resonance portion that excites thickness shear vibration as main resonance;
a first electrode that is installed on the resonance portion of one of the main surfaces; and
a second electrode that is installed on the resonance portion of the other of the main surfaces,
wherein an outer shape of the substrate in a plan view includes a first side surface and a second side surface that (i) extend in a first direction along a direction of the thickness shear vibration, (ii) are arranged in a second direction intersecting the first direction, and (iii) are respectively connected to the both of the main surfaces,
the first side surface and the second side surface each include an inclined surface inclined with respect to the main surfaces of the substrate,
a first lead electrode connected to the first electrode is installed on the inclined surface of the first side surface,
a second lead electrode connected to the second electrode is installed on the inclined surface of the second side surface,
an angle formed between each of the inclined surfaces and a said main surface is equal to or greater than 52° and equal to or less than 62°,
the length of the substrate is greatest along the first direction, and
the first lead electrode and the second lead electrode respectively extend from the first electrode and the second electrode in the second direction perpendicular to the first direction.

US Pat. No. 10,892,733

PIEZO-ACTUATED MEMS RESONATOR WITH SURFACE ELECTRODES

SITIME CORPORATION, Sant...

1. A microelectromechanical system (MEMS) resonator comprising:a degenerately-doped single-crystal silicon layer;
a piezoelectric material layer disposed on the degenerately-doped single-crystal silicon layer; and
an electrically-conductive material layer (i) disposed on the piezoelectric material layer opposite the degenerately-doped single-crystal silicon layer, and (ii) patterned to form first and second electrodes that are electrically isolated from one another;
wherein the conductive material layer comprises heavily doped polysilicon.

US Pat. No. 10,892,732

RESONATOR AND DEVICE INCLUDING THE SAME

Kabushiki Kaisha Toshiba,...

1. A resonator comprising:a substrate;
an anchor part provided on the substrate;
a spring part;
a vibrator disposed above the substrate and connected to the anchor part through the spring part; and
an attenuation mechanism configured to selectively attenuate vibration of a spurious mode that is mechanically coupled to a first mode when the vibrator vibrates in the first mode,
wherein:
the vibrator has an opening,
the anchor part is disposed in the opening when viewed from above the vibrator,
one end of the spring part is connected to an inner wall that defines the opening, another end of the spring part is connected to the anchor part, and
the attenuation mechanism comprises:
a first electrode provided on the substrate;
a second electrode provided on the substrate and disposed to face the first electrode through the anchor part; and
a controller configured to control a first capacitance between the vibrator and the first electrode and a second capacitance between the vibrator and the second electrode such that a difference between the first capacitance and the second capacitance falls in a certain range.

US Pat. No. 10,892,731

BULK ACOUSTIC WAVE FILTER DEVICE

Samsung Electro-Mechanics...

1. A bulk acoustic wave filter device comprising:a substrate comprising an insulating layer;
a resonance portion comprising a bottom electrode disposed on the substrate, a piezoelectric layer disposed above at least a portion of the bottom electrode, a top electrode disposed above at least a portion of the piezoelectric layer, and a cavity disposed below the bottom electrode;
a wiring portion connected to the resonance portion such that the top electrode or the bottom electrode extends into the wiring portion;
a connection electrode configured to connect the top electrode and the bottom electrode to an external device; and
a heat transfer member disposed spaced apart from the cavity and penetrating the substrate, and connecting a portion of at least one of the bottom electrode and the top electrode that is disposed in the wiring portion to the substrate.

US Pat. No. 10,892,730

ACOUSTIC FILTER WITH PACKAGING-DEFINED BOUNDARY CONDITIONS AND METHOD FOR PRODUCING THE SAME

VANGUARD INTERNATIONAL SE...

1. A device comprising:a first cavity in a dielectric layer;
a bulk acoustic wave (BAW) resonator over the first cavity and the dielectric layer, the BAW resonator comprising a first metal layer, a thin-film piezoelectric layer, and a second metal layer;
a second cavity over the first cavity on the second metal layer;
a pair of thin-film encapsulation (TFE) anchors on the second metal layer, each TFE anchor adjacent to and on an opposite side of the second cavity and extending beyond the first metal layer;
a TFE cap layer on the second metal layer and over the second cavity; and
a TFE seal layer over the TFE cap layer, wherein the pair of TFE anchors comprises the TFE cap layer on the second metal layer.

US Pat. No. 10,892,729

PASSIVE NON-FERROMAGNETIC CIRCULATOR

Mission Microwave Compone...

1. A non-magnetic, passive quadrupole circulator device, comprising:a first port, a second port, a third port, and a fourth port; and
a discrete arrangement of resistors, capacitors and inductors that form a fully connected S parameter matrix, wherein signals entering the first port only exit from the second port, signals entering the second port only exit from the third port, signals entering the third port only exit the fourth port, and signals entering the fourth port, only exit the first port.

US Pat. No. 10,892,728

VIRTUAL INDUCTORS USING FERROELECTRIC CAPACITANCE AND THE FABRICATION METHOD THEREOF

Mitsubishi Electric Resea...

13. A device, comprising:a circuit including a resistor, a normal capacitor and a ferroelectric capacitor are connected in series;
an input terminal to provide an input voltage across the circuit; and
an output terminal to deliver an output voltage taken across the normal capacitor, across the ferroelectric capacitor or across the normal capacitor and the ferroelectric capacitor, such that the circuit behaves as a resonant circuit, wherein the circuit is an integrated circuit formed on a substrate, the circuit comprises:
a ferroelectric layer sandwiched between a first buffer layer and a second buffer layer, wherein the first buffer layer contacts a portion of a surface of a first metal layer and the first metal layer extends beyond the first buffer layer; and
a dielectric layer sandwiched between a second metal layer and a third metal layer, such that the second metal layer extends beyond the dielectric layer and in contact with the second buffer layer, wherein the ferroelectric capacitor is formed by the first metal layer and the second metal layer, and a thickness of the ferroelectric layer is in a range of 5 nm to 30 nm, wherein the normal capacitor is formed by the dielectric layer and the third metal layer.

US Pat. No. 10,892,727

ADAPTIVE EQUALIZATION APPARATUS AND METHOD OF USING THE SAME

QUALITAS SEMICONDUCTOR CO...

1. An adaptive equalization apparatus comprising:a first equalizer filter compensating and outputting for components of a high frequency band of an input signal;
a second equalizer filter, installed in parallel with the first equalizer filter, monitoring the input signal;
a size comparison processor sampling the size of a monitoring signal from the second equalizer filter at each period of an asynchronous clock signal; and
a digital control processor collecting a comparison data in the size comparison processor as changing an equalizer monitoring code to be provided to the second equalizer filter and a reference signal of the size comparison processor, and finding and providing an optimal equalizer control code to the first equalizer filter based on the collected comparison data;
wherein the second equalizer filter compensates and outputs a signal according to an equalizer monitoring code of the digital control processor to find the optimal equalizer control code in the digital control processor.

US Pat. No. 10,892,726

PULSE BASED AUTOMATIC GAIN CONTROL FOR ANALOG AND PULSE DOMAIN REGULATION

University of Florida Res...

16. A method, comprising:determining time between constant amplitude pulses of an analog pulse train corresponding to an analog output signal from a variable gain amplifier (VGA), the pulse train generated from the analog output signal of the VGA using an integrate-and-fire (IF) sampler;
determining a reference time based upon time between pulses of another pulse train generated from a constant analog reference signal using another IF sampler or a defined relationship between a constant analog reference, an IF threshold and an IF leaky factor of the IF sampler, or based at least in part upon a constant analog reference, an IF threshold and an IF leaky factor of the IF sampler;
generating an amplification control signal based upon a comparison of the time between the pulses of the pulse train to the reference time; and
adjusting amplification of the VGA in response to the amplification control signal.

US Pat. No. 10,892,725

DOMAIN-DISTRIBUTED CRYOGENIC SIGNALING AMPLIFIER

Rambus Inc., San Jose, C...

1. A first integrated circuit die comprising:a bias voltage contact to receive a bias voltage from a second integrated circuit die;
a bias current contact to receive a bias current generated by the second integrated circuit die;
a first signal-transmit contact; and
a first transistor to output, via the first signal-transmit contact, an information-bearing signal according to a digital input, the first transistor having a source terminal coupled to the bias current input such that at least part of the bias current flows into or out of the first transistor via the source terminal, a drain terminal coupled to the first signal-transmit contact, and a gate terminal coupled to the bias voltage contact and to receive the digital input.

US Pat. No. 10,892,724

WIDEBAND DISTRIBUTED POWER AMPLIFIERS AND SYSTEMS AND METHODS THEREOF

Lockheed Martin Corporati...

1. A distributed power amplifier comprising:a radio frequency (RF) input terminal and an RF output terminal;
a first field effect transistor (FET) coupled at a first gate terminal thereof to the RF input terminal, and coupled at a first drain terminal thereof to the RF output terminal, the first FET having a first periphery and a first source terminal electrically connected to ground potential;
a second FET having a second gate terminal electrically coupled to the first gate terminal through a first inductor, a second drain terminal electrically coupled to the first drain terminal through a second inductor, and a second source terminal electrically connected to the ground potential, wherein:
the first FET and the second FET are in a non-uniform distributed topology with different peripheries, and
the second FET has a second periphery that is smaller than the first periphery of the first FET; and
a drain voltage terminal electrically coupled to a drain bias network through which a drain bias voltage is applied to the first drain terminal and the second drain terminal, the drain bias network excluding a resistive element.

US Pat. No. 10,892,723

INTEGRATION-BASED LOW NOISE AMPLIFIERS FOR SENSORS

Melexis Technologies SA, ...

1. A semiconductor amplifier circuit, comprising an input block adapted for receiving a voltage signal to be amplified;an integrator circuit arranged downstream of the input block and adapted for receiving the voltage signal or a processed version thereof, the integrator circuit comprising an integrating capacitor for storing an integrated signal and being adapted for providing a continuous-time signal representative for a combined integral of signals received by the integrator circuit wherein one of the signals is the voltage signal or a processed version thereof;
and a first feedback path comprising:a sample-and-hold block arranged downstream of the integrator circuit and adapted for receiving the continuous-time signal and for sampling said signal using a sampling signal thereby providing a sampled signal, and for providing a zero-order-hold voltage signal proportional to said sampled signal;a first feedback block arranged downstream of the sample-and-hold block, the first feedback path being adapted for providing a first feedback signal proportional to the zero-order-hold signal, the first feedback signal being provided to the integrator circuit or upstream of the integrator circuit;wherein the semiconductor amplifier circuit is configured such that an amplitude ratio of the continuous-time signal and the voltage signal to be amplified is larger than 1 for a predefined frequency range;
and wherein the first feedback block is adapted for providing the feedback signal such that, when the voltage signal to be amplified is equal to zero, a charge stored on the integrating capacitor at the beginning of a sample period is linearly removed during the sampling period of the sampling signal, in such a way that the absolute value of the charge is smaller at the end of the sampling period than at the beginning of the sample period.

US Pat. No. 10,892,722

METHOD OF AND APPARATUS FOR REDUCING THE INFLUENCE OF A COMMON MODE SIGNAL ON A DIFFERENTIAL SIGNAL AND TO SYSTEMS INCLUDING SUCH AN APPARATUS

Analog Devices Internatio...

1. An apparatus comprising:an active circuit that is configured to:
determine an adjustment to a control voltage of a differential signal processing circuit by using an indication of a time varying perturbation of a common mode voltage of a differential pair of signals determined by a first circuit and, processed by the differential signal processing circuit to estimate the common mode voltage generated using the differential pair of signals; and
adjust the control voltage of the differential signal processing circuit based on a stimulation signal being applied to the first circuit.

US Pat. No. 10,892,720

CONTROL CIRCUIT FOR POWER AMPLIFIER

MURATA MANUFACTURING CO.,...

1. A control circuit that controls a power amplifier including one stage or multiple stages of power amplifier circuits and one or multiple bias circuits configured to set electrical bias states of the one stage or the multiple stages of the power amplifier circuits, the control circuit comprising:a first output unit configured to output a constant bias current to the one or multiple bias circuits for setting electrical bias states of the one or multiple bias circuits;
a second output unit configured to output a bias control current or a constant voltage to the one or multiple bias circuits for controlling the electrical bias states of the one or multiple bias circuits;
a resistor having one end connected to a reference potential; and
a switch connected between another end of the resistor and an output terminal of the second output unit.

US Pat. No. 10,892,719

MULTISTAGE POWER AMPLIFIER WITH LINEARITY COMPENSATING FUNCTION

Samsung Electro-Mechanics...

1. A multistage power amplifier comprising:a first amplification circuit configured to receive a first bias current;
a second amplification circuit configured to receive a second bias current;
an envelope detection circuit configured to output a direct current (DC) detection voltage based on an envelope of an input radio frequency (RF) signal; and
a bias compensation circuit configured to compensate for the first bias current based on the second bias current in a high-power driving region in response to the DC detection voltage.

US Pat. No. 10,892,717

HIGHLY LINEAR TRANSCONDUCTANCE AMPLIFIER AND METHOD THEREOF

REALTEK SEMICONDUCTOR COR...

1. A circuit comprising:a first common-source amplifier configured to receive a first voltage at a first gate node and receive a first current to a first drain node in accordance with a first source voltage at a first source node;
a second common-source amplifier configured to receive a second voltage at a second gate node and receive a second current to a second drain node in accordance with a second source voltage at a second source node;
a first diode-connected device having a third source node connected to the first source node, and a third drain node and a third gate node both connected to ground;
a second diode-connected device having a fourth source node connected to the second source node, and a fourth drain node and a fourth gate node both connected to ground; and
a source-degenerating resistor inserted between the third source node and the fourth source node.

US Pat. No. 10,892,716

AMPLIFIER

NIPPON TELEGRAPH AND TELE...

1. An amplifier constituting a transimpedance amplifier, comprising:an amplification stage connected to an input terminal;
a current source connected between the input terminal and a power source voltage line, the current source including a first transistor in which a base terminal is connected to a current control bias and a collector terminal is connected to the input terminal;
an inductor element inserted between an emitter terminal of the first transistor and the power source voltage line.

US Pat. No. 10,892,714

POWER AMPLIFIER CIRCUIT

MURATA MANUFACTURING CO.,...

1. A power amplifier circuit comprising:a first transistor including a first terminal to which a voltage corresponding to a variable power-supply voltage greater than or equal to a first voltage and lower than or equal to a second voltage is supplied from a power-supply terminal and a second terminal to which an RF signal is supplied, the first transistor being configured to amplify the RF signal;
a bias current source configured to supply a bias current to the second terminal of the first transistor through a first current path; and
an adjustment circuit configured to adjust the bias current in accordance with the variable power-supply voltage,
wherein the adjustment circuit includes
a first resistor, a second resistor, and a third resistor, wherein at least one of the first resistor, the second resistor, or the third resistor is a variable resistor, and
an adjustment transistor including a first terminal connected to the power-supply terminal through the first resistor, a second terminal connected to the bias current source through the second resistor, and a third terminal connected to the first current path through the third resistor, and
wherein, when the variable power-supply voltage is greater than or equal to the first voltage and lower than or equal to a third voltage higher than the first voltage and lower than the second voltage, the adjustment circuit increases a current that flows to the power-supply terminal through a second current path extending from the bias current source, through the second resistor, the adjustment transistor, and the first resistor, to the power-supply terminal, as the variable power-supply voltage decreases.

US Pat. No. 10,892,713

RF POWER AMPLIFIER

Robert Bosch GmbH, Stutt...

1. A circuit comprising:a splitter having a first output port with a first inverting output and a first non-inverting output, and a second output with a second inverting output and a second non-inverting output;
a combiner having a first input port with a first inverting input and a first non-inverting input, and a second input port with a second inverting input and a second non-inverting input;
a first pair of transistors each of which having a first input terminal coupled with ground, a first output terminal coupled with the first input port of the combiner, and a first control terminal driven by the first output port of the splitter;
a second pair of transistors each of which having a second input terminal coupled with ground, a second output terminal coupled with the second input port of the combiner, and a second control terminal driven by the second output of the splitter;
a first stabilization line coupled between the first non-inverting input and second non-inverting input of the combiner; and
a second stabilization line coupled between the first inverting input and the second inverting input of the combiner.

US Pat. No. 10,892,712

STACKED-DIE BULK ACOUSTIC WAVE OSCILLATOR PACKAGE

TEXAS INSTRUMENTS INCORPO...

1. A stacked-die oscillator package, comprising:an oscillator circuit die having a first and a second bond pad;
a bulk acoustic wave (BAW) resonator die comprising a first BAW bond pad and a second BAW bond pad, a first metal bump on the first BAW bond pad and a second metal bump on the second BAW bond pad flip chip bonded to the first and second bond pads of the oscillator circuit die; and
a polymer material positioned in a portion of a gap between the BAW resonator die and the oscillator circuit die.

US Pat. No. 10,892,711

OSCILLATOR, ELECTRONIC APPARATUS, AND VEHICLE

SEIKO EPSON CORPORATION, ...

1. An oscillator comprising:a first resonator element;
a first circuit element configured to oscillate the first resonator element to generate a first oscillation signal;
a first package that houses the first resonator element and the first circuit element, and has a mounting surface and a mounting terminal disposed on the mounting surface;
a second resonator element an oscillation frequency of which is controlled based on the first oscillation signal;
a second package that houses the second resonator element and is provided with the second package mounted on the mounting surface of the first package; and
a temperature control element housed in the first package, wherein
the first package has a first ground pattern electrically coupled to the first circuit element, a second ground pattern electrically coupled to the temperature control element, and a first via interconnection configured to electrically couple the first ground pattern and the second ground pattern to each other, and
the first package further has a third ground pattern which overlaps the first ground pattern and the second ground pattern in a plan view, and is electrically coupled to the first ground pattern and the second ground pattern.

US Pat. No. 10,892,710

LC OSCILLATOR POWERING ARRANGEMENT AND METHOD OF POWERING AN LC OSCILLATOR

STICHTING IMEC NEDERLAND,...

1. An LC oscillator powering arrangement, comprising:an LC oscillator comprising a resonant tank, wherein the LC oscillator is configured to provide an oscillating signal output;
a current source configured to supply the LC oscillator with a supply current that flows entirely into the resonant tank, wherein, the current source is controllable via a control voltage and supplied with a supply voltage subject to a supply voltage ripple; and
a replication block configured to generate a replica of the supply voltage ripple directly from the supply voltage and to overlay the replica on the control voltage.

US Pat. No. 10,892,709

ELECTRONIC PRECISION TIMING DEVICE

BAE Systems Information a...

1. An integrated circuit synthetic oscillator comprising:an electrical circuit comprising a current source defining a current controlled nonlinear circuit;
wherein a plurality of stable oscillations are generated by the current controlled nonlinear circuit,
wherein the stable oscillations have a nonlinear feedback,
wherein the stable oscillations comprise a stable inner oscillation, a stable middle oscillation, and a stable outer oscillation, and
wherein at least one of the stable oscillations is employed in a timing circuit for precision measurement in a digital device without a crystalline structure coupled to the electrical circuit.

US Pat. No. 10,892,708

REMOTE ARRAY MAPPING

SunPower Corporation, Sa...

1. A system for mapping an array of electrical components comprising:a plurality of electrical components, each of the electrical components in the plurality distinct from each other, each of the electrical components spaced apart from each other, the electrical components arranged in at least one array and connected to at least one other electrical component;
a frequency generator, the frequency generator configured to generate a frequency signal different from a base operating frequency, the frequency generator configured to send the signal to each of the electrical components in the plurality;
a plurality of sensors, each of the plurality of sensors configured to measure, at the same time, a voltage or current at each of the plurality of electrical components, the voltage or current reflecting the amplitude of the cycling frequency signal sent by the frequency generator and received at the electrical component being measured by the sensor; and
a system analyzer configured to consider a plurality of the voltages or currents measured by the plurality of sensors and attributable to different electrical components in the plurality of electrical components and determine a relative position of electrical components with respect to other electrical components,
wherein during a mapping cycle, the frequency generator generates frequency signals transmitted over the system in an ascending frequency order and a descending frequency order,
wherein the system analyzer considers responses to the frequency signals from each of the plurality of electrical components, groups the electrical components according to shared trajectories of their responses, and assigns each of the plurality of electrical components to a branch circuit based upon the groups.

US Pat. No. 10,892,707

PHOTOVOLTAIC MODULE MONITORING APPARATUS AND POWER SYSTEM

Huawei Technologies Co., ...

1. A photovoltaic module monitoring apparatus, applied to a power system, wherein the photovoltaic module monitoring apparatus comprises:a driver module, configured to:
receive a status request differential signal sent by an inverter of the power system;
obtain, according to the status request differential signal, status information of a photovoltaic PV module corresponding to the photovoltaic module monitoring apparatus;
modulate the status information of the photovoltaic PV module to generate a status response differential signal; and
send the status response differential signal to the inverter; and
a bypass module parallelly connected to the driver module, configured to transmit the status request differential signal and the status response differential signal, wherein
an impedance of the bypass module is less than an impedance of the photovoltaic PV module.

US Pat. No. 10,892,706

MAINTAINING A SOLAR POWER MODULE

Saudi Arabian Oil Company...

1. A method for cooling a solar power system, comprising:operating a solar power system that comprises a plurality of solar power cells mounted on a spherical frame that comprises an inner surface that defines an interior volume;
generating a magnetic field within the interior volume of the spherical frame with at least one permanent magnet;
transferring heat from an outer surface of the spherical frame to a magnetized fluid within the interior volume, the magnetized fluid comprising a ferrofluid that includes a plurality of magnetized particles; and
circulating, with a magneto-caloric pump, the magnetized fluid within a plurality of flowpaths defined by a plurality of baffles coupled to the inner surface of the spherical frame within the interior volume and oriented around the inner surface of the spherical frame along a circumference of a cross-section of the spherical frame, wherein the circulating of the magnetized fluid is based, at least in part, on (i) the generated magnetic field caused by the at least one permanent magnet, and (ii) an amount of heat transferred from a heat source that comprises the plurality of solar power cells mounted on the outer surface of the spherical frame into the magnetized fluid.

US Pat. No. 10,892,705

SWEEPING DEVICE FOR THE PHOTOVOLTAIC PANEL

1. A sweeping device for a photovoltaic panel applied to a photovoltaic unit composed by N photovoltaic panel arrays arranged in sequence, N being a natural number, wherein the sweeping device comprises: a guide rail mechanism composed by an upper rail and a lower rail respectively disposed on an upper side and a lower side of a respective photovoltaic panel array, and a scraper mechanism respectively disposed on a respective guide rail mechanism;the sweeping device further comprises a pull rope mechanism for pulling a respective scraper mechanism to move in a longitudinal direction of the guide rail mechanism; wherein the pull rope mechanism comprises a pull-up rope connected to the top of a respective scraper mechanism and a pull-down rope connected to a tail of a respective scraper mechanism, the pull-up rope partially penetrates through the upper rail of a respective guide rail mechanism, and the pull-down rope partially penetrates through the lower rail of a respective guide rail mechanism;
wherein at least a portion of the upper rail is a first detachable section for disconnecting the upper rail, and at least a portion of the lower rail is a second detachable section for disconnecting the lower rail;
wherein lengths of the first detachable section and the second detachable section are the same and are greater than a width of the scraper mechanism, and positions of the first detachable section and the second detachable section correspond to each other.

US Pat. No. 10,892,704

SOLAR ARRAY WITH REFERENCE SOLAR POWER PLANT FOR IMPROVED MANAGEMENT

NEXTRACKER INC., Fremont...

1. A solar array comprising:solar modules distributed in parallel rows, each solar module comprising at least one solar collector carried by a single-axis solar tracker, wherein each single-axis solar tracker is piloted in rotation about a main axis by an actuator for a rotation of the solar module allowing tracking the Sun during its rise and set from east to west;
a reference solar power plant comprising at least two reference solar modules, including a central reference solar module and at least one secondary reference solar module; and
a piloting unit of angular orientation of the solar modules, the piloting unit being linked to the actuators to servo-control the angular orientation of the solar modules by applying a common orientation setpoint to the solar modules, wherein the piloting unit is configured to:
pilot the angular orientation of the central reference solar module according to a central reference orientation setpoint corresponding to an initial orientation setpoint,
pilot the orientation of the at least one secondary reference solar module according to a secondary reference orientation setpoint, the secondary reference orientation setpoint corresponding to the initial orientation setpoint shifted by a non-zero offset angle associated with the at least one secondary reference solar module, the central reference solar module being associated with a zero offset angle;
receive a solar energy production value from each of the at least two reference solar modules; and
pilot the angular orientation of the solar modules, except for the at least two reference solar modules, by applying as a common orientation setpoint the reference orientation setpoint associated with a reference solar module of the at least two reference solar modules having the highest solar energy production value.

US Pat. No. 10,892,703

METHODS AND SYSTEMS FOR DETECTING SHADING FOR SOLAR TRACKERS

NEXTRACKER INC., Fremont...

1. A solar tracker system comprising:a tracker apparatus including a plurality of solar modules, each of the solar modules being spatially configured to face in a normal manner in an on sun position in an incident direction of electromagnetic radiation derived from the sun; wherein the solar modules include a plurality of PV strings; and
a tracker controller including:
a processor;
a memory with instructions stored thereon and storing at least one of: a time of year, a geography, and a plurality of sun positions;
a power supply configured to provide power to the tracker controller;
a plurality of power inputs configured to receive a plurality of currents from the plurality of PV strings;
a current sensing unit configured to individually monitor the plurality of currents;
a DC-DC power converter configured to receive the plurality of power inputs powered from the plurality of PV strings to supply power to the power supply; and
a motor controller;
wherein the tracker controller is configured to track the sun position based on a prediction by a learning algorithm and by reading the plurality of currents from the plurality of PV strings and by determining, based on the plurality of currents from each PV string, if any portion of the plurality of solar modules are shaded.

US Pat. No. 10,892,702

FUNCTIONALIZED INFRASTRUCTURE AND METHOD FOR INSTALLING SUCH A FUNCTIONALIZED INFRASTRUCTURE

COLAS, Paris (FR)

1. A functionalized infrastructure comprising a bottom layer comprising a zone to be covered, said infrastructure further comprising:n covering slabs, n being greater than or equal to 2, the n slabs each comprising a coverage surface for covering a part of said zone, the n slabs being arranged juxtaposed in order to pave said zone to be covered, each covering slab comprising at least one electrical functionalization assembly, and wherein:
the n covering slabs comprise at least one covering slab of a first type having a coverage surface of a first form and a covering slab of a second type having a coverage surface of a second form, distinct from the first form, and wherein,
each covering slab comprises an electrical connection block,
the electrical connection block of each slab is arranged on the slab so as to be separated from the electrical connection block of the adjacent slab by a pitch that is constant, whatever the form of each of their slabs.

US Pat. No. 10,892,701

METHOD FOR OPERATING A DRIVE SYSTEM, AND DRIVE SYSTEM

Lenze Drives GmbH, Exter...

1. A method for operating a drive system, wherein the drive system has:a three-phase motor, having:
a shaft,
a first three-phase stator winding which is to be connected to a three-phase AC voltage grid,
a second three-phase stator winding which is to be connected to the three-phase AC voltage grid in such a way that a second stator rotating field rotating in opposition results with respect to a first stator rotating field which is generated by the first stator winding, and
a rotor winding system which is mechanically coupled in a rotationally fixed manner to the shaft, and
at least one inverter which is mechanically coupled in a rotationally fixed manner to the shaft and which is electrically coupled to the rotor winding system, wherein the at least one inverter is configured to generate actuation signals for the rotor winding system, the method comprising the steps of:
generating the actuating signals such that a first rotor rotating field and a second rotor rotating field rotating in opposition to the first rotor rotating field are generated, wherein
the generating of the actuation signals for the rotor winding system solely depend on signals detected on the rotor side, wherein
the signals detected on the rotor side comprise phase current signals of the rotor winding system,
the phase current signals detected on the rotor side are divided by calculation into first components, which belong to the first rotor rotating field, and into second components, which belong to the second rotor rotating field, and
the phase current signals which are associated with the first rotor rotating field and with the second rotor rotating field by means of the division by calculation are divided by calculation into symmetrical components with co-rotating and counter-rotating components given an asymmetrical time profile of the three-phase AC voltage grid.

US Pat. No. 10,892,700

VARIABLE TORQUE MOTOR/GENERATOR/TRANSMISSION

Falcon Power, LLC, Titus...

1. A propulsion system comprising:a propulsion device;
an engine to selectively power the propulsion device;
a variable torque motor/generator/transmission to selectively power the propulsion device, the variable torque motor/generator/transmission comprising:
a stator support extending longitudinally in a first direction, the stator support having a first stator and a second stator spaced apart from the first stator in the first direction;
a rotor rotatably coupled with the stator support, the rotor having an axis of rotation and a longitudinal support structure extending in the first direction; and
an interactive field element slidably coupled with the longitudinal support structure to translate along the longitudinal support structure parallel to its axis of rotation between a first orientation where the first stator is engaged with the interactive field element, a second orientation where the second stator is engaged with the interactive field element, and a third orientation where neither the first stator nor the second stator is engaged with the interactive field element;
an energy storage device to store energy for powering the variable torque motor/generator/transmission; and
a controller to selectively operate the propulsion system in a first mode where the variable torque motor/generator/transmission supplies power to the propulsion device, and a second mode where the engine supplies power to both the propulsion device and the variable torque motor/generator/transmission, wherein the variable torque motor/generator/transmission supplies energy for storage in the energy storage device when the propulsion system is operated in the second mode,
wherein the variable torque motor/generator/transmission solely supplies power to the propulsion device in the first mode.

US Pat. No. 10,892,699

INVERSE-MOVEMENT-TYPE VOICE COIL ACTUATING APPARATUS

VIEWPOINT ELECTRONICS CO....

1. An inverse-movement-type voice coil actuating apparatus, comprising:a case assembly having a support structure;
an immovable lens module which is stationary and assembled in the support structure to define an optical axis; and
an image sensing and focusing assembly which is movable and received in the support structure, wherein the image sensing and focusing assembly moves back and forth along the optical axis with respect to the lens module to focus,
wherein the inverse-movement-type voice coil actuating apparatus does not have movable lens.

US Pat. No. 10,892,698

CURRENT DETECTION APPARATUS AND CONTROL APPARATUS OF ROTARY ELECTRIC MACHINE

DENSO CORPORATION, Kariy...

1. A current detection apparatus for application to a system including a direct-current power supply, an inverter including plural pairs of series-connected upper-arm switches and lower-arm switches, and a three-phase rotary electric machine connected to the inverter, the upper- and lower-arm switches of each pair being connected to a corresponding one phase of the three-phase rotary electric machine, an upper set of the upper-arm switches being connected to the direct-current power supply via a first bus, a lower set of the lower-arm switches being connected to the direct-current power supply via a second bus, first to third phase switches selected in one of the upper set of the upper-arm switches and the lower set of the lower-arm switches being respectively defined as first to third detection switches, the first to third phase switches corresponding to respective first to third phases of the three-phase rotary electric machine, the current detection apparatus comprising:an arm current detection unit configured to detect each of first to third phase currents having respective amplitudes and flowing in the three-phase rotary electric machine based on a potential difference between input and output terminals of the corresponding one of the first to third detection switches while the corresponding one of the first to third detection switches is on, the first to third detection switches being lower-arm switches in the lower set of the lower-arm switches, the first to third detection switches being commonly connected to a common signal ground of the current detection apparatus;
a bus current detection unit configured to detect each of at least bus-based first to third phase currents corresponding to the first to third phases of the three-phase rotary electric machine based on a current flowing through one of the first and second buses; and
an amplitude correction unit configured to correct all of the first to third phase currents detected by the arm current detection unit based on the bus-based first to third phase currents detected by the bus current detection unit such that the amplitudes of all of the respective first to third phase currents detected by the arm current detection unit match with each other,
wherein the amplitude correction unit is configured to multiply all of the first to third phase currents detected by the arm current detection unit by a correction gain for all corresponding first to third phase currents, thus correcting all the first to third phase currents detected by the arm current detection unit, to reduce variations between the amplitudes.

US Pat. No. 10,892,697

MOTOR CONTROL APPARATUS AND METHOD OF CONTROLLING THE SAME

CANON KABUSHIKI KAISHA, ...

1. A motor control apparatus operable to control a motor, the apparatus comprising:one or more memories connected to one or more processors configured to function as:
a transition unit configured to transit control between first drive control for driving the motor by forces commutation control and second drive control for driving the motor by vector control; and
a control unit configured to control to drive the motor by one of the first drive control and the second drive control,
wherein
a first sampling period of the first drive control is shorter than a second sampling period of the second drive control.

US Pat. No. 10,892,696

PHASE ANGLE ESTIMATION APPARATUS

DENSO CORPORATION, Kariy...

1. A phase angle estimation apparatus which estimates a phase angle of a rotor for a motor including the rotor as a field, and N (N is an integer of 2 or greater) sets of coils each having respective drive systems, the phase angle estimation apparatus comprising:an applying unit configured to apply first pulse voltages, apply second pulse voltages at a timing different from a timing at which the first pulse voltages are applied, and apply third pulse voltages at a timing different from the timings at which the first and the second pulse voltages are applied, to the respective N sets of coils;
an acquiring unit configured to acquire a first current vector which is a vector of a current flowing through at least one set of coils among the N sets of coils by application of the first pulse voltages, a second current vector which is a vector of a current flowing through the at least one set of coils by application of the second pulse voltages, and a third current vector which is a vector of a current flowing through the at least one set of coils by application of the third pulse voltages; and
an estimating unit configured to estimate the phase angle on a basis of the first, the second and the third current vectors, wherein
at least one of conditions are satisfied, the conditions are a condition that directions of vectors of the N sets of the first pulse voltages are different from each other, a condition that directions of vectors of the N sets of the second pulse voltages are different from each other, and a condition that directions of vectors of the N sets of the third pulse voltages are different from each other, and
periods in which voltages having different directions of the vectors among the N sets of the first, the second and the third pulse voltages are applied at least partially overlap with each other.

US Pat. No. 10,892,695

MOTOR DRIVE SYSTEM

Meidensha Corporation, T...

1. A motor drive system comprising:a low-frequency torque controller having PID control for outputting a low-frequency torque controller output based on a torque command value and a torque detection value;
a vibrational torque controller for outputting a vibrational torque command value based on the torque command value, the torque detection value and a rotational phase detection value; and
a high-frequency resonance suppression controller for outputting an inverter torque command value based on the torque detection value and a corrected torque command value obtained by adding the low-frequency torque controller output to the vibrational torque command value.

US Pat. No. 10,892,694

CONTROL SYSTEM CONNECTED TO AN ARRESTING GEAR SYSTEM HAVING AN OUTER CONTROL LOOP AND A PLURALITY OF INNER CURRENT CONTROL LOOPS

Electro Standards Laborat...

14. A method as implemented in a control system connected to an advanced arresting gear system, the method comprising:(a) receiving in an outer control loop: (i) a port side shaft position, ?p, and (ii) a starboard side shaft position ?s;
(b) generating a first torque control command ?mp and a second torque control command ?ms based on received position information;
(c) receiving, in a first inner control loop associated with a port-side motor current controller, a first pair of dq-axis current commands iqp* and idp, the first pair of dq-axis current commands computed based on the first torque control command ?mp, the first inner control loop outputting a first voltage command vabcp for controlling a port side motor that controls a port side of an arrestment cable;
(d) receiving, in a second inner control loop associated with a starboard-side motor current controller, a second pair of dq-axis current commands iqs* and ids*, the second pair of dq-axis current commands computed based on the second torque control command ?ms, the second inner control loop outputting a second voltage command vabcs for controlling a starboard side motor that controls the starboard side of the arrestment cable, and
wherein each of the port-side motor current controller and the starboard-side motor controller comprises: a positive sequence controller, the positive sequence controller comprising a PI filter with a dq input and a summer connected to an output of the PI filter; at least one negative sequence controller, the negative sequence controller connected to the dq input and the summer comprising a rotation transformer connected to an integrator block in series with an inverse rotational transformation block, one or more delay state feedback to counter control loop delays, said delay state feedback providing high bandwidth, low current overshoot, small current rise time and good current stability margins.

US Pat. No. 10,892,693

METHOD FOR CONTROLLING AN ELECTRIC MOTOR INCLUDING AN IDENTIFICATION SEQUENCE OF A TRANSFORMER

Schneider Toshiba Inverte...

1. A method for controlling an electric motor, implemented in a variable speed drive, said variable speed drive being connected to the electric motor through a transformer, which comprises a primary and a secondary, said primary of the transformer being connected to output phases of the variable speed drive and said secondary of the transformer being connected to said electric motor, comprising:executing an identification sequence of the transformer, during a first power on procedure outside of normal operation, to determine at least gain data representing a transfer performed by the transformer;
generating a transfer module based on said determined gain data; and
determining a start-up sequence of the electric motor to be implemented by the variable speed drive by executing said transfer module on a reference current path.

US Pat. No. 10,892,692

BACK ELECTROMOTIVE FORCE CONTROLLERS

Hewlett-Packard Developme...

1. A back electromotive force controller for influencing movement of a carriage of a device in an unpowered state; the carriage being moveable by a motor responsive to a motor driver; the controller comprising: braking circuitry to couple power associated with a back electromotive force generated by manual displacement of the motor, due to carriage movement, to power the motor driver to urge the motor in a contrary direction to the displacement.

US Pat. No. 10,892,691

CONTROL CIRCUIT AND POWER TOOL

Nanjing Chervon Industry ...

1. A control circuit for a motor including a stator winding and a rotor, the control circuit having a driving state and a braking state and comprising:a main control switch, wherein the control circuit enters the driving state in response to the main control switch being closed and enters the braking state in response to the main control switch being opened;
a driving branch, comprising a first branch formed by the stator winding, a driving switch, and the rotor, wherein the driving branch is configured to control a connection between the stator winding and the rotor to be turned on or off;
a braking branch, comprising a second branch formed by the stator winding, a braking switch, and an electrical energy storage component, wherein the electrical energy storage component is configured to provide an electrical energy to the braking branch and is arranged between two terminals of the rotor; and
a control unit, electrically connected to the main control switch, to the driving switch, and to the braking switch, separately, configured to control the main control switch, the driving switch, and the braking switch to be closed or opened,
wherein the connection between the stator winding and the rotor of the driving branch is turned on in response to detecting that, in the braking state, a braking parameter of the braking branch exceeds a predetermined value, and
wherein the braking branch is further provided with a current detecting unit configured to detect, under the braking state, whether a braking current in the braking branch exceeds a preset threshold and the control circuit is configured to control the braking switch to stay in an open state in response to the current detecting unit detecting that the braking current in the braking branch exceeds the preset threshold to cut off a connection between the electrical energy storage component and the stator winding.

US Pat. No. 10,892,690

ACTUATOR DEVICE AND ARRAY OF THE SAME

KONINKLIJKE PHILIPS N.V.,...

1. A system comprising a plurality of devices, each of the plurality of devices comprising:an actuation arrangement arranged to provide a mechanical actuation, the actuation arrangement comprising an active material that can deform upon applying a drive signal to the actuation arrangement, wherein an actuation output is dependent on the mechanical actuation; and
a delay arrangement, wherein the delay arrangement has a delay interaction with the actuation arrangement such that the delay arrangement:
prevents the actuation output for a first drive signal, wherein the first drive signal is chosen from a first range or a first type of drive signals; and
allows the actuation output for a second drive signal, wherein the second drive signal is chosen from a second range or a second type of drive signals different from the first range or the first type of drive signals.

US Pat. No. 10,892,689

SWITCHING POWER SUPPLY DEVICE

PANASONIC INTELLECTUAL PR...

1. A switched-mode power supply device provided with a plurality of power supply circuits that correspond to phases of a polyphase alternator, the switched-mode power supply device comprising:a switching circuit that allows switching of a phase connected to one of the plurality of power supply circuits not corresponding to a certain phase of the polyphase alternator, the switching being done between the certain phase and a phase to which the power supply circuit corresponds;
an inrush current prevention circuit that is disposed on a power supply line on a negative electrode side of the polyphase alternator and is disposed at a position closer to the polyphase alternator than a connection point at which the plurality of power supply circuits are connected to the polyphase alternator, the inrush current prevention circuit configured to prevent an inrush current;
a filter circuit disposed at a position closer to the polyphase alternator than the switching circuit and the inrush current prevention circuit are positioned relative to the polyphase alternator, the filter circuit being a circuit in which all lines for the phases are magnetically coupled to one another; and
a control circuit that controls the switching circuit and the inrush current prevention circuit, wherein
the control circuit allows initial charging of capacitors to be carried out while controlling the switching circuit such that the phase connected to the power supply circuit not corresponding to the certain phase is switched to the certain phase, and while causing the inrush current prevention circuit to function, the capacitors being capacitors that the plurality of power supply circuits respectively include, and
when the initial charging is completed, controls the switching circuit such that the phase connected to the power supply circuit not corresponding to the certain phase is switched to the phase to which the power supply circuit corresponds, and stops the inrush current prevention circuit from functioning.

US Pat. No. 10,892,688

SWITCHING POWER SUPPLY APPARATUS CONTROL METHOD AND CONTROL CIRCUIT OF SWITCHING POWER SUPPLY APPARATUS

FUJI ELECTRIC CO., LTD., ...

1. A method for controlling a switching power supply apparatus which includes a half-bridge circuit having a first high-side switching element and a second low-side switching element connected in series and a resonance circuit having a resonance inductor and a resonance capacitor, the method comprising:detecting a resonance current of the resonance circuit;
acquiring a feedback signal indicative of an error between an output voltage and a target voltage from an output circuit which outputs a direct-current voltage;
calculating a resonance current after-inversion time, during a half cycle that extends from a time when one of the first high-side switching element or the second low-side switching element is turned off to a time when another of the first switching high-side element or the second low-side switching element is turned off, the calculating of the resonance current after-inversion time extending from a time when a polarity of the resonance current is inverted to a time when the half cycle ends, the calculating being based on a multiplication of time information obtained by performing counting from a time when the half cycle begins and a value of the feedback signal acquired at the time when the half cycle begins, and
turning off said other of the first high-side switching element or the second low-side switching element after the calculated resonance current after-inversion time has elapsed after the polarity of the resonance current is inverted.

US Pat. No. 10,892,687

ASYMMETRIC POWER CONVERTER, POWER CONVERTERS, AND OPERATING POWER CONVERTERS

Infineon Technologies Aus...

1. A power converter controller for an asymmetric pulse width modulation half bridge flyback converter, the power converter controller comprising:a first switch driver operative to drive a first primary side switch of the asymmetric pulse width modulation half bridge flyback converter;
a second switch driver operative to control a second primary side switch of the asymmetric pulse width modulation half bridge flyback converter; and
control logic operative to, in a first switching cycle of multiple switching cycles:
control the first switch driver to close the first primary side switch for a first time duration,
after the first time duration, control both the first switch driver and the second switch driver to open both the first primary side switch and the second primary side switch to be open for a first pause duration,
after the first pause duration, control the second switch driver to close the second primary side switch for a second time duration,
after the second time duration, control both the first switch driver and the second switch driver to open both the first primary side switch and the second primary side switch for a second pause duration,
after the second pause duration, control the first switch driver to close the first primary side switch for a third time duration; and
after the third time duration, control both the first switch driver and the second switch driver to open both the first primary side switch and the second primary side switch for a third pause duration.

US Pat. No. 10,892,686

HYSTERETIC CONTROL FOR TRANSFORMER BASED POWER CONVERTERS

TEXAS INSTRUMENTS INCORPO...

1. A hysteretic controller coupled to a first inductor and a second inductor, the first inductor is coupled to a secondary side of a transformer included in a power converter, the second inductor is coupled to the secondary side of the transformer and the hysteretic controller includes:a hysteretic comparator including a first input, a second input, and an output, the first input configured to receive a sensed current from the first inductor and the second inductor, the second input configured to receive a differential voltage representing a potential difference between an output voltage of the power converter and a reference voltage;
a pulse sequencer coupled to the output of the hysteretic comparator; and
a dead-time generation circuit configured to provide a first on-time signal to a first switch coupled to a primary side of the transformer and a second on-time signal to a second switch coupled to the secondary side of the transformer, the first and second on-time signals based on a pulse signal received from the pulse sequencer.

US Pat. No. 10,892,685

POWER SUPPLY DEVICE AND IMAGE FORMING APPARATUS HAVING THE SAME

HEWLETT-PACKARD DEVELOPME...

1. A power supply device, comprising:an AC/DC converter to convert an input AC power into a first DC power having a predetermined size, and to output the first DC power;
a DC/DC converter to convert the first DC power into a second DC power; and
a switch including a soft switch and a resistor part, the soft switch connected to the first DC power at a first end of the soft switch and to the resistor part at a second end of the soft switch, and the resistor part, in response to the soft switch being turned on, to voltage-distribute the first DC power to provide the voltage-distributed first DC power to the DC/DC converter as an enable signal in a standby state of an apparatus to cause the DC/DC converter to convert the first DC power into the second DC power.

US Pat. No. 10,892,684

CIRCUIT FOR A SWITCHING POWER SUPPLY

Rohm Co., Ltd., Kyoto (J...

1. A circuit for a switching power supply, the circuit generating an output voltage from an input voltage through switching operation by an output transistor, the circuit comprising:a controller including
an error amplifier configured to generate an error voltage commensurate with a difference between a feedback voltage commensurate with the output voltage and a reference voltage and
a slope voltage generator configured to generate a slope voltage commensurate with a current passing in the output transistor,
the controller being configured to control the output transistor based on the error voltage and the slope voltage,
wherein
the controller further includes a skip comparator configured to generate a skip signal based on a result of comparison between the error voltage and a predetermined skip threshold voltage, and
the controller is configured
when the skip signal is at a first level, to perform basic switching control in which the controller performs the switching operation synchronous with a clock signal,
when the skip signal turns from the first level to a second level different from the first level during the basic switching control, to perform skip control in which the controller stops the switching operation synchronous with the clock signal, and
thereafter when the skip signal turns from the second level to the first level, to turn on the output transistor asynchronously with the clock signal in the basic switching control.

US Pat. No. 10,892,683

ELECTRONIC CIRCUIT FOR ESTIMATING INTENSITY OF LOAD CURRENT BASED ON INTERNAL CONDITION OF BOOST CONVERTER

Samsung Electronics Co., ...

1. An electronic circuit comprising:an inductive element having a first end and a second end, the first end connected to an input terminal receiving an input current, the inductive element outputting an inductor current at the second end based on the input current;
a first transistor connected to the second end of the inductive element and a reference terminal at which a reference voltage is applied;
a second transistor having first and second ends, the first end of the second transistor connected to the second end of the inductive element and the second end of the second transistor connected to an output terminal of the electronic circuit, the second transistor configured to output a load current to the output terminal responsive to the inductor current; and
a load current estimator circuit configured to
receive a first voltage sensed between the first and second ends of the second transistor in response to the inductor current when the first transistor is turned off and the second transistor is turned on, and
output a second voltage based on a level of the first voltage at a reference time point within a first time interval when the second transistor is turned on,
wherein the second voltage is associated with an intensity of the load current,
wherein the electronic circuit further comprising a controller configured to generate a control signal for controlling turn-on and turn-off of the first transistor and the second transistor,
wherein the load current estimator circuit comprises
a first operational amplifier configured to buffer a third voltage to provide a fourth voltage having a level corresponding to a sampled level,
inverters configured to generate and output an intermediate signal having a pulse width corresponding to a pulse width of the control signal, and a pulse magnitude corresponding to the level of the fourth voltage, and
an RC filter configured to output a fifth voltage having a level corresponding to an average level of the intermediate signal,
wherein the third voltage is a sampled level of the first voltage.

US Pat. No. 10,892,682

POWER CONVERTER WITH CONTROLLABLE DC OFFSET

EPC Power Corporation, P...

6. An electrical power conversion system, comprising:a DC-to-DC power converter configured to receive a DC input power and provide a DC output power, the DC-to-DC power converter including:
a positive input terminal;
a negative input terminal, the positive input terminal and the negative input terminal configured to interface with a power source;
an input switch bank including a first switching leg and a second switching leg, wherein each of the first switching leg and the second switching leg is electrically connected directly across the positive input terminal and the negative input terminal without any intervening switching legs positioned between (i) the first switching leg and the second switching leg and (ii) the power source;
an output switch bank including a third switching leg and a fourth switching leg, wherein each of the first switching leg, the second switching leg, the third switching leg, and the fourth switching legs includes a switch;
a positive secondary DC bus terminal extending between the input switch bank and the output switch bank;
a negative secondary DC bus terminal extending between the input switch bank and the output switch bank;
a positive output terminal extending from the output switch bank; and
a negative output terminal extending from the output switch bank, the positive output terminal and the negative output terminal configured to interface with a load;
wherein each of the third switching leg and the fourth switching leg is electrically connected across the positive output terminal and the negative output terminal without any intervening switching legs positioned between (i) the third switching leg and the fourth switching leg and (ii) the load;
wherein the first switching leg is electrically connected to the fourth switching leg via the positive secondary DC bus terminal; and
wherein the second switching leg is electrically connected to the third switching leg via the negative secondary DC bus terminal.

US Pat. No. 10,892,681

DC-DC CONVERTER OPERABLE TO PERFORM CURRENT-MODE CONTROL OUTPUT FEEDBACK CONTROL

Rohm Co., Ltd., Kyoto (J...

1. A DC-DC converter arranged to generate an output voltage from an input voltage,wherein the DC-DC converter is operable to sample coil current of a switching output stage at the midpoint of an ON period or an OFF period of the switching output stage, and is operable to perform current-mode control output feedback control using a current sense signal commensurate with a value of the sampled coil current, and
wherein the DC-DC converter comprises:
an error amplifier arranged to generate an error signal corresponding to a difference between the output voltage or a feedback voltage corresponding to the output voltage and a predetermined reference voltage;
an oscillator arranged to generate a ramp signal at a predetermined switching period;
a differential amplifier arranged to generate an analog signal corresponding to a difference between the error signal and the current sense signal;
a comparator arranged to compare the analog signal with the ramp signal so as to generate a comparison signal; and
a driver arranged to generate a drive signal for the switching output stage according to the comparison signal.

US Pat. No. 10,892,680

ELECTRONIC DEVICE WITH A RECONFIGURABLE CHARGING MECHANISM

Micron Technology, Inc., ...

1. An electronic device, comprising:a reconfigurable charge pump including pump units configured to generate three or more levels for an output voltage;
a pump regulator coupled to the reconfigurable charge pump, the pump regulator configured to monitor the output voltage and at least turn the reconfigurable charge pump on or off based on the output voltage; and
an arrangement control mechanism coupled to the pump regulator, the arrangement control mechanism configured to:
based on the output voltage, control electrical connections between the pump units using the pump regulator, and
generate a mode output based on the output voltage or a derivation thereof, wherein the mode output controls the pump regulator.

US Pat. No. 10,892,679

INTRODUCING JITTER TO A SWITCHING FREQUENCY BY WAY OF MODULATING CURRENT LIMIT

Power Integrations, Inc.,...

1. A controller to control switching of a power switch of a power converter, comprising:a current limit generator configured to generate a current limit threshold;
a switch controller configured to receive the current limit threshold, an enable signal and a current sense signal representative of a current through the power switch, the switch controller further configured to generate a drive signal to control switching of the power switch to control the transfer of energy from an input of the power converter to an output of the power converter in response to the enable signal and the current sense signal, the switch controller further configured to output the drive signal to turn on the power switch in response to the enable signal and to turn off the power switch when the current sense signal reaches the current limit threshold, wherein the switch controller is configured to receive the enable signal from an enable circuit, the enable circuit configured to receive a feedback signal representative of an output of the power converter and to output the enable signal to turn on the power switch in response to the feedback signal; and
a jitter generator configured to generate a jitter signal for jittering a switching period of the drive signal, wherein the current limit threshold is modulated by the jitter signal.

US Pat. No. 10,892,678

METHOD AND APPARATUS FOR BIDIRECTIONAL OPERATION OF PHASE-SHIFT FULL BRIDGE CONVERTER USING INDUCTOR PRE-CHARGING

Infineon Technologies Aus...

1. A bidirectional phase-shift full bridge converter, comprising:a primary side comprising switch devices that form a full-bridge power stage, and a first inductor connected to the primary-side full-bridge power stage;
a secondary side comprising switch devices that form a power stage, and a second inductor connected to the secondary-side power stage;
a transformer coupling the primary side and the secondary side; and
a controller operable to control switching of the switch devices to transfer energy from the primary side to the secondary side in a first mode, and to transfer energy from the secondary side to the primary side in a second mode,
wherein in the second mode, the controller is operable to switch the switch devices on the primary side and on the secondary side in a defined sequence so as to pre-charge the first inductor and to energize the second inductor prior to an energy transfer from the secondary side to the primary side.

US Pat. No. 10,892,677

POWER SUPPLY CIRCUIT AND AUDIO SYSTEM

YAMAHA CORPORATION, Hama...

1. A power supply circuit for generating a direct current (DC) voltage from an alternating current (AC) voltage, the power supply circuit comprising:a rectifying circuit configured to rectify the AC voltage;
a capacitor including a first electrode and a second electrode, and configured to smooth the rectified voltage;
a first switching element disposed on a path for charging the capacitor;
a comparison circuit configured to compare an index voltage that depends on the smoothed rectified voltage with a reference voltage;
a driving circuit configured to set the first switching element to:
an ON state, in a state where the index voltage is lower than the reference voltage; and
an OFF state, in a state where the index voltage exceeds the reference voltage;
a transformer including a primary coil and a secondary coil, wherein the primary coil includes:
a first terminal connected to the first electrode; and
a second terminal;
a voltage generation circuit configured to generate the DC voltage from a voltage of the secondary coil;
a second switching element disposed in a path between the second electrode and the second terminal, and configured to be switched to:
an ON state, in a state where the smoothed rectified voltage is applied to the primary coil; or
an OFF state, in a state where the smoothed rectified voltage is not applied to the primary coil; and
a switching control circuit configured to:
control switching of the second switching element with a duty ratio that depends on the DC voltage, in a state where the index voltage is lower than the reference voltage; and
maintain the second switching element in the OFF state, in a state where the index voltage exceeds the reference voltage.

US Pat. No. 10,892,676

POWER SUPPLY CIRCUIT FOR GENERATING A PREDETERMINED VOLTAGE AND A PREDETERMINED CURRENT

Panasonic Intellectual Pr...

1. A power supply circuit comprising:a first input terminal which is connected to an AC power supply via a rectifying section, the first input terminal directly connected to the rectifying section;
a second input terminal which is connected to the AC power supply via the rectifying section, the second input terminal directly connected to the rectifying section;
a first reactor;
a second reactor;
a first switching element;
a second switching element;
a third switching element;
a fourth switching element;
a first capacitor;
a first output terminal;
a second output terminal;
a control circuit;
a first inductor;
a second inductor; and
a bypass capacitor,
wherein the first input terminal is connected to a first end of the first reactor, a second end of the first reactor is connected to a first end of the third switching element, and a second end of the third switching element is connected to the first output terminal,
the first input terminal is connected to a first end of the second reactor, a second end of the second reactor is connected to a first end of the fourth switching element, and a second end of the fourth switching element is connected to the first output terminal,
the second input terminal is connected to the second output terminal,
a first end of the first switching element is connected to the second end of the first reactor, and a second end of the first switching element is connected to the second output terminal,
a first end of the second switching element is connected to the second end of the second reactor, and a second end of the second switching element is connected to the second output terminal,
a first end of the first capacitor is connected to the first output terminal, and a second end of the first capacitor is connected to the second output terminal,
a first end of the first inductor is connected to the first input terminal, a second end of the first inductor is connected to a first end of the second inductor, a second end of the second inductor is connected to a first end of the bypass capacitor, and a second end of the bypass capacitor is connected to the second output terminal,
the first reactor and the first inductor are magnetically coupled to each other, and the second reactor and the second inductor are magnetically coupled to each other, and
the control circuit performs switching control over the first switching element and the second switching element, using an interleaving method.

US Pat. No. 10,892,675

VOLTAGE CONVERTING CIRCUIT AND CONTROL CIRCUIT THEREOF

Excelliance MOS Corporati...

1. A control circuit for controlling a driving switch which has two terminals respectively receiving an input voltage and an output voltage, the control circuit comprising:a comparator, receiving the input voltage and the output voltage and comparing a voltage level of the input voltage with a voltage level of the output voltage to generate a comparison signal;
a clock generator, coupled to the comparator to receive the comparison signal and generating a clock signal according to the comparison signal, so as to enable the clock signal to have a first frequency in a first time interval and to have a second frequency in a second time interval, wherein the first frequency is higher than the second frequency, and the first time interval occurs before the second time interval; and
a boost circuit, coupled to the clock generator and a control terminal of the driving switch to receive the clock signal, pulling up a voltage level of a control signal of the driving switch according to a first driving capability in the first time interval and generating the control signal according to a second driving capability in the second time interval, wherein the first driving capability is greater than the second driving capability,
wherein the clock generator comprises:
a mode signal generator, coupled to the comparator, receiving the comparison signal and performing a timing operation according to the comparison signal, so as to generate a mode signal; and
an oscillator, coupled to the mode signal generator, receiving the mode signal and adjusting a frequency of the clock signal according to the mode signal,
wherein the mode signal generator comprises:
a timer, performing the timing operation based on the comparison signal to generate a timing result; and
a logic operator, coupled to the timer and executing a logic operation according to the comparison signal and the timing result to generate the mode signal.

US Pat. No. 10,892,674

LINEAR VIBRATION GENERATOR INCLUDING PLATE TYPE SPRING HAVING BENT PORTION

MPLUS CO., LTD., Suwon-s...

1. A linear vibration generator comprising:a case (100) for covering top and side portions thereof;
a bracket (200) coupled to the underside of the case (100);
a coil (400) fixed to one side of a top surface of the bracket (200) and receiving external power from an FPCB (300);
a plate type spring (500) having bent portions (510) and a support cup (520) and configured to allow one end thereof to be fixed to a vibrator (800); and
the vibrator (800) having a weight (600) fixed to one end of the plate type spring (500) and a magnet (700) insertedly fixed to a hollow portion (610) of the weight (600).

US Pat. No. 10,892,673

THRUST PRODUCING SPLIT FLYWHEEL GYROSCOPE METHOD AND APPARATUS

Airborne Motor Works Inc....

1. A flywheel gyroscope assembly, comprising:a perimeter section having an inside face and an outside face, comprising:
a plurality of perimeter spokes extending from the outside face shaped to provide directed thrust when rotated; and
a plurality of magnets positioned along the inside face;
a hub section having an inside face and an outside face, comprising:
a plurality of magnets positioned along the outside face of the hub section; and
a plurality of hub spokes extending inward from the inside face of the hub section and configured to produce thrust when rotated; and
a stator having a plurality of exterior field coils along its outside diameter and plurality of interior field coils along its inside diameter, wherein the plurality of exterior field coils are positioned to act upon the magnets of the perimeter section and the plurality of interior field coils are positioned to act upon the magnets of the hub section to create counter rotation of the plurality of perimeter spokes and the plurality of hub spokes.

US Pat. No. 10,892,672

DUAL-ROTOR SYNCHRONOUS ELECTRICAL MACHINES

Advanced Magnet Lab, Inc....

1. A dual-rotor machine, comprising:A frame;
A cylindrically shaped inner rotor having an outside diameter and a longitudinal axis, said inner rotor comprising a Halbach permanent magnet array;
A cylindrically shaped outer rotor having an inside diameter and a longitudinal axis, said outer rotor comprising a Halbach permanent magnet array;
And a cylindrically shaped stator having an inside diameter, an outside diameter, and a longitudinal axis, said stator comprising a magnetic coil;
Wherein said stator is affixed to said frame; and
Wherein said inner rotor, said outer rotor, and said stator are coaxially disposed forming a common axis for all of them, said inner rotor and said outer rotor being attached to one another, or attached to a common structure, and are rotably attached to said frame either directly or through a structure;
Wherein said inner rotor outer diameter is less than said stator inside diameter, forming an air gap between them, and said outer rotor inside diameter is greater than said stator outside diameter, forming an air gap between them;
Wherein said inner rotor and said outer rotor are able to rotate around said stator, about said common axis;
Wherein the Halbach arrays comprising the rotors are further defined as comprising a monolithic permanent magnet of continuously varying field direction.

US Pat. No. 10,892,671

ELECTRICALLY CONDUCTIVE COPPER COMPONENTS AND JOINING PROCESSES THEREFOR

GM Global Technology Oper...

1. A method of manufacturing electrically conductive copper components for an electric device, the method comprising:providing an electrically conductive copper substrate having a first surface and an opposite second surface;
performing a surface treatment process on the first surface of the substrate such that the first surface includes a plurality of peaks and valleys and exhibits a surface roughness (Rz) in the range of 10-100 ?m;
depositing a first continuous coating of an electrically conductive joining material on the first surface of the substrate; and
forming the substrate into a plurality of electrically conductive copper components exhibiting a certain desired geometry,
wherein each of the plurality of electrically conductive copper components includes a joining surface for establishing an electrical and mechanical connection with at least one other electrically conductive copper component,
wherein a first preexisting coating of joining material is located on or adjacent to the joining surface of each of the plurality of electrically conductive copper components,
wherein the electrically conductive copper substrate comprises a sheet of copper or a copper-based alloy, and the plurality of electrically conductive copper components are formed by cutting the substrate into a plurality of discrete pieces after the first continuous coating of the electrically conductive joining material is deposited on the first surface of the substrate,
wherein cutting the substrate into a plurality of discrete pieces comprises stamping, blanking, die cutting, punching, laser cutting, or perforating the substrate into multiple pieces; and
wherein the plurality of electrically conductive copper components comprise a plurality of electrically conductive copper tabs that each include a first surface, an opposite second surface, and an inner joining surface that at least partially defines a through-hole extending from the first surface to the second surface thereof, wherein the first preexisting coating of joining material is located on the first surface of each of the plurality of electrically conductive copper tabs, and wherein the through-hole is sized for receiving a terminal end of a copper wire.

US Pat. No. 10,892,670

METHOD FOR BONDING ELECTRICAL CONDUCTORS

HONDA MOTOR CO., LTD., T...

1. A method for bonding electrical conductors that bonds conductor members and connection conductor members in a stator where a plurality of slots are formed in an annular stator iron core along a circumferential direction thereof, linear conductor members are inserted into the slots respectively such that bonding portions of each of the conductor members on both sides in an axial direction thereof protrude from the slot, and the conductor members inserted in different slots of the plurality of slots are sequentially bonded with the connection conductor members so that the conductor members and the connection conductor members are electrically connected to each other to form a coil, the method comprising:an arrangement process of arranging the connection conductor members in contact with the bonding portions of the conductor members via a metal paste; and
a current application process of applying an electrical current in the axial direction of the conductor members with use of a pair of electrodes while pressing contact portions between the conductor members and the connection conductor members in the axial direction of the conductor members,
wherein, in the arrangement process, the connection conductor members are placed in contact with the bonding portions on both sides in the axial direction of the conductor members via the metal paste, respectively, and
wherein, in the current application process, the electrical current is applied between the pair of electrodes in the axial direction of the conductor members while the contact portions between the conductor members and the connection conductor members are pressed by the electrodes in the axial direction of the conductor members.

US Pat. No. 10,892,669

ROTOR CORE AND MANUFACTURING METHOD FOR ROTOR CORE

TOYOTA JIDOSHA KABUSHIKI ...

1. A rotor core comprising:a laminated iron core in which electrical steel sheets are laminated, the laminated iron core providing a magnet slot that extends in a lamination direction of the laminated iron core; and
a magnet that is fixed to an inside of a magnet slot through resin,
the resin including a filler, and the filler having a length in a longitudinal direction larger than a length in a width direction, the filler being oriented such that the longitudinal direction is directed towards a surface of the magnet.

US Pat. No. 10,892,668

COOLING SYSTEMS FOR COOLING ELECTRIC MACHINES WITHIN ELECTRIFIED VEHICLES

FORD GLOBAL TECHNOLOGIES,...

1. A transmission system, comprising:an electric machine including a rotor and a stator;
a spray bar positioned adjacent to a face of the stator; and
a first nozzle of the spray bar configured to direct a coolant between adjacent back irons of the stator.

US Pat. No. 10,892,667

MOTOR

NIDEC TOSOK CORPORATION, ...

1. A motor comprising:a rotor that has a motor shaft disposed along a central axis extending in an axial direction;
a stator that faces the rotor with a gap interposed therebetween in a radial direction;
a motor driving inverter unit that supplies electric power from a battery to the stator;
a charger that has a charger inverter unit for charging the battery; and
a housing that accommodates the stator, the motor driving inverter unit, and the charger,
wherein the housing comprises:
a cooling flow path through which a coolant flows,
a stator accommodation unit that accommodates the stator,
an inverter accommodation unit that is positioned outside the stator accommodation unit in the radial direction and accommodates the motor driving inverter unit,
a charger accommodation unit that is positioned outside the stator accommodation unit in the radial direction and accommodates the charger, and
an intermediate partitioning wall that partitions the inverter accommodation unit and the charger accommodation unit, and
the cooling flow path is disposed in the intermediate partitioning wall.

US Pat. No. 10,892,666

DOUBLE-CASING FRAME OF AN ELECTRIC MACHINE

MOTEURS LEROY-SOMER, Ang...

1. A double-casing frame of an electric machine which is cooled by a fluid circulating inside the double casing, comprising:an inner casing;
an end flange mounted on the inner casing at a rear; and
an outer casing which fits over a front of the inner casing and is separable from the inner casing without removing the end flange by sliding the outer casing to the rear along the inner casing, the outer casing and the inner casing defining between them a fluid circulation space, the outer casing having a rear end wall oriented perpendicularly to an axis of rotation of the electric machine and at least partially covering the inner casing, the outer casing forming with the end flange a radial clearance e.

US Pat. No. 10,892,665

VARIABLE SPEED CONSTANT FREQUENCY (VSCF) GENERATOR SYSTEM

HAMILTON SUNSTRAND CORPOR...

1. A variable speed constant frequency (VSCF) generator system, comprising:a generator portion comprising a generator, electronics configured to control operations of the generator and a housing to house the generator and the electronics;
a first cooling circuit by which first fluid exiting the generator passes through a first cooling element prior to returning to the generator; and
a second cooling circuit by which second fluid exiting the electronics passes through a second cooling element prior to being pumped back toward the electronics, wherein the electronics comprises:
first and second cold plates which are receptive of the second fluid in parallel;
VSCF main electronic components operably disposed on the first cold plate; and
VSCF converter regulator electronic components operably disposed on the second cold plate.

US Pat. No. 10,892,664

SEGMENTED ELECTRICAL MACHINE

ROLLS-ROYCE plc, London ...

1. An electrical machine having:a variable reluctance rotor, and
a stator formed as an annular array of stator segments, wherein reluctance of the rotor-to-stator magnetic flux path varies with rotor position, and wherein the stator segments are magnetically energizable to rotate the rotor;
wherein:
the stator segments are non-axisymmetrically distributed in the array such that, when energized to rotate the rotor, the stator segments produce an unbalanced force on the rotor; and
the electrical machine further has a compensator including one or more balancing segments, each balancing segment comprising a core structure and a conductor winding mounted to the core structure, the winding being configured to be magnetically energizable by electrical excitation by a control system to produce a balancing force on the rotor, wherein the balancing force balances the unbalanced force, wherein reluctance of a rotor-to-compensator magnetic flux path is substantially invariant with rotor position.

US Pat. No. 10,892,663

BUSBAR, MOTOR, AND POWER TRANSMISSION SYSTEM USING SAME

LG INNOTEK CO., LTD., Se...

1. A motor comprising:a housing;
a stator disposed in the housing;
a rotor disposed in the stator;
a shaft disposed in the rotor; and
a busbar disposed on the stator,
wherein the busbar includes an insulating body, a plurality of neutral terminals disposed in the insulating body, and a plurality of driving terminals disposed in the insulating body,
wherein the plurality of driving terminals includes a first terminal set and a second terminal set electrically disconnected from the first terminal set,
wherein the first terminal set includes a first U-phase terminal, a first V-phase terminal, and a first W-phase terminal,
wherein the second terminal set includes a second U-phase terminal, a second V-phase terminal, and a second W-phase terminal,
wherein a diameter of a first virtual circle connected to a first end of each of the first U-phase terminal, the first V-phase terminal, and the first W-phase terminal is smaller than a diameter of a second virtual circle connected to a second end of each of the first U-phase terminal, the first V-phase terminal, and the first W-phase terminal, and
wherein centers of the first virtual circle and the second virtual circle are identical.

US Pat. No. 10,892,662

ROTARY ELECTRIC MACHINE HAVING AN END COIL COVER MEMBER USED FOR IMPROVEMENT IN COOLING EFFICIENCY

HONDA MOTOR CO., LTD., T...

1. A rotary electric machine comprising:a stator including an annular stator core and a winding mounted on the stator core and configured to have a coil end protruding in an axial direction of the stator core;
a bus bar electrically connected to the winding of the stator and in which at least a portion thereof is disposed only above the coil end;
a cover member covering the bus bar from below and disposed above the coil end; and
a refrigerant supply unit configured to discharge a refrigerant in a predetermined direction and supply the refrigerant to the stator, wherein
a hole penetrating in a vertical direction is provided in the cover member at a position corresponding to the coil end.

US Pat. No. 10,892,661

MOTOR

LG INNOTEK CO., LTD., Se...

1. A motor comprising:a housing;
a stator disposed inside the housing and having teeth;
a rotor disposed inside the stator;
a shaft coupled to the rotor; and
a teeth support part in contact with the teeth of the stator,
wherein the teeth support part includes at least one guide that is disposed between teeth adjacent to each other,
wherein a width of the guide in a circumferential direction corresponds to a distance between end surfaces of the adjacent teeth,
wherein an outer upper surface of the guide and inner bottom surfaces of the adjacent teeth form a shape of an arc.

US Pat. No. 10,892,660

ELECTRICAL MACHINE AND METHOD FOR MANUFACTURING AN ELECTRICAL MACHINE

AUDI AG, Ingolstadt (DE)...

1. An electrical machine, comprising:a rotor and a stator, wherein the rotor or the stator has at least one coil with a coil core and a coil winding surrounding the coil core, wherein the coil winding has at least one turn that is formed from a flat conductor bent around a plurality of bending axes, wherein the bending axes are spaced apart from one another and are parallel, and wherein the flat conductor, as a viewed in section, is S-shaped and/or has a meandering shape, wherein, for the reduction of eddy currents, the flat conductor has a plurality of layers insulated from one another, at least in regions, and/or a plurality of slot-shaped recesses;
wherein the turn has a first contact branch, which is arranged on a first side of the coil core and has a free edge that protrudes towards the coil core; a second contact branch, which is arranged on a second side of the coil core, lying opposite to the first side, and has a free edge that protrudes towards the coil core; and a connecting branch that connects the first contact branch and the second contact branch.

US Pat. No. 10,892,659

STATOR UNIT, ROTARY ELECTRIC MACHINE INCLUDING STATOR UNIT, AND METHOD OF MANUFACTURING STATOR UNIT

TOP CO., LTD., Echizen (...

1. A stator unit for including a plurality of coils, comprising:a stator core, the coils being wound around the stator core; and
a routing member,
wherein the routing member and the coils are lined up in an axial direction of the stator core, and
wherein the routing member includes:
a main body having a ring shape in a plan view of the stator unit, and having an outer circumference, and an inner circumference encircling an inner space,
a plurality of concentric groove portions formed in the main body so as to be separated from one another in a radial direction of the main body, and having wires routed therein, the wires extending from the coils, and
a plurality of guide slits, each of which is a cutout formed in the main body to penetrate the main body in an axial direction of the main body, and has one of the wires inserted therein that is led from one of the coils to one of the groove portions, each guide slit having an opening that opens into the inner space or into a space beyond the outer circumference, said each guide slit extending from the outer circumference or the inner circumference of the main body in the radial direction of the main body, and reaching the one of the groove portions so that the one of the wires is directly reachable from the inner space or the space beyond the outer circumference of the main body to the one of the groove portions via said each guide slit.

US Pat. No. 10,892,658

MOTOR WITH BUS-BAR ASSEMBLY

NEW MOTECH CO., LTD., Gw...

1. A motor, comprising:a stator assembly including a stator core, an upper insulator covering and insulating an upper portion of the stator core, and a lower insulator covering and insulating a lower portion of the stator core;
a bus-bar assembly including a bus-bar having a plurality of connecting terminals formed on a circular bus and a contact portion electrically connected to a coil, and a bus-bar housing accommodating the bus-bar therein;
a PCB housing coupled to an upper portion of the bus-bar housing, wherein the PCB housing including a PCB therein has a power connecting portion formed on the bus of the bus-bar assembly being electrically connected to the PCB,
wherein the PCB housing is formed by combining an upper PCB housing and a lower PCB housing, the PCB located between the upper and lower PCB housings,
wherein the stator assembly, the bus-bar assembly, and the PCB housing are coupled together via a bolt,
wherein the contact portion has
a bent portion formed by bending distal ends of the connecting terminals upward,
a contact piece located to face the bent portion, and
a connection piece which connects the bent portion with the contact piece,
wherein the bus-bar housing is coupled to a bus-bar seat defined in a central portion of the upper insulator;
a shaft secured to a central portion of the bus-bar housing in such a way as to protrude downwards and directly and fixedly coupled to a central portion of the lower PCB housing, wherein the shaft is configured to pass through both a shaft passing portion formed in the central portion of the bus-bar housing and a shaft passing portion formed in a central portion of the bus-bar seat; and
a rotor assembly including a rotor housing, a plurality of magnets provided on an inner wall of the rotor housing, an inner protrusion provided on a central portion of the rotor housing in such a way as to protrude upwards, bearings fixedly press-fitted into a bearing seat which is defined in an inner portion of the inner protrusion of the rotor housing, and a spacer provided between the bearings,
wherein the shaft is coupled to an inner circumference of each of the bearings to rotate the rotor assembly.

US Pat. No. 10,892,657

ELECTRIC MACHINE

Ford Global Technologies,...

9. An electric machine configured to propel a vehicle comprising:a stator having end windings protruding axially therefrom;
a rotor disposed within the stator; and
an end plate secured to an axial end of the rotor, the end plate defining a primary chamber, a secondary chamber that is radially outward of the primary chamber, and a first outlet channel that is configured to direct fluid onto the end windings, wherein the primary chamber is in fluid communication with a fluid source and the secondary chamber, and wherein the secondary chamber is in fluid communication with the first outlet channel.

US Pat. No. 10,892,656

STATOR

AISIN AW CO., LTD., Anjo...

1. A stator comprising:a stator core having a plurality of slots; and
a coil unit formed of a plurality of coils disposed in the plurality of slots;
wherein the coil unit includes a coil end portion projecting from an axial end face of the stator core;
wherein the coil end portion includes a plurality of peak portions projecting axially outward and arranged in a circumferential direction, and a plurality of lead wire portions for supplying electric power to the coils;
wherein each of the plurality of lead wire portions includes an extension portion extending at least in an axial direction, an end-side portion at an end of a respective lead wire portion and extending at least in a radial direction and a bent portion that is between and connects the extension portion and the end-side portions; and
wherein the bent portion is bent at least from the axial direction to the radial direction, at least a part of the bent portion being disposed on a stator core side with respect to the peak portions in the axial direction, in a space between the peak portions that are closest to the extension portion in the radial direction and that are adjacent in the circumferential direction.

US Pat. No. 10,892,655

ROTOR, ROTARY ELECTRIC MACHINE, AND COMPRESSOR

MITSUBISHI ELECTRIC CORPO...

1. A rotor comprising:a stacked core formed by stacking a plurality of cores;
permanent magnets provided in magnet holes formed to penetrate in an axial direction in the stacked core;
end plates provided at both ends in the axial direction of the stacked core; and
a rotary shaft provided to a through hole formed at a center in the stacked core and the end plates, the rotary shaft fixing the stacked core and the end plates, wherein
a plurality of the magnet holes in which the permanent magnets are provided are arranged in a circumferential direction,
void portions in which the permanent magnets are not present are provided at both ends in the circumferential direction of each magnet hole,
the stacked core has flow holes which penetrate in the axial direction and each of which is formed, between the magnet holes adjacent in the circumferential direction, on an inner side in a radial direction with respect to the magnet holes,
some or all of the cores have, first groove portions via which the void portions of the magnet holes and the flow holes communicate with each other, wherein a width of the first groove portions in the circumferential direction is less than or equal to a width of the flow holes in the circumferential direction, and second groove portions via which the void portions of the magnet holes and outer circumferences of the cores communicate with each other and which serve as discharge ports, and the cores have flow paths formed through the flow holes, the first groove portions, the void portions, and the second groove portions so as to communicate with outside of the cores linearly in the radial direction, and
at least one of the end plates has first holes through which the flow holes are exposed and which serve as intake ports, and tab portions which are located on downstream sides in a rotation direction of the first holes and which assist air intake.

US Pat. No. 10,892,654

AXIAL MAGNETIC FIELD MOTOR WITH GRAIN-ORIENTED SILICON STEEL SHEETS

SHENZHEN SHANXIANG INTELL...

1. An axial magnetic field motor, comprising:a rotating shaft;
a stator mounted on the rotating shaft, the stator comprising two bases and multiple electromagnetic elements, wherein each of the bases is constituted by multiple grain-oriented silicon steel sheets stacked to form a disc shape, multiple through holes are annularly and separately formed on the base, and the multiple electromagnetic elements are constituted by longitudinal cores constituted by multiple grain-oriented silicon steel sheets, and windings wound around outer peripheral surfaces of the cores, wherein two ends of each of the cores are provided with fixing portions, which correspond to dimensions of the through holes of the base, and can be fit within the through holes of the base; and
two rotors, wherein the rotating shaft passes through the two rotors disposed outside the stator, each of the rotors is constituted by two magnetic-conducting sheets and multiple permanent magnets, each of the magnetic-conducting sheets is formed with multiple equally-spaced through holes on an annular circumferential surface, the permanent magnets are embedded into the through holes, each of the permanent magnets has a fan shape, one side of the fan-shaped permanent magnet is an N pole, the other side of the fan-shaped permanent magnet is an S pole, adjacent two of the permanent magnets have the same N and N poles or the same S and S poles disposed in a circumferential direction, and the permanent magnets on the magnetic-conducting sheets in the rotors on two sides are disposed with different magnetic poles facing each other.

US Pat. No. 10,892,653

SYSTEM AND METHOD FOR SIMULTANEOUS INDUCTIVE RECHARGING OF MULTIPLE ELECTRONIC DEVICES

1. A recharging system for wireless and simultaneous recharging of a plurality of electronic computing devices placed upon a large area surface, said recharging system comprising:a placement assembly having a placement surface upon which the plurality of electronic devices are placed and defining an interior area beneath said placement surface;
a plurality of mobile recharging assemblies disposed in said interior area, a respective mobile recharging assembly including a housing having a motion assembly operable to move said housing in said interior area when energized;
an obstacle sensor disposed on said housing and operable to generate obstacle data upon detection of an obstacle;
a controller in data communication with said obstacle sensor and with said motion assembly of said respective mobile recharging assembly, said controller being operable to send an alternative motion signal to said motion assembly according to said obstacle data;
a charging device disposed on said housing of said respective mobile recharging assembly and in data communication with said controller, said charging device being configured to detect a battery on said placement surface and to detect an electrical load on said detected battery and to generate charge data indicative of said battery detection and said electrical load;
a control system positioned proximate said interior area in data communication with said controller of each of said plurality of mobile charging assemblies, said control system being operable to energize said charging device associated with said respective mobile recharging assembly to charge the detected battery;
wherein said control system is operable to energize a next mobile charging assembly of said plurality of mobile charging assemblies if said charging device includes said charge data indicative of having located a respective electronic computing device in need of charging.

US Pat. No. 10,892,652

ADAPTIVE PING METHOD FOR WIRELESS CHARGING SYSTEM WITH WIDE CHARGE DISTANCE

SEMTECH CORPORATION, Cam...

9. A system for controlling power delivery, comprising:a distance measuring device;
a processor coupled to the distance measuring device and configured to actuate the distance measurement device;
the distance measurement device configured to measure a distance between a transmitter and a receiver and to transmit a data packet to the processor that contains a plurality of data fields that have a value that represents the distance;
the processor configured to determine whether the distance is less than a predetermined threshold and to generate an error signal when the distance is less than the predetermined threshold that causes the processor to prevent the transmitter from generating an electromagnetic field and avoid causing damage to the receiver; and
a ping signal generator configured to generate a ping signal having a ping signal strength as a function of the distance and the transmitter configured to generate the electromagnetic field as a function of the ping signal strength when the distance is not less than the predetermined threshold.

US Pat. No. 10,892,651

COMBINED MULTI-SOURCE ENERGY HARVESTING AND COMMUNICATION MANAGEMENT SYSTEM

ISTANBUL TEKNIK UNIVERSIT...

1. A combined multi-source energy harvesting and communication management system, comprising:a plurality of energy harvesting modules, wherein each energy harvesting module is configured to obtain energy only from a single energy source selected from a plurality of energy sources, located in a smart wireless communication device;
an energy module, which is a part of the smart wireless communication device, configured to apply selection or combining procedures to energy produced and transferred from the plurality of ambient energy sources in the environment including heat, light, mechanical, and electromagnetic wave sources;
a management module configured to form energy combining and transfer strategies, in communication with the energy module and a wireless communication module located in the smart wireless communication device;
the wireless communication module configured to provide a feedback related to uplink and downlink energy consumption statistics and data communication requirements, the wireless communication module is in communication with the energy module and the management module;
an energy control interface forming a part of the energy module in communication with the management module, an energy combiner, and an energy storage and transfer unit, the energy control interface is configured to transfer the energy combining strategy received from the management module to the energy combiner and the energy transfer strategy to the energy storage and transfer unit;
the energy combiner, which is a part of the energy module, transmits statistics of incoming and harvested energy to the energy control interface, the energy combiner combines the energy received from different energy sources according to the energy combining strategy formed by the management module and transmitted by the energy control interface, the energy combiner submits obtained energy to the energy storage and transfer unit;
the energy storage and transfer unit, which is a part of the energy module, stores the energy sent by the energy combiner, transfers energy to the wireless communication module according to the energy transfer strategy formed by the management module, and transfers energy data stored in the energy storage and transfer unit to the energy control interface;
a memory unit, which is a part of the management module, the memory unit is composed of permanent and temporary information storage units, the memory unit contains information required by the management module including costs, demand and budget information;
an energy management unit, which is a part of the management module, evaluates the information obtained from the memory unit and is in communication with the energy module and a communication management unit, the energy management unit forming an energy combining and transfer strategy;
the communication management unit, which is a part of the management module, determines device configuration parameters by evaluating the energy combining and transfer strategy obtained from the energy management unit with up-to-date information obtained from the memory unit, and transfers the device configuration parameters and energy designation information to the wireless communication module.

US Pat. No. 10,892,650

MULTI-COIL LARGE AREA WIRELESS POWER SYSTEM

Efficient Power Conversio...

1. A large area wireless power system comprising:a synchronization transmitter for generating a first single-ended clock signal and converting the first single-ended clock signal into a plurality of differential signals;
a plurality of synchronization receivers for receiving the plurality of differential signals from the synchronization transmitter and converting each received differential signal into a corresponding second single-ended signal;
a plurality of cables of various lengths ranging from a shortest cable to a longest cable, each of the cables comprising a differential transmission line pair for transmitting the differential signals from the synchronization transmitter to the synchronization receivers, wherein each of the synchronization receivers comprises a delay compensation circuit for compensating for differences in phase delay as the differential signals are transmitted through the cables of various lengths, the delay compensation circuit being configured to add a least amount of delay to the second single-ended signals corresponding to the differential signals transmitted through the longest cable, and to add a greatest amount of delay to the second single-ended signals corresponding to the differential signals transmitted through the shortest cable, such that the second single-ended signals are synchronized;
a plurality of high power amplifiers for receiving the plurality of synchronized second single-ended signals from the respective synchronization receivers and generating power; and
a plurality of wireless power coils for receiving the power generated by the plurality of high power amplifiers and wirelessly providing power.

US Pat. No. 10,892,649

RADIO FREQUENCY (RF) POWER SOURCE AND METHOD FOR USE WITH A WIRELESS POWER TRANSMITTER OF A WIRELESS POWER TRANSFER SYSTEM

Etherdyne Technologies In...

1. A radio frequency (RF) power source for supplying a substantially constant RF current to a wireless power transmitter circuit of a wireless power transfer system, the RF power source comprising:a direct current (DC) voltage supply configured to supply a substantially constant DC voltage, the DC voltage supply having first and second terminals; and
RF power source circuitry electrically having a first node that is electrically coupled to a first terminal of the DC voltage supply, wherein a first terminal and a second terminal of the RF power source circuitry are disposed to be electrically coupled to a first terminal and a second terminal, respectively, of a resonant magnetic loop antenna of the wireless power transmitter circuit to thereby electrically couple the RF power source to the resonant magnetic loop antenna, the RF power source circuitry being configured to provide an RF current of constant amplitude to the resonant magnetic loop antenna while keeping voltage of the DC voltage supply fixed, the RF power source circuitry further comprising a push-pull switching circuit, the push-pull switching circuit comprising:
a first switching device connected from ground to the first terminal of the resonant magnetic loop antenna; and
a second switching device connected from ground to the second terminal of the resonant magnetic loop antenna, the first switching device and the second switching device configured to be driven 180° out of phase with respect to one another and coupled to the DC voltage supply through a respective inductive element; and
wherein the first terminal and the second terminal of the resonant magnetic loop antenna are coupled to one another through at least one capacitive element.

US Pat. No. 10,892,648

WIRELESS POWER TRANSFER METHOD, APPARATUS AND SYSTEM FOR LOW AND MEDIUM POWER

LG ELECTRONICS INC., Seo...

1. A wireless power transmitter for transferring wireless power to a wireless power receiver, the wireless power transmitter comprising:a primary coil configured to perform wireless power transfer to a wireless power receiver by using magnetic coupling with a secondary coil in the wireless power receiver;
an inverter configured to convert DC input into an AC waveform to drive the primary coil based on at least one of a half-bridge inverter topology and a full-bridge inverter topology; and
a power transmission control unit configured to control at least one of an operating frequency or a duty cycle of the inverter,
wherein the inverter uses the half-bridge inverter topology to transmit a ping signal to the wireless power receiver, and switches from the half-bridge inverter topology to the full-bridge inverter topology when a power transfer contract is established with a maximum power greater than 5 W.

US Pat. No. 10,892,647

WIRELESS POWER TRANSMITTER WITH DATA COMMUNICATION PROVISION

WITS Co., Ltd., Gyeonggi...

1. A wireless power transmitter comprising:a main coil configured to transmit power;
an inverter configured to apply an alternating current (AC) signal to the main coil;
a communication module configured to output a transmission signal including transmission data to be wirelessly transmitted the wireless power transmitter, and/or receive a reception signal including received data wirelessly received by the wireless power transmitter;
a first connecting circuitry configured to prevent a power signal of the main coil from being input to the communication module; and
an auxiliary coil configured to connect to the main coil and connected to the first connecting circuitry.

US Pat. No. 10,892,646

METHOD OF FABRICATING AN ANTENNA HAVING A SUBSTRATE CONFIGURED TO FACILITATE THROUGH-METAL ENERGY TRANSFER VIA NEAR FIELD MAGNETIC COUPLING

NuCurrent, Inc., Chicago...

1. A method of making an antenna, the method comprising the following steps:a) forming at least one inductor coil positioned on a first substrate, the at least one inductor coil having an inner inductor coil diameter;
b) positioning a second substrate adjacent to the at least one inductor coil, the second substrate having a second substrate surface extending to a second substrate perimeter having an end defining a second substrate surface area and having a second substrate thickness oriented about perpendicular to the second substrate surface;
c) forming a cut-out within the second substrate surface, the cut-out configured having a cut-out perimeter defining a cut-out shape oriented parallel to the second substrate surface, the cut-out extending through the second substrate thickness, wherein the perimeter of the cut-out is oriented in parallel with the inner inductor coil diameter of the at least one inductor coil; and
d) forming at least one slit having a slit length extending from a slit proximal end to a slit distal end, a slit width oriented perpendicular to the slit length, and a slit depth extending at least partially within the second substrate thickness, wherein the slit proximal end extends from the cut-out perimeter, the slit distal end extending towards a second substrate edge.

US Pat. No. 10,892,645

CURRENT SENSE APPARATUS AND METHOD

NuVolta Technologies (Hef...

1. A device comprising:a positive current sense amplifier having two inputs connected to a drain and a source of a power switch respectively through a plurality of positive current sense switches; and
a negative current sense amplifier having two inputs connected to the drain and the source of the power switch respectively through a plurality of negative current sense switches.

US Pat. No. 10,892,644

SYSTEM FOR SUPPLYING ELECTRIC POWER TO TWO-DIMENSIONAL COMMUNICATION SHEET, AND FEEDING PORT

NATIONAL INSTITUTE OF INF...

1. A power supply system for a two-dimensional communication sheet, comprising:the two-dimensional communication sheet, which comprises a dielectric layer, a first conductor layer covering a first surface of the dielectric layer, and a second conductor layer covering a second surface of the dielectric layer and composed of a mesh-shaped wiring pattern; and
a power supply port for supplying power to the two-dimensional communication sheet, the power supply port comprising a first power supply plate provided separately at a side of the first conductor layer, a second power supply plate provided at a position opposite to the first power supply plate and provided separately at a side of the second conductor layer, a first power supply body electrically connected with the first power supply plate, and a second power supply body electrically connected with the second power supply plate,
wherein:
the first power supply body has a columnar shape, passes through the dielectric layer, and protrudes from the two-dimensional communication sheet,
the second power supply body protrudes from the two-dimensional communication sheet and encloses the first power supply body circumferentially, and
the first power supply body and the second power supply body are configured to be connectable to a coaxial cable for power supply.

US Pat. No. 10,892,643

FACILITATION OF CHARGE OF AND COMMUNICATION WITH AN ELECTRONIC DEVICE

INTERNATIONAL BUSINESS MA...

1. A device, comprising:a memory; and
a storage component operatively coupled to the memory and having one or more recesses to receive a second device to be charged by the storage component, wherein the storage component comprises:
a charging circuit; and
an inductive circuit coupled to the charging circuit, wherein the storage component harvests energy from one or more energy sources to charge the charging circuit and wherein, based on the energy harvested, the inductive circuit inductively couples to the second device having a second inductive circuit and positioned in at least one of the recesses and charges a power source of the second device, wherein the storage component further comprises a sterilization component that exposes the second device to a sterilizing agent, and wherein the sterilizing agent is selected from the group consisting of ultraviolet radiation, thermal radiation, and chemical solution.

US Pat. No. 10,892,642

COMPRESSED AIR ENERGY STORAGE POWER GENERATION APPARATUS AND COMPRESSED AIR ENERGY STORAGE POWER GENERATION METHOD

Kobe Steel, Ltd., Hyogo ...

1. A compressed air energy storage power generation apparatus comprising:an electric motor driven by irregularly fluctuating input electric power;
a compressor mechanically connected to the electric motor for compressing air, the compressed air being heated to a first temperature by the compressor;
a pressure accumulator for storing the compressed air compressed by the compressor;
an expander driven by the compressed air supplied from the pressure accumulator;
a generator mechanically connected to the expander;
a first heat exchanger, provided between the compressor and the pressure accumulator such that the compressor, the first heat exchanger, and the pressure accumulator are fluidly connected via an air pipe,
the first heat exchanger exchanging heat between the compressed air supplied from the compressor at the first temperature and a first heat transfer medium,
the first heat exchanger cooling the compressed air to a second temperature that is lower than the first temperature and the first heat exchanger heating the first heat transfer medium,
the second temperature being near room temperature;
a cold-side heat extracting unit that extracts air serving as working fluid as air having a temperature that is equal to or lower than room temperature; and
second heat exchanger disposed between the pressure accumulator and the expander,
the second heat exchanger heating the compressed air supplied from the accumulator before the compressed air is supplied to the expander.

US Pat. No. 10,892,641

HIGHLY FLEXIBLE, ELECTRICAL DISTRIBUTION GRID EDGE ENERGY MANAGER AND ROUTER

Gridbridge, Inc., Raleig...

1. An electrical distribution grid energy management device comprising:(i) a primary electrical connection terminal for receiving power from an electrical grid power supply;
(ii) at least one secondary electrical connection terminal for providing power to a consumer electrical supply line;
(iii) a modular electrical circuit layer including a power processing circuit for receiving a portion of the power from the primary electrical connection terminal, processing power through a central DC power stage, and providing power from the central DC stage to at least one of the at least one secondary electrical connection terminals,
(a) the power processing circuit configured to convert power received at the central DC power stage to DC power, and
(b) the power processing circuit configured to convert DC power exiting the central DC stage to AC power;
(iv) a controller layer configured to control the modular electrical circuit layer, the control layer comprising at least one computer processor and nonvolatile memory coupled to the computer processor; and
(v) a physical layer comprising at least one communication device in operable communication with the controller layer,
(vi) wherein the modular electrical circuit layer further comprises a Power Factor Correction stage and a Voltage Regulation stage, wherein the Power Factor Correction stage and Voltage Regulation stage are disposed on opposite sides of the central DC power stage, thereby providing harmonic isolation between the primary electrical connection terminal and at least one of the at least one secondary electrical connection terminals, and;
(vii) further wherein the electrical distribution grid energy management device comprises a modular power processing architecture capable of electrically coupling to a second grid energy management device for increasing one or more of power levels and voltages available at a site.

US Pat. No. 10,892,640

VOLTAGE AND REACTIVE POWER MONITORING/CONTROL DEVICE AND METHOD FOR CALCULATING REQUIRED REACTIVE POWER AMOUNT FOR SUPPRESSING A FLUCTUATION COMPONENT AND SELECTING AN APPROPRIATE EQUIPMENT

HITACHI, LTD., Tokyo (JP...

1. A voltage and reactive power monitoring/control device which is applied to a power system including a control subject equipment capable of adjusting a reactive power, and which monitors and controls a voltage and the reactive power, comprising:a storage device storing a plurality of programs; and
a processor, the processor configured to execute the plurality of programs to perform steps of:
calculating a fluctuation component of a predicted value of data obtained from the power system;
obtaining the reactive power required for suppressing the fluctuation component as a required reactive power amount;
selecting a reactive power distribution subject equipment among a plurality of control subject equipment;
performing output distribution calculation of the required reactive power amount for the selected power distribution subject equipment;
calculating a control instruction value for each control subject equipment from an output distribution calculation result determined for the selected power distribution subject equipment;
calculating the fluctuation components in a plurality of periods in calculating the fluctuation component of the predicted value of the data obtained from the power system, and
determining the fluctuation component to be suppressed by the reactive power and the fluctuation component to not be suppressed among the fluctuation components in the plurality of periods to obtain the required reactive power amount for the fluctuation component to be suppressed by the reactive power.

US Pat. No. 10,892,639

CONNECTION LOCATOR IN A POWER AGGREGATION SYSTEM FOR DISTRIBUTED ELECTRIC RESOURCES

V2Green, Inc., Reston, V...

1. A method, comprising:establishing, by way of a computer network, a communication between a mobile electric resource and a network-connected device, the mobile electric resource including one or more processors including a processor to control power flow;
obtaining, with the one or more processors, a unique identifier associated with the network-connected device;
transmitting, with the one or more processors, information regarding the mobile electric resource to a remote server;
determining, with the one or more processors or the remote server, a location of the mobile electric resource from the unique identifier;
determining at least one power connection location from the determined location; and
charging the mobile electric resource with the determined at least one power connection location.

US Pat. No. 10,892,638

AUTOMATIC DETECTION OF DISTRIBUTED ENERGY RESOURCES SYSTEM PARAMETERS

Heila Technologies, Inc.,...

8. A method of determining the topology of an aggregated distributed energy resources system (“DERs system”), the DERs system having a plurality of assets, at least one of the assets being a controllable asset, the method comprising:injecting a test power signal at a given frequency from at least one of the controllable assets into the DERs system;
measuring the voltage at each of the plurality of assets after injecting the test power signal;
determining the magnitude of perturbation of the voltage at the given frequency for each of the plurality of assets;
constructing the topology of DERs system as a function of the differences of the magnitude of perturbations of each of the plurality of assets; and
controlling at least one of the controllable assets as a function of at least the constructed topology.

US Pat. No. 10,892,637

POWER SUPPLY AND POWER SUPPLYING METHOD WITH POWER BACKUP

Monolithic Power Systems,...

1. A power supply, comprising:an eFuse, configured to deliver an input voltage to a bus terminal, to provide a bus voltage;
a power backup converter, coupled to the bus terminal, to provide a charge path from the bus terminal to a storage capacitor to store energy in the storage capacitor, and to provide a discharge path from the storage capacitor to the bus terminal; and
a controller, configured to control the power backup converter in response to a current sense signal indicative of a current flowing through the eFuse and a feedback voltage indicative of the bus voltage; wherein the controller comprises:
a current comparator, configured to compare the current sense signal with a current threshold;
a voltage comparator, configured to compare the feedback voltage with a release threshold voltage; and
a logical AND circuit, configured to activate the power backup converter to release the energy stored at the storage capacitor when a) the current sense signal is higher than the current threshold; and b) the feedback voltage is lower than the release threshold voltage.

US Pat. No. 10,892,636

PLUG-IN BACKUP ENERGY DEVICES

Hewlett Packard Enterpris...

1. A plug-in backup energy device, comprising:a connector to insert into a receptacle of a computing device;
an energy storage device; and
a buck-boost converter coupled to the energy storage device such that the buck-boost converter:
maintains a charge of the energy storage device during a no-fault mode of the computing device; and
in response to the plug-in backup energy device switching from a normal mode to a power supply mode as a result of the computing device experiencing a fault, regulates a voltage output of the energy storage device to provide energy to the computing device via the connector during the fault of the computing device
wherein the plugin backup energy device receives power for maintaining the charge of the energy storage device from the computing device via the connector.

US Pat. No. 10,892,635

REDUNDANT POWER SUPPLY

FORD GLOBAL TECHNOLOGIES,...

1. A system comprising:first and a second vehicle power distribution buses electrically isolated from one another;
a first DC to DC converter including;
a first input terminal connected to a first DC power generator with a first voltage; and
a first output terminal with a second voltage less than the first voltage, electrically connected to the first vehicle power distribution bus;
a second DC to DC converter including:
a second input terminal connected to a second DC power generator with the first voltage; and
a second output terminal with the second voltage, electrically connected to the second power distribution bus;
a first battery electrically connected to the first power distribution bus; and
a second battery electrically connected to the second power distribution bus.

US Pat. No. 10,892,634

POWER DISTRIBUTION UNIT WITH FEWER COMPONENTS AND SYSTEM

Shenzhen Fugui Precision ...

1. A power distribution unit (PDU) connected with a plurality of power supply units (PSUs), the PDU with a first input terminal and a second terminal; the first input terminal receiving an alternating current (AC) from a first power source, and the second input terminal receiving an AC from a second power source; the PDU comprising:a connection module connected with the plurality of PSUs;
a first switching module connected between the first input terminal and the connection module, and configured to switch between a turn-on state and a turn-off state;
a second switching module connected between the second input terminal and the connection module, and configured to switch between a turn-on state and a turn-off state;
a processor configured to control such that wherein in the turn-on state, the first switching module establishes a connection between the first input terminal and the connection module, in the turn-off state, the first switching module disconnects the first input terminal with the connection module; in the turn-on state, the second switching module establishes a connection between the second input terminal and the connection module, in the turn-off state, the second switching module disconnects the second input terminal with the connection module; in any point in time, the first switching module and the second switching module are in opposite states;
wherein the connection module comprises a first input pin, a second input pin, a third input pin, at least one function pin, and at least one output port; three live lines of the first power source are electrically connected to the first input pin, the second input pin, the third input pin through the first switching module; three live lines of the second power source are electrically connected to the first input pin, the second input pin, the third input pin through the second switching module; neutral lines of the first power source and the second power source are electrically connected to the at least one function pin; the at least one output port is electrically connected to the PSU.

US Pat. No. 10,892,633

METHODS AND SYSTEMS FOR AUTOMOTIVE TYPE TRANSIENT PROTECTION OF A SOLAR CHARGE SOURCE

Thermo King Corporation, ...

1. A method for providing power to a load using a solar charge source, the method comprising:a solar charge controller of the solar charge source obtaining electrical power from a solar panel;
passing the electrical power through an electrostatic discharge protection module of the solar charge controller for protecting the solar charge source from a sudden flow of electricity between the solar charge controller and an electrically charged object;
a converter module of the solar charge controller converting the obtained electrical power from a first voltage level to a second voltage level;
the solar charge controller regulating the converted electrical power for controlling power provided to the load including:
a maximum power point tracking portion of the solar charge controller obtaining solar cell data of the solar panel and determining power optimization information based on solar cell data from a solar panel;
a temperature compensation portion of the solar charge controller obtaining temperature data of the load and determining correction information based on the temperature data of the load;
a startup and charge rate intelligence portion of the solar charge controller obtaining charge status data of the load and determining charge optimization information based on the charge status data of the load; and
a load control and output regulation portion of the solar charge controller regulating the converted electrical power based on the power optimization information obtained from the MPPT portion, the correction information obtained from the temperature compensation portion, and the charge optimization information obtained from the startup and charge rate intelligence portion;
passing the regulated electrical power through an automotive type transient suppression module of the solar charge controller for protecting the solar charge source from an automotive type transient; and
passing the regulated electrical power from the automotive type transient suppression module out of the solar charge controller.