US Pat. No. 10,193,350

POWER SUPPLYING DEVICE AND POWER RECEIVING DEVICE

SONY CORPORATION, Tokyo ...

1. A power supplying device, comprising:a controller configured to:
receive, from a first device of a plurality of devices, a first request to supply power through a direct-current bus line, wherein DC power flows through the direct-current bus line;
determine, based on the first request, whether the power supplying device is able to supply the power to the first device;
transmit a response to the first device based on the determination that the power supplying device is able to supply the power, wherein the response indicates the power supplying device as a candidate to supply the power;
determine one of a presence or an absence of a right to control the direct-current bus line, wherein the presence of the right to control the direct-current bus line indicates that a second device of the plurality of devices has the right to control the direct-current bus line;
acquire the right to control the direct-current bus line, based on the absence of the right to control;
notify the plurality of devices of the acquisition of the right to control the direct-current bus line; and
control the supply of the power through the direct-current bus line to the first device based on the acquired right to control the direct-current bus line.

US Pat. No. 10,193,348

ARRANGEMENT AND INSTALLATION FOR TRANSMITTING ELECTRIC POWER WITH A RESERVE RECTIFIER

Siemens Aktiengesellschaf...

1. An arrangement, comprising:a first group of rectifiers having a DC voltage side connected to form a series circuit on the DC voltage side, and an AC voltage side to be connected to a first AC voltage network;
a plurality of switching devices;
a reserve rectifier having an AC voltage side and a DC voltage side, wherein, on occasion of a fault of one of said rectifiers of said first group of rectifiers, said AC voltage side of said reserve rectifier is to be electrically connected by way of a respective said switching device of said plurality of switching devices to the first AC voltage network and said DC voltage side of said reserve rectifier is to be connected to a first DC voltage line to form an augmented series circuit with said rectifiers of said first group of rectifiers.

US Pat. No. 10,193,345

SYSTEM AND METHOD FOR MANAGING THE POWER OUTPUT OF A PHOTOVOLTAIC CELL

Solarlytics, Inc., Liver...

1. A method of managing a photovoltaic device, comprising:enabling a first port of a switch to be coupled to the photovoltaic device;
enabling a second port of the switch to be coupled to a load driven by the photovoltaic device;
enabling a third port of the switch to be coupled to a voltage source, wherein the switch can operate in a first position for providing a first current path, between the photovoltaic device and the voltage source and a second position for providing a second current path between the photovoltaic device and the load; and
applying a voltage signal generated by the voltage source to the photovoltaic device, the voltage signal having a first state including a series of voltage pulses with a positive magnitude for generating an external electric field across the photovoltaic device when the switch is in the first position and a second state to provide electrical isolation between the voltage source and the load when the switch is in the second position; and
controlling a frequency, a magnitude, or a duration of the first state and the second state via a control circuit coupled to the voltage source and the switch based on an output current of the photovoltaic device measured by a current sensor coupled in series between the photovoltaic device and the load or an output voltage of the photovoltaic device measured by a voltage probe coupled across the photovoltaic device.

US Pat. No. 10,193,343

METHOD FOR MANAGING POWER OF ENERGY STORAGE SYSTEM CONNECTED WITH RENEWABLE ENERGY

Doosan Heavy Industries C...

1. A method for managing power of an energy storage system (ESS) connected to renewable energy, the ESS including an energy storage device connected to a power grid, a battery management system (BMS), a power conditioning system (PCS), and one or more renewable energy generation facilities producing electric energy from renewable energy, the method comprising the steps of:determining a predicted power consumption amount of a power load and a predicted power production amount of the renewable energy generation facility (S100);
storing type and characteristics information of the renewable energy generation facility (S200);
predicting power production of the renewable energy generation facility based on the stored type and characteristics information (S300);
determining a required discharge amount for the energy storage device (S400);
determining whether a power shortage amount is equal to or greater than a predetermined value depending on the required charge amount of the energy storage device (S500);
determining whether the energy storage device is fully charged with the power production from the renewable energy generation facility if the power shortage amount is smaller than the predetermined value (S600); and
controlling charging/discharging operation of the energy storage device according to a charge/discharge schedule.

US Pat. No. 10,193,342

METHOD AND DEVICE FOR CONTROLLING POWER GENERATORS OF A SUBGRID WITHIN AN INTERCONNECTED GRID

1. A sub-grid controller for a sub-grid within an interconnected grid, the sub-grid controller comprising:a first controller configured to control power generators or loads of the sub-grid according to sensor-detected internal measured variables, sensor-detected external measured variables and external manipulated variables, or any combination thereof of the sub-grid, such that a dynamic behavior of the sub-grid with respect to neighboring sub-grids corresponds to a defined target behavior,
wherein the first controller is configured to calculate a control vector u for the power generators, the loads, and subnetworks from a vector y of the sensor detected internal measured variables and a vector v of the sensor-detected external measured variables and the external manipulated variables as follows:
u=K·y+L·v, where
K is an output feedback matrix, and
L is a feedforward matrix.

US Pat. No. 10,193,340

MULTI-LEVEL CASCADED H-BRIDGE STATCOM CIRCULATING COOLING FLUID WITHIN ENCLOSURE

American Superconductor C...

1. A static synchronous compensator configured to be installed in and provide reactive power to a medium voltage electric distribution system, comprising:An enclosure having an interior region and an external surface;
A multi-level cascaded H-bridge (CHB) converter, contained in the interior region of the enclosure, having a nominal operating voltage at a medium voltage level, where a medium voltage level is in the range of approximately 1 kV to approximately 35 kV AC, and having an input and an output;
A first electrical bushing on the external surface of the enclosure having a first end configured to be connected to a first phase of the medium voltage electric distribution system and a second end connected to the input of the multi-level CHB converter;
A second electrical bushing on the external surface of the enclosure having a first end configured to be connected to one of ground, floating ground, or a second phase, and a second end connected to the output of the multi-level CHB converter;
A cooling system configured to circulate a cooling fluid in the interior of the enclosure to cool the multi-level CHB converter;
A controller configured to control the multi-level CHB converter to output reactive power to the medium voltage electric distribution system at the medium voltage level; and
A mounting member on the external surface of the enclosure configured to mate with a bracket affixed to a utility pole to mount the static synchronous compensator on the utility pole.

US Pat. No. 10,193,339

GRID INTEGRATED CONTROL APPARATUS, GRID CONTROL SYSTEM, GRID CONTROL APPARATUS, PROGRAM, AND CONTROL METHOD

NEC Corporation, Tokyo (...

1. A grid control system, comprising:a plurality of grids, wherein each of the plurality of grids includes at least one processor configured to execute machine-readable instructions to implement:
a power transmission and reception unit that transmits and receives power between a grid of the plurality of grids and one or more other grids of the plurality of grids through a power transmission line; and
a grid control unit that controls the power transmission and reception unit on the basis of a control instruction received from a grid integrated control apparatus connected through a communication line,
wherein at least one of the grids of the plurality of grids includes a distribution unit that distributes power to a consumer consuming power; and
the grid integrated control apparatus comprises at least one processor configured to execute machine-readable instructions to implement:
a supply and demand energy information receiver unit that receives, for each of the grids of the plurality of grids, supply and demand energy information indicating a difference between supply energy from the grid to the one or more other grids and supply energy to the grid from the one or more other grids;
a cost information receiver unit that receives cost information indicating a cost required for power transmission between the plurality of grids, the cost information including a wheeling charge per unit time required for power transmission through the power transmission line for each combination of a grid of the plurality of grids that supplies power and a grid of the plurality of grids that receives power, and a power loss caused by power transmission through the power transmission line for each combination of a grid of the plurality of grids that supplies power and a grid of the plurality of grids that receives power;
a grid control instruction generation unit that performs:
determining a combination of: the grid that supplies power; the grid that receives power; and a transmitted energy, on the basis of the supply and demand energy information received by the supply and demand energy information receiver unit and the cost information received by the cost information receiver unit;
generating the control instruction for controlling power transmission of each of the grids of the plurality of grids on the basis of the determined combination; and
transmitting the control instruction to each of the grids, the control instruction adjusting an amount of the power supplied by the grid that supplies power based on the determined combination;
wherein one or more of the grids includes a power storage unit configured to store energy; and
a range determination unit that sets a range of the stored energy by increasing and/or decreasing an upper limit and/or a lower limited of a range of the stored energy on the basis of the control instruction.

US Pat. No. 10,193,338

VOLTAGE TRIGGERED EDGE INSENSITIVE PROTECTION CIRCUIT

SYNAPTICS INCORPORATED, ...

1. A trigger circuit for controlling a current shunt in an integrated circuit, comprising:a comparison circuit configured to:
compare a monitored voltage to a reference voltage, wherein the monitored voltage is generated by a powered or non-powered electrode static discharge (ESD) or electrostatic overstress (EOS) event; and
output a signal indicating when the monitored voltage is equal to or greater than the reference voltage; and
a shunt circuit configured to shunt the current based on receiving the signal from the comparison circuit.

US Pat. No. 10,193,336

ESD PROTECTION CIRCUIT, DIFFERENTIAL TRANSMISSION LINE, COMMON MODE FILTER CIRCUIT, ESD PROTECTION DEVICE, AND COMPOSITE DEVICE

MURATA MANUFACTURING CO.,...

1. An ESD protection circuit comprising:a first terminal and a second terminal defining a first balanced port;
a third terminal and a fourth terminal defining a second balanced port;
a first ESD protection circuit that includes a first Zener diode and is connected between a ground and a first node between the first terminal and the third terminal;
a second ESD protection circuit that includes a second Zener diode, is connected between the ground and a second node between the second terminal and the fourth terminal, and is symmetric with respect to the first ESD protection circuit;
a first coil provided in series between the first terminal and the first node;
a third coil that is cumulatively connected to the first coil and is provided in series between the third terminal and the first node;
a second coil provided in series between the second terminal and the second node; and
a fourth coil that is cumulatively connected to the second coil and is provided in series between the fourth terminal and the second node.

US Pat. No. 10,193,335

RADIO FREQUENCY SURGE PROTECTOR WITH MATCHED PISTON-CYLINDER CAVITY SHAPE

TRANSTECTOR SYSTEMS, INC....

10. A surge protector comprising:a housing defining a cavity and having an axis, a first axial end, and a second axial end;
a first center conductor positioned within the cavity at the first axial end of the housing and a second center conductor positioned within the cavity at the second axial end of the housing;
an inner coupler positioned within the cavity, having a shaft, and being coupled to the first center conductor;
an outer coupler positioned within the cavity, having an inner surface that defines a volume for receiving at least a portion of the shaft of the inner coupler, and being coupled to the second center conductor;
a first dielectric material positioned between the shaft and the inner surface;
a first spiral inductor positioned within the cavity, having an inner curve coupled to the first center conductor and an outer curve; and
a second spiral inductor positioned within the cavity, having an inner curve coupled to the second center conductor and an outer curve, such that the inner coupler and the outer coupler are each at least partially positioned axially between the first spiral inductor and the second spiral inductor.

US Pat. No. 10,193,334

APPARATUSES AND METHOD FOR OVER-VOLTAGE EVENT PROTECTION

Micron Technology, Inc., ...

1. An apparatus, comprising:a conductive path circuit configured to discharge current associated with an over-voltage event at an input node responsive to a voltage of the input node having a magnitude that exceeds a trigger voltage; and
a trigger circuit coupled to the conductive path circuit, the trigger circuit comprising:
a first transistor coupled to the conductive path circuit and configured to adjust the magnitude of the trigger voltage, wherein the trigger voltage is provided from a source of the first transistor, wherein the first transistor comprises a p-type field-effect transistor including a drain, wherein a doped region forming the drain of the first transistor is shared with the conductive path circuit; and
a lateral bipolar junction transistor merged with the first transistor and wherein the first transistor and the bipolar junction transistor share at least two doped regions.

US Pat. No. 10,193,333

ESD PROTECTION DEVICE

MURATA MANUFACTURING CO.,...

1. An electronic discharge protection device comprising:an insulating substrate;
a cavity provided in the insulating substrate;
at least one pair of discharge electrodes each including a portion exposed in the cavity, the exposed portions facing each other; and
external electrodes provided on a surface of the insulating substrate and connected to the at least one pair of discharge electrodes; wherein
a particulate supporting electrode material having conductivity is dispersed between the exposed portions; and
the particulate supporting electrode material includes a mixture of conductive materials with different sizes that are disposed in the cavity.

US Pat. No. 10,193,332

ESD PROTECTION DEVICE

MURATA MANUFACTURING CO.,...

1. An ESD protection device comprising:a substrate;
first and second discharge electrodes provided on the substrate, the first and second discharge electrodes facing each other with a gap therebetween;
a high-dielectric-constant layer, directly or indirectly, coupling the first discharge electrode and the second discharge electrode, the high-dielectric-constant layer having a relative dielectric constant of 30 or more; and
a back electrode overlapping with the gap between the first and second discharge electrodes with part of the substrate therebetween.

US Pat. No. 10,193,331

POWER DISTRIBUTION UNIT AND METHOD OF CONTAINING ARC FAULTS IN POWER DISTRIBUTION UNITS

HAMILTON SUNDSTRAND CORPO...

1. A method of containing arc faults in a power distribution unit, the method comprising:in response to a bus bar temperature exceeding a bus bar temperature threshold, thermally opening a conductive element extending between an energizing coil of a contactor, a bus bar, and a controller configured to selectively open and close the contactor, the conductive element being electrically connected to the energizing coil of the contactor and the controller, the conductive element being electrically isolated from a power source electrically connected to the bus bar through the contactor, the conductive element being disposed on a surface of the bus bar and being electrically isolated from the bus bar.

US Pat. No. 10,193,330

SAFETY SYSTEM FOR MOTOR DRIVE

Rockwell Automation Techn...

1. A control circuit, comprising:an input to receive a DC input signal;
a first DC to DC converter to convert the DC input signal to provide a first DC output signal;
a second DC to DC converter to convert the DC input signal to provide a second DC output signal;
a protection circuit, including:
a switch configured when a switch control signal is in a first state to connect the input to the first and second DC to DC converters, and configured when the switch control signal is in a different second state to disconnect the input from the first and second DC to DC converters, and
a protection control circuit, including a protection control circuit output to provide the switch control signal according to the DC input signal and a monitor signal; and
a monitor circuit, including a monitor circuit output to provide the monitor signal in one of a first state and a second state according to the first and second DC output signals.

US Pat. No. 10,193,329

WAVE-MAKING MECHANISM

Intex Marketing Ltd., To...

1. A wave-making mechanism of a pool, comprising:a housing with inlet holes distributed in a rear portion and a plurality of side walls;
a motor positioned within the housing;
an external power supply operably coupled to the motor;
a motor control box operably connected to the external power supply;
an impeller driven by the motor;
an impeller housing covering the impeller and including rectifying holes;
a guiding cap coupled to a front end of the impeller housing and having a flared configuration;
an outlet cover coupled to a front end of the guiding cap and including a screen portion; and
a shut-off switch that comprises a switch head magnetically coupled to the housing and including a handle and a cord.

US Pat. No. 10,193,328

METHOD AND SYSTEM FOR PROTECTING TRANSFORMERS FROM INTERNAL FIRE

EASUN-MR TAP CHANGERS (P)...

1. A system for preventing a transformer from catching an internally generated fire, the system comprising:a first set of sensors configured to sense the generation of an arc in the transformer;
a timer configured to be triggered ON when the first set of sensors senses the generation of the arc, wherein the timer is triggered for a time period TM;
a first breaker to isolate an incoming power supply to the transformer;
a set of relays to sense the faulty condition in the transformer;
a controller configured to initiate a predefined instructions, if the faulty condition still persists after the time period TM;
a vacuum bottle in direct contact with the transformer chamber; and
a diaphragm present between the transformer and the vacuum bottle, wherein the diaphragm is configured to be broken by a pressure generated by the transformer, thereby allowing the vacuum bottle to suck the oil from the transformer chamber.

US Pat. No. 10,193,327

SAFETY CONTROL METHOD AND DEVICE FOR SYSTEM WITH PRECHARGING CIRCUIT, AND SYSTEM THEREOF

SCHNEIDER TOSHIBA INVERTE...

1. A safety control method for a system including a precharging circuit, the control method comprising:detecting if a number of times that the precharging circuit has reached an undervoltage condition reaches a threshold number of times;
calculating a duration between the precharging circuit reaching the undervoltage condition for a first time and the precharging circuit reaching the undervoltage condition for the threshold number of times;
issuing an error alarm and stopping operation of the system when the number of times reaches the threshold number of times and the duration is less than or equal to a threshold period of time.

US Pat. No. 10,193,326

NON-INTRUSIVE SHORT-CIRCUIT PROTECTION FOR POWER SUPPLY DEVICES

Continental Automotive Sy...

1. A method of protecting a power source, having an output voltage, from a short circuit, the method comprising:providing to a first input of a voltage comparator, a power source voltage minus a voltage drop across a first, forward-biased, non-ideal diode carrying electric current from the power source to a load;
providing to a second input of the voltage comparator, the power source voltage minus a voltage drop across a second, forward-biased, non-ideal diode, which is also coupled to the power source and which carries a reference current, to a second input of the voltage comparator; and
providing a control voltage signal, which is output from the voltage comparator, to a switching device located between the power source and the first forward-biased non-ideal diode, the control voltage signal and switching device being selected and configured to disconnect the power source when a power supply voltage drop across the first forward-biased, non-ideal diode exceeds a predetermined threshold relative to a power supply voltage drop across the second forward-biased, non-ideal diode.

US Pat. No. 10,193,325

CONTROLLED POWER-UP SCHEME FOR AN ELECTRONIC TRIP UNIT, AND CIRCUIT INTERRUPTER EMPLOYING SAME

EATON INTELLIGENT POWER L...

1. A power supply circuit for a trip unit of a circuit interrupter, comprising:a current transformer structured to provide power based on a primary current flowing through the circuit interrupter;
a startup circuit coupled to the current transformer, wherein the startup circuit includes a burden impedance, and wherein the startup circuit is structured to: (i) burden the current transformer using the burden impedance, (ii) monitor a level of the power available from the current transformer, (iii) prevent the trip unit from starting up responsive to the level being below a predetermined value, and (iv) remove the burden and cause the trip unit to be started up responsive to the level being above the predetermined value; and
a DC/DC converter coupled to an output of the startup circuit, wherein the DC/DC converter is structured to provide a power signal to the trip unit responsive to the level being above the predetermined value.

US Pat. No. 10,193,324

LOW-LOSS AND FAST ACTING SOLID-STATE BREAKER

Silicon Power Corporation...

1. A circuit for isolating a load from a source, the circuit comprising:at least one insulated-gate bipolar transistor (IGBT); and
at least one gate turn-off thyristor (GTO) in parallel with the insulated-gate bipolar transistor,
wherein when no fault condition exists, the at least one GTO is configured to be on to couple the load to the source, and
wherein when a fault condition exists:
the at least one IGBT is configured to turn on; and
the at least one GTO is configured to turn off after the at least one IGBT turns on.

US Pat. No. 10,193,323

SEMICONDUCTOR DEVICE

Mitsubishi Electric Corpo...

1. A semiconductor device comprising:a semiconductor switching element having a sense terminal and capable of outputting from the sense terminal a sense current given at a predetermined shunt ratio to a main current;
a sense resistor having one end connected to the sense terminal, having the other end configured to be connected to a ground, and receiving a current from the sense terminal to generate a sense voltage;
a correction voltage generation circuit which generates a correction voltage;
a voltage dividing circuit including a first resistor which receives the sense voltage at its one end and a second resistor which receives at its one end the correction voltage from the correction voltage generation circuit, and whose other end is connected to the other end of the first resistor, the voltage dividing circuit outputting from the point of connection between the first and second resistors a corrected sense voltage obtained by correcting the sense voltage with the correction voltage;
an overcurrent protection circuit to which the corrected sense voltage is input, and which outputs a halt signal when the corrected sense voltage is higher than a threshold voltage;
a drive circuit which stops driving of the semiconductor switching element upon receiving the halt signal from the overcurrent protection circuit; and
a correction voltage switching element which connects the correction voltage generation circuit and the one end of the second resistor,
wherein the correction voltage switching element is turned on from an off state after a lapse of a predetermined time period from a moment at which the semiconductor switching element is turned on, and with the correction voltage switching element turned on, the correction voltage generation circuit is connected to the one end of the second resistor.

US Pat. No. 10,193,322

LOW-LOSS AND FAST ACTING SOLID-STATE BREAKER

Silicon Power Corporation...

1. A circuit for isolating a load from a source, the circuit comprising:at least one insulated-gate bipolar transistor (IGBT); and
at least one gate turn-off thyristor (GTO) connected in parallel with the insulated-gate bipolar transistor;
wherein when no fault condition exists, the at least one GTO is configured to be ON to couple the load to the source, and
wherein when a fault condition exists:
the at least one IGBT is configured to turn on;
the at least one GTO is configured to turn OFF after the at least one IGBT turns on; and
the at least one IGBT is configured to turn OFF a predetermined amount of time after the at least one GTO turns OFF.

US Pat. No. 10,193,321

FILLER ASSEMBLY FOR CABLE GLAND

1. A filler assembly for filling a cable gland with curable liquid material, the assembly comprising:(a) a dispenser apparatus for a curable liquid material, the apparatus comprising:
a body defining at least one first chamber accommodating a first component of a curable liquid material, and at least one second chamber accommodating a second component of said curable liquid material, wherein mixing of said first and second components initiates curing of said curable liquid material; and
at least one dispenser device adapted to dispense said mixed curable liquid material therefrom between a plurality of said cores of said cable; and
(b) at least one flexible barrier member capable of having at least one respective aperture therethrough configured to be adapted to stretch to engage a plurality of cores of a cable while in use to provide a barrier to passage of said curable liquid material along said cores.

US Pat. No. 10,193,320

INTEGRAL TERMINAL COMPARTMENT WITH DEPLOYABLE TERMINAL BLOCK

Pelco Products, Inc., Ed...

1. A terminal compartment for supporting a terminal block inside an internal space of a utility pole, the utility pole having a hand hole for accessing the internal space, the compartment comprising:a frame mountable in the hand hole of the utility pole and defining an access opening and an enclosure; and
a terminal block support movably mounted in the enclosure of the frame for movement between an operating position and a deployed position, wherein in the operating position a terminal block fixed to the terminal block support is contained entirely inside the internal space of the utility pole, and wherein in the deployed position a terminal block fixed to the terminal block support will extend through the access opening at least partially outside the pole.

US Pat. No. 10,193,319

ASYMMETRIC AEOLIAN VIBRATION DAMPER

Central Michigan Universi...

1. A vibration damper comprising:a clamp assembly to mount the vibration damper to a line;
a first messenger cable extending in a first direction from the clamp assembly and having an end affixed to a first primary weight to dampen vibrations through flexion of the first messenger cable and oscillation of the first primary weight with respect to the clamp assembly;
a second messenger cable extending in a second direction opposite the first direction from the clamp assembly and having an end affixed to a second primary weight to dampen vibrations through flexion of the second messenger cable and oscillation of the second primary weight with respect to the clamp assembly;
a first beam extending from the first primary weight and having an end affixed to a first secondary weight to dampen vibrations through flexion of the first beam and oscillation of the first secondary weight with respect to the first primary weight;
a second beam extending from the first primary weight and having an end affixed to a second secondary weight to dampen vibrations through flexion of the second beam and oscillation of the second secondary weight with respect to the first primary weight;
a third beam extending from the second primary weight and having an end affixed to a third secondary weight to dampen vibrations through flexion of the third beam and oscillation of the third secondary weight with respect to the second primary weight; and
a fourth beam extending from the second primary weight and having an end affixed to a fourth secondary weight to dampen vibrations through flexion of the fourth beam and oscillation of the fourth secondary weight with respect to the second primary weight;
wherein each of the first, second, third, and fourth beams includes a vertically-facing surface having a relatively large surface area and a horizontally-facing surface having a relatively small surface area such that an area moment of inertia of each beam is larger about an axis perpendicular to the vertically-facing surface than about an axis perpendicular to the horizontally-facing surface.

US Pat. No. 10,193,318

EFFICIENT INSTALLATION ELECTRICAL HARDWARE SYSTEM AND METHOD OF USE

1. A wiring device installation system, comprising:a hole cutter having
a handle; and
cutting edges positionable on an exterior surface of a wall, the cutting edges being dimensioned and arranged to cut a hole through the wall upon delivery of an impact force through the handle;
an electrical box assembly securable to a building structure,
wherein the electrical box assembly includes a first plurality of terminals and is dimensioned and arranged for coupling to the building structure before or after delivery of the impact force, and
wherein the hole cutter is operable, prior to or after securing of the electrical box assembly to the building structure, to cut a hole in a wall secured to the building structure; and
at least one of
a bracket insertable through a hole cut by the hole cutter, the bracket being securable to the building structure and adapted to receive and retain the electrical box assembly behind the wall in alignment with the hole cut by the hole cutter to thereby secure the electrical box assembly to the building structure;
an electrical device comprising a second plurality of terminals, wherein the first and second plurality of terminals are electrical terminals configured for complementary mating engagement upon insertion of the electrical device through a hole cut by the hole cutter to thereby establish an electrical connection between the electrical box assembly and the electrical device; and/or
a magnet block dimensioned and arranged for insertion into the electrical box assembly prior to operation of the hole cutter to create a hole aligned therewith, the magnetic block defining a third plurality of terminals configured for complementary mating engagement with the first plurality of terminals to thereby removably hold the magnetic block completely within the electrical box while a magnetic template is used to create a hole pattern.

US Pat. No. 10,193,317

ELECTRICAL SYSTEM AND SWITCHING ASSEMBLY THEREFOR

EATON INTELLIGENT POWER L...

1. A switching assembly comprising: an enclosure member; a backpan coupled to said enclosure member; an electrical switching apparatus coupled to said enclosure member; an electrical receptacle electrically connected to said electrical switching apparatus; and a bussing assembly comprising a number of stabs, said electrical switching apparatus being coupled to at least one of said number of stabs by a plug-on connection-; and a first door member and a second door member each pivotably connected to said enclosure member, said first door member overlaying said electrical switching apparatus in order to provide access thereto, said second door member overlaying said electrical receptacle in order to provide access thereto, said first door member having a first center point structured to open in a first plane, said second door member having a second center point structured to open in a second plane substantially coplanar with the first plane, wherein said enclosure member, said backpan, said electrical switching apparatus, and said electrical receptacle are structured so as to form a self-contained sub-assembly; wherein said backpan comprises a mounting surface disposed in a third plane; wherein said electrical receptacle comprises an interface surface disposed in a fourth plane; and wherein the fourth plane is disposed at an angle of between 30 degrees and 60 degrees with respect to the third plane.

US Pat. No. 10,193,315

CORRUGATED TUBE ASSEMBLY FOR RECEIVING LINES, AND METHOD FOR PRODUCING SUCH A CORRUGATED TUBE ASSEMBLY

1. A corrugated tube assembly for receiving lines, wiring harnesses or the like, comprising an inner and an outer respectively flexible corrugated tube made from plastic with circumferential corrugations and within each case one longitudinal slot, it being possible for the outer corrugated tube to be plugged onto the inner corrugated tube with mutual radial engagement of the corrugations of the two corrugated tubes, a longitudinal bar which is configured on the inner corrugated tube protruding radially into the longitudinal slot of the outer corrugated tube in a plugged-on state and covering said longitudinal slot, which longitudinal bar is provided with corrugations of identical shape and pitch to those on the outer corrugated tube, and an external diameter of which corresponds to that of the corrugations on the outer corrugated tube, characterized in that radial end cross sections of all corrugations are completely closed by way of coverings that are formed integrally with the corrugations on a first and a second side edge of the longitudinal slot of the outer corrugated tube and a third and a fourth side edge of the longitudinal bar on the inner corrugated tube and a fifth and a sixth side edge on longitudinal sides of a remaining cross section of the inner corrugated tube which runs on both sides of said longitudinal bar, the longitudinal bar of the inner corrugated tube is connected on both longitudinal sides to the remaining cross section of the inner corrugated tube in each case via a depression which is V-shaped as seen in a radial cross section and runs radially as far as an internal diameter of the corrugations of the inner corrugated tube, each V-shaped depression being defined between the third and the fifth edge and the fourth and the sixth edge, respectively, and in that, in a plugged-together state of the two corrugated tubes, each side edge of the longitudinal slot of the outer corrugated tube protrudes into each V-shaped depression on a respective facing longitudinal side of the longitudinal bar of the inner corrugated tube.

US Pat. No. 10,193,311

SPARK PLUG

NGK SPARK PLUG CO., LTD.,...

1. A spark plug comprising:an insulator comprising an alumina-based sintered body containing an alumina crystal, wherein
the alumina-based sintered body includes 92 mass % to 96 mass % of Al in terms of an oxide, and at least three elements selected from Group II elements in the periodic table based on IUPAC Recommendations 1990, one of the at least three elements being 1.90 mass % or more of Ba in terms of an oxide,
the alumina-based sintered body includes the following phases in a grain boundary phase present between grains of the alumina crystal;
a first crystal phase containing Si and at least one of the Group II elements, and
a second crystal phase containing Al and at least one of the Group II elements, with the proviso that a crystal phase containing Si and a crystal phase containing Mg as a sole Group II element are excluded from the second crystal phase, and
in an X-ray diffraction of the alumina-based sintered body, the maximum relative intensity of the first crystal phase and the maximum relative intensity of the second crystal phase are both 2 or above relative to the maximum diffraction intensity of the alumina crystal.

US Pat. No. 10,193,310

LOW POWER EDGE-EMITTING LASER DIODE AND LASER DIODE MODULE

EXALOS AG, Schlieren (CH...

1. An edge-emitting ridge laser diode comprising:a semiconductor heterostructure having an active layer sandwiched between an n-type layer and a p-type layer, wherein the active layer is influenced by a ridge structure to form a gain medium of width W; and
a back reflector of reflectivity Rb formed on a first side facet of the semiconductor heterostructure and a front reflector of reflectivity Rf formed on a second side facet of the semiconductor heterostructure, wherein the front and back reflectors are spaced apart to form a cavity of length L containing at least a part of the active layer, which thus forms the gain medium with an internal loss ?i,
wherein the width W: 1 ?m?W?2 ?m;
wherein the cavity length L: 100 ?m?L?600 ?m;
wherein the internal loss ?i: 0 cm?1??i?30 cm?1;
wherein the back reflectivity Rb: 100?Rb?80%; and
wherein the front reflectivity Rf: 100?Rf?60%,
wherein the laser diode, in an output power range of up to 1 mW, has a characteristic slope efficiency of less than 0.5 mW/mA, where slope efficiency is the ratio of output optical power to input electrical current, and an electrical power consumption below 150mW.

US Pat. No. 10,193,307

TENSILE STRAINED SEMICONDUCTOR PHOTON EMISSION AND DETECTION DEVICES AND INTEGRATED PHOTONICS SYSTEM

Acorn Technologies, Inc.,...

1. A method, comprising:patterning and etching a germanium layer to form a germanium fin extending above a substrate region;
forming compressive stressors on side walls of the germanium fin to impart uniaxial tensile strain in the germanium fin in a direction orthogonal to a plane defined by said substrate region, said compressive stressors formed by depositing a conformal blanket layer of compressively stressed silicon nitride over the germanium fin and then etching the deposited silicon nitride from a top region of the germanium fin, thereby exposing a top surface of the germanium fin.

US Pat. No. 10,193,306

ULTRA-LOW NOISE, HIGHLY STABLE SINGLE-MODE OPERATION, HIGH POWER, BRAGG GRATING BASED SEMICONDUCTOR LASER

Morton Photonics Incorpor...

1. A laser comprising:a semiconductor gain chip;
an external cavity; and
a first thermally conductive baseplate;
wherein a first end of the gain chip has a high reflectivity facet forming a first end of a laser cavity; a second end of the gain chip has a low reflectivity facet, allowing light generated from the gain chip to be coupled with a first end of the external cavity; and a second part of the external cavity comprises a Bragg grating forming a second end of the laser cavity;
wherein the external cavity comprising the Bragg grating is supported by the first thermally conductive baseplate;
wherein the optical length of the external cavity is at least an order of magnitude greater than the optical length of the gain chip;
wherein the physical length of the Bragg grating is greater than 20 mm and occupies at least 75% of the physical length of the external cavity; and
wherein the Bragg grating is apodized to control the sidemodes of the grating reflection.

US Pat. No. 10,193,302

LIGHT ENGINE WITH INTEGRATED TURNING MIRROR FOR DIRECT COUPLING TO PHOTONICALLY-ENABLED COMPLEMENTARY METAL-OXIDE SEMICONDUCTOR (CMOS) DIE

Applied Optoelectronics, ...

1. A light engine comprising:an optical bench having a first end extending to a second end along a longitudinal axis;
a laser diode disposed on a mounting surface adjacent the first end of the optical bench and configured to output laser light along a first light path that extends substantially along the longitudinal axis;
at least one channel defined by the optical bench that allows the first light path to extend therethrough, wherein the at least one channel includes a first channel defined by a mesa structure disposed along the light path, the channel extending through the mesa structure to allow the first light path to extend therethrough; and
an integrated mirror device disposed along the light path to receive and direct the laser light along a second light path to optically couple the laser light to a photonically-enabled complementary metal-oxide semiconductor (CMOS) die, the second light path being angled relative to the first light path.

US Pat. No. 10,193,300

COMPACT STORAGE RING EXTREME ULTRAVIOLET FREE ELECTRON LASER

Lyncean Technologies, Inc...

1. A system for producing a high power extreme ultraviolet (EUV) beam, including:a compact electron storage ring configured for emission of free-electron laser (FEL) radiation, wherein a circumference of the compact electron storage ring is less than 60 meters;
an electron injector configured to insert an electron beam into the compact electron storage ring;
a plurality of bending magnets and a plurality of quadrupole magnets interspersed along the compact electron storage ring, wherein at least a corresponding one of the quadrupole magnets is between any two of the bending magnets along the compact electron storage ring;
a magnetic undulator configured to allow the electron beam to pass through the magnetic undulator where the electron beam is induced to microbunch and radiate coherently, wherein the magnetic undulator is a transverse gradient undulator that includes a plurality of transverse gradient undulator components and each of the transverse gradient undulator components includes a periodic structure of mechanically coupled set of magnetic components with alternating poles that create alternating transverse magnetic fields along at least a portion of a length of the transverse gradient undulator to generate at least a portion of the free-electron laser radiation when the electron beam travels along at least the portion of the length of the transverse gradient undulator, and for each of the plurality of transverse gradient undulator components, the included corresponding mechanically coupled set of magnetic components with alternating poles is uniformly tilted in a transverse direction to a path of the electron beam; and
an exit aperture configured to output a portion of the free-electron laser radiation at an extreme ultraviolet wavelength produced by an interaction of the electron beam through the magnetic undulator, wherein the output portion of the free-electron laser radiation is provided to a lithography system as a light source for the lithography system and an average power of the output portion of the free-electron laser radiation is greater than 250 W.

US Pat. No. 10,193,298

HIGH GAIN OPTICALLY PUMPED FAR INFRARED LASER

TAE TECHNOLOGIES, INC., ...

1. A FIR laser comprisesa vacuum chamber,
a beam pump source coupled to the chamber,
a rear mirror with an off center hole,
a waveguide, wherein the rear mirror and waveguide are housed in the chamber,
a pump beam reflector coupled to the chamber opposite the rear mirror, and
an output coupler positioned external to the chamber, wherein the distance between the rear mirror and output coupler define the cavity length of the FIR laser.

US Pat. No. 10,193,297

DISTRIBUTED COUPLED RESONATOR LASER

Wi-Charge Ltd., Rehovot ...

1. A distributed laser comprising:a first retroreflector acting as a back mirror of said distributed laser;
a gain medium, positioned within the field of view of said first retroreflector;
a second retroreflector having a partially reflective surface;
a third retroreflector comprising said partially reflective surface, said third retroreflector being disposed on the opposite side of said partially reflective surface to said first retroreflector and said gain medium; and
a fourth retroreflector,
wherein said retroreflectors are serially disposed, with said fourth retroreflector facing said third retroreflector and remotely located from said third retroreflector.

US Pat. No. 10,193,296

PASSIVELY MODE-LOCKED FIBER RING GENERATOR

IPG PHOTONICS CORPORATION...

1. A fiber pulse generator for emitting a train of pulses each with a desired spectral width, duration and energy, comprising a plurality of fiber chains connected to one another to define a ring cavity which unidirectionally guides a signal therealong, the fiber chains each being configured with:a fiber amplifier operative to increase an intensity of the signal to a desired intensity,
an optical fiber receiving the signal with the desired intensity sufficient to broaden a spectral width of the signal to a desired spectral width at an output of the optical fiber, and
a spectral filter coupled to the output of the optical fiber and having a bandpass, wherein the bandpasses of respective optical filters of the fiber chains are centered on respective frequency components spectrally spaced from one another to allow the signal to sequentially overlap the bandpasses of respective filters,at least one of the fiber chains including an output coupler which is directly coupled to the output of the optical fiber and configured to guide the pulses with the desired spectral width, duration and energy outside the ring cavity.

US Pat. No. 10,193,295

FIBER LASER FIBER PACKAGING AND THERMAL MANAGEMENT

nLIGHT, Inc., Vancouver,...

1. A fiber laser system, comprising:a main body, wherein the main body includes one or more fiber laser system components;
a first wall hingedly attached to the main body along a first edge, the first wall having a first wall open position and a first wall closed position; and
a plurality of feed fiber management and splicing components mounted to the first wall;
wherein the plurality of feed fiber management and splicing components includes a feed fiber splice block removably mounted to an interior surface of the first wall;
wherein the plurality of feed fiber management and splicing components includes a first set of feed fiber guide members and a second set of feed fiber guide members mounted to the interior of the first wall on opposing sides of the feed fiber splice block;
wherein the first and second sets of feed fiber guide members are each mounted in a curved layout corresponding to a feed fiber path on opposing sides of the feed fiber splice block.

US Pat. No. 10,193,294

LIGHT EMITTING DEVICE

NICHIA CORPORATION, Anan...

1. A light emitting device comprising:a base member;
a laser element mounted on or above the base member;
a retaining member having a light reflective inner wall defining a through hole, the retaining member having a first surface on a laser element side and a second surface not on the laser element side;
a fluorescent member fixed to the through hole and disposed on an optical path of laser light emitted by the laser element; and
a first fixing member and a second fixing member clamping the retaining member, the first fixing member having a first contact surface in contact with the first surface of the retaining member, the second fixing member having a second contact surface in contact with the second surface of the retaining member, the first contact surface and the second contact surface being disposed in such a manner that a distance between the first contact surface and the second contact surface becomes smaller as the first contact surface and the second contact surface become farther from the through hole,
wherein the retaining member, the first fixing member and the second fixing member are arranged in such a manner that a space surrounded by the retaining member, the first fixing member, and the second fixing member exists around the retaining member.

US Pat. No. 10,193,291

ROTARY CRIMPING TOOL ASSEMBLY

TE CONNECTIVITY CORPORATI...

1. A rotary crimping tool assembly configured to crimp a portion of a structure, the rotary crimping tool assembly comprising:a tool housing defining a crimping chamber; and
one or more crimp wheels within the crimping chamber, wherein the crimping chamber is configured to receive the portion of the structure in proximity to the one or more crimp wheels, and wherein the one or more crimp wheels are configured to be pressed into and rotated relative to the portion of the structure to form one or more crimps in the portion of the structure;
wherein each of the one or more crimp wheels comprises a conductor crimp member and a sealing crimp member, wherein the conductor crimp member has a different shape than the sealing crimp member, wherein the conductor crimp member includes a smooth, arcuate outer surface having a central equator from which lateral portions recede, wherein the sealing crimp member has a plurality of seal-indenting features, wherein the conductor crimp member has a first height and the sealing crimp member has a second height, wherein the first height exceeds the second height, the conductor crimp member is configured to form a first crimp at a first depth into the portion of structure, and the sealing crimp member is configured to form a second crimp at a second depth into the portion of structure, and wherein the first depth is deeper than the second depth.

US Pat. No. 10,193,290

BATTERY COMPARTMENT AND ELECTRONIC CIGARETTE HAVING SAME

SHENZHEN IVPS TECHNOLOGY ...

1. A battery compartment, comprising a support, a button covering the support, and a switch button accommodated in the support;the support defining a mounting hole and at least one locating hole; the support further defining a first through hole on two lateral surfaces thereof respectively; and the switch button directly facing the mounting hole;
the battery compartment further comprising an elastic element and a revolving shaft; the elastic element having one end abutting against a surface of the button facing the support, and the other end passing through the mounting hole to abutting against the switch button;
the button being provided with at least one connector assembly; the connector assembly defining a second through hole thereon; the connector assembly being configured to be inserted into the locating hole; and the revolving shaft passing through the first through hole and the second through hole.

US Pat. No. 10,193,288

SNAP BUTTON FASTENER PROVIDING ELECTRICAL CONNECTION

INTEL CORPORATION, Santa...

1. A fastener element to provide electrical connection comprising:a mechanical part including either a stud portion or a socket portion; and
a separate electrical connector, wherein the electrical connector is located at least in part within the stud portion or the socket portion of the mechanical part, and wherein a first electrical connector is insulated from the stud portion or the socket portion, the first electrical connector being one of an electrical pin or an electrical receptacle;
wherein the fastener element is operable to be removeably interlocked with a second fastener element, the second fastener element including the other of a stud portion or socket portion, and including the other of an electrical pin or an electrical receptacle and when the fastener element is interlocked with the second fastener element the electrical pin for the stud portion is disposed within the stud portion and connects with the electrical receptacle for the socket portion inside the stud portion; and
wherein the electrical connector of the fastener element is to provide an electrical connection with the second fastener element upon the mechanical part of the fastener element being interlocked with the second fastener element, and wherein the electrical connection is broken upon the first mechanical part of the fastener element being separated from the second fastener element.

US Pat. No. 10,193,285

ELECTRICAL OUTLET HAVING MOVABLE POWER MODULE

EATON INTELLIGENT POWER L...

1. An electrical outlet structured to be electrically connected with a line conductor and a neutral conductor of an AC power source, the electrical outlet comprising:a base;
an electrical apparatus situated on the base;
the electrical apparatus comprising a power module situated on the base;
the power module having a plurality of electrical devices disposed thereon, at least a first electrical device of the plurality of electrical devices being an electrical output device that is structured to output electrical power;
the power module having an exterior surface, the exterior surface comprising a plurality of surface portions, each surface portion of at least some of the plurality of surface portions having at least a portion of at least a first electrical device of the plurality of electrical devices being situated adjacent thereto;
the power module being movable among a plurality of positions with respect to the base;
in each position of at least a plural quantity of the plurality of positions, a surface portion of the plurality of surface portions facing away from the base and the at least first electrical device situated adjacent the surface portion being electrically operable; and
wherein the at least first electrical device comprises at, least one of a Universal Serial Bus (USB) connector and a wireless charging apparatus.

US Pat. No. 10,193,284

DEVICE FOR ESTABLISHING A MULTI-PHASE ELECTRIC CONNECTION AND AN ARRANGEMENT COMPRISING CORRESPONDING DEVICES

SMA Solar Technology AG, ...

1. An apparatus for establishing a multi-phase electrical connection, comprising:at least one connecting element per phase,
wherein each connecting element comprises two busbars and a number (N) of substantially identical, flexible conductors arranged in parallel with one another in a plane, said conductors electrically conductively connecting the two busbars,
wherein a spacing (a) of geometric center points of cross sections of adjacent conductors from one another is at least twice as large as an equivalent diameter (d, dequiv) of one of the conductors,
wherein each busbar respectively comprises a connection region for electrical and mechanical connection of the connecting element to an electrical device and wherein the connecting elements are arranged in parallel with one another and the geometric center points of the cross sections of adjacent conductors of adjacent connecting elements, which are assigned to different phases, have a spacing (b) from one another that is in each case at most half the product of the number (N) of electrical conductors minus 1 multiplied by the spacing (a) of the conductors of a phase from one another.

US Pat. No. 10,193,280

CONNECTOR WITH BI-DIRECTIONAL LATCH

Molex, LLC, Lisle, IL (U...

1. A connector with a bi-directional latching mechanism, comprising:a housing;
a plurality of terminals supported by the housing, the terminals including tail portions and contact portions for contacting opposing terminals of an opposing, mating connector, the terminal contact portions being disposed proximate to a mating end of the housing;
a shroud formed of a conductive material supported by the housing, the shroud enclosing the terminal contact portions and providing a conductive surface for mating with a shield of the opposing, mating connector; and
two latching members supported by the connector housing, each of the latching members including a base that is fixed in place with respect to the housing and a free end extending lengthwise from the base in a cantilevered fashion, the base and the free end being interconnected by an intervening body portion, wherein the latching members each include an actuating tab that extends vertically into contact with an actuation member of the housing such that translation of the actuation member causes the free ends to deflect vertically.

US Pat. No. 10,193,279

EXTENSION CORD, SOCKET AND COVER OF A SOCKET

ROMI SYSTEMS AB OY, Vasa...

1. An extension cord comprising:a lead having a first end and a second end, the first end comprising a socket having a cover and the second end comprising a plug, the cover being attached to the socket by a hinged joint possessing a force which resists opening of the cover, wherein:
the socket includes a front side, a rear side, and a sheath between the front side and the rear side,
the cover includes a first portion that covers the front side of the socket and a second portion that extends over the sheath from the front side toward the rear side, and
the second portion of the cover comprises a retainer, the retainer including a slot and a hole at the bottom of the slot, the slot decreasing in width from an edge of the second portion to the hole.

US Pat. No. 10,193,278

EXCHANGEABLE MODULE FOR A COMPUTER SYSTEM AS WELL AS COMPUTER SYSTEM

FUJITSU LIMITED, Kawasak...

1. Exchangeable module for a computer system, comprising:a module body, which can be secured at a predetermined installation position inside the computer system,
a cable connection leading to the outside from the module body, at the end of which connection is arranged a plug connector, so that the module can be electrically coupled with another component of the computer system, and
a safety device, by means of which the plug connector is mechanically connected to the module body,
wherein the safety device is configured such that when a pulling force is applied to the module body, the cable connection is not subject to the pulling force.

US Pat. No. 10,193,277

PULL-TABS FOR DISENGAGING A CABLE ASSEMBLY FROM A RECEPTACLE

Hewlett Packard Enterpris...

1. A cable assembly comprising:a cable;
a cable connector attached to one end of the cable, wherein the cable connector comprises latching features to couple the cable connector to a receptacle;
a sleeve enclosed around at least a portion the cable;
pull-tabs disposed along a perimeter of a first end of the sleeve, wherein at least one of the pull-tabs is accessible to actuate the latching features when the cable connector is to disengage from the receptacle; and
attachment features to couple the sleeve to the latching features, wherein the sleeve comprises a meshed design that is configured to transfer a pull force from at least one of the pull-tabs, when the at least one of the pull-tabs is pulled, to the attachment features such that the attachment features actuate the latching features.

US Pat. No. 10,193,274

ELECTRONICS MODULE EXTRACTION FEEDBACK SYSTEM

Phoenix Contact Developme...

1. An assembly for attaching and detaching a module to and from a base, the assembly comprising:a base, a module removably attachable to the base, and a feedback system;
the base comprising a rigid wall and the module comprising a housing defining an interior volume of the housing, the housing comprising a rigid outer wall, the housing wall relatively movable against the base wall when attaching and detaching the module to or from the base, the base wall and the housing wall cooperatively guiding said relative movement of the module with respect to the base along a first longitudinal axis;
the feedback system comprising a spring arm and a groove, the spring arm attached to one of the base wall and the housing wall, the groove in the other of the base wall and the housing wall, the spring arm being elastically deflectable from a neutral state of the spring arm, the spring arm comprising a follower at an end of the spring arm, the groove extending along a second longitudinal axis being parallel with the first axis when the base wall and the housing wall are guiding relative movement of the module with respect to the base, the groove being defined by a sidewall extending along the second axis, first and second spaced-apart cams extending into the groove from the sidewall;
the follower being received in the groove when the module wall and the base wall are guiding relative movement of the module with respect to the base, the follower moving in an insertion direction with respect to the groove when attaching the module to the base and moving in an extraction direction with respect to the groove when detaching the module from the base;
the follower successively moving against the first cam and then moving against the second cam when detaching an attached module from the base wherein each cam deflects the spring arm away from the neutral state of the spring arm during detachment of the module from the base;
the follower successively moving against the second cam and then moving against the first cam when attaching a detached module to the base wherein each cam displaces the spring arm away from the neutral state of the spring arm during attachment of the module to the base;
whereby deflection of the spring arm during attachment or detachment of the module generates tactile feedback to the operator of the relative position of the module with respect to the base during attachment or detachment of the module to or from the base.

US Pat. No. 10,193,272

ADAPTER FOR ELECTRICAL CONNECTION BUSHINGS

ORMAZABAL Y CIA, S.L.U., ...

1. An adapter (1) for an electrical connection bushing, with application in a connection point between a piece of high-voltage electrical equipment (2) independent from the adapter (1) and comprising at least one female electrical connection bushing (4), and at least one cable (3) independent from the adapter (1) and comprising a terminal (5),wherein the adapter (1) comprises a body (6) of insulating material, equipped with a first connection end (8) configured to couple in a sealed manner into said at least one female bushing (4) of the high-voltage electrical equipment (2) and with a second connection end (9) configured to couple to the female terminal (5) of the cable (3);
wherein the inside of the first connection end (8) is at least partially coated with a first conductive coating (12), and the outside of the first connection end (8) is at least partially coated with a second conductive coating (13);
wherein the first connection end (8) comprises a connector (14) encapsulated in the body (6) configured to connect to at least one conductive terminal (15) of said female bushing (4) when the first connection end (8) is coupled in a sealed manner into said at least one female electrical connection bushing (4) of the high-voltage electrical equipment (2);
wherein the connector (14) comprises conductive parts (16) and at least one conductive ring (18), the conductive parts (16) being mounted axially in openings (18) provided radially in the ring (18), and an electrical connection between said conductive parts (16) and the conductive terminal (15) is inside the insulating body (6);
wherein the second connection end (9) of the body (6) comprises at least one encapsulated conductive bar (11) that is connected to said conductive parts (16) of the connector (14);
wherein the connector (14) comprises at least one conductive tube (17), said conductive parts (16), which are mounted axially in the openings (18) provided radially in the ring (18); being incorporated inside said at least one conductive tube (17), and connection points of said conductive parts (16) with the conductive terminal (15) and the conductive bar (11), respectively, being located inside said at least one conductive tube (17);
wherein the adapter (1) further comprises at least one means for controlling an electric field (23), the at least one means for controlling the electric field (23) being mounted on said at least one conductive tube (17) and on the ring (18) to control the electric field at a point inside said at least one conductive tube (17) where the first connection end (8) and the second connection end (9) converge.

US Pat. No. 10,193,271

ELECTRICAL CONNECTOR HAVING METALLIC OUTER COVER EQUIPPED WITH TRANSVERSELY LINKED MOUNTING EARS AND SEALING ELEMENT SECURED UPON FRONT END REGION

FOXCONN INTERCONNECT TECH...

1. An electrical connector comprising:an insulative housing having a base portion and a tongue portion;
a plurality of contacts affixed to the insulative housing and exposed to the tongue portion;
an outer cover enclosing the insulative housing, the outer cover having a plurality of peripheral grooves open at a front face thereof; and
a sealing element having a plurality of protrusions secured to the plurality of grooves, wherein said contacts are assembled within the insulative housing to commonly form a contact module enclosed in the outer cover, wherein said outer cover is metallic, wherein said outer cover includes a tubular main portion and a pair of side arms unitarily extending outwardly from the tubular main portion in a transverse direction, wherein each of said side arms including a mounting ear linked to the tubular main portion via a connecting portion in the transverse direction.

US Pat. No. 10,193,270

CARTRIDGE OF GEL FOR A CONNECTION SET AND CONNECTION SETS COMPRISING SUCH A CARTRIDGE OF GEL

IXBLUE, Saint-Germaine-e...

1. A cartridge comprising:an outer case, partially filled with electrically insulating gel; and
at least one electrically conductive track submerged in the insulating gel, the conductive track being formed by an electrically conductive gel.

US Pat. No. 10,193,269

CONNECTOR MAINTENANCE PANEL

Oceaneering International...

1. A method of accomplishing a predetermined set of connector maintenance functions subsea using a connector maintenance panel, the connector maintenance panel comprising a panel and a plurality of fixed connector interfaces disposed through a predetermined portion of the connector maintenance panel, the method comprising:a. deploying the connector maintenance panel subsea;
b. powering the connector maintenance panel from an external source; and
c. performing a predetermined set of connector related functions by:
i. inserting a connector into a first selected connector interface of the plurality of connector interfaces, the first selected connector interface operable to perform a first predetermined connector related function of the predetermined connector related functions in a predetermined sequence;
ii. performing the first predetermined connector related function; and
iii. if further connector related functions are required, inserting the connector into each subsequent selected connector interface of the plurality of connector interfaces, each subsequent selected connector interface operative to perform a subsequent connector related function in the predetermined sequence.

US Pat. No. 10,193,264

OUTLET COVER

Elbee Pty Ltd., Bondi Ju...

1. An electrical outlet cover comprising: a cover plate having an electric outlet-facing side, an outwardly-facing side, and a first engagement member; a plurality of prongs extending from the electric outlet-facing side of the cover plate and insertable into contact holes of an electrical outlet; and a grasping arm disposed on the outwardly-facing side of the cover plate when the grasping arm is in a closed position, and pivotably moveable between the closed position and an open, grasping position, the grasping arm having a second engagement member; wherein in the closed position, the second engagement member engages the first engagement member to prevent pivoting of the grasping arm out of the closed position; the grasping arm is resiliently deformable to a deformed state in which the first engagement member disengages from the second engagement member to allow the grasping arm to pivot to the open position; and the second engagement member is re-engageable with the first engagement member after the grasping arm has been in the open position to prevent pivoting of the grasping arm out of the closed position.

US Pat. No. 10,193,263

CONNECTOR

YAZAKI CORPORATION, Toky...

1. A connector comprising:a housing provided with a terminal chamber;
a terminal including a terminal-connecting portion and a wire-connecting portion, the terminal-connecting portion accommodated in the terminal chamber and configured to connect with an opponent terminal, the wire-connecting portion configured to connect with an end of an electric wire drawn out from the housing to an outside of the housing;
a locking lance flexibly provided in the terminal chamber, the locking lance including a locking portion on a free end side of the locking lance, the locking portion configured to lock the terminal-connecting portion;
a plate portion provided in the terminal-connecting portion, and arranged facing the locking lance;
a hole portion formed in the plate portion, configured to receive the locking portion thereinto;
an engagement surface provided at an edge of the hole portion facing against an insertion direction of the terminal to the terminal chamber, the engagement surface configured to be engaged with the locking portion in a detachment direction of the terminal from the terminal chamber;
a pair of chamfered portions provided at edges of the hole portion on both sides of the engagement surface, the chamfered portions inclined toward an inside of the hole portion; and
a pair of supplemental engagement surfaces provided at parts of the engagement surface where the pair of chamfered portions is located, the supplemental engagement surfaces configured to be engaged with the locking portion in the detachment direction of the terminal from the terminal chamber.

US Pat. No. 10,193,258

TWO PIECE CLEAN BODY FEMALE ELECTRIC TERMINAL

Lear Corporation, Southf...

1. A female electrical terminal comprising:a contact piece including contact arms that extend from a contact base on opposite sides of a terminal axis in an insertion direction to respective arm ends, the contact piece also including at least one contact latch; and
a spring piece including spring arms that extend from a spring base on opposite sides of the terminal axis and bias the contact arms toward the terminal axis, the spring piece also including at least one engagement tab that extends from the spring base and includes a spring latch that is engaged with the contact latch to prevent movement of the spring piece relative to the contact piece in the insertion direction, wherein either:
(1) the engagement tab is cantilevered from the spring base; or
(2) the contact latch extends from the contact base away from the terminal axis, and the spring latch is an opening in the engagement tab.

US Pat. No. 10,193,257

CONNECTION TERMINAL

YAZAKI CORPORATION, Toky...

1. A connection terminal comprising:a terminal main body that is made of a conductive material and has a female connector provided with a columnar internal space into which a male connector of a counter male terminal is inserted and a wire connector to which a conducting part of a wire is electrically connected; and
a contact member that is made of a conductive material, is accommodated into the internal space along a part in a circumferential direction of an inner circumferential face of the female connector and is electrically connected to the female connector, and is electrically connected to the male connector inserted into the internal space from an opening serving as a male terminal insertion port of the female connector,
wherein the contact member is formed along the part in the circumferential direction of the inner circumferential face of the female connector and includes at least one first locked part and at least one second locked part adjacent to each other and being extended at an edge of the contact member, and
the female connector includes a first locking part that is arranged at an edge thereof and on a side of the female connector in an insertion direction of the male connector into the internal space relative and adjacent to the first locked part of the contact member after completion of being accommodated into the internal space and that locks movement of the first locked part to the side in the insertion direction in order to maintain an accommodated state of the contact member in the internal space, and a second locking part that is arranged at an edge and on a side of the female connector in a removal direction of the male connector opposite to the insertion direction relative and adjacent to the second locked part of the contact member after the completion of being accommodated and that locks movement of the second locked part to the side in the removal direction in order to maintain the accommodated state of the contact member in the internal space.

US Pat. No. 10,193,255

PLUG CONNECTOR AND CONNECTOR SET

PANASONIC INTELLECTUAL PR...

1. A plug connector to be fitted in an opening of a receptacle connector,the plug connector comprising:
a plug housing having a lower exterior surface; and
a plurality of plug terminals stored in the plug housing,
the receptacle connector having a receptacle terminal,
the plug connector being connected to a cable having a sheet shape and including a cable terminal, so that electrical connection is established between the receptacle terminal and the cable terminal, wherein
each of the plug terminals has a contact section and a connection section, the connection section extending toward the lower exterior surface of the plug housing,
the contact section is contactable with the receptacle terminal,
the connection section is connectable to the cable terminal,
the connection section is disposed such that the connection section is exposed from the plug housing in a state in which the plug connector is fitted in the receptacle connector,
the plug housing has a recessed section provided on the lower exterior surface of the plug housing,
the recessed section is configured to store a coupling region of the cable on which the cable terminal is formed, and
when the plug connector is inserted into the opening of the receptacle connector, the coupling region of the cable is sandwiched between the recessed section of the plug connector and an inner surface of the receptacle connector defining the opening.

US Pat. No. 10,193,254

CONNECTOR ASSEMBLY AND CONNECTOR

Tyco Electronics Japan G....

1. A connector assembly comprising:a first connector having a housing, and a plurality of separate lock springs, wherein each lock spring is formed of a single wire of material with a circular cross section and has a pair of arms extending parallel to a planar side of the housing with one of the lock springs arranged at one end portion of the housing and another of the lock springs arranged at another end portion of the housing, and
a plurality of reinforcement fittings, each reinforcement fitting covering one of the lock springs and including a cutout to expose a portion of the arms; and
a second connector having a catch to engage the lock spring by flexing the pair of arms toward each other.

US Pat. No. 10,193,251

NEXT GENERATION FORM FACTOR (NGFF) CARRIER

Hewlett Packard Enterpris...

1. A Next Generation Form Factor (NGFF) carrier comprising:a frame comprising a flat component perpendicularly connected to two flat side components that each comprise a higher portion raised higher than a lower portion in relation to the flat component, the frame being to receive an NGFF module between the two flat side components;
the bar rotatably connected to the higher portions of the two flat side components such that the bar is rotatable between a first position in which it is located on a first side of the higher portions and a second position in which it is located on a second side of the higher portions, wherein the NGFF module is insertable in the frame when the bar is rotated to the first position and wherein the bar rests against the lower portions of the two flat side components in the first position and the second position; and
a number of holes along an interior of the flat component to receive a fastener that is to secure the NGFF module in the frame.

US Pat. No. 10,193,229

MAGNETIC COILS HAVING CORES WITH HIGH MAGNETIC PERMEABILITY

CPG Technologies, LLC, I...

1. A system, comprising:a guided surface waveguide probe configured to generate an electromagnetic field when excited by an excitation source, wherein the electromagnetic field synthesizes a wave front incident at a complex Brewster angle of incidence (?i,B) of a terrestrial medium to generate a guided surface wave that travels across the terrestrial medium;
a guided surface wave receive structure configured to obtain electrical energy from the guided surface wave, wherein the guided surface wave receive structure comprises a magnetic coil and a core disposed in the magnetic coil, wherein the core has a relative magnetic permeability greater than about 10 and less than about 1,000,000; and
an electrical load coupled to the guided surface wave receive structure, the electrical load being experienced as a load at the excitation source coupled to the guided surface waveguide probe.

US Pat. No. 10,193,227

WAVEGUIDE TRANSITION STRUCTURE FOR RECEIVING SATELLITE SIGNALS

MICROELECTRONICS TECHNOLO...

1. A low noise block down-converter with a waveguide transition structure for receiving satellite signals, comprising:a feed horn structure having at least a first waveguide extending along a first direction;
a housing having at least a second waveguide extending along a second direction and communicating with the first waveguide, wherein the second direction is substantially not in parallel to the first direction; and
a circuit board positioned within the housing, wherein the circuit board has a receiving pin configure to receive microwave signals propagating in the second waveguide;
wherein the housing comprises a first transforming structure configured to guide the microwave signals from the first waveguide to the second waveguide;
wherein the first transforming structure has a first portion in the feed horn structure and a second portion in the depression.

US Pat. No. 10,193,225

BEAM FORMING NETWORK FOR FEEDING SHORT WALL SLOTTED WAVEGUIDE ARRAYS

Waymo LLC, Mountain View...

1. A radar system comprising:a set of radiating waveguides located in a waveguide layer, each having a radiating waveguide input, wherein each radiating waveguide has a height and a width that are equal to that of each other radiating waveguide, wherein the set of radiating waveguides are aligned on a plane defined by a center of the width of at least one of the set of radiating waveguides and a length of the at least one of the set of radiating waveguides, and wherein each radiating waveguide is coupled to at least one radiating element located in a radiating layer; and
a beamforming network located in the waveguide layer, wherein the beamforming network comprises:
a beamforming network input;
a set of beamforming network outputs, wherein each beamforming network output is coupled to one of the radiating waveguide input; and
a cascaded set of dividers configured to split electromagnetic energy from the beamforming network input:
a first level of the cascaded set of dividers configured to split the electromagnetic energy from the beamforming network input into first-level beamforming waveguides;
a second level of the cascaded set of dividers configured to split the electromagnetic energy from each of first-level beamforming waveguides into respective second-level beamforming waveguides for each respective first-level beamforming waveguide, wherein one of the respective second-level beamforming waveguides for each respective first-level beamforming waveguide is coupled to one of the beamforming network outputs; and
a third level of the cascaded set of dividers configured to split the electromagnetic energy from one of the respective second-level beamforming waveguides for each respective first-level beamforming waveguide into respective third-level beamforming waveguides for each respective second-level beamforming waveguides, wherein each third-level beamforming waveguide is coupled to a respective one of the beamforming network outputs.

US Pat. No. 10,193,221

REFLECTOR ANTENNA AND REFLECTOR ANTENNA FEED

Huawei Technologies Co., ...

1. A reflector antenna feed comprising:a transmit antenna array, wherein the transmit antenna array comprises a plurality of transmit antenna units including a first transmit antenna unit;
a receive antenna array, wherein the receive antenna array comprises a plurality of receive antenna units including a first receive antenna unit, wherein the first receive antenna unit is adjacent to the first transmit antenna unit, and wherein a phase center of the transmit antenna array coincides with a phase center of the receive antenna array; and
a first coupling unit disposed between the first transmit antenna unit and the first receive antenna unit, wherein the first coupling unit is configured to reduce interference caused by the transmit antenna array to the receive antenna array,
wherein the first transmit antenna unit is a square waveguide, a circular waveguide, a rectangular waveguide, or a horn antenna based on a square waveguide, a circular waveguide, or a rectangular waveguide,
wherein the first receive antenna unit is a square waveguide, a circular waveguide, a rectangular waveguide, or a horn antenna based on a square waveguide, a circular waveguide, or a rectangular waveguide; and
wherein a hole having a metal inner wall is disposed on an adjacent surface between the first transmit antenna unit and the first receive antenna unit, wherein an inner conductor is disposed in a center of the hole having the metal inner wall, wherein a dielectric is disposed between the inner conductor and the hole having a metal inner wall, wherein the inner conductor separately extends into the first transmit antenna unit and the first receive antenna unit,
wherein the hole having the metal inner wall, the inner conductor, and the dielectric form the first coupling unit, and
wherein the hole is configured to couple a signal transmitted by the first transmit antenna unit into the first receive antenna unit.

US Pat. No. 10,193,220

ANTENNA ARRAY

Electronics and Telecommu...

1. An antenna array, comprising:a first antenna;
a second antenna; and
a dielectric substance, of which a height is determined based on a distance between the first and second antennas and beam widths of main lobes of the first and second antennas,
wherein when the distance between the first and second antennas is smaller than two times the beam widths of the main lobes of the first and second antennas, the height of the dielectric substance is determined by lengths from distal ends of the first and second antennas to a point defining the beam width.

US Pat. No. 10,193,217

ANATOMICALLY COMPLIANT ANTENNA FOR IMPLANTABLE MEDICAL DEVICE

NeuroPace, Inc., Mountai...

1. An implantable medical device configured to be implanted in a patient, comprising:a housing configured for placement in a hole formed in a cranium of the patient; and
an antenna positioned relative to the housing such that: 1) a side edge of the antenna is adjacent to and extends substantially parallel to and along an edge of the housing, and 2) upon placement of the housing in the hole, the antenna is positioned outside of the hole, adjacent a surface of the cranium,
wherein the antenna is configured so that at implant of the implantable medical device in the patient, the antenna is capable of being bent to conform to an anatomical contour of the patient and, upon being bent, is capable of retaining a bent shape.

US Pat. No. 10,193,205

DIELECTRIC RESONATOR, DIELECTRIC FILTER USING DIELECTRIC RESONATOR, TRANSCEIVER, AND BASE STATION

HUAWEI TECHNOLOGIES CO., ...

1. A dielectric resonator, comprising:a body made of a solid-state dielectric material, wherein an indentation is disposed at a first surface of the body opposite a second surface of the body, wherein the indentation is associated with a resonant frequency of the dielectric resonator, and wherein the body has one or more joint faces disposed between the first surface and the second surface, wherein a portion of a joint face of the one or more joint faces forms a portion of a spacing, wherein the spacing is a curved indentation in a side of the body extending from the first surface to the second surface; and
a conducting layer covering the first surface of the body and extending contiguously to cover a portion of a surface of the indentation and the one or more joint faces, wherein a coverage area, by the conducting layer, of the surface of the indentation is associated with the resonant frequency of the dielectric resonator.

US Pat. No. 10,193,198

CELL MANAGEMENT DEVICE AND POWER SUPPLY DEVICE

PANASONIC INTELLECTUAL PR...

1. A battery management device comprising:an SOC estimation unit for estimating a State of Charge (SOC) of a lithium ion secondary battery;
a storage unit for retaining reference data for determining whether lithium is deposited in the lithium ion secondary battery; and
a lithium deposition determination unit for comparing a differential coefficient of a battery voltage with respect to an estimated SOC by the SOC estimation unit, with a differential coefficient of a battery voltage with respect to a reference SOC read from the storage unit, and for determining that lithium is deposited in the lithium ion secondary battery when a difference is observed between the differential coefficients.

US Pat. No. 10,193,194

BATTERY ASSEMBLY CONTROLLER WHICH MONITORS VOLTAGES OF SECONDARY BATTERIES

PANASONIC INTELLECTUAL PR...

1. A battery assembly controller controlling terminal voltages of a plurality of series-connected secondary batteries to be equal, the controller comprising:a discharge circuit selectively reducing the terminal voltages of the secondary batteries; and
a monitoring circuit directly connected to positive and negative electrodes of the secondary batteries to monitor the terminal voltages of the secondary batteries, wherein
the discharge circuit includes:
a plurality of switches, each being connected to positive and negative electrodes of associated one of the secondary batteries, and
a control circuit controlling not to turn on odd-numbered and even-numbered switches simultaneously, where the switches are sequentially numbered as 1, 2, 3, . . . , from a high-potential side,
each of the switches is a MOS transistor, and
the discharge circuit further includes:
a plurality of resistors, each being connected between a gate and a source of one of the MOS transistors,
a plurality of current supplies, and
a plurality of other switches, each being connected between the gate of one of the MOS transistors and associated one of the current supplies.

US Pat. No. 10,193,154

CATHODE COMPOSITION FOR PRIMARY BATTERY

Medtronic, Inc., Minneap...

1. A primary battery configured to supply operation power to an implantable medical device, the primary battery comprising:a cathode comprising an active material and at least one of a metal oxide or a metal fluoride, wherein the active material exhibits a first discharge capacity and the at least one of the metal oxide or the metal fluoride exhibits a second discharge capacity at a voltage lower than the first discharge capacity;
a current collector, wherein the cathode comprises a cathode layer on the current collector, wherein the cathode layer is formed of a mixture of the active material and the at least one of the metal oxide or the metal fluoride;
an anode comprising a metal as an electron source; and
an electrolyte between the cathode and anode, wherein the metal reacts with the electrolyte below a third discharge capacity at a voltage lower than the second discharge capacity to form a gas,
wherein the metal reacts with the active material at the first discharge capacity to consume the active material, and, following the consumption of the active material of the cathode, the metal reacts with the at least one of the metal oxide or the metal fluoride of the cathode prior to reacting with the electrolyte below the third discharge capacity, and
wherein the cathode includes an amount of the active material and the at least one of the metal oxide or the metal fluoride, and the anode includes an amount of metal such that an excess portion of the metal and an amount of the at least one of the metal oxide or the metal fluoride remains following the consumption of the active material, and wherein the amount of the at least one of the metal oxide or the metal fluoride is proportioned to consume all of the excess portion of the metal.

US Pat. No. 10,193,152

CATHODE ACTIVE MATERIAL PARTICLES, LITHIUM ION BATTERY PREPARED BY USING THE CATHODE ACTIVE MATERIAL PARTICLES, AND METHOD OF PREPARING THE CATHODE ACTIVE MATERIAL PARTICLES

SAMSUNG ELECTRONICS CO., ...

1. A lithium ion secondary battery comprising:a cathode comprising a plurality of cathode active material particles;
an electrolyte; and
an anode,
wherein a cathode active material particle of the plurality of cathode active material particles has a plate-shaped crystal structure having an aspect ratio of 2 to 1000,
wherein a major surface in at least one direction of the plate-shaped crystal structure is a 111 face,
wherein the cathode active material particle also has a spinel-type crystal structure, and
wherein the cathode active material particle has a composition represented by the formula LiCo2-xNixO4, wherein 0

US Pat. No. 10,193,146

METHODS FOR MANUFACTURING GRAPHENE BASED MATERIAL

Graduate School at Shenzh...

1. A method for manufacturing graphene based material comprising:providing a graphene oxide dispersion comprising graphene oxide dispersed in solvent;
directly introducing a hydrogen sulfide gas to the graphene oxide dispersion at a redox reacting temperature to create a graphene dispersion, the graphene dispersion created by a redox reaction between the graphene oxide and the hydrogen sulfide gas, wherein the hydrogen sulfide reduces the graphene oxide into graphene, and elemental sulfur produced from the hydrogen sulfide is deposited on surfaces of the graphene;
solvothermal reacting the graphene dispersion to achieve a graphene-based gel comprising a three dimensional porous graphene macrostructure and elemental sulfur deposited on surfaces and pores of the three dimensional porous graphene macrostructure, with the three dimensional porous graphene macrostructure being a free-standing structure; and
removing the solvent to achieve the graphene based material.

US Pat. No. 10,193,116

CERAMIC COATING ON BATTERY SEPARATORS

Applied Materials, Inc., ...

1. A method, comprising:preparing a separator for an electrochemical storage device; and
using a controlled process to coat the separator with a ceramic layer having a desired thickness, wherein the controlled process comprises:
coating the separator with a first layer of ceramic particles having a first charge;
coating the first layer with a second layer of ceramic particles having a second charge opposite the first charge;
repeating the coating steps until a ceramic coating having the desired thickness is obtained.

US Pat. No. 10,193,114

ELECTRICITY STORAGE DEVICE

TOYOTA JIDOSHA KABUSHIKI ...

1. An electricity storage device comprising:a plurality of batteries juxtaposed in a first direction to form a battery stack, each battery having a gas discharge valve on a first side, the gas discharge valve being configured to discharge a gas produced inside the battery, the first side being one side of a second direction, and the second direction being orthogonal to the first direction; and
a cooling path placed between the plurality of batteries that face each other in the first direction, a coolant that cools the batteries flowing through the cooling path, and the cooling path having:
an intake opening configured to take in the coolant to the cooling path, the intake opening being provided on a second side that is an opposite side to the first side;
a discharge opening configured to discharge the coolant, the discharge opening being provided on at least one of a third side or a fourth side, the third side and the fourth side being both sides of a third direction, the third direction being orthogonal to the second direction and to the first direction; and
a smoke discharge path provided on the first side of the plurality of batteries, the smoke discharge path configured to discharge the gas discharged from the gas discharge valve to an outside of the battery stack in the first direction without flowing in the cooling path,
wherein the cooling path is partitioned from the smoke discharge path to prevent communication between the cooling path and the smoke discharge path, wherein
the discharge opening is provided on each of the third side and the fourth side,
the cooling path has a T shape in a section orthogonal to the first direction, and
the cooling path includes:
a first path portion that extends from the intake opening toward the first side and then extends toward the third side; and
a second path portion that extends from the intake opening toward the first side and then extends toward the fourth side.

US Pat. No. 10,193,113

VENT ADAPTER FOR LEAD-ACID BATTERY SYSTEMS

Johnson Controls Techolog...

1. A lead-acid battery system comprising a lead acid battery, and a vent adapter coupled to a vent port of the lead-acid battery, wherein the vent adapter comprises:a first side comprising a first connector having a first cross-sectional geometry along the first side and mated via a first interference fit with the vent port of the lead-acid battery, wherein the vent port is configured to vent gases evolved from the lead-acid battery; and
a second side in fluid communication with the first side and comprising a second connector having a second cross-sectional geometry along the second side configured to mate with a vent passage of an automobile, wherein the first and second cross-sectional geometries have respective shapes that are different from one another.

US Pat. No. 10,193,112

MODULAR ENERGY STORAGE COMPONENT ENCLOSURE

Lockheed Martin Energy, L...

17. An energy storage component (ESC) enclosure comprising:a plurality of ESC modules, each ESC module including at least one side portion having a plurality of side fastening mechanisms configured to be coupled to an adjacent ESC module, wherein the plurality of ESC modules are coupled together via the plurality of side fastening mechanisms to form an ESC enclosure;
a plurality of shelving kits, each shelving kit mounted to one of the ESC modules;
a roof coupled to the plurality of ESC modules; and
a plurality of panels coupled to the plurality of ESC modules about a perimeter of the ESC enclosure to form a shared air space within the ESC enclosure.

US Pat. No. 10,193,111

CONVERTIBLE BATTERY PACK

1. A battery pack comprising:a support board having a planar surface;
a plurality of contact pads arranged in a predefined configuration in the support board, each of the plurality of contact pads having an exposed planar surface generally parallel to the support board planar surface; and
a converter element including a housing having a first side facing the support board planar surface, at least one contact held in the housing, the at least one contact having a mating surface and extending towards the support board planar surface, and at least one spring held in the housing positioned between the housing and the at least one contact forcing the at least one contact towards the planar surface and the plurality of contact pads.

US Pat. No. 10,193,110

ELECTROCHEMICAL DEVICE, SUCH AS A MICROBATTERY OR AN ELECTROCHROMIC SYSTEM, COVERED BY AN ENCAPSULATION LAYER COMPRISING A BARRIER FILM AND AN ADHESIVE FILM, AND METHOD FOR FABRICATING ONE SUCH DEVICE

1. An electrochemical device comprising(1) a substrate,
(2) at least one stack of active layers containing lithium, said stack comprising
(2a) at least a first electrode connected to a first current collector and
(2b) at least a second electrode connected to a second current collector,
said stack being arranged on the substrate
(3) an encapsulation layer covering said at least one stack, the encapsulation layer comprising at least:
(3a) a barrier film presenting at least one electrically insulating surface and comprising at least one layer hermetic to oxidising species,
(3b) an adhesive film, provided with a first surface and a second surface,
the first surface being in contact with the electrically insulating surface of the barrier film and
the second surface covering a stack of active layers and a part of the substrate,
wherein the adhesive film comprises a juxtaposition of electrically conducting adhesive strips and of electrically insulating adhesive strips,
wherein two electrically conducting strips are separated by an electrically insulating strip to be electrically insulated from one another,
each electrically conducting strip being connected to the first current collector or to the second current collector of the stack of active layers.

US Pat. No. 10,193,108

SECONDARY BATTERY, ELECTRONIC DEVICE, AND VEHICLE

Semiconductor Energy Labo...

1. A secondary battery comprising:a film comprising flat portions and curved portions,
wherein the flat portions and the curved portions are alternately provided each other,
wherein a thickness of a top portion of each of the curved portions is thicker than a thickness of the flat portions.

US Pat. No. 10,193,092

SYSTEMS AND METHODS FOR SCALABLE PEROVSKITE DEVICE FABRICATION

NUtech Ventures, Lincoln...

19. A process for fabricating a perovskite device, comprising:receiving a substrate; and
linearly depositing a perovskite solution onto the substrate to form a perovskite film, wherein the perovskite solution includes a lead halide and at least one of a methylammonium halide or a formamidinium halide dissolved in dimethylformamide (DMF) or Methyl sulfoxide (DMSO).

US Pat. No. 10,193,090

METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE

Taiwan Semiconductor Manu...

1. A method of forming a gate structure for a gate-all-around field effect transistor, the method comprising:disposing a carbon nanotube (CNT) over a substrate;
forming anchor structures on both ends of the CNT disposed over the substrate;
after the anchor structures are formed, recessing a part of the substrate under the CNT;
after the recessing, forming a gate dielectric layer wrapping around the CNT and forming a gate electrode layer over the gate dielectric layer; and
removing the CNT with the gate dielectric layer and the gate electrode layer from the substrate, thereby forming the gate structure.

US Pat. No. 10,193,089

DISPLAY DEVICE, ARRAY SUBSTRATE, AND MANUFACTURING METHOD

Shenzhen China Star Optoe...

1. An array substrate, comprising a substrate base, and two gates, a source, a drain, an active layer, and a pixel electrode on the substrate base, wherein the drain and the pixel electrode are connected together; the source and the drain contact the active layer, respectively; and the two gates control the conduction and cut off of the active layer, which in turn controls the conduction and cut off between the source and the drain;wherein the source, the two gates, the active layer, the drain, and the pixel electrode are sequentially stacked on the substrate base; and the drain and the pixel electrode are at a same level;
wherein the array substrate further comprises a buffer layer on the substrate base, wherein a buffer via is configured in the buffer layer, exposing the substrate base; the source is disposed in the buffer via; and the source has a top surface level with that of the buffer layer;
wherein the array substrate further comprises a passivation layer on the buffer layer and the source, wherein a passivation via is configured in the passivation layer, exposing the source; the two gates are disposed on the passivation layer oppositely across the passivation via; a gate metal, formed when the gates are formed, is disposed in the passivation via, contacting the source; and the gate metal has a top surface level with that of the passivation layer.

US Pat. No. 10,193,088

PEROVSKITE NANOCRYSTALLINE PARTICLES AND OPTOELECTRONIC DEVICE USING SAME

POSTECH ACADEMY-INDUSTRY ...

1. A perovskite nanocrystal particle capable of being dispersible in an organic solvent and comprising a perovskite nanocrystal structure,wherein the perovskite nanocrystal particle is an organic-inorganic-hybrid perovskite or an inorganic metal halide perovskite, and
the perovskite nanocrystal particle has a diameter greater than a Bohr exciton diameter on an area that is not affected by a quantum confinement effect.

US Pat. No. 10,193,087

PEROVSKITE AND OTHER SOLAR CELL MATERIALS

HEE Solar, L.L.C., Dalla...

1. A photovoltaic device comprising:a first electrode;
a second electrode;
an active layer disposed at least partially between the first and second electrodes, the active layer comprising:
photoactive material comprising a perovskite material;
a first interfacial layer comprising NiO; and
a second interfacial layer comprising carbon nanotubes.

US Pat. No. 10,193,086

LIGHT-EMITTING ELEMENT, COMPOUND, ORGANIC COMPOUND, DISPLAY MODULE, LIGHTING MODULE, LIGHT-EMITTING DEVICE, DISPLAY DEVICE, LIGHTING DEVICE, AND ELECTRONIC DEVICE

Semiconductor Energy Labo...

5. A method for synthesizing a compound, the method including:conducting a reaction according to the following scheme:

wherein X represents one of a halogen and a boronic acid,
wherein R1 to R5 separately represent any one of hydrogen, an alkyl group having 1 to 6 carbon atoms, a substituted or unsubstituted monocyclic saturated hydrocarbon having 5 to 7 carbon atoms, a substituted or unsubstituted polycyclic saturated hydrocarbon having 7 to 10 carbon atoms, and a substituted or unsubstituted aryl group having 6 to 13 carbon atoms,
wherein B represents the other of the halogen and the boronic acid, and
wherein A1 represents a group comprising at least one of a phenyl group, a fluorenyl group, a phenanthryl group, a triphenylenyl group, a dibenzothiophenyl group, a dibenzofuranyl group, a carbazolyl group, a benzimidazolyl group, a benzoxazolyl group, a benzthiazolyl group, and a triphenyl amine skeleton which are substituted or unsubstituted.

US Pat. No. 10,193,084

2,2?-BIBENZO[D]IMIDAZOLIDENE COMPOUND HAVING HETEROMONOCYCLIC GROUPS AT THE 1-, 1?-, 3- AND 3?- POSITIONS, AND ORGANIC LIGHT-EMITTING ELEMENT AND DISPLAY DEVICE CONTAINING THE SAME

Canon Kabushiki Kaisha, ...

1. A 2,2?-bibenzo[d]imidazolidene compound expressed by the following general formula (1):
wherein Ar1 to Ar4 each represent a substituted or unsubstituted heteromonocyclic group; R1 to R8 each represent a hydrogen atom or a substituent selected from the group consisting of halogen atoms, alkyl groups having a carbon number in the range of 1 to 8, and substituted or unsubstituted aromatic hydrocarbon groups.

US Pat. No. 10,193,083

SPIRALLY CONFIGURED CIS-STILBENE/FLUORENE HYBRID COMPOUNDS AND ORGANIC LIGHT EMITTING DEVICE COMPRISING THE SAME

NICHEM FINE TECHNOLOGY CO...

1. A compound is represented by general formula I:
wherein A is carbon atom or silicon atom;
wherein R2 is independently a triazine group, pyrimidine group or phenyl group;
when R2 is a triazine group, R2 is selected from the group consisting of general formula II-1-1, general formula II-1-5 to general formula II-1-19;

when R2 is a pyrimidine group, R2 is selected from the group consisting of general formula II-2-1, general formula II-2-3 to formula II-2-10;

when R2 is phenyl group, R2 is selected from the group consisting of general formula II-3-2 to general formula II-3-4;

wherein R3 is independently a methyl group, phenyl group, tert-butyl group or two of R3 are linked by a single bond represented by general formula I-2, and

wherein R1 is a hydrogen atom, tert-butyl group or naphthyl group.

US Pat. No. 10,193,081

ORGANIC COMPOUND FOR OPTOELECTRIC DEVICE AND COMPOSITION FOR OPTOELECTRIC DEVICE AND ORGANIC OPTOELECTRIC DEVICE AND DISPLAY DEVICE

Samsung SDI Co., Ltd., Y...

1. A compound for an organic optoelectric device, the compound represented by a combination of Chemical Formula I-1 and Chemical Formula I-2 linked together:
wherein, in Chemical Formulae I-1 and I-2,
Y1 to Y8 are independently C or CRa,
W1 is N or NRb,
one of Y1 to Y8 and W1 of Chemical Formula I-2 is linked to L1 of Chemical Formula I-1,
R1 to R12, Ra and Rb are each independently hydrogen, deuterium, a substituted or unsubstituted C1 to C30 alkyl group, a substituted or unsubstituted C6 to C30 aryl group, or a combination thereof,
L1 is a single bond, a substituted or unsubstituted C6 to C30 arylene group, or a combination thereof, and
n1 is an integer of 1 to 3,
wherein “substituted” refers to that at least one hydrogen is replaced by deuterium, a halogen, a hydroxyl group, an amino group, a C1 to C30 amine group, a nitro group, a C1 to C40 silyl group, a C1 to C30 alkyl group, a C1 to C10 alkylsilyl group, a C6 to C30 arylsilyl group, a C3 to C30 cycloalkyl group, a C2 to C30 heterocycloalkyl group, a C6 to C30 aryl group, a C1 to C20 alkoxy group, a fluoro group, a C1 to C10 trifluoroalkyl group, or a cyano group.

US Pat. No. 10,193,078

ORGANIC LIGHT-EMITTING DEVICE

Samsung Display Co., Ltd....

1. An organic light-emitting device, comprising:a first electrode;
a second electrode; and
an organic layer between the first electrode and the second electrode,
wherein the organic layer includes at least one first material and at least one second material, the first material being represented by Formula 1 and the second material being represented by Formula 2,

wherein, in Formulae 1 and 2,
L11 is selected from a substituted or unsubstituted C6-C60 arylene group, a substituted or unsubstituted C1-C60 heteroarylene group, a substituted or unsubstituted divalent non-aromatic condensed polycyclic group, and a substituted or unsubstituted divalent non-aromatic condensed heteropolycyclic group;
L21 and L22 are each independently selected from a methylene group, an ethylene group, a propylene group, a butylene group, a phenylene group, a naphthylene group, a phenanthrenylene group, an anthracenylene group, a triphenylenylene group, a pyrenylene group, a chrysenylene group, a pyrrolylene group, a thiophenylene group, a furanylene group, an imidazolylene group, an indolylene group, a quinolinylene group, an isoquinolinylene group, a benzoquinolinylene group, a phenanthridinylene group, an acridinylene group, a phenanthrolinylene group, a benzofuranylene group, a benzothiophenylene group, a triazolylene group, a tetrazolylene group, a dibenzofuranylene group, and a dibenzothiophenylene group; and
a methylene group, an ethylene group, a propylene group, a butylene group, a phenylene group, a naphthylene group, a phenanthrenylene group, an anthracenylene group, a triphenylenylene group, a pyrenylene group, a chrysenylene group, a pyrrolylene group, a thiophenylene group, a furanylene group, an imidazolylene group, an indolylene group, a quinolinylene group, an isoquinolinylene group, a benzoquinolinylene group, a phenanthridinylene group, an acridinylene group, a phenanthrolinylene group, a benzofuranylene group, a benzothiophenylene group, a triazolylene group, tetrazolylene group, a dibenzofuranylene group, and a dibenzothiophenylene group, each substituted with at least one selected from deuterium, —F, —Cl, —Br, —I, a hydroxyl group, a cyano group, a nitro group, an amino group, an amidino group, a hydrazine group, a hydrazone group, a carboxylic acid or a salt thereof, a sulfonic acid or a salt thereof, a phosphoric acid or a salt thereof, a C1-C20 alkyl group, a C1-C20 alkoxy group, a cyclopentyl group, a cyclohexyl group, a cycloheptyl group, a cyclopentenyl group, a cyclohexenyl group, a phenyl group, a pentalenyl group, an indenyl group, a naphthyl group, an azulenyl group, a heptalenyl group, an indacenyl group, acenaphthyl group, a fluorenyl group, a spiro-fluorenyl group, a benzofluorenyl group, a dibenzofluorenyl group, a phenalenyl group, a phenanthrenyl group, an anthracenyl group, a fluoranthenyl group, a triphenylenyl group, a pyrenyl group, a chrysenyl group, a naphthacenyl group, a picenyl group, a perylenyl group, pentaphenyl group, a hexacenyl group, a pentacenyl group, a rubicenyl group, a coronenyl group, an ovalenyl group, a pyrrolyl group, a thiophenyl group, a furanyl group, an imidazolyl group, a pyrazolyl group, a thiazolyl group, an isothiazolyl group, an oxazolyl group, an isooxazolyl group, a pyridinyl group, a pyrazinyl group, a pyrimidinyl group, a pyridazinyl group, an isoindolyl group, an indolyl group, an indazolyl group, a purinyl group, a quinolinyl group, an isoquinolinyl group, a benzoquinolinyl group, a phthalazinyl group, a naphthyridinyl group, a quinoxalinyl group, a quinazolinyl group, a cinnolinyl group, a carbazolyl group, a phenanthridinyl group, an acridinyl group, a phenanthrolinyl group, a phenazinyl group, a benzoimidazolyl group, a benzofuranyl group, a benzothiophenyl group, an isobenzothiazolyl group, a benzooxazolyl group, an isobenzooxazolyl group, a triazolyl group, a tetrazolyl group, an oxadiazolyl group, a triazinyl group, dibenzofuranyl group, a dibenzothiophenyl group, a benzocarbazolyl group, a dibenzocarbazolyl group, a thiadiazolyl group, and an imidazopyridinyl group;
a11, a21, and a22 are each independently 0 or 1;
R11 and R12 are each independently selected from a substituted or unsubstituted C6-C60 aryl group, a substituted or unsubstituted C1-C60 heteroaryl group, a substituted or unsubstituted monovalent non-aromatic condensed polycyclic group, and a substituted or unsubstituted monovalent non-aromatic condensed heteropolycyclic group;
R21 and R22 are each independently selected from a phenyl group, a pentalenyl group, an indenyl group, a naphthyl group, an azulenyl group, a heptalenyl group, an indacenyl group, an acenaphthyl group, a fluorenyl group, a spiro-fluorenyl group, a benzofluorenyl group, a dibenzofluorenyl group, phenalenyl group, a phenanthrenyl group, an anthracenyl group, a fluoranthenyl group, a triphenylenyl group, a pyrenyl group, a chrysenyl group, a naphthacenyl group, a picenyl group, a perylenyl group, a pentaphenyl group, a hexacenyl group, a pentacenyl group, a rubicenyl group, a coronenyl group, a ovalenyl group, a pyrrolyl group, a thiophenyl group, a furanyl group, an imidazolyl group, a pyrazolyl group, a thiazolyl group, an isoothiazolyl group, a oxazolyl group, an isooxazolyl group, an isoindolyl group, an indolyl group, an indazolyl group, a purinyl group, a quinolinyl group, an isoquinolinyl group, a carbazolyl group, a benzoquinolinyl group, a phthalazinyl group, a naphthyridinyl group, a quinoxalinyl group, a quinazolinyl group, a cinnolinyl group, a phenanthridinyl group, an acridinyl group, a phenanthrolinyl group, a phenazinyl group, a benzofuranyl group, a benzothiophenyl group, an isobenzothiazolyl group, a benzooxazolyl group, an isobenzooxazolyl group, a triazolyl group, a tetrazolyl group, an oxadiazolyl group, a dibenzofuranyl group, a dibenzothiophenyl group, a dibenzosilolyl group, a benzocarbazolyl group, and a dibenzocarbazolyl group; and
a phenyl group, a pentalenyl group, an indenyl group, a naphthyl group, an azulenyl group, a heptalenyl group, an indacenyl group, acenaphthyl group, a fluorenyl group, a spiro-fluorenyl group, a benzofluorenyl group, a dibenzofluorenyl group, a phenalenyl group, a phenanthrenyl group, an anthracenyl group, a fluoranthenyl group, a triphenylenyl group, a pyrenyl group, a chrysenyl group, a naphthacenyl group, a picenyl group, a perylenyl group, pentaphenyl group, a hexacenyl group, a pentacenyl group, a rubicenyl group, a coronenyl group, an ovalenyl group, a hexacenyl group, a pentacenyl group, a rubicenyl group, a coronenyl group, an ovalenyl group, a pyrrolyl group, a thiophenyl group, a furanyl group, an imidazolyl group, a pyrazolyl group, a thiazolyl group, an isothiazolyl group, an oxazolyl group, an isooxazolyl group, an isoindolyl group, an indolyl group, an indazolyl group, a purinyl group, a quinolinyl group, an isoquinolinyl group, a carbazolyl group, a benzoquinolinyl group, a phthalazinyl group, a naphthyridinyl group, a quinoxalinyl group, a quinazolinyl group, a cinnolinyl group, a phenanthridinyl group, an acridinyl group, a phenanthrolinyl group, a phenazinyl group, a benzofuranyl group, a benzothiophenyl group, an isobenzothiazolyl group, a benzooxazolyl group, an isobenzooxazolyl group, a triazolyl group, a tetrazolyl group, an oxadiazolyl group, dibenzofuranyl group, a dibenzothiophenyl group, a dibenzosilolyl group, a benzocarbazolyl group, and a dibenzocarbazolyl group, each substituted with at least one selected from a deuterium, —F, —Cl, —Br, —I, a hydroxyl group, a cyano group, a nitro group, an amino group, an amidino group, a hydrazine group, a hydrazone group, a carboxylic acid or a salt thereof, a sulfonic acid or a salt thereof, a phosphoric acid or a salt thereof, a C20-C20 alkyl group, a C20-C20 alkoxy group, a phenyl group, a pentalenyl group, an indenyl group, a naphthyl group, an azulenyl group, a heptalenyl group, an indacenyl group, acenaphthyl group, a fluorenyl group, a spiro-fluorenyl group, a benzofluorenyl group, a dibenzofluorenyl group, a phenalenyl group, a phenanthrenyl group, an anthracenyl group, a fluoranthenyl group, a triphenylenyl group, a pyrenyl group, a chrysenyl group, a naphthacenyl group, a picenyl group, a perylenyl group, pentaphenyl group, a hexacenyl group, a pentacenyl group, a rubicenyl group, a coronenyl group, an ovalenyl group, a pyrrolyl group, a thiophenyl group, a furanyl group, an imidazolyl group, a pyrazolyl group, a thiazolyl group, an isothiazolyl group, an oxazolyl group, an isooxazolyl group, a pyridinyl group, a pyrazinyl group, a pyrimidinyl group, a pyridazinyl group, an isoindolyl group, an indolyl group, an indazolyl group, a purinyl group, a quinolinyl group, an isoquinolinyl group, a carbazolyl group, a benzoquinolinyl group, a phthalazinyl group, a naphthyridinyl group, a quinoxalinyl group, a quinazolinyl group, a cinnolinyl group, a carbazolyl group, a phenanthridinyl group, an acridinyl group, a phenanthrolinyl group, a phenazinyl group, a benzoimidazolyl group, a benzofuranyl group, a benzothiophenyl group, an isobenzothiazolyl group, a benzooxazolyl group, an isobenzooxazolyl group, a triazolyl group, a tetrazolyl group, an oxadiazolyl group, a triazinyl group, dibenzofuranyl group, a dibenzothiophenyl group, a benzocarbazolyl group, and a dibenzocarbazolyl group;
b11 and b12 are each independently selected from 1, 2, and 3;
R13 and R14 are each independently selected from a hydrogen, a deuterium, —F, —Cl, —Br, —I, a hydroxyl group, a cyano group, a nitro group, an amino group, an amidino group, a hydrazine group, a hydrazone group, a carboxylic acid or a salt thereof, a sulfonic acid or a salt thereof, a phosphoric acid or a salt thereof, a substituted or unsubstituted C1-C60 alkyl group, a substituted or unsubstituted C1-C60 alkoxy group, a substituted or unsubstituted C3-C10 cycloalkyl group, a substituted or unsubstituted C6-C60 aryl group, a substituted or unsubstituted C6-C60 aryloxy group, a substituted or unsubstituted C1-C60 heteroaryl group, a substituted or unsubstituted monovalent non-aromatic condensed polycyclic group, a substituted or unsubstituted monovalent non-aromatic condensed heteropolycyclic group, and —Si(Q1)(Q2)(Q3);
b13 and b14 are each independently selected from 1, 2, 3, and 4;
X21 is selected from an oxygen atom, a sulfur atom, and a selenium atom;
Y21 is selected from a moiety represented by one of Formulae 7-1 to 7-7 below:

wherein, in Formula 7-1, E21 is selected from:
a benzene, a naphthalene, a phenanthrene, an anthracene, a triphenylene, a pyrrole, an imidazole, a benzoxazole, a benzothiazole, a benzoimidazole, a pyrazine, an indole, a quinoline, an isoquinoline, a benzoquinoline, a phenanthridine, an acridine, a phenanthroline, a triazole, and a tetrazole; and
a benzene, a naphthalene, a phenanthrene, an anthracene, a triphenylene, a pyrrole, an imidazole, a benzoxazole, a benzothiazole, a benzoimidazole, a pyrazine, an indole, a quinoline, an isoquinoline, a benzoquinoline, a phenanthridine, an acridine, a phenanthroline, a triazole, and a tetrazole, each substituted with at least one selected from a methyl group, a phenyl group, and a naphthyl group;
wherein, in Formulae 7-3 to 7-7, E21 to E25 are each independently selected from:
a benzene, a naphthalene, a phenanthrene, an anthracene, a triphenylene, a pyrrole, an imidazole, a benzoxazole, a benzothiazole, a benzoimidazole, a pyridine, a pyrazine, a pyrimidine, an indole, a quinoline, an isoquinoline, a benzoquinoline, a phenanthridine, an acridine, a phenanthroline, a triazole, a tetrazole, and a triazine; and
a benzene, a naphthalene, a phenanthrene, an anthracene, a triphenylene, a pyrrole, an imidazole, a benzoxazole, a benzothiazole, a benzoimidazole, a pyridine, a pyrazine, a pyrimidine, an indole, a quinoline, an isoquinoline, a benzoquinoline, a phenanthridine, an acridine, a phenanthroline, a triazole, a tetrazole, and a triazine, each substituted with at least one selected from a methyl group, a phenyl group, and a naphthyl group;
wherein, in Formula 7-2,
E21 is selected from:
a benzene, a naphthalene, a phenanthrene, an anthracene, a triphenylene, a pyrrole, an imidazole, a benzoxazole, a benzothiazole, a benzoimidazole, a pyridine, a pyrimidine, an indole, a quinoline, an isoquinoline, a benzoquinoline, a phenanthridine, an acridine, a phenanthroline, a triazole, a tetrazole, and a triazine; and
a benzene, a naphthalene, a phenanthrene, an anthracene, a triphenylene, a pyrrole, an imidazole, a benzoxazole, a benzothiazole, a benzoimidazole, a pyridine, a pyrimidine, an indole, a quinoline, an isoquinoline, a benzoquinoline, a phenanthridine, an acridine, a phenanthroline, a triazole, a tetrazole, and a triazine, each substituted with at least one selected from a methyl group, a phenyl group, and a naphthyl group; and
E22 is selected from:
a benzene, a naphthalene, a phenanthrene, an anthracene, a triphenylene, a pyrrole, an imidazole, a benzoxazole, a benzothiazole, a benzoimidazole, a pyrimidine, an indole, a quinoline, an isoquinoline, a benzoquinoline, a phenanthridine, an acridine, a phenanthroline, a triazole, a tetrazole, and a triazine; and
a benzene, a naphthalene, a phenanthrene, an anthracene, a triphenylene, a pyrrole, an imidazole, a benzoxazole, a benzothiazole, a benzoimidazole, a pyrimidine, an indole, a quinoline, an isoquinoline, a benzoquinoline, a phenanthridine, an acridine, a phenanthroline, a triazole, a tetrazole, and a triazine, each substituted with at least one selected from a methyl group, a phenyl group, and a naphthyl group;
n21 is 1; and
at least one substituent of the substituted C6-C60 arylene group, the substituted C1-C60 heteroarylene group, the substituted divalent non-aromatic condensed polycyclic group, the substituted divalent non-aromatic condensed heteropolycyclic group, the substituted C6-C60 aryl group, the substituted C1-C60 heteroaryl group, the substituted monovalent non-aromatic condensed polycyclic group, the substituted monovalent non-aromatic condensed heteropolycyclic group, the substituted C1-C60 alkyl group, the substituted C1-C60 alkoxy group, the substituted C3-C10 cycloalkyl group, the substituted C6-C60 aryloxy group, the substituted C6-C60 aryl ring, and the substituted C1-C60 heteroaryl ring is selected from:
a deuterium, —F, —Cl, —Br, —I, a hydroxyl group, a cyano group, a nitro group, an amino group, an amidino group, a hydrazine group, a hydrazone group, a carboxylic acid group or a salt thereof, a sulfonic acid group or a salt thereof a phosphoric acid group or a salt thereof, a C1-C60 alkyl group, a C2-C60 alkenyl group, a C2-C60 alkynyl group, and a C1-C60 alkoxy group;
a C1-C60 alkyl group, a C2-C60 alkenyl group, a C2-C60 alkynyl group, and a C1-C60 alkoxy group, each substituted with at least one selected from a deuterium, —F, —Cl, —Br, —I, a hydroxyl group, a cyano group, a nitro group, an amino group, an amidino group, a hydrazine group, a hydrazone group, a carboxylic acid group or a salt thereof, a sulfonic acid group or a salt thereof, a phosphoric acid group or a salt thereof, a C3-C10 cycloalkyl group, a C1-C10 heterocycloalkyl group, a C3-C10 cycloalkenyl group, a C1-C10 heterocycloalkenyl group, a C6-C60 aryl group, a C6-C60 aryloxy group, a C6-C60 arylthio group, a C1-C60 heteroaryl group, a monovalent non-aromatic condensed polycyclic group, a monovalent non-aromatic condensed heteropolycyclic group, and —Si(Q11)(Q12)(Q13);
a C3-C10 cycloalkyl group, a C1-C10 heterocycloalkyl group, a C3-C10 cycloalkenyl group, a C1-C10 heterocycloalkenyl group, a C6-C60 aryl group, a C6-C60 aryloxy group, a C6-C60 arylthio group, a C1-C60 heteroaryl group, a monovalent non-aromatic condensed polycyclic group, and a monovalent non-aromatic condensed heteropolycyclic group;
a C3-C10 cycloalkyl group, a C2-C10 heterocycloalkyl group, a C3-C10 cycloalkenyl group, a C2-C10 heterocycloalkenyl group, a C6-C60 aryl group, a C6-C60 aryloxy group, a C6-C60 arylthio group, a C1-C60 heteroaryl group, a monovalent non-aromatic condensed polycyclic group, and a monovalent non-aromatic condensed heteropolycyclic group, each substituted with at least one selected from a deuterium, —F, —Cl, —Br, —I, a hydroxyl group, a cyano group, a nitro group, an amino group, an amidino group, a hydrazine group, a hydrazone group, a carboxylic acid group or a salt thereof, a sulfonic acid group or a salt thereof, a phosphoric acid group or a salt thereof, a C1-C60 alkyl group, a C1-C60 alkenyl group, a C1-C60 alkynyl group, a C1-C60 alkoxy group, a C3-C10 cycloalkyl group, a C1-C10 heterocycloalkyl group, a C3-C10 cycloalkenyl group, a C1-C10 heterocycloalkenyl group, a C6-C60 aryl group, a C6-C60 aryloxy group, a C6-C60 arylthio group, a C1-C60 heteroaryl group, a monovalent non-aromatic condensed polycyclic group, a monovalent non-aromatic condensed heteropolycyclic group, and —Si(Q21)(Q22)(Q23); and
—Si(Q31)(Q32)(Q33),
Q1 to Q3, Q11 to Q13, Q21 to Q23, and Q31 to Q33 are each independently selected from a C1 -C60 alkyl group, a C6-C60 aryl group, a C1-C60 heteroaryl group, a monovalent non-aromatic condensed polycyclic group, and a monovalent non-aromatic condensed heteropolycyclic group.

US Pat. No. 10,193,076

AMINE COMPOUND AND ORGANIC LIGHT EMITTING ELEMENT COMPRISING SAME

LG Chem, Ltd., (KR)

12. An organic light emitting device comprising:a first electrode;
a second electrode provided opposite to the first electrode; and
one or more organic material layers provided between the first electrode and the second electrode,
wherein one or more layers of the organic material layers include the compound of claim 1.

US Pat. No. 10,193,074

AMINE-BASED COMPOUND AND ORGANIC LIGHT-EMITTING DEVICE INCLUDING THE SAME

SAMSUNG DISPLAY CO., LTD....

1. An organic light-emitting device, comprising:a first electrode;
a second electrode facing the first electrode; and
an organic layer that is between the first electrode and the second electrode, the organic layer including an emission layer that includes a host and a dopant,
wherein the dopant includes an amine-based compound represented by Formula 1 below:

wherein, in Formula 1,
R1, R3, R6, and R8 are each independently a group represented by Formula 1-a, below, a group represented by Formula 1-b, below, a hydrogen, a deuterium, a halogen atom, a hydroxyl group, a cyano group, a nitro group, an amino group, an amidino group, a hydrazine group, a hydrazone group, a carboxylic acid or a salt thereof, a sulfonic acid or a salt thereof, a phosphoric acid or a salt thereof, a substituted or unsubstituted C1-C60 alkyl group, a substituted or unsubstituted C2-C60 alkenyl group, a substituted or unsubstituted C2-C60 alkynyl group, a substituted or unsubstituted C1-C60 alkoxy group, a substituted or unsubstituted C3-C10 cycloalkyl group, a substituted or unsubstituted C3-C10 heterocycloalkyl group, a substituted or unsubstituted C3-C10 cycloalkenyl group, a substituted or unsubstituted C3-C10 heterocycloalkenyl group, a substituted or unsubstituted C6-C60 aryl group, a substituted or unsubstituted C6-C60 aryloxy group, a substituted or unsubstituted C6-C60 arylthio group, a substituted or unsubstituted C2-C60 heteroaryl group, a substituted or unsubstituted monovalent non-aromatic condensed polycyclic group, a substituted or unsubstituted monovalent non-aromatic hetero-condensed polycyclic group, —N(Q1)(Q2), —Si(Q3)(Q4)(Q5), or —B(Q6)(Q7); at least one of R1, R3, R6, and R8 being a group represented by Formula 1-a, below, and at least one additional one of R1, R3, R6, and R8 being a group represented by Formula 1-a or a group represented by Formula 1-b,
R2, R4, R5, R7, R9, and R10, are each independently a hydrogen, a deuterium, a halogen atom, a hydroxyl group, a cyano group, a nitro group, an amino group, an amidino group, a hydrazine group, a hydrazone group, a carboxylic acid or a salt thereof, a sulfonic acid or a salt thereof, a phosphoric acid or a salt thereof, a substituted or unsubstituted C1-C60 alkyl group, a substituted or unsubstituted C2-C60 alkenyl group, a substituted or unsubstituted C2-C60 alkynyl group, a substituted or unsubstituted C1-C60 alkoxy group, a substituted or unsubstituted C3-C10 cycloalkyl group, a substituted or unsubstituted C3-C10 heterocycloalkyl group, a substituted or unsubstituted C3-C10 cycloalkenyl group, a substituted or unsubstituted C3-C10 heterocycloalkenyl group, a substituted or unsubstituted C6-C60 aryl group, a substituted or unsubstituted C6-C60 aryloxy group, a substituted or unsubstituted C6-C60 arylthio group, a substituted or unsubstituted C2-C60 heteroaryl group, a substituted or unsubstituted monovalent non-aromatic condensed polycyclic group, a substituted or unsubstituted monovalent non-aromatic hetero-condensed polycyclic group, —N(Q1)(Q2), —Si(Q3)(Q4)(Q5), or —B(Q6)(Q7);

wherein, in Formulae 1-a and 1-b,
L1, and L2 are each independently a substituted or unsubstituted C3-C10 cycloalkylene group, a substituted or unsubstituted C3-C10 heterocycloalkylene group, a substituted or unsubstituted C3-C10 cycloalkenylene group, a substituted or unsubstituted C3-C10 heterocycloalkenylene group, a substituted or unsubstituted C6-C60 arylene group, a substituted or unsubstituted C2-C60 heteroarylene group, a substituted or unsubstituted divalent non-aromatic condensed polycyclic group, or a substituted or unsubstituted divalent non-aromatic hetero-condensed polycyclic group;
* is a binding site to a neighboring atom;
a1 and a2 are each independently 0, 1, 2, or 3;
R23 and R24 are each independently a substituted or unsubstituted C6-C60 aryl group, a substituted or unsubstituted C2-C60 heteroaryl group, a substituted or unsubstituted monovalent non-aromatic condensed polycyclic group, or a substituted or unsubstituted monovalent non-aromatic hetero-condensed polycyclic group;
R21 and R22 are each independently a group represented by Formula 1-c, below, a substituted or unsubstituted C6-C60 aryl group, a substituted or unsubstituted C2-C60 heteroaryl group, a substituted or unsubstituted monovalent non-aromatic condensed polycyclic group, or a substituted or unsubstituted monovalent non-aromatic hetero-condensed polycyclic group; at least one of R21 and R22 being a group represented by Formula 1-c;

wherein, in Formula 1-c,
R31 to R34 are each independently a hydrogen, a deuterium, a halogen atom, a hydroxyl group, a cyano group, a nitro group, an amino group, an amidino group, a hydrazine group, a hydrazone group, a carboxylic acid or a salt thereof, a sulfonic acid or a salt thereof, a phosphoric acid or a salt thereof, a substituted or unsubstituted C1-C60 alkyl group, a substituted or unsubstituted C2-C60 alkenyl group, a substituted or unsubstituted C2-C60 alkynyl group, a substituted or unsubstituted C1-C60 alkoxy group, a substituted or unsubstituted C3-C10 cycloalkyl group, a substituted or unsubstituted C3-C10 heterocycloalkyl group, a substituted or unsubstituted C3-C10 cycloalkenyl group, a substituted or unsubstituted C3-C10 heterocycloalkenyl group, a substituted or unsubstituted C6-C60 aryl group, a substituted or unsubstituted C6-C60 aryloxy group, a substituted or unsubstituted C6-C60 arylthio group, a substituted or unsubstituted C2-C60 heteroaryl group, a substituted or unsubstituted monovalent non-aromatic condensed polycyclic group, a substituted or unsubstituted monovalent non-aromatic hetero-condensed polycyclic group, —N(Q1)(Q2), —Si(Q3)(Q4)(Q5), or —B(Q6)(Q7);
* is a binding site to a neighboring atom;
b33 is 1, 2, or 3; and
b34 is 1, 2, 3, or 4;
at least one substituent of the substituted C3-C10 cycloalkylene group, the substituted C3-C10 heterocycloalkylene group, the substituted C3-C10 cycloalkenylene group, the substituted C3-C10 heterocycloalkenylene group, the substituted C6-C60 arylene group, the substituted C2-C60 heteroarylene group, the substituted divalent non-aromatic condensed polycyclic group, the substituted divalent non-aromatic hetero-condensed polycyclic group, the substituted C1-C60 alkyl group, the substituted C2-C60 alkenyl group, the substituted C2-C60 alkynyl group, the substituted C1-C60 alkoxy group, the substituted C3-C10 cycloalkyl group, the substituted C3-C10 heterocycloalkyl group, the substituted C3-C10 cycloalkenyl group, the substituted C3-C10 heterocycloalkenyl group, the substituted C6-C60 aryl group, the substituted C6-C60 aryloxy group, the substituted C6-C60 arylthio group, the substituted C2-C60 heteroaryl group, the substituted monovalent non-aromatic condensed polycyclic group, and the substituted monovalent non-aromatic hetero-condensed polycyclic group is:
a deuterium, a halogen atom, a hydroxyl group, a cyano group, a nitro group, an amino group, an amidino group, a hydrazine group, a hydrazone group, a carboxylic acid or a salt thereof, a sulfonic acid or a salt thereof, a phosphoric acid or a salt thereof, a C1-C60 alkyl group, a C2-C60 alkenyl group, a C2-C60 alkynyl group, or a C1-C60 alkoxy group;
a C1-C60 alkyl group, a C2-C60 alkenyl group, a C2-C60 alkynyl group, or a C1-C60 alkoxy group, each substituted with a deuterium, a halogen atom, a hydroxyl group, a cyano group, a nitro group, an amino group, an amidino group, a hydrazine group, a hydrazone group, a carboxylic acid or a salt thereof, a sulfonic acid or a salt thereof, a phosphoric acid or a salt thereof, a C3-C10 cycloalkyl group, a C3-C10 heterocycloalkyl group, a C3-C10 cycloalkenyl group, a C3-C10 heterocycloalkenyl group, a C6-C60 aryl group, a C6-C60 aryloxy group, a C6-C60 arylthio group, a C2-C60 heteroaryl group, a monovalent non-aromatic condensed polycyclic group, a monovalent non-aromatic hetero-condensed polycyclic group, —N(Q11)(Q12), —Si(Q13)(Q14)(Q15), or —B(Q16)(Q17);
a C3-C10 cycloalkyl group, a C3-C10 heterocycloalkyl group, a C3-C10 cycloalkenyl group, a C3-C10 heterocycloalkenyl group, a C6-C60 aryl group, a C6-C60 aryloxy group, a C6-C60 arylthio group, a C2-C60 heteroaryl group, a monovalent non-aromatic condensed polycyclic group, or a monovalent non-aromatic hetero-condensed polycyclic group;
a C3-C10 cycloalkyl group, a C3-C10 heterocycloalkyl group, a C3-C10 cycloalkenyl group, a C3-C10 heterocycloalkenyl group, a C6-C60 aryl group, a C6-C60 aryloxy group, a C6-C60 arylthio group, a C2-C60 heteroaryl group, a monovalent non-aromatic condensed polycyclic group, or a monovalent non-aromatic hetero-condensed polycyclic group, each substituted with a deuterium, a halogen atom, a hydroxyl group, a cyano group, a nitro group, an amino group, an amidino group, a hydrazine group, a hydrazone group, a carboxylic acid or a salt thereof, a sulfonic acid or a salt thereof, a phosphoric acid or a salt thereof, a C1-C60 alkyl group, a C2-C60 alkenyl group, a C2-C60 alkynyl group, a C1-C60 alkoxy group, a C3-C10 cycloalkyl group, a C3-C10 heterocycloalkyl group, a C3-C10 cycloalkenyl group, a C3-C10 heterocycloalkenyl group, a C6-C60 aryl group, a C6-C60 aryloxy group, a C6-C60 arylthio group, a C2-C60 heteroaryl group, a monovalent non-aromatic condensed polycyclic group, a monovalent non-aromatic hetero-condensed polycyclic group, —N(Q21)(Q22), —Si(Q23)(Q24)(Q25), or —B(Q26)(Q27); or
—N(Q31)(Q32), —Si(Q33)(Q34)(Q35), or —B(Q36)(Q37); and
wherein Q1 to Q7, Q11 to Q17, Q21 to Q27, and Q31 to Q37 are each independently a C1-C60 alkyl group, a C6-C60 aryl group, a C2-C60 heteroaryl group, a monovalent non-aromatic condensed polycyclic group, or a monovalent non-aromatic hetero-condensed polycyclic group.

US Pat. No. 10,193,073

AMINE-BASED COMPOUND AND ORGANIC LIGHT-EMITTING DEVICE INCLUDING THE SAME

Samsung Display Co., Ltd....

1. A compound represented by Formula 1:
wherein, in Formula 1, L1 and L2 are each independently selected from, a phenylene group, a pentalenylene group, an indenylene group, a naphthylene group, an azulenylene group, a heptalenylene group, an indacenylene group, an acenaphthylene group, a fluorenylene group, a spiro-fluorenylene group, a benzofluorenylene group, a dibenzofluorenylene group, a phenalenylene group, a phenanthrenylene group, an anthracenylene group, a fluoranthenylene group, a triphenylenylene group, a pyrenylene group, a chrysenylene group, a naphthacenylene group, a picenylene group, a perylenylene group, a pentaphenylene group, a hexacenylene group, a pentacenylene group, a rubicenylene group, a coronenylene group, an ovalenylene group, a pyrrolylene group, a thienylene group, a furanylene group, a silolylene group, an imidazolylene group, a pyrazolylene group, a thiazolylene group, an isothiazolylene group, an oxazolylene group, an isooxazolylene group, a pyridinylene group, a pyrazinylene group, a pyrimidinylene group, a pyridazinylene group, an isoindolylene group, an indolylene group, an indazolylene group, a purinylene group, a quinolinylene group, an isoquinolinylene group, a benzoquinolinylene group, a phthalazinylene group, a naphthyridinylene group, a quinoxalinylene group, a quinazolinylene group, a cinnolinylene group, a carbazolylene group, a phenanthridinylene group, an acridinylene group, a phenanthrolinylene group, a phenazinylene group, a benzimidazolylene group, a benzofuranylene group, a benzothienylene group, a benzosilolylene group, an isobenzothiazolylene group, a benzooxazolylene group, an isobenzooxazolylene group, a triazolylene group, a tetrazolylene group, an oxadiazolylene group, a triazinylene group, a dibenzofuranylene group, a dibenzothiophenylene group, a benzocarbazolyene group, a dibenzocarbazolyene group, and a dibenzosilolylene group; and
a phenylene group, a pentalenylene group, an indenylene group, a naphthylene group, an azulenylene group, a heptalenylene group, an indacenylene group, an acenaphthylene group, a fluorenylene group, a spiro-fluorenylene group, a benzofluorenylene group, a dibenzofluorenylene group, a phenalenylene group, a phenanthrenylene group, an anthracenylene group, a fluoranthenylene group, a triphenylenylene group, a pyrenylene group, a chrysenylene group, a naphthacenylene group, a picenylene group, a perylenylene group, a pentaphenylene group, a hexacenylene group, a pentacenylene group, a rubicenylene group, a coronenylene group, an ovalenylene group, a pyrrolylene group, a thienylene group, a furanylene group, a silolylene group, an imidazolylene group, a pyrazolylene group, a thiazolylene group, an isothiazolylene group, an oxazolylene group, an isooxazolylene group, a pyridinylene group, a pyrazinylene group, a pyrimidinylene group, a pyridazinylene group, an isoindolylene group, an indolylene group, an indazolylene group, a purinylene group, a quinolinylene group, an isoquinolinylene group, a benzoquinolinylene group, a phthalazinylene group, a naphthyridinylene group, a quinoxalinylene group, a quinazolinylene group, a cinnolinylene group, a carbazolylene group, a phenanthridinylene group, an acridinylene group, a phenanthrolinylene group, a phenazinylene group, a benzimidazolylene group, a benzofiranylene group, a benzothienylene group, a benzosilolylene group, an isobenzothiazolylene group, a benzooxazolylene group, an isobenzooxazolylene group, a triazolylene group, a tetrazolylene group, an oxadiazolylene group, a triazinylene group, a dibenzofuranylene group, a dibenzothiophenylene group, a benzocarbazolyene group, a dibenzocarbazolyene group, and a dibenzosilolylene group, each substituted with at least one selected from a deuterium, —F, —Cl, —Br, —I, a hydroxyl group, a cyano group, a nitro group, an amino group, an amidino group, a hydrazine group, a hydrazone group, a carboxylic acid or a salt thereof, a sulfonic acid or a salt thereof, a phosphoric acid or a salt thereof, a C1-C20 alkyl group, a C1-C20 alkoxy group, a cyclopentyl group, a cyclohexyl group, a cycloheptyl group, a cyclopentenyl group, a cyclohexenyl group, a phenyl group, a pentalenyl group, an indenyl group, a naphthyl group, an azulenyl group, a heptalenyl group, an indacenyl group, an acenaphthyl group, a fluorenyl group, a spiro-fluorenyl group, a benzofluorenyl group, a dibenzofluorenyl group, a phenalenyl group, a phenanthrenyl group, an anthracenyl group, a fluoranthenyl group, a triphenylenyl group, a pyrenyl group, a chrysenyl group, a naphthacenyl group, a picenyl group, a perylenyl group, a pentphenyl group, a hexacenyl group, a pentacenyl group, a rubicenyl group, a coronenyl group, an ovalenyl group, a pyrrolyl group, a thienyl group, a furanyl group, a silolyl group, an imidazolyl group, a pyrazolyl group, a thiazolyl group, an isothiazolyl group, an oxazolyl group, an isooxazolyl group, a pyridinyl group, a pyrazinyl group, a pyrimidinyl group, a pyridazinyl group, an isoindolyl group, an indolyl group, an indazolyl group, a purinyl group, a quinolinyl group, an isoquinolinyl group, a benzoquinolinyl group, a phthalazinyl group, a naphthyridinyl group, a quinoxalinyl group, a quinazolinyl group, a cinnolinyl group, a carbazolyl group, a phenanthridinyl group, an acridinyl group, a phenanthrolinyl group, a phenazinyl group, a benzimidazolyl group, a benzofuranyl group, a benzothienyl group, a benzosilolyl group, an isobenzothiazolyl group, a benzooxazolyl group, an isobenzooxazolyl group, a triazolyl group, a tetrazolyl group, an oxadiazolyl group, a triazinyl group, a dibenzofuranyl group, a dibenzothienyl group, a benzocarbazolyl group, a dibenzocarbazolyl group, and a dibenzosilolyl group;
a1 and a2 are each independently selected from 0, 1, 2, 3, 4, 5, and 6, and the sum of a1 and a2 is 1 or greater;
R1 to R4 are each independently selected from a substituted or unsubstituted C6-C60 aryl group, a substituted or unsubstituted C1-C60 heteroaryl group, a substituted or unsubstituted monovalent non-aromatic condensed polycyclic group, and a substituted or unsubstituted monovalent non-aromatic heterocondensed polycyclic group;
R5 and R6 are each independently selected from a hydrogen, a deuterium, —F, —Cl, —Br, —I, a cyano group, a nitro group, a substituted or unsubstituted C1-C60 alkyl group, a substituted or unsubstituted C6-C60 aryl group, a substituted or unsubstituted C1-C60 heteroaryl group, a substituted or unsubstituted monovalent non-aromatic condensed polycyclic group, and a substituted or unsubstituted monovalent non-aromatic heterocondensed polycyclic group;
b1 and b2 are each independently selected from 0 and 1, wherein the sum of b1 and b2 is 1 or greater;
at least one substituent of the substituted C3-C10 cycloalkylene group, substituted C1-C10 heterocycloalkylene group, substituted C3-C10 cycloalkenylene group, substituted C1-C10 heterocycloalkenylene group, substituted C6-C60 arylene group, substituted C1-C60 heteroarylene group, substituted divalent non-aromatic condensed polycyclic group, substituted divalent non-aromatic hetero-condensed polycyclic group, substituted C1-C60 alkyl group, substituted C6-C60 aryl group, substituted C1-C60 heteroaryl group, substituted monovalent non-aromatic condensed polycyclic group, and substituted monovalent non-aromatic heterocondensed polycyclic group is selected from,
a deuterium, —F, —Cl, —Br, —I, a hydroxyl group, a cyano group, a nitro group, an amino group, an amidino group, a hydrazine group, a hydrazone group, a carboxylic acid or a salt thereof, a sulfonic acid or a salt thereof, a phosphoric acid or a salt thereof, a C1-C60 alkyl group, a C2-C60 alkenyl group, a C2-C60 alkynyl group, a C1-C60 alkoxy group, and —Si(Q1)(Q2)(Q3);
a C1-C60 alkyl group, a C2-C60 alkenyl group, a C2-C60 alkynyl group, and a C1-C60 alkoxy group, each substituted with at least one selected from a deuterium, —F, —Cl, —Br, —I, a hydroxyl group, a cyano group, a nitro group, an amino group, an amidino group, a hydrazine group, a hydrazone group, a carboxylic acid or a salt thereof, a sulfonic acid or a salt thereof, a phosphoric acid or a salt thereof, a C3-C10 cycloalkyl group, a C2-C10 heterocycloalkyl group, a C3-C10 cycloalkenyl group, a C2-C10 heterocycloalkenyl group, a C6-C60 aryl group, a C6-C60 aryloxy group, a C6-C60 arythio group, a C2-C60 heteroaryl group, a monovalent non-aromatic condensed polycyclic group, and a monovalent non-aromatic heterocondensed polycyclic group;
a C3-C10 cycloalkyl group, a C2-C10 heterocycloalkyl group, a C3-C10 cycloalkenyl group, a C2-C10 heterocycloalkenyl group, a C6-C60 aryl group, a C6-C60 aryloxy group, a C6-C60 arythio group, a C2-C60 heteroaryl group, a monovalent non-aromatic condensed polycyclic group, and a monovalent non-aromatic heterocondensed polycyclic group; and
a C3-C10 cycloalkyl group, a C2-C10 heterocycloalkyl group, a C3-C10 cycloalkenyl group, a C2-C10 heterocycloalkenyl group, a C6-C60 aryl group, a C6-C60 aryloxy group, a C6-C60 arythio group, a C2-C60 heteroaryl group, a monovalent non-aromatic condensed polycyclic group, and a monovalent non-aromatic heterocondensed polycyclic group, each substituted with at least one selected from a deuterium, —F, —Cl, —Br, —I, a hydroxyl group, a cyano group, a nitro group, an amino group, an amidino group, a hydrazine group, a hydrazone group, a carboxylic acid or a salt thereof, a sulfonic acid or a salt thereof, a phosphoric acid or a salt thereof, a C1-C60 alkyl group, a C2-C60 alkenyl group, a C2-C60 alkynyl group, a C1-C60 alkoxy group, a C3-C10 cycloalkyl group, a C2-C10 heterocycloalkyl group, a C3-C10 cycloalkenyl group, a C2-C10 heterocycloalkenyl group, a C6-C60 aryl group, a C6-C60 aryloxy group, a C6-C60 arythio group, a C2-C60 heteroaryl group, a monovalent non-aromatic condensed polycyclic group, and a monovalent non-aromatic heterocondensed polycyclic group; wherein
Q1 to Q3 are each independently selected from a C1-C60 alkyl group, a C6-C60 aryl group, a C2-C60 heteroaryl group, a monovalent non-aromatic condensed polycyclic group, and a monovalent non-aromatic heterocondensed polycyclic group.

US Pat. No. 10,193,071

DEVICE AND METHODS FOR MANUFACTURING AN ORGANIC LIGHT-EMITTING DISPLAY APPARATUS

Samsung Display Co., Ltd,...

1. A method of manufacturing an organic light-emitting display apparatus, the method comprising:arranging a mask on a substrate, the mask having an opening corresponding to a pattern of an organic emission layer;
forming the organic emission layer by:
disposing an inkjet roller on the mask;
supplying inks from ink storage tanks external to the inkjet roller to connection tanks;
supplying the inks from the connection tanks mounted inside a central axis of the inkjet roller to ink headers mounted on the inkjet roller via connection pipes;
discharging the inks onto the substrate from the ink headers, through the opening of the mask, by rotating the inkjet roller according to a signal of a control unit; and
curing the organic emission layer,
wherein the connection tanks comprise a plurality of connection tanks respectively corresponding to colors of the organic emission layer and disposed inside the central axis of the inkjet roller and
wherein the plurality of connection tanks supplies the inks comprising the colors of the organic emission layer to corresponding ink headers of the ink headers mounted on the inkjet roller.

US Pat. No. 10,193,070

ELECTROACTIVE MATERIALS

E I DU PONT DE NEMOURS AN...

1. A compound having Formula Iwherein:R1 and R2 are the same or different at each occurrence and are selected from the group consisting of alkyl, silyl, germyl, hydrocarbon aryl, N-heteroaryl, O-heteroaryl, S-heteroaryl, N,O-heteroaryl, and deuterated analogs thereof;
R3 and R4 are the same or different at each occurrence and are selected from the group consisting of alkoxy, siloxy, siloxane, alkenylaryl, aryloxy, deuterated alkoxy, deuterated siloxy, deuterated siloxane, deuterated alkenylaryl, and deuterated aryloxy;
a is an integer from 1-4; and
b is an integer from 0-4;
wherein the N-heteroaryl is derived from a compound selected from the group consisting of pyrrole, pyridine, pyrimidine, carbazole, imidazole, benzimidazole, imidazolobenzimidazole, triazole, benzotriazole, triazolopyridine, indole, indolocarbazole, phenanthroline, quinoline, isoquinoline, quinoxaline, substituted derivatives thereof, and deuterated analogs thereof;
wherein the O-heteroaryl is derived from a compound selected from the group consisting of furan, benzofuran, dibenzofuran, substituted derivatives thereof, and deuterated analogs thereof;
wherein the S-heteroaryl is derived from a compound selected form the group consisting of thiophene, benzothiophene, dibenzothiophene, substituted derivatives thereof, and deuterated analogs thereof; and
wherein the N,O-heteroaryl is derived from a compound selected from the group consisting of oxazole, benzoxazole, phenoxazine, substituted derivatives thereof, and deuterated analogs thereof;
wherein the substituted derivatives have substituents selected from the group consisting of D, alkyl, silyl, germyl, aryl, deuterated alkyl, deuterated silyl, deuterated germyl, and deuterated aryl.

US Pat. No. 10,193,069

POLYMER FOR USE IN ORGANIC ELECTROLUMINESCENT ELEMENT AND ORGANIC ELECTROLUMINESCENT ELEMENT EMPLOYING SAME

1. A polymer for an organic electroluminescent element, comprising a repeating unit represented by the following general formula (1) in repeating units constituting a main chain:
where Z represents one or two or more kinds of repeating units selected from groups derived from indolocarbazoles represented by the following formulae (1a) to (1e), A represents one or two or more kinds of repeating units represented by the following formula (4a) or (4b) and different from Z, l and m each represent an abundance molar ratio, and when a ratio of all repeating units is defined as 100 mol %, l is 10 to 90 mol % and m is 10 to 90 mol %, and n represents an average repetition number and is 5 to 1,000;

in the formulae (1a) to (1e), Ar1's each independently represent a substituted or unsubstituted C6 to C18 arylene group, or a substituted or unsubstituted C3 to C18 heteroarylene group, and R1's each independently represent hydrogen, a C1 to C12 alkyl group, a C1 to C12 alkoxy group, a C6 to C18 aryl group, a C6 to C18 aryloxy group, a C7 to C30 arylalkyl group, a C7 to C30 arylalkyloxy group, a C3 to C18 heteroaryl group, a C3 to C18 heteroaryloxy group, or a C3 to C18 cycloalkyl group;

where Y1 represents a substituted or unsubstituted C1 to C6 alkylene group, O, or S,
Y2 represents a C(R4)2 group, or O,
R3's each independently represent hydrogen, a C1 to C12 alkyl group, a C1 to C12 alkoxy group, a C6 to C18 aryl group, a C6 to C18 aryloxy group, a C7 to C30 arylalkyl group, a C7 to C30 arylalkyloxy group, a C3 to C18 heteroaryl group, a C3 to C18 heteroaryloxy group, or a C3 to C18 cycloalkyl group, and
R4 represents a hydrogen atom, a C1 to C12 alkyl group, a C3 to C18 cycloalkyl group, a C6 to C18 aryl group, a C7 to C30 arylalkyl group, a C3 to C18 heteroaryl group, or a C4 to C30 heteroarylalkyl group.

US Pat. No. 10,193,068

METHOD OF MANUFACTURING A SPECIFICALLY DIMENSIONED THIN FILM TRANSISTOR, THIN FILM TRANSISTOR, AND TRANSISTOR ARRAY

DIS Corporation, Tokyo (...

1. A method of manufacturing a thin film transistor having a top gate bottom contact structure satisfying a relation of L<5 ?m, the method comprising a process of forming a streak portion by performing transfer printing on a support using a release member which is provided with an ink streak portion for forming source and drain electrodes and has mold releasability, and baking the streak portion, to thereby form the source electrode constituted by a conductor and the drain electrode constituted by a conductor,wherein in the method of manufacturing the thin film transistor having a top gate bottom contact structure in which the source and drain electrodes obtained above, a semiconductor layer, an insulator layer, and a gate electrode constituted by a conductor are sequentially laminated in this order, when an electrode width of a narrowest portion in an electrode having a small electrode width out of the source electrode and the drain electrode, after the baking, in a laminated cross section of the thin film transistor having a top gate bottom contact structure to be manufactured is set to A and a channel length thereof is set to L, the ink streak portion is provided so as to satisfy the condition of L/A?0.05;
wherein the ink streak portion is formed so that electrode thicknesses of the source and drain electrodes, after baking, in the laminated cross section of the thin film transistor having a top gate bottom contact structure become the same and both the electrode thicknesses of the source and drain electrodes are set to be equal to or less than 100 nm; and
wherein all of the semiconductor layer, the insulator layer, and the gate electrode are formed by a method selected from the group consisting of an ink jet printing method, a screen printing method, a gravure printing method, a flexographic printing method, a gravure offset printing method, a relief offset printing method, a reverse printing method.

US Pat. No. 10,193,067

ELECTRIC FIELD CONTROL ELEMENT FOR PHONONS

The Regents of the Univer...

1. A phonon transistor comprising:electrical contacts on an electrically conductive medium;
first and second quantum dots embedded in the electrically conductive medium such that in the presence of an electric field provided by an electric potential on the electrical contacts, a state of the first quantum dot couples with a state of a combination of the second quantum dot and the electrically conductive medium; and
a phononic wave guide coupled to the electrically conductive medium, the phononic wave guide configured to transport phonons therethrough.

US Pat. No. 10,193,065

HIGH K SCHEME TO IMPROVE RETENTION PERFORMANCE OF RESISTIVE RANDOM ACCESS MEMORY (RRAM)

Taiwan Semiconductor Manu...

1. An integrated circuit of a resistive random access memory (RRAM) cell, the integrated circuit comprising:a bottom diffusion barrier layer, wherein a width of the bottom diffusion barrier layer decreases from top to bottom;
a bottom electrode overlying the bottom diffusion barrier layer;
a data storage region having a variable resistance and arranged over the bottom electrode;
a diffusion barrier layer arranged over the data storage region;
an ion reservoir region arranged over the diffusion barrier layer;
a top electrode arranged over the ion reservoir region;
a hard mask layer over the top electrode; and
an insulating layer extending conformally from contact with a sidewall of the bottom diffusion barrier layer to contact with a top surface of the hard mask layer, wherein the insulating layer is overhung by the bottom diffusion barrier layer and has a bottom surface even with that of the bottom diffusion barrier layer.

US Pat. No. 10,193,064

MEMORY CELLS INCLUDING DIELECTRIC MATERIALS, MEMORY DEVICES INCLUDING THE MEMORY CELLS, AND METHODS OF FORMING SAME

Micron Technology, Inc., ...

1. A memory cell, comprising:a threshold switching material comprising amorphous silicon doped with at least one of boron, aluminum, gallium, or phosphorus;
at least one doped dielectric material between the threshold switching material and at least one electrode of a pair of electrodes, the threshold switching material on a side of the at least one doped dielectric material; and
a memory material on a side of one of the electrodes of the pair of electrodes.

US Pat. No. 10,193,059

PERPENDICULARLY MAGNETIZED SPIN-ORBIT MAGNETIC DEVICE

Industrial Technology Res...

1. A perpendicularly magnetized spin-orbit magnetic device, comprising:a heavy metal layer;
a magnetic tunnel junction, disposed on the heavy metal layer;
a first antiferromagnetic layer;
a first block layer, disposed between the magnetic tunnel junction and the first antiferromagnetic layer; and
a first stray field applying layer, disposed between the first antiferromagnetic layer and the first block layer, and providing a stray magnetic field parallel to a film plane,
wherein the heavy metal layer is disposed on the first block layer, and the first block layer is disposed on the first stray field applying layer,
wherein the heavy metal layer and the first block layer have a same first film plane area, and the magnetic tunnel junction has a second film plane area, wherein the first film plane area is greater than the second film plane area,
wherein the first antiferromagnetic layer contacts the first stray field applying layer to define a direction of a magnetic moment in the first stray field applying layer.

US Pat. No. 10,193,058

MAGNETORESISTIVE MEMORY DEVICE AND MANUFACTURING METHOD OF THE SAME

TOSHIBA MEMORY CORPORATIO...

1. A magnetoresistive memory device comprising:a first magnetic layer;
a second magnetic layer provided on one major surface side of the first magnetic layer via a first nonmagnetic layer;
a third magnetic layer provided on a surface side the second magnetic layer which is opposite from the first magnetic layer, via a first Ru layer;
a sidewall insulating film provided on sides of the first to third magnetic layers;
a fourth magnetic layer provided on another major surface side of the first magnetic layer via a second nonmagnetic layer, a side surface of the fourth magnetic layer being located on an outer side with respect to a side surface of the first magnetic layer; and
a fifth magnetic layer provided on a surface side of the fourth magnetic layer which is opposite from the first magnetic layer, via a second Ru layer;
wherein:
the second and fourth magnetic layers comprise a material of a same kind, and the third and fifth magnetic layers comprise a material of a same kind,
the second magnetic layer is thinner than the third and fourth magnetic layers, and
the fifth magnetic layer is thinner than the third and fourth magnetic layers.

US Pat. No. 10,193,057

MAGNETIC MEMORY DEVICE

TOSHIBA MEMORY CORPORATIO...

1. A magnetic memory device comprising:a stacked structure including a magnetic element; and
a protective insulating film which covers the stacked structure and is formed of a metallic oxide,
wherein:
a metal element contained in the metallic oxide is selected from yttrium (Y), calcium (Ca) and hafnium (Hf), and
a linear coefficient of thermal expansion of the metallic oxide is greater than 5×10?6/K.

US Pat. No. 10,193,055

PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME

Samsung Electro-Mechanics...

1. A printed circuit board comprising:a first insulating layer;
a first wiring layer disposed on an upper surface of the first insulating layer;
a second insulating layer disposed above the first insulating layer, and on the first wiring layer;
a second wiring layer disposed on an upper surface of the second insulating layer;
a cavity disposed in the first insulating layer;
a piezoelectric substrate disposed in the cavity;
an electrode disposed on the piezoelectric substrate and configured to convert an electrical signal into an elastic wave or to convert an elastic wave into an electrical signal;
a first via extending through the second insulating layer and into the first insulating layer, and electrically connecting the electrode to the second wiring layer;
a second via extending through the second insulating layer and electrically connecting the first wiring layer to the second wiring layer; and
a sealing part disposed on the piezoelectric substrate, the sealing part enclosing the electrode and forming an air gap around the electrode.

US Pat. No. 10,193,053

INSULATING BASE MATERIAL WITH CONDUCTIVE PATTERN

MURATA MANUFACTURING CO.,...

1. An insulating base material including a conductive pattern comprising:an insulating base material layer;
a metal layer provided on the insulating base material layer; and
a conductive pattern including a conductive material, and provided on the metal layer; wherein
the metal layer has an in-plane resistance value that is at least about 0.1 M? larger than an in-plane resistance value of the conductive pattern; and
a thickness of the metal layer is less than a thickness of the conductive pattern including the conductive material.

US Pat. No. 10,193,051

ACOUSTIC WAVE DEVICE

TAIYO YUDEN CO., LTD., T...

1. An acoustic wave device comprising:a piezoelectric substrate that is a rotated Y-cut LiTaO3 substrate;
an Interdigital Transducer (IDT) that is provided on the piezoelectric substrate and excites an acoustic wave; and
gratings that are provided on both sides of the IDT in an aperture direction thereof,
wherein:
a duty ratio of electrode fingers of the gratings is larger than a duty ratio of the electrode fingers of the IDT, or a thickness of the electrode fingers of the gratings is larger than a thickness of the electrode fingers of the IDT, or a thickness of an added film provided on the electrode fingers of the gratings is larger than a thickness of an added film provided on the electrode fingers of the IDT;
a pitch of the electrode fingers of the gratings is smaller than a pitch of the electrode fingers of the IDT; and
a resonant frequency of the gratings is substantially the same as a resonant frequency of the IDT.

US Pat. No. 10,193,047

ELECTRONIC ASSEMBLIES INCORPORATING HEAT FLUX ROUTING STRUCTURES FOR THERMOELECTRIC GENERATION

1. An electronic assembly comprising:a substrate comprising a first surface and a second surface;
a conductive plane on the first surface of the substrate, the conductive plane comprising a central region and a plurality of arms radially extending from the central region of the conductive plane, each of the plurality of arms comprising an end portion distal from the central region;
a thermoelectric generator device coupled to the central region of the conductive plane;
a plurality of heat generating devices coupled to the second surface of the substrate, each heat generating device of the plurality of heat generating devices aligned with the end portion of one of the plurality of arms; and
a plurality of thermal guide traces positioned on the first surface of the substrate and surrounding the conductive plane such that the thermal guide traces thermally couple the plurality of heat generating devices to the central region, wherein the plurality of thermal guide traces are shaped and positioned to guide heat flux present on or within the substrate toward the central region of the conductive plane.

US Pat. No. 10,193,046

THERMOELECTRIC GENERATING DEVICE AND THERMOELECTRIC GENERATING METHOD

Kelk Ltd., Hiratsuka-shi...

1. A thermoelectric generating device comprising:a thermoelectric generating element configured to convert thermal energy to electric energy and to output the electric energy;
a temperature measuring unit configured to measure hot side temperature of the thermoelectric generating element;
a temperature controller configured to perform control to increase an amount of current returning to the thermoelectric generating element when the hot side temperature becomes higher than predetermined temperature; and
an opening/closing switch connected to each end of the thermoelectric generating element, wherein the opening/closing switch is configured to open/close between the ends of the thermoelectric generating element,
wherein the temperature controller controls the opening/closing switch to close the opening/closing switch when the hot side temperature becomes higher than the predetermined temperature to allow current to return to the thermoelectric generating element.

US Pat. No. 10,193,044

LIGHT EMITTING PACKAGE HAVING A GUIDING MEMBER GUIDING AN OPTICAL MEMBER

LG INNOTEK CO., LTD., Se...

1. A light emitting device package, comprising:a base including a flat top surface;
a first electrical circuit component on the flat top surface of the base;
a second electrical circuit component on the flat top surface of the base;
a light emitting diode disposed on a region of the flat top surface of the base, wherein the region excludes the first electrical circuit component and the second electrical circuit component;
an optical member comprising a light transmissive material configured to pass light emitted from the light emitting diode; and
a guiding member having a closed loop shape surrounding the region for guiding the optical member,
wherein the first electrical circuit component includes a first portion disposed between the flat top surface of the base and a bottom surface of the guiding member,
wherein the second electrical circuit component includes a second portion disposed between the flat top surface of the base and the bottom surface of the guiding member,
wherein the first electrical circuit component includes a first extension portion that extends from the first portion to a first location outside of an outer edge of the guiding member in a first direction, and a second extension portion extends from the first location to a second location outside of the outer edge of the guiding member in a first changed direction different than the first direction, the first and second locations being disposed on the flat top surface,
wherein the second electrical circuit component includes a third extension portion that extends from the second portion to a third location outside of the outer edge of the guiding member in a third direction, and a fourth extension portion extends from the third location to a fourth location outside of the outer edge of the guiding member in a second changed direction different than the third direction, the third and fourth locations being disposed on the flat top surface,
wherein the first direction is antiparallel to the third direction, and
wherein the second extension portion and the fourth extension portion have point symmetry with respect to a center of the region surrounded by the guiding member.

US Pat. No. 10,193,041

LIGHT EMITTING DIODE AND METHOD FOR MANUFACTURING THE SAME

ADVANCED OPTOELECTRONIC T...

1. A method for manufacturing a light emitting diode comprising:providing a light emitting diode chip formed on a base, wherein the light emitting diode chip does not cover a peripheral region of the base, the light emitting diode chip comprises a semiconductor structure, a first electrode, and a second electrode, the semiconductor structure comprises a etched N-semiconductor layer, a etched light active layer, and a etched P-semiconductor layer arranged in that sequence from a bottom to a top, the first electrode is formed on a surface of the etched P-semiconductor layer facing away from the etched light active layer, the second electrode is formed on a surface of the etched N-semiconductor layer connected to the light active layer;
forming a packaging layer to cover the etched light emitting diode chip, the packaging layer exposing the first electrode and the second electrode;
defining a through hole on a region of the packaging layer corresponding to the peripheral region of the base, along a direction from the top to the bottom, and the through hole separated from a periphery of the light emitting diode chip;
forming a conductive substrate fully infilled in the through hole;
forming a first conductive layer on a surface of the conductive substrate facing away from the base, and the first conductive layer connected to the conductive substrate and the first electrode; and
removing the base.

US Pat. No. 10,193,038

THROUGH BACKPLANE LASER IRRADIATION FOR DIE TRANSFER

GLO AB, Lund (SE)

1. A method of manufacturing an assembly of a backplane and light emitting devices, the method comprising:providing a substrate with dies of light emitting devices thereupon, wherein a device-side bonding pad is provided on each of the light emitting devices;
bonding at least one of the light emitting devices to the backplane without bonding at least another of the light emitting devices to the backplane;
dissociating the at least one bonded light emitting device from the substrate by irradiating a laser beam through the substrate and onto each region of the substrate in contact with the at least one bonded light emitting device while the at least another of the light emitting devices remains attached to the substrate and not bonded to the backplane; and
separating the substrate and the at least another of the light emitting devices from an assembly of the backplane and the at least one bonded light emitting device that is bonded to the backplane;
wherein the backplane comprises a metal interconnect layer including a plurality of metal interconnect structures embedded in at least one insulating material and providing electrical connections between the light emitting devices on the backplane and input/output pins of the backplane.

US Pat. No. 10,193,035

LUMINANCE PATTERN SHAPING USING A BACK-EMITTING LED AND A REFLECTIVE SUBSTRATE

Lumileds LLC, San Jose, ...

1. A light emitting structure, comprising:a light emitting device comprising:
a light emitting element having a light emitting surface,
a reflector having a reflective surface opposite the light emitting surface, and
a spacer element that separates the reflective surface from the light emitting surface, wherein the spacer element has a thickness that provides a separation distance between the reflective surface and the light emitting surface such that at least half of the light emitted from the device is emitted at an angle greater than 90 degrees from a normal to the light emitting surface toward the reflector, and
a reflective substrate upon which the light emitting element is situated, the reflective substrate being at least five times larger than the reflector.

US Pat. No. 10,193,031

METHOD FOR APPLYING PHOSPHOR TO LIGHT EMITTING DIODES AND APPARATUS THEREOF

1. A Light-Emitting Diode (LED) system comprising:a substrate;
an LED die attached to the substrate via a bottom side of the LED die;
an at least partly reflective film attached to a top side of the LED die; and
phosphor attached to one or more sides of the LED die via application of a coverlay that forms a cavity around the LED die and the application including at least one of using a squeegee to place the phosphor into the cavity, spraying the cavity with the phosphor, or disposing the phosphor in a sheet form onto the LED die.

US Pat. No. 10,193,030

COMPOSITE MATERIALS HAVING RED EMITTING PHOSPHORS

GENERAL ELECTRIC COMPANY,...

1. A lighting apparatus comprising:a light emitting diode (LED) light source radiationally coupled to a composite material comprising a phosphor of formula I and a thermally conductive material dispersed in at least a portion of a binder material,

 wherein the thermally conductive material comprises a material selected from the group consisting of aluminum phosphate, magnesium phosphate, calcium phosphate, barium phosphate, strontium phosphate, an alkali metal halide, calcium fluoride, magnesium fluoride, a compound of formula II, and combinations thereof;

 wherein A is independently at each occurrence Li, Na, K, Rb, Cs, or combinations thereof, M is independently at each occurrence Si, Ge, Sn, Ti, Zr, Al, Ga, In, Sc, Hf, Y, La, Nb, Ta, Bi, Gd, or combinations thereof, x is independently at each occurrence an absolute value of a charge on a [(M,Mn)Fy] ion and a [MFy] ion, and y is 5, 6, or 7.

US Pat. No. 10,193,028

LIGHT EMITTING DEVICE AND METHOD OF PRODUCING THE SAME

NICHIA CORPORATION, Anan...

1. A light emitting device comprising:a resin package comprising:
a plurality of leads that includes:
a first lead having an upper surface, and
a second lead having an upper surface, and
a resin body that includes:
a first resin portion having at least one inner lateral wall surface,
a second resin portion,
a third resin portion disposed between the first lead and the second lead and having an upper surface, and
a resin connection portion,
the plurality of leads and the at least one inner lateral wall surface of the first resin portion defining a recess,
the upper surface of the first lead, the upper surface of the second lead and the upper surface of the third resin portion located at a bottom of the recess,
at the bottom of the recess, the second resin portion being in contact with a portion of the upper surface of the third resin portion and surrounding an element mounting region, and
the resin connection portion connecting the first resin portion and the second resin portion at the bottom of the recess;
at least one light emitting element disposed on the element mounting region at the bottom of the recess of the resin package; and
a light-reflective member disposed between the inner lateral wall surface and the second resin portion in the recess.

US Pat. No. 10,193,026

PARTIAL SPACERS FOR WAFER-LEVEL FABRICATED MODULES

Heptagon Micro Optics Pte...

1. A wafer-level method of fabricating a plurality of optoelectronic device modules, the method comprising:providing a cover substrate that includes transparent regions, the cover substrate having a respective passive optical element on each transparent region;
providing a plurality of first spacer elements on a surface of the cover substrate, wherein adjacent passive optical elements are separated from one another by a respective first spacer element;
providing a base substrate including a surface on which are mounted a plurality of optoelectronic devices;
providing a plurality of second spacer elements on the surface of the base substrate, wherein adjacent optoelectronic devices are separated from one another by a respective second spacer element;
joining each first spacer element on the cover substrate directly to a corresponding one of the second spacer elements on the base substrate to form a wafer stack, each of the first spacer elements being fixed to a corresponding one of the second spacer elements by adhesive, such that each passive optical element is aligned with a corresponding one of the optoelectronic devices;
degassing volatile organic compounds through the adhesive; and
separating the wafer stack into a plurality of optoelectronic device modules, wherein each optoelectronic device module includes at least one of the passive optical elements and at least one of the optoelectronic devices.

US Pat. No. 10,193,025

INORGANIC LED PIXEL STRUCTURE

X-Celeprint Limited, Cor...

1. An inorganic light-emitting diode (iLED) pixel structure, comprising:a transparent pixel substrate having an LED surface, an emission surface opposite the LED surface, and one or more sides other than the LED surface and the emission surface that are not parallel to the LED surface or the emission surface;
an iLED mounted on the LED surface of the pixel substrate, the iLED having an emission side adjacent to the LED surface of the pixel substrate to emit light into the pixel substrate and out of the emission surface, wherein the iLED is non-native to the transparent pixel substrate; and
a reflector disposed on at least a portion of the one or more sides.

US Pat. No. 10,193,022

PIXEL STRUCTURE AND DISPLAY APPARATUS HAVING THE SAME

E Ink Holdings Inc., Hsi...

1. A pixel structure, comprising:a substrate;
a gate electrode disposed on the substrate;
a capacitor electrode disposed on the substrate and spaced apart from the gate electrode;
a first insulation layer covering the gate electrode and the capacitor electrode, the first insulation layer having at least two recesses vertically above the capacitor electrode;
an active layer disposed on the first insulation layer;
drain and source electrodes disposed on the active layer and spaced apart from each other; and
an extension electrode extending from the drain electrode or the source electrode into the recesses.

US Pat. No. 10,193,021

SEMICONDUCTOR LIGHT-EMITTING ELEMENT, AND MANUFACTURING METHOD FOR SAME

STANLEY ELECTRIC CO., LTD...

1. A semiconductor light-emitting element comprising:a first semiconductor layer of a first conductivity type and having a composition of GaN;
a light-emitting functional layer including a light-emitting layer formed on the first semiconductor layer; and
a second semiconductor layer that is of a conductivity type opposite to the conductivity type of the first semiconductor layer and is formed on the light-emitting functional layer,
wherein:
the light-emitting layer includes a base layer with a plurality of base segments that have a composition subject to stress from the first semiconductor layer and are formed in a random net shape, and a quantum well structure layer including at least one quantum well layer each having a composition of InGaN and at least one barrier layer that are formed on the base layer, and
the base layer includes a first sub-base layer, a trench that partitions the first sub-base layer for each of the plurality of base segments, and a second sub-base layer formed to bury the first sub-base layer, the first sub-base layer having a composition of AlGaN, and the second sub-base layer being formed from AlGaN that has an Al composition that is greater than an Al composition of the first sub-base layer.

US Pat. No. 10,193,020

SEMICONDUCTOR LIGHT EMITTING DEVICE AND METHOD OF MANUFACTURING THE SAME

Seoul Viosys Co., Ltd., ...

1. A nitride semiconductor light emitting device, comprising:a first conductive type nitride semiconductor layer;
an active layer disposed under the first conductive type nitride semiconductor layer;
a second conductive type nitride semiconductor layer disposed under the active layer;
mesa regions disposed upward from the second conductive type nitride semiconductor layer so as to expose the first conductive type nitride semiconductor layer;
a second electrode disposed under the second conductive type nitride semiconductor layer;
a cover metal layer disposed at a corner under the second conductive type nitride semiconductor layer so as to overlap a part of the second electrode, and partially exposed in the upward direction;
an insulating layer disposed under the cover metal layer, the second electrode, and the mesa regions;
openings of the insulating layer, disposed at portions corresponding to the mesa regions so as to expose the first conductive type nitride semiconductor layer;
a first electrode disposed under the insulating layer and in the openings;
a conductive substrate disposed under the first electrode; and
a second electrode pad disposed over the exposed cover metal layer, wherein when a first width of the second electrode between one mesa region of the mesa regions and another mesa region adjacent to the mesa region is represented by a and a second width of the second electrode between a mesa region at an edge and an extension line of the cover metal layer at the corner is represented by b, a relation of a>b is established.

US Pat. No. 10,193,018

COMPACT LOW POWER HEAD-MOUNTED DISPLAY WITH LIGHT EMITTING DIODES THAT EXHIBIT A DESIRED BEAM ANGLE

Intel Corporation, Santa...

10. A display panel comprising:a plurality of pixels that are controllable to form an image, each pixel comprising a plurality of Light Emitting Diodes (LEDs); and
a Thin Film Transistor (TFT) backplane to activate the LEDs;
wherein each LED in the plurality of LEDs is configured to emit light at a specified beam angle to direct the light toward a viewer's pupil, and wherein at least one of the LEDs comprises:
a substrate:
a first doped semiconductor disposed over the substrate and forming a projection with sloped surfaces;
a light emitting layer disposed over the projection of the first doped semiconductor, wherein the beam angle is determined in part by a slope of the sloped surfaces;
a second doped semiconductor layer disposed over the light emitting layer; and
an electrode disposed over one side of the second doped semiconductor layer to cause an intensity of the light emitted from the light emitting layer to be higher in a direction normal to a plane of the one side that has the electrode.

US Pat. No. 10,193,017

LIGHT EMITTING DIODE

SEOUL VIOSYS CO., LTD., ...

1. A light emitting device comprising:a substrate including a first to fourth corners, the first corner and the second corner disposed in a direction along an edge of the substrate and the third corner and the forth corner disposed in the direction along another edge of the substrate opposite to the edge of the substrate;
a first to third light emitting cells that are disposed on the substrate and sequentially arranged along the direction, each light emitting cell including a first conductive type semiconductor layer, a second conductive type semiconductor layer disposed on the first conductive type semiconductor layer, and an active layer interposed between the first conductive type semiconductor layer and the second conductive type semiconductor layer;
a first electrode pad disposed in the first light emitting cell and electrically connected to the first conductivity type semiconductor layer of the first light emitting cell, the first electrode pad located closer to the first corner than the second to fourth corners;
a second electrode pad disposed in the third light emitting cell and electrically connected to the second conductivity type semiconductor layer of the third light emitting cell, the second electrode pad located closer to the third corner than the first, second and fourth corners;
a first connector connecting the first light emitting cell to the second light emitting cell and disposed closer to the fourth corner than the first, the second and the third corners;
a second connector connecting the second light emitting cell to the third light emitting cell and disposed closer to the second corner than the first, the third and the fourth corners; and
an insulation layer formed above the substrate and under the second connector,
wherein a surface of the second connector and a surface of the insulation layer include a pattern corresponding to a shape of an upper surface of the substrate,
wherein the second light emitting cell includes a second extension and a third extension that are electrically connected to the second conductivity type semiconductor layer of the second light emitting cell,
wherein the insulation layer comprises a first portion under the second connector and second portion under the second and the third extension, and
wherein a width of the first portion is wider than a width of the second portion and the third extension.

US Pat. No. 10,193,016

III-NITRIDE SEMICONDUCTOR LIGHT EMITTING DEVICE AND METHOD OF PRODUCING THE SAME

DOWA Electronics Material...

1. A III-nitride semiconductor light-emitting device including an n-type semiconductor layer; a light emitting layer containing at least Al; an electron blocking layer; and a p-type semiconductor layer in this order,wherein the light emitting layer has a quantum well structure constituted by a stack of well layers and barrier layers,
the electron blocking layer is adjacent to the light emitting layer and is formed from a layer having an Al content higher than that of the barrier layers and the p-type semiconductor layer, and
the electron blocking layer includes a Si-based doped region layer, and wherein a dopant for the Si-based doped region layer is Si alone.

US Pat. No. 10,193,015

REDUCING OR ELIMINATING NANOPIPE DEFECTS IN III-NITRIDE STRUCTURES

LUMILEDS LLC, San Jose, ...

1. A device comprising:a III-nitride light emitting layer disposed between an n-type region and a p-type region; and
a III-nitride layer doped with an acceptor having a concentration that increases linearly across the III-nitride layer such that a concentration of acceptor is higher in a portion of the III-nitride layer doped with an acceptor closer to the light emitting layer than in a portion of the III-nitride layer doped with an acceptor further from the light emitting layer, the III-nitride layer doped with an acceptor being positioned such that the n-type region is disposed between the III-nitride layer doped with an acceptor and the light emitting layer.

US Pat. No. 10,193,014

OXYGEN CONTROLLED PVD ALN BUFFER FOR GAN-BASED OPTOELECTRONIC AND ELECTRONIC DEVICES

Applied Materials, Inc., ...

1. A method of forming an aluminum nitride (AlN) buffer layer for GaN-based optoelectronic or electronic devices, the method comprising:reactive sputtering an AlN layer above a substrate, the reactive sputtering comprising reacting an aluminum-containing target housed in a physical vapor deposition (PVD) chamber with a nitrogen-containing gas or a plasma based on a nitrogen-containing gas; and
incorporating oxygen into the AlN layer including at an interface between the AlN layer and the substrate by flowing of the oxygen-containing gas subsequent to beginning reacting the aluminum-containing target with the nitrogen-containing gas or the plasma based on the nitrogen-containing gas.

US Pat. No. 10,193,010

LIGHT EMITTING ELEMENT

FUJI XEROX CO., LTD., Mi...

1. A light emitting element comprising:a semi-insulating substrate;
a light emitting part that is formed on a front surface side of the semi-insulating substrate; and
a light receiving part that is formed on the front surface side, that shares a semiconductor layer with the light emitting part, that receives light propagating in a lateral direction through the semiconductor layer from the light emitting part, and that is configured to output current corresponding to the received light,
a first anode electrode pad connected to the light emitting part,
a first cathode electrode pad connected to the light emitting part,
a second anode electrode pad connected to the light receiving part, and
a second cathode electrode pad connected to the light receiving part,
wherein the first anode electrode pad, the first cathode electrode pad, the second anode electrode pad, and the second cathode electrode pad are separated from each other and are formed on the front surface side of the semi-insulating substrate.

US Pat. No. 10,193,008

LIGHTER THAN AIR VEHICLE

BAE Systems Plc, London ...

1. A lighter than air vehicle comprising:an envelope containing a lighter than air gas, at least part of the envelope admitting the passage of light therethrough;
a plurality of devices for receiving the light;
a directing device for selectively redirecting the light which passes through the at least part of the envelope; and
the directing device for selectively redirecting the light being configured to operate in either a first mode of operation or a second mode of operation;
the directing device for selectively redirecting the light being configured to be changed from operating in its first mode of operation to operating in its second mode of operation;
the directing device for selectively redirecting the light being configured to, when operating in its first mode of operation, direct the light onto a first device of the plurality of devices for receiving light and not onto a second device of the plurality of devices for receiving light, the second device being a different device to the first device; and
the directing device for selectively redirecting the light being configured to, when operating in its second mode of operation, direct the light onto the second device and not onto the first device.

US Pat. No. 10,193,006

NANOWIRE COMPOSITE STRUCTURE AND METHODS OF FORMING THE SAME, SENSING DEVICE AND METHODS OF FORMING THE SAME AND PROTECTIVE STRUCTURES OF A NANOWIRE

NATIONAL TSING HUA UNIVER...

1. A sensing device, comprising:a substrate;
a first electrode and a second electrode disposed on the substrate; and
a plurality of nanowires disposed on the substrate and between the first electrode and the second electrode, wherein the plurality of nanowires comprises a first nanowire in contact with the first electrode and a second nanowire in contact with the second electrode, and every nanowire of the plurality of nanowires is in contact with at least another nanowire, and wherein the plurality of nanowires is a photo sensor, and the sensing device is used for a bend sensing, a somatosensory sensing or a pressure sensing.

US Pat. No. 10,193,004

LIFT PRINTING OF CONDUCTIVE TRACES ONTO A SEMICONDUCTOR SUBSTRATE

ORBOTECH LTD., Yavne (IL...

13. Apparatus for material deposition, comprising:a transparent donor substrate having deposited thereon a donor film comprising a metal with a thickness less than 2 ?m;
a positioning assembly, which is configured to position the donor substrate in proximity to an acceptor substrate comprising a semiconductor material with the donor film facing toward the acceptor substrate and with a gap of at least 0.1 mm between the donor film and the acceptor substrate; and
an optical assembly, which is configured to direct pulses of laser radiation, having a pulse duration less than ns, to impinge on the donor substrate so as to cause droplets of the a metal to be ejected from the donor layer and land on the acceptor substrate, thereby forming a circuit trace in ohmic contact with the semiconductor material,
wherein the optical assembly is configured to generate the pulses of laser radiation so as to form the circuit trace with a contact resistance, without annealing of the circuit trace, that is less than 0.2 m?·cm2 between the metal and the semiconductor material.

US Pat. No. 10,193,003

SOLAR CELL UNIT, SOLAR CELL ARRAY, SOLAR CELL MODULE AND MANUFACTURING METHOD THEREOF

BYD COMPANY LIMITED, She...

1. A solar cell unit, comprising:a cell including a cell substrate and a plurality of secondary grid lines disposed on a front surface of the cell substrate, the secondary grid lines comprising at least two edge secondary grid lines and a middle secondary grid line, wherein:
each of the at least two edge secondary grid lines is adjacent to an edge of the cell substrate,
the middle secondary grid line is disposed inside a region defined by the at least two edge secondary grid lines, and
the at least two edge and middle secondary grid lines each comprises a welding portion, the welding portion of each of the at least two edge secondary grid lines having a projection area in the cell substrate larger than the welding portion of the middle secondary grid line; and
a plurality of conductive wires spaced apart from each other and welded with the secondary grid lines in the welding portions.

US Pat. No. 10,193,000

FAST RECOVERY INVERSE DIODE

IXYS, LLC, Milpitas, CA ...

1. A power semiconductor device die having a top semiconductor surface, a bottom semiconductor surface, and peripheral side edges, the die comprising:a bottomside P type silicon region that extends upward from the bottom semiconductor surface of the die that also extends laterally outwardly to the peripheral side edges of the die, wherein the bottomside P type silicon region has a P type dopant concentration of less than 8×1017 atoms/cm3;
an N? type silicon region disposed over the bottomside P type silicon region;
an N+ type silicon contact region that extends downward from the top semiconductor surface and into the N? type silicon region;
a P type silicon peripheral sidewall region that extends laterally inwardly from the peripheral side edges of the die and laterally rings the N? type silicon region, wherein the P type silicon peripheral sidewall region joins the bottomside P type silicon region thereby forming a P type isolation structure, and wherein each of the N? type silicon region, the N+ type silicon contact region, the P type silicon peripheral sidewall region, and the bottomside P type silicon region is of bulk silicon wafer material;
a topside passivation layer disposed over a part of the top semiconductor surface of the die, wherein the topside passivation layer is disposed over the P type silicon peripheral sidewall region and rings around the N+ type silicon contact region;
a deep layer of hydrogen ions that has a distribution disposed about a hydrogen ion local concentration peak surface, wherein the hydrogen ion local concentration peak surface is a planar surface that extends in a plane parallel to the bottom semiconductor surface, and wherein the hydrogen ion local concentration peak surface extends through the N? type silicon region but does not extend through the bottomside P type silicon region;
a shallow layer of ions that has a distribution disposed about an ion local concentration peak surface, wherein the ion local concentration peak surface is a planar surface that extends in a plane parallel to the bottom semiconductor surface, wherein the ion local concentration peak surface extends through the bottomside P type silicon region but does not extend through the N? type silicon region, and wherein the ions of the shallow layer of ions are ions taken from the group consisting of hydrogen ions and helium ions;
a topside metal electrode disposed on the N+ type silicon contact region; and
a bottomside metal electrode disposed on the bottom semiconductor surface of the die.

US Pat. No. 10,192,992

DISPLAY DEVICE

SAMSUNG DISPLAY CO., LTD....

1. A display device, comprising:a light blocking layer;
a semiconductor layer including an oxide semiconductor material and disposed over the light blocking layer, the semiconductor layer including a channel region, a source region and a drain region that are positioned at two opposite sides of the channel region, the source region and the drain region being positioned at a same layer as the channel region;
an insulating layer disposed over the semiconductor layer;
a gate electrode disposed over the insulating layer, the gate electrode overlapping the light blocking layer with the channel region interposed between the gate electrode and the light blocking layer;
a passivation layer disposed over the gate electrode; and
a data input electrode and a data output electrode disposed over the passivation layer, the data input electrode being electrically connected to the source region, and the data output electrode being electrically connected to the drain region,
wherein:
an edge boundary of the gate electrode overlaps the insulating layer in a plan view,
the edge boundary of the insulating layer overlaps the semiconductor layer in the plan view,
the edge boundary of the insulating layer overlaps the light blocking layer in the plan view, and
the passivation layer contacts a side surface and a top surface of the insulating layer, a side surface of the gate electrode, and a top surface of the source region or the drain region.

US Pat. No. 10,192,991

THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF, ARRAY SUBSTRATE AND DISPLAY DEVICE

BOE Technology Group Co.,...

1. A manufacturing method of an oxide thin film transistor, comprising:providing a substrate;
depositing an active layer film, a gate insulator layer film, and a gate metal layer film on the substrate in sequence, and patterning the active layer film, the gate insulator layer film, and the gate metal layer film to form an active layer, a gate insulator layer and a gate metal layer respectively; and
depositing an insulator layer film at a first temperature and patterning the insulator layer film to form an insulator layer;
wherein a portion of the active layer, which portion is not overlapped with the gate metal layer, is treated to become conductive to provide a conductor during deposition of the insulator layer film.

US Pat. No. 10,192,990

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

Semiconductor Energy Labo...

1. A method of manufacturing a semiconductor device, comprising:forming a crystalline oxide semiconductor layer;
forming a first insulating layer over the crystalline oxide semiconductor layer;
forming a gate electrode over the crystalline oxide semiconductor layer with the first insulating layer positioned therebetween;
forming a gate insulating layer by etching the first insulating layer with the gate electrode used as a mask until the crystalline oxide semiconductor layer is partly exposed; and
forming a crystalline region containing nitrogen in the crystalline oxide semiconductor layer by performing nitrogen plasma treatment on the exposed part of the crystalline oxide semiconductor layer,
wherein the crystalline oxide semiconductor layer is a c-axis aligned crystalline oxide semiconductor layer, and
wherein after the step of forming the gate insulating layer edges of the gate electrode and edges of the gate insulating layer are aligned.

US Pat. No. 10,192,989

INTEGRATED CIRCUIT CONNECTION ARRANGEMENT FOR MINIMIZING CROSSTALK

Silanna Asia Pte Ltd, Si...

1. An apparatus, comprising:a leadframe having perimeter package leads and a ground voltage lead;
a bottom semiconductor die, the bottom semiconductor die being flip-chip mounted to the leadframe, the bottom semiconductor die comprising: i) a first frontside active layer having first frontside electrical contacts electrically connected to the leadframe, ii) a first backside portion, and iii) a buried oxide layer, the buried oxide layer being situated between the first frontside active layer and the first backside portion; and
a top semiconductor die, the top semiconductor die comprising: i) a second frontside, and ii) a second backside, the second backside of the top semiconductor die being mounted to the first backside portion of the bottom semiconductor die;
wherein:
the first frontside active layer of the bottom semiconductor die comprises a circuit electrically connected to the first backside portion by a backside electrical connection through the buried oxide layer;
a first electrical contact of the first frontside electrical contacts is electrically connected to the backside electrical connection; and
the first backside portion of the bottom semiconductor die is electrically connected to the ground voltage lead of the leadframe through the first electrical contact to minimize crosstalk.

US Pat. No. 10,192,986

HEMT GAN DEVICE WITH A NON-UNIFORM LATERAL TWO DIMENSIONAL ELECTRON GAS PROFILE AND METHOD OF MANUFACTURING THE SAME

HRL Laboratories, LLC, M...

1. A high electron mobility field effect transistor (HEMT) having a substrate, a channel layer on the substrate and a barrier layer on the channel layer, the HEMT comprising:a stress inducing layer on the barrier layer, the stress inducing layer varying the piezo-electric effect in the barrier layer in a drift region between a gate and a drain, and the stress inducing layer having a height that increases linearly and monotonically starting from the gate and continuing to the drain;
wherein a two dimensional electron gas (2DEG) has a non-uniform lateral distribution in the drift region between the gate and the drain; and
wherein the 2DEG increases in density in the drift region between the gate and the drain.

US Pat. No. 10,192,982

NANO MOSFET WITH TRENCH BOTTOM OXIDE SHIELDED AND THIRD DIMENSIONAL P-BODY CONTACT

ALPHA AND OMEGA SEMICONDU...

1. A semiconductor power device, comprising :a lightly doped layer of a first conductivity type formed on top of a heavily doped layer of the first conductivity type;
a body region of a second conductivity type opposite the first conductivity type formed at an upper portion of the lightly doped layer of the first conductivity type;
a body contact region of the second conductivity type formed at an upper portion of the body region, wherein the body contact region is more heavily doped than the body region; and
one or more field effect transistor devices, each of said one or more field effect transistor devices including first and second electrically insulated gate electrodes formed in corresponding first and second trenches in the lightly doped layer and a source region of the first conductivity type extending between a sidewall of the first trench and a sidewall of the second trench, wherein each of the first and second trenches has a depth that extends in a first dimension, a width that extends in a second dimension and a length that extends in a third dimension, wherein the first dimension is perpendicular to a plane of the heavily doped layer and wherein the second and third dimensions are parallel to the plane of the heavily doped layer,
wherein a portion of the body region extends between the first and second trenches proximate an upper surface of the lightly doped layer;
wherein the source region of the first conductivity type includes an upper portion formed proximate the upper surface and adjacent between the first and second trenches extending along the third dimension; and
wherein each of the one or more field effect transistor devices further includes an opening formed between the first and second trenches through the upper portion of the source region and the body contact region of the second conductivity type to the body region, and a deep implant region of the second conductivity type formed in the lightly doped layer of a first conductivity type below the body region, wherein the deep implant region of the second conductivity type is vertically aligned to the opening and spaced away from a bottom of the opening
wherein a deep contact region of the second conductivity type is formed in the body region below the opening and in electrical contact with the deep implant region of the second conductivity type formed in the lightly doped layer of a first conductivity type, wherein the deep contact region is more heavily doped than the deep implant region.

US Pat. No. 10,192,980

GALLIUM NITRIDE HIGH-ELECTRON MOBILITY TRANSISTORS WITH DEEP IMPLANTED P-TYPE LAYERS IN SILICON CARBIDE SUBSTRATES FOR POWER SWITCHING AND RADIO FREQUENCY APPLICATIONS AND PROCESS FOR MAKING THE SAME

Cree, Inc., Durham, NC (...

1. A high-electron mobility transistor comprising:a substrate layer;
a buffer layer arranged on the substrate layer;
a p-type material layer having a length parallel to a surface of the substrate layer over which the buffer layer is provided; and
a p+ type material layer being arranged on the p-type material layer,
wherein the p-type material layer is provided in one of the following locations: the substrate layer or a first layer arranged on the substrate layer;
wherein the p+ type material layer comprises a doping concentration greater than a doping concentration of the p-type material layer; and
wherein a thickness of the p-type material layer is greater than a thickness of the p+ type material layer.

US Pat. No. 10,192,979

VACUUM TRANSISTOR STRUCTURE USING GRAPHENE EDGE FIELD EMITTER AND SCREEN ELECTRODE

The United States of Amer...

33. A method of fabricating a device comprising:providing a substrate having an optically flat and smooth dielectric surface;
patterning a conducting layer to form a source electrode contact, a gate electrode, optionally a field plate electrode, and a drain electrode;
depositing one or more layers of sacrificial materials;
depositing a conductive two-dimensional material over the sacrificial layers;
depositing a protective layer over the two-dimensional material;
depositing a metal onto selected areas of the two-dimensional material by:
patterning a photoresist;
removing the protective layer;
depositing the metal;
removing unwanted portions of the two-dimensional material;
removing any remaining photoresist;
removing the exposed sacrificial material not covered by the metal or the two-dimensional material by exposure to a vapor-phase etch;
wherein removing the exposed sacrificial layer undercuts the two-dimensional material at least 100 nm from the edge; and
depositing a drain electrode material onto the substrate to form a drain electrode;
wherein the edge is laterally between the gate electrode and the drain electrode;
wherein the gate electrode, the drain electrode, and the source electrode are not in electrical contact with each other; and
wherein the device is configured to provide a line of sight from the edge to the drain electrode.

US Pat. No. 10,192,978

SEMICONDUCTOR APPARATUS

Mitsubishi Electric Corpo...

1. A semiconductor apparatus comprising:an n-type drift layer;
a p-type base layer provided on a top surface side of the drift layer;
an n-type emitter layer selectively provided on a top surface side of the base layer;
a trench gate that allows a trench gate electrode to be in contact with the emitter layer, the base layer, and the drift layer via a gate insulating film, the trench gate electrode being embedded so as to reach from a surface layer of the emitter layer to the drift layer;
a dummy trench gate that allows a dummy trench gate electrode to be in contact with the base layer and the drift layer via a gate insulating film, the dummy trench gate electrode being embedded so as to reach from a surface layer of the base layer to the drift layer;
a p-type collector layer provided on a bottom surface side of the drift layer; and
a diode whose anode side and cathode side are electrically connected to the trench gate electrode and the dummy trench gate electrode, respectively.

US Pat. No. 10,192,977

POWER SEMICONDUCTOR DEVICE

MITSUBISHI ELECTRIC CORPO...

1. A power semiconductor device controlling a current between an emitter electrode and a collector electrode with a voltage applied to a gate electrode, the device comprising:a first-conductive-type first base region having a first principal surface and a second principal surface opposite to the first principal surface;
a second-conductive-type second base region disposed on the first principal surface of the first base region;
at least three groove parts parallel to each other disposed from a surface of the second base region through the second base region to the first base region, the groove parts including a first groove part and a third groove part arranged with a second groove part interposed therebetween;
insulating films covering inner walls of the respective groove parts;
conductive trench gates filled on the insulating films;
a first-conductive-type emitter region disposed in the second base region between the first groove part and the second groove part to be in contact with the first groove part, the first-conductive-type emitter region being electrically connected to the emitter electrode; and
a second-conductive-type collector region disposed on the second principal surface of the first base region,
wherein the first-conductive-type emitter region is not formed in the second base region between the second groove part and the third groove part,
the third groove part does not have a first-conductive-type emitter region in contact therewith,
wherein the trench gates embedded in the first groove part and the third groove part are electrically connected to the gate electrode, and
wherein the trench gate embedded in the second groove part is electrically connected to the emitter electrode.

US Pat. No. 10,192,976

SEMICONDUCTOR QUANTUM DOT DEVICE AND METHOD FOR FORMING A SCALABLE LINEAR ARRAY OF QUANTUM DOTS

The Trustees of Princeton...

1. A quantum dot device, comprising:at least three conductive layers comprising:
a first conductive layer configured to operate as a screening layer,
a second conductive layer configured to cause accumulation of electrons in a two-dimensional electron gas (2DEG), and
a third conductive layer configured to tune at least one barrier between regions of the 2DEG; and
at least two insulating layers, wherein a first one of the insulating layers electrically insulates the first conductive layer from the second conductive layer, and a second one of the insulating layers electrically insulates the second conductive layer from the third conductive layer.

US Pat. No. 10,192,975

LOW TEMPERATURE POLYCRYSTALLINE SILICON THIN FILM TRANSISTOR

Wuhan China Star Optoelec...

1. A low temperature polycrystalline silicon thin film transistor, wherein: the low temperature polycrystalline silicon thin film transistor comprises: a substrate; a buffer layer formed on the substrate; a semiconductor layer formed on the buffer layer; a gate insulation layer formed on the buffer layer and the semiconductor layer; gates formed on the gate insulation layer; a dielectric layer formed on the gate insulation layer and the gates; a passivation layer formed on the dielectric layer; a first contact hole and a second contact hole formed respectively inside the passivation layer, the dielectric layer and the gate insulation layer, and sources ad drains source electrodes and drain electrodes formed respectively on the first contact hole and the second contact hole; and the semiconductor layer being a low temperature poly silicon layer, and one of a reflective layer and an insulation layer being disposed between the buffer layer and the semiconductor layer;wherein the low temperature polycrystalline silicon thin film transistor comprises a pixel thin film transistor and a driving thin film transistor; the substrate comprises a pixel region and a peripheral driving region; the pixel region is used for forming the pixel thin film transistor; and the peripheral driving region is used for forming the driving thin film transistor;
the driving thin film transistor comprises a substrate located inside the peripheral driving region, and all the buffer layer, the semiconductor layer, the gate insulation layer, gates, the dielectric layer and the passivation layer are formed sequentially from the top on the substrate inside the peripheral driving region; the first contact hole and the second contact hole are formed respectively inside the passivation layer, the dielectric layer and the gate insulation layer, and the source electrodes and the drain electrodes are formed respectively on the first contact hole and the second contact hole; wherein the one of the reflective layer and the insulation layer is disposed between the buffer layer and the semiconductor layer; and
wherein the pixel thin film transistor comprises: a substrate inside the pixel region, and all the buffer layer, the semiconductor layer, the gate insulation layer, gates, the dielectric layer and the passivation layer are formed sequentially from the top on the substrate inside the pixel region; the first contact hole and the second contact hole are formed respectively inside the passivation layer, the dielectric layer and the gate insulation layer, and the source electrodes and the drain electrodes are formed respectively on the first contact hole and the second contact hole.

US Pat. No. 10,192,974

METHOD FOR FORMING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR SUBSTRATE

Infineon Technologies AG,...

1. A method for forming a semiconductor device, the method comprising:incorporating chalcogen dopant atoms into a semiconductor doping region of a semiconductor substrate of a semiconductor device; and
incorporating heavy metal atoms into the same semiconductor doping region into which the chalcogen dopant atoms are incorporated,
wherein the semiconductor substrate comprises silicon having an electrical resistivity between 500 ?cm and 6000 ?cm before incorporating the chalcogen dopant atoms and the heavy metal atoms.

US Pat. No. 10,192,970

SIMULTANEOUS OHMIC CONTACT TO SILICON CARBIDE

The United States of Amer...

1. An apparatus, comprising:a silicon carbide semiconductor comprising an n-type surface and a p-type surface; and
a mixture of platinum and titanium configured to simultaneously form an ohmic contact to both the n-type surface and the p-type surface, wherein the mixture does not include aluminum and has at least 30 atomic % platinum.

US Pat. No. 10,192,969

TRANSISTOR GATE METAL WITH LATERALLY GRADUATED WORK FUNCTION

Intel Corporation, Santa...

1. A device, comprising:a transistor including:
a channel region comprising a semiconductor;
a source region and a drain region on opposite sides of the channel region;
a source contact coupled with the source region and a drain contact coupled with the drain region;
a gate dielectric over the channel region; and
a gate electrode separated from the channel region by the gate dielectric and separated from the drain and source contacts by an intervening spacer dielectric, the gate electrode including a gate metal having a work function that varies monotonically over a gate length of the gate electrode between the source and drain regions, wherein:
a thickness of the gate metal increases over the gate length from a non-zero first thickness at a source edge of the gate electrode to a second thickness at a drain edge of the gate electrode;
a top surface of the gate electrode at the source edge has a z-height below that of a top surface of the spacer dielectric; and
a top surface of the gate electrode at the drain edge has a z-height below that of a top surface of the spacer dielectric; and
a gate capping material over the gate metal, the gate capping material separated from the drain and source contacts by the spacer dielectric.

US Pat. No. 10,192,967

SILICON CARBIDE SEMICONDUCTOR WITH TRENCH GATE

Sumitomo Electric Industr...

1. A silicon carbide semiconductor device comprising:a silicon carbide substrate having a main surface, the silicon carbide substrate including a first impurity region, a second impurity region, and a third impurity region, the first impurity region having first conductivity type, the second impurity region being provided on the first impurity region, the second impurity region having second conductivity type different from the first conductivity type, the third impurity region being provided on the second impurity region, the third impurity region having the first conductivity type, the third impurity region constituting at least a portion of the main surface, a trench being provided in the main surface to have a side surface and a bottom portion, the side surface extending to the first impurity region through the third impurity region and the second impurity region, the bottom portion being located in the first impurity region, the side surface including a first side surface portion and a second side surface portion, the first side surface portion being continuous to the main surface, the second side surface portion connecting the first side surface portion to the bottom portion, a contact point between the first side surface portion and the second side surface portion being located in the third impurity region, an angle formed by the first side surface portion and a straight line extending through the contact point between the first side surface portion and the second side surface portion and parallel to the main surface being smaller than an angle formed by the second side surface portion and a boundary surface between the first impurity region and the second impurity region;
a gate oxide film in contact with the third impurity region at the first side surface portion of the trench, in contact with the third impurity region and the second impurity region at the second side surface portion of the trench, and in contact with the first impurity region at the bottom portion of the trench; and
a gate electrode provided on the gate oxide film,
a thickness of a portion of the gate oxide film on a contact point between the main surface and the first side surface portion being larger than a thickness of a portion of the gate oxide film on the second impurity region,
wherein the first side surface portion is a first linear side surface portion, and the second side surface portion is a second linear side surface portion, and
wherein the width of the trench is increased from the bottom portion of the trench to the main surface in a tapered manner.

US Pat. No. 10,192,962

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

ROHM CO., LTD., Kyoto (J...

1. A semiconductor device comprising:a semiconductor layer, including a front surface having a plurality of first trenches formed therein and having a second trench formed therein in a region between mutually adjacent ones of the plurality of first trenches;
channel regions, formed in regions between the first and second trenches in a surface layer portion of the semiconductor layer;
a first insulating film, covering an inner surface of each of the first trenches at a bottom portion side of each of the first trenches;
a field plate electrode, embedded in each of the first trenches so as to face the semiconductor layer across the first insulating film;
a first gate insulating film covering a lateral surface of each of the first trenches above the first insulating film in each of the first trenches;
a first gate electrode, embedded at an opening portion side of each of the first trenches so as to face the channel regions across the first gate insulating film;
a second insulating film, interposed between the field plate electrode and the first gate electrode in each of the first trenches;
an embedded insulating film, embedded at a bottom portion side of the second trench;
a second gate insulating film covering a lateral surface of the second trench above the embedded insulating film in the second trench; and
a second gate electrode, embedded at an opening portion side of the second trench so as to face the channel regions across the second gate insulating film.

US Pat. No. 10,192,959

III-N BASED SUBSTRATE FOR POWER ELECTRONIC DEVICES AND METHOD FOR MANUFACTURING SAME

IMEC VZW, Leuven (BE)

1. A III-N based substrate for power electronic devices comprising:a base substrate;
a III-N laminate above the base substrate; and
a buffer layer structure between the base substrate and the III-N laminate,
wherein the buffer layer structure comprises at least a first superlattice laminate and a second superlattice laminate above the first superlattice laminate,
wherein the first superlattice laminate comprises a repetition of a first superlattice unit which comprises a plurality of first AlGaN layers, each of which is made of AlxGa1-xN with 0?x?1 and x being different among the first AlGaN layers,
wherein the second superlattice laminate comprises a repetition of a second superlattice unit which comprises a plurality of second AlGaN layers, each of which is made of AlyGa1-yN with 0?y?1 and y being different among the second AlGaN layers,
wherein an average aluminum content of the first superlattice laminate is greater than an average aluminum content of the second superlattice laminate by a predetermined difference, and
wherein the buffer layer structure has a breakdown field strength of more than 150 V/?m in forward or reverse vertical bias at room temperature (25° C.).

US Pat. No. 10,192,957

THIN-FILM TRANSISTOR ARRAY SUBSTRATE

LG DISPLAY CO., LTD., Se...

1. A thin-film transistor array substrate comprising:a substrate;
an active layer positioned on the substrate;
a gate insulating film positioned on the active layer;
a gate electrode positioned on the gate insulating film;
an interlayer insulating film positioned on the gate electrode;
source and drain electrodes positioned on the interlayer insulating film and connected to the active layer,
wherein an intermediate layer made of an oxide semiconductor comprising a Group IV element is positioned between the active layer and the gate insulating film,
wherein the intermediate layer is disposed on the active layer, and
wherein a sidewall of the intermediate layer, a sidewall of the insulating film and a sidewall of the gate electrode are coplanar.

US Pat. No. 10,192,956

METHOD FOR PRODUCING FIN STRUCTURES OF A SEMICONDUCTOR DEVICE IN A SUBSTRATE

IMEC VZW, Leuven (BE)

1. A structure comprisinga semiconductor substrate comprising a shallow trench isolation layer stack on a side thereof;
a patterned hard mask layer on and protruding from the shallow trench isolation layer stack, and corresponding to a fin area, wherein the patterned hard mask layer comprises a layer stack of a silicon nitride sublayer on top of a SiO2 sublayer in the fin area, and comprises the SiO2 sublayer without the silicon nitride sublayer outside the fin area; and
a filling layer abutting a planar front surface of and embedding the patterned hard mask layer, wherein the filling layer is further patterned according to a striped pattern in the fin area.

US Pat. No. 10,192,955

SEMICONDUCTOR DEVICE CONTAINING OXYGEN-RELATED THERMAL DONORS

Infineon Technologies AG,...

1. A semiconductor device comprising:a semiconductor portion that comprises a drift zone with a total dopant concentration in a range from 1E12 cm?3 to 1E17 cm?3, wherein a ratio of oxygen-related thermal donors to a total of extrinsic donors and the oxygen-related thermal donors is at least 25%.

US Pat. No. 10,192,951

INDUCTOR ELEMENT, INDUCTOR ELEMENT MANUFACTURING METHOD, AND SEMICONDUCTOR DEVICE WITH INDUCTOR ELEMENT MOUNTED THEREON

Renesas Electronics Corpo...

1. A semiconductor device, comprising:a semiconductor substrate;
a multiple layer lead structure formed over the semiconductor substrate; and
a coil formed in the multiple layer lead structure,
wherein the coil comprises:
a first coiled lead formed in a first layer;
a second coiled lead formed in a second layer;
a third coiled lead formed in the first layer;
a first via connected to the first coiled lead and the second coiled lead; and
a second via connected to the second coiled lead and the third coiled lead,
wherein each of the first coiled lead and the third coiled lead have one complete wind,
wherein the second coiled lead has two winds,
wherein the third coiled lead encircles the first coiled lead,
wherein an inter-lead capacitance of the first coiled lead and the second coiled lead is larger than an inter-lead capacitance between the first coiled lead and the third coiled lead,
wherein at least one of the first, second, and third coiled leads includes a plurality of slits which are discontinuous in a longitudinal direction of the at least one of the first, second, and third coiled leads, and the plurality of slits are formed in parallel at a plurality of corners and the plurality of slits run parallel along entire liner portions of the at least one of the first, second, and third coiled leads.

US Pat. No. 10,192,950

DISPLAY MODULE AND MULTI-DISPLAY DEVICE INCLUDING THE SAME

SAMSUNG ELECTRONICS CO., ...

1. A display module comprising a rectangular shape comprising a left edge, a right edge, a top edge and a bottom edge, the display module comprising:a panel comprising a pixel region and a black matrix, the pixel region comprising a plurality of pixels configured to emit light from an upper side of the panel, and the black matrix being arranged outside the pixel region;
a flexible circuit board arranged to be spaced apart from the black matrix, directly under the black matrix, and comprising a surface substantially perpendicular to a display surface of the display module; and
a fixing portion joining the flexible circuit board to a lower side of the panel, the fixing portion being directly connected to a pixel of the plurality of pixels,
wherein each of the plurality of pixels is separated from corresponding adjacent pixels by a first distance,
a left distance from the left edge to a first one of the plurality of pixels plus a right distance from a second one of the plurality of pixels to the right edge is the first distance,
a bottom distance from the bottom edge to a third one of the plurality of pixels plus a top distance from a fourth one of the plurality of pixels to the top edge is the first distance, and
a width of the fixing portion corresponds to a width of the black matrix.

US Pat. No. 10,192,947

ORGANIC LIGHT EMITTING DISPLAY PANEL AND METHOD OF MANUFACTURING THE SAME

Samsung Display Co., Ltd....

1. An organic light emitting display panel, comprising:a first base substrate;
a thin film transistor disposed on the first base substrate;
a first electrode electrically connected to the thin film transistor;
a pixel defining layer defining an opening that exposes a portion of the first electrode;
a second electrode disposed on the first electrode;
a light emitting structure disposed between the first electrode and the second electrode;
a second base substrate disposed on the second electrode; and
a reflective or opaque metal layer disposed on the second base substrate and defining an opening that overlaps the light emitting structure,
wherein the pixel defining layer comprises a first portion and a second portion that are disposed between the first electrode and a first electrode of an adjacent pixel,
wherein the first portion overlaps an end portion of the first electrode, and the second portion overlaps an end portion of the first electrode of the adjacent pixel,
wherein the first portion is spaced apart from the second portion in at least one cross-sectional view, and
wherein the second electrode is disposed on both of the first portion and the second portion.

US Pat. No. 10,192,946

LIGHT EMITTING DEVICE

Semiconductor Energy Labo...

1. A light-emitting device comprising:a first substrate over which a transistor, a first light-emitting element, a second light-emitting element, and a third light-emitting element are provided;
a second substrate over which a shielding film is provided; and
a filling material between the first substrate and the second substrate,
wherein the first light-emitting element comprises a first electroluminescent layer that emits green light,
wherein the second light-emitting element comprises a second electroluminescent layer that emits red light,
wherein the third light-emitting element comprises a third electroluminescent layer that emits blue light,
wherein the first electroluminescent layer and the second electroluminescent layer are over a partition,
wherein the first light-emitting element is directly connected to a first region of a wiring,
wherein the wiring is directly connected to a drain electrode of the transistor,
wherein the first light-emitting element comprises a light-emitting region,
wherein the light-emitting region is over the first region of the wiring,
wherein the first electroluminescent layer comprises a second region which is over and in contact with the second electroluminescent layer,
wherein the first electroluminescent layer comprises a third region which is over and in contact with the third electroluminescent layer, and
wherein the second region overlaps the shielding film.

US Pat. No. 10,192,944

THIN FILM TRANSISTOR ARRAY PANEL WITH DIFFUSION BARRIER LAYER AND GATE INSULATION LAYER AND ORGANIC LIGHT EMITTING DIODE DISPLAY INCLUDING THE SAME

SAMSUNG DISPLAY CO., LTD....

1. A thin film transistor array panel comprising:a substrate;
a semiconductor disposed on the substrate;
a first gate insulation layer disposed on the semiconductor;
a first diffusion barrier layer disposed on the first gate insulation layer;
a second diffusion barrier layer disposed on the first gate insulation layer and in contact with a lateral surface of the first diffusion barrier layer;
a first gate electrode disposed on the first diffusion barrier layer; and
a source electrode and a drain electrode connected to the semiconductor,
wherein the semiconductor is between the substrate and the first diffusion barrier layer, and
wherein the first diffusion barrier layer comprises a metal, and the second diffusion barrier layer comprises a metal oxide including the metal.

US Pat. No. 10,192,943

THIN FILM TRANSISTOR SUBSTRATE

INNOLUX CORPORATION, Jhu...

1. An OLED display device, comprising:a thin film transistor substrate, comprising:
a substrate; and
plural thin film transistor units disposed on the substrate and respectively comprising:
an active layer disposed on the substrate and made of polysilicon;
a first insulating layer disposed on the active layer;
a source electrode and a drain electrode disposed on the first insulating layer;
a metal layer disposed on the first insulating layer; and
a second insulating layer disposed on the metal layer,
wherein the metal layer has plural first protrusions at a top surface of the metal layer, the second insulating layer comprises a first region corresponding to the active layer and a second region corresponding to a region outside the active layer, and a roughness of a top surface of the first region is greater than a roughness of a top surface of the second region;
an OLED unit electrically connected to one of the plural thin film transistor units, wherein the OLED unit comprises a first electrode;
a pixel defining layer disposed on the first electrode, wherein the pixel defining layer has a pixel opening corresponding to the first electrode; and
a spacer disposed on the pixel defining layer and corresponding to a region outside the pixel opening.

US Pat. No. 10,192,941

DISPLAY DEVICE

Japan Display Inc., Toky...

1. A display device comprising:a first substrate having flexibility and including a plurality of pixels arranged in a matrix form in a first direction and a second direction, the first direction and second direction mutually intersecting each other;
a transistor layer which is arranged above the first substrate, includes at least one transistor arranged in each of the plurality of pixels, and has an inorganic insulation layer formed in the plurality of pixels in common and a plurality of aperture parts that pass through the inorganic insulation layer, extend in the second direction, and are arranged between two transistors arranged in two of the plurality of pixels adjacent in the first direction;
a plurality of first groups of wirings extending continuously in the first direction and connected to each of a plurality of pixels arranged in the first direction among the plurality of pixels;
a plurality of second groups of wirings extending in the second direction and connected to each of a plurality of pixels arranged in the second direction among the plurality of pixels;
a first organic insulation layer on the transistor layer; and
a second organic insulation layer on the first organic insulation layer, wherein
the first groups of wirings are arranged between the first and the second organic insulation layers, and
a shape of each of the first groups of wirings is a corrugated form with curves that repeat in the first direction that is perpendicular to the second direction in a cross-sectional view.

US Pat. No. 10,192,940

DOUBLE SIDED ORGANIC LIGHT-EMITTING DISPLAY APPARATUS AND ITS MANUFACTURING METHOD THEREOF

Wuhan China Star Optoelec...

1. A manufacturing method for a double sided organic light-emitting display apparatus, comprising:providing a rigid substrate;
forming at least one transmission flexible substrate and at least one reflective flexible substrate on the rigid substrate;
forming a display substrate having a plurality of switching elements on the at least one transmission flexible substrate and the at least one reflective flexible substrate; and
forming at least one top-emission OLED light-emitting layer and at least one bottom-emission OLED light-emitting layer on the display substrate, wherein the at least one top-emission OLED light-emitting layer is corresponding to the at least one reflective flexible substrate and the at least one bottom-emission OLED light-emitting layer is corresponding to the at least one transmission flexible substrate;
wherein the at least one transmission flexible substrate and the at least one reflective flexible substrate are formed on a surface of the rigid substrate and are spaced from and corresponding to the at least one bottom-emission OLED light-emitting layer and the at least one top-emission OLED light-emitting layer, such that the at least one top-emission OLED light-emitting layer is separated by the display substrate from the at least one reflective flexible substrate.

US Pat. No. 10,192,938

LIGHT-EMITTING DIODE DISPLAYS

Apple Inc., Cupertino, C...

1. A display, comprising:display driver circuitry;
data lines coupled to the display driver circuitry;
gate lines coupled to the display driver circuitry;
an array of pixels having rows and columns, wherein the gate lines of rows in a first area of the display are coupled to fewer of the pixels in the array of pixels than the gate lines of rows in a second area of the display; and
supplemental gate line loading structures that are coupled to at least some of the gate lines in the first area, wherein the supplemental gate line loading structures provide loading on the gate lines in the first area, wherein a first of the rows in the first area is coupled to a supplemental gate line loading structure in a second of the rows of the first area.

US Pat. No. 10,192,936

OLED DISPLAY ARCHITECTURE

Universal Display Corpora...

1. A device, comprising:a first organic light emitting device that emits light having a peak wavelength in the visible spectrum of 600-700 nm, further comprising a first emissive layer having a first emissive material;
a second organic light emitting device that emits light having a peak wavelength in the visible spectrum of 500-600 nm, further comprising a second emissive layer having a second emissive material;
a third organic light emitting device that emits light having a peak wavelength in the visible spectrum of 400-500 nm, further comprising a third emissive layer having a third emissive material;
a fourth organic light emitting device that emits light having a peak wavelength in the visible spectrum of 400 to 500 nm, further comprising a fourth emissive layer having a fourth emissive material;
the first organic light emitting device comprises an emissive layer having a phosphorescent emissive material;
the second organic light emitting device comprises an emissive layer having a phosphorescent emissive material;
the third organic light emitting device comprises an emissive layer having a phosphorescent emissive material;
the fourth organic light emitting device comprises an emissive layer having a phosphorescent emissive material; and
a CIE y-coordinate of light emitted by the fourth organic light emitting device is at least 0.02 less than a CIE y-coordinate of light emitted by the third organic light emitting device.

US Pat. No. 10,192,935

DISPLAY DEVICE

LG Display Co., Ltd., Se...

1. A display device having a substrate, comprising:a light shielding layer on the substrate;
first, second, third and fourth subpixels sequentially arranged on the substrate in a horizontal direction;
a first power line disposed on one side of the first subpixel and connected to the first and second subpixels;
a sensing line disposed between the second subpixel and the third subpixel and connected to the first to fourth subpixels;
a second power line disposed on one side of the fourth subpixel and connected to the third and fourth subpixels;
first and second data lines disposed between the first subpixel and the second subpixel and third and fourth data lines disposed between the third subpixel and the fourth subpixel; and
a scan line on the first to fourth subpixels and extended to the horizontal direction,
wherein the first to fourth data lines, the sensing line, and the first and second power lines are disposed on the same plane as the light shielding layer.

US Pat. No. 10,192,932

QUANTUM DOT LED AND OLED INTEGRATION FOR HIGH EFFICIENCY DISPLAYS

Apple Inc., Cupertino, C...

1. A display comprising:a hybrid pixel including an organic light emitting diode (OLED) subpixel and a quantum dot light emitting diode (QD-LED) subpixel;
a common hole transport layer in the OLED subpixel and the QD-LED subpixel;
a common quantum dot layer over the common hole transport layer in the QD-LED subpixel and the QD-LED subpixel;
an organic emission layer over the common hole transport layer in the OLED subpixel and over the common quantum dot layer in the OLED subpixel, wherein the organic emission layer comprises a phosphorescent material;
a common electron transport layer over the common quantum dot layer in the QD-LED subpixel, and over the organic emission layer in the OLED subpixel;
a common top electrode layer over the common electron transport layer in the OLED subpixel and the QD-LED subpixel.

US Pat. No. 10,192,931

COMPLEMENTARY THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF

SHENZHEN CHINA STAR OPTOE...

1. A complementary thin film transistor, comprising:a substrate defined by an n-type transistor region and a p-type transistor region adjacent to the n-type transistor region;
an n-type semiconductor layer disposed on the substrate and within the n-type transistor region, wherein the n-type semiconductor layer comprises a metal oxide material, and the metal oxide material of the n-type semiconductor layer is selected from indium gallium zinc oxide, indium zinc oxide or zinc tin oxide;
a p-type semiconductor layer disposed on the substrate and within the p-type transistor region, wherein the p-type semiconductor layer comprises organic semiconductor material; and
an etched barrier layer formed on the n-type semiconductor layer and disposed within the n-type transistor region and the p-type transistor region, wherein the p-type semiconductor layer is formed on the etched barrier layer and the organic semiconductor material of the p-type semiconductor layer is selected from pentacene, triphenylamine, fullerene, phthalocyanine, perylene derivative, or cyanine; and
a buffer layer formed on the whole etched barrier layer and disposed within the n-type transistor region and the p-type transistor region.

US Pat. No. 10,192,930

THREE DIMENSIONAL COMPLEMENTARY METAL OXIDE SEMICONDUCTOR CARBON NANOTUBE THIN FILM TRANSISTOR CIRCUIT

Tsinghua University, Bei...

1. A metal oxide semiconductor carbon nanotube thin film transistor circuit comprising:an insulating substrate;
a first semiconductor carbon nanotube layer on the insulating substrate, wherein the first semiconductor carbon nanotube layer is an n-type semiconductor layer;
a first drain electrode and a first source electrode, wherein the first drain electrode and the first source electrode are electrically connected to and separated by the first semiconductor carbon nanotube layer;
a functional dielectric layer on and covering the first semiconductor carbon nanotube layer, the first drain electrode, and the first source electrode;
a first gate electrode on the functional dielectric layer and insulated from the first semiconductor carbon nanotube layer, the first source electrode, and the first drain electrode;
a first insulating layer on and covering the first gate electrode and the functional dielectric layer;
a second semiconductor carbon nanotube layer on the first insulating layer, wherein the second semiconductor carbon nanotube layer is a p-type semiconductor carbon nanotube layer;
a second drain electrode and a second source electrode on the first insulating layer, wherein the second drain electrode and the second source electrode are electrically connected to and separated by the second semiconductor carbon nanotube layer, and the first drain electrode and the second drain electrode are electrically connected with each other; wherein a through hole is defined by the functional dielectric layer and the first insulating layer to expose the first drain electrode, and the second drain electrode extends through the through hole to be in direct contact with the first drain electrode;
a second insulating layer on the first insulating layer and covering the second semiconductor carbon nanotube layer; and
a second gate on the second insulating layer and separated from the second semiconductor carbon nanotube layer.

US Pat. No. 10,192,927

SEMICONDUCTOR DEVICE FOR A NON-VOLATILE (NV) RESISTIVE MEMORY AND ARRAY STRUCTURE FOR AN ARRAY OF NV RESISTIVE MEMORY

CROSSBAR, INC., Santa Cl...

1. A resistive switching device comprising:a substrate having a surface region;
a first dielectric material layer overlying the surface region of the substrate;
a first wiring structure comprising a first metal material overlying the first dielectric material layer;
a plurality of first structures overlying a surface region of the first wiring structure, wherein the plurality of first structures comprise a contact material, wherein the plurality of first structures are separated by a second dielectric material, and wherein the plurality of first structures are characterized by a first width;
a plurality of resistive switching material structures overlying the plurality of first structures, wherein each resistive switching material structure from the plurality of resistive switching material structures is characterized by a second width, wherein the plurality of resistive switching material structures comprise undoped silicon material;
a plurality of active conductive material structures overlying the plurality of resistive switching material structures, wherein each active conductive material structure from the plurality of active conductive material structures is characterized by a third width, wherein the plurality of active conductive material structures comprise an active metal material; and
a second wiring structure overlying the plurality of active conductive material structures;
wherein the plurality of first structures, the plurality of resistive switching material structures and the plurality of active conductive material structures form a plurality of non-volatile memory cells;
wherein a resistive switching material structure of a non-volatile memory cell from the plurality of non-volatile memory cells includes a conductive path disposed therein comprising a portion of the active metal material from an active conductive material structure from the plurality of active conductive material structures; and
wherein a resistance of the non-volatile memory cell is determined in response to a conductance state of the conductive path.

US Pat. No. 10,192,926

ELECTRONIC DEVICE AND METHOD FOR FABRICATING THE SAME

SK HYNIX INC., Icheon (K...

1. An electronic device comprising a semiconductor memory, wherein the semiconductor memory comprises:a plurality of first lines extending in a first direction;
a plurality of second lines extending in a second direction that intersects with the first direction;
a plurality of variable resistance elements disposed between the first lines and the second lines and located at intersections of the first lines and the second lines; and
a plug connected to a first portion of each of the first lines,
wherein the plug comprises a conductive layer and a material layer having a resistance value higher than that of the conductive layer, and
wherein the conductive layer comprises first and second conductive layers, and the material layer is disposed between the first conductive layer and the second conductive layer.

US Pat. No. 10,192,925

SEMICONDUCTOR DEVICE STRUCTURE USEFUL FOR BULK TRANSISTOR AND METHOD OF MANUFACTURING SAME

SONY CORPORATION, Tokyo ...

1. A semiconductor device comprising:a semiconductor substrate;
a transistor at a first surface of the semiconductor substrate; and
one or more contacts penetrating a part of the transistor and the semiconductor substrate, the contacts being insulated from the semiconductor substrate.

US Pat. No. 10,192,924

IMAGE PICKUP DEVICE AND IMAGE PICKUP APPARATUS

Sony Corporation, Tokyo ...

1. An imaging device comprising:a substrate;
a first photoelectric conversion region disposed in the substrate;
a second photoelectric conversion region disposed in the substrate, the second photoelectric conversion region being adjacent to the first photoelectric conversion region;
a third photoelectric conversion region disposed in the substrate, the third photoelectric conversion being adjacent to the second photoelectric conversion region;
a first trench disposed between the first photoelectric conversion region and the second photoelectric conversion region; and
a second trench disposed between the second photoelectric conversion region and the third photoelectric conversion region,
wherein an area of the first photoelectric conversion region is larger than an area of the second photoelectric conversion region in a cross-sectional view,
wherein, in the cross-sectional view, the first trench extends a first distance along a first sidewall of the first photoelectric conversion region, wherein the first distance is taken along the first side wall from a first light receiving surface of the first photoelectric conversion region to an end of the first trench,
wherein, in the cross-sectional view, the second trench extends a second distance along a second sidewall of the second photoelectric conversion region, wherein the second distance is taken along the second sidewall from a second light receiving surface of the second photoelectric conversion region to an end of the second trench, and
wherein the first distance is greater than the second distance.

US Pat. No. 10,192,922

CHARGE PACKET SIGNAL PROCESSING USING PINNED PHOTODIODE DEVICES

SEMICONDUCTOR COMPONENTS ...

1. An image sensor, comprising:an image pixel comprising a first pinned photodiode coupled to a pixel output line; and
analog-to-digital conversion (ADC) circuitry coupled to the pixel output line, wherein the ADC circuitry comprises:
a second pinned photodiode;
a comparator with first and second inputs;
a sampling transistor;
a first capacitive node that is coupled between the second pinned photodiode the first input of the comparator; and
a second capacitive node that is coupled between the sampling transistor and the second input of the comparator.

US Pat. No. 10,192,920

SOLID-STATE IMAGING DEVICE

PANASONIC INTELLECTUAL PR...

1. A solid-state imaging device comprising:a pixel array including a first pixel and a second pixel which is adjacent to the first pixel,
wherein the pixel array includes:
a substrate of a first conductivity type, the substrate having a first principal surface and a second principal surface which is on a reverse side of the first principal surface and where light enters; and
a wiring layer disposed on the first principal surface,
the substrate includes:
a first semiconductor region of a second conductivity type which is different from the first conductivity type, the first semiconductor region being provided for each of the first pixel and the second pixel, disposed inside the substrate, and extending in a direction from the first principal surface toward the second principal surface;
a second semiconductor region of the second conductivity type provided for each of the first pixel and the second pixel, the second semiconductor region being disposed inside the substrate, between the second principal surface and the first semiconductor region, and connected to the first semiconductor region;
a third semiconductor region of the first conductivity type, the third semiconductor region being disposed inside the substrate, between (i) the second principal surface and (ii) the second semiconductor region of the first pixel and the second semiconductor region of the second pixel;
a first well region disposed inside the substrate, between the first semiconductor region of the first pixel and the first semiconductor region of the second pixel, and on the first principal surface;
a pixel circuit disposed in the first well region; and
a pixel isolation region disposed inside the substrate, between the second semiconductor region of the first pixel and the second semiconductor region of the second pixel, and
the second semiconductor region and the third semiconductor region form an avalanche multiplication region.

US Pat. No. 10,192,919

IMAGING SYSTEMS WITH BACKSIDE ISOLATION TRENCHES

SEMICONDUCTOR COMPONENTS ...

1. An image sensor, comprising:a substrate having first and second portions and having first and second opposing surfaces;
an array of image pixels in the first portion of the substrate;
an intermetal dielectric stack attached to the substrate at the first surface of the substrate;
at least one trench isolation structure in the substrate that extends from the second surface of the substrate towards the first surface of the substrate and that electrically isolates the first portion of the substrate from the second portion of the substrate, wherein at least a portion of the at least one trench isolation structure is interposed between the first portion of the substrate and the second portion of the substrate; and
a conductive material in the second portion of the substrate, wherein the conductive material extends from the second surface of the substrate to the first surface of the substrate.

US Pat. No. 10,192,915

OPTICAL SENSOR AND MANUFACTURING METHOD THEREOF

Visera Technologies Compa...

1. An optical sensor, comprising:a sensing layer comprising an active area, a shading area around the active area, and a peripheral area around the shading area;
a first shading filter disposed on the shading area; and
a second shading filter disposed on the first shading filter,
wherein one of the first shading filter and the second shading filter extends from the shading area and is disposed over the active area, and
wherein when a light beam is emitted to the shading area, the second shading filter is configured to block a first component of the light beam, and the first shading filter is configured to block a second component of the light beam.

US Pat. No. 10,192,913

IMAGING DEVICE AND ELECTRONIC DEVICE

Semiconductor Energy Labo...

1. A semiconductor device comprising:a first layer;
a second layer; and
a third layer,
wherein the first layer, the second layer, and the third layer overlap with one another,
wherein the first layer comprises a first transistor and a second transistor,
wherein the second layer comprises a third transistor and a fourth transistor,
wherein each of the first transistor, the second transistor, the third transistor, and the fourth transistor comprises an oxide semiconductor in a channel formation region,
wherein the third layer comprises a photoelectric conversion element,
wherein one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the second transistor,
wherein the one of the source and the drain of the second transistor is electrically connected to a gate of the third transistor,
wherein one of a source and a drain of the third transistor is electrically connected to one of a source and a drain of the fourth transistor,
wherein one electrode of the photoelectric conversion element is electrically connected to the other one of the source and the drain of the first transistor,
wherein each of off-state current of the first transistor and off-state current of the second transistor are lower than each of off-state current of the third transistor and off-state current of the fourth transistor, and
wherein each of on-state current of the third transistor and on-state current of the fourth transistor are higher than on-state current of the first transistor and on-state current of the second transistor.