US Pat. No. 10,511,347

DEVICE DETECTION IN CONTACTLESS COMMUNICATION SYSTEMS

NXP B.V., Eindhoven (NL)...

14. A near field communication (NFC) reader, comprising:an antenna front-end that includes a low pass filter, a matching circuit, and an antenna coil, the antenna front-end having a capacitance and an inductance; and
an NFC controller, wherein the NFC controller includes an oscillator coupled to the antenna front-end and configured to use the capacitance and the inductance of the antenna front-end as a tank circuit such that the oscillator is resonating at a boundary of its stability based on the capacitance and the inductance of the tank circuit, and the NFC controller is configured to detect a presence of an object in proximity of the antenna front-end using one or more changes in an output of the oscillator, and the NFC controller is configured to determine a width of a startup pulse based on an inductance of the antenna front-end at a time of starting the oscillator.

US Pat. No. 10,511,344

TRANSCEIVER RESONANT RECEIVE SWITCH

INTEGRATED DEVICE TECHNOL...

1. An apparatus comprising:an input port;
an output port; and
a resonant receive switch circuit coupled between the input port and the output port, said resonant receive switch circuit comprising a first switch, a second switch, a capacitor, and an input matching inductor, wherein (i) said input matching inductor is coupled between said input port and said output port, (ii) said capacitor is coupled in series with said first switch across said input matching inductor, (iii) said second switch is coupled between a circuit ground and a node formed by connection of said capacitor and said first switch, (iv) when said first switch and said second switch are in a non-conducting state, a signal at the input port is passed to the output port, and (v) when said first switch and said second switch are in a conducting state, the signal at the input port is prevented from reaching the output port.

US Pat. No. 10,511,342

CELL PHONE CASE WITH CARD STORAGE CAPABILITY

ISPEAKER CO., LTD., (KR)...

1. A cell phone case comprising:a case main body having a frame case shape and provided with, on a front surface thereof, a cell phone accommodation part configured to accommodate a cell phone in a shape of surrounding a rear surface and side surfaces of the cell phone;
a card storage part formed so as to be decoupled/coupled from/to the case main body and configured to store a card; and
an opening/closing cover provided on a rear surface of the case main body and configured to slide on and open/close the card storage part coupled to the case main body, wherein
the case main body comprises an opening configured to accommodate the card storage part, and
wherein the card storage part comprises:
a card mount part on which a card is mounted; and
upper/lower coupling parts configured to allow the opening/closing cover to be decoupled/coupled from/to the card storage part.

US Pat. No. 10,511,341

STERILIZING ENCLOSURE FOR SECURING A PORTABLE ELECTRONIC DEVICE

Stryker Corporation, Kal...

1. An enclosure for a portable electronic device, the enclosure comprising:a frame defining a window with a glass panel attached to the frame adjacent the window, the panel positioned to abut a touchscreen interface of the electronic device, the frame including a frame periphery edge;
a base comprising a base periphery edge, wherein the base and the frame cooperatively define a closed position of the enclosure for securing the portable electronic device therein; and
a unitary seal comprising a seal periphery edge with the seal attached to one of the base and the frame and positioned to be engaged by the other of the base and the frame in the closed position of the enclosure,
wherein the seal periphery edge and the frame periphery edge and the base periphery edge are aligned in the closed position and the seal defines a boundary between a touch zone outside of the seal and a no-touch zone inside of the seal.

US Pat. No. 10,511,340

PROTECTION OF A MOBILE COMMUNICATION DEVICE

SAVOX COMMUNICATIONS OY A...

1. An arrangement comprising a mobile communication device comprising:a terminal device configured for wireless communication with one or more other devices via a communication channel;
a speaker-microphone unit;
an electric cable that comprises a coiled cable that comprises at least one coiled portion,
wherein the terminal device and the speaker-microphone unit are configured to be communicatively coupled to each other by the electric cable; and
a fire retardant sleeve having a shape and size that enable accommodating said speaker-microphone unit and said electric cable therein,
wherein said fire retardant sleeve is made of one of the following: a fire retardant cloth made of fire retardant material, a cloth coated with, on its exterior, one or more layers of fire retardant coating,
wherein said speaker-microphone unit and said electric cable are entirely enclosed within said fire retardant sleeve,
wherein the fire retardant sleeve comprises a one-piece structure,
wherein said fire retardant sleeve provides stand-alone protection, separate from protective gear worn by a user of the communication device, and
wherein the sleeve comprises respective sleeve portions that are sized and shaped to match or substantially match the speaker-microphone unit and the electrical cable of the mobile communication device.

US Pat. No. 10,511,336

METHOD AND SYSTEM FOR MULTI-BAND TRANSCEIVER FRONT-END ARCHITECTURE WITH REDUCED SWITCH INSERTION LOSS

Maxlinear, Inc., Carlsba...

1. A method for communication, the method comprising:in a transceiver comprising a first plurality of switches each with a separate control terminal and a common terminal coupled to a transmit signal path, a second plurality of switches each with a separate control terminal and a common terminal coupled to a receive signal path, and a plurality of communications links:
operatively coupling the transmit signal path to one of the plurality of communications links using one of the first plurality of switches when the transceiver is in a transmit mode; and
operatively coupling the receive signal path to one of the plurality of communications links using one of the second plurality of switches when the transceiver is in a receive mode.

US Pat. No. 10,511,333

PARITY PUNCTURING DEVICE FOR VARIABLE-LENGTH SIGNALING INFORMATION ENCODING, AND PARITY PUNCTURING METHOD USING SAME

Electronics and Telecommu...

1. A parity puncturing apparatus, comprising:memory configured to provide a parity bit string for parity puncturing for parity bits of an LDPC codeword whose length is 16200 and whose code rate is 3/15; and
a processor configured to puncture a number of bits corresponding to a final puncturing size on a rear side of the parity bit string,
wherein
the final puncturing size is calculated using a temporary puncturing size, a number of transmission bits, and a temporary number of transmission bits;
the number of transmission bits is calculated using the temporary number of transmission bits and a modulation order;
the temporary number of transmission bits is calculated using a difference between a sum of a length of a BCH-encoded bit string and 12960, and the temporary puncturing size; and
the temporary puncturing size is calculated using a difference between a length of an LDPC information bit string and the length of the BCH-encoded bit string,
the temporary puncturing size is calculated using a first integer, multiplied by a value obtained by dividing the difference between the length of the LDPC information bit string and the length of the BCH-encoded bit string by 2, and a second integer different from the first integer, and
wherein the first integer is 7, and the second integer is 0 and the modulation order is 2 that corresponds to QPSK.

US Pat. No. 10,511,319

ANALOG TO DIGITAL CONVERTER

Taiwan Semiconductor Manu...

1. An analog-to-digital converter (“ADC”), comprising:an input terminal configured to receive an analog input voltage signal;
a first ADC stage coupled to the input terminal and configured to output a first digital value corresponding to the analog input voltage signal and an analog residue signal corresponding to a difference between the first digital value and the analog input signal;
a second ADC stage coupled to the first ADC stage and configured to convert the analog residue signal to a second digital value, wherein the second ADC stage includes a first sub-stage configured to convert the analog residue signal to a first number of bits of the second digital value representing the analog reside signal, and a second sub-stage configured to convert the analog residue signal to a second number of bits of the second digital value, where the second number of bits is greater than the first number of bits; and
a controller coupled to the first and second ADC stages and configured to combine the first digital value and the second digital value into a digital output signal representing the analog input voltage signal.

US Pat. No. 10,511,303

GATE DRIVER FOR DEPLETION-MODE TRANSISTORS

Sarda Technologies, Inc.,...

1. A system comprising:a depletion or low-threshold enhancement mode compound semiconductor (III-V) switching transistor;
a charge pump to maintain a voltage that holds the transistor in an off-state;
a coupling capacitor electrically coupled to a gate of the transistor, the coupling capacitor configured to receive pulse width modulated (PWM) signals and shift a gate voltage that alternately drives the transistor into an on-state and the off-state; and
a gate control circuit electrically coupled to the transistor and configured to:
receive external PWM signals during operation,
generate internal PWM signals during startup before receiving external PWM signals,
output received and generated PWM signals to the coupling capacitor to shift the gate voltage and alternately drive the transistor into the on-state and the off-state, and
output control signals to the charge pump, the control signals configured to hold the transistor in the off state.

US Pat. No. 10,511,302

DRIVE CIRCUIT FOR DRIVE TARGET SWITCH

DENSO CORPORATION, Kariy...

1. A drive circuit for turning on or off a target switch having a first main terminal, a second main terminal with a voltage, and a main control terminal, the drive circuit comprising:a negative power source configured to output a first negative voltage that is lower than the voltage at the second main terminal;
a discharge switch electrically connected between the main control terminal and the negative voltage source;
a reference voltage generator connected to the second main terminal and configured to generate, based on the voltage at the second main terminal, a reference voltage that is higher than the first negative output voltage of the negative power source and that is lower than the voltage at the second main terminal;
a control switch electrically connected between the negative voltage source and the reference voltage generator; and
a drive controller configured to:
switch the discharge switch and the control switch from an off state to an on state to thereby supply the first negative output voltage to the main control terminal of the target switch; and
switch the discharge switch and the control switch from the on state to the off state to thereby change the first negative output voltage to be supplied to the main control terminal of the target switch to a second negative voltage based on the reference voltage generated by the reference voltage generator, the second negative voltage being more positive than the first negative voltage.

US Pat. No. 10,511,297

HIGH-SPEED SWITCH WITH ACCELERATED SWITCHING TIME

pSemi Corporation, San D...

1. A multiport switch comprising:(a) at least one switch branch comprising:
(1) switch control input;
(2) a field effect transistor (FET) having a gate, source and drain;
(3) a reset circuit having an signal input, signal output, reset control input and reference input, the signal output being coupled to the gate of the FET, the reset circuit configured to reset the FET by connecting the gate of the FET to the signal input when the reset circuit is inactive and to the reference input when the reset circuit is active;
(b) a reset processor having a reset processor input coupled to the switch control input and a reset processor output coupled to the reset control input, the reset processor configured to output a reset pulse to set the reset circuit to an active state for a predetermined reset period only in response to a change in the state of a signal received at the reset processor input, the reset pulse returning the reset circuit to an inactive state after the predetermined reset period.

US Pat. No. 10,511,280

RESONATOR AND RESONATOR ARRAY

NATIONAL TSING HUA UNIVER...

1. A resonator, which resonates in a bulk acoustic wave mode, comprising:a resonator body deformed at least along a first direction;
at least one transducer arm connected to the resonator body along the first direction, the transducer arm comprising:
a base comprising a first end, wherein the first end is connected to the resonator body;
a piezoelectric layer disposed above the base but not extended to the resonator body; and
an electrode layer disposed above the piezoelectric layer but not extended to the resonator body; and
a substrate for securing the transducer arm such that the resonator body is suspended;
wherein the resonator body is only connected to the at least one transducer arm, thereby being suspended from the substrate.

US Pat. No. 10,511,278

TRANSFORMER WITH HIGH COMMON-MODE REJECTION RATIO (CMRR)

QUALCOMM Incorporated, S...

1. A transformer comprising:a first winding having a first terminal coupled to an input node, and a second terminal coupled to a reference potential node;
a first impedance coupled between a tap of the first winding and the reference potential node, wherein the first impedance comprises a complex impedance; and
a second winding magnetically coupled to the first winding and having a first terminal coupled to a first differential node of a differential output pair, a second terminal coupled to a second differential node of the differential output pair, and a tap coupled to the reference potential node.

US Pat. No. 10,511,275

COMMON MODE SENSING ARCHITECTURE

MICROCHIP TECHNOLOGY INCO...

1. A common mode sensing amplifier, comprising:a differential positive input;
a differential negative input;
a first transistor, wherein:
the first transistor is communicatively coupled to the differential positive input and differential negative input at a source of the first transistor; and
the first transistor is configured to track input common mode of the differential positive input and differential negative input; and
a resistive network, wherein:
a first end of the resistive network is configured to receive input from the differential positive input and a second end of the resistive network is configured to receive input from the differential negative input; and
the first transistor is coupled to the resistive network at a source of the first transistor.

US Pat. No. 10,511,271

POWER AMPLIFICATION DEVICE, TERMINAL HAVING THE SAME, AND BASE STATION HAVING THE SAME

Samsung Electronics Co., ...

1. A power amplification device comprising:a power amplifier configured to amplify an input signal; and
at least one element connected to the power amplifier and configured to reduce envelope impedance for maintaining linearity of the power amplifier,
wherein the power amplifier includes a plurality of stages,
wherein the at least one element is disposed in each of the stages, and
wherein the at least one element is a regulator configured to supply power to the power amplifier.

US Pat. No. 10,511,269

VOLTAGE-TO-CURRENT CONVERTERS

TEXAS INSTRUMENTS INCORPO...

1. An amplifier, comprising:an input stage, comprising:
a first voltage-to-current conversion stage, the first voltage-to-current conversion stage configured to provide an input-to-output gain with compressive nonlinearity;
a second voltage-to-current conversion stage cascaded with the first voltage-to-current conversion stage, wherein:
an input of the second voltage-to-current conversion stage is connected to an output of the first voltage-to-current conversion stage; and
the second voltage-to-current conversion stage is configured to provide an input-to-output gain with expansive nonlinearity;
wherein the first voltage-to-current conversion stage comprises a first transistor and a second transistor connected as a differential pair.

US Pat. No. 10,511,256

SOLAR PANEL CLEANING ROBOT

SUZHOU RADIANT PHOTOVOLTA...

1. A solar panel cleaning robot, comprising:a robot body moving or stopping on at least one solar panel, and the robot body comprising:
a cleaning device disposed on an internal or an external of the robot body, and configured to clean a solar panel;
a power system disposed on the internal or the external of the robot body, and configured to adjust a moving direction and a moving speed of the robot body on the solar panel;
a control system disposed on the internal or the external of the robot body, and connected to the power system and the cleaning device; and
an electric power system disposed on the internal or the external of the robot body, connected to the power system, the cleaning device and the control system, and configured to provide the power system, the cleaning device and the control system with electricity;
a data acquisition system configured to acquire at least one working parameter during moving of the robot body;
a processor connected to the data acquisition system, and configured to transmit at least one moving-control instruction to the power system, and to transmit at least one cleaning-control instruction to the cleaning device, wherein the power system controls the robot body to move or stop according to the moving-control instruction, and the cleaning device cleans or stops cleaning the solar panel according to the cleaning-control instruction; and
at least one storage unit connected to the processor, and configured to store the working parameter during the moving of the robot body;
wherein the data acquisition system comprises at least one image sensor or camera connected to the processor, disposed on a front end of the robot body, and configured to acquire images in front of the robot body during the moving of the robot body; wherein the cleaning device comprises:
a cleaning motor comprising a cleaning motor shaft;
a roller brush having a roller brush driven shaft disposed on a center of the roller brush;
a transmission mechanism connected to both the cleaning motor shaft and the roller brush driven shaft, the cleaning motor shaft driving the roller brush driven shaft to rotate through the transmission mechanism;
a liquid dispensing container being a detachable sealing container and having a drainage outlet disposed on a bottom of the liquid dispensing container;
at least one nozzle head disposed above the roller brush or on a side of the roller brush; each nozzle head comprising a nozzle, and the nozzle facing the roller brush;
a forked pipe comprising a main pipe and at least one branch pipe communicating with each other, the main pipe communicating with the drainage outlet, and each branch pipe communicating with a nozzle head; and a water pump disposed on the main pipe; wherein the liquid dispensing container comprises: a column-shaped portion;
a taper portion having a bottom surface connected to a lower bottom surface of the column-shaped portion; and
the drainage outlet, further disposed on a top point of the taper portion, wherein liquid in the liquid dispensing container and the taper portion are collectively structured and configured to move liquid downward from the column-shaped portion, flow downward out of the taper portion and flow downward into the drainage outlet;
wherein the control system, according to requirement, transmits at least one water pump control signal to the water pump, switches on the water pump and adjusts water-pumping speed of the water pump to make the liquid in the liquid dispensing container flow out to the nozzle head through the forked pipe and form tiny liquid droplets being radially sprayed to the rover brush, and the roller brush drives the liquid to fall onto the solar panel while the roller brush is used to clean the solar panel.

US Pat. No. 10,511,242

METHOD FOR AUTONOMOUS OPERATION OF ELECTRICITY-GENERATING DEVICE

MEIDENSHA CORPORATION, T...

1. A method for an autonomous operation of an electricity-generating device interconnected to an electric power system,the electricity-generating device comprising:
a permanent magnet power generator coupled to a water turbine;
first and second converters having forward/inverse conversion functions;
a smoothing capacitor connected to a DC linkage unit between the first and second converters; and
a control unit outputting control commands to the first and second converters,
wherein, when the autonomous operation of the electricity-generating device is conducted, the autonomous operation is an operation in which the electricity-generating device is separated from the electric power system,
the method comprising:
controlling, by the first converter, a voltage of the DC linkage unit to be constant,
causing a load connected to the electricity-generating device to be connected or disconnected, and
always operating the electricity-generating device along an efficiency-characteristics curve, when the autonomous operation of the electricity-generating device is conducted, that corresponds to an aperture of an inlet valve of the water turbine and is based on a shaft input and a rotational speed, only within a speed range from a rated speed, at which the shaft input of the efficiency-characteristics curve becomes maximum, to a maximum speed, at which the shaft input becomes minimum, in the efficiency-characteristics curve of the water turbine.

US Pat. No. 10,511,237

METHOD OF DRIVING A DRIVING APPARATUS

TDK CORPORATION, Tokyo (...

1. A method of driving a driving apparatus, comprising:expanding and contracting a piezoelectric element in accordance with a driving signal;
connecting a supporting shaft to said piezoelectric element;
frictionally engaging a movable body with said supporting shaft, the movable body being capable of moving along said supporting shaft; and
moving said movable body in a first direction towards said piezoelectric element by applying said driving signal including a first driving signal against said piezoelectric element, wherein said applying further comprises repeatedly applying said first driving signal against said piezoelectric element by taking a first rest time in between each repetition of said first driving signal, and
wherein said first driving signal comprises a main driving waveform group and a sub driving waveform group which is placed after said main driving waveform group by having a second rest time shorter than said first rest time in between said main driving waveform group and said sub driving waveform group.

US Pat. No. 10,511,232

ADAPTIVE CONTROL OF SYNCHRONOUS RECTIFIER

1. A current loop powered DC-DC converter comprising a transformer having a primary winding and a secondary winding establishing a primary side and a secondary side, the primary winding being connected to a transformer drive circuitry arranged to provide a drive signal onto the primary winding, the secondary winding being connected to at least one rectifier, characterized in that the rectifier is realized as an active rectifier, comprising a FET-transistor and a rectifier drive circuitry arranged to provide a gate drive signal for the FET-transistor, wherein the rectifier drive circuitry comprises a phase detector arranged to detect a phase difference between a representation of a pulse of a transformer transferred driver signal present at the secondary side of the transformer and a representation of a pulse of the gate drive signal for the active rectifier FET transistor, wherein an output signal of the phase detector is connected to a charge balance circuitry arranged to control by a charge balance circuitry output voltage a pulse length of the active rectifier FET transistor gate drive signal, wherein the charge balance circuitry comprises a charge pump and a low pass filter; and wherein the representation of the pulse of the gate drive signal comprises a pulse-stretched representation of the pulse.

US Pat. No. 10,511,230

ADAPTIVE WAKEUP TIME CONTROL IN BURST MODE OF A PRIMARY SIDE REGULATED FLYBACK CONVERTER

Apple Inc., Cupertino, C...

1. A power converter comprising:a primary side having a primary winding operatively coupled to an input power source by a power switch;
a secondary side having a secondary winding magnetically coupled to the primary winding and electrically coupled to an output configured for connection to a load;
an auxiliary winding magnetically coupled to the secondary winding and operatively coupled to a controller configured to operate the power switch responsive to a reflected output voltage sensed via the auxiliary winding to alternately close, thereby storing energy from the input power source in the primary winding, and open, thereby delivering energy from the secondary winding to the output, wherein the controller is further configured to:
operate in a voltage regulation mode when a voltage error signal of the power converter exceeds a first threshold; and
transition to an energy regulation mode when the voltage error signal of the power converter falls below the first threshold, wherein the energy regulation mode comprises a burst mode of operation in which the controller is configured to operate the power switch to deliver a number of pulses, thereby causing the reflected output voltage to reach an output voltage high threshold and suspend switching for a predetermined time period before delivering a further number of pulses, wherein the controller is further configured to count the number of pulses and:
responsive to a determination that the count is less than a predetermined minimum number of pulses, increase the predetermined time period; or
responsive to a determination that the count is greater than a predetermined maximum number of pulses, decrease the predetermined time period.

US Pat. No. 10,511,229

POWER CONVERTER WITH TWO CAPACITORS ACCOMMODATED IN A HOUSING

DENSO CORPORATION, Kariy...

1. A power converter for converting an input voltage into a predetermined voltage, comprising:a housing comprising a conductive portion;
at least two capacitors accommodated in the housing and electrically connected to the conductive portion of the housing;
a transformer accommodated in the housing and configured to serve as a choke coil, the transformer comprising a winding and a core surrounding the winding with a portion of the winding being exposed from the core, the winding including a lead that is led out from the exposed portion of the winding to an exterior of the transformer; and
a filter circuit accommodated in the housing, the filter circuit being electrically connected to the lead and configured to remove conducted noise,
wherein the at least two capacitors, the lead, and the conductive portion of the housing form a loop circuit together,
at least part of the exposed portion of the winding overlaps an internal region of the loop circuit, in a front view of the transformer as seen from a direction in which the lead is led out from the exposed portion of the winding,
the transformer is disposed within the housing such that the exposed portion of the winding is oriented toward the filter circuit,
the internal region of the loop circuit is interposed between the at least part of the exposed portion of the winding and the filter circuit, and
a whole extent of the exposed portion of the winding overlaps the internal region of the loop circuit, in the front view of the transformer as seen from the direction in which the lead is led out from the exposed portion of the winding.

US Pat. No. 10,511,226

SYSTEMS, METHODS, AND APPARATUS FOR REGULATING A SWITCHED MODE POWER SUPPLY

Texas Instruments Incorpo...

1. A power converter comprising:a first comparator including a first input;
a ramp generator coupled to the first input; and
a current balance circuit coupled to the ramp generator, the current balance circuit including:
a transistor including a first current terminal, a second current terminal, and a gate;
a multiplier circuit coupled to the first current terminal;
a second comparator coupled to the gate;
a first current source coupled to the first current terminal and the multiplier circuit; and
a second current source coupled to the second current terminal and the second comparator.

US Pat. No. 10,511,222

WIRELESS POWER TRANSMITTER HAVING LOW NOISE AND HIGH EFFICIENCY, AND RELATED METHODS

Integrated Device Technol...

1. A wireless power transmitter, comprising:a bridge inverter including
a first switch and a second switch coupled together with a first switching node therebetween, the first and second switches being in series between a first terminal and a second terminal, the first and second terminals to receive a DC power signal comprising a first terminal voltage and a second terminal voltage lower in magnitude than the first terminal voltage; and
a first capacitor coupled between the first switching node and a first voltage;
wherein the first switch is controlled by a first control signal, and the second switch is controlled by a second control signal;
control logic configured to generate the first and second control signals to complementarily open and close the first switch and the second switch according to an operating frequency to generate an AC power signal from the DC power signal, the control logic generating the first and second control signals complimentarily opening and closing the first switch and the second switch with a first delay between generating the first control signal to open the first switch and generating the second control signal to close the second switch, and with a second delay between generating the second control signal to open the second switch and generating the first control signal to close the first switch; and
a resonant tank operably coupled to the first switching node of the bridge inverter, the resonant tank configured to receive the AC power signal and generate an electromagnetic field responsive thereto;
wherein a capacitance of the first capacitor is sufficient to lengthen, by a factor of at least 7.5, a length of time for the first switching node voltage to reach the first terminal voltage during the second delay.

US Pat. No. 10,511,219

SWITCHING POWER SUPPLY WITH A MEASURING AND CALCULATING PROCESS FOR THE SWITCHING TIMES

TDK CORPORATION, Tokyo (...

1. A switching power supply comprising:a power converter that includes a series circuit with a boost inductor, to which an input voltage Vi is applied, and a switch, and a synchronous rectifier connected to a junction between the boost inductor and the switch, and converts the input voltage Vi to an output voltage Vo which is outputted;
a zero current detector that includes a detection winding, which is magnetically coupled to the boost inductor and outputs a zero current detection signal whose voltage value changes in proportion to a voltage across the boost inductor, and detects zero timing at which an inductor current flowing in the boost inductor becomes zero;
a controller that executes an on/off control process that sets the switch in an on state based on the zero timing, causes energy to accumulate in the boost inductor, switches the switch from the on state into an off state, then sets the synchronous rectifier in a synchronous rectification state to have the energy discharged from the boost inductor to cause the power converter to output the output voltage Vo; and
a voltage meter that measures the input voltage Vi and the output voltage Vo,
wherein the controller causes a second on period T2, where the synchronous rectifier is set in the synchronous rectification state, to end before the zero timing by executing:
a first measuring process that measures a first on period T1 where the switch is set in an on state;
a second on period calculating process that calculates, when a correction time for the second on period T2 is expressed as Tc, the second on period T2 according to a following expression
T2=T1×|Vi|/(Vo?|Vi|)?Tc;
the on/off control process that sets the synchronous rectifier in the synchronous rectification state for only the second on period T2 calculated by the second on period calculating process;
a second measuring process that measures an elapsed time from an end of the second on period T2 to a start of the first on period T1; and
a correction time changing process that changes the correction time Tc so that the elapsed time measured by the second measuring process becomes a target time set in advance.

US Pat. No. 10,511,208

RECIPROCATING TOOL

MAKITA CORPORATION, Anjo...

1. An electric power tool having a front end and a rear end, the electric power tool comprising:a tool holding portion at the front end, the tool holding portion configured to hold a removable tool;
a brushless motor having a stator and a rotor inside of the stator, the rotor being configured to drive the tool holding portion;
an inner motor housing enclosing the brushless motor;
an outer tool housing comprising:
a motor housing region surrounding the inner motor housing; and
a loop shaped handle at the rear end of the power tool, the loop shaped handle configured with outer air intake openings configured to feed cooling air to the brushless motor;
a fan located at a front side of the rotor; and
a plate located at a front side of the stator and a rear side of the fan;
wherein the plate is attached to the inner motor housing.

US Pat. No. 10,511,206

CEILING FAN

FOSHAN CARRO ELECTRICAL C...

1. A ceiling fan, comprising:a rotary shaft;
a stator; and
a rotor, the rotor comprising an inner annular chamber, a magnetic-shoe fixation portion, a connection portion, and a bearing installation portion; wherein:
the stator is housed in the inner annular chamber of the rotor;
the bearing installation portion is disposed at one side of the magnetic-shoe fixation portion;
one end of the connection portion is fixed on the magnetic-shoe fixation portion, the other end of connection portion is fixed on the bearing installation portion, and the magnetic-shoe fixation portion, the bearing installation portion are integrated with the connection portion; and
geometric centers of the rotary shaft, the stator, the magnetic-shoe fixation portion, and the bearing installation portion are located in a straight line.

US Pat. No. 10,511,204

COOLING FAN STRUCTURE WITH ROTATIONAL CYLINDRICAL FAN BLADES

ASIA VITAL COMPONENTS CO....

1. A cooling fan structure with rotational cylindrical fan vanes, comprising:a rotary body including a rotor assembly and a stator assembly corresponding to the rotor assembly for driving the rotor assembly to rotate, the rotor assembly including a hub, the hub having a top section and a circumferential section; and
multiple rotational cylindrical bodies rotatably disposed on the top section or the circumferential section of the hub, whereby when the rotary body rotates, the rotational cylindrical bodies are driven by the rotary body to self-rotate.

US Pat. No. 10,511,202

ROTATING ELECTRIC MACHINE

MITSUBISHI ELECTRIC CORPO...

1. A rotating electric machine comprising:an armature; and
a rotor rotatably arranged on an inner circumferential side of the armature with a gap interposed therebetween, wherein
the armature includes an armature core, armature coils mounted to the armature core, and phase to phase insulators for insulating coil end parts of the armature coils,
the armature coils are formed such that (4n+2) number of slot accommodation portions of single coils forming the armature coils are arranged so as to be stacked in a radial direction in slots of the armature core, n being a natural number,
on an anti-wire-connection side, a coil end extending in a circumferential direction from the slot accommodation portion in a first layer on an innermost side in the radial direction in the slot and a coil end extending in the circumferential direction from the slot accommodation portion in a second layer extend toward the same direction, or a coil end extending in the circumferential direction from the slot accommodation portion in a (4n+1)th layer and a coil end extending in the circumferential direction from the slot accommodation portion in a (4n+2)th layer extend toward the same side, and
the phase to phase insulators are provided between the coil ends that extend toward directions opposite to each other in the circumferential direction and are adjacent in the radial direction, and the phase to phase insulator is not provided between the coil ends that extend toward the same direction in the circumferential direction and are adjacent in the radial direction.

US Pat. No. 10,511,200

STATOR AND ELECTRIC MOTOR WITH CANCEL COIL FOR REDUCING UNBALANCED MAGNETIC FLUX

TOYOTA JIDOSHA KABUSHIKI ...

1. A stator for an electric motor, the stator comprising:a stator core comprising:
a yoke having an annular shape, and
a plurality of teeth protruding from an inner circumferential side of the yoke in a stator radial direction;
a stator coil wound around the teeth, the stator coil being configured to generate a rotating magnetic field as a current is applied to the stator coil; and
a cancel coil extending in a stator axial direction at positions on the inner circumferential side and an outer circumferential side relative to the yoke, the cancel coil being wound around the stator core such that the cancel coil extends in the stator radial direction at positions outside the stator core in the stator axial direction and traverses the yoke,
wherein the stator coil comprises phase coils including a U-phase coil, a V-phase coil, and a W-phase coil,
wherein the U-phase coil, the V-phase coil, and the W-phase coil are connected to one another,
wherein the cancel coil has a plurality of first element coils corresponding to the U-phase coil and wound at different locations, a plurality of second element coils corresponding to the V-phase coil and wound at different locations, and a plurality of third element coils corresponding to the W-phase coil and wound at different locations, and
wherein the cancel coil has a plurality of closed circuits in each of which one first element coil, one second element coil, and one third element coil are connected in series.

US Pat. No. 10,511,199

ROTARY MACHINE AND METHOD FOR MANUFACTURING ROTARY MACHINE

IHI CORPORATION, Tokyo (...

1. A rotary machine comprising:an annular stator including:
an annular yoke portion;
salient poles protruding toward a radial inner side and arranged in a circumferential direction; and
a coil provided on the salient poles,
wherein a circumferential surface of each of the salient poles is a tapered surface tapered toward a tip of the salient pole, and
wherein the coil includes:
a first coil having an inner circumferential surface inclined along the tapered surface of the salient pole and an outer circumferential surface inclined toward the radial inner side of the stator; and
a second coil provided on the salient pole adjacent to the salient pole on which the first coil is provided and having an inner circumferential surface inclined along the tapered surface of the salient pole and an outer circumferential surface inclined toward a radial outer side of the stator,
the outer circumferential surface of the first coil is inclined as it approaches the salient pole on which the first coil is provided from a first end portion toward a second end portion of the first coil, wherein the first end portion is on the radial outer side of the stator, and the second end portion is on the radial inner side of the stator, and
the outer circumferential surface of the second coil is inclined as it departs from the salient pole on which the second coil is provided from a third end portion toward a fourth end portion of the second coil, wherein the third end portion is on the radial outer side of the stator, and the fourth end portion is on the radial inner side of the stator.

US Pat. No. 10,511,198

ROTARY ELECTRICAL MACHINE, AND ROTOR FOR ROTARY ELECTRICAL MACHINE

Hitachi Automotive System...

1. A rotor for rotary electrical machine provided with a stator, the rotor comprising:a rotor core including a plurality of magnetic poles, each magnetic pole of the rotor having a magnet insertion hole formed in the rotor core, and a permanent magnet inserted into the magnet insertion hole so that a gap in a circumferential direction of the rotor has a gap boundary defined by one circumferentially oriented end of the permanent magnet and an adjacent end surface of the magnet insertion hole defined by the rotor core, wherein
each magnet insertion hole defines a clearance part formed at a position of the magnet insertion hole corresponding to corners at both peripheral ends of the inserted permanent magnet closest to an inner periphery of the rotor core,
at least one said clearance part has a facing surface that is formed to face a radially inwardly oriented surface of the permanent magnet counter to the facing surface of the clearance part,
the facing surface of the at least one said clearance part has facing surface sections between points at which the facing surface changes direction extending linearly between the points so that two obtuse angles are formed by three straight portions of the facing surface contiguous with the points at which the facing surface changes direction, and
the center portion of the three straight portions is parallel to the radially inwardly oriented surface of the permanent magnet counter to the facing surface of the clearance part.

US Pat. No. 10,511,194

WIRELESS POWER TRANSFER SYSTEM

Murata Manufacturing Co,....

1. A wireless power transfer system comprising:a power transmitter including a power transmitting coil, a power transmitting resonance capacitor forming a power transmitting resonance mechanism together with the power transmitting coil, and a power-transmitting alternating current voltage generating circuit configured to generate an alternating-current voltage in the power transmitting coil by driving a switching element electrically connected to the power transmitting coil at a predetermined operating frequency to intermittently apply a direct-current input voltage to the power transmitting resonance mechanism; and
a plurality of power receivers, each including a power receiving coil, a power receiving resonance capacitor forming a power receiving resonance mechanism together with the power receiving coil, and a power receiving rectifier circuit connected to the power receiving coil and configured to rectify the alternating-current voltage to a direct-current output voltage;
electric field energy and magnetic field energy of each of the power transmitting resonance mechanism and the power receiving resonance mechanism interact with each other to form an electromagnetic resonance field;
between the power transmitting coil and the power receiving coil, magnetic field coupling by mutual inductance and electric field coupling by mutual capacitance form electromagnetic field resonance coupling; and
power is wirelessly supplied from the power transmitter to the power receivers,
the power receiving rectifier circuit being configured in series with the power receiving resonance mechanism, and configured such that the magnetic field energy of the power receiving resonance mechanism is supplied to a load;
the plurality of power receivers include a first power receiver having a load with a first equivalent resistance value and having a voltage gain whose frequency response is a double-peaked response with two maximum values, the voltage gain being a ratio of the direct-current output voltage to the direct-current input voltage, and a second power receiver having a load with a second equivalent resistance value larger than the first equivalent resistance value and having a voltage gain whose frequency response is a single-peaked response;
for the first power receiver, by setting a coupling coefficient between the power receiving coil of the first power receiver and the power transmitting coil, the voltage gain is determined by a positional relationship between the higher of frequencies corresponding to the two maximum values in the first power receiver and the operating frequency; and
for the second power receiver, a frequency at which the voltage gain is maximum is determined so as to be equal to the operating frequency, and the voltage gain in the second power receiver is determined by setting a coupling coefficient between the power receiving coil of the second power receiver and the power transmitting coil.

US Pat. No. 10,511,191

APPARATUS AND METHODS FOR WIRELESS POWER TRANSMITTER COIL CONFIGURATION

QUALCOMM Incorporated, S...

1. An apparatus for wirelessly transmitting power, the apparatus comprising:a first coil loop defining a first area, the first coil loop conducting current having a first current value that is proportional to the first area and generating a first magnetic field, wherein the first coil loop includes a first number of turns, the first number of turns being proportional to the first area defined by the first coil loop to achieve the first current value that is proportional to the first area; and
a second coil loop surrounding the first coil loop and defining a second area, the second coil loop conducting current having a second current value that is proportional to the second area and generating a second magnetic field, wherein the second coil loop includes a second number of turns, the second number of turns being proportional to the second area defined by the second coil loop to achieve the second current value that is proportional to the second area, wherein a ratio of the first current value to the first area is equal to a ratio of the second current value to the second area, wherein the second current value is an integer multiple of the first current value, and wherein the second area is an integer multiple of the first area.

US Pat. No. 10,511,185

SOLAR OUTDOOR FURNITURE

ZHEJIANG YOTRIO GROUP CO....

1. Solar outdoor furniture, comprising:a furniture body having an object holding portion, and the object holding portion having a glass panel;
a control module disposed at the object holding portion; and
a solar power generation module disposed at one side of the glass panel and electrically connected with the control module;
wherein the solar power generation module comprises at least one photovoltaic panel, the object holding portion further has an aluminum frame; the glass panel is combined with the aluminum frame below glass panel so as to become a module, the photovoltaic panel is sealed in the module, and a circuit in the aluminum frame is connected to the control module.

US Pat. No. 10,511,179

ENERGY STORAGE-AWARE DEMAND CHARGE MINIMIZATION

NEC Corporation, (JP)

1. A computer-implemented method for power management, comprising:determining a demand threshold by solving an optimization problem that minimizes peak demand charges and maximizes a usable lifetime for a power storage system; and
providing power to a load from an electrical grid when the load is below the demand threshold and from a combination of the electrical grid and the power storage system when the load is above the demand threshold.

US Pat. No. 10,511,177

MODULAR CHARGING SYSTEM AND METHOD OF DELIVERING ELECTRIC POWER THROUGH THE SAME

Group Dekko, Inc., Garre...

1. A power delivery system for powering consumer devices, comprising:an AC-to-DC power supply configured to convert input AC power to output initial DC power;
a first power delivery unit electrically coupled to said power supply and having at least one output port, said first power delivery unit being configured as a DC-to-DC power converter which converts the output initial DC power to provide converted DC power through said at least one output port, the converted DC power having at least one of a different voltage and a different current than the output initial DC power; and
a second power delivery unit electrically coupled to one of said power supply and said first power delivery unit through an input port and having at least one output port, said second power delivery unit being configured as a DC-to-DC power converter which converts power received through said input port to provide an output DC power through said at least one output port, the output DC power having at least one of a different voltage and a different current than the power received through said input port, wherein the at least one output port of the second power delivery unit is a universal serial bus (USB) port, wherein the at least one output port of the first power delivery unit is a USB port, the first power delivery unit and the second power delivery unit are electrically connected in series and the first and second power delivery units provide simultaneous electrical power output.

US Pat. No. 10,511,174

MICROINVERTER SYSTEMS AND SUBSYSTEMS

SunPower Corporation, Sa...

1. An alternating current (AC) module system comprising:a plurality of AC photovoltaic (PV) branch circuits;
a PV controller coupled to each of the plurality of ACPV branch circuits and configured to aggregate power from the coupled branch circuits, the PV controller configured to perform a nonredundant ACPV operational function for each of the ACPV branch circuits, the performance of the nonredundant ACPV operational function requiring an exchange of ACPV operational data between the ACPV branch circuits and the PV controller;
a gateway device located within the PV controller configured to permit control of the operational functions of each of the plurality of ACPV branch circuits, the control capable of being performed apart from the PV controller; and
a power supply located within the gateway device configured to supply power to the plurality of ACPV branch circuits.

US Pat. No. 10,511,166

VOLTAGE CONVERTER HAVING A REVERSE POLARITY PROTECTION DIODE

1. A voltage converter comprising:a first input terminal and a second input terminal, wherein an electrical input voltage is applicable between the first input terminal and the second input terminal;
a switch branch having a switch, wherein the switch is configured to close a circuit path between the first input terminal and the second input terminal;
a reverse polarity protection diode which is connected in series with the switch in the switch branch;
a third input terminal, wherein a further electrical input voltage is applicable between the second input terminal and the third input terminal;
a further switch branch having a further switch, wherein the further switch is configured to close a further circuit path between the second input terminal and the third input terminal; and
a further reverse polarity protection diode which is connected in series with the further switch in the further switch branch.

US Pat. No. 10,511,165

CIRCUIT ASSEMBLY FOR PROTECTING A UNIT TO BE OPERATED FROM A SUPPLY NETWORK AGAINST OVERVOLTAGE

1. A circuit assembly for protecting a unit (2) to be operated from a supply network (1) against overvoltage, comprising an input having a first and a second input connection, which are connected to the supply network (1), and an output having a first and a second output connection, to which the unit (2) to be protected can be connected, and a protection circuit which is provided between the first and the second input connections in order to limit the voltage applied to the protection circuit,characterized in that
the protection circuit has a power semiconductor (IGBT; HS), wherein a series connection of a Zener element (ZE) and at least one of a bidirectional diode (diac) and a thyristor diode is connected between the collector and the gate of the power semiconductor, wherein the sum of the Zener voltage and the diode voltage results in a clamping voltage for the power semiconductor (IGBT; HS), which lies above the voltage of the supply network (1) and defines the protection level;
characterized in that
a thyristor (TH) is connected in parallel to the power semiconductor (HS); and
characterized in that
the thyristor's (TH) anode is connected to the collector, and the thyristor's (TH) cathode to the emitter of the power semiconductor (HS), with the thyristor's (TH) gate communicating with the gate of the power semiconductor (HS).

US Pat. No. 10,511,164

APPARATUS FOR PREVENTING ELECTRIC SHOCK IN EVENT OF FLOODING AND METHOD THEREFOR

AMS CO., LTD, Gunpo-si (...

1. An apparatus for preventing electric shock in an event of flooding, the apparatus comprising:a transformer supplying a voltage by using a neutral grounding system in a single-phase two-wire low-voltage power distribution system;
an earth leakage circuit breaker connected to power supply lines extending from the transformer;
an electric current measurement unit measuring the amount of electric current passing through the earth leakage circuit breaker;
a control unit outputting a control signal corresponding to a contact resistance to be compensated for the contact resistance being calculated by using the amount of electric current output from the electric current measurement unit; and
a contact resistance compensation unit compensating for the contact resistance in response to the control signal output from the control unit.

US Pat. No. 10,511,162

RANGE EXTENDER AND CIRCUIT PROTECTION METHOD

GENERAL ELECTRIC COMPANY,...

1. A range extender, comprising:a first DC-to-DC converter having a first input side and a first output side;
a second DC-to-DC converter having a second input side and a second output side, wherein the second output side is coupled to the first output side;
a first bypass device coupled between the first input side and the first output side;
a second bypass device coupled between the second input side and the second output side; and
a controller configured to selectively:
control the first and second DC-to-DC converters to respectively convert a first input voltage at the first input side and a second input voltage at the second input side into an output voltage in a normal mode when the output voltage is higher than a critical voltage;
control the first bypass device such that the first DC-to-DC converter is bypassed in a first safety mode when the output voltage is lower than or equal to the critical voltage and the first input voltage is higher than the second input voltage; and
control the second bypass device such that the second DC-to-DC converter is bypassed in a second safety mode when the output voltage is lower than or equal to the critical voltage and the second input voltage is higher than the first input voltage;
wherein the critical voltage is equal to a difference between the higher of the first and second input voltages and a voltage drop of the respective bypass device.

US Pat. No. 10,511,160

DETECTION AND PROTECTION OF POWER PHASE LOSS AND NEUTRAL FAILURE

1. A protection circuit providing a control voltage to a 3-phase contactor the protection circuit comprising:four input terminals, configured to be connected respectively to three phases and to the neutral line of the 3-phase power supply, wherein the three phases of the 3-phase power supply are inputs to the 3-phase contactor;
an output terminal, providing the control voltage to a control line of the 3-phase contactor; and
a control circuit configured to provide the control voltage to the control line when any one or more of the three phases are live and when the neutral line is connected, and to provide no control voltage when the neutral line is floating
wherein the control circuit is comprised of: at least two cross-connected relays, wherein each relay includes at least one normally open connection and at least one normally close connection, and wherein the output of the at least two cross-connected relays provides a single phase voltage as the control voltage when any one of the three phases is disconnected.

US Pat. No. 10,511,158

METHOD FOR PRODUCING A MULTIPLICITY OF SURGE ARRESTERS IN AN ASSEMBLY, SURGE ARRESTER AND SURGE ARRESTER ASSEMBLY

EPCOS AG, Munich (DE)

1. A method for manufacturing a plurality of arresters, the method comprising:providing a ceramic carrier having a plurality of holes;
providing first and second electrode bodies, wherein each of the first and second electrode bodies comprise a plurality of protuberances;
assembling the ceramic carrier and the first and second electrode bodies under a gas atmosphere into a base body, wherein the ceramic carrier is located between the first and second electrode bodies such that the protuberances engage with and extend into the holes of the ceramic carrier;
soldering the first and second electrode body to the ceramic carrier; and
separating the base body into a plurality of gas-filled arresters.

US Pat. No. 10,511,156

LIGHTNING CURRENT TRANSMISSION SYSTEM FOR WIND TURBINES

1. A lightning current transmission system between the blades (10) and a nacelle (13) of a wind turbine, comprising:a metal band (18) located at a root of each blade (10) that receives lightning currents from one or more blade lightning current conductors located inside of each blade (10);
a metal ring (12) located at the nacelle (13) that transmits lightning currents to one or more lightning current conductors to drive the lightning currents to earth;
a lightning current transmission element (33) for transmitting lightning currents from the metal band (18) of each blade (10) to the metal ring (12), comprising a conductive portion (35), an insulating portion (37), and supporting means (30) to be joined to a rotor hub (21);
wherein:
the metal band (18) of each blade (10) and the metal ring (12) are configured with protruding parts (61, 63) extended towards the lightning current transmission element (33);
the conductive portion (35) of the lightning current transmission element (33) comprises first and second receptors (47, 47?) mounted on a base plate (41) at different heights and oriented in a direction pointing, respectively, to the protruding parts (61, 63) of the metal band (18) and the metal ring (12);
the base plate (41) comprises a pair of slotted holes (43, 43?) disposed separately at different heights on the base plate (41) and a pair of circular holes (45, 45?), each circular hole of the pair of circular holes (45, 45?) being disposed next to a center of each slotted hole of the pair of slotted holes (43, 43?) of the base plate (41);
each of the receptors (47, 47?) comprises a slotted hole (49, 49?); and
each of the receptors (47, 47?) is mounted on the base plate (41) with a first fastener (51) positioned on each of the circular holes (45, 45?) of the base plate (41) and on an end of each of the slotted holes (49, 49?) of each of the receptors (47, 47?), and with a second fastener (53) positioned on each of the slotted holes (43, 43?) of the base plate (41) and on each slotted hole of the slotted holes (49, 49?) of the receptors (47, 47?).

US Pat. No. 10,511,155

CABLE CONNECTOR TOOL

1. A connection tool, comprising:a base plate;
an aligning frame having a first end affixed to a first surface of said base plate;
a plurality of alignment apertures located on said aligning frame;
a depth cutoff frame having a first end affixed to said first surface of said base plate, parallel to said aligning frame;
an access area defined between said aligning frame and said depth cutoff frame;
a cutting and stripping assembly affixed to a first side of said depth cutoff frame, facing said access area;
a plurality of bores located on said depth cutoff frame first side, each of said bores are aligned with an individual one of said alignment apertures, and each extending into said depth cutoff frame at a specific depth; and,
wherein said alignment apertures are each configured to permit the passage of a selected amount of cables therethrough, each of said alignment apertures are provided with a plurality of corresponding numbered indicia located on said aligning frame first face to permit for instructional use in a sequential or staggered manner, each said corresponding numbered indicia positioned above said alignment apertures;
wherein said bores are each configured to permit the insertion of said selected amount of cables therethrough; and,
wherein said cutting and stripping assembly is positioned to fully provide a selected cutting or stripping means to said selected amount of cables through coaligned pairs of said apertures and said bores;
wherein said cutting and stripping assembly further comprises:
an upper movable arm having a first end pivotally attached to said depth cutoff frame first side;
a handle disposed on a second end of said upper movable arm;
a replaceable cutting blade removably attached to a bottom portion of said upper movable arm; and,
a fixed anvil affixed to said depth cutoff frame first side, said fixed anvil is subjacent said bores further having a plurality of slots, each said slots are located subjacent each one of said bores;
wherein said fixed anvil is configured to permit the passage of said selected amount of cables within selected ones of said bores;
wherein said bores each has a different depth; and
wherein an upper perimeter edge of said fixed anvil is coaligned with a common centerline of a horizontal axis of said bores.

US Pat. No. 10,511,153

SPARK PLUG

NGK SPARK PLUG CO., LTD.,...

1. A spark plug comprising:a ground electrode and
a center electrode
wherein at least one of the ground electrode and the center electrode, as a first electrode, includes:
an electrode body
an electrode tip layered with the electrode body in a layering direction; and
a weld part formed between the electrode body and the electrode tip;
the weld part has an orthogonal projection on a virtual plane perpendicular to the layering direction, wherein the orthogonal projection includes a plurality of projecting portions extending in a specific direction and being arranged in a direction perpendicular to the specific direction, wherein each of the plurality of projecting portions includes a peak in the specific direction;
the weld part satisfies a mathematical expression of B>A, where A represents a length of a first line segment, and B represents a length of a second line segment;
the first line segment is a virtual line segment connecting the peak of a first one of the plurality of projecting portions to the peak of a second one of the plurality of projecting portions adjacent to the first projecting portion; and
the second line segment is a virtual line segment that is perpendicular to the first line segment and connects the first line segment to a point of an outer periphery of the weld part, wherein the point is farthest from the first line segment in a section between the peaks of the first and second projecting portions facing the first line segment.

US Pat. No. 10,511,151

METHOD FOR FABRICATING A NANOSTRUCTURE

Technische Universitaet M...

1. A method for fabricating a nanostructure, comprising:growing a first nanowire on a substrate;
forming a dielectric layer on said substrate, said dielectric layer surrounding said first nanowire, wherein a thickness of said dielectric layer is smaller than a length of said first nanowire; and
removing said first nanowire from said dielectric layer, thereby exposing an aperture in said dielectric layer; and
growing a second nanowire in said aperture on said substrate wherein growing said second nanowire comprises growing a support element in said aperture, and extending said support element above said dielectric layer, and growing a body element around at least a portion of said support element that extends above said dielectric layer.

US Pat. No. 10,511,150

WAVELENGTH-VARIABLE LASER

FURUKAWA ELECTRIC CO., LT...

1. A wavelength-variable laser outputting a predetermined wavelength of laser light comprising:a quantum well active layer positioned between a p-type cladding layer and an n-type cladding layer in thickness direction;
a separate confinement heterostructure layer positioned between the quantum well active layer and the n-type cladding layer; and
an electric-field-distribution-control layer positioned between the separate confinement heterostructure layer and the n-type cladding layer and configured by at least two semiconductor layers having band gap energy greater than band gap energy of a barrier layer constituting the quantum well active layer, wherein the wavelength-variable laser has a function to select a specific wavelength by returning a specific wavelength in the wavelength-variable laser.

US Pat. No. 10,511,147

LASER DEVICE AND PROCESS FOR FABRICATING SUCH A LASER DEVICE

STMICROELECTRONICS SA, M...

1. A III-V heterostructure laser device arranged in and/or on a silicon substrate, comprising:a III-V heterostructure gain medium being integrated on the silicon substrate; and
an optical rib waveguide, arranged facing the gain medium and comprising a slab waveguide equipped with a longitudinal rib, the optical rib waveguide being arranged in the silicon substrate;
wherein the optical rib waveguide is oriented so that a Bragg grating is arranged on a side of the slab waveguide and is directly beneath and facing the III-V heterostructure gain medium and which is proximal relative to the gain medium without being arranged on a side of the slab waveguide that is distal relative to the gain medium, and in that the longitudinal rib is placed on the side of the slab waveguide that is distal relative to the gain medium.

US Pat. No. 10,511,141

APPARATUS AND METHOD FOR PROVIDING OPTICAL RADIATION

SPI Lasers UK Limited, H...

1. Apparatus for providing optical radiation, which apparatus comprises a laser diode, a pulse generator, and a modulator, wherein:the pulse generator is configured to emit picosecond pulses;
the modulator is configured to emit nanosecond pulses;
the laser diode has a first terminal and a second terminal;
the pulse generator is connected to the first terminal; and
the modulator is configured to bias the laser diode below a lasing threshold of the laser diode,
and the apparatus being characterized in that:
the modulator is connected to the second terminal;
the pulse generator comprises a semiconductor junction connected to a differentiator;
the semiconductor junction is such that electric current flowing through the semiconductor junction can be turned off more quickly than it can be turned on; and
the differentiator is such that a step change that occurs when the electric current flowing through the semiconductor junction is turned off is converted to an electrical pulse, thereby gain switching the laser diode such that it emits an optical pulse having an optical pulse width less than 1 ns.

US Pat. No. 10,511,140

LIGHT-EMITTING DEVICE

EPISTAR CORPORATION, Hsi...

1. A light-emitting device comprising:a substrate;
multiple radiation emitting regions arranged on the substrate, and comprising:
a first radiation emitting region emitting a coherent light when the light-emitting device is driven by a first current; and
a second radiation emitting region capable of emitting coherent light and emitting an incoherent light when the light-emitting device is driven by the first current; and
a contact layer with multiple discrete contact regions;
wherein each of the first radiation emitting region and the second emitting region comprises a first DBR stack, a light-emitting structure, and a second DBR stack; and
wherein the multiple discrete contact regions has a first contact region on the second DBR stack of the first radiation emitting region and a second contact region on the second DBR stack of the second radiation emitting region.

US Pat. No. 10,511,138

LASER COMPONENT AND METHOD OF PRODUCING SAME

OSRAM Opto Semiconductors...

1. A laser component comprising a housing that comprises a base section comprising a top side and an underside,wherein a plurality of electrical soldering contact pads are configured at the underside of the base section, said electrical soldering contact pads enabling surface mounting of the laser component,
a plurality of electrical chip contact pads are configured at the top side of the base section and electrically conductively connect to the soldering contact pads,
the housing comprises a cavity adjoining the top side of the base section,
the housing comprises a plastics material,
a laser chip is arranged in the cavity and electrically conductively connects to at least some of the chip contact pads,
the base section comprises a leadframe embedded into the plastics material,
the soldering contact pads and the chip contact pads are formed by surfaces of sections of the leadframe,
the leadframe is completely planar, and
the laser chip comprises an electrical contact pad configured at an underside of the laser chip, wherein the laser chip is arranged on one of the chip contact pads such that the underside of the laser chip faces the chip contact pad.

US Pat. No. 10,511,136

LIGHT MODULE COMPRISING A LASER ELEMENT

VALEO VISION, Bobigny (F...

1. A light module for a motor vehicle, the light module being designed to emit an exit light beam and comprising:at least one semiconductor laser element designed to emit a laser beam in a first cone of light;
a photoluminescent element designed to receive at least a portion of said laser beam and to emit a light with a wavelength different than a wavelength of the first cone of light;
a reflection surface that is substantially parabolic and reflects the light coming from the photoluminescent element into said exit light beam oriented in a direction of emission;
a guiding portion arranged to guide at least a portion of the light emitted in said first cone of light into a second cone of light;
at least one device for detection of incident light greater than a predetermined threshold of luminous intensity, the detection device being arranged outside of the second cone of light; and
an optical element arranged across the second cone of light in order to deviate the incident light into a third cone of light directed toward the detection device.

US Pat. No. 10,511,135

LASER SYSTEM WITH MECHANICALLY-ROBUST MONOLITHIC FUSED PLANAR WAVEGUIDE (PWG) STRUCTURE

Raytheon Company, Waltha...

1. An apparatus comprising:a planar waveguide (PWG) amplifier having a narrower fast axis dimension and a broader slow axis dimension, the PWG amplifier comprising a core region, a cladding layer, and a rigid structural backbone attached to the cladding layer opposite the core region, the PWG amplifier configured to receive pump light, the core region configured to amplify an input beam using energy from the pump light to generate an amplified output beam; and
a cooling fluid configured to cool the core region, the cladding layer having a lower refractive index than the core region and the cooling fluid having a lower refractive index than the core region and the cladding layer such that the cladding layer and the cooling fluid support guiding of the input beam and the pump light in the fast axis dimension within the PWG amplifier;
the PWG amplifier also comprising first and second endcaps attached to opposite faces of the core region, the cladding layer, and the structural backbone, the first endcap configured to pass the input beam to the core region, the second endcap configured to pass the amplified output beam from the core region;
wherein the core region, the cladding layer, and the endcaps collectively form a monolithic fused structure; and
wherein each of the endcaps has a major outer surface that is larger in area than a combined area of the faces of the core region, the cladding layer, and the structural backbone to which the endcap is attached.

US Pat. No. 10,511,133

DEVICE FOR GENERATING LINEARLY POLARIZED ULTRA-SHORT TERAHERTZ WAVE

Korea Atomic Energy Resea...

1. A device for generating a linearly polarized ultra-short terahertz wave, comprising:a parabolic mirror barrel configured to extend in one direction, and having a parabolic mirror concaved on an upper surface thereof, with an end surface of the parabolic mirror perpendicular to the extending direction forming a parabola;
a plurality of thin films configured to be arranged on the parabolic mirror in the extending direction of the parabolic mirror barrel and having at least some areas thereof disposed to overlap each other; and
an electron accelerator configured to generate an electron beam passing through the plurality of thin films,
wherein spacing spaces are formed between some areas in which the plurality of thin films overlap each other, and when the electron beam passes through the plurality of thin films and the spacing spaces, a linearly polarized terahertz wave is generated between the spacing spaces.

US Pat. No. 10,511,131

TERMINAL CRIMPING DEVICE

YAZAKI CORPORATION, Toky...

1. A terminal crimping device comprising:a terminal feeding device that feeds, to a crimping position at which a crimp terminal is crimped to an end portion of an electric wire, the crimp terminal on which a crimping process has not yet been performed;
a crimping device that crimps the crimp terminal having been fed to the crimping position to the end portion of the electric wire by using a first die and a second die; and
an electric-wire holding mechanism that holds the electric wire with the end portion of the electric wire placed above an electric-wire connecting portion of the crimp terminal, wherein
the electric-wire holding mechanism includes
an electric-wire placing portion on which the electric wire is placed with the end portion of the electric wire placed above the electric-wire connecting portion of the crimp terminal, and
an electric-wire presser that is moved downward toward the electric-wire placing portion and presses and thereby holds the electric wire placed on the electric-wire placing portion, and
between the electric-wire placing portion and a lower surface of the electric-wire presser, an electric-wire holding space is formed that inclines in a same direction to a declining direction in which the end portion of the electric wire is declined in association with downward movement of the second die toward the first die, and that holds the end portion of the electric wire in a thus inclined state placed above the electric-wire connecting portion of the crimp terminal.

US Pat. No. 10,511,126

MOVABLE CONNECTOR

AUTONETWORKS TECHNOLOGIES...

1. A movable connector comprising:a connector having a housing; and
a connector mounting part that has a facing surface that faces the connector and to which the housing is movably mounted with the facing surface facing the connector,
wherein the connector includes at least one mounting pin, each at least one mounting pin comprising a plurality of elastic pieces that are, in cross-section, arranged in a circular configuration,
wherein the connector mounting part includes at least one ring shaped piece defining at least one tubular mounting recess that is configured to receive the at least one mounting pin when the housing is connected to the connector mounting part,
wherein the at least one ring shaped piece has an end extending outwardly from the facing surface of the connector mounting part that faces the connector,
wherein the at least one mounting pin is capable of relative movement inside the at least one tubular mounting recess in directions that intersect a direction in which the at least one mounting pin is inserted into the at least one tubular mounting recess, and
wherein the at least one mounting pin is provided on at least one of the outer peripheral sides of the housing.

US Pat. No. 10,511,121

CABLE CONNECTION ASSEMBLIES FOR MARINE PROPULSION, AND ASSOCIATED SYSTEMS AND METHODS

Pure Watercraft, Inc., S...

1. A connection assembly, comprising:a multi-conductor cable having:
two high voltage power conductor lines;
two low voltage power conductor lines;
two interlock lines; and
two signal lines;
a connector having:
a metal body;
a flange having an outer edge positioned axially outwardly from the metal body, the flange forming a closed shape that encircles an interior volume;
first, second and third insulating bodies positioned within the interior volume;
two high voltage connector sockets, each electrically connected to a corresponding one of the high voltage power conductor lines and housed in a corresponding one of the first and second insulating bodies;
two low voltage connector sockets, each electrically connected to a corresponding one of the low voltage power conductor lines and housed in the third insulating body;
two interlock connector sockets, each electrically connected to a corresponding one of the interlock lines and housed in the third insulating body;
two signal connector sockets, each electrically connected to a corresponding one of the signal lines;
a water resistant seal carried by at least one of the metal body or the flange; and
a latch carried by the metal body and moveable relative to the metal body between an engaged position to secure the connector to a corresponding device, and a disengaged position.

US Pat. No. 10,511,117

CONNECTOR

Sumitomo Wiring Systems, ...

1. A connector, comprising:a housing to be fit into a receptacle of a mating connector; and
a front member to be mounted to a front part of the housing;
the housing including a terminal accommodating portion configured to accommodate terminal fittings and a butting portion substantially in the form of a flat plate extending forward from an outer peripheral edge of the terminal accommodating portion and configured to butt against a back surface of the receptacle when the housing is fit into the receptacle;
the front member including a cover configured to cover a front end of the terminal accommodating portion by being disposed along an inner side surface of the butting portion; and
a formation range of the butting portion is smaller than that of the cover in a length direction of the butting portion in a front view.

US Pat. No. 10,511,101

WIRELESS COMMUNICATION MODULE

MURATA MANUFACTURING CO.,...

1. A wireless communication module comprising:a dielectric substrate;
at least one first end-fire antenna arranged on the dielectric substrate, having directivity in a direction parallel with a surface of the dielectric substrate, and having polarization characteristics being parallel with a first direction; and
at least one patch antenna arranged on the dielectric substrate and provided with a first feed point and a second feed point, the first and second feed points being different from each other,
wherein when the patch antenna is fed from the first feed point, a radio wave having a polarization direction parallel with the first direction is excited, and when the patch antenna is fed from the second feed point, a radio wave having a polarization direction orthogonal to the first direction is excited.

US Pat. No. 10,511,098

ANTENNAS

1. An antenna, comprising:a metal tube;
a coaxial cable disposed along a central axis of the metal tube; and
a variable-impedance transmission wire structure comprising a dielectric body and a metal part arranged along an axial direction of the coaxial cable,
wherein the metal tube comprises:
a first metal tube, a second metal tube and a third metal tube arranged along the axial direction of the coaxial cable,
wherein
a first dielectric body is disposed in the first metal tube,
a first metal part is disposed in the first metal tube or between the first metal tube and the second metal tube,
a second metal part or a second dielectric body is disposed in the second metal tube,
a third metal part is disposed in the second metal tube or the third metal tube,
and
a fourth metal part is disposed in the third metal tube.

US Pat. No. 10,511,092

ORBITAL ANGULAR MOMENTUM IN MILLIMETER-WAVE WIRELESS COMMUNICATION

Intel Corporation, Santa...

1. An apparatus of an access point (AP), the apparatus comprising:a transceiver and an array of antenna elements, the array arranged as a plurality of concentric rings of antenna elements, each of the plurality of concentric rings of antenna elements configured to receive a respective signal from the transceiver,
each respective signal to have a varying progressive phase between a plurality of antenna elements of the respective concentric ring,
wherein the plurality of concentric rings of antenna elements is configured to generate a plurality of respective electromagnetic orbital angular momentum (OAM) beams with the array, wherein each of the respective OAM beams has a respective OAM mode, and wherein the plurality of OAM beams are orthogonal to each other when generated.

US Pat. No. 10,511,091

DYNAMIC BEAM STEERING FOR UNMANNED AERIAL VEHICLES

QUALCOMM Incorporated, S...

1. An unmanned aerial vehicle (UAV) having an antenna, comprising:a processor coupled to the antenna and configured with processor-executable instructions to:
orient the antenna towards a serving ground station based on a current position of the UAV;
orient the antenna towards a neighboring ground station when it is time to conduct signal measurements of the neighboring ground station;
conduct the signal measurements of the neighboring ground station while orienting the antenna towards the neighboring ground station;
determine whether signals of the neighboring ground station are stronger than signals of the serving ground station based on the signal measurements of the neighboring ground station while orienting the antenna towards the neighboring ground station; and
perform a handover to the neighboring ground station in response to determining that the signals of the neighboring ground station are stronger than signals of the serving ground station.

US Pat. No. 10,511,087

PARALLEL PLATE ANTENNA

The United States of Amer...

1. An antenna comprising:a base;
a first support coupled to said base and extending perpendicular to said base;
a second support coupled to said base and extending perpendicular to said base, wherein said first support and said second support oppose one another and are spaced apart from one another; and
a plurality of plates spaced apart and parallel to one another, each of said plates being T-shaped to have a trunk and a top wherein a width W1 of said trunk is less than a width W2 of said top, each said trunk coupled to one of said first support and said second support and extending perpendicular thereto wherein a corresponding said top is spaced from an opposing one of said first support and said second support by a distance S to thereby generate a gap region that serpentines between said first support and said second support and around said top of each of said plates;
wherein each of said base, said first support, said second support, and said plates are electrically conductive.

US Pat. No. 10,511,083

ANTENNAS HAVING SYMMETRICAL SWITCHING ARCHITECTURE

Apple Inc., Cupertino, C...

1. An electronic device, comprising:a resonating element arm for an antenna, the resonating element arm having opposing first and second ends;
an antenna ground for the antenna;
a first antenna feed for the antenna, the first antenna feed having a first feed terminal coupled to a first location on the resonating element arm and having a second feed terminal coupled to the antenna ground;
a second antenna feed for the antenna, the second antenna feed having a third feed terminal coupled to a second location on the resonating element arm and having a fourth feed terminal coupled to the antenna ground, the second location being interposed between the first location and the second end of the resonating element arm;
a first adjustable component coupled between a third location on the resonating element arm and the antenna ground, the third location being interposed between the first location and the first end of the resonating element arm; and
a second adjustable component coupled between a fourth location on the resonating element arm and the antenna ground, the fourth location being interposed between the second location and the second end of the resonating element arm, wherein the antenna is operable in a first mode in which the first antenna feed is enabled, the second antenna feed is disabled, the first adjustable component tunes a frequency response of the antenna, and the second adjustable component forms a short circuit path between the resonating element arm and the antenna ground, and in a second mode in which the second antenna feed is enabled, the first antenna feed is disabled, and the second adjustable component tunes the frequency response of the antenna.

US Pat. No. 10,511,077

METHOD FOR MANUFACTURING MODE CONVERTER

FUJIKURA LTD., Tokyo (JP...

1. A method for manufacturing a mode converter, the method comprising:irradiating a substrate, which is a single member and includes a first main surface and a second main surface opposite to the first main surface with a thickness between the first and second main surfaces, with pulse laser light of Femtosecond laser from the first main surface toward the second main surface and thereby forming a first modified portion extending from the first main surface toward the second main surface with a predetermined depth from the first main surface of the substrate, wherein the predetermined depth is less than the thickness between the first and second main surfaces;
after irradiating the substrate, removing the first modified portion to form a micro hole in the first main surface so as to have the predetermined depth;
forming grounding conductor layers on the first main surface and the second main surface;
forming a plane circuit on the first main surface so as to transmit a high-frequency signal; and
filling the micro hole with a conductive material and forming a pin so as to cover an inner surface of the micro hole and be electrically connected to the plane circuit.

US Pat. No. 10,511,067

SYSTEM AND METHOD TO DIVERT INDUCTIVE ENERGY FROM CELLS

1. A battery pack for supplying power to a power tool, the battery pack comprising:a housing having a first terminal and a second terminal and configured to detachable couple to the power tool;
at least one electrochemical cell contained in the housing, the at least one electrochemical cell having a given shape and connected across the first terminal and the second terminal of the housing;
a container contained in the housing, the container having a shape equivalent to the at least one electrochemical cell with dimensions equal to the given shape of the at least one electrochemical cell; and
two or more capacitors electrically coupled together and contained in the container, where the two or more capacitors are connected across the first terminal and the second terminal of the housing.

US Pat. No. 10,511,060

ENCODING METHOD AND DEVICE USING RATE-COMPATIBLE, LOW-DENSITY PARITY-CHECK CODE IN COMMUNICATION SYSTEM

Samsung Electronics Co., ...

1. A method of encoding using a low density parity check (LDPC) code in a communication system, the method comprising:inputting information bits for data transmission;
generating parity bits by LDPC encoding the information bits based on a parity-check matrix consisting of a first sub-matrix having a first code rate and a second sub-matrix having a second code for code extension, wherein the second sub-matrix has a stair-wise lower triangular structure in an extension part; and
outputting the information bits and the generated parity bits.

US Pat. No. 10,511,058

MULTILAYER CABLE-TYPE SECONDARY BATTERY

LG Chem, Ltd., (KR)

1. A multilayer cable-type secondary battery comprising:a first electrode assembly comprising one or more first inner electrodes and a sheet-type first separation layer-outer electrode complex helically wound to surround outer surfaces of the one or more first inner electrodes;
a separation layer surrounding the first electrode assembly; and
a second electrode assembly comprising one or more second inner electrodes surrounding an outer surface of the separation layer and a sheet-type second separation layer-outer electrode complex helically wound to surround outer surfaces of the one or more second inner electrodes.

US Pat. No. 10,511,057

NON-AQUEOUS ELECTROLYTE SECONDARY BATTERY AND A METHOD FOR PRODUCING THE SAME

TOYOTA JIDOSHA KABUSHIKI ...

1. A method for producing a non-aqueous electrolyte secondary battery, the method comprising:a step of obtaining a positive electrode, a negative electrode and a non-aqueous electrolyte; and
a step of placing the positive electrode, the negative electrode and the non-aqueous electrolyte in a battery case,
wherein,
the non-aqueous electrolyte comprises a fluorine atom-containing supporting salt and a benzothiophene oxide represented by formula (1):

the benzothiophene oxide is added in an amount of 0.2% by weight to 1.0% by weight in the non-aqueous electrolyte,
the negative electrode comprises a negative current collector and a negative electrode material layer placed on the negative current collector, and
the negative electrode material layer has a BET specific surface area of 2.0 m2/g to 4.9 m2/g.

US Pat. No. 10,511,051

LI-WATER SECONDARY ELECTROCHEMICAL BATTERY

1. A secondary lithium-water electrochemical cell comprising:a. a water splitting of hydrogen and oxygen irreversible bi-functional electrode in contact with an inorganic electrolyte;
b. a reversible lithium electrode in the lithium-water electrochemical cell in contact with an organic electrolyte;
c. a lithium salt in organic and inorganic electrolytes; and
d. a Li+-ion conductive membrane in the lithium-water electrochemical cell disposed between the organic electrolyte and the inorganic electrolyte, wherein the secondary lithium-water electrochemical cell is configured to be charged as a Li—O2 cell and discharged as an Li—H2 cell.

US Pat. No. 10,511,048

METHOD OF PREPARING NEGATIVE ELECTRODE ACTIVE MATERIAL FOR LITHIUM SECONDARY BATTERY AND LITHIUM SECONDARY BATTERY USING THE SAME

LG CHEM, LTD., Seoul (KR...

1. A method of preparing a negative electrode active material for a lithium secondary battery, the method comprising steps of:depositing an amorphous silicon layer on a surface of a glass substrate by applying silane gas at a rate of 10 sccm/60 min to 50 sccm/60 min in a temperature range of 500° C. to 700° C. and in a pressure range of 10?8 Torr to 760 Torr (S1) through chemical vapor deposition (CVD) using silane (SiH4) gas as a source (S1);
immersing the glass substrate having the amorphous silicon layer deposited thereon in an acetone solution and then performing ultrasonic milling of the amorphous silicon layer at a power of 50 W to 200 W for 10 minutes to 20 minutes at room temperature using an ultrasonic milling machine to prepare amorphous silicon particles (S2);
dispersing the amorphous silicon particles in a carbon-based precursor solution to prepare a dispersion solution (S3);
spray drying the dispersion solution to prepare a silicon-based composite precursor (S4); and
heat treating the silicon-based composite precursor to form a silicon composite which includes an amorphous carbon coating layer containing at least one amorphous silicon particle in inside thereof (S5).

US Pat. No. 10,511,045

FUEL CELL AND FUEL CELL SYSTEM

Toyota Jidosha Kabushiki ...

1. A fuel cell comprising:a stacked body formed by stacking a plurality of unit cells;
an end plate arranged on at least one end of the stacked body in a stacking direction;
a fuel cell case including an opening portion having an opening formed therein to receive the stacked body, wherein the opening portion has a substantially polygonal outer circumference shape with a plurality of corners, and holes are formed in the opening portion of the fuel cell case; and
a plurality of types of fasteners with different load resistances that fix the end plate to the opening portion of the fuel cell case to close the opening of the fuel cell case, wherein
a fastener, of the plurality of types of fasteners, of a type with a highest load resistance is arranged at at least one of the plurality of corners of the opening portion,
each of the plurality of types of fasteners is configured to extend within a respective one of the holes formed in the opening portion of the fuel cell case and to exert a force on the end plate in a direction towards the stacked body when each of the plurality of types of fasteners fixes the end plate to the opening portion of the fuel cell case, and
the holes formed in the opening portion of the fuel cell case are arranged on the same side of the end plate as the stacked body.

US Pat. No. 10,511,043

GAS DIFFUSION LAYER FOR FUEL CELL APPLICATIONS

Hyundai Motor Company, S...

1. A fuel cell, comprising:a polymer electrolyte membrane having two side surfaces, wherein each side surface includes:
a catalyst layer coated on the side surface of the polymer electrolyte membrane,
a compressible gas diffusion layer (GDL) stacked on the catalyst layer; and
a bipolar plate on the compressible GDL and comprises a major flow field and a minor flow field,
wherein the compressible GDL comprises a dual layer structure including a microporous layer having a pore size of less than 1 ?m when measured by mercury intrusion, the microporous layer composed of the mixture of carbon powder and a hydrophobic agent; and a macroporous substrate having a pore size of 1 to 300 ?m, the macroporous substrate composed of carbon fiber and a hydrophobic agent, and the compressible GDL has a width direction perpendicular to a major flow field direction of the bipolar plate and a length direction which is in parallel with the major flow field direction of the bipolar plate, and
wherein the compressible GDL is prepared by cutting a rolled GDL material at a certain angle in a range of 60°??<90° with respect to a machine direction of the rolled GDL material as determined by the major flow field direction of the bipolar plate, such that a high stiffness direction of the compressible GDL as the machine direction of the rolled GDL material is not parallel with the length direction of the compressible GDL, the machine direction of the rolled GDL material is the high stiffness direction of the compressible GDL,
wherein the high stiffness direction of the compressible GDL as the machine direction of the rolled GDL material is arranged in one direction, the high stiffness direction of the compressible GDL as the machine direction of the rolled GDL material is not parallel with the length direction of the compressible GDL at an angle (?) in a range of 60 °??<90°, formed by the high stiffness direction of the compressible GDL and the length direction of the compressible GDL and, at the same time, with the major flow field direction of the bipolar plate when the compressible GDL is stacked on the bipolar plate to reduce intrusion of the compressible GDL into flow field channels of the bipolar plate.

US Pat. No. 10,511,042

FUEL CELL UNIT AND VEHICLE HAVING FUEL CELL UNIT

Toyota Jidosha Kabushiki ...

1. A fuel cell unit comprising:a fuel cell having single cells laminated in a laminating direction; and
a converter having at least three combinations of a reactor electrically connected with the fuel cell and a power module electrically connected with the reactor, wherein
a direction in which the at least three reactors are arrayed and a direction in which the at least three power modules are arrayed are parallel with the laminating direction of the single cells.

US Pat. No. 10,511,040

FUEL CELL SYSTEM

NISSAN MOTOR CO., LTD., ...

1. A fuel cell system configured to generate electric power by supplying an anode gas and a cathode gas to a fuel cell, the fuel cell system comprising:a connection line configured to connect the fuel cell to an electric load;
a converter connected to the connection line and a battery, the converter being configured to adjust a voltage of the connection line; and
a controller programmed to:
calculate a target output current of the fuel cell in accordance with a load of the electric load;
carry out a switching control for the converter in accordance with the target output current;
control a flow rate of the cathode gas to be supplied to the fuel cell in accordance with the target output current; and
calculate the generated electric power of the fuel cell on the basis of a previous value of the target output current calculated by the controller and a detected voltage of the connection line,
wherein the controller is programmed to set up an upper limit to the target output current on the basis of a generated electric power of the fuel cell calculated by the controller and a guaranteed minimum voltage of the connection line for ensuring performance of the fuel cell and the electric load.

US Pat. No. 10,511,037

APPARATUS FOR REMOVING MOISTURE OF STACK ENCLOSURE

HYUNDAI MOTOR COMPANY, S...

1. An apparatus for removing moisture of a stack enclosure comprising:a protective case accommodating a fuel cell stack therein, the protective case including:
a lower part at, a bottom side of the protective case; and
an upper part at a top side of the protective case and including a pair of sidewalls and a top surface, wherein the upper part is spaced apart at a predetermined distance from the fuel cell stack such that air flows through a space between the upper part and the fuel cell stack as a convection path inside the protective case;
a radiation heater disposed in the convection path at, the lower part of the protective case, such that the radiation heater enables air heated and discharged from the radiation heater to move thermodynamically toward the top surface of the upper part of the protective case along the convection path; and
a cooler disposed in the convection path at the top surface of the upper part of the protective case to cool the air moving along the convection path from the radiation heater, wherein such that the cooler guides the cooled air to move toward the lower part of the protective case such that moisture condensed from the air heated by the radiation heater and then cooled and condensed by the cooler is collected to be discharged outside the protective case.

US Pat. No. 10,511,030

ANTI-CORROSION STRUCTURE AND FUEL CELL EMPLOYING THE SAME

INDUSTRIAL TECHNOLOGY RES...

1. An anti-corrosion structure, comprising:an aluminum layer;
a first anti-corrosion layer, wherein the first anti-corrosion layer is a nickel-tin-containing alloy layer; and
an intermediate layer disposed between the aluminum layer and the first anti-corrosion layer, wherein the intermediate layer is a nickel-tin-aluminum-containing alloy layer.

US Pat. No. 10,511,028

ELECTROLYTE MEMBRANE, FUEL CELL INCLUDING SAME, BATTERY MODULE INCLUDING FUEL CELL, AND METHOD FOR MANUFACTURING ELECTROLYTE MEMBRANE

LG CHEM, LTD., Seoul (KR...

1. An electrolyte membrane which comprises a lanthanum-gallium-based composite metal oxide, and has a color region of 0.39?x?0.40 and 0.35?y?0.36 based on the CIE (Commission Internationale de l'Eclairage) x, y chromaticity distribution table,wherein the electrolyte membrane manufactured by a method comprising:
preparing a mixture comprising a precursor of a lanthanum-gallium-based composite metal oxide comprising evaporating moisture and heating to induce a combustion reaction;
warming the mixture to a temperature of 800° C. or more and less than 950° C., thereby synthesizing the precursor in the mixture into lanthanum-gallium-based composite metal oxide particles; and
forming the electrolyte membrane by using a slurry comprising the lanthanum-gallium-based composite metal oxide particles,
the synthesized composite metal oxide particles comprise lanthanum-gallium-based composite metal oxide particles which are represented by the following Chemical Formula 1, and secondary phase particles,
a content of the secondary phase particles is 5 wt % or more and 30 wt % or less based on the total weight of the synthesized composite metal oxide particles,
wherein the lanthanum-gallium-based composite metal oxide of the electrolyte membrane is represented by the following Chemical Formula 1:
La1-xQxGa1-yZyO3-?  [Chemical Formula 1]
in Chemical Formula 1,
Q is strontium, Z is magnesium, and 0

US Pat. No. 10,511,027

BATTERIES AND RELATED STRUCTURES HAVING FRACTAL OR SELF-COMPLEMENTARY STRUCTURES

Fractal Antenna Systems, ...

1. A battery comprising:a first electrode including a surface having a plurality of fractal features, wherein the plurality of fractal features include diffusion-limited aggregation (DLA) tree structure, wherein the DLA tree structure comprises a Brownian tree;
a second electrode, wherein the second electrode comprises a plurality of self-complementary features, wherein the plurality of self-complementary features include a conductive portion that includes a conductive material and a non-conductive portion that does not include a conductive material, and wherein the conductive portion and the non-conductive portion have shapes that are self-complementary to one another on an exposed surface of the second electrode; and
an electrolyte, wherein in operation the electrolyte forms a first conductive path ionically connecting the first electrode to the second electrode, and a second conductive path, separate from the first conductive path, connecting the first electrode to the second electrode, wherein an electrical circuit is formed;
wherein the first electrode DLA tree structure forms an interface with the electrolyte.

US Pat. No. 10,511,024

ELECTRODE FOR NONAQUEOUS ELECTROLYTE SECONDARY BATTERY AND METHOD OF MANUFACTURING THE SAME

TOYOTA JIDOSHA KABUSHIKI ...

1. An electrode for a nonaqueous electrolyte secondary battery, the electrode comprising:an electrode mixture layer containing a hollow active material particle and a needle-shaped filler particle, wherein
the needle-shaped filler particle consists of cellulose or polyacrylonitrile in the shape of a hollow cylindrical shell having an outer diameter of 0.1 to 10 ?m, an outer cylindrical surface extending along an entire length of the needle-shaped particle, and an inner cylindrical surface extending along the entire length of the needle-shaped particle, the inner cylindrical surface defining a single through-hole of the needle-shaped particle,
the needle-shaped filler particle is arranged on an outer surface of the hollow active material particle such that the outer cylindrical surface of the needle-shaped particle contacts the outer surface of the hollow active material particle,
the hollow active material particle is a secondary particle that includes an outer shell defined by an aggregate of primary particles, a hollow interior portion enclosed and surrounded by the outer shell, and at least one through-hole in the outer shell such that the hollow interior portion is in fluid communication with an exterior of the hollow active particle, and
an average particle size of the hollow active material particle is 3 to 25 ?m.

US Pat. No. 10,511,022

LEAD-BASED ALLOY AND RELATED PROCESSES AND PRODUCTS

RSR TECHNOLOGIES, INC., ...

1. A lead-based alloy comprising, in percent by total alloy weight:0.0090% to 0.0600% bismuth;
0.0075% to 0.0025% antimony;
0.0075% to 0.0125% arsenic;
0.0035% to 0.0060% tin;
up to 0.0100% silver;
up to 0.0010% thallium; and
balance lead and incidental impurities.

US Pat. No. 10,511,020

NICKEL COMPOSITE HYDROXIDE PARTICLE AND PROCESS FOR PRODUCING THE SAME, POSITIVE ELECTRODE ACTIVE MATERIAL FOR NON-AQUEOUS ELECTROLYTE SECONDARY BATTERY AND PROCESS FOR PRODUCING THE SAME, AND NON-AQUEOUS ELECTROLYTE SECONDARY BATTERY

SUMITOMO METAL MINING CO....

1. A process for producing a positive electrode active material for a non-aqueous electrolyte secondary battery; comprising the following processes (a) to (c):(a) a process for calcining at least one of nickel hydroxide and nickel oxyhydroxide, which contains nickel as a major component and at least one element selected from the group consisting of transition metal elements other than nickel, group II elements and group XIII elements as a subsidiary component in a nonreducing atmosphere having a temperature of 500° C. to 850° C., to prepare a nickel oxide;
(b) a process for preparing a calcined powder represented by the following formula (1):
LiaNi1-bMbO2  (1)
wherein M is at least one element selected from the group consisting of transition metal elements other than Ni, group II elements and group XIII elements, and a satisfies 1.00?a?1.10, and b satisfies 0.01?b?0.5,
which comprises mixing the nickel oxide with a lithium compound so that the molar ratio of lithium included in the lithium compound to the total moles of nickel, transition metal elements other than nickel contained in the nickel oxide, group II elements and group XIII elements is 1.00 to 1.10, and thereafter calcining the resulting mixture in an oxygen-containing atmosphere at a temperature of 650 to 850° C.; and
(c) a process for preparing powder of lithium-nickel composite oxide, which comprises preparing a slurry comprising the calcined powder in a concentration of 500 to 2000 g/L, washing the calcined powder with water in the form of slurry for a period of time which satisfies the following formula (2):
B/40 wherein A is a period of time for washing with water, of which unit is represented by minute, and B is a concentration of a slurry, of which unit is represented by g/L, and thereafter filtering and drying the slurry.

US Pat. No. 10,511,018

CONDUCTIVE COATINGS FOR ACTIVE ELECTROCHEMICAL MATERIALS

Physical Sciences, Inc., ...

1. A method for producing a coated powder electrode, the method comprising:homogeneously mixing an electrochemically active material including electrochemically active particles with conductive particles 5-50 nm in size in a ratio determined by the surface area of the electrochemically active particles to localize the conductive particles about each electrochemically active Particle;
adding a polymer and mixing to secure the conductive particles about each electrochemically active particle;
adding a binder dispersed in a solvent to produce an electrode; and
the polymer not soluble in the solvent.

US Pat. No. 10,511,013

ELECTROCHEMICAL CELL WITH PROTECTED NEGATIVE ELECTRODE

Applied Materials, Inc., ...

1. A method of fabricating a negative electrode for an electrochemical cell, comprising:providing a substrate, said substrate being electrically conductive;
depositing a metal layer on said substrate;
anodizing said metal layer to form a porous layer on said substrate;
depositing a layer of ion conducting material on said porous layer, said layer of ion conducting material extending at least partially into pores of said porous layer;
densifying said layer of ion conducting material;
depositing a layer of alkali metal on the densified layer of ion conducting material;
attaching a temporary electrode to said layer of alkali metal and passing a current between said temporary electrode and said substrate to drive alkali metal through the densified layer of ion conducting material to the surface of said substrate, forming an alkali metal reservoir at the surface of said substrate.

US Pat. No. 10,511,010

NONAQUEOUS ELECTROLYTE SECONDARY BATTERY

PANASONIC CORPORATION, O...

1. A nonaqueous electrolyte secondary battery comprising: a conductive outer case, an electrode body in the outer cane, a conductive seal plate closing an open end of the outer can, and an external terminal on the seal plate; anda current cutoff mechanism that is located on an electrical conduction pathway between the external terminal and the electrode body, the current cutoff mechanism cutting off electrical connection between the external terminal and the electrode body in response to an increase in an internal pressure in the battery,
wherein the current cutoff mechanism including a thin portion of the seal plate and a diaphragm that deforms to cut off the electrical connection between the external terminal and the electrode body in response to the increase in the internal pressure in the battery,
the electrode body and the seal plate electrically connected by a collector lead, and the diaphragm and the collector lead connected by the seal plate, and
the seal plate directly contacts the outer can.

US Pat. No. 10,510,994

METHOD FOR MANUFACTURING ORGANIC DEVICE, AND ROLL

SUMITOMO CHEMICAL COMPANY...

1. A method of manufacturing an organic device using a belt-shaped flexible substrate in a continuously-conveyed manner, the substrate being provided with lead portions having a gas barrier property at a one end and another end in a longitudinal direction, the method comprising:a formation step of forming at least one of an electrode layer and an organic functional layer on the substrate in a region not provided with the lead portions;
a winding step of winding the substrate in a roll shape after the formation step; and
a storage step of storing the roll-shaped substrate after the winding step.

US Pat. No. 10,510,992

METHOD FOR MANUFACTURING LIGHT-EMITTING DEVICE

Semiconductor Energy Labo...

1. A method for manufacturing a light-emitting device, comprising:providing first and second electrodes over a substrate;
providing a first organic layer over the first electrode and a second organic layer over the second electrode;
providing a third electrode over the second organic layer to form a light-emitting element comprising the second and third electrodes, and the second organic layer;
providing a support over the first electrode and the light-emitting element with a resin layer therebetween;
making a cut overlapping with the first electrode in at least the support;
partly removing the resin layer by using the cut to form an opening overlapping with the first electrode; and
removing the first organic layer remaining on the first electrode after foaming the opening,
wherein the first and second organic layers each contain a light-emitting substance.

US Pat. No. 10,510,981

ORGANIC LIGHT-EMITTING DIODE DISPLAY PANEL, FABRICATION METHOD, AND ELECTRONIC APPARATUS

SHANGHAI TIANMA AM-OLED C...

1. An organic light-emitting diode (OLED) display panel, comprising:a substrate;
an organic light-emitting device comprising a first electrode, an organic light-emitting layer, and a second electrode, successively disposed on one side of the substrate, wherein the second electrode has a first side facing toward the substrate and an opposing side; and
a capping layer disposed on the opposing side of the second electrode,
wherein a material of the capping layer includes a compound of the following chemical formula (I):

 wherein:
L1, L2, L3, and L4 are independently selected from a hydrogen atom, a substituted or unsubstituted alkyl, a substituted or unsubstituted alkenyl, a substituted or unsubstituted alkynyl, and a substituted or unsubstituted phenyl, and a total quantity of benzene rings included in L1, L2, L3, and L4 is from 0 to 6; and
Y1, Y2, Y3, Y4, Y5, and Y6 include:
two selected from Y3, Y4, Y5, and Y6, each including one of the alkenyl and the alkynyl, and
a remaining of Y1, Y2, Y3, Y4, Y5, and Y6, being independently selected from a hydrogen atom, a substituted or unsubstituted alkyl, a substituted or unsubstituted alkenyl, and a substituted or unsubstituted alkynyl.

US Pat. No. 10,510,975

LIGHT EMITTING DIODE AND LIGHT EMITTING DIODE DISPLAY INCLUDING THE SAME

Samsung Display Co., Ltd....

18. A light emitting diode display, comprising:a substrate;
a thin film transistor on the substrate; and
a light emitting diode connected to the thin film transistor,
wherein:
the light emitting diode includes a first electrode, a second electrode overlapping the first electrode, an emission layer between the first electrode and the second electrode, and an electron injection layer between the second electrode and the emission layer,
the electron injection layer includes a lanthanide element, an alkali metal first element, and a halogen second element,
the lanthanide element is ytterbium (Yb), samarium (Sm), or europium (Eu),
the first element is potassium (K), rubidium (Rb), or cesium (Cs),
the second element is chlorine (Cl), bromine (Br), or iodine (I), and
the first element and the second element are included in the electron injection layer in an amount of 1 vol % to 20 vol %, and the lanthanide element is included in the electron injection layer in an amount of 99 vol % to 80 vol %, based on a total volume of a material including the lanthanide element, the first element, and the second element.

US Pat. No. 10,510,971

VAPOR-DEPOSITED NANOSCALE IONIC LIQUID GELS AS GATE INSULATORS FOR LOW-VOLTAGE HIGH-SPEED THIN FILM TRANSISTORS

Massachusetts Institute o...

1. A film comprising a crosslinked polymer and an ionic liquid, wherein the ionic liquid is dispersed in the crosslinked polymer; the crosslinked polymer comprises a plurality of residues of a monomer and a plurality of residues of a crosslinker; the film has a thickness of about 20 nm to about 1000 nm; and the film has a capacitance of about 1 ?F/cm2 to about 5 ?F/cm2 at a frequency of about 1 MHz.

US Pat. No. 10,510,970

OPPOSITE SUBSTRATE AND MANUFACTURING METHOD THEREOF, ORGANIC LIGHT-EMITTING DISPLAY PANEL AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. An opposite substrate, comprising: a base substrate, an auxiliary electrode on the base substrate, a planarization layer on a side of the auxiliary electrode facing away from the base substrate, a spacer on a side of the planarization layer facing away from the base substrate, a conductive layer on a side of the spacer facing away from the base substrate, and black matrices located between the base substrate and the auxiliary electrode; wherein the conductive layer at least covers a surface of the spacer facing away from the base substrate, and the conductive layer is electrically connected with the auxiliary electrode through a via hole structure passing through the planarization layer.

US Pat. No. 10,510,961

ORGANIC LIGHT EMITTING HOST MATERIALS

Nitto Denko Corporation, ...

1. A host compound for use in emissive elements of organic light emitting devices, the compound being represented by Formula 1:
wherein R1, R2, R3, R4, R5, and R6 are independently H, C1-C3 alkyl, or C1-3 perfluoroalkyl;
wherein Ar1 and Ar2 are independently optionally substituted 1,4-interphenylene or 1,3-interphenylene, wherein n is 0, 1, or 2; and m is 0, 1, or 2;
HT is

ET is optionally substituted 3,3?-bipyridin-5-yl, optionally substituted quinolin-8-yl, optionally substituted quinolin-5-yl, or optionally substituted quinoxalin-5-yl.

US Pat. No. 10,510,959

COMMISSIONING METHOD AND VAPOR DEPOSITION MACHINE

Wuhan China Star Optoelec...

1. A commissioning method for adjusting the relative position of a precision mask plate and a substrate to be operated, which comprises:Loading a commissioning substrate into a vapor deposition chamber for commissioning, wherein the commissioning substrate comprises a substrate, and the commissioning substrate further comprises a photo chromic layer and an anode thin film layer arranged on the substrate, and one of the photo chromic layer and the anode thin film layer is pre-patterned;
loading the precision mask plate into the vapor deposition chamber for commissioning, wherein the precision mask plate comprises a light transmission area and the light blocking area;
after aligning the precision mask plate and the commissioning substrate, turning on a light source in the vapor deposition chamber for commissioning, and irradiating the photo chromic layer on the commissioning substrate via the precision mask plate, wherein a partial position of the irradiated photo chromic layer is discolored;
obtaining a compensation value of the precision mask plate by the location of a partial discolored position of the photo chromic layer, wherein the compensation value is used for the vapor deposition machine to adjust the relative position of the precision mask plate and the substrate to be operated;
wherein when the photo chromic layer on the commissioning substrate is pre-patterned, the patterned photo chromic layer is arranged on the anode thin film layer; the above-mentioned description of turning on the light source in the vapor deposition chamber for commissioning and irradiating the photo chromic layer on the commissioning substrate via the precision mask plate, which comprises: the irradiation light passing through the light transmission area in the precision mask plate and irradiating the patterned photo chromic layer, so that the discoloration phenomenon is occurred in the position corresponding to the light transmission area in the patterned photo chromic layer; wherein the position where the discoloration phenomenon occurs in the photo chromic layer is a position between the edge of the light transmissive area of the precision mask plate and the edge of the patterned photo chromic layer;
wherein when the anode thin film layer on the commissioning substrate is pre-patterned, the patterned anode thin film layer is arranged on the photo chromic layer; the above-mentioned description of turning on the light source in the vapor deposition chamber for commissioning and irradiating the photo chromic layer on the commissioning substrate via the precision mask plate, which comprises: the irradiation light passing through the light transmission area in the precision mask plate and the patterned anode thin film layer, and irradiating the photo chromic layer, so that the discoloration phenomenon is occurred in a partial position of the irradiated photo chromic layer; wherein the discoloration phenomenon occurs in the photo chromic layer is a position between the edge of the light transmissive area of the precision mask plate and the edge of the patterned anode thin film layer.

US Pat. No. 10,510,953

TOP ELECTRODE FOR DEVICE STRUCTURES IN INTERCONNECT

Taiwan Semiconductor Manu...

18. A method, comprising:forming a resistive random access memory (RRAM) stack over a semiconductor substrate, the RRAM stack including a bottom electrode, a top electrode over the bottom electrode, and a dielectric layer separating the bottom electrode from the top electrode;
forming a blocking layer over a top surface of the top electrode;
etching back the blocking layer to expose a first part of the top surface of the top electrode while leaving a portion of the blocking layer covering a second part of the top surface of the top electrode; and
forming a contact contacting an upper surface of the blocking layer and contacting the second part of the top surface of the top electrode.

US Pat. No. 10,510,952

STORAGE DEVICE WITH COMPOSITE SPACER AND METHOD FOR MANUFACTURING THE SAME

TAIWAN SEMICONDUCTOR MANU...

1. A storage device, comprising:a first electrode;
a stacked feature over the first electrode and comprising a storage element and a second electrode over the storage element;
first and second spacers positioned respectively on first and second sidewalls of the second electrode of the stacked feature, wherein each of the first and second spacers has a notched top surface and the notched top surface of the first spacer is at a different level than the notched top surface of the second spacer;
a second via plug disposed above the second electrode and including a first sidewall aligned with a top surface of the second electrode and a second sidewall opposite to the first sidewall and misaligned with the top surface of the second electrode; and
a barrier structure embedded in a lateral of the first spacer.

US Pat. No. 10,510,948

MAGNETORESISTIVE EFFECT ELEMENT, MAGNETIC MEMORY, MAGNETIZATION ROTATION METHOD, AND SPIN CURRENT MAGNETIZATION ROTATIONAL ELEMENT

TDK CORPORATION, Tokyo (...

1. A spin current magnetization rotational type magnetoresistive element comprising:a magnetoresistive effect element having a first ferromagnetic metal layer having a fixed magnetization orientation, a second ferromagnetic metal layer having a variable magnetization orientation, and a non-magnetic layer sandwiched between the first ferromagnetic metal layer and the second ferromagnetic metal layer; and
spin-orbit torque wiring which extends in a direction that intersects a stacking direction of the magnetoresistive effect element, and is connected to the second ferromagnetic metal layer,
wherein an electric current that flows through the magnetoresistive effect element and an electric current that flows through the spin-orbit torque wiring merge or are distributed in a portion where the magnetoresistive effect element and the spin-orbit torque wiring are connected, and
the spin-orbit torque wiring is composed of a pure spin current generation portion formed from a material that generates a pure spin current, and a low-resistance portion formed from a material having a smaller electrical resistance than the pure spin current generation portion, and at least a portion of the pure spin current generation portion contacts the second ferromagnetic metal layer.

US Pat. No. 10,510,944

VIBRATION ACTUATOR REDUCED IN COST AND SIZE, AND ELECTRONIC DEVICE

Canon Kabushiki Kaisha, ...

1. A vibration actuator comprising:a vibration element which includes an electromechanical energy conversion element and an elastic body having a pair of contact portions; and
a driven element which is driven relatively to the vibration element in a first direction, the driven element including side surfaces formed respectively on two sides thereof,
wherein the pair of contact portions contact with the driven element in a third direction orthogonal to both of the first direction and a second direction which is a direction of a thickness of the electromechanical energy conversion element, and
wherein each of the contact portions includes a contact surface formed thereon such that a pair of the contact surfaces face the driven element, the contact surfaces respectively contacting the side surfaces of the driven element in the third direction and facing each other through the driven element.

US Pat. No. 10,510,943

STRUCTURE FOR AN ANTENNA CHIP FOR QUBIT ANNEALING

INTERNATIONAL BUSINESS MA...

1. A system, comprising:a superconducting qubit chip having a first qubit with a first Josephson junction and a first set of one or more capacitor pads;
a semiconductor chip positioned above the superconducting qubit chip;
a first radio frequency (RF) emitter on the semiconductor chip, comprising:
a first voltage-controlled oscillator; and
a first antenna driven by the first voltage-controlled oscillator; and
a microcontroller on the semiconductor chip and that signals the first voltage-controlled oscillator to generate a first electromagnetic wave, which the first antenna directs toward the first set of one or more capacitor pads of the first qubit, thereby annealing the first Josephson junction of the first qubit.

US Pat. No. 10,510,941

PROCESS FOR REALIZING A SYSTEM FOR RECOVERING HEAT, IN PARTICULAR BASED ON THE SEEBECK'S EFFECT, AND CORRESPONDING SYSTEM

STMICROELECTRONICS S.R.L....

1. A method of forming an integrated circuit, the method comprising:forming a plurality of thermocouples coupled in series by:
forming first metal segments comprising a first metal, each of the first metal segments having a L-shape, the first metal segments being separated by one of a plurality of gaps;
filling the plurality of gaps by depositing a dielectric layer;
forming a plurality of deep openings to expose a first contact region of each of the first metal segments;
forming a plurality of shallow openings to expose a second contact region of each of the first metal segments; and
forming second metal segments, comprising a second metal, over the dielectric layer, the second metal being a different type of metal than the first metal, wherein each of the second metal segments contacts one of the first contact region of the first metal segments through one of the plurality of deep openings and contacts one of the second contact region of the first metal segments through one of the plurality of shallow openings.

US Pat. No. 10,510,939

THERMOELECTRIC CONVERSION CELL AND THERMOELECTRIC CONVERSION MODULE

MITSUBISHI MATERIALS CORP...

1. A thermoelectric conversion cell comprising:an insulating member having at least one through hole, and having insulation-side threaded portions at respective end parts of the through hole in a through-direction;
a thermoelectric conversion member having at least one thermoelectric conversion element and enclosed in the through hole; and
an electrode member having electrode-side threaded portions corresponding to the insulation-side threaded portions respectively connected to end parts of the insulating member and an electrode part electrically connected to an end part of the thermoelectric conversion member in the through hole.

US Pat. No. 10,510,935

OPTOELECTRONIC COMPONENT HAVING A LEAD FRAME WITH A STIFFENING STRUCTURE

OSRAM Opto Semiconductors...

1. An optoelectronic component comprising at least one optoelectronic semiconductor chip, wherein the at least one optoelectronic semiconductor chip is arranged on top of a leadframe section, the leadframe section comprises a stiffening structure projecting away laterally from the leadframe section, and the leadframe section, the stiffening structure and the at least one optoelectronic semiconductor chip are embedded in an electrically insulating housing, wherein an electrical line is applied on a surface of a top side of the housing, and the electrical line electrically contacts the at least one optoelectronic semiconductor chip.

US Pat. No. 10,510,934

LIGHT EMITTING DEVICE

NICHIA CORPORATION, Anan...

1. A light emitting device comprising:a plurality of light emitting elements each including an upper surface as a light extraction surface;
a light transmissive member having a plate shape and bonded to the upper surface of each of the plurality of light emitting elements, having an upper surface and a lower surface, and allowing light from the plurality of light emitting elements to be incident on the lower surface of the light transmissive member and be output from the upper surface of the light transmissive member; and
a light reflective member covering surfaces of the light transmissive member and lateral surfaces of the plurality of light emitting elements, the light reflective member defining an opening with the light transmissive member being provided within the opening so as to expose the upper surface of the light transmissive member, the light reflective member having a projection extending about an entire perimeter of the opening, the projection overlapping with a part of the light extraction surface of each light emitting element of the plurality of light emitting elements as viewed in a light extraction direction perpendicular to the light extraction surface of each light emitting element of the plurality of light emitting elements, the projection having a convex shape facing the part of the light extraction surface of each light emitting element of the plurality of light emitting elements in the light extraction direction,
wherein the upper surface area of the light transmissive member is smaller than a sum of the upper surface areas of the plurality of light emitting elements, and the lower surface area of the light transmissive member is larger than a sum of the upper surface areas of the plurality of light emitting elements.

US Pat. No. 10,510,933

LIGHT EMITTING DIODE PACKAGE AND MANUFACTURING METHOD THEREOF

Seoul Semiconductor Co., ...

1. A light-emitting diode package, comprising:a housing including a top surface opposite a bottom surface;
a light-emitting diode chip disposed in the housing;
a first phosphor configured to emit green light;
a second phosphor configured to emit a first red light; and
a third phosphor configured to emit a second red light,
wherein:
the top surface of the housing include a lower portion, an upper portion and an intermediate portion between the lower portion and the upper portion,
the light-emitting diode chip has a Full Width at Half Maximum (FWHM) less than or equal to about 40 nm,
the first, second, and third phosphors are disposed in a molding part and the molding part is made of materials including at least one of silicone, epoxy, polymethylmethacrylate (PMMA), polyethylene (PE) and polystyrene (PS),
a peak wavelength of the first phosphor ranges from about 520 nm to 570 nm,
at least one of the second and third phosphors is a nitride-based phosphor,
the first red light emitted from the second phosphor and the second red light emitted from the third phosphor have different peak wavelengths in which one of the different peak wavelengths ranges from about 610 nm to about 650 nm and the other different peak wavelength ranges from about 600 nm to 670 nm,
at least one of the first, second, and third phosphors has a different Full Width at Half Maximum (FWHM) from the other of the first, second, and third phosphors, and
a white light is configured to be formed by a synthesis of light emitted from the light-emitting diode chip, the first phosphor, the second phosphor and the third phosphor.

US Pat. No. 10,510,931

SIDE-VIEW LIGHT EMITTING DIODE PACKAGE STRUCTURE

ADVANCED OPTOELECTRONIC T...

1. A side-view light emitting diode (LED) package structure comprising:two first electrodes being coplanar;
an LED chip mounted on and electrically connected to the first electrodes;
a package body encapsulating the first electrodes, the package body surrounding peripheral sides of the LED chip to define a light emitting region of the LED chip;
a cover layer filling in the light emitting region and covering the LED chip; and
two second electrodes positioned outside the package body and electrically connected to the first electrodes, wherein, along a plane parallel to the first electrodes, a surface area of the second electrodes being greater than a surface area of a portion of the first electrodes positioned in the light emitting region;
wherein a cross section of the package body parallel to the first electrodes comprises two longer sides and two shorter sides connected to each other, each second electrode comprises a connecting portion and an extension portions, each connecting portion is connected to one first electrode, each connecting portion extends from one shorter side towards a direction away from the package body, each extension portion comprises a first extension section and a second extension section, the first extension section extends from an end of the connecting portion facing away from the package body along a direction parallel to the shorter side, the second extension section extends from an end of the first extension section facing away from the connecting portion along a direction parallel to the longer side and towards the package body, the connecting portion, the extension portion, and the first electrodes are on the same plane.

US Pat. No. 10,510,930

LIGHT EMITTING DEVICE

NICHIA CORPORATION, Anan...

1. A light-emitting device comprising:a package made of a metal material and defining a recess, the package comprising a side wall defining a side of the recess, wherein an opening of the recess is located at an upper side of the package;
a plurality of light-emitting elements disposed in the recess; and
a cover member disposed so as to close the opening of the recess, the cover member comprising:
a light-transmitting member having a primary surface,
a ceramic member having a loop-shape and having a first surface and a second surface opposite the first surface, the first surface being bonded to the primary surface of the light-transmitting member via a bonding material, and
a metal member having a loop-shape and comprising:
a first portion bonded to the second surface of the ceramic member,
a second portion located outward of the first portion in a plan view and joined to an upper surface of the side wall of the package, and
a third portion located between the first portion and second portion in the plan view, at which the metal member is not bonded to any other member, such that an empty space is located between the third portion of the metal member and the second surface of the ceramic member,
wherein the metal member and the ceramic member are bonded to each other via an intermediate member having a loop-shape interposed therebetween, the intermediate member being made of a metal material and having an outer edge that is located inward of an outer edge of the ceramic member in a plan view.

US Pat. No. 10,510,927

METHOD FOR PRODUCING NITRIDE SEMICONDUCTOR DEVICE

NICHIA CORPORATION, Anan...

1. A method for producing a nitride semiconductor device, the method comprising:providing a substrate made of a material other than a nitride semiconductor,
wherein the material has a hexagonal crystal structure;
wherein an upper face of the substrate has at least one flat section;
growing a first nitride semiconductor layer on the upper face of the substrate,
wherein the first nitride semiconductor layer is made of monocrystalline AlN;
wherein the first nitride semiconductor layer has an upper face that is a +c plane;
wherein the first nitride semiconductor layer has a thickness in a range of 10 nm to 100 nm;
growing a second nitride semiconductor layer on the upper face of the first nitride semiconductor layer,
wherein the second nitride semiconductor layer is made of InXAlYGa1-X-YN (0?X, 0?Y, X+Y<1);
wherein the second nitride semiconductor layer is grown to have an upper face with at least one flat section after a plurality of upside-down hexagonal pyramid-shaped or upside-down hexagonal frustum-shaped recesses are created in the second nitride semiconductor layer above the at least one flat section of the upper face of the substrate;
wherein the recesses are substantially eliminated before a thickness of the second nitride semiconductor layer grows to 800 nm.

US Pat. No. 10,510,921

GRAPHENE DISPLAY

Shenzhen China Star Optoe...

1. A graphene display, comprising:a first transparent substrate and a second transparent substrate, wherein the first transparent substrate and the second transparent substrate are disposed oppositely;
a first graphene light-emitting unit and a second graphene light-emitting unit, wherein the first graphene light-emitting unit and the second graphene light-emitting unit are disposed in overlapping and located between the first transparent substrate and the second transparent substrate; and
a first insulation layer, a metal shield layer and a second insulation layer, wherein the first insulation layer, the metal shield layer, and the second insulation layer are disposed in overlapping and located between the first graphene light-emitting unit and the second graphene light-emitting unit;
wherein the first graphene light-emitting unit includes a first source electrode pattern and a first drain electrode pattern, the first source electrode pattern and the first drain electrode pattern are disposed on the first transparent substrate and disposed separately with each other, a first graphene light-emitting pattern electrically connected with the first source electrode pattern and the first drain electrode pattern and located between the first source electrode pattern and the first drain electrode pattern, a third insulation layer set on and covering the first graphene light-emitting pattern, and a first gate electrode pattern disposed at a side of the third insulation layer away from the first transparent substrate;
wherein the second graphene light-emitting unit includes a second source electrode pattern and a second drain electrode pattern, the second source electrode pattern and the second drain electrode pattern are disposed on the second transparent substrate and disposed separately with each other, a second graphene light-emitting pattern electrically connected with the second source electrode pattern and the second drain electrode pattern and located between the second source electrode pattern and the second drain electrode pattern, a fourth insulation layer set on and covering the second graphene light-emitting pattern, and a second gate electrode pattern disposed at a side of the fourth insulation layer away from the second transparent substrate; and
wherein the first insulation layer, the metal shield layer and the second insulation layer are located between the first gate electrode pattern and the second gate electrode pattern.

US Pat. No. 10,510,914

TRANSPARENT ENERGY-HARVESTING DEVICES

Board of Trustees of Mich...

1. An energy harvesting system comprising a waveguide, and a sole waveguide redirecting material embedded in the waveguide, the waveguide coupled to either at least one solar photovoltaic array or at least one solar photovoltaic cell,wherein the sole waveguide redirecting material is visibly transparent and selectively harvests and emits light in a near-infrared (NIR) region of the electromagnetic spectrum by having a strongest peak absorbance of light at a wavelength of greater than about 650 nm and a strongest peak emission of light at a wavelength of greater than about 650 nm,
wherein the sole waveguide redirecting material creates luminescence with a quantum yield of greater than about 20%,
wherein the sole waveguide redirecting material is selected from the group consisting of 2-[7-(1,3-dihydro-1,3,3-trimethyl-2H-indol-2-ylidene)-1,3,5 heptatrienyl]-1,3,3-trimethyl-3H-indolium iodide (HITCI), 2-[2-[2-Chloro-3-[(1,3-dihydro-3,3-dimethyl-1-propyl-2H-indol-2 ylidene)ethylidene]-1-cyclohexen-1-yl]ethenyl]-3,3-dimethyl-1-propylindolium iodide (IR780), 3-(6-(2,5-dioxopyrrolidin-1-yloxy)-6-oxohexyl)-1,1-dimethyl-2-((E)-2-((E)-3((E)-2-(1,1,3-trimethyl-1H-benzo[e]indol-2(3H)-ylidene)ethylidene)cyclohex-1-enyl)vinyl)-1H-benzo[e]indolium chloride, 1-(6-,(2,5-dioxopyrrolidin-1-yloxy)-6-oxohexyl)-3,3-dimethyl-2-((E)-2-((E)-3-((E)-2-(1, 3,3-trimethylindolin-2-ylidene)ethylidene)cyclohex-1-enyl)vinyl)-3H-indolium chloride (Cy7 NHS ester; “CY”), 1,1-dimethyl-3-(6-oxo-6-(prop-2-ynylamino)hexyl)-2-((1E,3E,5E)-5-(1,1,3-trimethyl-1H-benzo[e]indol-2(3H)-ylidene)penta-1,3-dienyl)-1H-benzo[e]indolium chloride (Cy5.5 alkyne), 1-(5-carboxypentyl)-3,3-dimethyl-2-((E)-2-((E)-3-((E)-2-(1,3,3-trimethylindolin-2-ylidene)ethylidene)cyclohex-1-enyl)vinyl)-3H-indolium chloride (Cy7 carboxylic acid), and combinations thereof,
wherein the energy harvesting system is visibly transparent, having an average visible transmittance of greater than about 50% and a color rendering index of greater than about 85 at normal incidence to the waveguide.

US Pat. No. 10,510,912

IMAGE SENSOR DEVICE AND METHOD

Taiwan Semiconductor Manu...

1. A semiconductor device comprising:a first semiconductor substrate having a pixel region;
a second semiconductor substrate;
a heat sink between the first semiconductor substrate and the second semiconductor substrate;
a thermal via extending through the first semiconductor substrate, wherein a semiconductor material of the first semiconductor substrate extends along a sidewall of the thermal via, and wherein the thermal via is in thermal contact with the heat sink; and
a connector in physical contact with the thermal via, the connector and the heat sink being disposed on opposing sides of the first semiconductor substrate.

US Pat. No. 10,510,909

BACKSIDE-ILLUMINATED PHOTODETECTOR STRUCTURE AND METHOD OF MAKING THE SAME

Taiwan Semiconductor Manu...

1. A device comprising:a semiconductor region comprising:
a first doped region extending from a first top surface of the semiconductor region to a first intermediate level of the semiconductor region, wherein the first doped region is of a first conductivity type, and the first doped region comprises:
a contact region; and
a transverse region, wherein the transverse region comprises a first edge; and
a first reflecting region comprising:
a first portion over and contacting the first top surface of the semiconductor region, wherein the first portion comprises a second edge flushed with the first edge of the transverse region;
a second portion over and contacting a second top surface of the semiconductor region, wherein the second portion is higher than the first portion; and
a sidewall portion connecting the first portion to the second portion.

US Pat. No. 10,510,907

SOLAR PANEL

SUNPOWER CORPORATION, Sa...

1. A solar cell comprising:a silicon semiconductor diode structure having a front surface to be illuminated by light and a back surface;
a front surface metallization pattern comprising a plurality of straight front surface bus bars each having a long axis, the front surface bus bars arranged side-by-side with their long axes parallel and spaced apart from each other in a direction perpendicular to their long axes;
a rear surface metallization pattern comprising a plurality of straight rear surface bus bars each having a long axis, the rear surface bus bars arranged side-by-side with their long axes parallel and spaced apart from each other in a direction perpendicular to their long axes, and
a plurality of scribe lines cut into the back surface of the solar cell, each scribe line cut through a corresponding one of the rear surface bus bars parallel to the long axis of the rear surface bus bar into the silicon semiconductor diode structure;
wherein the long axes of the rear surface bus bars are oriented parallel to the long axes of the front surface bus bars, and each front surface bus bar partially, but not entirely, overlies a corresponding rear surface bus bar to overlap the corresponding rear surface bus bar in a direction perpendicular to the long axes of the front and rear surface bus bars.

US Pat. No. 10,510,905

POWER SCHOTTKY DIODES HAVING CLOSELY-SPACED DEEP BLOCKING JUNCTIONS IN A HEAVILY-DOPED DRIFT REGION

Cree, Inc., Durham, NC (...

1. A Schottky diode, comprising:a drift region having an upper portion and a lower portion, the drift region doped with dopants having a first conductivity type;
a channel in the upper portion of the drift region, the channel having the first conductivity type;
a first blocking junction and a second blocking junction adjacent the first blocking junction in the upper portion of the drift region, the first and second blocking junctions defining the channel therebetween, the first and second blocking junctions doped with dopants having a second conductivity type that is opposite the first conductivity type, the first and second blocking junctions extending between 1.0 and 2.0 microns into the upper portion of the drift region and being spaced apart from each other by less than 2.0 microns;
a first contact on the upper portion of the drift region; and
a second contact on the lower portion of the drift region and vertically spaced apart from the first contact,
wherein a doping concentration of the drift region is greater than 1.5×1016/cm3.

US Pat. No. 10,510,897

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Taiwan Semiconductor Manu...

1. A method for manufacturing a semiconductor device, the method comprising:forming one or more dielectric layers on a substrate;
forming a dummy strip over the one or more dielectric layers, the dummy strip having a first portion interposed between a second portion and a third portion;
forming a first spacer on a first sidewall and a second spacer on a second sidewall of the dummy strip;
after forming the first spacer and the second spacer, removing the second portion and the third portion of the dummy strip;
after removing the second portion and the third portion, forming a first insulating structure and a second insulating structure between the first spacer and the second spacer, wherein the third portion of the dummy strip is interposed between the first insulating structure and the second insulating structure;
removing the dummy strip; and
forming a gate structure between the first spacer and the second spacer, wherein the gate structure is interposed between the first insulating structure and the second insulating structure.

US Pat. No. 10,510,884

METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE

UNITED MICROELECTRONICS C...

1. A method for fabricating a semiconductor device, comprising:providing a semiconductor substrate;
forming a dummy gate on the semiconductor substrate, wherein the dummy gate has a first sidewall and a second sidewall opposite to the first sidewall;
forming a low-k dielectric layer on the first sidewall and the second sidewall of the dummy gate and the semiconductor substrate, wherein the dielectric constant of the low-k dielectric layer is smaller than or equal to 5, and wherein the low-k dielectric layer comprises silicon carbide (SiC) or black diamond;
partially etching the low-k dielectric layer on the second sidewall but not the first sidewall of the dummy gate, and partially etching the low-k dielectric layer on top of the dummy gate, so that the low-k dielectric layer is remained on the first sidewall, but not on the second sidewall of the dummy gate, and remained partially on top of the dummy gate;
depositing a spacer material layer on the low-k dielectric layer, the second sidewall of the dummy gate, and the semiconductor substrate;
etching the spacer material layer and the low-k dielectric layer to form a first spacer structure on the first sidewall and a second spacer structure on the second sidewall, wherein the first spacer structure has a bottom thickness that is greater than that of the second spacer structure, and the first spacer structure has a first spacer material layer and the low-k dielectric layer, but the second spacer structure has a second spacer material layer but does not have the low-k dielectric layer;
etching the semiconductor substrate to form a first recess adjacent to the first spacer structure and a second recess adjacent to the second spacer structure;
forming a first epitaxial layer in the first recess and a second epitaxial layer in the second recess;
forming a drain doping region in the semiconductor substrate adjacent to the first spacer structure and a source doping region in the semiconductor substrate adjacent to the second spacer structure; and
forming a first slot contact on the drain doping region and a second slot contact on the source doping region.

US Pat. No. 10,510,874

SEMICONDUCTOR DEVICE

TAIWAN SEMICONDUCTOR MANU...

1. A semiconductor device, comprising:a substrate;
a fin extending above the substrate; and
a plurality of isolation regions, wherein the fin is arranged between the two of the plurality of isolation regions, and one of the plurality of isolation regions comprises:
a first atomic layer deposition (ALD) layer implanted with an impurity;
a second ALD layer formed in the first ALD layer and implanted with the impurity, wherein a concentration of the impurity in the second ALD layer is higher than a concentration of the impurity in the first ALD layer;
a flowable chemical vapor deposition (FCVD) layer formed in the second ALD layer; and
a third ALD layer formed on the FCVD layer.

US Pat. No. 10,510,869

DEVICES AND METHODS FOR A POWER TRANSISTOR HAVING A SCHOTTKY OR SCHOTTKY-LIKE CONTACT

SILICET, LLC, Chapel Hil...

1. A power transistor structure comprising:a substrate, including:
a bottom substrate region of a first dopant polarity,
a drift region formed in or on the bottom substrate region, and
a body region;
a gate structure formed in or on the substrate;
a source region adjacent to the gate structure;
a drain region formed in or on the drift region; and
a conducting layer;
wherein the source region and/or the drain region is a contact, located substantially near a surface of the substrate, that establishes a rectifying barrier junction between the substrate and the conducting layer to provide immunity from parasitic bipolar action and thereby reduce or eliminate the amount of snapback in the drain-to-source current-voltage (I-V) characteristic of the power transistor structure; and
wherein non-continuous p+ body contacts are integrated into the source region to prevent the body region from floating.

US Pat. No. 10,510,866

SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF

TAIWAN SEMICONDUCTOR MANU...

1. A semiconductor structure, comprising:a fin structure;
a plurality of gates disposed with respect to the fin structure and comprising a first gate, a second gate, and a third gate, wherein the second gate is disposed between the first gate and the third gate, and a spacing between the first gate and the second gate is smaller than a spacing between the second gate and the third gate; and
wherein a foot portion of the first gate has a concave sidewall facing the second gate.

US Pat. No. 10,510,865

CAP LAYER AND ANNEAL FOR GAPFILL IMPROVEMENT

Taiwan Semiconductor Manu...

1. A method for semiconductor processing, the method comprising:performing a cyclic deposition-etch process to form a conformal film over a bottom surface and along sidewall surfaces of a feature on a substrate;
forming a dielectric cap layer on the conformal film;
performing an anneal process on the conformal film;
patterning the conformal film to form a dummy gate;
forming a dielectric layer along opposing sides of the dummy gate; and
removing the dummy gate.

US Pat. No. 10,510,863

POWER DEVICE HAVING A POLYSILICON-FILLED TRENCH WITH A TAPERED OXIDE THICKNESS

MAXPOWER SEMICONDUCTOR, I...

1. A semiconductor device comprising:a silicon-containing semiconductor material having a top surface;
a first trench etched into the top surface to a first depth, the first trench having sidewalls;
a tapered silicon dioxide layer, the tapered silicon dioxide layer comprising portions of the sidewalls of the trench that have been converted to the tapered silicon dioxide layer due to a portion of the silicon-containing semiconductor material being consumed by the tapered silicon dioxide layer, wherein there is greater consumption of the silicon-containing semiconductor material near a bottom of the first trench compared to near a top of the trench,
the tapering of the silicon dioxide layer being formed without etching the silicon dioxide layer;
a conductive material at least partially filling the first trench;
a first electrode overlying the silicon-containing semiconductor material; and
a second electrode, wherein current is conducted between the first electrode and second electrode when the device is turned on.

US Pat. No. 10,510,859

REDUCED CAPACITANCE COUPLING EFFECTS IN DEVICES

GLOBALFOUNDRIES SINGAPORE...

1. A semiconductor device comprising:a substrate including a circuit component; and
an interlevel dielectric level over the substrate, the interlevel dielectric level including a first dielectric layer, a second dielectric layer over the first dielectric layer, and a plurality of metal lines over the first dielectric layer, the plurality of metal lines partially disposed in the second dielectric layer,
wherein the second dielectric layer is comprised of a ferroelectric material.

US Pat. No. 10,510,850

SEMICONDUCTOR DEVICE AND METHOD

Taiwan Semiconductor Manu...

1. A method of manufacturing a semiconductor device, the method comprising:epitaxially manufacturing a first source/drain region over a semiconductor substrate and adjacent to a first spacer over the semiconductor substrate, wherein the source/drain region has a different lattice constant than the semiconductor substrate, the first spacer adjacent to a gate electrode, wherein after the manufacturing the first source/drain region has a first surface facing the semiconductor substrate and a second facing opposite the first surface, the second surface extending from a first side of the first source/drain region to a second side of the first source/drain region opposite the first side, wherein both the first side and the second side face away from an interior of the first source/drain region the second surface being free from the first spacer;
forming an opening exposing the first source/drain region; and
implanting dopants into the first source/drain region and the first spacer after the forming the opening, wherein the implanting the dopants forms a first implantation region within the first spacer.

US Pat. No. 10,510,843

INSULATED GATE SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME

MITSUBISHI ELECTRIC CORPO...

1. An insulated gate silicon carbide semiconductor device, comprising:a silicon carbide substrate of 4H type having a main surface having an off-angle of more than 0° in an off-direction with respect to a {0001} plane;
a drift layer of a first conductivity type provided on said silicon carbide substrate;
a first base region of a second conductivity type located on a surface side of said drift layer;
a source region of the first conductivity type located in said first base region;
a trench provided so as to be in contact with said source region and to reach a portion of said drift layer beneath said first base region, and having a plurality of trench sidewall surfaces;
a gate insulating film formed in said trench;
a gate electrode buried in said trench through said gate insulating film;
a protective diffusion layer of the second conductivity type provided in said drift layer while being in contact with a bottom of said trench; and
a second base region of the second conductivity type provided in said drift layer while being in contact with said protective diffusion layer, said first base region, and at least-part of at least one of said plurality of trench sidewall surfaces, said second base region having a bottom surface whose depth is equal to a bottom surface of said protective diffusion layer.

US Pat. No. 10,510,837

SYSTEMS AND METHODS FOR FORMING NANOWIRES USING ANODIC OXIDATION

Taiwan Semiconductor Manu...

1. A structure comprising:a semiconductor substrate;
a protruding structure formed on the semiconductor substrate; and
a plurality of nanowires and one or more nano-vias formed in the protruding structure, the semiconductor substrate including a ridge section that extends under the protruding structure, the plurality of nanowires comprising a first nanowire and a second nanowire, the first nanowire of the plurality of nanowires being disposed closer to a major surface of the semiconductor substrate than the second nanowire of the plurality of nanowires, the second nanowire of the plurality of nanowires having a diameter greater than a diameter of the first nanowire of the plurality of nanowires.

US Pat. No. 10,510,836

GATE TRENCH DEVICE WITH OXYGEN INSERTED SI-LAYERS

Infineon Technologies Aus...

1. A semiconductor device, comprising:a gate trench extending into a Si substrate, the gate trench including a gate electrode and a gate dielectric separating the gate electrode from the Si substrate;
a body region in the Si substrate adjacent the gate trench, the body region including a channel region which extends along a sidewall of the gate trench;
a source region in the Si substrate above the body region;
a contact trench extending into the Si substrate and filled with an electrically conductive material which contacts the source region and a highly doped body contact region at a bottom of the contact trench; and
a diffusion barrier structure extending along at least part of the channel region and disposed between the channel region and the highly doped body contact region, the diffusion barrier structure comprising alternating layers of Si and oxygen-doped Si.

US Pat. No. 10,510,831

LOW ON RESISTANCE HIGH VOLTAGE METAL OXIDE SEMICONDUCTOR TRANSISTOR

GLOBALFOUNDRIES SINGAPORE...

1. A device comprising:a substrate with a device region;
a transistor in the device region, wherein the transistor includes a gate on the substrate and having first and second gate sidewalls, a first source/drain (S/D) region disposed adjacent to the first gate sidewall, and a second source/drain (S/D) region disposed adjacent to the second gate sidewall;
a drain well disposed below and encompassing the first S/D region;
a body well disposed in the device region, wherein the body well encompasses the second S/D region and extends under a portion of the gate beyond the second gate sidewall; and
a drift well disposed in the substrate, wherein the drift well comprises:
a non-cut out region disposed under a first portion of the first S/D region and the drain well, the non-cut out region extending under the gate to the body well and coupling the first portion of the first S/D region to the body well, the non-cut out region completely encompassing the first portion of the first S/D region, and
a cut out region disposed under a second portion of the first S/D region and the drain well, the cut out region devoid of the drift well, and the cut out region structured to reduce an on resistance of the transistor.

US Pat. No. 10,510,829

SECONDARY USE OF ASPECT RATIO TRAPPING TRENCHES AS RESISTOR STRUCTURES

International Business Ma...

1. A method for forming a semiconductor structure comprising:providing a substrate with an insulator pad overlying at least a top portion of the substrate;
forming a plurality of dielectric columns overlying at least one of the substrate and the insulator pad, wherein each dielectric column is separated from another dielectric column to form a corresponding plurality of aspect ratio trapping (ART) trenches, wherein the insulator pad forms a bottom portion of a first ART trench of the plurality of ART trenches, and wherein a portion of the substrate forms a bottom portion of a second ART trench of the plurality of ART trenches;
forming a III-V semiconductor material stack in the second ART trench; and
forming a first resistive region in the first ART trench, wherein the first resistive region is in contact with the insulator pad.

US Pat. No. 10,510,828

CAPACITOR WITH HIGH ASPECT RADIO SILICON CORES

Nano Henry, Inc., San Di...

1. A high aspect ratio capacitor comprising:a single-piece silicon (Si) substrate having a first surface and a second surface;
a plurality of at least three Si cores extending from the substrate first surface, each Si core have a height (CZ) and an equal spacing (SX) between adjacent Si cores by a spacing (SX), with a spacing aspect ratio (aSPACE) of CZ-to-SX of at least 5:1;
a dielectric layer conformally coating the Si cores;
an electrical conductor layer conformally coating the dielectric layer; and
an electrode formed on the substrate second surface, underlying the plurality of Si cores.

US Pat. No. 10,510,827

CAPACITOR HAVING MULTIPLE GRAPHENE STRUCTURES

Taiwan Semiconductor Manu...

1. A capacitor comprising:a first graphene structure having a first plurality of graphene layers;
a dielectric layer over the first graphene structure;
a conductive growth layer over the dielectric layer, wherein the dielectric layer extends laterally past a sidewall of the conductive growth layer; and
a second graphene structure over the conductive growth layer, wherein the second graphene structure has a second plurality of graphene layers, wherein the first graphene structure extends laterally past a sidewall of the second graphene structure.

US Pat. No. 10,510,822

DISPLAY DEVICE

Samsung Display Co., Ltd....

1. A display device comprising:a substrate having a display area and a non-display area;
a plurality of pixels in the display area;
scan lines for supplying a scan signal to the pixels, the scan lines extending in a first direction;
data lines for supplying a data signal to the pixels, the data lines extending in a second direction crossing the first direction; and
a first dummy part in the non-display area, adjacent to an outermost pixel, connected to an outermost data line of the display area, forming a parasitic capacitor with the outermost pixel, and comprising a first dummy data line and a first dummy power pattern extending in parallel to the data lines.

US Pat. No. 10,510,813

TRANSPARENT DISPLAY DEVICE

LG Display Co., Ltd., Se...

12. A transparent display device including a transmissive area and an emissive area comprising:a first display panel including a first pixel including a plurality of subpixels displaying an image and including a plurality of color filters disposed corresponding to the first pixel in the emissive area and extended to the transmissive area;
a second display panel including a second pixel, disposed on the first display panel, vertically overlapping the first display panel at the emissive area and the transmissive area, having a liquid crystal layer disposed only in the transmissive area of the first display panel, and configured to control an amount of light incident into the first display panel; and
a first anti-reflection part disposed on the first display panel and preventing light reflecting back to outside,
wherein the liquid crystal layer of the second display panel vertically overlaps the color filters extended to the transmissive area and does not vertically overlap the color filters in the emissive area, and
wherein the second pixel of the second display panel has the number of subpixels the same as the plurality of subpixels in the first pixel of the first display panel.

US Pat. No. 10,510,810

DISPLAY DEVICE INCLUDING ORGANIC LAYER INCLUDING PIGMENT OR DYE AND METHOD OF MANUFACTURING THEREOF

SAMSUNG DISPLAY CO. LTD.,...

1. A display device, in which a first pixel and a second pixel are defined, the display device comprising:a display panel comprising:
a base substrate; and
a light-emitting element disposed on the base substrate;
a color filter layer disposed over the display panel, wherein the color filter layer comprises a first color filter disposed in the first pixel and a second color filter disposed in the second pixel; and
a plurality of organic layers disposed over the display panel, wherein a plurality of pigments or dyes exhibiting different colors from each other is disposed in each of the plurality of organic layers,
wherein the first pixel displays a first color, and the second pixel displays a second color different from the first color, and
wherein the plurality of organic layers comprises a first organic layer integrally formed over the first pixel and the second pixel.

US Pat. No. 10,510,805

METHODS OF FORMING METAL ON INHOMOGENEOUS SURFACES AND STRUCTURES INCORPORATING METAL ON INHOMOGENEOUS SURFACES

Micron Technology, Inc., ...

1. A memory cell, comprising:a first conductive line extending in a first direction;
a second conductive line comprising tungsten disposed above a seeding line formed of a seeding material comprising an amorphous silicon material, the second conductive line extending in a second direction and crossing the first conductive line, the second direction different from the first direction, the seeding line having a substantially planar top surface, a bottom surface of the seeding line in contact with an electrode surface and a first insulator surface in the first direction, wherein a sidewall of the seeding line is in contact with an adjacent second insulator surface in the second direction, and the second conductive line being in contact with and formed across the substantially planar top surface of the seeding line, the substantially planar top surface having a local step height variation thickness of about 5 nm, the tungsten having a resistivity based at least in part on a grain size distribution, the grain size distribution being based at least in part on the seeding line having the substantially planar top surface and a thickness of the seeding line;
a chalcogenide element interposed between the first and second conductive lines,
wherein the seeding line is interposed between the second conductive line and the chalcogenide element, the seeding line contacting the second conductive line; and
a carbon electrode interposing the chalcogenide element and the seeding line, the carbon electrode in direct contact with the seeding line.

US Pat. No. 10,510,804

SEMICONDUCTOR STRUCTURE INTEGRATED WITH MAGNETIC TUNNELING JUNCTION AND MANUFACTURING METHOD THEREOF

TAIWAN SEMICONDUCTOR MANU...

1. A method for manufacturing a semiconductor structure, comprising:forming a transistor region over a substrate, the transistor region comprising a gate and a first doped region;
forming a magnetic tunneling junction (MTJ) directly over the first doped region, electrically coupling to the transistor region; and
forming a metal via directly over the gate after forming the MTJ, the metal via being at a same level with the MTJ, forming the metal via comprising:
filling conductive material in an opening of a dielectric layer surrounding the MTJ; and
removing a portion of the conductive material and subsequently removing a portion of the dielectric layer until a top surface of the MTJ is exposed.

US Pat. No. 10,510,791

ELEVATED PHOTODIODE WITH A STACKED SCHEME

Taiwan Semiconductor Manu...

1. A semiconductor device comprising:a first semiconductor die comprising a first semiconductor substrate;
a second semiconductor die bonded to the first semiconductor die; and
a pixel unit disposed in both the first semiconductor die and the second semiconductor die, the pixel unit comprising:
a storage node in the first semiconductor substrate;
a photodiode over and electrically connected to the storage node; and
read out circuitry, wherein the storage node is interposed between the photodiode and the read out circuitry.

US Pat. No. 10,510,788

SEMICONDUCTOR IMAGE SENSOR

TAIWAN SEMICONDUCTOR MANU...

9. A back side illumination (BSI) image sensor comprising:a substrate;
a pixel sensor; and
a hybrid isolation surrounding the pixel sensor in the substrate, and the hybrid isolation comprising:
a conductive structure;
a dielectric layer covering at least sidewalls of the conductive structure; and
a first insulating structure disposed in the substrate,
wherein the dielectric layer covers sidewalls and a bottom surface of the first insulating structure.

US Pat. No. 10,510,784

ARRAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME, AND DISPLAY APPARATUS

BOE TECHNOLOGY GROUP CO.,...

1. A method of manufacturing an array substrate, the method comprising steps of:forming a first electrode layer, a metal gate layer and a first layer of non-oxide insulation material, the first layer of non-oxide insulation material being formed on an upper surface of the metal gate layer; and
forming, by using a first patterning process, patterns including a common electrode and triple layers of a first sub-electrode and a gate and a first non-oxide insulation layer, wherein,
the common electrode and the first sub-electrode are formed from the first electrode layer and the gate is formed from the metal gate layer, the first non-oxide insulation layer is formed from the first layer of non-oxide insulation material; and
the gate is formed between the first sub-electrode and the first non-oxide insulation layer, a material for the metal gate layer includes copper or copper alloy; and
the common electrode is a single layer, and a surface of the common electrode is free of the metal gate layer and the first layer of non-oxide insulation material after completion of the first patterning process.

US Pat. No. 10,510,782

ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A manufacturing method for an array substrate, comprising:forming a first signal line and a second signal line which have a same extension direction and are separated from each other on a base substrate;
forming an initial pixel electrode on the base substrate, wherein the initial pixel electrode includes a first extension portion, the initial pixel electrode is connected to the first signal line by the first extension portion, and the initial pixel electrode is separated from the second signal line; and
removing at least part of the first extension portion of the initial pixel electrode to form a pixel electrode separated from the first signal line,
wherein
the method further comprises: forming a common electrode on the base substrate after forming the first signal line, the second signal line and the initial pixel electrode;
the forming the common electrode on the base substrate includes: forming a common electrode film on the base substrate; and performing a patterning treatment on the common electrode film to form the common electrode; and
in the patterning treatment, the at least part of the first extension portion of the initial pixel electrode is removed.

US Pat. No. 10,510,780

ARRAY SUBSTRATE AND DISPLAY DEVICE

BOE Technology Group Co.,...

1. An array substrate, comprising:a plurality of sub-pixel regions arranged in rows and columns, each sub-pixel region of the plurality of sub-pixel regions comprising a pixel aperture region;
a common electrode, provided in each sub-pixel region;
a first conductive pattern, provided between two adjacent sub-pixel regions in a row direction, at least part of the first conductive pattern being located between pixel aperture regions of the two adjacent sub-pixel regions in the row direction, and the first conductive pattern being connected to a common voltage; and
a first connecting pattern, provided in each sub-pixel region and outside of the pixel aperture region, the first connecting pattern being configured to connect common electrodes of two adjacent sub-pixel regions in a column direction with each other.

US Pat. No. 10,510,770

THREE-DIMENSIONAL MEMORY DEVICE

TOSHIBA MEMORY CORPORATIO...

1. A semiconductor device, comprising:a base body portion including a first layer and a second layer, the first layer being provided on a substrate with at least a first insulating film interposed, the first layer including a first portion and a second portion arranged along a first direction, the first portion being of a semiconductor, the second portion being of a semiconductor, the second layer including a first region and a second region, the first region being positioned on the first portion, the second region being positioned on the second portion, a portion of a source being formed of the first region;
a stacked body provided above the base body portion, the stacked body alternately including a conductive layer and an insulating layer;
a first pedestal portion provided inside at least the second layer, the first pedestal portion including a portion extending in the first direction in the second region of the second layer;
a plate portion including at least a first insulator, being provided from an upper end of the stacked body to the second layer, extending in the first direction, and contacting the first region of the second layer and the portion of the first pedestal portion extending in the first direction;
a plurality of first columnar portions, the plurality of first columnar portions each including a semiconductor layer and a memory film, being provided from the upper end of the stacked body to the second layer, and being adjacent to the plate portion in a second direction with the stacked body interposed, the second direction crossing the first direction, the semiconductor layer contacting the first region of the second layer, the memory film including a charge trapping portion between the semiconductor layer and the conductive layer; and
a plurality of second columnar portions including at least a second insulator, being provided from the upper end of the stacked body to the second layer, being adjacent to the plate portion in the second direction with the stacked body interposed, and being adjacent to the first pedestal portion in the second direction with the second region of the second layer interposed.

US Pat. No. 10,510,756

SEMICONDUCTOR DEVICE AND METHOD

Taiwan Semiconductor Manu...

1. A method comprising:forming a fin extending from a substrate;
forming an interface layer on the fin;
depositing a gate dielectric layer on the interface layer, the gate dielectric layer having a first surface facing towards the interface layer and a second surface facing away from the interface layer;
doping the gate dielectric layer with a dipole-inducing element, the gate dielectric layer having a first concentration of the dipole-inducing element at the second surface after the doping;
depositing a sacrificial layer on the gate dielectric layer;
removing the sacrificial layer, the gate dielectric layer having a second concentration of the dipole-inducing element at the second surface after the removing, the second concentration being less than the first concentration;
depositing a capping layer on the gate dielectric layer; and
forming a gate electrode layer on the capping layer.

US Pat. No. 10,510,755

SEMICONDUCTOR DEVICE AND MANUFACTURE METHOD THEREOF

TAIWAN SEMICONDUCTOR MANU...

1. A semiconductor device, comprising:a first gate stack comprising:
a first work function conductor; and
a first filling conductor comprising a plug portion and a cap portion; and
a first gate spacer disposed on a first side of the first gate stack, wherein:
the cap portion overlies an uppermost surface of the first work function conductor, and
a sidewall of the plug portion is spaced apart from a sidewall of the first gate spacer by the first work function conductor.

US Pat. No. 10,510,752

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Taiwan Semiconductor Manu...

1. A method for manufacturing a semiconductor device comprising:forming a semiconductor fin on a substrate;
forming a gate dielectric to cover the semiconductor fin;
forming a dummy gate on the gate dielectric and the semiconductor fin;
forming at least one gate spacer on at least one sidewall of the dummy gate;
removing at least a portion of the semiconductor fin and at least a portion of the gate dielectric uncovered by the dummy gate and the gate spacer and forming a first recess between the gate spacer and the semiconductor fin; and
removing at least another portion of the semiconductor fin covered by the gate dielectric to form a second recess between the gate dielectric and the semiconductor fin.

US Pat. No. 10,510,751

FINFET ISOLATION STRUCTURE AND METHOD FOR FABRICATING THE SAME

Taiwan Semiconductor Manu...

1. A semiconductor device, comprising:a substrate;
an insulating layer formed over the substrate;
a plurality of fins formed vertically from a surface of the substrate, the plurality of fins extending through the insulating layer and above a top surface of the insulating layer;
a gate structure formed over a portion of fins and over the top surface of the insulating layer;
a source/drain structure disposed adjacent to opposing sides of the gate structure, the source/drain structure contacting a portion of the fin;
a dielectric layer formed over the insulating layer;
a first contact trench extending a first depth through the dielectric layer to expose the source/drain structure, the first contact trench containing an electrical conductive material; and
a second contact trench extending a second depth into the dielectric layer, wherein:
the second contact trench contains the electrical conductive material;
the second contact trench is spaced away from the gate structure such that electrical conductive material in the second contact trench is free from contact with the gate structure;
the second depth is greater than the first depth; and
an air gap extends from a bottommost surface of the electrical conductive material to a bottommost surface of the second contact trench defined by the dielectric layer, wherein an entirety of the air gap is disposed within the dielectric layer.

US Pat. No. 10,510,738

THREE-DIMENSIONAL MEMORY DEVICE HAVING SUPPORT-DIE-ASSISTED SOURCE POWER DISTRIBUTION AND METHOD OF MAKING THEREOF

SANDISK TECHNOLOGIES LLC,...

1. A three-dimensional memory device, comprising:a memory-containing die comprising a three-dimensional memory array, a memory dielectric material layer located on a first side of the three-dimensional memory array, and memory-side bonding pads included in the memory dielectric material layer and electrically connected to a respective node within the three-dimensional memory array; and
a logic die comprising a peripheral circuitry configured to control operation of the three-dimensional memory array, logic dielectric material layers located on a first side of the peripheral circuitry, and logic-side bonding pads included in the logic dielectric material layers and electrically connected to a respective node of the peripheral circuitry and bonded to a respective one, or a respective subset, of the memory-side bonding pads, wherein the logic-side bonding pads comprise:
a pad-level mesh structure electrically connected to a source power supply circuit within the peripheral circuitry and including an array of discrete openings therethrough; and
discrete logic-side bonding pads electrically isolated one from another and from the pad-level mesh structure.

US Pat. No. 10,510,724

SEMICONDUCTOR DEVICE PACKAGE

SAMSUNG ELECTRONICS CO., ...

1. A semiconductor device package comprising:a buffer layer having an upper surface perpendicular to a first direction;
a plurality of semiconductor chips stacked on the buffer layer one by one in the first direction; and
a chip sealing material sealing sidewalls of the plurality of semiconductor chips,
wherein the plurality of semiconductor chips comprise an upper semiconductor chip at a farthest position from the buffer layer and a remaining plurality of intermediate semiconductor chips,
each of the plurality of intermediate semiconductor chips comprises through silicon vias (TSVs) passing through each of the plurality of intermediate semiconductor chips,
the upper semiconductor chip comprises a trench formed in at least a portion of a periphery of the upper semiconductor chip and covered by the chip sealing material,
a depth of the trench varies as a function of position, and
a position at which the trench has a maximum depth is radially closer to a center of the upper semiconductor chip than a position at which the trench has a minimum depth when a depth of the trench is measured in the first direction.

US Pat. No. 10,510,717

CHIP ON PACKAGE STRUCTURE AND METHOD

Taiwan Semiconductor Manu...

1. A semiconductor device comprising:an integrated fan out package, the integrated fan out package comprising a first semiconductor device, an encapsulant surrounding the first semiconductor device, a second semiconductor device, and a via in the encapsulant, the via having a first height at least as large as a second height of the first semiconductor device; and
a third semiconductor device attached to the integrated fan out package, wherein the third semiconductor device is connected to the second semiconductor device through the first semiconductor device, the third semiconductor device being electrically connected to through substrate vias extending through a substrate of the first semiconductor device.

US Pat. No. 10,510,698

SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING

Taiwan Semiconductor Manu...

1. A package comprising:a first die;
a first passivation layer overlying the first die;
a second die adjacent the first die;
a first insulating layer overlying the first die and the second die, wherein the first passivation layer is in physical contact with the first insulating layer; and
a molding material extending along sidewalls of the first die, sidewalls of the second die and sidewalls of the first passivation layer, wherein the molding material extends between the second die and the first insulating layer.

US Pat. No. 10,510,686

SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF

Taiwan Semiconductor Manu...

16. A manufacturing method of a semiconductor package, comprising:disposing a semiconductor die on a redistribution structure with a die attach material attached therebetween, wherein an extruded region of the die attach material is adhered to a bottom portion of the semiconductor die, and in a top view, a width of the extruded region of the die attach material decreases from a midpoint of a bottom edge of the extruded region to an endpoint of the bottom edge of the extruded region; and
covering the semiconductor die and the die attach material with an insulating encapsulant.

US Pat. No. 10,510,674

FAN-OUT PACKAGE HAVING A MAIN DIE AND A DUMMY DIE, AND METHOD OF FORMING

TAIWAN SEMICONDUCTOR MANU...

1. A method, comprising:placing a functional die and a first dummy die on a first substrate, wherein the first dummy die comprises a polymer layer overlying a second substrate;
encapsulating sidewalls of the functional die and the first dummy die with a molding material;
forming a redistribution structure over the functional die and the first dummy die, the redistribution structure comprising a plurality of conductive lines and a plurality of dielectric layers, wherein the functional die is electrically connected to a first conductive line of the plurality of conductive lines, and wherein the polymer layer of the first dummy die faces the redistribution structure; and
forming a plurality of external connectors on the redistribution structure.

US Pat. No. 10,510,663

TRANSISTOR STRUCTURES HAVING ELECTRICALLY FLOATING METAL LAYER BETWEEN ACTIVE METAL LINES

GLOBALFOUNDRIES INC., Gr...

1. A structure comprising active metal lines arranged side-by-side and separated from electrically floating metal layers by an insulator material, the electrically floating metal layers alternating in the single wiring plane between the active metal lines, each of the electrically floating metal layers has a width less than a width of each of the active metal lines, wherein the active metal lines are source lines and drain lines of an active device.

US Pat. No. 10,510,662

VERTICALLY ORIENTED METAL SILICIDE CONTAINING E-FUSE DEVICE AND METHODS OF MAKING SAME

GLOBALFOUNDRIES Inc., Gr...

1. A method, comprising:forming a vertically oriented semiconductor (VOS) structure in a semiconductor substrate;
forming first and second oppositely doped regions in said VOS structure, said first and second oppositely doped regions constituting a diode; and
performing a metal silicide formation process to convert at least a portion of said VOS structure into a metal silicide material, thereby forming a conductive silicide vertically oriented e-fuse, wherein said first and second oppositely doped regions are positioned vertically above said conductive silicide vertically oriented e-fuse and wherein said first and second oppositely doped regions are formed prior to performing said metal silicide formation process.

US Pat. No. 10,510,661

SEMICONDUCTOR DEVICES AND METHODS OF FORMING THE SAME

Taiwan Semiconductor Manu...

1. A semiconductor device, comprising:a conductive layer;
a first dielectric layer disposed over the conductive layer;
a magnetic layer disposed over the first dielectric layer; and
a plurality of tantalum layers and a plurality of tantalum oxide layers, alternately disposed between the magnetic layer and the first dielectric layer.

US Pat. No. 10,510,654

DUMMY METAL WITH ZIGZAGGED EDGES

Taiwan Semiconductor Manu...

1. An integrated circuit structure comprising:a metal pad;
a first dielectric layer over the metal pad;
a conductive line comprising a first portion over the first dielectric layer, and a second portion extending into the first dielectric layer to connect to the metal pad; and
a first metal plate over the first dielectric layer, wherein the first metal plate fully encircles the conductive line, and wherein the first metal plate comprises an edge, and the edge comprises:
a first portion and a second portion aligned to a straight line in a top view of the integrated circuit structure; and
a third portion between and connected to the first portion and the second portion, wherein the third portion offsets from the straight line.

US Pat. No. 10,510,651

HARD MACRO HAVING BLOCKAGE SITES, INTEGRATED CIRCUIT INCLUDING SAME AND METHOD OF ROUTING THROUGH A HARD MACRO

QUALCOMM Incorporated, S...

1. A method comprising:forming a first layer of an integrated circuit;
forming a second layer of the integrated circuit on the first layer of the integrated circuit, the second layer including at least one hard macro;
forming at least one via through the hard macro;
forming a third layer on top of the second layer; and
electrically connecting an element on the first layer to an element on the third layer using the at least one via.

US Pat. No. 10,510,642

SEMICONDUCTOR DEVICE MODULE

Mitsubishi Electric Corpo...

1. A semiconductor device module, comprising:a semiconductor device including a top electrode and a bottom electrode;
a substrate on which the bottom electrode of the semiconductor device is bonded;
a heat sink on which the substrate is mounted;
a lead electrode through which a main current of the semiconductor device flows;
an insulating case disposed to enclose the substrate; and
a retainer disposed in a cantilevered manner in the insulating case, the retainer supporting the lead electrode,
wherein the lead electrode has one end brazed to the top electrode of the semiconductor device, and another end side inserted into a wall of the insulating case, and
the retainer is engaged on the one end of the lead electrode to restrict movement of the lead electrode.

US Pat. No. 10,510,615

FINFET DEVICES AND METHODS OF FORMING THE SAME

Taiwan Semiconductor Manu...

13. A method of forming a fin field-effect transistor (FinFET) comprising:forming a first semiconductor strip and a second semiconductor strip over a substrate;
forming isolation structures around the first semiconductor strip and the second semiconductor strip; and
removing upper portions of the isolation structures, the removing comprising:
performing a first etching process in a first chamber using a first etching gas, the first etching process removing upper portions of the isolation structures, and exposing upper portions of the first semiconductor strip and the second semiconductor strip, wherein after the first etching process, a first surface region of the isolation structures contacting the first semiconductor strip extends further away from the substrate than a second surface region of the isolation structures midway between the first semiconductor strip and the second semiconductor strip; and
after performing the first etch process, performing a second etching process in the first chamber using a second etching gas different from the first etching gas, the second etching gas having a lower etch selectivity between the first surface region and the second surface region as compared to the first etching gas.

US Pat. No. 10,510,604

SEMICONDUCTOR DEVICE AND METHOD

Taiwan Semiconductor Manu...

1. A method of manufacturing a semiconductor device, the method comprising:etching an opening into a semiconductor substrate between a first semiconductor die and a second semiconductor die;
covering the opening with a cover;
thinning the semiconductor substrate to a thickness of between about 100 ?m and about 500 ?m;
removing the cover after the thinning the semiconductor substrate;
passing a saw blade through the opening after the removing the cover; and
thinning part of the semiconductor substrate attached to the singulated individual dies after the passing the saw blade through the opening after the removing the cover to a thickness of between about 10 ?m and about 250 ?m.

US Pat. No. 10,510,603

CONDUCTIVE VIAS IN SEMICONDUCTOR PACKAGES AND METHODS OF FORMING SAME

Taiwan Semiconductor Manu...

1. A method comprising:bonding a first die to a first side of an interposer, the interposer comprising a substrate, and the interposer is free of any active devices;
depositing a first insulating layer on a second side of the interposer opposite the first side;
patterning an opening through the substrate and the first insulating layer;
depositing a second insulating layer over the first insulating layer and along sidewalls and a lateral surface of the opening, the second insulating layer comprising silicon;
removing lateral portions of the second insulating layer to define a sidewall spacer on sidewalls of the opening; and
forming a through via in the opening, wherein the through via is electrically connected to the first die.

US Pat. No. 10,510,599

FINFET SWITCH

Taiwan Semiconductor Manu...

1. A semiconductor switch structure comprising:contacts, including source contacts and drain contacts;
gates, wherein the contacts and the gates are elongated in a first direction and are spaced apart from each other in a second direction perpendicular to the first direction, and wherein the gates are interspersed between the contacts;
fins that underlie both the contacts and the gates and that are elongated in the second direction and are spaced apart from each other in the first direction, wherein the contacts and gates are in direct contact with the fins that are beneath them;
a contact via that extends through one of the contacts without contacting a gate or a fin;
a gate via that extends through one of the gates without contacting a contact or a fin; and
a contact-gate via that is in contact with both a contact and a gate but not a fin.

US Pat. No. 10,510,598

SELF-ALIGNED SPACERS AND METHOD FORMING SAME

Taiwan Semiconductor Manu...

1. A method comprising:forming a first inter-layer dielectric overlying a source/drain region of a transistor;
forming a first source/drain contact opening in the first inter-layer dielectric;
forming a first source/drain contact spacer in the first source/drain contact opening;
filling a remaining portion of the first source/drain contact opening to form a first source/drain contact plug electrically coupling to the source/drain region;
forming a first etch stop layer over and in contact with the first inter-layer dielectric, a gate spacer of the transistor and the first source/drain contact plug;
forming a second inter-layer dielectric overlying and contacting the first etch stop layer;
forming a second source/drain contact plug in the second inter-layer dielectric, wherein the second source/drain contact plug is over and contacting the first source/drain contact plug;
forming a third inter-layer dielectric overlying the second inter-layer dielectric;
etching the second inter-layer dielectric and the third inter-layer dielectric to form a gate contact opening, with a gate electrode of the transistor exposed through the gate contact opening;
etching the third inter-layer dielectric, wherein a second source/drain contact opening is formed to reveal the second source/drain contact plug;
simultaneously forming a gate contact spacer and a source/drain contact spacer extending into the gate contact opening and the second source/drain contact opening, respectively, wherein the gate contact spacer comprises an edge contacting an edge of the gate spacer to form a vertical interface; and
filling remaining portions of the gate contact opening and the second source/drain contact opening simultaneously to form a gate contact plug and a third source/drain contact plug, respectively.

US Pat. No. 10,510,594

METHOD OF CLEANING WAFER AFTER CMP

Taiwan Semiconductor Manu...

1. A structure comprising:a first dielectric layer;
a first metal plug in the first dielectric layer, wherein a top surface of the first metal plug is substantially coplanar with a top surface of the first dielectric layer;
a carbon-rich layer overlying and contacting the first metal plug, wherein the carbon-rich layer has a first carbon concentration higher than a second carbon concentration of the first metal plug; and
a second dielectric layer overlying and contacting the carbon-rich layer, wherein the second dielectric layer comprises carbon and has a third carbon concentration, and the first carbon concentration is higher than the third carbon concentration.

US Pat. No. 10,510,589

CYCLIC CONFORMAL DEPOSITION/ANNEAL/ETCH FOR SI GAPFILL

APPLIED MATERIALS, INC., ...

1. A method for manufacturing a semiconductor device, comprising:positioning a substrate having one or more features formed in a surface of the substrate, each of the one or more features having sidewalls and a bottom surface, in a process chamber;
depositing an amorphous silicon film over the substrate having one or more features;
annealing the deposited amorphous silicon film to heal one or more seams formed in the one or more features; and
etching a portion of the annealed amorphous silicon film to remove one or more voids formed in the annealed amorphous silicon film in the one or more features.

US Pat. No. 10,510,573

LOADING APPARATUS AND OPERATING METHOD THEREOF

Taiwan Semiconductor Manu...

1. An operating method of a loading apparatus for processing a wafer cassette containing a plurality of wafers, the operating method comprising:loading the wafer cassette on a stage of the loading apparatus, wherein the stage is configured to carry the wafer cassette and movably coupled to a main body of the loading apparatus to move within and out of a space of the main body;
vertically moving the stage among a standby position, a lifting position and an intermediate position, wherein the intermediate position is inside the space of the main body;
horizontally moving the stage from the intermediate position to a door engaging position inside the space of the main body;
positioning the stage at the door engaging position and opening a cassette door of the wafer cassette;
horizontally moving the stage from the door engaging position to the intermediate position; and
horizontally moving the stage between the lifting position and an unloading position outside the space of the main body after opening the cassette door of the wafer cassette.

US Pat. No. 10,510,561

SEMICONDUCTOR DEVICE PACKAGE INCLUDING CONFORMAL METAL CAP CONTACTING EACH SEMICONDUCTOR DIE

Taiwan Semiconductor Manu...

1. A method of manufacturing a semiconductor device, the method comprising:bonding a first semiconductor die and a second semiconductor die to a first substrate;
forming a conductive layer over the first semiconductor die, the second semiconductor die, and the first substrate;
applying an encapsulant over the conductive layer;
removing a portion of the encapsulant, wherein the removing the portion of the encapsulant exposes the conductive layer;
removing a portion of the conductive layer, wherein the removing the portion of the conductive layer exposes the first semiconductor die; and
performing a singulation process on the first substrate, a surface of the conductive layer and a surface of the encapsulant being formed by the singulation process, the surface of the conductive layer being coplanar with the surface of the encapsulant, a portion of the encapsulant extending from a first portion of the conductive layer on a first sidewall of the first semiconductor die to a second portion of the conductive layer on a second sidewall of the second semiconductor die after performing the singulation process, the first sidewall facing the second sidewall.

US Pat. No. 10,510,550

POLARIZATION-DEPENDENT LASER-ASSISTED PLASMA ETCHING

The Board of Trustees of ...

1. A method of laser-assisted plasma etching with polarized light, the method comprising:providing a surface of a substrate including at least one surface region having trenches arranged in a unidirectional pattern along an x-direction or a y-direction of the surface, each trench having a depth along a z-direction, wherein the trenches extend substantially in parallel with each other and have a half-pitch of about 100 nm or less;
exposing the surface to a plasma;
illuminating the surface with a pulsed laser beam during the exposure to the plasma, the pulsed laser beam having a predetermined polarization along the x-direction or the y-direction; and
etching the trenches.

US Pat. No. 10,510,546

SCHEMES FOR SELECTIVE DEPOSITION FOR PATTERNING APPLICATIONS

Applied Materials, Inc., ...

1. A selective deposition method comprising:depositing a second metal film selectively on a first metal surface to form a second metal surface;
passivating the second metal surface by forming a cross-linked self-assembled monolayer comprising in the range of about 5 to about 20 carbon atoms to form a passivation layer;
depositing a second dielectric film selectively on a first dielectric surface to form a second dielectric surface; and
removing the passivation layer from the second metal surface,
wherein the first dielectric surface is not passivated during deposition of the second metal film.

US Pat. No. 10,510,543

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THEREOF

FUJI ELECTRIC CO., LTD., ...

1. A semiconductor device, comprising:a semiconductor substrate of a first conductivity type;
a high-resistance first semiconductor region of the first conductivity type, having a first surface and a second surface opposite to the first surface, and being formed on the semiconductor substrate, the second surface facing the semiconductor substrate;
a second semiconductor region of a second conductivity type provided at the first surface of the high-resistance first semiconductor region; and
a third semiconductor region of the first conductivity type provided between the high-resistance first semiconductor region and the semiconductor substrate, as a recombination promoting layer, the third semiconductor region having an impurity concentration higher than an impurity concentration of the high-resistance first semiconductor region, the third semiconductor region having defects each of which functions as a recombination site, a concentration of the defects in the third semiconductor region being higher than 1×1012/cm3, the third semiconductor region having a Z1/2 energy-level that is a carbon deficiency defect energy-level introduced by the defects.

US Pat. No. 10,510,530

METHODS FOR FORMING DOPED SILICON OXIDE THIN FILMS

ASM International N.V., ...

1. A method for depositing doped silicon oxide on a substrate in a reaction chamber comprising at least one doped silicon oxide deposition cycle comprising, in order:contacting the substrate with a dopant precursor;
exposing the substrate to a purge gas;
contacting the substrate with a first reactive species;
contacting the substrate with a silicon precursor; and
contacting the substrate with a second reactive species, wherein the second reactive species is formed by generating an oxygen plasma in the reaction chamber.

US Pat. No. 10,510,528

SUBSTRATE PROCESSING METHOD

SCREEN Holdings Co., Ltd....

1. A substrate processing method comprising:a replacement step of replacing a rinse liquid adhered to a front surface of a substrate with a low surface tension liquid whose surface tension is lower than a surface tension of the rinse liquid; and
a spin dry step of rotating, after completion of the replacement step, the substrate about a predetermined rotation axis to spin off the low surface tension liquid so as to dry the front surface,
wherein the replacement step includes:
a low surface tension liquid supply step of supplying the low surface tension liquid to the front surface while supplying a heating fluid to a rear surface on a side opposite to the front surface; and
a post-heating step of supplying the heating fluid to the rear surface on the side opposite to the front surface of the substrate, in a state in which the supply of the low surface tension liquid to the front surface is stopped, before start of the spin dry step after completion of the low surface tension liquid supply step,
wherein the low surface tension liquid supply step includes a step of discharging the low surface tension liquid from a low surface tension liquid nozzle which is located above the front surface of the substrate,
the spin dry step is performed in a state in which an opposite member is opposite above the front surface of the substrate and
in parallel with the post-heating step, the low surface tension liquid nozzle is retracted from above the substrate, and the opposite member is located above the substrate.

US Pat. No. 10,510,526

NANO-GAS LIGHT SOURCES BASED ON GRAPHENE FOR DISPLAYS

1. A Red-Green-Blue (RGB) light emitting pixel element, comprising:a graphene cylinder filled with a red-light emitting gas, the graphene cylinder having an electrode secured at each end, wherein red-light is emitted through the graphene cylinder by the red-light emitting gas when it is excited by a voltage placed across the electrodes;
a graphene cylinder filled with a green-light emitting gas, the graphene cylinder having an electrode secured at each end, wherein green-light is emitted through the graphene cylinder by the green-light emitting gas when it is excited by a voltage placed across the electrodes; and
a graphene cylinder filled with a blue-light emitting gas, the graphene cylinder having an electrode secured at each end, wherein blue-light is emitted through the graphene cylinder by the blue-light emitting gas when it is excited by a voltage placed across the electrodes.

US Pat. No. 10,510,520

ELECTRICALLY CONDUCTIVE, GAS-SEALED, ALUMINUM-TO-ALUMINUM CONNECTION AND METHODS OF MAKING SAME

DOUGLAS ELECTRICAL COMPON...

20. A method of sealing an aluminum tube to an aluminum end cap comprising:i) applying a curable high elongation polymer to at least one of an aluminum tube or an aluminum end cap, each having a first segment and a second segment, wherein, when assembled, the first segments are correspondingly positioned relative to each other, and the second segments are correspondingly positioned relative to each other, the applying being performed such that the second segment of the at least one of the aluminum tube or aluminum end cap contains the high elongation polymer and the first segments are substantially free of the high elongation polymer; and
ii) causing a relative sliding motion between the first segments of the aluminum tube and aluminum end cap to cause galling between the respective first segments, while the respective second segments remain spaced apart from each other, but in contact with the high elongation polymer such that, when the high elongation polymer is cured, a flexible seal will exist between the respective second segments to form a gas-sealed, connection between the aluminum tube and aluminum end cap with a Helium gas leak rate of less than 1×10?8 bar l/s, and the joined first segments form an electrically conductive path between the aluminum tube and aluminum end cap.

US Pat. No. 10,510,510

TREATING BIOMASS

Xyleco, Inc., Wakefield,...

1. A system for cooling multiple single-type window foils of an electron beam accelerator comprising:a primary single-type window foil communicating with a vacuum side of a scanning horn of the electron beam accelerator;
a secondary single-type window foil positioned on an atmospheric side of the scanning horn, wherein the distance of the secondary window to a biomass material under irradiation is more than 0.1 cm and less than 10 cm;
a first flow path for providing a first cooling gas across the primary single-type window foil and second flow path for providing a second cooling gas across the secondary single-type window foil, the secondary single-type window foil being exposed to atmospheric pressure;
a pivoting beam stop configured to pivot between the primary single-type window and the secondary single-type window to block an electron beam of the accelerator;
a conveyor that is configured to move the biomass material through an irradiation zone under the secondary single-type window foil;
wherein the primary and secondary single-type window foils are positioned with a gap of less than about 9 cm between them.

US Pat. No. 10,510,507

FUSE UNIT

YAZAKI CORPORATION, Mina...

1. A fuse unit comprising:a fusible link connected to a battery terminal and including a fusible element that melts when an overcurrent flows through the fusible link;
a holding mechanism that includes a base portion disposed between a post standing surface of a battery housing and the battery terminal in a state where the battery terminal is fastened to a battery post provided in a recess on the post standing surface, and a holding portion that is integrally formed with the base portion, that is located between the fusible link and the post standing surface, and that holds the fusible link above the post standing surface; and
a locking mechanism that locks the holding mechanism onto the post standing surface, wherein
the holding portion has a side wall on a base portion side extending toward a lower side in a vertical direction in a manner corresponding to a difference in level formed by the recess on the post standing surface and is connected to the base portion at a lower end of the side wall.