US Pat. No. 10,461,580

NOISE MITIGATION IN WIRELESS POWER SYSTEMS

APPLE INC., Cupertino, C...

1. A wireless power system comprising:a transmitter comprising:
a substrate;
a distribution of transmitter coils on the substrate, each transmitter coil formed with at least one crossover per turn; and
a receiver magnetically coupled to at least one transmitter coil and comprising a receiver coil formed with at least one crossover per turn; wherein a first transmitter coil of the distribution of transmitter coils comprises:
a first portion;
a second portion; and
an in-line filter capacitor coupled between the first portion and the second portion, wherein at least one crossover is formed by the in-line filter capacitor.

US Pat. No. 10,461,576

UNINTERRUPTIBLE POWER SUPPLY APPARATUS

TOSHIBA MITSUBISHI-ELECTR...

1. An uninterruptible power supply apparatus comprising:a converter configured to convert AC power supplied from a commercial AC power source into DC power;
an inverter configured to convert DC power into AC power and supply the AC power to a load; and
a control device configured to control the converter and the inverter,
during a normal time when the AC power is supplied from the commercial AC power source, the DC power generated in the converter being supplied to the inverter and stored in a power storage device, and during a power failure time when supply of the AC power from the commercial AC power source is stopped, the DC power in the power storage device being supplied to the inverter,the control device being configured to execute a mode selected from a first mode and a second mode, in the first mode, a first AC voltage with a sinusoidal waveform and with no waveform distortion being supplied to the load, and in the second mode, a second AC voltage with a waveform distortion within an allowable range for the load being supplied to the load,the control device being configured to:
when the first mode is selected during the normal time, control the converter to output a first DC voltage and control the inverter to output the first AC voltage with a sinusoidal waveform and with an amplitude smaller than one-half of the first DC voltage; and
when the second mode is selected during the normal time, control the converter to output a second DC voltage smaller than the first DC voltage and control the inverter to output the second AC voltage with a sinusoidal waveform and with an amplitude larger than one-half of the second DC voltage.

US Pat. No. 10,461,575

MULTISTATE PWM COMMAND FOR 3 LEVELS INVERTERS

SCHNEIDER ELECTRIC IT COR...

1. An Uninterruptible Power Supply (UPS) system comprising:an input configured to be coupled to an AC source and to receive input AC power from the AC source;
an output configured to provide output AC power to a load, the output AC power having a positive average output voltage level during a positive half-period of a line cycle and a negative average output voltage level during a negative half-period of the line cycle;
a converter coupled to the input and configured to convert the input AC power into DC power;
a plurality of DC busses coupled to the converter and configured to receive the DC power from the converter;
an inverter coupled to the plurality of DC busses, the inverter having a common point configured to receive the DC power from the plurality of DC busses and a filter coupled between the common point and the output, and the inverter configured to convert the DC power from the plurality of DC busses into the output AC power and provide the output AC power to the output; and
a controller configured to operate the inverter, during the positive half-period of the line cycle, by alternating between a first mode of operation to provide a positive voltage to the common point, a second mode of operation to provide a neutral voltage to the common point, and a third mode of operation to provide a negative voltage to the common point to generate the positive average output voltage level of the output AC power provided to the output.

US Pat. No. 10,461,574

TRANSFER SWITCH WITH MONITOR ON LOAD SIDE

Kohler Co., Kohler, WI (...

1. A system comprising:a first input port for receiving alternating current from a first power source;
a second input port for receiving alternating current from a second power source; and
a switch configured to switch an output port between the first input port and the first power source and the second input port and the second power source, the switch comprising a measurement circuit electrically connected to the output port and a home electrical panel, wherein the measurement circuit is configured to generate a load measurement signal for the output port, wherein the load measurement signal includes at least one sample corresponding to a total home consumption value for a status message.

US Pat. No. 10,461,570

SYSTEMS AND METHODS TO PROVIDE ENHANCED DIODE BYPASS PATHS

TIGO ENERGY, INC., Los G...

1. A bypass switch circuit, comprising:a bypass transistor having a parasitic diode, the bypass transistor to be connected in parallel with an output of a group of solar cells;
a first diode;
a first capacitor connected in series with the first diode, wherein a path formed by the first diode and the first capacitor is connected in parallel with the bypass transistor;
a single cell converter connected to the first capacitor to receive an input, the single cell converter to generate an output;
a second diode connected to receive the output of the single cell converter;
a second capacitor connected in series with the second diode; and
a controller connected to the second capacitor and configured to activate the bypass transistor in response to the parasitic diode being conductive.

US Pat. No. 10,461,567

FEED SYSTEM, FEED UNIT, AND ELECTRONIC UNIT

Sony Corporation, Tokyo ...

1. A power transmitter, comprising:a power transmitting unit configured to detect a power receiving unit to be charged before the power transmitting unit performs pre-charging of the power receiving unit and to receive a charging request from the power receiving unit after the power transmitting unit performs the pre-charging of the power receiving unit,
wherein the power transmitting unit is configured to transmit power to the power receiving unit during main charging based upon result information of a first authentication between the power transmitting unit and the power receiving unit.

US Pat. No. 10,461,564

COIL STRUCTURE FOR INDUCTIVE AND RESONANT WIRELESS CHARGING TRANSMITTER AND INTEGRAL CONTROL METHOD FOR THE SAME

KOREA AUTOMOTIVE TECHNOLO...

1. A wireless power transmitter, comprising:a first coil disposed to transmit wireless power;
a second coil disposed outside of the first coil to transmit wireless power; and
a controller configured to:
determine whether to operate the wireless power transmitter in a magnetic induction mode or a magnetic resonance mode;
in the magnetic induction mode, control the first coil to transmit wireless power in the magnetic induction mode and control the second coil not to transmit wireless power; and
in the magnetic resonance mode, control both the first coil and the second coil to transmit wireless power in the magnetic resonance mode.

US Pat. No. 10,461,561

BATTERY CHARGING APPARATUS AND BATTERY CHARGING PROTECTION CONTROL METHOD

GUANGDONG OPPO MOBILE TEL...

1. A battery charging apparatus, comprising a power adapter and a charging control circuit, wherein, the charging control circuit is built in an electronic device and coupled to a controller and a battery in the electronic device, the power adapter is coupled to a communication interface of the electronic device via a communication interface thereof, the battery is charged by the power adapter via the communication interface of the electronic device, and the charging control circuit performs data communication with the power adapter via the communication interface of the electronic device;if a conventional charging or a quick charging is performed on the battery, the power adapter first determines whether an output voltage is greater than a voltage threshold and whether an output current is greater than a current threshold, if the output voltage is greater than the voltage threshold and/or the output current is greater than the current threshold, the power adapter sends a first charging stop command to the charging control circuit and automatically switches off direct current output, the charging control circuit drives the controller to switch off the communication interface of the electronic device according to the first charging stop command; if the output voltage is not greater than the voltage threshold, and the output current is not greater than the current threshold, the power adapter feeds back output voltage information and output current information to the charging control circuit, if the charging control circuit determines that the output voltage of the power adapter is greater than the voltage threshold and/or the output current of the power adapter is greater than the current threshold according to the output voltage information and the output current information, the charging control circuit feeds back a second charging stop command to the power adapter and drives the controller to switch off the communication interface of the electronic device, and the power adapter switches off the direct current output according to the second charging stop command; and if the charging control circuit determines that the output voltage of the power adapter is not greater than the voltage threshold and the output current of the power adapter is not greater than the current threshold according to the output voltage information and the output current information, the power adapter continues to determine the output voltage and the output current,
wherein, the power adapter comprises an EMI filter circuit, a high-voltage rectifier and filter circuit, an isolation transformer, an output filter circuit, and a voltage tracking and control circuit;
the EMI filter circuit is configured to perform an electromagnetic interference filter on mains supply, the high-voltage rectifier and filter circuit is configured to perform a rectifying and filtering process for outputting a high-voltage direct current, the isolation transformer is configured to perform an electrical isolation on the high-voltage direct current, the output filter circuit is configured to perform a filtering process on an output voltage of the isolation transformer so as to charge the battery, the voltage tracking and control circuit is configured to regulate the output voltage of the isolation transformer according to an output voltage of the output filter circuit;
the power adapter further comprises a power circuit, a main control circuit, a potential regulation circuit, a current detection circuit, a voltage detection circuit and an output switch circuit:
an input terminal of the power circuit is coupled to a secondary terminal of the isolation transformer; a power terminal of the main control circuit, a power terminal of the potential regulation circuit, and a power terminal of the current detection circuit are jointly coupled to an output terminal of the power circuit, a high-potential terminal of the main control circuit and a high-potential terminal of the potential regulation circuit are both coupled to a positive output terminal of the output filter circuit, a potential regulation terminal of the potential regulation circuit is coupled to the voltage tracking and control circuit; a direct current input terminal of the current detection circuit is coupled to a positive output terminal of the output filter circuit; a current detection feedback terminal of the current detection circuit is coupled to a current detection terminal of the main control circuit; a clock output terminal and a data output terminal of the main control circuit are coupled to a clock input terminal and a data input terminal of the potential regulation circuit; a first detection terminal and a second detection terminal of the voltage detection circuit are coupled to a direct current output terminal of the current detection circuit and a negative output terminal of the output filter circuit respectively, a first output terminal and a second output terminal of the voltage detection circuit are coupled to a first voltage detection terminal and a second voltage detection terminal of the main control circuit respectively; an input terminal of the output switch circuit is coupled to the direct current output terminal of the current detection circuit; an output terminal of the output switch circuit is coupled to a third detection terminal of the voltage detection circuit; a ground terminal of the output switch circuit is coupled to a negative output terminal of the output filter circuit; a controlled terminal and a power terminal of the output switch circuit are coupled to a switch control terminal of the main control circuit and the secondary terminal of the isolation transformer respectively; each of a negative output terminal of the output filter circuit, the output terminal of the output switch circuit, and a first communication terminal and a second communication terminal of the main control circuit is coupled to the communication interface of the power adapter;
the power circuit comprises: a first capacitor, a voltage stabilizing chip, a second capacitor, a first inductor, a second inductor, a first diode, a second diode, a third capacitor, a first resistor and a second resistor;
a junction of a first terminal of the first capacitor and an input power pin and an enable pin of the voltage stabilizing chip is configured as the input terminal of the power circuit, a second terminal of the first capacitor and a ground pin of the voltage stabilizing chip are jointly grounded; a switch pin of the voltage stabilizing chip and a first terminal of the second capacitor are jointly coupled to a first terminal of the first inductor; an internal switch pin of the voltage stabilizing chip and a second terminal of the second capacitor are jointly coupled to a cathode of the first diode; a voltage feedback pin of the voltage stabilizing chip is coupled to a first terminal of the first resistor and a first terminal of the second resistor, a second terminal of the first inductor and a cathode of the second diode are jointly coupled to a first terminal of the second inductor, a junction of a second terminal of the second inductor, an anode of the first diode, a second terminal of the first resistor and a first terminal of the third capacitor is configured as the output terminal of the power circuit; an anode of the second diode, a second terminal of the second resistor and a second terminal of the third capacitor are jointly grounded.

US Pat. No. 10,461,556

CHARGER, ELECTRONIC DEVICE, AND CHARGING METHOD

SHENZHEN ROYOLE TECHNOLOG...

1. A charger, comprising:a charge port, comprising a power pin, a first data pin, a second data pin, and a ground pin, the first data pin always being disconnected from the second data pin, the charge port being configured to connect to an electronic device;
a controller, connected to the first data pin and the second data pin;
a connection switching circuit, connected to the power pin, the first data pin, the second data pin, and the ground pin, and the controller;
wherein, the controller is configured to control the connection switching circuit to connect the first data pin to the power pin and connect the second data pin to the ground pin, when a handshake between the charger and the electronic device connected to the charge port is created successfully.

US Pat. No. 10,461,554

METHOD OF OPERATING ELECTROCHEMICAL CELLS COMPRISING ELECTRODEPOSITED FUEL

NANTENERGY, INC., Scotts...

1. A process for operating an electrochemical cell system, wherein the electrochemical cell system comprises:(i) at least two fuel electrodes for receiving electrodeposited metal fuel;
(ii) at least one oxidant electrode spaced apart from the fuel electrodes;
(iii) at least one charging electrode;
(iv) an ionically conductive medium communicating the electrodes of the electrochemical cell system for conducting ions to support electrochemical reactions at the fuel, oxidant, and charging electrodes, the ionically conductive medium comprising reducible metal fuel ions;
wherein the process comprises:
(i) assigning the fuel electrodes into units, the units comprising: a discharging unit and a charging unit;
(ii) operating said cell system in a discharge mode wherein the metal fuel is oxidized at each fuel electrode in the discharging unit and an oxidant is reduced at the at least one oxidant electrode to generate an electrical discharge current therebetween for application to a load;
(iii) operating said cell system in a charging mode wherein a reducible species of the fuel is reduced to electrodeposit the fuel on each fuel electrode in the charging unit and oxidize an oxidizable species of the oxidant at the charging electrode by application of an electrical charge current therebetween from a power source;
(iv) monitoring each of the fuel electrodes in the discharging unit during said discharge mode, wherein each fuel electrode in the discharging unit meeting a predetermined depletion criteria is assigned from the discharging unit to the charging unit, and wherein each fuel electrode not meeting the predetermined depletion criteria remains assigned to the discharging unit including for a subsequent discharge mode; and
(v) monitoring each of the fuel electrodes in the charging unit during said charging mode, wherein each fuel electrode in the charging unit meeting a predetermined loading criteria is assigned from the charging unit to the discharging unit, and wherein each fuel electrode not meeting the predetermined loading criteria remains assigned to the charging unit including for a subsequent charge mode.

US Pat. No. 10,461,550

FAST CHARGING METHOD, POWER ADAPTER AND MOBILE TERMINAL

Guangdong Oppo Mobile Tel...

9. A mobile terminal, the mobile terminal being coupled with a power adapter via a USB interface, a power line of the USB interface being configured for charging the mobile terminal, a data line of the USB interface being configured for a bidirectional communication between the mobile terminal and the power adapter, the power adapter transmitting a clock signal to the mobile terminal via a first data line of the USB interface in a process of coupling the power adapter with the mobile terminal, the clock signal being configured for indicating a communication sequence between the power adapter and the mobile terminal, the communication sequence containing instruction transmission time slots of the power adapter and instruction reception time slots of the power adapter, and the instruction transmission time slots and the instruction reception time slots being alternatively generated, the mobile terminal supporting a normal charging mode and a fast charging mode, a charging current of the fast charging mode being higher than a charging current of the normal charging mode, the mobile terminal comprising:a charging circuit; and
a communication control circuit configured to determine to activate the fast charging mode, receive a second instruction from the power adapter, wherein the second instruction is configured for querying whether or not a current output voltage of the power adapter is proper to be a charging voltage of the fast charging mode;
the communication control circuit being further configured to transmit a reply instruction corresponding to the second instruction to the power adapter, wherein the reply instruction corresponding to the second instruction is configured for indicating that the current output voltage of the power adapter is proper, high, or low, whereby the power adapter adjusts the current output voltage of the power adapter to be the charging voltage of the fast charging mode according to the reply instruction corresponding to the second instruction;
the communication control circuit being further configured to receive a third instruction from the power adapter, wherein the third instruction is configured for querying a maximum charging current currently supported by the mobile terminal;
the communication control circuit being further configured to transmit a reply instruction corresponding to the third instruction to the power adapter, wherein the reply instruction corresponding to the third instruction is configured for indicating the maximum charging current currently supported by the mobile terminal, whereby the power adapter determines the charging current of the fast charging mode according to the reply instruction corresponding to the third instruction;
the communication control circuit being further configured to receive a fourth instruction from the power adapter after the power adapter adjusts an output current of the power adapter to be the charging current of the fast charging mode and enters a constant current phase, wherein the fourth instruction is configured for querying a current voltage of a battery of the mobile terminal;
the communication control circuit being further configured to transmit a reply instruction corresponding to the fourth instruction to the power adapter, wherein the reply instruction corresponding to the fourth instruction is configured for indicating the current voltage of the battery of the mobile terminal, whereby the power adapter adjusts the output current of the power adapter according to the current voltage of the battery to charge the mobile terminal in a multi-stage constant current mode via the charging circuit, wherein
each instruction transmitted to the mobile terminal by the power adapter comprises an 8-bit data, and each reply instruction received from the mobile terminal by the power adapter comprises a 10-bit data.

US Pat. No. 10,461,547

PORTABLE DRONE BATTERY CHARGING SYSTEM

1. A portable charging system for charging a multi-cell drone battery, comprising:a) a system battery configured to power the portable charging system during a portable operation to charge the multi-cell drone battery;
b) a recharging circuit for providing, in a system battery recharge operation, the system battery with sufficient charge for powering the portable operation to charge the multi-cell drone battery, the recharging circuit comprising:
a power input for receiving power during the system battery recharge operation of the system battery; and
a protector coupled between the power input and the system battery, the protector configured to protect the system battery during the system battery recharge operation;
c) a charging module coupled to the system battery and configured to receive power from the system battery to charge the multi-cell drone battery in a drone battery charge operation as part of the portable operation, the charging module comprising:
a drone battery charge control circuit configured to provide charging control of the multi-cell drone battery during the drone battery charge operation; and
a drone battery charging status monitor coupled to the drone battery charge control circuit, the drone battery charging status monitor being configured to control operation of the drone battery charge control circuit based on a multi-cell drone battery status; and
d) a drone battery connector configured to connect the multi-cell drone battery to the charging module;
wherein the charging module further comprises a power switch coupled to the drone battery charge control circuit, the power switch configured to initiate the drone battery charge operation, and wherein the charging module further comprises a timer configured to disable the drone battery charge control circuit after the drone battery charge operation has been initiated by the power switch when the multi-cell drone battery has not been detected to be connected to the drone battery connector within a certain amount of time.

US Pat. No. 10,461,527

BATTERY POWER LIMITING CIRCUIT AND METHOD

MOTOROLA SOLUTIONS, INC.,...

1. A battery protection circuit comprising:a first current limiting switch provided in a current path of a battery and coupled to a first current limiting controller to limit a current output by the battery;
a second current limiting switch provided on the current path in series with the first current limiting switch and coupled to a second current limiting controller to limit the current output by the battery;
a voltage divider connected across the first current limiting switch and the second current limiting switch and including:
a first resistor and a second resistor connected in series, and
a control output provided between the first resistor and the second resistor and coupled to the first current limiting switch, the control output configured to provide a control signal that opens the first current limiting switch when a voltage across the first current limiting switch and the second current limiting switch exceeds a predetermined threshold; and
a second voltage divider connected across the first current limiting switch and the second current limiting switch and including:
a third resistor and a fourth resistor connected in series, and
a second control output provided between the third resistor and the fourth resistor and coupled to the second current limiting switch, the second control output configured to provide a second control signal that opens the second current limiting switch when the voltage across the first current limiting switch and the second current limiting switch exceeds the predetermined threshold.

US Pat. No. 10,461,526

EXPLOSION PROTECTION CIRCUIT WITH IMPEDANCE MATCHING

1. Field device for monitoring at least one physical or chemical process variable, comprising:at least one transformer;
at least one sensor unit;
an electronics unit for signal registration, evaluation and/or feeding; and
an explosion protection circuit, wherein:
said at least one sensor unit is operated with alternating electrical current and/or communication between said electronics unit and said at least one sensor unit occurs with alternating electrical current and/or alternating voltage;
said explosion protection circuit with intrinsic safety, which includes a safety barrier, which has at least one unit for electrical current and voltage limiting, said explosion protection circuit is arranged fixedly between said at least one sensor unit and said electronics unit, and,
there is provided within said explosion protection circuit a unit for impedance matching, which unit for impedance matching includes said at least one transformer;
wherein said at least one sensor unit has at least one piezoelement,
and wherein said unit for voltage limiting includes at least one coil,
wherein said piezoelement with said unit for voltage limiting are shockproof against a mechanical impact with an energy of 7 Joule according to DIN EN60079-11.

US Pat. No. 10,461,510

MODULAR DISTRIBUTING PANEL INCLUDING A TRANSFORMER

LSIS CO., LTD., Anyang-s...

1. A module type distributing panel comprising:a base frame;
a transformer panel module having a main frame and a transformer disposed at an upper side of the base frame;
a first voltage panel module having a first voltage enclosure and a switch mounted within the first voltage enclosure; and
a second voltage panel module having a second voltage enclosure and a distributor mounted within the second voltage enclosure, wherein a second voltage of the second voltage panel module is lower than a first voltage of the first voltage panel module,
wherein the first voltage enclosure is coupled to the main frame for the first voltage panel module, and
the second voltage enclosure is coupled to the main frame for the second voltage panel module,
wherein a first voltage enclosure lower fastening portion is formed at a first lower portion of the first voltage enclosure connected to the base frame, and a second voltage enclosure lower fastening portion is formed at a second lower portion of the second voltage enclosure connected to the base frame, wherein the transformer panel, the first voltage panel, and the second voltage panel are located on top of the base frame,
wherein an upper surface of the transformer panel module is open, and the distributing panel further comprises a transformer panel module roof detachably disposed at an upper side of the main frame,
wherein the transformer panel module roof comprises an upper plate installed to be located at an upper side of the main frame and an upper lifting lug formed of a plate with a lifting hole, wherein the upper lifting lug is coupled to the upper plate,
wherein a horizontal length of the base frame is greater than a horizontal length of each of the transformer panel module, the first voltage panel module, and the second voltage panel module,
wherein the transformer panel module roof that is disposed at the upper side of the main frame does not cover the first voltage panel module and the second voltage panel module, and a horizontal length of the transformer panel module roof is smaller than the horizontal length of the base frame, and
wherein a protection degree of the first voltage panel module and the second voltage panel module is greater than a protection degree of the transformer panel module, and the protection degree of the first voltage panel module and the second voltage panel module is equal to or greater than IP54.

US Pat. No. 10,461,507

SUBSTRATE EMITTING VERTICAL-CAVITY SURFACE-EMITTING LASER

Mellanox Technologies, Lt...

1. A vertical-cavity surface-emitting laser (VCSEL) comprising:a substrate having a first surface and a second surface;
an output coupling mirror disposed on the second surface of the substrate;
a high reflectivity mirror; and
an active cavity material structure disposed between the output coupling mirror and the high reflectivity mirror, the active cavity material structure comprising:
a first current-spreading layer,
a second current-spreading layer,
an active region disposed between the first current-spreading layer and the second current-spreading layer, and
a tunnel junction overgrown by the second current spreading layer, wherein the tunnel junction is disposed adjacent the active region,
wherein the VCSEL is configured to emit radiation outward through the first surface of the substrate.

US Pat. No. 10,461,499

SYSTEMS AND METHODS FOR CALIBRATING, OPERATING, AND SETTING A LASER DIODE IN A WEAPON

Axon Enterprise, Inc., S...

1. A weapon that cooperates with a provided tester, the weapon comprising:a processing circuit; a laser diode that provides a light; a photo diode that detects the light; a resistor coupled in series with the photo diode; and
a memory having computer-executable instructions stored thereon that, in response to execution by the processing circuit, cause the weapon to:
provide a signal at a duty cycle to establish a power of the light provided by the laser diode, the light induces a first current through the photo diode, the first current is related to the power of the light the first current flows through the resistor thereby inducing a first voltage across the resistor, the first voltage is related to the power of the light:
provide the light to the tester, the tester measures a magnitude of the power of the light and sends a message to the weapon to report the magnitude of the power:
receive the message from the tester regarding the magnitude of the power as measured by the tester;
compare the magnitude of the power as measured by the tester to a predetermined range, the predetermine range associated with a geographic region where the laser diode will be used:
adjust the duty cycle responsive to the comparison;
repeat providing the light to the tester, receiving the message from the tester, comparing the magnitude, and adjusting the duty cycle until the magnitude of the power as measured by the tester is within the predetermined range; and
record a magnitude of the first voltage in the memory whereby the magnitude of the first voltage corresponds to the predetermined range.

US Pat. No. 10,461,498

COMMON CATHODE LASER DRIVING CIRCUIT

Google LLC, Mountain Vie...

1. A method comprising:delivering, by a laser driving circuit, a bias current to an anode of a gain-section diode disposed on a shared substrate of a tunable laser;
receiving, at the laser driving circuit, a burst mode signal indicative of a burst-on state or a burst-off state;
when the burst mode signal is indicative of the burst-off state, sinking, by the laser driving circuit, a sink current away from the bias current at the anode of the gain-section diode, the sink current less than the bias current delivered to the anode of the gain-section diode; and
when the burst mode signal is indicative of the burst-on state, modulating, by the laser driving circuit, the tunable laser by a capacitively coupled modulation stage of the laser driving circuit to the anode of the gain-section diode, resulting in an alternating current (AC) modulation current.

US Pat. No. 10,461,494

LASER APPARATUS AND EXTREME ULTRAVIOLET LIGHT GENERATION SYSTEM

GIGAPHOTON INC., Tochigi...

1. A laser apparatus comprising:a master oscillator configured to output laser light;
a plurality of amplifiers each configured to include carbon dioxide as a laser medium and amplify the laser light;
a first optical path pipe configured to cover a laser optical path between the amplifiers;
a gas supply port configured to supply gas into the first optical path pipe, the gas having lower carbon dioxide concentration than carbon dioxide concentration of air;
a first carbon dioxide densitometer configured to measure carbon dioxide concentration in the first optical path pipe; and
an alarm device to which a measurement result of the first carbon dioxide densitometer is input, the alarm device being configured to issue an alarm when the carbon dioxide concentration measured by the first carbon dioxide densitometer exceeds a preset prescribed value of carbon dioxide concentration.

US Pat. No. 10,461,491

LASER RESONATOR AND LASER RESONATOR ARRAY

SAMSUNG ELECTRONICS CO., ...

1. A laser resonator comprising:a metal body; and
a ring-shaped gain medium layer having an inner radius and an outer radius, and at least partially embedded into the metal body,
wherein the ring-shaped gain medium layer is formed of a semiconductor material and configured to generate a laser light through optical absorption by coupling electromagnetic waves and plasmons on a boundary between the metal body and the ring-shaped gain medium layer,
wherein the laser resonator further comprises at least one absorption member provided in the ring-shaped gain medium layer,
wherein the ring-shaped gain medium layer comprises a base portion and at least one protruding portion protruding from an upper surface of the base portion and
wherein a laser light of a specific mode is selected or separated by adjusting at least one of a number and position of the at least one absorption member.

US Pat. No. 10,461,486

DIE AND PRESS APPARATUS INCLUDING DIE

JAPAN AVIATION ELECTRONIC...

1. A die that crimps a contact in cooperation with a mating die to thereby fix the contact on an electric wire, comprising:a base portion;
a protruding portion that is formed on said base portion in a manner protruding upward from said base portion, and can be inserted in a receiving space of the mating die; and
a wall portion that is connected to front surfaces or rear surfaces of said base portion and said protruding portion,
wherein said wall portion extends further upward than said base portion, and extends further in at least one of leftward and rightward directions than said protruding portion,
wherein an upper surface of said protruding portion, which is configured to support the contact, is formed with a dent having an upper portion and a lower portion,
wherein said wall portion is formed with a flat surface that is located at a level lower than the upper portion of said dent and at a same level as the lower portion of said dent, the flat surface being adjacent to the upper surface in a front-rear direction of said protruding portion, and
wherein one end of the flat surface in the front-rear direction is formed with a cutting blade for cutting a supporting arm portion of a carrier that supports the contact.

US Pat. No. 10,461,483

STRUT END CONDITION, END BLOCK, AND CONNECTOR

ARCHITECTURAL BUSSTRUT CO...

1. A strut assembly, comprising:a strut;
an insulator having a distal end;
at least one conductor wire oriented within the insulator;
an end block oriented within an end of the strut, the end block nesting within the strut; and
an isolator having dividers, each divider having a divider base with a divider base proximal end,
wherein the divider base proximal end engages the distal end of the insulator and prevents the isolator from extending past a desired point on the insulator, and
wherein the isolator is oriented between the end block and the strut such that the end block fits within the interior of the isolator.

US Pat. No. 10,461,479

ELECTROMAGNETIC SHIELDING ELASTIC CLIP AND CONNECTOR HOUSING INCLUDING THE SAME

Tyco Electronics (Zhuhai)...

1. An electromagnetic shielding elastic clip, comprising:a first elastic sheet having a base and a first passageway disposed at an end of the first elastic sheet opposite the base of the first elastic sheet; and
a second elastic sheet having a base and a second passageway disposed at an end of the second elastic sheet opposite the base of the second elastic sheet, the base of the first elastic sheet and the base of the second elastic sheet form a U-shaped elastic clip, the second passageway is aligned with the first passageway, a diameter of the first passageway is larger than a diameter of the second passageway and an edge portion of the second passageway is bent onto an edge portion of the first passageway such that the edge portion of the second passageway and the edge portion of the first passageway are riveted to each other at an end of the electromagnetic shielding elastic clip opposite the U-shaped elastic clip.

US Pat. No. 10,461,476

CONNECTOR

Tyco Electronics (Shangha...

1. A connector, comprising:a housing;
a connector body disposed in the housing;
a conductive terminal disposed in the connector body; and
a conductive shielding sleeve disposed in the housing such that at least a part of an outer end of the conductive shielding sleeve extends to an exterior of the housing when the conductive shielding sleeve is fully mounted in the housing, the outer end of the conductive shielding sleeve has an outwardly turning lip disposed outside the housing and spaced apart from the housing by a predetermined distance.

US Pat. No. 10,461,469

PLUG AND SOCKET ARRANGEMENT FOR AN INFORMATION ROBOT APPARATUS

Wenling Haoda Electric Ap...

1. A plug and socket arrangement for an information robot apparatus, comprisinga robot body;
a plug body;
a socket body;
a plug groove arranged in one end face of the socket body;
a wire electrically connected with the robot body is arranged on one side of the plug body, and the other side of the plug body is provided with a plug column which is used to plug and connect with the plug groove;
an inclined plane top pressing block is arranged on the side, away from the plug body, of the plug column;
wherein a plug pin is fixedly arranged on an end surface thereof, away from the plug column, of the inclined plane top pressing block;
a lock recess is arranged in a top end surface of the plug column;
a first sliding cavity extending upwards and downwards communicated with the plug groove;
a second sliding cavity which extends to two ends thereof communicated with a bottom extending tail end of the first sliding cavity;
a third sliding cavity which extends upwards and downwards arranged in the socket body on one side of the first sliding cavity;
wherein a bottom extending tail end of the third sliding cavity is communicated with a top extending section of one end of the second sliding cavity;
a transmission cavity extending towards two ends thereof arranged in the socket body on an upper side of the first sliding cavity;
wherein an extending section of one side of the transmission cavity is located at a top corresponding position of the third sliding cavity;
a first sliding block arranged in the first sliding cavity in a sliding fit mode;
a second sliding block arranged in the second sliding cavity in a sliding fit mode;
wherein a first through slot is arranged in the first sliding block;
a first inclined plane block fixedly arranged on an inner top wall of the first through slot for connecting with the lock recess of the plug column in match mode;
a second inclined plane block fixedly arranged at a bottom tail end of the first sliding block;
a driving motor fixedly arranged on the end face of a top wall of the first sliding block;
an inner spline sleeve in rotational engagement with the transmission cavity and the first sliding cavity, of the socket body;
wherein a first pulley extending into the transmission cavity is fixedly arranged at a top wall tail end of the inner spline sleeve;
an outer spline shaft extending downwards in sliding fit connection with the inner spline sleeve;
wherein a bottom extending tail end of the outer spline shaft extends into the first sliding cavity and is in power connection with a top end of the driving motor;
a first spring annularly arranged around the outer spline shaft in the first sliding cavity;
wherein a top end surface of the second sliding block is internally provided with an inclined plane groove held against and connected with the second inclined plane block;
a second through slot which is used for being communicated with the third sliding cavity arranged in the second sliding block and located at one side of the inclined plane groove;
a third inclined plane block fixedly arranged on an inner wall of one side of the second through slot;
wherein a second spring pushes against and connects with one side of the second sliding block in the second sliding cavity;
a third sliding block arranged in the third sliding cavity in a sliding fit mode;
wherein an adjusting threaded rod extending upwards is in threaded fit connection with the third sliding block;
a fourth inclined plane block fixedly arranged at a bottom tail end of the third sliding block;
a rotating shaft in rotational engagement with the transmission cavity and the third sliding cavity, of the socket body;
wherein a second pulley extending into the transmission cavity is fixedly arranged at a top tail end of the rotating shaft;
a driving belt arranged between the second pulley and the first pulley;
wherein a bottom tail end of the rotating shaft extends into the third sliding cavity and is fixedly connected with a top tail end of the adjusting threaded rod in a matched mode;
the plug body is firstly moved to one side of the socket body to make the plug column and the plug groove are opposite to each other;
the plug body is moved towards one side of the socket body so the plug column gradually extends into the plug groove until the inclined plane top pressing block holds against and slides with the first inclined plane block, so that the first inclined plane block drives the first sliding block to overcome the elastic force of the first spring to gradually slide toward a top of the first sliding cavity;
a guide sliding groove is communicated in an inner wall of one side of the third sliding cavity;
wherein a guide sliding block which is fixedly connected with the third sliding block is in sliding fit connection with an interior of the guide sliding groove, and a top end face of the guide sliding block is fixedly provided with a conductive block;
wherein a power supply groove is arranged in an inner top wall of the guide sliding groove opposite to the top of the conductive block;
the conductive block is driven by the guide sliding block to be completely inserted into the power supply groove so automatic and safe power supply is implemented;
a conductive groove is arranged in an inner wall of one side of the plug groove for receiving the plug pin, and the conductive groove is electrically connected with the conductive block;
the driving motor is controlled to drive the adjusting threaded rod to rotate reversely until the third sliding block drives the fourth inclined plane block to extend into the second through slot and the fourth inclined plane block holds against and slides with the third inclined plane block, so that the third inclined plane block drives the second sliding block to overcome the elastic force of the second spring to slide towards one side in the second sliding cavity; meanwhile, the inclined plane groove holds against and slides with the second inclined plane block, so the first sliding block is driven by the second inclined plane block to slide towards the top in the first sliding cavity until the first inclined plane block completely slides out of the lock recess, and it is convenient to take out the plug body.

US Pat. No. 10,461,453

POWER PLUG AND SOCKET

WELLS SHIN ELECTRONIC (KU...

1. A power plug, comprising:a body;
at least two Alternating Current, AC, plug terminals fixed inside the body; and
two Direct Current, DC, plug terminals fixed inside the body;
wherein each of the AC plug terminals and each of the DC plug terminals are respectively connected to separate connecting wires;
wherein the body comprises a first body and a second body, wherein the first body and the second body are adaptively joined to each other to form a plurality of mounting structures, and each of the AC plug terminals and each of the DC plug terminals are respectively fixed inside different mounting structures;
wherein a cavity is provided inside the first body and is configured to accommodate a part of the second body; and
wherein the plurality of mounting structures comprise at least two mounting holes and two mounting slots; and wherein the at least two mounting holes are provided inside the second body, each of the AC plug terminals is fixed inside a respective one of the mounting holes, the two mounting slots are provided on a surface of the second body, and each of the DC plug terminals is fixed inside a respective one of the mounting slots.

US Pat. No. 10,461,450

SIGNAL CONNECTOR BRACES

Hewlett Packard Enterpris...

1. A signal connector brace for providing mechanical support to a signal connector coupled to a circuit board, the signal connector brace comprising:a housing having an exterior surface;
first and second protrusions extending from the housing to couple the housing to vias of the circuit board thereby positioning the exterior surface of the housing in contact with a corresponding exterior surface of the signal connector to brace the signal connector;
a recess on the housing positioned between locations where the first and second protrusions respectively join the housing, wherein the recess is configured to receive a mechanical fastener for coupling the signal connector brace to the circuit board.

US Pat. No. 10,461,448

BOARD MOUNTING TERMINAL

Tyco Electronics Japan G....

1. A board mounting terminal extending like a rod:(a) for being inserted into a through-hole in a circuit board and being soldered to the circuit board,
(b) having a tip portion, and
(c) having a recessed groove in a face of the board mounting terminal:
(1) extending in a direction of extension of the board mounting terminal,
(2) having a tip end in the tip portion of the board mounting terminal, and
(3) having an area of a recess of the recessed groove in a cross-section extending in a direction transverse to the direction of extension of the board mounting terminal decreasing as a distance from the tip portion of the board mounting terminal, oriented in a direction of insertion of the board mounting terminal, increases.

US Pat. No. 10,461,442

PRESSURE CONTACT TERMINAL FOR CONNECTING ELECTRONIC COMPONENT AND WIRE

YAZAKI CORPORATION, Mina...

1. A pressure contact terminal comprising:a component clip configured to clip an electronic component and be electrically connected with the electronic component;
a pressure contact blade to be connected with a wire by pressure contact;
a step connection configured to connect the component clip and the pressure contact blade to each other at different bottom face heights;
a first bent portion connecting the step connection and the component clip to each other at a first bending angle; and
a second bent portion connecting the step connection and the pressure contact blade to each other at a second bending angle.

US Pat. No. 10,461,440

ANTENNA-TRANSMITTER ARRAY

University of Zagreb Facu...

1. A self-oscillating radiofrequency transmitter comprising:a negative impedance converter having an input port and an output port;
a first antenna electrically coupled to said input port of said negative impedance converter; and
a second antenna electrically coupled to said output port of said negative impedance converter;
wherein self-oscillation of a signal of arbitrary waveform is generated in the negative impedance converter and the first and second antennas without using any resonant element;
wherein said self-oscillation results in the first antenna emitting electromagnetic radiation of a first polarization and the second antenna emitting electromagnetic radiation of a second polarization, such that a superposition of the emissions from the first and second antennas is emitted at a first frequency by the radiofrequency transmitter; and
wherein no electrical connection is present between either one of the first and second antennas and any radiofrequency source external to the negative impedance converter.

US Pat. No. 10,461,431

ELECTRICALLY TUNABLE MINIATURE ANTENNA

Intel Corporation, Santa...

1. An apparatus comprising:a radiator including a first radiator and a second radiator;
a first reactive circuit having a first end coupled to the radiator, the first reactive circuit having a predetermined impedance and being configured to adjust an impedance of the radiator to cause the radiator to resonate at a first frequency range;
a tuning adjuster circuit that is connected to the first end of the first reactive circuit, the tuning adjuster having an adjustable impedance and comprising a plurality of second reactive circuits, each second reactive circuit from among the plurality of second reactive circuits having a different selectable predetermined impedance to cause the radiator to resonate at a frequency that is different than the first frequency range based upon which of the plurality of second reactive circuits is selected; and
a pre-matching component configured to match a combined impedance of the first radiator and the second radiator to the first reactive circuit,
wherein the first reactive circuit is coupled to the pre-matching component via a point on a transmission line that has an impedance matching that of the pre-matching component.

US Pat. No. 10,461,430

HIGH-EFFICIENCY BROADBAND ANTENNA

WORLDWIDE ANTENNA SYSTEM ...

1. A crossed-field antenna system, comprising:an E-cylinder tuning circuit operably coupled to an E-cylinder;
a D-plate tuning circuit operably coupled to a D-plate;
a transmitter feed tuning circuit operably coupled to a transmitter, the E-cylinder tuning circuit, and the D-plate tuning circuit;
at least one signal sensor; and
a controller operably coupled to the transmitter feed tuning circuit, the E-cylinder tuning circuit, the D-plate tuning circuit, and the at least one signal sensor, the controller including at least one processor configured to:
determine a current ratio to provide approximately equal power to the E-cylinder and the D-plate;
set a reactance of the E-cylinder tuning circuit and a reactance of the D-plate tuning circuit based on the current ratio;
determine a combined impedance value based at least in part on the reactance of the E-cylinder tuning circuit and the reactance of the D-plate tuning circuit; and
set a reactance of the transmitter feed tuning circuit based on the combined impedance value.

US Pat. No. 10,461,429

SWITCHED ANTENNA ASSEMBLY

Apple Inc., Cupertino, C...

1. A consumer electronic product, comprising:a housing having walls that define an internal volume, wherein a portion of one of the walls is a radio frequency (RF) antenna;
a connector electrically coupled to the RF antenna, the connector having a fixed length;
a switchable inductor array electrically coupled to the RF antenna via the connector, the switchable inductor array comprising inductive elements that cooperate with the connector to define an inductance of the connector; and
a switch circuit coupled to the switchable inductor array and arranged to select at least one of the inductive elements to vary the inductance of the connector.

US Pat. No. 10,461,427

ANTENNA AND ELECTRONIC DEVICES COMPRISING THE SAME

Samsung Electronics Co., ...

1. An electronic device comprising:a first antenna radiator;
a substrate comprising:
a first grounding area for the first antenna radiator,
a non-grounding area, and
at least one feeding unit;
a non-segmented metal case comprising a rear case of the electronic device; and
a nonmetal area arranged between the non-segmented metal case and the substrate,
wherein the at least one feeding unit feeds the first antenna radiator,
wherein the rear case is directly connected to the first grounding area of the substrate,
wherein the rear case includes a second grounding area for the first antenna radiator, and
wherein at least a part of the first antenna radiator is patterned on the substrate, and the other part of the first antenna radiator is arranged in the nonmetal area.

US Pat. No. 10,461,424

ANTENNA STRUCTURE AND WIRELESS COMMUNICATION DEVICE USING SAME

Chiun Mai Communication S...

1. An antenna structure comprising:a metallic member, the metallic member comprising a front frame, a backboard, and a side frame, the side frame being positioned between the front frame and the backboard; and
a first feed source electrically connected to the front frame;
wherein the side frame comprises at least a top portion, a first side portion, and a second side portion, the first side portion and the second side portion are respectively connected to two ends of the top portion;
wherein the side frame defines a slot, the slot is defined on the top portion; and
wherein the front frame defines a gap, the gap communicates with the slot and extends across the front frame.

US Pat. No. 10,461,422

BALANCED ANTENNA

Airgain Incorporated, Sa...

1. A balanced antenna system comprising:a cable;
an antenna comprising a first infinite balun, a second infinite balun, and a feeding gap; and
wherein the cable transports a radio signal from the antenna to a radio and from a radio to the antenna;
wherein the first infinite balun and the second infinite balun transform an unbalanced transmission line characteristic of the cable to the balanced feeding of the antenna.

US Pat. No. 10,461,400

HOUSING INCLUDING ANTENNA, MANUFACTURING METHOD OF HOUSING, AND ELECTRONIC DEVICE HAVING HOUSING

Samsung Electronics Co., ...

1. An electronic device comprising:a housing that includes:
a first non-conductive structure including a first surface that surfaces in a first direction and a second surface that surfaces in a second direction that is opposite to the first direction; and
a second non-conductive structure formed integrally with a portion of the first non-conductive structure, and forming at least a portion of a third surface that surfaces in a third direction that is different from the first direction and the second direction;
a first conductive pattern formed to be in physical contact with the first surface of the first non-conductive structure;
a second conductive pattern formed to be in physical contact with the second surface of the first non-conductive structure;
a third conductive pattern electrically connected to the second conductive pattern;
at least one conductive connection part that electrically interconnects the first conductive pattern and the second conductive pattern; and
a communication circuit that uses at least a portion of the first conductive pattern, the second conductive pattern, the third conductive pattern, and the conductive connection part as a radiation pattern,
wherein the second non-conductive structure does not overlap with the first conductive pattern or the second conductive pattern when viewed from above the first surface, and
wherein the third conductive pattern is formed to be in physical contact with the third surface extending to surface in the third direction from the second surface of the first non-conductive structure.

US Pat. No. 10,461,397

SURGICAL SPONGES WITH FLEXIBLE RFID TAGS

Augustine Biomedical and ...

10. A surgical sponge, comprising:a sponge body; and
a radiofrequency (RF) tag attached within an interior portion of the sponge body, the tag comprising:
a base layer,
a metal foil loop antenna etched on to the base layer,
an electrically responsive member, and
additional metal foil provided on the base layer when the metal foil loop antenna is etched on to the base layer, the additional metal foil configured to enhance x-ray opacity of the surgical sponge,
wherein the tag includes a radiofrequency (RF) identifier and two or more polymeric protective film layers, the RF identifier being laminated between the two protective film layers, wherein each of the base layer and the protective film layers has one or more tabs that project outward from an outer perimeter of the tag.

US Pat. No. 10,461,391

EXPANDED WAVEGUIDE INCLUDING MULTILATERAL PILLARS FORMING MULTIPLE CHANNELS THEREIN

KOREA UNIVERSITY RESEARCH...

1. An expanded waveguide expanded in a direction of an E-plane to provide uniform electromagnetic field comprising:an expanded area expanded in the direction of the E-plane;
an input transition area and an output transition area connected to both sides of the expanded area and configured to pass an electromagnetic wave; and
entrance parts formed respectively to an end part of the input transition area and an end part of the output transition area, the electromagnetic wave being inputted and outputted through the respective entrance parts,
wherein a plurality of multilateral pillars are arranged in constant space in the transition areas, and a channel is divided along between the multilateral pillars to form a plurality of paths in a tree shape,
wherein the division of the plurality of paths begins from a path at a first entrance part, among the entrance parts, formed to the end part of the input transition area,
wherein each of the plurality of paths from an inlet of the channel corresponding to the first entrance part to an outlet of the divided channel corresponding to the expanded area has the same length,
wherein each of the plurality of multilateral pillars is a rectangular pillar having a cross section of rhombus shape, and
wherein the plurality of multilateral pillars is arranged in different size so that the divided channel forms the tree shape in the input transition area.

US Pat. No. 10,461,386

IMPEDANCE COMPENSATION STRUCTURE FOR BROADBAND NEAR-FIELD MAGNETIC-FIELD PROBE AND ITS CONSTRUCTION METHOD

BEIHANG UNIVERSITY, Beij...

1. An impedance compensation structure for a broadband near-field magnetic-field probe, comprising: a signal via; and a plurality of grounding vias provided around the signal via to form a coaxial via array; wherein the plurality of grounding vias and the signal via have an identical size, all distances between each of the plurality of the grounding vias and the signal via are equal, and the plurality of the grounding vias forms a circle centered at the signal via; wherein each of the plurality of the grounding vias is connected with a magnetic field probe top layer shield plane and a magnetic field probe bottom layer shield plane; each of the plurality of the grounding vias keeps in a conducting state from a direct current to a high frequency, in such a manner that impedance matching of the broadband near-field magnetic-field probe is achieved; by regulating distances between each of the plurality of the grounding vias and the signal via and amounts of the plurality of the grounding vias to accomplish impedance changes caused by the signal via, so as to ensure impedance of the magnetic-field probe is continuous;wherein one of the plurality of the grounding vias and the signal via are a pair of through holes;
wherein the plurality of the grounding vias is connected with the magnetic field probe top layer shield plane and the magnetic field probe bottom layer shield plane; both the magnetic field probe top layer shield plane and the magnetic field probe bottom layer shield plane are connected with the with an external power source to ground; each of the plurality of the grounding vias forms a capacitance with the signal via, wherein a value of a pair of through hole capacitance is calculated according to formula of:

wherein ? is a dielectric constant of a first medium, D is a distance between each of the plurality of the grounding vias to the signal via; and a is a radius of the plurality of the grounding vias and the signal via.

US Pat. No. 10,461,383

BATTERY ENCLOSURE HAVING A COMPOSITE STRUCTURE WITH A COOLANT CHANNEL

Ford Global Technologies,...

18. A battery assembly, comprising:a thermal exchange plate;
a battery array supported on the thermal exchange plate;
a composite structure of an enclosure, the composite structure including a core sandwiched between a first outer layer and a second outer layer, the first and second outer layers having a material composition different than a material composition of the core, the composite structure including at least one support surface and at least one channel surface, the at least one support surface directly contacting the thermal exchange plate, the at least one channel surface recessed relative to the at least one support surface to provide a recessed area, the thermal exchange plate and the recessed area of the composite structure together providing a coolant channel; and
an insert held within a core of the composite structure, the insert configured to receive a fastener that secures the thermal exchange plate relative to the composite structure.

US Pat. No. 10,461,382

RECEPTACLE FOR A BATTERY MODULE AND BATTERY MODULE HAVING SUCH A RECEPTACLE

Robert Bosch GmbH, Stutt...

1. A receptacle (34) for at least partially pressing accommodation of at least one battery cell (12) for a battery module, said receptacle (34) comprising at least two end plates (10) configured to be arranged on two opposing sides of the at least one battery cell (12), wherein the end plates (10) are connected by a plurality of connecting means (24) fixed to the end plates (10), each of the connecting means having at least two plug-in elements (28) that, for fixing the connecting means (24) to the end plates (10), engage with sockets (22) of the end plates (10) extending in a plane arranged substantially at right angles to the direction of extent of the connecting means (24), wherein the connecting means and the plug-in elements are integrally formed, and wherein the sockets completely pass through the end plates.

US Pat. No. 10,461,372

PROTECTIVE LAYERS FOR ELECTROCHEMICAL CELLS

Sion Power Corporation, ...

1. An article for use in an electrochemical cell, comprising:a first layer; and
a second layer disposed on the first layer, wherein the second layer comprises a plurality of particles, and wherein the second layer is substantially non-porous,
wherein the plurality of particles comprise an ionically conductive material,
wherein at least a portion of the plurality of particles are at least partially embedded within the first layer,
wherein at least a portion of the plurality of particles are fused to one another,
wherein the second layer has an ionic conductivity between about 10?6 S/cm and about 10?2 S/cm, and
wherein the second layer has an average thickness between about 0.5 microns and about 50 microns.

US Pat. No. 10,461,369

BATTERY AND BATTERY PACK

KABUSHIKI KAISHA TOSHIBA,...

1. A battery comprising:a flat-shaped electrode group that includes a positive electrode, a positive electrode current collector tab electrically connected to the positive electrode, a negative electrode, and a negative electrode current collector tab electrically connected to the negative electrode, the positive electrode current collector tab being wound into a flat shape and located at a first edge surface, and the negative electrode current collector tab being wound into a flat shape and located at a second edge surface;
a package member that includes a stainless steel-made first package having a flange at an opening and a stainless steel-made second package, and that stores the electrode group in a space formed by welding the flange of the first package to the second package; and
a terminal section that includes a through-hole that is open to the first package, a ring-shaped rising portion that extends from a periphery of the through-hole toward an inside of the package member, a ring-shaped member that is arranged on an outer surface of the rising portion, an insulation gasket that has a cylindrical portion to be inserted into the rising portion, and an external terminal that includes a head portion and a shank portion extending from the head portion, the external terminal being fixed to the first package by caulking with the head portion projecting to an outside of the first package and the shank portion being inserted into the cylindrical portion of the insulation gasket, and the external terminal being electrically connected to the positive electrode or the negative electrode.

US Pat. No. 10,461,364

ELECTROLYTE ADDITIVES FOR LITHIUM-ION BATTERIES UNDER HIGH-VOLTAGE OPERATION

UCHICAGO ARGONNE, LLC, C...

1. A non-aqueous electrolyte for a lithium-ion battery comprising a lithium salt and an additive in an organic solvent; wherein the solvent comprises one or more solvent selected from a linear dialkyl carbonate, a cyclic alkylene carbonate, a sulfolane, a sulfone, a fluoro-substituted linear dialkyl carbonate, a fluoro-substituted cyclic alkylene carbonate, a fluoro-substituted sulfolane, and a fluoro-substituted sulfone; and wherein the additive comprises a compound of Formula (I):
wherein:
R1 is selected from alkyl and substituted-alkyl;
X is selected from halogen, alkoxy, cyano, sulfonyl, sulfonylamido, carboxylic acid, carboxylic ester, and carboxylic amide;
R2 and R3 each independently is Si(R4)3, or R2 and R3 together are Si(R5)2—;
each R4 and R5 independently is selected from alkyl, phenyl, and alkoxy; and
each substituted-alkyl comprises an alkyl moiety substituted with one or more substituent group selected from alkenyl, alkynyl, hydroxy, halogen, amino, alkoxy, carboxylic acid, carboxylic ester, carboxylic amide, phenyl, sulfonic acid, and phosphonic acid.

US Pat. No. 10,461,363

SULFIDE SOLID ELECTROLYTE MATERIAL, BATTERY, AND PRODUCING METHOD FOR SULFIDE SOLID ELECTROLYTE MATERIAL

TOKYO INSTITUTE OF TECHNO...

1. A sulfide solid electrolyte material comprising:a peak at a position of 2?=29.86°±1.00° in X-ray diffraction measurement using a CuK? ray, and
a composition of Li2y+3PS4(0.1?y?0.175).

US Pat. No. 10,461,361

NONAQUEOUS ELECTROLYTE SECONDARY BATTERY INSULATING POROUS LAYER

SUMITOMO CHEMICAL COMPANY...

1. A nonaqueous electrolyte secondary battery insulating porous layer comprising an inorganic filler and a resin, wherein:an aspect ratio of a projection image of the inorganic filler at a surface of the nonaqueous electrolyte secondary battery insulating porous layer is in a range of 1.4 to 4.0;
respective peak intensities I(hkl) and I(abc) of any diffraction planes (hkl) and (abc) of the nonaqueous electrolyte secondary battery insulating porous layer satisfy the following Formula (1), the peak intensities being obtained from the diffraction planes (hkl) and (abc) orthogonal to each other by measurement by use of a wide-angle X-ray diffraction method; and
a maximum value of a peak intensity ratio is in a range of 1.5 to 300, the peak intensity ratio being calculated by the following Formula (2):
I(hkl)>I(abc)  (1), and
I(hkl)/I(abc)  (2).

US Pat. No. 10,461,349

METHOD FOR CONTROLLING FUEL CELL SYSTEM

HONDA MOTOR CO., LTD., T...

1. A method for controlling a fuel cell system including a fuel cell, comprising:generating electric current via an electrochemical reaction between a fuel gas and an oxidant gas by the fuel cell including a solid polymer electrolyte membrane;
detecting, using a controller, an impedance of the fuel cell;
determining, using the controller, whether the impedance increases to a threshold impedance; and
increasing, using the controller, the electric current generated by the fuel cell when the impedance is determined to increase to the threshold impedance, wherein an amount of water generated in the fuel cell increases when the electric current is increased,
wherein an oxidant gas supply mechanism supplies the oxidant gas at a lowest supply flow rate when the fuel cell is performing idling electric power generation, and the oxidant gas supply mechanism maintains the lowest supply flow rate when increasing the electric current.

US Pat. No. 10,461,345

FUEL GAS STORAGE AND SUPPLY SYSTEM

Toyota Jidosha Kabushiki ...

1. A fuel gas storage and supply system that supplies fuel gas to a fuel cell, comprising:a filling port that includes a first check valve;
a decompression valve that adjusts a pressure of the fuel gas;
a fuel gas pipe that connects the filling port to the decompression valve;
one or more gas tanks that are connected to the fuel gas pipe;
an upstream shut valve that is disposed in the fuel gas pipe between an upstream gas tank closest to the filling port among the one or more gas tanks and the filling port;
a second check valve that is disposed in the fuel gas pipe between the filling port and the upstream shut valve;
a pressure sensor that is disposed in the fuel gas pipe between the upstream shut valve and the decompression valve; and
a controller configured to control opening and closing of the upstream shut valve using a measured pressure value of the pressure sensor,
wherein the controller is configured to repeatedly acquire the measured pressure value from the pressure sensor over time when the one or more gas tanks are filled with the fuel gas via the filling port and close the upstream shut valve when an increasing rate of the measured pressure value is less than a predetermined increasing rate threshold value.

US Pat. No. 10,461,343

FUEL CELL ASSEMBLY WITH COOLING SYSTEM

Ford Global Technologies,...

1. A fuel cell assembly comprising:a membrane electrode assembly sandwiched between first and second plates that each include opposing first and second regions that each define a first coolant header and a second coolant header, and in response to a cold-start mode, the first plate being configured to circulate coolant from the first region to the second region and the second plate being configured to circulate coolant from the second region to the first region.

US Pat. No. 10,461,334

GAS DIFFUSION ELECTRODE AND FUEL CELL

TORAY INDUSTRIES, INC., ...

1. A gas diffusion electrode comprising a microporous layer on at least one surface of an electrically conductive porous substrate, whereinthe microporous layer includes a first microporous layer that is in contact with the electrically conductive porous substrate, and a dense layer that is in contact with the first microporous layer, the dense layer having a thickness of 1 ?m or more, and
an average number density B of pores having a pore diameter of 0.15 ?m or more and 1 ?m or less in the dense layer is 1.3A or more where A is an average number density of pores having a pore diameter of 0.15 ?m or more and 1 ?m or less in the microporous layer disposed on at least one surface of the electrically conductive porous substrate.

US Pat. No. 10,461,326

NEGATIVE ELECTRODE INCLUDING SIOX PARTICLES HAVING CARBON COATING, CARBONACEOUS ACTIVE MATERIAL PARTICLES, AND COMPOUND HAVING CARBOXYL OR HYDROXYL GROUP AND NONAQUEOUS ELECTROLYTE SECONDARY BATTERIES

SANYO Electric Co., Ltd.,...

1. A negative electrode for nonaqueous electrolyte secondary batteries comprising a negative electrode current collector and a negative electrode mixture layer disposed on the current collector, whereinthe negative electrode mixture layer includes SiOx 0.5?x?1.5 particles having a carbon coating on a particle surface, carbonaceous active material particles, and a compound having at least one of a carboxyl group and a hydroxyl group and having an average number of etherifying agent moieties present per unit molecule of not more than 0.8, and
the carbon coating includes a first coating disposed on the surface of the SiOx particles and a second coating disposed on the first coating and including carbon having higher crystallinity than the carbon forming the first coating, wherein a thickness of the second coating is 10 to 200 nm.

US Pat. No. 10,461,318

SYSTEMS AND METHODS FOR LITHIUM-ION CELL MANUFACTURING TO REDUCE CELL CONTAMINATION

GM Global Technology Oper...

1. A method comprising:wetting, via a wetting mechanism, an electrode material with a liquid to form a wet precursor;
removing a portion of the electrode material from the wet precursor with a debris generating tool to form a pre-electrode; and
eliminating, via a conditioner, the liquid from the pre-electrode to thereby form an electrode,
wherein the liquid is water and eliminating the liquid comprises applying an organic solvent to the pre-electrode, and
wherein the organic solvent is applied to the pre-electrode in a gaseous phase.

US Pat. No. 10,461,316

REINFORCED METAL FOIL ELECTRODE

Oxis Energy Limited, Oxf...

1. A lithium-sulphur electrochemical cell comprising a metal foil electrode as the anode, a sulphur-containing cathode and an electrolyte, the metal foil electrode comprising:i) a reinforcement layer comprising a porous substrate, and
ii) first and second layers of metal foil comprising lithium and/or sodium, wherein the reinforcement layer is disposed between the first and second metal foil layers and bonded together to form a composite structure having a thickness of 100 microns or less; and
wherein the porous substrate comprises a non-conducting fibrous material.

US Pat. No. 10,461,311

DEVICES, SYSTEMS, AND METHODS FOR MOLTEN FLUID ELECTRODE APPARATUS MANAGEMENT

Vissers Battery Corporati...

1. An apparatus comprising:a plurality of negative electrode reservoirs configured to contain a negative electrode material;
a plurality of positive electrode reservoirs configured to contain a positive electrode material;
a heating system configured to heat negative electrode material within a selected negative electrode reservoir of the plurality of negative electrode reservoirs to maintain the negative electrode material contained in the selected negative electrode reservoir in a fluid state and configured to heat positive electrode material in a selected positive electrode reservoir to maintain the positive electrode material contained in the selected positive electrode reservoir in the fluid state while maintaining, in a non-fluid state, negative electrode material in a non-selected negative electrode reservoir and positive electrode material in a non-selected positive electrode reservoir;
a reaction chamber comprising a solid electrolyte positioned in the reaction chamber to form a positive electrode region on a first side of the solid electrolyte and to form a negative electrode region on a second side of the solid electrolyte; and
an electrode material distribution system configured to cycle fluid positive electrode material between the selected positive electrode reservoir and the positive electrode region and configured to transfer, during a discharge state of the apparatus, fluid negative electrode material from the selected negative electrode reservoir to the negative electrode region.

US Pat. No. 10,461,310

MANUFACTURING METHOD FOR NON-AQUEOUS ELECTROLYTE SECONDARY BATTERY

TOYOTA JIDOSHA KABUSHIKI ...

1. A manufacturing method for a non-aqueous electrolyte secondary battery comprising:forming a mixture containing a binder, inorganic filler particles, and a solvent;
wet granulating the mixture by stirring and crushing the mixture to obtain granules containing composite particles and a solvent,
wherein the composite particles contain the inorganic filler particles and the binder, and the granules have a particle size of 10 ?m to 200 ?m;
pressing the granules in a state in which the solvent remains to form a green compact sheet; and
disposing the green compact sheet on a surface of a positive electrode mixture layer or a negative electrode mixture layer,
wherein a solid content concentration of the granules is equal to or higher than 70 mass % and lower than 100 mass %, and
the particle size is a particle size at a cumulative value of 50% in a volume-based particle size distribution measured according to a laser diffraction/scattering method.

US Pat. No. 10,461,308

SEALED BATTERY AND METHOD OF MANUFACTURE

TOYOTA JIDOSHA KABUSHIKI ...

1. A sealed battery comprising:a case provided with a case body having an opening therein and a lid that is sized so as to be capable of closing the opening and that has an electrolyte fill port;
an electrode assembly that is housed in the case; and
an electrolyte solution,
wherein the lid is provided with a filler plug that is welded to the lid so as to close the fill port, and an outside surface of the lid has a surface treated region forming an electrolyte-repelling region surrounding the weld where the filler plug is welded and another surface treated region forming an electrolyte-affinity region near the electrolyte-repelling region, and
wherein,
upon the electrolyte solution contacting the electrolyte-repelling region of the outside surface of the lid, the electrolyte-repelling region imparts a contact angle of 100° or more between a surface of the electrolyte-repelling region and the electrolyte solution, and
upon the electrolyte solution contacting the electrolyte-affinity region of the outside surface of the lid, the electrolyte-affinity region imparts a contact angle of 80° or less between a surface of the electrolyte-affinity region and the electrolyte solution, and
the electrolyte repellency of the electrolyte-repelling region is higher than the electrolyte-affinity region, and the electrolyte affinity of the electrolyte-affinity region is higher than the electrolyte-repelling region.

US Pat. No. 10,461,306

BATTERY AND METHOD OF ATTACHING SAME TO A GARMENT

KONINKLIJKE PHILIPS N.V.,...

1. A battery comprising:a source of voltage;
at least one positive voltage connection on the source of voltage;
at least one negative voltage connection on the source of voltage;
a first magnetic element that is collocated with the at least one positive voltage connection; and
a second magnetic element that is collocated with the at least one negative voltage connection; wherein the battery comprises a first surface and a second surface that is opposite the first surface;
wherein the at least one positive voltage connection comprises a first positive voltage connection on the first surface and a second positive voltage connection on the second surface;
wherein the at least one negative voltage connection comprises a first negative voltage connection on the first surface and a second negative voltage connection on the second surface; and
wherein the first and second magnetic elements have an “N” pole on the first surface and an “S” pole on the second surface.

US Pat. No. 10,461,298

BATTERY SEPARATOR WITH DIELECTRIC COATING

APPLIED MATERIALS, INC., ...

1. A battery comprising:an anode containing at least one of lithium metal, lithium-alloy, a mixture of lithium metal and lithium alloy;
a cathode; and
a separator disposed between the anode and the cathode, wherein the separator comprises:
at least one dielectric layer capable of conducting ions, wherein the at least one dielectric layer has a thickness of 1 nanometer to 2,000 nanometers and is and formed directly on a surface of the anode, a surface of the cathode, or both the surface of the anode and the surface of the cathode, wherein the at least one dielectric layer comprises:
a plurality of dielectric columnar projections comprising dielectric material; and
a nanoporous structure formed between the dielectric columnar projections and comprising the dielectric material.

US Pat. No. 10,461,296

BATTERY SEPARATOR FILM, NONAQUEOUS ELECTROLYTE SECONDARY BATTERY SEPARATOR, AND NONAQUEOUS ELECTROLYTE SECONDARY BATTERY

SUMITOMO CHEMICAL COMPANY...

1. A battery separator film which curls with respect to a width direction of the battery separator film, the battery separator film being a laminated porous film including a functional layer having a uniform thickness comprising a wholly aromatic polyamide, wherein the functional layer is provided on only one surface of the laminated porous film;wherein the battery separator film exhibits a difference of not more than 5 mm between (i) a width of the battery separator film and (ii)
a projection width of a part of the battery separator film which part is smallest in projection width when seen from a direction perpendicular to a surface of the battery separator film while the battery separator film, to which a tension of 90 N/m is applied, is stretched between two rollers that are provided in parallel with each other at an interval of 1 m at a temperature of 23 degrees Celsius and a relative humidity of 50%.

US Pat. No. 10,461,290

ELECTRIC STORAGE APPARATUS, AND METHOD FOR PRODUCING ELECTRIC STORAGE APPARATUS

GS YUASA INTERNATIONAL LT...

1. An electric storage apparatus, comprising: a plurality of electric storage devices which are arranged in a first direction; and an abutment arranged in alignment with, and disposed on both ends of the electric storage devices in the first direction, wherein each of the abutments includes at least three members stacked in the first direction, wherein each of the members includes a positioning part including a first surface forming a recess recessed in the first direction and a back surface of the first surface forming a projection projecting opposite to the plurality of electric storage devices, in the first direction,wherein the positioning parts of the members are arranged at positions corresponding to one another such that a first one of the positioning parts, a second one of the positioning parts, and a third one of the positioning parts are sequentially arranged in the first direction,
wherein adjacent members are relatively positioned by inserting a positioning part of one of the adjacent members into a positioning part of an other of the adjacent members,
wherein the first one of the positioning parts that is arranged on a side closest to the electric storage devices includes an insulating member, and the second one of the positioning parts and the third one of the positioning parts comprise a metal including a molded metal plate subjected to a metal plating, and
wherein, in the first direction, the second one of the positioning parts is disposed between the recess of the first one of the positioning parts and the recess of the third one of the positioning parts of the members.

US Pat. No. 10,461,288

BATTERY MODULE AND BATTERY PACK INCLUDING SAME

LG CHEM, LTD., Seoul (KR...

1. A battery module comprising:a cartridge stack comprising a plurality of secondary batteries which each comprise an electrode lead, and a plurality of cartridges which each accommodate at least one of the plurality of secondary batteries such that at least a portion of each electrode lead of each secondary battery protrudes outwardly, and which are stacked in a plurality of stages; and
an interconnect board (“ICB”) housing comprising a stepped connection end, a power terminal installed fixedly to the stepped connection end, and a bus bar electrically connecting each electrode lead with the power terminal, and mounted on a surface of the cartridge stack,
wherein the bus bar comprises a first connection part which is provided in opposition to the power terminal, having the stepped connection end therebetween, and is connected with each electrode lead, a second connection part which is provided in opposition to the first connection part, having the stepped connection end therebetween, and is connected with the power terminal, and a connection part which connects the first connection part with the second connection part and is embedded in the stepped connection end such that the connection part is hidden by the stepped connection end.

US Pat. No. 10,461,287

BATTERY PACK

Samsung SDI Co., Ltd., G...

1. A battery pack comprising:secondary batteries;
a case accommodating the secondary batteries, the case comprising:
an upper case;
a lower case; and
plates disposed on each of the upper case and the lower case and each of the plates having holes, wherein each hole corresponds to an end of each of a single one of the secondary batteries;
alignment members attached to the plate of the upper case; and
a conductive coupling tap,
wherein each of the alignment members comprises a protrusion covering at least a portion of one or more holes,
wherein the alignment member is a separate component from the conductive coupling tap
wherein the conductive coupling tap is configured to electrically couple to the ends of corresponding ones of secondary batteries corresponding to the one or more holes,
wherein a width of each of the alignment members is greater than an internal interval between two adjacent ones of the secondary batteries, and
wherein each of the alignment members covers portions of at least two adjacent holes of the plates.

US Pat. No. 10,461,285

NONAQUEOUS ELECTROLYTE SECONDARY BATTERY

SEIKO INSTRUMENTS INC., ...

1. A nonaqueous electrolyte secondary battery, comprising:a bottomed cylindrical positive electrode casing; and
a negative electrode casing fixed to an opening of the positive electrode casing through a gasket, such that an accommodation space is defined between the positive electrode casing and the negative electrode casing,
wherein the opening of the positive electrode casing is sealed to the negative electrode casing side by a caulking material of the gasket to seal the accommodation space,
where the caulking material has a uniform compression ratio of at least 50%, and
where a caulking tip end of the positive electrode casing in the opening is inward of a tip end of the negative electrode casing, and
a diameter d of the nonaqueous electrolyte secondary battery is in a range of 6.6 mm to 7.0 mm, a height h1 of the nonaqueous electrolyte secondary battery is in a range of 1.9 mm to 2.3 mm, at least a part of a side surface portion of the positive electrode casing on an opening side has a curved surface, a radius of curvature R of the curved surface is in a range of 0.8 mm to 1.1 mm, and a height h2 of the positive electrode casing is in a range of 65% to 73% with respect to the height h1 of the nonaqueous electrolyte secondary battery.

US Pat. No. 10,461,280

DOUBLE-SIDED ELECTROLUMINESCENT DISPLAY PANEL AND DISPLAY DEVICE

BOE Technology Group Co.,...

1. A double-sided electroluminescent display panel, comprising:a double-sided light-emitting transparent electroluminescent structure;
a first absorption polarization structure disposed on a first light-emitting surface of the transparent electroluminescent structure; and
a first reflective polarization structure disposed on a second light-emitting surface of the transparent electroluminescent structure, wherein transmission axes of the first absorption polarization structure and the first reflective polarization structure are perpendicular to each other, the first absorption polarization structure is configured to absorb light of a first wave component and transmit light of a second wave component, and the first reflective polarization structure is configured to transmit the light of the first wave component and reflect the light of the second wave component.

US Pat. No. 10,461,271

LIGHT-EMITTING ELEMENT, DISPLAY DEVICE, ELECTRONIC DEVICE, AND LIGHTING DEVICE

Semiconductor Energy Labo...

1. A light-emitting element comprising:a pair of electrodes,
a first light-emitting layer; and
a second light-emitting layer,
wherein the first light-emitting layer comprises a first fluorescent material and a first host material,
wherein a second fluorescent material, a first organic compound and a second organic compound are mixed in the second light-emitting layer,
wherein a triplet excited energy level of the first host material is lower than a triplet excited energy level of the first fluorescent material,
wherein the triplet excited energy level of the first host material is lower than triplet excited energy levels of the first organic compound and the second organic compound, and
wherein light emitted from the light-emitting element comprises delayed fluorescence.

US Pat. No. 10,461,270

ORGANIC EL DISPLAY DEVICE

SHARP KABUSHIKI KAISHA, ...

1. An organic EL display device comprising:an organic EL display panel including a plastic substrate exhibiting flexibility and an organic EL element formed on the plastic substrate;
a first inorganic layer provided on an upper surface of the organic EL display panel; and
a second inorganic layer provided on a lower surface of the organic EL display panel as a surface of the plastic substrate opposite to a first inorganic layer side, wherein
an entire thickness of the organic EL display device is equal to or less than 74 ?m; and
distortion rates of the first inorganic layer and the second inorganic layer in a case where a bending radius of the organic EL display device is 3.5 mm are ?1 to +1%.

US Pat. No. 10,461,266

LUMINESCENT COMPOUNDS AND METHODS OF USING SAME

1. A compound having general formula (1):
wherein G is oxygen, aliphatic, methylene, carbonyl, amine, silylene, phosphine, phosphine oxide, sulfur, sulfonyl, or a combination thereof;
R1 and R2 are independently a hydrogen, an aliphatic moiety, or fluorine, with the proviso that if one of R1 and R2 is aliphatic, CF3, or fluoro, then the other is hydrogen;
R3 is independently H, or a substituted or unsubstituted aliphatic moiety, substituted or unsubstituted aryl moiety, a substituted or unsubstituted amine, halo, thioether, ether, or any combination thereof, and the R3 of one triazolyl ring can be joined to the R3 of the other triazolyl ring; and
R4 is optionally further substituted, and is a non-aromatic carbocycle or heterocycle, an aryl group (which includes a heteroaryl) that is attached as a fused ring or as a substituent, a hydroxy group, nitro, amino, halo, BR2, B(aryl)2, aryl-B(aryl)2, NR2, OR, a nitrile group, —C(halo)3, and R, where R is a substituted or unsubstituted aliphatic group having 1-24 carbon atoms which may be straight, branched or cyclic H, a substituted or unsubstituted aliphatic moiety, halo, a substituted or unsubstituted aryl moiety, or any combination thereof.

US Pat. No. 10,461,259

ORGANIC LIGHT EMITTING DEVICE

LG CHEM, LTD., Seoul (KR...

1. An organic light emitting device comprising:a first electrode;
a hole transport layer;
a light emitting layer;
a power efficiency enhancement layer;
a gradation enhancement layer; and
a second electrode,
wherein the power efficiency enhancement layer comprises a compound represented by Chemical Formula 1 below, and
the gradation enhancement layer comprises a compound represented by Chemical Formula 2 below:

in Chemical Formula 1,
Ar1 and Ar2 are each independently a substituted or unsubstituted C6-60 aryl; or a substituted or unsubstituted C2-60 heteroaryl containing at least one of O, N, Si and S,
each L is independently a direct bond, or a substituted or unsubstituted C6-60 arylene,
each A is independently a substituted or unsubstituted C6-60 arylene having a meta- or ortho-linking group,
each B is independently a substituted or unsubstituted C6-60 aryl; or a substituted or unsubstituted C2-60 heteroaryl containing at least one of O, N, Si and S,
l is an integer of 0 to 2,
a is an integer of 1 or 2, and
h is an integer of 1 or 2,

in Chemical Formula 2,
Ar3 and Ar4 are each independently a substituted or unsubstituted C6-60 aryl; or a substituted or unsubstituted C2-60 heteroaryl containing at least one of O, N, Si and S,
each P is independently a direct bond, or a substituted or unsubstituted C6-60 arylene,
each Q is independently a substituted or unsubstituted C6-60 arylene having a para-linking group,
each R is independently a substituted or unsubstituted C6-60 aryl; or a substituted or unsubstituted C2-60 heteroaryl containing at least one of O, N, Si and S,
p is an integer of 0 to 2,
q is an integer of 1 or 2, and
r is an integer of 1 or 2.

US Pat. No. 10,461,246

MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME

TAIWAN SEMICONDUCTOR MANU...

1. A memory device, comprising:a bottom electrode;
a resistance switching element over the bottom electrode;
a top electrode over the resistance switching element;
an interlayer dielectric layer surrounding the resistance switching element;
a first spacer between the interlayer dielectric layer and a sidewall of the resistance switching element, wherein a bottom surface of the first spacer is over a top surface of the bottom electrode; and
a metal-containing compound layer between the interlayer dielectric layer and the sidewall of the resistance switching element.

US Pat. No. 10,461,244

LAMINATED STRUCTURE AND SPIN MODULATION ELEMENT

TDK CORPORATION, Tokyo (...

1. A laminated structure, comprising:a ferromagnetic layer; and
a multiferroic layer formed on one surface of the ferromagnetic layer,
wherein a surface of the multiferroic layer on the ferromagnetic layer side includes a first region, a crystalline phase of which is rhombohedral, and a second region, a crystalline phase of which is tetragonal,
a proportion of the first region occupying the surface is 30% or more and 70% or less, and
a proportion of the second region occupying the surface is 30% or more and 70% or less.

US Pat. No. 10,461,240

PIEZOELECTRIC SENSORS AND METHODS FOR MANUFACTURING THE SAME

BOE TECHNOLOGY GROUP CO.,...

1. A piezoelectric sensor, comprising a first electrode layer, a second electrode layer and a piezoelectric thin film layer between the first electrode layer and the second electrode layer, the piezoelectric sensor further comprising:a first functional module and a second functional module, both of which are connected to the second electrode layer, wherein the first functional module is configured to sense a pressure applied to the piezoelectric sensor in a first direction, and the second functional module is configured to sense a pressure applied to the piezoelectric sensor in a second direction, and the first direction and the second direction are perpendicular to each other.

US Pat. No. 10,461,233

LIGHT EMITTING DEVICE PACKAGE AND LIGHTING DEVICE

LG INNOTEK CO., LTD., Se...

1. A light emitting device package, comprising:a first lead frame;
a light emitting device disposed on the first lead frame;
a second lead frame spaced apart from the first lead frame in a first direction;
a protective device disposed on the second lead frame; and
a body coupled to the first and second lead frames,
wherein the body including a cavity exposing a portion of an upper surface of the first lead frame and an upper surface of the second lead frame,
wherein the cavity includes first to fourth inner side surfaces which are inclined, respectively,
wherein the first inner side surface faces the second inner side surface in the first direction,
wherein the third inner side surface faces to the fourth inner side surface in a second direction,
wherein the first to fourth inner side surfaces face the first to fourth sides of the light emitting device, respectively,
wherein the cavity has a first bottom surface that exposes a part of an upper surface of the first lead frame; a second bottom surface on which a part of an upper surface of the second lead frame is exposed and on which the protection device is disposed; and a third bottom surface on which a part of the upper surface of the second lead frame is exposed and spaced apart from the second bottom surface,
wherein the first lead frame comprises a first stepped portion disposed along an edge of a lower surface thereof and at least one first through hole,
wherein the first through hole includes a second stepped portion disposed at an inner side thereof,
wherein the cavity includes a first recess portion exposing the second lead frame and a second recess portion exposing the first lead frame,
wherein the second lead frame comprises a third stepped portion disposed along an edge of a lower surface thereof, and a mounting region of the protective device which is not overlapped in a vertical direction and spaced apart from the third stepped portion,
wherein a part of the second recess portion is overlapped with the third stepped portion in the vertical direction,
wherein a minimum distance between the first recess portion and the second recess portion is greater than a length of one side of the light emitting device, and
wherein the first recess portion is not overlapped with a second side of the light emitting device in the first direction.

US Pat. No. 10,461,227

METHOD FOR MANUFACTURING LIGHT EMITTING DEVICE, AND LIGHT EMITTING DEVICE

NICHIA CORPORATION, Anan...

1. A light emitting device, comprising:a light emitting element,
a package having a recess in which the light emitting element is located, and
a sealing resin filling the recess,
wherein the package includes a projection extending from an upper surface of the package, the projection at least partially surrounding the recess,
wherein a roughened surface section is formed on an upper surface of the projection,
wherein the upper surface of the projection on which the roughened surface section is formed is inclined in a direction away from the light emitting element, and
wherein the upper surface of the projection has an inner edge and an outer edge, and the roughened surface section on the upper surface of the projection extends from the inner edge to the outer edge.

US Pat. No. 10,461,219

LIGHT EMITTING ELEMENT

NICHIA CORPORATION, Anan...

1. A light emitting element comprising:a semiconductor layered structure comprising an n-side semiconductor layer and a p-side semiconductor layer each made of a nitride semiconductor and at least partially overlapped with each other;
an n-pad electrode disposed on an upper surface of the n-side semiconductor layer in a different region from where the p-side semiconductor layer is disposed;
a light-transmissive electrically conductive film disposed on an upper surface of the p-side semiconductor layer; and
a p-pad electrode disposed on an upper surface of the light-transmissive electrically conductive film,
wherein, when viewed in a plan view,
an outer peripheral shape of the semiconductor layered structure has a pentagonal shape having a first side, a second side adjacent to the first side at a right angle to the first side, a third side adjacent to the first side at a right angle to the first side, a fourth side adjacent to the second side at an obtuse angle to the second side, and a fifth side adjacent to the third side and the fourth side at an obtuse angle to the third side, the fourth side and the fifth side meet to form a first vertex,
the n-pad electrode is disposed closer to the first side than to the first vertex, and
the p-pad electrode is disposed closer to the first vertex than the n-pad electrode is disposed to the first vertex.

US Pat. No. 10,461,203

SEMICONDUCTOR DEVICES, A FLUID SENSOR AND A METHOD FOR FORMING A SEMICONDUCTOR DEVICE

Infineon Technologie AG, ...

1. A semiconductor device, comprising:a quantum well layer stack comprising a plurality of first quantum well layers and a plurality of second quantum well layers, wherein first quantum well layers of the plurality of first quantum well layers and second quantum well layers of the plurality of second quantum well layers are arranged alternatingly on a first semiconductor layer structure,
wherein the first quantum well layers of the plurality of first quantum well layers comprise silicon-germanium and the second quantum well layers of the plurality of second quantum well layers comprise silicon,
wherein the first quantum well layers of the plurality of first quantum well layers and the second quantum well layers of the plurality of second quantum well layers have a thickness of below 100 nm, and
wherein the quantum well layer stack is configured to emit light with a light emission maximum at a wavelength of between 2 ?m and 10 ?m or to absorb light with a light absorption maximum at a wavelength of between 2 ?m and 10 ?m.

US Pat. No. 10,461,195

SEMICONDUCTOR DEVICES

SAMSUNG ELECTRONICS CO., ...

1. A semiconductor device, comprising:a substrate;
channel semiconductor patterns vertically stacked and spaced apart from each other on the substrate;
a gate electrode running across the channel semiconductor patterns;
source/drain regions at opposite sides of the gate electrode, the source/drain regions being connected to the channel semiconductor patterns;
an interlayer dielectric layer covering the source/drain regions; and
air gaps between the substrate and bottom surfaces of the source/drain regions so that the bottom surfaces of the source/drain regions do not contact the substrate,
wherein, when viewed in cross section, top surfaces of the air gaps are defined by the bottom surfaces of the source/drain regions, and side surfaces of the air gaps are defined by the interlayer dielectric layer,
wherein the substrate comprises on its upper portion a fin-shaped active pattern including a first region under the gate electrode and second regions on the opposite sides of the gate electrode,
wherein the channel semiconductor patterns are disposed on the first region, and
wherein the bottom surfaces of the source/drain regions are lower than a bottom surface of a lowermost one of the channel semiconductor patterns and higher than top surfaces of the second regions.

US Pat. No. 10,461,183

ULTRA HIGH VOLTAGE SEMICONDUCTOR DEVICE WITH ELECTROSTATIC DISCHARGE CAPABILITIES

Taiwan Semiconductor Manu...

1. A semiconductor device comprising:a first layer over a semiconductor substrate;
a drain region in the first layer, the drain region comprising
a drain rectangular portion;
a first drain end portion contiguous with the drain rectangular portion and extending from the drain rectangular portion away from a center of the drain region; and
a second drain end portion contiguous with the drain rectangular portion and extending from the drain rectangular portion away from the center of the drain region; and
a source region spaced a distance from and surrounding the drain region in the first layer,
wherein the first drain end portion and the second drain end portion have a same doping type and each of the first drain end portion and the second drain end portion have different doping concentrations from the drain rectangular portion.

US Pat. No. 10,461,168

SEMICONDUCTOR DEVICE FOR COMPENSATING INTERNAL DELAY, METHODS THEREOF, AND DATA PROCESSING SYSTEM HAVING THE SAME

Samsung Electronics Co., ...

1. A method of manufacturing a Fin Field Effect Transistor (FinFET), the method comprising:providing a substrate;
forming an elevated source and an elevated drain on the substrate;
forming a first dielectric layer on the substrate, the first dielectric layer including a gate oxide layer and a high-k dielectric layer disposed on the gate oxide layer, the high-k dielectric layer being U-shaped;
forming a metal buffer layer on the first dielectric layer, the metal buffer layer being U-shaped;
forming a metal gate on the metal buffer layer, the metal gate contacting the metal buffer layer; and
forming a second dielectric layer on the substrate after generating at least a first opening next to the first dielectric layer such that the second dielectric layer contacts the first dielectric layer, wherein
a dielectric constant of the second dielectric layer is less than that of the first dielectric layer, and
a first portion of the first dielectric layer is disposed between the metal buffer layer and the second dielectric layer, and blocks the metal buffer layer to contact the second dielectric layer.

US Pat. No. 10,461,161

GAN DEVICE WITH FLOATING FIELD PLATES

NAVITAS SEMICONDUCTOR, IN...

1. A semiconductor device comprising:a substrate including a transition layer that can form a two-dimensional electron gas;
a source electrode ohmically coupled to the transition layer;
a drain electrode ohmically coupled to the transition layer;
a gate stack formed on the transition layer; and
a field termination structure spaced apart from the transition layer and positioned between the gate stack and the drain electrode, wherein the field termination structure includes a source plate electrically connected to the source electrode and at least one capacitively coupled floating plate.

US Pat. No. 10,461,158

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME

Renesas Electronics Corpo...

1. A method of manufacturing a semiconductor device including a semiconductor substrate, a first insulating film formed on the semiconductor substrate, and a semiconductor layer formed on the first insulating film, comprising the steps of:(a) forming a dummy gate electrode of a MISFET over the semiconductor layer;
(b) after the step (a), forming an offset spacer over a side surface of the dummy gate electrode;
(c) after the step (b), forming a side wall over the side surface of the dummy gate electrode via the offset spacer;
(d) after the step (c), forming an interlayer insulating film so as to cover the dummy gate electrode, the offset spacer and the side wall;
(e) after the step (d), exposing an upper surface of the dummy gate electrode and an upper surface of the offset spacer by polishing the interlayer insulating film;
(f) after the step (e), removing the offset spacer in order to form a first opening beside the dummy gate electrode;
(g) after the step (f), forming a first impurity region having a first conductivity type in the semiconductor substrate by an ion implantation method through the first opening;
(h) after the step (g), forming a second impurity region having a second conductivity type opposite to the first conductivity type in the semiconductor layer by an ion implantation method through the first opening; and
(i) after the step (h), replacing the dummy gate electrode with a metal material, thereby to form a metal gate electrode of the MISFET.

US Pat. No. 10,461,147

SEMICONDUCTOR DEVICE FABRICATING METHOD AND SEMICONDUCTOR DEVICE

LAPIS SEMICONDUCTOR CO., ...

1. A semiconductor device comprising:a lower electrode disposed on a substrate;
a first insulating film disposed on one portion of an upper surface of the lower electrode;
an upper electrode disposed on one portion of an upper surface of the first insulating film;
a second insulating film that covers the upper electrode, another portion of the upper surface of the first insulating film other than the one portion of the upper surface of the first insulating film and
covers another portion of the upper surface of the lower electrode other than the one portion of the upper surface of the lower electrode;
a first conductive portion formed in a first open portion of the second insulating film, the first open portion runs through the second insulating film and exposes the upper electrode, and the first conductive portion is electrically connected to the upper electrode; and
a second conductive portion formed in a second open portion of the second insulating film, the second open portion runs through the second insulating film and exposes the lower electrode, and the second conductive portion is electrically connected to the lower electrode;
wherein a material of the first insulating film is different from a material of the second insulating film and the second insulating film extends beyond the second open portion on the another portion of the upper surface of the lower electrode.

US Pat. No. 10,461,144

CIRCUIT FOR PREVENTING STATIC ELECTRICITY AND DISPLAY DEVICE HAVING THE SAME

Samsung Display Co., Ltd....

1. A display device comprising:a display unit comprising a plurality of pixels in a display region;
a driving circuit in a non-display region, the driving circuit being configured to drive the display unit;
a first clock signal wire configured to transmit a first clock signal to the driving circuit; and
a first circuit in the non-display region,
wherein the first circuit comprises:
a transistor electrically coupled to the first clock signal wire through a conductive wire and comprising a source electrode, a drain electrode, and a gate electrode; and
a capacitor comprising a first electrode coupled to the source electrode and to the drain electrode of the transistor, and a second electrode,
wherein the conductive wire is coupled to the first clock signal wire through a first contact hole and coupled to the gate electrode, and
wherein the second electrode of the capacitor is configured to receive a fixed voltage so that the second electrode is set to a voltage of the fixed voltage.

US Pat. No. 10,461,143

TRANSISTOR SUBSTRATE, DISPLAY DEVICE, AND METHOD OF MANUFACTURING THE TRANSISTOR SUBSTRATE

SAMSUNG DISPLAY CO., LTD....

1. A display device comprising:a pixel electrode;
a common electrode overlapping the pixel electrode;
a light emitting layer positioned between the pixel electrode and the common electrode;
a base substrate;
a data line disposed on the base substrate;
a conductive layer disposed on the base substrate and being spaced from the data line;
a semiconductor layer overlapping the conductive layer, being spaced from the conductive layer, and comprising a source electrode and a drain electrode, wherein the source electrode is electrically connected to the data line, and wherein the drain electrode is electrically connected to the pixel electrode; and
a gate electrode overlapping the semiconductor layer,
wherein the base substrate is a single layer structure or a multilayer structure having a polymer.

US Pat. No. 10,461,137

ORGANIC ELECTROLUMINESCENT DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME

BOE Technology Group Co.,...

1. An organic electroluminescent display panel, comprising a substrate, and a pixel defining layer and a light emitting layer on the substrate, wherein:the pixel defining layer comprises a first pixel defining layer on the substrate, a second pixel defining layer on the first pixel defining layer, and a third pixel defining layer between the first pixel defining layer and the second pixel defining layer;
the first pixel defining layer comprises a plurality of first opening areas, each of which defines a sub-pixel light emitting area, and the light emitting layer is arranged in the plurality of first opening areas;
the second pixel defining layer comprises a plurality of second opening areas, each of which defines a virtual pixel area comprising at least two adjacent sub-pixel light emitting areas in a same color; and
the third pixel defining layer comprises a plurality of third opening areas corresponding to the plurality of first opening areas in a one-to-one manner, and each of the plurality of third opening areas is not larger than a corresponding first opening area;
wherein respective virtual pixel areas defined by the plurality of second opening areas comprise a same number of sub-pixel light emitting areas; and virtual pixel areas containing red sub-pixel light emitting areas, virtual pixel areas containing green sub-pixel light emitting areas, and virtual pixel areas containing blue sub-pixel light emitting areas are disposed alternately in each row of the respective virtual pixel areas; and
wherein sidewalls of respective first opening areas, respective second opening areas, and respective third opening areas are sloped, top areas of the respective first opening areas and the respective third opening areas are smaller than their corresponding bottom areas, and top areas of the respective second opening areas are greater than their corresponding bottom areas.

US Pat. No. 10,461,123

LIGHT EMITTING DEVICE AND DISPLAY DEVICE INCLUDING THE SAME

Samsung Display Co., Ltd....

1. A light emitting device, comprising:a substrate;
a light emitting element on the substrate, the light emitting element having a first end portion and a second end portion arranged in a longitudinal direction;
one or more partition walls disposed on the substrate, the one or more partition walls being spaced apart from the light emitting element;
a first reflection electrode adjacent the first end portion of the light emitting element;
a second reflection electrode adjacent the second end portion of the light emitting element;
a first contact electrode directly connected to the first reflection electrode and the first end portion of the light emitting element;
an insulating layer on the first contact electrode, the insulating layer having an opening exposing the second end portion of the light emitting element and the second reflection electrode to the outside; and
a second contact electrode on the insulating layer, the second contact electrode being connected to the second reflection electrode and the second end portion of the light emitting element through the opening.

US Pat. No. 10,461,122

LIGHT EMITTING DIODE DISPLAY PANEL AND MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A light emitting diode display panel, comprising:a substrate;
a plurality of light emitting diodes arranged in an array on the substrate;
a plurality of polarization layers, located on a light exit side of the plurality of light emitting diodes respectively, and the plurality of polarization layers are in a one-to-one correspondence to the plurality of light emitting diodes;
wherein the plurality of polarization layers comprise a plurality of first polarization layers and a plurality of second polarization layers having different polarization directions.

US Pat. No. 10,461,120

DISPLAY DEVICE AND METHOD FOR PRODUCING A DISPLAY DEVICE

OSRAM Opto Semiconductors...

1. A pixel headlight comprising:a carrier; and
a semiconductor layer sequence having a major face facing the carrier, the semiconductor layer sequence comprising a first semiconductor layer, a second semiconductor layer, and an active region arranged between the first semiconductor layer and the second semiconductor layer, the active region adapted to generate radiation and form a plurality of pixels;
wherein the semiconductor layer sequence comprises a recess that extends from the major face of the semiconductor layer sequence through the active region into the first semiconductor layer and is provided for electrical contacting of the first semiconductor layer; and
wherein the carrier comprises a plurality of switches that are integrated into the carrier, each switch provided for controlling at least one pixel.

US Pat. No. 10,461,119

SOLID-STATE IMAGING DEVICE, IMAGING SYSTEM, AND METHOD FOR MANUFACTURING SOLID-STATE IMAGING DEVICE

Canon Kabushiki Kaisha, ...

1. A solid-state imaging device, comprising:a pixel including a photoelectric conversion element and a charge holding portion to which a charge generated by the photoelectric conversion element is transferred in a pixel region;
a peripheral circuit that processes a signal from the pixel in a peripheral region;
a light-shielding layer that is disposed in the pixel region and the peripheral region and that is electrically connected to a substrate at a contact portion in the peripheral region;
a first insulating layer that has a side surface between the charge holding portion and the contact portion in a plan view and that is disposed between the substrate and the light-shielding layer in a section perpendicular to a plane of the plan view; and
a first insulating member that is disposed on the side surface of the first insulating layer,
wherein an angle formed between an upper surface of the first insulating layer and a side surface of the first insulating member is larger than an angle formed between the upper surface of the first insulating layer and the side surface of the first insulating layer, and
wherein a portion of the light-shielding layer that overlaps the first insulating member in the plan view has an upper surface having a shape following a shape of the first insulating member.

US Pat. No. 10,461,110

IMAGE PICKUP ELEMENT, METHOD OF MANUFACTURING IMAGE PICKUP ELEMENT, AND ELECTRONIC APPARATUS

Sony Corporation, Tokyo ...

1. An imaging device comprising:a substrate;
a first photoelectric conversion region disposed in the substrate;
a second photoelectric conversion region disposed in the substrate;
a trench disposed between the first photoelectric conversion region and the second photoelectric conversion region;
a first silicon oxide film disposed in the trench, the first silicon oxide film contacting the substrate;
a hafnium oxide film disposed in the trench, the hafnium oxide film disposed at an inner side of the first silicon oxide film;
a tantalum oxide film disposed in the trench, the tantalum oxide film disposed at an inner side of the hafnium oxide film;
a second silicon oxide film disposed in the trench, the second silicon oxide film disposed at an inner side of the tantalum oxide film; and
tungsten material disposed in the trench, the tungsten material disposed at an inner side of the second silicon oxide film,
wherein,
the first silicon oxide film is disposed over the first photoelectric conversion region and contacts the substrate,
the hafnium oxide film is disposed over the first photoelectric conversion region and contacts the first silicon oxide film,
the tantalum oxide film is disposed over the first photoelectric conversion region and contacts the hafnium oxide film,
the second silicon oxide film is disposed over the first photoelectric conversion region and contacts the tantalum oxide film, and
a thickness of the second silicon oxide film over the first photoelectric conversion region is larger than a thickness of the second silicon oxide film between the tantalum oxide film and the tungsten material in the trench.

US Pat. No. 10,461,107

IMAGE PICKUP ELEMENT, IMAGE PICKUP DEVICE, MANUFACTURING DEVICE AND METHOD

Sony Corporation, Tokyo ...

1. An image pickup element comprising:a non-planar layer between a microlens and a filter, the filter and the microlens touch the non-planar layer,
wherein a refractive index of the microlens is greater than a refractive index of the non-planar layer, the refractive index of the non-planar layer is greater than a refractive index of the filter.

US Pat. No. 10,461,099

METAL OXIDE FILM AND METHOD FOR FORMING METAL OXIDE FILM

Semiconductor Energy Labo...

1. A method for manufacturing a metal oxide film comprising:forming the metal oxide film by a sputtering method using a sputtering target comprising a polycrystalline oxide in an atmosphere where oxygen partial pressure is greater than or equal to 33%,
wherein the sputtering target comprises indium, gallium and zinc,
wherein the metal oxide film comprises a plurality of crystal parts when the metal oxide film is formed,
wherein a size of one of the plurality of crystal parts is less than or equal to 10 nm, and
wherein a crystal peak is not observable in an XRD spectrum with respect to the metal oxide film.

US Pat. No. 10,461,088

METHOD FOR FORMING SEMICONDUCTOR DEVICE STRUCTURE

Taiwan Semiconductor Manu...

1. A method for forming a semiconductor device structure, comprising:forming a gate stack and a conductive layer over a semiconductor substrate, wherein the semiconductor substrate has a first region and a second region isolated from each other by an isolation structure in the semiconductor substrate, the gate stack is formed over the first region, and the conductive layer is formed over the second region and the isolation structure;
forming a negative photoresist layer to cover the gate stack and a first portion of the conductive layer over the isolation structure and expose a second portion of the conductive layer;
forming a mask layer over the negative photoresist layer and the conductive layer, wherein the mask layer has trenches over the second portion of the conductive layer, wherein the mask layer over the conductive layer is thicker than the mask layer over the negative photoresist layer;
removing the second portion through the trenches;
removing the mask layer; and
removing the negative photoresist layer.

US Pat. No. 10,461,079

METHOD AND DEVICE OF PREVENTING MERGING OF RESIST-PROTECTION-OXIDE (RPO) BETWEEN ADJACENT STRUCTURES

TAIWAN SEMICONDUCTOR MANU...

1. A method of fabricating semiconductor device, comprising:epitaxially growing a first source/drain on a first fin structure and a second source/drain on a second fin structure;
forming a first layer over the first source/drain but not over the second source/drain;
forming a dielectric layer over the first layer and over the second source/drain; and
removing a first segment of the dielectric layer but not a second segment of the dielectric layer, wherein the first segment is disposed over the first layer, and wherein the second segment is disposed over the second source/drain.

US Pat. No. 10,461,075

EMBEDDED TUNGSTEN RESISTOR

Texas Instruments Incorpo...

1. An integrated circuit, comprising:a substrate;
a well formed in the substrate;
a silicide layer formed in the well;
a tungsten resistor formed over the silicide layer;
a first polysilicon lead formed over the silicide layer; and
a second polysilicon lead formed over the silicide layer and adjacent to the first polysilicon lead to define a resistor trench above the substrate.

US Pat. No. 10,461,067

THERMALLY ENHANCED PACKAGE TO REDUCE THERMAL INTERACTION BETWEEN DIES

GLOBALFOUNDRIES INC., Gr...

1. A device comprising:integrated circuit (IC) chips, comprising a logic chip and at least one memory stack adjacent the logic chip, attached to an upper surface of a substrate;
a lid thermally connected to an upper surface of the IC chips by a first thermal interface material (TIM1);
a slit formed through the lid by punch and die at a boundary between the logic chip and each memory stack;
a heat sink thermally connected to the lid by a second thermal interface material (TIM2);
at least one co-axial hole formed in the lid and the heat sink; and
a vertical heat pipe extending through each co-axial hole for direct thermal contact with an IC chip and the heat sink.

US Pat. No. 10,461,063

LIGHT-EMITTING DEVICE

Toshiba Hokuto Electronic...

1. A light-emitting device having flexibility comprising:a light-emitting part;
an external wiring part; and
a joint part,
the light-emitting part comprising a first portion of a first insulating substrate, at least a first portion of a second insulating substrate, a plurality of light-emitting elements, a first portion of an internal wiring pattern, and a resin layer, the first portion of the first insulating substrate and the first portion of the second insulating substrate are each light transmitting and flexible, the plurality of light-emitting elements are between the first portion of the first insulating substrate and the first portion of the second insulating substrate, the first portion of the internal wiring pattern is formed on at least one inside surface of at least one of the first portion of the first insulating substrate and the first portion of the second insulating substrate, the resin layer is light transmissive and insulating, the resin layer is between the first portion of the first insulating substrate and the first portion of the second insulating substrate,
the external wiring part comprising a first portion of a third insulating substrate and a first portion of an external wiring, the first portion of the third substrate is flexible,
the joint part comprising:
a second portion of the internal wiring pattern that extends beyond the light-emitting part, said second portion of the internal wiring pattern comprising first and second internal wiring ends, each of the internal wiring ends having a respective internal wiring end width, the first internal wiring end is an anode, the second internal wiring end is a cathode;
a second portion of the external wiring that extends beyond the external wiring part;
a second portion of the third insulating substrate that extends beyond the external wiring part; and
an anisotropic conductive adhesive,
at least part of the second portion of the external wiring is divided into a plurality of divided wirings, each divided wiring of the plurality of divided wirings having a width that is less than each of the internal wiring end widths,
the first internal wiring end is adjacent to the second internal wiring end, and the anisotropic conductive adhesive comprises a single region that is in contact with each of the plurality of divided wirings and the first and second internal wiring ends, and the single region of the anisotropic conductive adhesive electrically connects the first internal wiring end to at least a first divided wiring of the plurality of divided wirings, and connects the second internal wiring end to at least a second divided wiring of the plurality of divided wirings.

US Pat. No. 10,461,058

METHOD AND APPARATUS FOR MANUFACTURING ELECTRONIC DEVICE USING DEVICE CHIP

SHASHIN KAGAKU CO., LTD.,...

1. A method of manufacturing electronic devices comprising:a preparation step for preparing a first substrate having a first adhesive layer and a second substrate having a second adhesive layer, the first adhesive layer including a surface where a plurality of device chips are adhered;
a first take-out step for making at least part of the device chips on the first substrate come into contact with and adhere to at least part of a selective adhesive region on a third adhesive layer of a first drum and for separating the at least part of the device chips from the first substrate by rotating the first drum; and
a first transfer step for making the device chips on the selective adhesive region come into contact with and adhere to the second adhesive layer and for separating the device chips from the selective adhesive region by rotating the first drum.

US Pat. No. 10,461,048

INTEGRATED CIRCUITS AND METHODS OF MANUFACTURING

LEONARDO MW LTD., Basild...

7. A method according to claim 6, in which:the manufacturing step (a) comprises:
manufacturing the amplifier with a first smaller gate size, and
the manufacturing step (b) comprises:
manufacturing a carrier chip having the second stage amplifier with a second gate size larger than that in the first portion.

US Pat. No. 10,461,046

SEMICONDUCTOR DEVICE

Renesas Electronics Corpo...

1. A semiconductor device comprising:a first region;
a second region surrounding an outer periphery of the first region; and
an annular seal ring formed in the second region,
wherein the second region includes:
an SOI substrate comprised of a semiconductor substrate of a first conductivity type, a buried insulating film over the semiconductor substrate, and a semiconductor layer over the buried insulating film; and
an interlayer insulating film formed over the semiconductor layer,
wherein the seal ring includes:
an annular electrode portion comprised of a conductive film buried in the interlayer insulating film;
the semiconductor layer; and
the buried insulating film, and
wherein the electrode portion is electrically connected with the semiconductor layer,
wherein an element isolation portion is formed in the semiconductor substrate between the first region and the second region, and the element isolation portion is thicker than the buried insulating film, and
wherein the semiconductor substrate under the buried insulating film has more than one PN junction portion.

US Pat. No. 10,461,044

WAFER LEVEL FAN-OUT PACKAGE AND METHOD OF MANUFACTURING THE SAME

Samsung Electronics Co., ...

1. A method of manufacturing a wafer level fan-out package, comprising:placing a chip and a base substrate against each other with an active surface of the chip facing the base substrate;
encapsulating the chip by forming an encapsulant on the base substrate;
removing the base substrate to expose the active surface of the chip and a surface of the encapsulant laterally adjacent to the chip;
forming a wiring structure on the active surface of the chip and on the surface of the encapsulant adjacent to the chip; and
subsequently mounting a passive electronic component on and electrically connecting the passive electronic component to the wiring structure,
wherein a recess is formed in the surface of the encapsulant laterally adjacent to the chip such that the recess is defined to one side of the chip in a direction parallel to said surface of the encapsulant, and
the passive electronic component is set within the recess such that the passive electronic component is disposed to said one side of the chip in the direction parallel to said surface of the encapsulant.

US Pat. No. 10,461,042

SEMICONDUCTOR MODULE

SHINDENGEN ELECTRIC MANUF...

1. A semiconductor module comprising:a first substrate having a first insulating substrate and a first conductor layer which is formed on one-surface side of the first insulating substrate;
a power device part having a first electrode on one surface thereof and a second electrode and a gate electrode on the other surface thereof, and having the first electrode electrically connected to the first conductor layer;
a second substrate having a second insulating substrate, a second conductor layer formed on one-surface side of the second insulating substrate and a third conductor layer formed on the other surface of the second insulating substrate, wherein a hole is formed in the second insulating substrate at a position corresponding to a position of the gate electrode, the second conductor layer has a bonding portion bonded to the second electrode and a surrounding wall portion having an L shape formed at a position which surrounds the bonding portion as viewed in a plan view in a state where an upper end surface of the surrounding wall portion projects from a bonding surface between the second electrode and the bonding portion, and the second substrate is brought into contact with the first substrate by way of the surrounding wall portion;
an inner resin portion made of a resin and disposed in a space defined by the surrounding wall portion and sandwiched between the first insulating substrate and the second insulating substrate;
a control IC disposed on the third conductor layer; and
an outer resin portion made of a resin and disposed on the one surface side of the first substrate so as to cover the second substrate and the control IC, wherein
the first substrate, the power device part, the second substrate and the control IC are stacked in this order, wherein
a connecting member is disposed inside the hole formed in the second insulating substrate, and
the gate electrode is electrically connected to a control signal output terminal of the control IC through the connecting member.

US Pat. No. 10,461,040

MATCHED CERAMIC CAPACITOR STRUCTURES

APPLE INC., Cupertino, C...

1. A capacitor device comprising:a first capacitor comprising a first and a second electrical termination and first and second stacks of electrodes; and
a second capacitor comprising a third and a fourth electrical termination and third and fourth stacks of electrodes, wherein the first stack is disposed atop the third stack, the third stack is disposed atop the second stack, and the second stack is disposed atop the fourth stack;
wherein the first stack comprises:
a first set of electrodes, each respective electrode of the first set comprising a respective tab that couples each respective electrode to the first electrical termination; and
a second set of electrodes, each respective electrode of the second set comprising a respective tab that couples each respective electrode to the second electrical termination, wherein each electrode of the second set is disposed between two electrodes of the first set of electrodes;
the second stack comprises:
a third set of electrodes, each respective electrode of the third set comprising a respective tab that couples each respective electrode to the first electrical termination; and
a fourth set of electrodes, each respective electrode of the fourth set comprising a respective tab that couples each respective electrode to the second electrical termination, wherein each electrode of the fourth set is disposed between two electrodes of the third set of electrodes;
the third stack comprises:
a fifth set of electrodes, each respective electrode of the fifth set comprising a respective tab that couples each respective electrode to the third electrical termination; and
a sixth set of electrodes, each respective electrode of the sixth set comprising a respective tab that couples each respective electrode to the fourth electrical termination, wherein each electrode of the sixth set is disposed between two electrodes of the fifth set of electrodes; and
the fourth stack comprises:
a seventh set of electrodes, each respective electrode of the seventh set comprising a respective tab that couples each respective electrode to the third electrical termination; and
an eighth set of electrodes, each respective electrode of the eighth set comprising a respective tab that couples each respective electrode to the fourth electrical termination, wherein each electrode of eighth set is disposed between two electrodes of the seventh set of electrodes; and
wherein a body of the capacitor device comprises a right prism shape that comprises:
a square base comprising a bottom of the body of the capacitor device;
a first side comprising the first electrical termination;
a second side distinct from the first side, comprising the second electrical termination;
a third side distinct from the first and the second side, comprising the third electrical termination; and
a fourth side distinct from the first, the second, and the third side, comprising the fourth electrical termination.

US Pat. No. 10,461,035

SEMICONDUCTOR PACKAGE STRUCTURE

Industrial Technology Res...

1. A semiconductor package structure, comprising:a redistribution structure comprising a redistribution layer and a first dielectric layer disposed on the redistribution layer;
a chip disposed the on the redistribution structure;
an upper dielectric layer disposed between the chip and the first dielectric layer of the redistribution structure, wherein the upper dielectric layer and the first dielectric layer are organic materials;
a plurality of conductive members disposed between the redistribution layer and the chip, with each conductive member having a first end adjacent to the chip and a second end adjacent to the redistribution structure;
wherein the first end of said each conductive member contacts with the upper dielectric layer and the second end of said each conductive member contacts with the first dielectric layer; and
an encapsulation layer filled between the redistribution structure, the chip and the plurality of conductive members,
wherein Young's modulus of the upper dielectric layer is A, Young's modulus of the encapsulation layer is B, and Young's modulus of the first dielectric layer is D, wherein the semiconductor package structure satisfies the following inequalities:
A/B<1; and D/B<1.

US Pat. No. 10,461,032

SUBSTRATE WITH EMBEDDED STACKED THROUGH-SILICON VIA DIE

Intel Corporation, Santa...

1. An apparatus, comprising:a first die and a die-bonding film disposed on and entirely covering a back surface of the first die, but not extending beyond the back surface of the first die, wherein a surface of the die-bonding film is an exposed surface;
a second die including one or more through-silicon vias disposed therein (TSV die), the first die electrically coupled to the TSV die through the one or more through-silicon vias, wherein the first die is electrically coupled to the TSV die through the one or more through-silicon vias by one or more corresponding conductive bumps disposed on the first die and by one or more bond pads disposed on the TSV die;
a layer of epoxy flux material disposed between the first die and the TSV die, the layer of epoxy flux material surrounding the one or more corresponding conductive bumps disposed on the first die;
a coreless substrate, wherein the die-bonding film and both the first die and the TSV die are embedded in the coreless substrate, wherein no surface of the first die and the die-bonding film protrudes from a surface of the coreless substrate, and wherein the coreless substrate comprises a continuous encapsulation layer laterally surrounding both the first die and the TSV die, wherein one or more conductive vias extend through the entirety of the coreless substrate, wherein the exposed surface of the die-bonding film is co-planar with corresponding pads of the one or more conductive vias;
a plurality of conductive contacts disposed on a surface of the coreless substrate, wherein the plurality of conductive contacts is above the second die and the second die is above the first die and the die-bonding film; and
a packaged die attached to the corresponding pads of the one or more conductive vias.

US Pat. No. 10,461,025

LOW COST METALLIZATION DURING FABRICATION OF AN INTEGRATED CIRCUIT (IC)

Skyworks Solutions, Inc.,...

1. An integrated circuit comprising:a wafer having a front surface and a back surface;
a via hole etched on the wafer;
a metal layer deposited along walls of the via hole, the metal layer electrically connects the front surface and the back surface; and
a seed metal layer deposited on the back surface of the wafer, the seed metal layer deposited prior to a photoresist layer and thickened after removal of the photoresist layer.

US Pat. No. 10,461,006

ENCAPSULATED SEMICONDUCTOR PACKAGE

Amkor Technology, Inc., ...

1. An integrated circuit package comprising:a substrate comprising a first substrate side, a second substrate side opposite the first substrate side, and a plurality of lateral substrate sides that extend between the first substrate side and the second substrate side;
an integrated circuit die comprising a first die surface, a second die surface opposite the first die surface, and a plurality of lateral die surfaces that extend between the first die surface and the second die surface, where the second die surface is coupled to the first substrate side; and
an encapsulant that covers at least the plurality of lateral die surfaces and the plurality of lateral substrate sides,
wherein the substrate comprises a plurality of conductive layers comprising:
a first conductive layer comprising a plurality of conductive interconnects at the first substrate side, wherein:
each of the conductive interconnects is coupled to a respective pad of the integrated circuit die;
each of the conductive interconnects comprises a metal positioned outside a footprint of the integrated circuit die; and
each of the conductive interconnects comprises a laterally outermost surface that is positioned laterally inward from an outermost periphery of the substrate; and
a second conductive layer comprising a plurality of lands at the second substrate side.

US Pat. No. 10,460,992

HIGH FREQUENCY ATTENUATOR

THIN FILM TECHNOLOGY CORP...

1. A passive, high frequency attenuator comprising:a substrate comprising a substrate material having a first side and a second side, the second side being opposite the first;
a first portion coupled to the first side of the substrate, the first portion comprising:
an input contact section;
an output contact section; and
a ground section;
a second portion coupled to the second side of the substrate, the second portion comprising:
a first ground section positioned along a first edge of the second side of the substrate;
a second ground section positioned along a second edge of the second side of the substrate, the second edge being opposite the first edge; and
an attenuation section positioned between the first and second ground sections, the attenuation section comprising:
an input section;
an output section; and
a plurality of resistive sections positioned between the input section, the output section, and the first ground section; and
a plurality of through-holes extending through the substrate and providing electrical communication between the first side of the substrate and the second side of the substrate; and wherein
the input contact section of the first portion is in electrical communication with the input section of the attenuation section of the second portion;
the output contact section of the first portion is in electrical communication with the output section of the attenuation section of the second portion; and
the ground section of the first portion is in electrical communication with the first ground section of the second portion and the second ground section of the second portion.

US Pat. No. 10,460,988

REMOVAL METHOD AND PROCESSING METHOD

Tokyo Electron Limited, ...

1. A removal method for selectively removing a plurality of types of metal oxide films in a plurality of recesses formed in a substrate that is arranged in a processing chamber, the removal method comprising process steps of: exposing the plurality of types of metal oxide films to BCl3 gas or a BCl3 gas plasma generated by introducing BCl3 gas; stopping introduction of the BCl3 gas and performing a purge process; exposing the plurality of types of metal oxide films and a plurality of types of metal films underneath the plurality of types of metal oxide films to a plasma generated by introducing an inert gas; and stopping introduction of the inert gas and performing the purge process; wherein the process steps are repeated a plurality of times; and wherein the process step of exposing the plurality of types of metal oxide films and the plurality of types of metal films underneath the plurality of types of metal oxide films to the plasma includes performing a first process step of exposing the plurality of types of metal oxide films to one plasma generated from a single gas of the inert gas, and a second process step of exposing the plurality of types of metal films to two different plasmas each generated from a single gas selected from a plurality of types of gases including the inert gas.

US Pat. No. 10,460,975

VACUUM CHUCK, BEVELING/POLISHING DEVICE, AND SILICON WAFER BEVELING/POLISHING METHOD

SUMCO CORPORATION, Tokyo...

1. A vacuum chuck comprising:a vacuum chuck stage comprising a circular vacuum surface;
a vacuum protection pad provided to the vacuum surface;
an annular or arc-shaped concave portion dividing the vacuum surface into a central region located closer to a center of the vacuum surface and an outer circumferential region located on an outer circumferential side; and
radially-extending concave portions formed in the central region, wherein
the vacuum protection pad has through holes in communication with the radially-extending concave portions, and
the vacuum protection pad is bonded to the vacuum surface at the central region excluding the radially-extending concave portions and is unbonded to the vacuum surface in the outer circumferential region.

US Pat. No. 10,460,963

PLASMA PROCESSING METHOD

TOKYO ELECTRON LIMITED, ...

1. A plasma processing method of processing a processing target object, in which an organic film, a mask film and a resist film are stacked in sequence, by plasma, the plasma processing method comprising:a process of supplying a modifying gas, which is a H2 gas, a hydrogen halide gas, or a mixed gas containing a rare gas and a H2 gas or a hydrogen halide gas, into a chamber accommodating therein the processing target object in which a preset pattern is formed on the resist film;
a modifying process of modifying the resist film of the processing target object by plasma of the modifying gas at a processing temperature equal to or less than ?20° C.,
a process of supplying a first processing gas for etching into the chamber; and
a first etching process of etching the mask film with the resist film modified in the modifying process as a mask by plasma of the first processing gas at a processing temperature within a range from 0° C. to 40° C.

US Pat. No. 10,460,960

GAS PANEL APPARATUS AND METHOD FOR REDUCING EXHAUST REQUIREMENTS

APPLIED MATERIALS, INC., ...

1. An apparatus for delivering gases, comprising:a gas stick to deliver to at least a portion of the apparatus at least one gas to be delivered by the apparatus;
a purge module including a purge stick and a plurality of diffusers to distribute an inert gas in at least one portion of the apparatus in which a gas to be delivered by the apparatus is present;
at least one pressure sensor to detect leaks in the apparatus; and
a controller, the controller including a processor and a memory coupled to the processor, the memory having stored therein instructions executable by the processor to configure the controller to:
communicate a signal to cause the purge module to distribute the inert gas in the at least one interior portion of the apparatus;
monitor for leaks in the at least one interior portion of the apparatus using signals received from the at least one pressure sensor; and
in response to a detected leak, communicate a signal to cause the purge module to increase the distribution of the inert gas in at least the portion of the apparatus in which the leak was detected.

US Pat. No. 10,460,950

SUBSTRATE PROCESSING SYSTEM AND SUBSTRATE PROCESSING METHOD

Tokyo Electron Limited, ...

1. A substrate processing system comprising:a memory including a program;
a processor configured to execute the program to operate the substrate processing system;
an etching apparatus configured to supply a gas containing fluorocarbon to generate plasma so as to perform an etching process on a film including silicon formed on a substrate, wherein the etching process is performed by using plasma through a mask formed on the film including silicon;
a film forming apparatus configured to supply a gas containing carbon so as to form a film including carbon on the etched film including silicon, wherein the film forming apparatus is provided separately from the etching apparatus;
the processor is configured to execute the program to cause the etching apparatus to perform:
a first etching step in which the film including silicon is partway etched by using plasma; and
a second etching step in which the film including silicon, on which the film including carbon is formed, is further etched by using plasma,
the processor is further configured to execute the program to cause the film forming apparatus to perform a film forming step in which the film including carbon is formed on the film including silicon on which the first etching step has been performed,
wherein the processor is configured to execute the program to cause the film forming apparatus to further perform a treatment process with any of a single gas of monosilane (SiH4) and a mixed gas containing monosilane after the film forming step and before the second etching step.

US Pat. No. 10,460,947

METHOD FOR POLISHING SILICON WAFER

SHIN-ETSU HANDOTAI CO., L...

1. A method for polishing a silicon wafer, the method comprising:recovering a used slurry containing polishing abrasive grains and obtained from a slurry that had been supplied to the silicon wafer and used for polishing; and
circulating and supplying the recovered used slurry to the silicon wafer to polish the silicon wafer, wherein
a mixed alkali solution containing
a chelating agent and
either or both of a pH adjuster and a polishing rate accelerator is added to the recovered used slurry without adding unused polishing abrasive grains, and the recovered used slurry is circulated and supplied to the silicon wafer to polish the silicon wafer,
and further comprising:
measuring a concentration of the chelating agent in the recovered used slurry by an absorbance measuring method when the used slurry is circulated and supplied;
quantifying the chelating agent in the used slurry based on a result of the measurement; and
setting a mixing condition of the chelating agent in the mixed alkali solution based on a result of the quantification such that the concentration of the chelating agent in the used slurry is kept constant.

US Pat. No. 10,460,946

NATURALLY OXIDIZED FILM REMOVING METHOD AND NATURALLY OXIDIZED FILM REMOVING DEVICE

TOKYO ELECTRON LIMITED, ...

1. A method of removing a natural oxide film formed on a surface of a semiconductor layer containing a compound of indium and an element other than indium as a main ingredient, comprising:supplying a first etching gas which is ?-diketone to the semiconductor layer and heating the semiconductor layer to remove an oxide of the indium constituting the natural oxide film; and
supplying a second etching gas to the semiconductor layer and heating the semiconductor layer to remove an oxide of the element other than indium constituting the natural oxide film.

US Pat. No. 10,460,943

INTEGRATED STRUCTURES HAVING GALLIUM-CONTAINING REGIONS

Micron Technology, Inc., ...

1. An integrated structure, comprising:a conductive gate;
a charge-storage region under the conductive gate;
a tunneling region under the charge-storage region;
a semiconductor-containing channel region under and directly against the tunneling region, the semiconductor-containing channel region comprising monocrystalline silicon and being part of a monocrystalline-silicon substrate that extends laterally outward beyond the charge-storage region along a cross-section; and
wherein the tunneling region includes a dielectric material consisting essentially of SiO2 directly adjacent a gallium-containing material and directly adjacent the semiconductor-containing channel region.

US Pat. No. 10,460,938

METHOD FOR PATTERNING A SUBSTRATE USING A LAYER WITH MULTIPLE MATERIALS

Tokyo Electron Limited, ...

1. A method of patterning a substrate, the method comprising:forming mandrels on a target layer of a substrate, the mandrels being comprised of at least two layers of material, the mandrels including a bottom layer comprised of a first material, and a top layer comprised of a second material different than the first material, the target layer being comprised of a fifth material;
forming sidewall spacers on sidewalls of the mandrels, the sidewall spacers comprised of a third material;
depositing a fill material on the substrate that at least partially fills open spaces defined between the sidewall spacers, the fill material being comprised of a fourth material, wherein the first material, the third material and the fourth material have different etch resistivities compared to each other for one or more particular etch chemistries;
forming a mask on the fill material, the mask defining one or more openings providing uncovered portions of the fill material;
executing an etch process that (i) etches the one or more uncovered portions of the fill material to provide one or more uncovered portions of the top layer of the mandrels, and that (ii) etches the one or more uncovered portions of the top layer of the mandrels, and
subsequent to executing the etch process, executing a chemical-mechanical polishing step that uses the bottom layer of the mandrels as a planarization stop material layer, the chemical-mechanical polishing step removing the third material above a top surface of the bottom layer of the mandrels; and
etching the target layer using the bottom layer and the fill material as a combined etch mask.

US Pat. No. 10,460,933

TWO-STEP PROCESS FOR GAPFILLING HIGH ASPECT RATIO TRENCHES WITH AMORPHOUS SILICON FILM

APPLIED MATERIALS, INC., ...

1. A method for manufacturing a semiconductor device, comprising:positioning a substrate having at least one opening formed in a substrate surface thereof in a processing chamber, wherein the at least one opening is defined by sidewalls and a bottom surface;
conformally depositing a silicon liner layer over the substrate surface and the sidewalls and the bottom surface of the at least one opening;
filling the at least one opening with a flowable silicon film; and
curing the silicon liner layer and the flowable silicon film, wherein the silicon liner layer and the flowable silicon film each comprises amorphous silicon.

US Pat. No. 10,460,932

SEMICONDUCTOR DEVICE WITH AMORPHOUS SILICON FILLED GAPS AND METHODS FOR FORMING

ASM IP Holding B.V., Alm...

1. A method for producing a semiconductor device, comprising:providing in a deposition chamber a substrate having a gap;
depositing an amorphous silicon film onto the substrate having a thickness sufficient to fill the gap, wherein depositing an amorphous silicon film comprises:
heating the substrate to a deposition temperature between 300 and 500° C.; and
providing a feed gas that comprises a first silicon reactant into the deposition chamber, wherein the first reactant deposits silicon forming the amorphous silicon film,
wherein the amorphous silicon film has a hydrogen concentration between 0.1 and 10 at. %,
wherein the amorphous silicon film filling the gap defines voids within the gap; and
reducing a size of, or eliminating, the voids by annealing the amorphous silicon film at a temperature between 500 and 700° C.

US Pat. No. 10,460,928

PROCESS FOR DEPOSITION OF TITANIUM OXYNITRIDE FOR USE IN INTEGRATED CIRCUIT FABRICATION

ASM IP Holding B.V., Alm...

1. A process for depositing a titanium oxynitride thin film comprising:contacting a substrate comprising silicon with a titanium reactant;
subsequently contacting the substrate with a second reactant comprising a plurality of reactive species generated by plasma, wherein the plurality of reactive species comprises nitrogen and oxygen; and
repeating the contacting steps until a titanium oxynitride thin film having a thickness of from about 1 nm to about 50 nm has been formed on the substrate, wherein the titanium oxynitride thin film is deposited at a temperature from 70° C. to 200° C.

US Pat. No. 10,460,923

APPARATUS AND METHOD FOR TREATING SUBSTRATE

SEMES CO., LTD., Chungch...

1. A method for liquid-treating a substrate, comprising:a first treatment liquid supplying operation of supplying a first treatment liquid to a treatment location of the substrate, wherein the first treatment liquid includes hydrofluoric acid; and
a wetting operation of, after the first treatment liquid supplying operation, supplying a wetting liquid onto the substrate, wherein the wetting liquid is water,
wherein the wetting operation includes:
a simultaneous supply operation of supplying the wetting liquid to a first location while the first treatment liquid is supplied, and
wherein the first location is a location spaced apart from the treatment location.

US Pat. No. 10,460,900

X-RAY TUBE DEVICE AND X-RAY CT APPARATUS

Hitachi, Ltd., Tokyo (JP...

1. An X-ray tube device comprising:an anode that is irradiated with an electron beam, thereby emitting X-rays;
a rotary bearing that rotatably supports the anode;
a solid lubrication film which is formed on a front surface of the rotary bearing so as to be mixed with a ferromagnet; and
an attractor that attracts, with a magnetic force, the solid lubrication film that peels off the rotary bearing;
wherein the attractor contains a permanent magnet and the permanent magnet is disposed at a position having a temperature that does not exceed the Curie temperature of the permanent magnet; and
wherein the attractor contains a ferromagnet that is disposed to be in contact with the permanent magnet.

US Pat. No. 10,460,897

MAGNETIC TRIP DEVICE FOR CIRCUIT BREAKER

LSIS CO., LTD., Anyang-s...

1. A magnetic trip device for a circuit breaker, comprising:an actuator coil part that has a plunger configured to move to an advanced position or a retracted position according to the magnetization or demagnetization of a coil;
an output plate that is rotatably provided on the movement path of the plunger to rotate in a first direction by the pressing of the plunger;
a micro switch that has an operation lever portion protruding outwardly and is configured to output an electrical signal indicating a state of the circuit breaker according to whether or not the operation lever portion is pressed;
a switch driving lever mechanism that is configured to rotate to a first position for pressing the operation lever portion or a second position for releasing the operation lever portion so as to open or close the micro switch;
a driving lever bias spring that is provided at a predetermined position to elastically bias the switch driving lever mechanism to rotate to the second position;
an automatic reset mechanism that is configured to press the plunger of the actuator coil part to the retracted position in connection with a main switching shaft of the circuit breaker subsequent to a trip operation; and
a driving lever latch that is configured to rotate to a restraining position for preventing the switch driving lever mechanism from rotating to the first position so as to allow the micro switch to maintain a trip indicating state subsequent to a trip operation even when the plunger is moved to the retracted position by the automatic reset mechanism, and a release position for allowing the switch driving lever mechanism to rotate to the first position, and the driving lever latch is provided adjacent to the switch driving lever mechanism.

US Pat. No. 10,460,892

SINGULATED KEYBOARD ASSEMBLIES AND METHODS FOR ASSEMBLING A KEYBOARD

APPLE INC., Cupertino, C...

1. A keyboard assembly, comprising:a feature plate;
a key assembly including a key mechanism and a keycap, the key mechanism being coupled to the keycap and facilitating translation of the keycap in response to a user input, the key mechanism defining an opening and including a protrusion extending into the opening;
a chassis affixed to the feature plate, the chassis comprising a key assembly retaining feature, the protrusion of the key mechanism being coupled to the key assembly retaining feature.

US Pat. No. 10,460,889

LOCKOUT DEVICE

1. A lockout device comprising a first unit and a second unit; the first unit comprising a hook portion, a middle portion, and a lock portion; said middle portion located between and directly connected to the hook portion and the lock portion; and the second unit comprising a support means and a locking means; the support means connected to the locking means; the locking means disposed substantially parallel to the middle portion of the first unit; a forward element of the locking means being substantially linear; and the locking means closing with the hook portion placing the lockout device in a locked position by holding together a lever lock point of an on/off switch lever and a stub lock point of an off stub of an electrical disconnect box.

US Pat. No. 10,460,870

INDUCTION COIL ASSEMBLY AND WIRELESS POWER TRANSFER SYSTEM

NINGBO WEIE ELECTRONICS T...

1. An induction coil assembly, comprising:at least one substrate, each including at least one through hole;
a first part of a wire of the induction coil assembly wound on a first surface of the substrate; and
a second part of the wire extended onto a second surface of the substrate via one of the through holes of the substrate and wound on the second surface of the substrate
wherein the wire forms an N-turn coil, locations of the windings on the first surface of the substrate and locations of the windings on the second surface of the substrate are mutually staggered with each other up and down.

US Pat. No. 10,460,856

BUS MOUNTS, POWER DISTRIBUTION SYSTEMS, AND METHODS FOR MOUNTING BUSES IN POWER DISTRIBUTION SYSTEMS

SIEMENS INDUSTRY, INC., ...

1. A power distribution system, comprising:a bus bar;
a frame member;
a support block formed from a non-conductive material and having a first side and an opposite second side;
one or more first fasteners extending beyond the second side and mechanically coupled to the bus bar;
one or more second fasteners extending beyond the first side and mechanically coupled to the frame member; and
a first insulator located between the first side of the support block and the frame member, wherein the one or more first fasteners do not extend through the first insulator and the one or more second fasteners extend through the first insulator.

US Pat. No. 10,460,842

INTERACTIVE AND ANALYTICAL SYSTEM THAT PROVIDES A DYNAMIC TOOL FOR THERAPIES TO PREVENT AND CURE DEMENTIA-RELATED DISEASES

UMETHOD HEALTH, INC., Ra...

1. A method for providing a therapy to a patient to improve cognitive health of the patient, the method comprising:using at least one processor and at least one memory for:
receiving patient information including two or more of personal and family background data, pre-existing conditions, current medications, genomic data, and diagnostic information, the diagnostic information relating to biological mechanisms that define dementia-related diseases as a medical condition or risk of dementia-related diseases;
receiving therapy plan information, the therapy plan information comprising a plurality of individual therapy plans, each individual therapy plan specifying an individual biological mechanism targeted for physiological adjustment, variations found in an effect on the targeted biological mechanism as a function of the patient information, and data quantifying a probability of success of the individual therapy plan;
generating an aggregate therapy plan, the aggregate therapy plan targeting adjustment of a plurality of biological mechanisms using a combination of the individual therapy plans, the aggregate therapy plan comprising an aggregate probability reflecting a likelihood of achieving all targeted adjustments;
receiving diagnostic and testing data associated with the patient, the diagnostic and testing data captured after the patient has undergone treatment according to the aggregate therapy plan;
for each individual therapy plan in the aggregate therapy plan:
determining a value corresponding to the individual biological mechanism in the patient based on the received diagnostic and testing data;
performing a comparison of the value to a recommended range for the value, and
based on the comparison, dynamically adjusting the individual therapy plan for the biological mechanism when the value is within the recommended range; and
generating, for the patient, an adjusted aggregate therapy based on the individual therapy plan adjustments;
administering the adjusted aggregate therapy via communicable links to a mobile device of a therapy provider, wherein the adjusted aggregate therapy enables improvement in the cognitive health of the patient; and
adjusting the therapy plan information based on success of the individual therapy plans of the patient and of other patients;
and
further administering the adjusted aggregate therapy by the therapy provider.

US Pat. No. 10,460,840

DIAGNOSTICS-BASED HUMAN HEALTH EVALUATION

JIANGSU HUABEN HEALTH LIF...

1. A method of evaluating a health condition of a patient based on a diagnostic aspect of the patient, comprising:obtaining, by a diagnostics measurement device, a measurement value of the diagnostic aspect of the patient;
calculating, by a processor communicatively coupled to the diagnostics measurement device, a relative ratio by dividing the measurement value by a standard average value of the diagnostic aspect;
calculating, by the processor, a health deviation by subtracting a baseline value from the relative ratio; and
designating, by the processor, a health indicator based on the health deviation, the health indicator indicating the health condition of the patient,
wherein:
the diagnostics measurement device comprises a blood test device,
the measurement value is a result of a blood test performed by the blood test device on the patient,
the standard average value comprises an arithmetic mean of a standard upper limit and a standard lower limit that are medically defined for the diagnostic aspect,
the baseline value comprises an arithmetic sum of a medium value, a variation upper limit, a variation lower limit, and a tier size, and
the health indicator is a rounded integer of a ratio of the health deviation to the tier size.

US Pat. No. 10,460,836

MEDICAL DEVICE SYSTEM AND METHOD FOR ESTABLISHING WIRELESS COMMUNICATION

1. A system for establishing wireless communication between at least one medical device having a predefined unique identification (ID) and at least one communication unit having a primary two-way wireless data communication interface, the system comprising:means for wirelessly performing primary two-way data communication including receiving and transmitting information between the medical device and the communication unit;
secondary one-way wireless communication means for communicating the predefined unique identification (ID) of the medical device through the secondary one-way wireless communication, wherein the secondary one-way wireless communication means includes means for non-encrypted wireless communication, and the means for wirelessly performing primary two-way data communication comprises an encrypted secure primary two-way wireless data communication interface;
means for ensuring that the primary two-way wireless data communication can be carried out if and only if the communication unit positively and in advance has identified the predefined unique identification (ID) of the medical device;
wherein the medical device comprises an activation member that is configured to be triggered by mechanical activation of the activation member, and secondary communication means for sending at least one signal to the communication unit upon the activation member being triggered, wherein the secondary one-way wireless communication means is for sending the at least one signal in real time, whereby the medical device is activated and sends at least one response signal to the secondary one-way wireless communication means to determine said predefined unique identification of the medical device; and
wherein the communication unit comprises means for providing interactive training of a user of the medical device on a real-time basis.

US Pat. No. 10,460,834

SYSTEMS AND METHODS FOR FACILITATING HEALTH RESEARCH USING A PERSONAL WEARABLE DEVICE WITH RESEARCH MODE

Apple Inc., Cupertino, C...

1. A wearable device having an associated user ID, the device comprising:one or more sensors adapted for detecting one or more health parameters of a user when the device is worn by the user;
a wireless communication link adapted for near field/local communication with one or more computing devices including communications for pairing with the one or more computing devices and communications for transmitting one or more health parameters to the one or more computing devices;
user interface for receiving user input and for outputting information indications; and
a control unit for controlling operation of the wearable device in differing modes including:
a standard mode in which the wearable device pairs and communicates with at least one computing device associated with the user ID when within a wireless communication range of the at least one computing device to facilitate communication of a plurality of health data comprising detections of the one or more health parameters obtained from the one or more sensors, and
a health research mode in which the wearable device communicates by secure authenticated communication with at least one other computing device associated with a third party ID associated with a health researcher of a health research study in which the user is a participant, wherein in the health research mode, the wearable device communicates a first set of health data of the plurality of health data that is relevant to the health research study, wherein the communication of the first set of health data is pre-authorized by the user.

US Pat. No. 10,460,826

TEST METHODS OF SEMICONDUCTOR DEVICES AND SEMICONDUCTOR SYSTEMS USED THEREIN

SK hynix Inc., Icheon-si...

1. A semiconductor system comprising:a medium controller configured to output an address that is sequentially counted in a test mode, configured to sense levels of data corresponding to the address in the test mode to determine if the data has a row error or a chip error, and configured to change a combination of a host address to generate and store a spare address if a combination of the address corresponds to the chip error in the test mode; and
a semiconductor module configured to include a plurality of semiconductor devices,
wherein each of the semiconductor devices comprises a spare area and a redundancy area,
wherein the semiconductor module repairs the address to output the data from the redundancy area of a chip if a combination of the address corresponds to the row error, and
wherein the semiconductor module outputs the data from the spare area selected by the spare address of the chip if a combination of the address corresponds to the chip error,
wherein the row error corresponds to an error which occurs in any one of the plurality of semiconductor devices; and
wherein the chip error corresponds to an error which occurs in at least two of the plurality of semiconductor devices.

US Pat. No. 10,460,823

TEST CONTROL CIRCUIT, SEMICONDUCTOR MEMORY APPARATUS AND SEMICONDUCTOR SYSTEM USING THE TEST CONTROL CIRCUIT

SK hynix Inc., Icheon-si...

1. A test control circuit comprising:a control signal generation circuit configured to generate a normal set signal based on a test command signal in a normal mode, and generate a fast set signal regardless of the test command signal in a fast access mode; and
a test mode generation circuit configured to generate a normal test mode signal based on a mode signal, which is generated based on the test command signal, and the normal set signal in the normal mode, and generate a fast test mode signal based on the mode signal and the fast set signal in the fast access mode.

US Pat. No. 10,460,808

MEMORY DEVICE AND PROGRAMMING OPERATION METHOD THEREOF WITH DIFFERENT BIT LINE VOLTAGES

MACRONIX INTERNATIONAL CO...

1. An operation method for a memory device having a memory array including a plurality of memory cells, a plurality of word lines and a plurality of bit lines, the operation method for the memory device including:applying a program voltage to at least a selected word line of the word lines; and
during a high level period of the program voltage, based on respective locations of a plurality of selected bit lines of the bit lines on the word lines, generating and applying a plurality of different bit line voltages to the selected bit lines; the plurality of different bit line voltages generated and applied to the selected bit lines have different rising edges; and in generating the different bit line voltages, the bit line voltage having an earliest rising edge and a highest bit line voltage is generated for applying to a plurality of first selected bit lines of the selected bit lines, which are closest to a head of the word lines, and the plurality of the different bit line voltages are not corresponding to the program voltage.

US Pat. No. 10,460,801

MULTI-LEVEL PHASE CHANGE DEVICE

WESTERN DIGITAL TECHNOLOG...

1. A method for programming a memory cell, comprising:changing the memory cell to a first resistance state by providing a first voltage to the memory cell; and
changing the memory cell to a second resistance state by providing a second voltage to the memory cell, wherein the memory cell comprises a first phase change material layer separated from a second phase change material layer by a diffusion barrier layer wherein at least one of the first phase change material layer and the second phase change material layer comprises any of selenium tellurium (SeTe), silicon tellurium (SiTe), antimony selenide (SbSe), tin selenide (SnSe), tin tellurium (SnTe), tin antimony (SnSb), germanium antimony (GeSb) and silicon antimony (SiSb), wherein the first phase change material layer and the second phase change material layer comprise different alloys of the same phase change material, wherein altering a resistance state of the memory cell through application of the first voltage comprises setting the memory cell to a first resistance state, and altering the resistance state of the memory cell through application of the second voltage comprises transitioning the memory cell from the first resistance state to a second resistance state.

US Pat. No. 10,460,799

METHOD OF READING RESISTIVE MEMORY DEVICE

SK hynix Inc., Icheon-si...

1. A method of reading a resistive memory device comprising:preparing a memory cell including a selection element and a variable resistance element, the selection element exhibiting a snap-back behavior on a current-voltage sweep curve for the memory cell;
determining first and second read voltages to be applied to the memory cell within a voltage range in which the selection element maintains a turned-on state, the second read voltage being lower than the first read voltage and the second read voltage being selected in a voltage range in which the selection element exhibits the snap-back behavior;
applying the first read voltage to the memory cell to measure a first cell current;
applying the second read voltage to the memory cell to measure a second cell current; and
determining a resistance state stored in the memory cell based on the first cell current and the second cell current.

US Pat. No. 10,460,798

MEMORY CELLS HAVING A PLURALITY OF RESISTANCE VARIABLE MATERIALS

Micron Technology, Inc., ...

1. A method of forming memory cells, the method comprising:forming a first plug material and a second plug material;
forming a material stack on a portion of the first plug material and a portion of the second plug material, wherein the material stack includes a plurality of resistance variable materials separated by respective dielectric materials;
forming a first conductive material on the first plug material, the first conductive material serving as a first conductive contact for the plurality of resistance variable materials of a first memory cell;
forming a second conductive material that serves as a second conductive contact for the plurality of resistance variable materials of both the first memory cell and an adjacent memory cell and is separated from the first plug material by a dielectric material, wherein the second conductive material is formed subsequent to forming the first conductive material; and
forming a third conductive material on the second plug material, the third conductive material serving as a first conductive contact for the plurality of resistance variable materials of the adjacent memory cell.

US Pat. No. 10,460,788

MEMORY CELL AND METHODS THEREOF

FERROELECTRIC MEMORY GMBH...

1. A memory cell, comprising:a channel region;
a gate isolation structure disposed over the channel region, wherein the gate isolation structure has a planar shape;
a first electrode structure disposed over the gate isolation structure, wherein the first electrode structure has a concave shape;
at least one remanent-polarizable layer disposed over the first electrode structure, wherein the at least one remanent-polarizable layer has a concave shape;
a second electrode structure disposed over the at least one remanent-polarizable layer;
wherein the gate isolation structure and the first electrode structure form a first lateral interface,
wherein the first electrode structure and the at least one remanent-polarizable layer form a second lateral interface,
wherein a lateral dimension of the second lateral interface is less than a lateral dimension of the first lateral interface, and
wherein a width of the first electrode structure is substantially the same as a width of the gate isolation structure.

US Pat. No. 10,460,783

MAGNETIC STORAGE DEVICE

Toshiba Memory Corporatio...

1. A magnetic storage device comprising:a magnetic wire including a linear magnetic body having first and second magnetic domains whose magnetization directions are variable;
a magnetoresistance element having a first resistance according to the magnetization direction of the first magnetic domain or a second resistance according to the magnetization direction of the second magnetic domain; and
a read circuit that compares the first resistance of the magnetoresistance element with the second resistance of the magnetoresistance element,
wherein the read circuit outputs first data when the first resistance and the second resistance correspond to the same low or high resistance state and outputs second data when the first resistance and the second resistance correspond to different low/high resistance states.

US Pat. No. 10,460,782

INTEGRATED CIRCUITS HAVING SINGLE STATE MEMORY REFERENCE CELLS AND METHODS FOR OPERATING THE SAME

GLOBALFOUNDARIES INC., G...

19. An integrated circuit comprising:a plurality of operational magneto-resistive random access memory (MRAM) cells arranged in an array of rows and columns; and
a plurality of read circuits, wherein each read circuit is associated with a respective MRAM cell and comprises:
an operational power supply node coupled to an operational ground node by an operational bit line, wherein each respective operational MRAM cell is coupled to the operational bit line between the operational power supply node and the operational ground node;
a reference power supply node coupled to a reference ground node by a reference bit line, wherein the reference power supply node is independent of the operational power supply node to apply a constant operational bias current to the operational bit line while a reference bias current is applied to the reference bit line and is scanned from an initial value through intermediate values to an end value;
a reference memory cell coupled to the reference bit line between the reference power supply node and the reference ground node; and
a sense amplifier coupled to the operational bit line between the operational power supply node and the selected operational memory cell and coupled to the reference bit line between the reference power supply node and the reference memory cell.

US Pat. No. 10,460,778

PERPENDICULAR MAGNETIC TUNNEL JUNCTION MEMORY CELLS HAVING SHARED SOURCE CONTACTS

SPIN MEMORY, INC., Fremo...

1. A magnetic device, comprising:a plurality of perpendicular magnetic tunnel junction (p-MTJ) cells, each p-MTJ cell having a transistor and a magnetic tunnel junction (MTJ) sensor, wherein each of the transistors includes a drain terminal, a source terminal, and a gate terminal, wherein each of the p-MTJ cells has a cylindrical shape;
a first common word line coupled to the gate terminal of each transistor in a first subset of the plurality of p-MTJ cells;
a first common bit line coupled to a first end of each MTJ sensor in a second subset of the plurality of p-MTJ cells, wherein a second end of each of the MTJ sensors in the second subset is coupled to the source terminal of each respective transistor in the second subset; and
a first common source line coupled to the drain terminal of each transistor in the first subset.

US Pat. No. 10,460,774

APPARATUS AND METHOD CAPABLE OF REMOVING DUPLICATION WRITE OF DATA IN MEMORY

SK hynix Inc., Gyeonggi-...

1. An apparatus for controlling memory, the apparatus comprising:a memory device; and
a controller functionally coupled to the memory device;
a deduplication table for storing compressed data, a physical block address of the memory device in which non-compressed data corresponding to the compressed data has been written and a count value indicative of a write number of the data,
wherein the controller is suitable for:
compressing program data of a logical block address received in a data write operation;
searching for the compressed data in the deduplication table;
if the compressed data is new, writing the program data in the physical block address of the memory device; and
registering a new entry comprising the compressed data and the physical block address with the deduplication table, the compressed data comprising a hash value obtained by a hash algorithm,
wherein the controller is suitable for:
converting the program data with the logical block address into a hash value;
reading data stored in the physical block address of the memory device mapped to a retrieved hash value if the hash value is searched for in the deduplication table;
comparing the program data with the read data;
assigning another physical block address for writing the program data in the memory device if, as a result of the comparison, it is determined that the program data and the read data are different;
writing the program data in the assigned another physical block address of the memory device; and
additionally registering a new entry comprising the hash value and said another physical block address with the deduplication table, and
wherein the controller is suitable for:
selecting the physical block address mapped to a hash value having a greatest counter value if data is searched for in the deduplication table;
reading data written in the physical block address of the memory device;
selecting another physical block address mapped to a hash value having a counter value of next priority if read data is different from the program data; and
reading data written in said another physical block address of the memory device.

US Pat. No. 10,460,762

CANCELLING ADJACENT TRACK INTERFERENCE SIGNAL WITH DIFFERENT DATA RATE

Seagate Technology LLC, ...

1. An apparatus comprising:a circuit configured to:
receive first underlying data corresponding to a first signal with a first rate;
receive a second signal with a second rate corresponding to second underlying data;
interpolate the first underlying data to generate a plurality of interpolated signals;
determine, for the first signal, a first channel pulse response shape with the first rate;
determine an interference component signal based on the plurality of interpolated signals and the first channel pulse response shape; and
cancel interference in the second signal using the interference component signal to generate a cleaned signal.

US Pat. No. 10,460,760

SHINGLED MAGNETIC RECORDING STORAGE SYSTEM

SEAGATE TECHNOLOGY LLC, ...

1. A method comprising:determining that an off-track write has occurred during writing data to a shingled magnetic recording (SMR) band in a storage device;
identifying unsafe written data in response to determining that the off-track write has occurred;
determining that caching space is available upon identifying the unsafe written data;
continue writing data to the SMR band without a write retry upon determining that caching space is available; and
caching exclusively the unsafe written data to the determined available caching space.

US Pat. No. 10,460,756

MAGNETIC TAPE DEVICE AND HEAD TRACKING SERVO METHOD EMPLOYING TMR ELEMENT SERVO HEAD AND MAGNETIC TAPE WITH CHARACTERIZED MAGNETIC LAYER

FUJIFILM Corporation, To...

1. A magnetic tape device comprising:a magnetic tape; and
a servo head,
wherein the servo head is a magnetic head including a tunnel magnetoresistance effect type element as a servo pattern reading element,
the magnetic tape includes a non-magnetic support, and a magnetic layer including ferromagnetic powder and a binding agent on the non-magnetic support,
the magnetic layer includes a servo pattern,
a center line average surface roughness Ra measured regarding a surface of the magnetic layer is equal to or smaller than 2.0 nm,
a logarithmic decrement acquired by a pendulum viscoelasticity test performed regarding the surface of the magnetic layer is equal to or smaller than 0.050, and
?SFD in a longitudinal direction of the magnetic tape calculated by Expression 1 is equal to or smaller than 0.50,
?SFD=SFD25° C.?SFD?190° C.  Expression 1
in Expression 1, the SFD25° C. is a switching field distribution SFD measured in a longitudinal direction of the magnetic tape at a temperature of 25° C., and the SFD?190° C. is a switching field distribution SFD measured in a longitudinal direction of the magnetic tape at a temperature of ?190° C.

US Pat. No. 10,460,751

STRIPE HEIGHT LAPPING CONTROL STRUCTURES FOR A MULTIPLE SENSOR ARRAY

WESTERN DIGITAL (FREMONT)...

1. A magnetic read transducer comprising:a first read sensor;
a second read sensor;
a third read sensor;
a first electronic lapping guide associated with the first read sensor to control a stripe height of the first read sensor;
a second electronic lapping guide associated with the second read sensor to control the stripe height of the second read sensor; and
a third electronic lapping guide associated with the third read sensor to control the stripe height of the third read sensor,
wherein the first electronic lapping guide is connected to a common ground connector, and wherein the third electronic lapping guide is connected to a common pad.

US Pat. No. 10,460,742

DIGITAL FILTERBANK FOR SPECTRAL ENVELOPE ADJUSTMENT

Dolby International AB, ...

1. An apparatus for processing an audio signal, the apparatus comprising:an input interface for receiving real-valued time-domain samples;
a digital filterbank including an analysis part and a synthesis part, wherein the analysis part converts the real-valued time-domain samples to complex-valued subband samples, and the synthesis part converts the complex-valued subband samples to time-domain output samples;
a first phase shifter for shifting a phase of the complex-valued subband samples by an amount;
a spectral envelope adjuster for modifying at least a portion of a spectral envelope of the audio signal by applying gains to the complex-valued subband samples;
a second phase shifter for unshifting a phase of the complex-valued subband samples by the amount; and
an output interface for outputting the time-domain output samples,
wherein the analysis part includes Ma=32 analysis filters formed by complex-exponential modulation of a prototype filter having a length of N=640, and the analysis part further includes a decimator for maximally decimating the real-valued time-domain input samples,
wherein the synthesis part includes Ms=64 synthesis filters formed by complex-exponential modulation of the prototype filter, and the synthesis part further includes an interpolator for interpolating the complex-valued subband samples,
wherein the amount of shifting and unshifting is chosen to reduce a complexity of the digital filterbank,
wherein the digital filterbank has a system delay D that represents a latency of a signal passing through the analysis part followed by the synthesis part, and D is smaller than the prototype filter length N, and
wherein the apparatus is implemented with one or more hardware elements.

US Pat. No. 10,460,739

POST-QUANTIZATION GAIN CORRECTION IN AUDIO CODING

TELEFONAKTIEBOLAGET LM ER...

1. A gain adjustment method, performed by a gain adjustment apparatus, in decoding an audio signal that has been encoded with separate gain and shape representations, said method comprising:estimating an accuracy measure of the shape representation for a frequency band of the audio signal, wherein the shape representation encodes a shape vector comprising coefficients of the audio signal for the frequency band, and wherein the shape vector has been encoded using a pulse vector coding scheme where pulses may be added on top of each other to form pulses of different height, and the accuracy measure is based on the number of pulses used for encoding the shape vector and a height of the maximum pulse in the shape representation;
determining, based on the estimated accuracy measure, a gain correction; and
adjusting the gain representation for the frequency band based on the determined gain correction.

US Pat. No. 10,460,730

ANNOUNCEMENT SIGNALING ON BOARD AN AIRCRAFT

AIRBUS OPERATIONS GMBH, ...

1. A method of signaling speech signal related text messages on board an aircraft, wherein the method comprises:providing a speech signal related to an announcement to passengers of the aircraft;
obtaining a text message containing text corresponding to spoken words of the speech signal by applying speech recognition to the speech signal;
determining one or more mobile devices to which the text message is to be signaled as recipients of the text message; and
signaling the text message to the one or more mobile devices determined as the recipients of the text message on board the aircraft by transmitting the text message in multicast,
wherein the step of determining the one or more mobile devices comprises
determining one or more of the mobile devices on which a respective application is installed;
wherein the method is carried out by an apparatus on board the aircraft; and
wherein said providing a speech signal comprises generating the speech signal in real time on board the aircraft;
wherein the one or more mobile devices determined as the recipients of the text message are brought on board the aircraft by the passengers of the aircraft,
wherein the method comprises detecting a preferred language for each of the one or more mobile devices determined as recipients of the text message based on information related to the respective mobile device and the step of signaling comprises transmitting the text message containing text in the detected preferred language;
wherein said information related to the respective mobile device that is used to detect the preferred language comprises at least one of:
information about a Subscriber Identity Module, SIM, card of the respective mobile device;
information about a telephone number of the respective mobile device; or
information about an operating system running on the respective mobile device.

US Pat. No. 10,460,728

EXPORTING DIALOG-DRIVEN APPLICATIONS TO DIGITAL COMMUNICATION PLATFORMS

Amazon Technologies, Inc....

5. A method, comprising:receiving a launch condition associated with a dialog-driven application from a user, wherein the dialog-driven application is implemented in an application management service; and
causing the launch condition to be registered with one or more digital communication platforms distinct from the application management service, wherein the registration makes the dialog-driven application at the application management service accessible via the one or more digital communication platforms, wherein the registration configures individual ones of the one or more digital communication platforms to perform:
detecting the launch condition in a natural language input to the digital communication platform; and
responsive to the detection, causing data of further natural language input to be routed according to the registration from the digital communication platform to the application management service.

US Pat. No. 10,460,722

ACOUSTIC TRIGGER DETECTION

Amazon Technologies, Inc....

1. A method for selective transmission of sampled audio data to a speech processing server according to detection of an acoustic trigger being represented in the audio data, the method comprising:receiving sampled audio data based on an acoustic signal acquired at one or more microphones in an acoustic environment;
processing the sampled audio data to locate instances of the acoustic trigger in the acoustic signal, the processing of the sampled audio data including
computing a sequence of feature vectors from the sampled audio data, each feature vector in the sequence being associated with a time in the acoustic signal and representing spectral characteristics of the acoustic signal in a vicinity of said time,
for each time of a succession of times, assembling a set of feature vectors each corresponding to a time offset at predetermined offset from said time, providing the set of feature vectors as an input to an artificial neural network, and computing an output from the neural network corresponding to said time, and
processing the outputs from the neural network for the succession of times to determine time locations corresponding to occurrences of the trigger in the acoustic signal;
selecting portions of the sampled audio data for transmission to the speech processing server according to locations of the located instances of the trigger;
transmitting the selected portions of the sampled audio data to the speech processing server;
wherein computing the output of the neural network includes performing a series of data transformations, multiple of the data transformations each including
forming an input to the transformation as a combination of an output from a prior transformation in the series and one or more time delayed outputs from the prior transformations, the input having a number of input data elements,
computing intermediate data elements from the input data elements as a linear transformation of the input data elements, the intermediate data elements having a number of intermediate elements smaller than the number of input data elements, and
determining output elements of the data transformation as a linear transformation of the intermediate data elements followed by an element-wise non-linear transformation, the output elements having a number of output elements greater than the number of intermediate elements.

US Pat. No. 10,460,713

ACOUSTIC WAVE CLOAKING METHOD AND DEVICE CONSIDERING GENERALIZED TIME DEPENDENCY

University of Seoul Indus...

1. A method of cloaking an acoustic wave, comprising:transforming an acoustic propagation mathematical model, predetermined for propagation of an acoustic wave, into an acoustic wave cloaking mathematical model corresponding to an electromagnetic wave mathematical model predetermined for an electromagnetic wave and including a time variable for time dependency in a 4D coordinate system, based on a correlation between the acoustic propagation mathematical model and the electromagnetic wave mathematical model;
obtaining a target characteristic of a meta-material by using the acoustic wave cloaking mathematical model; and
blocking a region including a target object, from an acoustic wave by disposing the meta-material having the obtained target characteristic to surround the region,
wherein a target characteristic of the meta-material is calculated based on a space-time meta-material analysis based on the General Theory of the Relativity,
wherein an empty space of a physical space corresponding to the target region to be hidden with the target object is transformed into a virtual space that has a point the empty space of the physical space is transformed thereto, so that the empty space of the physical space is hidden from external acoustic waves, and
where the transformation of the physical space into the virtual space is obtained using covariant Maxwell's equations based on the General Theory of the Relativity, and using a coordinate transformation equation according to a spatial topology of the target region and the meta-material.

US Pat. No. 10,460,709

ENHANCED SYSTEM, METHOD, AND DEVICES FOR UTILIZING INAUDIBLE TONES WITH MUSIC

THE INTELLECTUAL PROPERTY...

1. A method for utilizing inaudible tones for music, comprising:initiating music with enhanced features;
determining whether inaudible tones including information or data are associated with a portion of the music; and
playing the music associated with the inaudible tone including the inaudible tones associated with the portion of the music, wherein the inaudible tones are utilized to display notes associated with the music in time with the tempo of the music.

US Pat. No. 10,460,705

PICK GRIPPING SYSTEM

1. A pick gripping system comprising:a bottom surface formed on a body, the body having a left side, a right side, a proximal end, and a distal end;
an intermediate surface formed on the body; and
a top surface formed on the body, the top surface coupled to the intermediate surface with upward extending sides therebetween, the upward extending sides and the top surface forming a first lateral ridge extended from the left side of the body to the right side of the body, the upward extending sides and the top surface forming a second lateral ridge extended from the left side of the body to the right side of the body, and the first lateral ridge and the second lateral ridge forming a thumb recess therebetween.

US Pat. No. 10,460,702

DISPLAY PIXEL OVERDRIVE SYSTEMS AND METHODS

Apple Inc., Cupertino, C...

1. An electronic device with a display, the electronic device comprising:a frame buffer configured to store a compressed display frame that is a preceding display frame to a current display frame;
a threshold engine configured to determine whether to perform an overdrive operation for the current display frame based on a compression error for the compressed preceding display frame and based on a comparison of an averaged version of the current display frame that is an original uncompressed version to a decompressed version of the compressed preceding display frame; and
a boost engine configured to generate, if it is determined by the threshold engine that the overdrive operation is to be performed for the current display frame, an overdriven output frame by applying a boost value to the current display frame that is an original uncompressed version, wherein the boost value is based on a comparison of the current display frame that is an original uncompressed version to the decompressed version of the compressed preceding display frame.

US Pat. No. 10,460,689

GATE DRIVING CIRCUIT

SHENZHEN CHINA STAR OPTOE...

1. A gate driving circuit, comprising multi-stages of gate driving units in series connection with one another,wherein each stage of gate driving unit is configured to output a scanning signal through an output end thereof according to a scanning signal output by a previous stage of gate driving unit, a scanning signal output by a next stage of gate driving unit, and a clock signal; and
wherein each stage of gate driving unit comprises:
an input control module, configured to be controlled by the scanning signal output by the previous stage of gate driving unit so as to control an electric potential of a first node;
an output control module, connected to the first node, and configured to control an electric potential of an output end of a present stage of gate driving unit according to the electric potential of the first node;
a pull-down module, connected to the output control module, and configured to pull down the electric potential of the output end of the present stage of gate driving unit according to an electric potential of a second node;
a pull-down maintenance module, connected to the pull-down module, and configured to maintain the electric potential of the second node during a non-scanning period so that the electric potential of the output end of the present stage of gate driving unit is maintained in a negative electric potential; and
a compensation module, connected to the pull-down maintenance module and the first node, and configured to maintain the electric potential of the first node in a negative electric potential during the non-scanning period.

US Pat. No. 10,460,681

METHOD AND APPARATUS FOR ADJUSTING GRAY-SCALE CHROMATIC ABERRATION FOR DISPLAY PANEL AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A method for adjusting gray-scale chromatic aberration for a display panel, comprising:inputting a data signal of a test picture to sub-pixels of the display panel, for causing the display panel to display the test picture;
collecting optical parameters of respective regions in the test picture;
comparing the optical parameter of each region in the test picture with an optical parameter of a standard picture; and
adjusting the data signal inputted to the sub-pixels such that a difference between the optical parameter of each region in the test picture and the optical parameter of the standard picture falls within a predetermined range,
wherein the optical parameter comprises a color coordinate and its corresponding brightness;
wherein the method further comprises adjusting a gray-scale color coordinate of the test picture in response to a difference between the color coordinate of each region in the test picture and the color coordinate of the standard picture has an absolute value smaller than a first predetermined threshold.

US Pat. No. 10,460,669

SYSTEM AND METHODS FOR THERMAL COMPENSATION IN AMOLED DISPLAYS

Ignis Innovation Inc., W...

1. A semiconductor device, comprising:a plurality of pixels arranged in an array, the plurality of pixels including one or more first pixels, one or more second pixels different from the one or more first pixels, and a pixel different from the one or more first pixels and the one or more second pixels; and
a controller for programming the pixel to control the brightness of the pixel, and for estimating a temperature of the pixel at a first time with use of one or more pixel temperatures determined only for the one or more first pixels, and for estimating a temperature of the pixel at a second time different from the first time with use of one or more pixel temperatures determined only for the one or more second pixels.

US Pat. No. 10,460,661

DISPLAY WITH LIGHT-EMITTING DIODES

Apple Inc., Cupertino, C...

1. A pixel circuit comprising:a positive power supply terminal;
a ground power supply terminal;
a light-emitting diode (LED) that is connected between the positive power supply terminal and the ground power supply terminal;
a drive transistor that is connected in series with the light-emitting diode;
an emission transistor that is connected in series with the drive transistor and the light-emitting diode, wherein the emission transistor is interposed between the light-emitting diode and the drive transistor; and
a semiconducting-oxide switching transistor that is coupled to a gate of the drive transistor.

US Pat. No. 10,460,653

SUBPIXEL WEAR COMPENSATION FOR GRAPHICAL DISPLAYS

MICROSOFT TECHNOLOGY LICE...

1. A method of compensating for subpixel wear in a graphical display device having a plurality of color-specific subpixels spatially distributed across a display region of the graphical display device, the method comprising:for each color-specific subpixel of a subset of the plurality of color-specific subpixels in which an input display value is generated for each color-specific subpixel of the subset by a host computing device connected to the graphical display device:
sampling one or more display signals directed to the color-specific subpixel to obtain a time-series of sampled values;
storing, in non-volatile storage, compensation data for the color-specific subpixel derived from the time-series of sampled values;
receiving the input display value generated by the host computing device:
applying the compensation data to the input display value to obtain a compensated display value;
driving the color-specific subpixel based on the compensation data, including driving the color-specific subpixel with a compensated display signal based on the compensated display value.

US Pat. No. 10,460,650

DISPLAY DEVICE, DRIVING METHOD THEREOF, AND NON-TRANSITORY COMPUTER READABLE RECORDING MEDIUM

SAMSUNG ELECTRONICS CO., ...

1. A display device for displaying an image frame during a scan period, the display device comprising:a display comprising a plurality of light-emitting diode (LED) lines;
a scan driver; and
a processor configured to:
based on the image frame being received, control the scan driver to supply a power to the plurality of LED lines during a first sub-period among a plurality of sub-periods into which the scan period is divided, and
control the scan driver to firstly supply, during a second sub-period among the plurality of sub-periods, the power to a LED line that is different than a LED line to which the power is firstly supplied during the first sub-period or a LED line to which the power is lastly supplied during the first sub-period, from among the plurality of LED lines,
wherein the second sub-period is next to the first sub-period among the plurality of sub-periods.

US Pat. No. 10,460,645

POWER SUPPLYING SYSTEM AND POWER MODULE

SAMSUNG ELECTRONICS CO., ...

1. A signal processing system comprising:a sub apparatus; and
a main apparatus configured to supply power to a display apparatus and the sub apparatus,
wherein the sub apparatus is configured to supply power to an external apparatus based on information being received from the external apparatus, supply power transformed into a voltage corresponding to the information to the external apparatus,
wherein the sub apparatus is configured to transmit an image signal, received from the external apparatus, to the main apparatus, and
wherein the main apparatus is configured to decode the image signal and transmit the decoded image signal to the display apparatus.

US Pat. No. 10,460,641

IMAGE PROCESSING CIRCUIT AND DISPLAY DEVICE USING THE HISTOGRAM ANALYZER TO PERFORM A DIFFERENTIAL SHIFT AND EXTENSION SHIFT OF IMAGE DATA GRAY LEVEL TO ADJUST GRAY LEVEL RESPECT TO THE BRIGHTNESS IMAGE LEVEL

LG DISPLAY CO., LTD., Se...

7. A display device comprising:a display panel for displaying an image using a light generated from a light emitting device; and
an image processing circuit that processes image data to be displayed the display panel,
wherein the image processing circuit comprises:
a perceived brightness calculator that calculates a perceived brightness picture level indicating a level of perceived brightness of an input image of a single frame;
a differential extension unit that extends gray levels of the input image to higher gray levels by applying a differential gain to each gray level of the input image based on the perceived brightness picture level and outputs a modified image data having a histogram extended to the higher gray levels to display an image; and
an overdriver that overdrives the light emitting device disposed in a region for implementation of high gray levels higher than or equal to a threshold gray level in the gray levels of the input image extended to the higher gray levels,
wherein the light emitting device comprises a plurality of light sources contained in a plurality of light source blocks disposed on a rear surface of a liquid display panel employed as the display panel,
wherein, when the input image of the single frame contains image data of the high gray levels higher than or equal to the threshold gray level, the overdriver generates a control signal to turn on a larger number of light sources or turn on the light sources for a longer duration than inverse case, and
wherein the overdriver applies a typical gamma curve for implementation of first peak luminance to low/middle gray levels higher than or equal to a threshold gray level in the image extended to the higher gray levels, and applies a gamma curve increasing linearly from luminance of the threshold gray level to second peak luminance higher than the first peak luminance to the high gray levels to modulate data.

US Pat. No. 10,460,640

DISPLAY APPARATUS AND METHOD OF OPERATING THE SAME

SAMSUNG DISPLAY CO., LTD....

1. A display apparatus comprising:a timing controller configured to generate first output image data based on first input image data and a first gamma lookup table, and configured to generate second output image data based on second input image data and a second gamma lookup table; and
a display panel configured to operate based on the first output image data during a first duration, and configured to operate based on the second output image data during a second duration subsequent to the first duration,
wherein the first and second gamma lookup tables correspond to a same region of the display panel, and the first and second gamma lookup tables differing to cause luminance of an image based on the first gamma lookup table to differ from luminance of an image based on the second gamma lookup table and to cause a residual direct current (DC) voltage in the display panel to decrease prior to saturation of the residual DC voltage.

US Pat. No. 10,460,637

IMAGE PROJECTION APPARATUS

CANON KABUSHIKI KAISHA, ...

1. An image projection apparatus comprising:a light modulation element; and
a pixel shift unit configured to shift an optical path of light from a pixel in the light modulation element and to shift a position on a projection surface of a projection pixel formed on the projection surface by a projection optical system with the light,
wherein the pixel shift unit includes:
an optical element configured to shift the optical path in one direction among directions orthogonal to an optical axis from the light modulation element to the projection optical system; and
a rotating unit configured to rotate the optical element around an axis that is parallel to an optical axis direction, so as to change a shift direction of the optical path by the optical element.

US Pat. No. 10,460,633

PIXEL ARRAY, DISPLAY SUBSTRATE AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

3. A pixel array, comprising a plurality of pixel units, wherein each pixel unit comprises a plurality of windmill-shaped sub-pixels,each windmill-shaped sub-pixel is configured to display one primary color,
each windmill-shaped sub-pixel comprises a plurality of separated parts which are disposed around a center position of this windmill-shaped sub-pixel, and the plurality of separated parts are disposed apart from each other,
between two adjacent separated parts of each windmill-shaped sub-pixel, a separated part of an adjacent windmill-shaped sub-pixel is disposed, the pixel array, further comprises:
a plurality of switching components, and a plurality of gate lines and a plurality of data lines,
the plurality of gate lines and the plurality of data lines are intersected with each other and are electrically connected with the plurality of switching components respectively,
each windmill-shaped sub-pixel comprises a corresponding switching component to collectively control a state of working of the plurality of separated parts of this windmill-shaped sub-pixel.

US Pat. No. 10,460,628

TILE MAP SERVICE DEVICE AND METHOD

Electronics and Telecommu...

1. A tile map service (TMS) device, comprising:a data storage that stores map layers that have different map types, map data of an image tile form having a level of detail (LOD) structure of each of the map layers, and a tile map in which image tile maps of a plurality of map layers are merged; and
a processor that:
receives map request information including two or more map types, an LOD level, and arbitrary map coordinates from a client,
checks whether a previously merged tile map is present in the cache of the data storage using the map types, the LOD level, and the map coordinates included in the map request information by searching a cache structure of the storage,
generates a new tile map based on the map request information in which the image tile maps of the plurality of map layers are merged when the result of the checking is that the tile map corresponding to the map request information is not present,
caches the generated new tile map in the data storage corresponding to the LOD level, the merged map type, and the map coordinates, and
provides a tile map corresponding to the map request information to the client,
wherein each of the map layers have the same map tile coordinates.

US Pat. No. 10,460,617

TESTING SYSTEM

SHL Group Ltd, Thames Di...

1. One or more devices for constructing a test for assessing psychological traits of a subject by means of a forced-choice assessment test, the one or more devices comprising:an assessment server, adapted to interact with the subject to be tested over a computer network;
wherein the assessment server comprises one or more computers and one or more computer-readable media storing instructions that are executable by the one or more computers, wherein the one or more computers and one or more computer-readable media implement:
a test construction engine for constructing a test, the test comprising a plurality of item blocks, wherein each item block comprises a plurality of items, each item relating to a psychological trait, and at least two of the items in an item block relating to different psychological traits, to which the subject is required to respond by at least partially ranking items from the item block, comprising:
an interface that provides access to a database, the database adapted to store information pertaining to a plurality of scales, each scale being related to a psychological trait of the subject to be assessed, and a plurality of items, each item being associated with at least one scale and representing a stimulus to which the subject may respond;
a test generator module adapted to generate a plurality of item blocks from items obtained from the database;
a test configurator module for receiving a request for an item block; and
a selector adapted to select, from among multiple item blocks, an item block to include in the test, the selector adapted to select the item block in dependence on the request and an information optimization index, wherein the selector is adapted to determine the information optimization index for each item block from a potential information gain from the subject being required to respond to the item block;
a test administrator module for applying the test to the subject via a user terminal for displaying the test to the subject and receiving a response from the subject; and
a scoring engine for scoring the subject response to each item block of the test and assessing a psychological trait of the subject based on the subject item block response score; and
wherein the item block response score of the subject for a first item block is used to determine a second item block.

US Pat. No. 10,460,613

METHOD AND SYSTEM FOR DISPLAYING AN ALIGNMENT SYMBOL FOR INDICATING DEVIATIONS BETWEEN OWNSHIP RUNWAY COURSE HEADING AND TRACKING

HONEYWELL INTERNATIONAL I...

1. A method of assessing misalignment when landing an ownship, the method comprising:displaying an alignment symbol on a display for aiding in a first instance, aligning a tracking angle and a lateral course of the ownship with a runway course by a pilot, and in a second instance, displaying as a cue of misalignment of the ownship from the runway course to the pilot wherein the alignment symbol is configured for viewing as a first display item on a zero-pitch reference line (ZPRL) in a viewpoint of the pilot of a direct line of sight of the pilot on the display;
displaying a heading bug on the display for aiding in aligning a heading of the ownship with a runway course for the pilot, the heading bug is configured for viewing as a second display item on the ZPRL in the direct line of sight of the pilot, wherein the heading bug indicates, by an approximate position to the alignment symbol on ZPRL of the display, a reference of a magnitude of lateral misalignment;
displaying a tracking bug on the display for aiding in aligning a track angle of the ownship with the runway course, the tracking bug is configured for viewing as a third display item on the ZPRL in the direct line of sight of the pilot on the display wherein the tracking bug indicates, by an approximate position to the alignment symbol on the ZPRL of the display, a reference of a magnitude of angular misalignment;
enabling a pilot to use the first, second and third display items for maneuvering the ownship for maintaining first, an alignment of the heading with the runway course and second, for attempting an aligning of the tracking angle of the ownship with the runway course by making adjustments in maneuvers of the ownship in a course of landing while viewing in the direct line of sight the first, second and third display items on the ZPRL of the display wherein a relative position of each of the display items to the other serves as an indicator to the pilot of adjustments needed for correcting the lateral and angular misalignment in the course of landing; and
prioritizing a display of the first, second, and third runway items in a manner not to obscure other symbols or items on the display deemed to have a higher priority for viewing by pilot for maneuvering the ownship.

US Pat. No. 10,460,610

AIRCRAFT PROFILE OPTIMIZATION WITH COMMUNICATION LINKS TO AN EXTERNAL COMPUTATIONAL ASSET

General Electric Company,...

10. A system comprising:an external computational asset device comprising:
a memory storing processor-executable program instructions; and
a processor to execute the processor-executable program instructions to cause the computing device to:
obtain flight data for a prescribed flight from at least one of an airborne system of a particular aircraft to execute the prescribed flight and a system separate and distinct from the airborne system having a source of data related to the prescribed flight, the flight data including specific details relating to the particular aircraft and parameters of the prescribed flight, the specific details of the flight data relating to the particular aircraft comprises a data model including tail specific performance and operational characteristics for the particular aircraft;
perform, by the processor of the external computational asset separate and distinct from a flight management system and a flight control system of the airborne system and based on the obtained flight data, a control optimization to generate optimized path specific control commands to minimize at least one direct operating cost for the prescribed flight;
transmit the optimized path specific control commands via a communication uplink from the external computational asset to the particular aircraft; and
guide, in response to receiving the optimized path specific control commands by the particular aircraft, the particular aircraft in accordance with the optimized path specific control commands to execute the prescribed flight to minimize the at least one direct operating cost for the prescribed flight.

US Pat. No. 10,460,606

METHOD AND SYSTEM FOR GENERATING A LANE DEPARTURE WARNING IN A VEHICLE

STMICROELECTRONICS S.R.L....

1. A method for generating a lane departure warning in a vehicle, the method comprising:acquiring a plurality of frames of a digital image of a road on which the vehicle is traveling, the digital image of the road including an image of a lane within which the vehicle is traveling and of marking lines of the lane;
performing a lane calibration procedure on a set of acquired frames to obtain reference positions of the lane, the lane calibration procedure including filtering edge points of the image frame belonging to an area of a horizontal stripe of the frame including a plurality of rows of the frame, wherein performing a lane calibration procedure comprises updating the reference positions of the lane in response to determining that no lane departure status is detected for a given recalibration time;
for each of the acquired frames, extracting edge points of the frame, performing a lane departure verification procedure that includes identifying points in a frame representative of a position of the lane marking lines, and comparing the position of the points to the reference positions of the lane, the reference positions of the lane being obtained by the lane calibration procedure; and
generating a lane departure alert when a lane departure status is detected by the lane departure verification procedure.

US Pat. No. 10,460,605

DRIVER ASSISTANCE SYSTEM FOR A MOTOR VEHICLE

Robert Bosch GmbH, Stutt...

1. A driver assistance system for a motor vehicle, comprising:at least one sensor adapted to be physically joined to a body of the motor vehicle and electrically connected to a battery of the motor vehicle to detect object properties of objects which are located in surroundings of the motor vehicle;
an interface;
an output unit to transmit the object properties to a user; and
a control unit;
wherein:
at least one of the control unit and the output unit is housed in a device capable of being carried on a person of a driver into and out of the motor vehicle,
the sensor transmits the object properties to the interface in the form of a first signal,
the interface transmits the object properties, received in the form of the first signal, to the control unit in the form of a second signal,
the control unit is configured to forward the object properties, received in the form of the second signal, to the output unit and to control the output of the object properties by the output unit,
the control unit is a processor of a smartphone, on which an application software (APP) is executed, the control unit being configured to process the object properties before forwarding to the output unit, as a function of inputs of a user received via an input mask of the APP,
the control unit monitors the object properties for predetermined properties with respect to at least one of: (i) a course of the motor vehicle, and (ii) a speed of the motor vehicle, for imminent collisions or predetermined safety distances, and the predetermined properties being identified through comparison of one or multiple of the object properties with threshold values of the object properties stored in a memory of the control unit, and
the control unit outputs to the user at least one of: (i) a visual warning, and (ii) an acoustic warning, via the output unit if a predetermined property of the object properties has been ascertained.

US Pat. No. 10,460,595

INSTRUCTION DEVICE, PROGRAM, INSTRUCTION SYSTEM, AND INSTRUCTION METHOD

YAMAHA CORPORATION, Hama...

9. A method executed by a master device and an instruction device that communicates with the master device, the method comprising:receiving, by the instruction device, a beacon outputted from a target device and a device ID included in the beacon outputted from the target device, by using a first communication means;
sending, by the instruction device, the received device ID and a reception strength of the beacon outputted from the target device, by using a second communication means different from the first communication means;
receiving, by the master device, information from the instruction device, by using the second communication means;
receiving, by the master device, the device ID and the reception strength of the beacon from the instruction device;
detecting, by the master device, based on the received device ID and the reception strength of the beacon, a space in which the instruction device is located in together with the target device;
storing, in the master device, association information including information indicating that the detected space in which the instruction device is located in and the target device are associated with each other;
specifying, by the master device, the target device associated with the detected space in which the instruction device is located in by referring to the association information; and
outputting, by the master device, an instruction signal corresponding to the specified target device in accordance with an operation by an operator,
wherein a plurality of device IDs and reception strengths respectively associated with a plurality of beacons are received by the master device, the space is detected based on a device ID included in a beacon among the plurality of beacons having a maximum reception strength, and a device is specified by referring to the detected device ID and the associated information stored in the master device.

US Pat. No. 10,460,589

CABLE TRAY LOAD ASSESSMENT AND/OR MONITORING

Amazon Technologies, Inc....

1. A system for a datacenter, the system comprising:a row of server racks containing servers,
a cable tray extending above and along the row of sever racks;
cables extending from the servers up into the cable tray;
a sensor coupled with the cable tray;
an indicator mounted on the cable tray; and
a controller comprising a processor and a non-transitory computer-readable medium comprising processor-executable instructions to cause the processor to:
determine a weight of the cables in the cable tray based on information from the sensor; and
cause the indicator to indicate a status of the cable tray based on the weight determined.

US Pat. No. 10,460,582

PRESENCE DETECTION AND USES THEREOF

AVIGILON CORPORATION, Va...

1. A computer-implemented method for detecting a person in a publicly accessible location, comprising:providing a radar system positioned to monitor the publicly accessible location, the radar system configured to transmit radar signals to and receive radar signals from the publicly accessible location, the radar system separated from the publicly accessible location by a wall;
determining if the radar signals received from the publicly accessible location indicate a presence of a person in the publicly accessible location;
on determination of the presence of the person in the publicly accessible location, using the received radar signals to determine if the person is sleeping; and
on determination of the presence of the sleeping person in the publicly accessible location by the radar system for a time period greater than a predetermined time period, sending an alert;
the alert comprising a video stream showing the sleeping person from a camera monitoring the location.