US Pat. No. 10,192,674

COIL COMPONENT HAVING TERMINAL ELECTRODES WITH HIGH MOUNTING STRENGTH, AND ELECTRONIC DEVICE INCLUDING THE COIL COMPONENT

TAIYO YUDEN CO., LTD., T...

1. A coil component comprising an air-core coil embedded in a magnetic body constituted by resin and metal magnetic grains, and having terminal electrodes electrically connected to both ends of the coil, wherein:both ends of the coil are exposed on a surface of the magnetic body;
the terminal electrodes are formed across the surface of the magnetic body and ends of the coil, and constituted by an underlying layer formed with metal material and a cover layer placed on an outer side of the underlying layer; and
the underlying layer is in contact with the resin and metal parts of the metal magnetic grains where the underlying layer is in contact with the magnetic body,
wherein a magnetic body surface on a side where either terminal electrode is connected to the end of the coil contains less resin than a magnetic body surface on a side where no terminal electrode is connected to the end of the coil.

US Pat. No. 10,192,673

INDUCTOR

SAMSUNG ELECTRO-MECHANICS...

1. An inductor comprising:a body comprising a magnetic material and having an upper surface, a lower surface, and side surfaces connecting the upper surface and the lower surface; and
a coil part disposed in the body and including a support member comprising an insulating resin, the coil part comprising first and second coil patterns respectively formed on an upper surface and a lower surface of the support member, wherein
1.15?b/a?1.45, where a is a length from a central plane between the upper surface and the lower surface of the support member to an upper surface of the body, and b is a length from the central plane of the support member to the lower surface of the body.

US Pat. No. 10,192,671

ELECTRONIC COMPONENT

MURATA MANUFACTURING CO.,...

1. An electronic component, comprising:a multilayer body including a plurality of insulator layers stacked together;
a plurality of inner conductors including at least a first inner conductor, a second inner conductor, a third inner conductor and a fourth inner conductor formed between the insulator layers and extended to a side surface of the multilayer body; and
a plurality of outer electrodes formed on both side surfaces of the multilayer body, the outer electrodes including at least a first outer electrode connected to the first inner conductor, a second outer electrode connected to the second inner conductor, a third outer electrode connected to the third inner conductor and a fourth outer electrode connected to the fourth inner conductor,
wherein each of the outer electrodes is formed on a single side surface so as not to extend over two side surfaces of the multilayer body, and
wherein the first outer electrodes and the second outer electrode are facing each other, and the first outer electrode and the second outer electrode differ in length in a direction in which the insulator layers are stacked.

US Pat. No. 10,192,670

REACTOR

AutoNetworks Technologies...

1. A reactor comprising:a combined body that includes: a coil; and a magnetic core that is located inside and outside the coil to form a closed magnetic circuit,
wherein the coil includes a pair of winding portions that are arranged side by side,
the magnetic core includes: an inner core portion that is located inside the coil; and an outer core portion that is located outside the coil and is arranged in a direction that is orthogonal to an axial direction of the coil,
the outer core portion:
is formed using a composite material that is a resin in which magnetic powder is dispersed; and
includes: a main body portion that includes a portion that serves as a magnetic path; and attachment portions that are formed integrally with the main body portion, are provided with bolt holes into which bolts for fixing the combined body to a cooling base are inserted, and bulge from outer circumferential edges of portions of the main body portion in the vicinity of the cooling base,
a center point of each of the bolt holes is located outward of a circle that is formed around a center point that is located in the vicinity of a connecting portion between an inner surface of the inner core portion and an inner surface of the outer core portion, and has a radius that is equal to a thickness of the outer core portion in the axial direction of the coil,
no collar is provided in any of the bolt holes,
the reactor further comprises a flat plate member that is fastened to the outer core portion by the bolts, and is disposed such that the coil is exposed, and
the bolts and the flat plate member are formed using a non-magnetic metal material.

US Pat. No. 10,192,669

VECTOR MAGNETIC CHARACTERISTIC CONTROLLED MATERIAL AND IRON CORE

NATIONAL UNIVERSITY CORPO...

1. A vector magnetic characteristic controlled material, comprising:a grain-oriented electrical steel to which a magnetic domain ultra-refinement process has been applied, the steel including a surface on which continuous and linear scratches are formed in two directions intersecting each other at approximately right angles and having parallel spacing of between about 0.25 mm and about 0.50 mm and in both directions, wherein the parallel spacing is the distance separating parallel scratches, and wherein the material has a magnetic domain structure in which each magnetic domain is divided into plural granular magnetic domains.

US Pat. No. 10,192,668

COIL COMPONENT

Murata Manufacturing Co.,...

1. A coil component comprising:a drum-shaped core including a winding core portion and first and second flange portions provided at respective end portions of the winding core portion along a predetermined direction that is a length direction of the winding core portion;
each of the first and second flange portions having an inner end surface that faces a side of the winding core portion and positions the corresponding end portion of the winding core portion, an outer end surface that faces an outer side opposite to the inner end surface, a bottom surface that couples the inner end surface with the outer end surface and faces a side of a mount substrate at mounting, and a top surface opposite to the bottom surface;
a plate-shaped core bridged between the first and second flange portions while one principal surface of the plate-shaped core contacts the top surface of each of the first and second flange portions;
at least one first terminal electrode provided on the bottom surface of the first flange portion;
at least one second terminal electrode provided on the bottom surface of the second flange portion; and
at least one wire wound around the winding core portion and connected between the first and second terminal electrodes,
wherein, for dimensions measured along the predetermined direction, a dimension of each of the top surfaces of the first and second flange portions is equal to or larger than a dimension of the winding core portion.

US Pat. No. 10,192,666

MAGNETIC DEVICE FOR LOCKING A GEAR SELECTOR LEVER OF A VEHICLE IN A PREDETERMINED POSITION, METHOD FOR PRODUCING A MAGNETIC DEVICE, AND METHOD FOR OPERATING A MAGNETIC DEVICE

ZF Friedrichshafen AG, F...

1. A magnetic device for locking a gear shift lever of a vehicle in a predetermined position, the magnetic device comprising:a coil;
a tie component, which is movably supported in the coil;
a spring disposed outside the coil, wherein the spring is designed to push at least a portion of the tie component out of the coil;
a switch element which is designed to interact with a positioning element and the tie component disposed on a movement track in order to detect a position of the magnetic device in the movement track.

US Pat. No. 10,192,665

MAGNETIC MOUNT SYSTEM

Attachit LLC, Gillett, W...

1. A magnetic mounting system comprising:a device having an indexing magnetic attachment feature comprising a first single multipole magnet; and
a magnetic device mount having a mating indexing magnetic attachment feature comprising a second single multipole magnet,
wherein the first single multipole magnet and the second single multipole magnet each comprise a magnet having multiple polarities arranged at predetermined locations in a pattern forming a magnetic lock and key system between the first single multipole magnet and the second single multipole magnet which orients the device relative to the mount at predictable and programmed intervals, which intervals comprise a specific angular, radial, and/or longitudinal alignment of the device relative to the mount without a mechanical interface.

US Pat. No. 10,192,664

EXCITING DEVICE FOR ELECTROMAGNETIC CONNECTION DEVICE

OGURA CLUTCH CO., LTD., ...

1. An exciting device for an electromagnetic connection device, comprising:a yoke including an annular groove and a first through hole formed in a bottom wall serving as a bottom of the annular groove;
an exciting coil stored in the annular groove;
a terminal housing including a convex portion fitted in the first through hole and a concave portion located on an opposite side of the annular groove with respect to the convex portion, the convex portion including a second through hole extending in a direction parallel to a center line of the first through hole; and
an external connecting terminal buried in the terminal housing in a state in which a portion of the external connecting terminal is exposed in the concave portion, the external connecting terminal including a coil extraction hole formed in the portion exposed in the concave portion and continuing to the second through hole, and the exciting coil including an extraction end soldered to the external connecting terminal in a state in which the extraction end is passed through the second through hole and the coil extraction hole.

US Pat. No. 10,192,663

COIL FOR A SWITCHING DEVICE WITH A HIGH-FREQUENCY POWER

1. A coil system comprising a coil and several windings,wherein a first winding of the coil provides a first winding diameter and a first winding spacing;
wherein a last winding of the coil provides a second winding diameter and a second winding spacing;
wherein the first winding diameter is larger than the second winding diameter;
wherein the first winding spacing is smaller than the second winding spacing;
wherein the coil system further comprises a coil former filling an interior cavity of the coil;
wherein the coil former provides four recesses extending along its longitudinal axis, separated by webs, which are 90° offset relative to one another with reference to the coil former;
wherein the coil former comprises synthetic material,
wherein the coil former provides a relative permittivity that is no greater than about 1.2;
wherein the windings of the coil are guided in a guide groove of the coil former; and
wherein a wire thickness of the coil is larger than a depth of the guide groove.

US Pat. No. 10,192,662

METHOD FOR PRODUCING GRAIN-ORIENTED ELECTRICAL STEEL SHEET

JFE Steel Corporation, T...

1. A method for producing a grain-oriented electrical steel sheet by comprising a series of steps of hot rolling a raw steel material comprising C: 0.002-0.10 mass %, Si: 2.0-8.0 mass %, Mn: 0.005-1.0 mass % and the remainder being Fe and inevitable impurities to obtain a hot rolled sheet, subjecting the hot rolled steel sheet to a hot band annealing as required and further to one cold rolling or two or more cold rollings including an intermediate annealing therebetween to obtain a cold rolled sheet having a final sheet thickness, subjecting the cold rolled sheet to primary recrystallization annealing combined with decarburization annealing, applying an annealing separator to the steel sheet surface and then subjecting to final annealing, characterized in that rapid heating is performed at a rate of not less than 50° C./s in a region of 200-700° C. in the heating process of the primary recrystallization annealing, and the steel sheet is held at any temperature of 250-600° C. in the region of 200-700° C. for 1-5 seconds, while a soaking process of the primary recrystallization annealing is controlled to a temperature range of 750-900° C., a time of 90-180 seconds and PH2O/PH2 in an atmosphere of 0.25-0.40, where PH2O means a partial water vapor pressure of the atmosphere and PH2 means a partial hydrogen pressure of the atmosphere.

US Pat. No. 10,192,660

PROCESS FOR PREPARATION OF NANOPARTICLES FROM MAGNETITE ORE

Sri Lanka Institute of Na...

1. A process for making magnetite nanoparticle dispersions, wherein substantially all of the nanoparticles have a particle size of about 32 nm, consisting of:(a) providing a magnetite ore;
(b) destructuring the magnetite ore, wherein (i) the destructuring of the magnetic ore is done by grinding in a nano-grinder in the presence of oleic acid using at least one of tungsten carbide grinding balls or zirconium oxide grinding balls and (ii) the grinding is performed in an inert atmosphere with:
15 mm size tungsten carbide grinding balls at 700 rpm for about one hour,
further grinding using 5 mm size tungsten carbide grinding balls at 700 rpm for about one hour,
further grinding using 3 mm size zirconium oxide grinding balls at 1000 rpm for about one hour, and
further grinding using 1 mm size zirconium oxide grinding balls at 1000 rpm for about one hour;
(c) contacting the destructured magnetite ore with one of the group consisting of a long chain alkyl carboxylic acid, a natural oil containing long chain carboxylic acid carboxyl groups, and combinations thereof to form stabilized nanoparticles; and
(d) dispersing the stabilized nanoparticles in alcoholic solvent.

US Pat. No. 10,192,659

CHIP RESISTOR

KOA Corporation, Ina-shi...

1. A chip resistor comprising: a ceramic substrate that is shaped like a cuboid; a pair of front electrodes that are provided on lengthwise opposite end portions of a front surface of the ceramic substrate; a resistor body that is provided between and connected to the pair of front electrodes; a protective layer that covers the resistor body; a pair of back electrodes that are provided on lengthwise opposite end portions of a back surface of the ceramic substrate; end-surface electrodes through which the front electrodes and the back electrodes are electrically conductively connected to each other respectively; and external electrodes that cover the end-surface electrodes; wherein:a pair of insulating resin layers are formed on the back surface of the ceramic substrate with interposition of a predetermined interval therebetween so as to cover edge portions of the back electrodes; and at least opposed side end portions of the insulating resin layers are exposed from the external electrodes.

US Pat. No. 10,192,658

CHIP RESISTOR

KOA CORPORATION, Ina-shi...

1. A chip resistor comprising: an insulating substrate that is shaped like a cuboid; a pair of front electrodes that are provided on lengthwise opposite edge portions of a front surface of the insulating substrate; a resistor body that is provided between the two front electrodes; an insulating protection layer that covers entire surfaces of the resistor body and the two front electrodes; and a pair of terminal electrodes that are provided on opposite lengthwise end surfaces of the insulating substrate; wherein: the front electrodes are exposed from opposite widthwise end surfaces and the lengthwise end surfaces of the insulating substrate, and the terminal electrodes wrap around the widthwise end surfaces of the insulating substrate to be thereby connected to the front electrodes only at the exposed portions of the front electrodes that are exposed from the widthwise end surfaces and the lengthwise end surfaces.

US Pat. No. 10,192,657

GROMMET AND WIRE HARNESS

Sumitomo Wiring Systems, ...

1. A grommet that is to be attached to a group of electrical wires and mounted to a vehicle body panel so as to block an opening in the vehicle body panel, the grommet comprising:a first cylindrical portion through which the group of electrical wires is inserted;
a second cylindrical portion that is formed shorter in an axial direction than the first cylindrical portion and surrounds the first cylindrical portion;
a seat portion that is constituted by an annular rubber elastic body that surrounds the second cylindrical portion and is capable of constriction in diameter, the seat portion having an annular unevenness portion capable of fitting around an edge portion of the opening in the vehicle body panel; and
an annular connection portion that elastically connects the first cylindrical portion and the seat portion,
wherein the seat portion has an approximately elliptical shape,
the connection portion has an inclined annular wall portion that forms an inclined annular surface that is inclined in the axial direction between the first cylindrical portion and the seat portion, the inclined annular wall portion supporting a base end portion of the second cylindrical portion, and
a plurality of rib portions are integrally provided on the inclined annular wall portion and the second cylindrical portion, the plurality of rib portions extending from an axially intermediate portion of the second cylindrical portion to the inclined annular wall portion on two sides in a major axis direction of the approximately elliptical shape, and projecting from the second cylindrical portion to a seat portion side.

US Pat. No. 10,192,655

ANISOTROPIC WIRE HARNESS

HIGHLAND INDUSTRIES, INC....

6. A wire harness comprising a flexible jacket positioned between an anisotropic fabric and an exterior sheath, and a plurality of wires sized to be bundled and bound within the anisotropic fabric, whereby the anisotropic fabric is configured to define a modulus of stiffness in the lateral direction that is greater than a modulus of stiffness in the longitudinal direction.

US Pat. No. 10,192,654

FLAT CABLE AND MANUFACTURING METHOD THEREOF

Thomas Engineering Co., L...

1. A flat cable comprising:a pod (10) including pipe type insertion portions (11) formed to be separated from each other at both side ends thereof and a central insertion portion (12) of which both ends are integrally connected to the both pipe type insertion portions (11);
a pair of left and right support members (20) inserted into the pipe insertion portions (11);
multiple electric cables (30) inserted into the central insertion portion (12); and
a clamp (40) including an upper clamp (41) installed above the support member (20) and having upper insertion grooves (41a) formed at both side ends thereof and a lower clamp (42) installed below the support member (20) and having lower insertion grooves (42a) formed at both side ends thereof,
wherein the central insertion portion (12) of the pod (12) is partitioned into multiple spaces (R1, R2, and R3) separated from each other and multiple electric cables (30) are horizontally disposed in the separated spaces in one layer, and
the support members (20) are inserted into the upper and lower insertion grooves (41a and 42a), an upper suspension projection (41b) is formed the entrance portion of the upper insertion groove (41a), and the lower suspension projection (42b) is formed at the entrance portion of the lower insertion groove (42a), upper clamp (41), and the support member (20) and the lower clamp (42) are screw-joined by a bolt (B) consecutively penetrating the upper clamp (41), and the support member (20) and the lower clamp (42).

US Pat. No. 10,192,653

TWISTED STRING-SHAPED ELECTRIC CABLE FOR UNDERWATER PURPOSE

Panasonic Intellectual Pr...

1. An electric cable comprising:at least one electric wire; and
a plurality of string-shaped bodies each extending in a longitudinal direction of the electric cable and twisting with one another around the at least one electric wire being a core, wherein the plurality of string-shaped bodies has a connection part twisting with one another excluding the at least one electric wire, and
wherein the connection part is connected to a frame of an underwater robot.

US Pat. No. 10,192,652

MULTI-COVER BUS BAR UNIT FOR ROTARY MACHINES

HONDA MOTOR CO., LTD., T...

1. A bus bar unit comprising:a plurality of bus bars that electrically connects coils of each phase of a rotary electric machine and an external power supply;
a plurality of inner holding sections that separately covers portions of the plurality of bus bars and separately hold the plurality of bus bars, wherein the plurality of inner holding sections are separately mounted on the plurality of bus bars; and
an outer holding section that is formed of an insulating material, that collectively covers the plurality of inner holding sections, and that is formed in a state in which the plurality of bus bars are electrically insulated.

US Pat. No. 10,192,651

TRANSFER MATERIAL, METHOD OF MANUFACTURING TRANSFER MATERIAL, LAMINATED BODY, METHOD OF MANUFACTURING LAMINATED BODY, METHOD OF MANUFACTURING CAPACITANCE-TYPE INPUT DEVICE, AND METHOD OF MANUFACTURING IMAGE DISPLAY DEVICE

FUJIFILM CORPORATION, To...

1. A transfer material comprising, in this order, a temporary support body, a first resin layer, and a second resin layer,the first resin layer not being water soluble,
the second resin layer including a water soluble polymer,
the second resin layer including a compound that has a heteroaromatic ring including a nitrogen atom as a ring member, and
a content of the compound that has a heteroaromatic ring including a nitrogen atom as a ring member in the second resin layer being 3.0% by mass or greater with respect to a total solid content of the second resin layer.

US Pat. No. 10,192,650

PHOTOSENSITIVE CONDUCTIVE PASTE, METHOD OF PRODUCING MULTILAYER ELECTRONIC COMPONENT USING THE SAME, AND MULTILAYER ELECTRONIC COMPONENT

MURATA MANUFACTURING CO.,...

1. A photosensitive conductive paste comprising:(a) a conductive powder in an amount of 70.3 to 85.6 mass % with respect to a total amount of the photosensitive conductive paste;
(b) a photosensitive resin composition containing an alkali-soluble polymer, a photosensitive monomer, a photopolymerization initiator, and a solvent; and
(c) a glass frit,
wherein a mass ratio of the glass frit to the conductive powder is 0.020 to 0.054,
the glass frit has a softening point that is equal to or above a temperature at which sintering of the conductive powder starts, and
the softening point of the glass frit is 657° C. or higher.

US Pat. No. 10,192,648

TANK CLOSURE CESIUM REMOVAL

Westinghouse Electric Com...

7. A method of removing cesium from a liquid waste stream, comprising:transporting the liquid waste stream through conduit to one or more pre-filters to produce a filtered liquid waste stream;
introducing the filtered liquid waste stream into one or more integral, shielded ion-exchange columns, which comprise:
a shield base having a perimeter;
a shield cap having a perimeter and positioned opposite the shield base;
a shield wall extending longitudinally between the shield base and the shield cap, extending along the perimeter of each of the shield cap and the shield base, and forming an exterior surface;
a shield cavity formed by the shield wall;
a pressure vessel concentrically positioned within the shield cavity, comprising:
a sorbent bed comprising an ion-exchange resin; and
a head space positioned above the sorbent bed;
an outlet pine extending through the shield wall, through the head space, into the sorbent bed and along a vertical length thereof;
an inlet pipe extending through the shield wall and into the head space; and
an air gap formed by an annular space between an outer surface of the pressure vessel and an inner surface of the shield wall;
passing said filtered liquid waste stream through the one or more integral, shielded ion-exchange columns;
separating cesium from the filtered liquid waste stream to produce a clean liquid stream; and
transferring the one or more integral, shielded ion-exchange columns to a storage facility.

US Pat. No. 10,192,647

PACKAGE COMPRISING IMPROVED MEANS OF DAMPENING IMPACT BETWEEN AN ASSEMBLY CONTAINING RADIOACTIVE MATERIALS AND THE COVER OF THE PACKAGING

TN INTERNATIONAL, Montig...

1. A package comprising:a packaging for storing and/or transporting radioactive materials;
an assembly containing radioactive materials housed in a cavity of the packaging extending along a longitudinal axis of the packaging and being closed by a cover crossed by said longitudinal axis; and
a system for dampening impact of the assembly against the cover, the system comprising at least one plastically deformable dampening device and a loading device,
wherein one of the loading device and deformable dampening device is mounted moveable on the cover in a plane orthogonal to the longitudinal axis of the packaging, and has means of self-centring relatively to the other of the loading device and the deformable dampening device which is provided on said assembly containing the radioactive materials, and
wherein the deformable dampening device is arranged between the assembly and the cover along the longitudinal axis of the packaging.

US Pat. No. 10,192,646

RADIATION SHIELDING SYSTEM

General Electric Company,...

1. A radiation shielding system for an x-ray detector array comprising active components and passive components, the radiation shielding system comprising:a first radiation shield comprising a plurality of shielding pads configured to be positioned over active components of the digital detector array and a plurality of interstices between the shielding pads and configured to be positioned over passive components of the x-ray detector array,
wherein the plurality of shielding pads have a greater thickness than a thickness of the plurality of interstices.

US Pat. No. 10,192,644

FUEL ASSEMBLY

Lightbridge Corporation, ...

1. A fuel assembly for use in an internal core structure of a nuclear power reactor, the assembly comprising:a frame shaped and configured to fit within the nuclear power reactor internal core structure; and
a plurality of helically twisted fuel elements supported by the frame in a fuel rod bundle, each of the fuel elements comprising fissile material;
wherein as viewed in a cross-section that is perpendicular to an axial direction of the fuel assembly, the outermost fuel elements of the fuel rod bundle define a substantially circular perimeter,
wherein the plurality of fuel elements are arranged into a mixed grid pattern that includes a first, rectangular grid pattern and a second, triangular grid pattern,
wherein each of the plurality of fuel elements comprises a longitudinal centerline, and
wherein the longitudinal centerlines of the fuel elements of the second, triangular grid pattern are separated from the longitudinal centerlines of adjacent fuel elements of the second, triangular grid pattern by a centerline-to-centerline distance, and a circumscribed diameter of the fuel elements in the second, triangular grid pattern equals the centerline-to-centerline distance.

US Pat. No. 10,192,640

FRACTIONAL FLOW RESERVE DECISION SUPPORT SYSTEM

Siemens Healthcare GmbH, ...

1. A method for fractional flow reserve (FFR) decision support using a computed tomography (CT)-based clinical decision support system, the method comprising:scanning a patient with a CT system, the scanning providing coronary CT data representing a heart of the patient;
acquiring non-invasive patient data and biochemical measurements;
extracting values from the non-invasive patient data and the biochemical measurements for features of an input vector of a machine-learnt predictor of the CT-based clinical decision support system from the coronary CT data;
generating, by the machine-learnt predictor of the CT-based clinical decision support system based on the values for the features of the input vector, a clinical decision of whether to perform CT-FFR for the patient; and
transmitting the clinical decision.

US Pat. No. 10,192,639

METHOD AND SYSTEM FOR MEDICAL SUGGESTION SEARCH

DrFirst.com, Inc., Rockv...

1. A method, implemented on at least one computing device having at least one processor, storage, and a communication platform connected to a network for providing medical suggestion, the method comprising:receiving one or more dimensions, each of the one or more dimensions relating to an attribute of a patient or an attribute of a physician;
identifying, for each of the one or more dimensions, at least one medical suggestion from a data map associating medical suggestions with dimensions, wherein each dimension-medical suggestion pair in the data map has an associated confidence score indicative of a degree of match between the medical suggestion and the dimension, the degree of match being based on statistical analysis of medical transaction data identified as relevant to the dimension-medical suggestion pair;
calculating, for each medical suggestion, an aggregated confidence score based on an aggregation of the associated confidence scores for the medical suggestion with respect to each of the one or more dimensions;
providing, for selection, at least some of the medical suggestions based on the aggregated confidence score of each medical suggestion;
receiving a selection of a first medical suggestion of the at least some of the medical suggestions provided; and
boosting confidence scores for the dimension-medical suggestion pairs associated with the one or more dimensions and the first medical suggestion responsive to the selection, the boosted confidence score of a dimension-medical suggestion pair being used in calculating the aggregated confidence score for the medical suggestion responsive to a subsequent receipt of the dimension.

US Pat. No. 10,192,638

METHODS AND SYSTEMS FOR MANAGING PATIENT TREATMENT COMPLIANCE

WellDoc, Inc., Columbia,...

1. A computer-implemented method, comprising:receiving, over a network, application features for generating an application including instructions for using a treatment plan;
programmatically generating the application for a user to use on an electronic device by using the received application features;
receiving an activation code from the user to use the application, wherein the activation code is acquired by the user after the user receives authorization from a medical professional to use the application;
after receiving the activation code:
processing the activation code to determine if the user is authorized to use the application;
after determining that the user is authorized, authorizing the user to use and activate the application;
receiving input data from the user; and
using the input data from the user to evaluate user compliance with the treatment plan.

US Pat. No. 10,192,636

BAGGAGE SYSTEM, RFID CHIP, SERVER AND METHOD FOR CAPTURING BAGGAGE DATA

Brain Trust Innovations I...

1. A baggage system comprising:a belt loader reader device configured to communicate with a radio-frequency identification (RFID) tag associated with a baggage item, wherein the belt loader reader device comprises:
an RFID antenna;
a power transmission subsystem including a power source and an antenna arranged to wirelessly transmit power from the power source to the RFID tag;
a transceiver configured to receive first data from the RFID tag, the first data including identification information;
a controller operatively coupled to the transceiver; and
one or more memory sources operatively coupled to the controller, the one or more memory sources including instructions for configuring the controller to generate one or more messages indicative of the identification information to be sent by the transceiver to a server device via a network connection,
wherein the server device comprises:
a transceiver configured to receive the one or more messages from the belt loader reader device;
a controller operatively coupled to the transceiver; and
one or more memory sources operatively coupled to the controller, the one or more memory sources including instructions for configuring the controller to generate another message indicative of the identification information associated with the baggage item.

US Pat. No. 10,192,634

WIRE ORDER TESTING METHOD AND ASSOCIATED APPARATUS

MEDIATEK SINGAPORE PTE. L...

1. A wire order testing method for determining pin connection relationships between a memory device and an electronic device, the method comprising:testing the memory device with at least one test pattern to obtain at least one first data;
predicting at least one second data that is to be correspondingly obtained from testing of the memory device with the at least one test pattern according to mapping relationships between the test pattern and pins of the memory device; and
determining the pin connection relationships between the memory device and the electronic device according to the at least one first data and the at least one second data.

US Pat. No. 10,192,633

LOW COST INBUILT DETERMINISTIC TESTER FOR SOC TESTING

Intel Corporation, Santa...

6. A method of testing an integrated circuit, comprising:transitioning an auto-response module into a test mode, the auto-response module being fabricated on a chip and a signal path between the memory controller and memory ports at a chip boundary;
sending a read transaction from a transaction agent;
intercepting the read transaction in the auto-response module, wherein the auto-response module non-deterministically accumulates signatures of received transactions, the transactions comprising at least one of a write request and a read request; and
sending a deterministic response to the transaction agent based on a logical address of the read transaction.

US Pat. No. 10,192,632

SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD THEREOF

SK Hynix Inc., Gyeonggi-...

1. A semiconductor memory device, comprising:a memory cell array including a plurality of memory cells coupled between a common source line and a bit line; and
a voltage generator applying operating voltages to word lines coupled to the memory cells or discharging potential levels of the word lines,
wherein during a program verify operation, the voltage generator applies a program verify voltage and a pass voltage as the operating voltages to the word lines, and subsequently applies a set voltage to the common source line during a period in which the memory cells are turned on.

US Pat. No. 10,192,631

CURRENT MEMORY CIRCUIT FOR MINIMIZING CLOCK-FEEDTHROUGH

Foundation of Research an...

1. A current memory circuit, comprising:a first current mirror comprising:
a first input device of a first type having a gate, a drain, and a source;
a first mirrored device of the first type having a gate, a drain, and a source, wherein the gate of the first input, device is connected to the gate of the first mirrored device at a first common gate node;
a first switch connected between an input node of the current memory circuit and the drain of the first input device; and
a second switch connected between the drain and the gate of the first input device;
a second current mirror comprising:
a second input device of a second type having a gate, a drain, and a source;
a second mirrored device of the second type having a gate, a drain, and a source, wherein the gate of the second input device is connected to the gate of the second mirrored device at a second common gate node;
a third switch connected between the drain and the gate of the second input device; and
a fourth switch connected between the drain of the second mirrored device and an output node of the current memory circuit; and
a dummy capacitor connecting the first common gate node of the first current mirror and the first common gate node of the second current mirror to each other,
wherein the first, second, third, and fourth switches are configurable to store a voltage in the dummy capacitor.

US Pat. No. 10,192,630

TRACK-AND-HOLD CIRCUIT WITH ACQUISITION GLITCH SUPPRESSION

HITTITE MICROWAVE LLC, C...

1. A switched track-and-hold circuit with acquisition glitch suppression comprising:a track-and-hold circuit including:
a switching circuit including:
a plurality of switching transistors including a first transistor, and
a first switch coupled to a current source and also directly coupled to an input terminal of the first transistor in a hold mode, and
a plurality of storage devices, the switching circuit configured to apply a representation of an input signal to the input terminal of the first transistor and to the storage devices in a track mode and block a signal path between the input signal and the storage devices in the hold mode; and
an acquisition glitch suppression circuit including:
a replica amplifier configured to sense a differential voltage across the storage devices, and
a switched clamping circuit configured to clamp, at an output of the switched clamping circuit, inputs of the switching circuit to thereby suppress an acquisition glitch.

US Pat. No. 10,192,629

SELF-LATCH SENSE TIMING IN A ONE-TIME-PROGRAMMABLE MEMORY ARCHITECTURE

TEXAS INSTRUMENTS INCORPO...

1. A method of reading data stored in a memory element of a memory device comprising:receiving a signal corresponding to the data stored in the memory element at an input of a sense amplifier;
outputting, at an output of the sense amplifier, a sensed output signal indicating a logic state of the data stored in the memory element in response to a sense amplifier enable signal;
operating a data latch having an input in a reset state in response to a latch signal indicating a first value to pass the sensed output signal of the sense amplifier to an output of the data latch, wherein the input of the data latch is coupled to the output of the sense amplifier to receive the sensed output signal; and
operating the data latch in a set state in response to the latch signal indicating a second value to store a data state of the sensed output signal and isolate the input of the data latch from the output of the sense amplifier;
wherein the latch signal is generated using a set-reset control circuit having an input to receive the sense amplifier enable signal and the generation of the latch signal is at least partially in response to the sense amplifier enable signal.

US Pat. No. 10,192,628

SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME

SK hynix Inc., Icheon-si...

1. A method of operating a semiconductor memory device, comprising:performing, with a peripheral circuit, a program operation on a Least Significant Bit (LSB) of a page; and
performing, with the peripheral circuit, a program operation on a flag cell and a Most Significant Bit (MSB) of the page based on an operation of verifying at least one of a plurality of program states, the plurality of program states including a first program state, a second program state and a third program state,
wherein data stored in the flag cell is data indicating whether data programmed according to the program operation is LSB data or MSB data,
wherein during the performing of the program operation on the flag cell and the MSB of the page, the program operation of the flag cell is initiated after an operation of verifying at least one of the first program state and the third program state is completed, and
wherein a program prohibition voltage is applied to a bit line coupled to the flag cell before the operation of verifying the first or the third program state, and a program permission voltage is applied to the bit line coupled to the flag cell after the operation of verifying the first or the third program state.

US Pat. No. 10,192,627

NON-VOLATILE MEMORY ARRAY WITH MEMORY GATE LINE AND SOURCE LINE SCRAMBLING

Cypress Semiconductor Cor...

1. A memory device, comprising:a plurality of non-volatile memory (NVM) cells, each including a memory gate, arranged in rows and columns, wherein memory gates of first and second NVM cells of a first column are electrically insulated from one another, and wherein memory gates of third and fourth NVM cells of the first column are electrically insulated from one another; and
a first source line coupled to the first and second NVM cells, and a second source line coupled to the third and fourth NVM cells of the first column, wherein the first and second source lines are adjacent and electrically insulated from one another, and wherein each of the first and second source lines respectively shares a common electrical node to receive a same voltage signal with at least one source line of the first column other than the first and second source lines.

US Pat. No. 10,192,626

RESPONDING TO POWER LOSS

Micro Technology, Inc., ...

1. A method of operating a memory, comprising:obtaining information indicative of a data value stored in a particular memory cell of the memory;
programming additional data to the particular memory cell;
determining if a power loss to the memory is indicated while programming the additional data to the particular memory cell; and
if a power loss to the memory is indicated, selectively programming one memory cell of a pair of gate-connected non-volatile memory cells responsive to the information indicative of the data value stored in the particular memory cell;
wherein a resulting combination of threshold voltages of the one memory cell of the pair of gate-connected non-volatile memory cells and of the other memory cell of the pair of gate-connected non-volatile memory cells is representative of the information indicative of the data value stored in the particular memory cell.

US Pat. No. 10,192,625

SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM IN WHICH READ VOLTAGE IS SET BASED ON TRACKING READ VOLTAGE

Toshiba Memory Corporatio...

1. A semiconductor memory device comprising:a memory cell array including a plurality of memory cells;
a word line connected in common to gates of the memory cells; and
a control circuit configured to execute read operations on the memory cells to read at least three pages of data,
wherein the control circuit, in response to an instruction to read one page of data, executes a first phase during which at least first to third voltages are applied to the word line to determine for each of the memory cells whether or not the memory cell has a threshold voltage that is below a first read voltage and a second phase during which a second read voltage is applied to the word line to determine for each of the memory cells whether or not the memory cell has a threshold voltage that is below the second read voltage,
wherein the control circuit determines the second read voltage based on the first read voltage.

US Pat. No. 10,192,624

NON-VOLATILE MEMORY DEVICE INCLUDING DECOUPLING CIRCUIT

Samsung Electronics Co., ...

1. A non-volatile memory device comprising:a memory cell array including a plurality of planes;
a page buffer connected to the memory cell array and corresponding to each of the plurality of planes, the page buffer being configured to receive a bit line voltage control signal (BLSHF) via a first node;
a decoupling circuit connected to the first node, the decoupling circuit including at least one decoupling capacitor, the decoupling circuit being configured to execute charge sharing via the first node; and
a BLSHF generator connected to the first node;
wherein the BLSHF generator is configured to generate the BLSHF, and
the first node is between the decoupling circuit and the BLSHF generator.

US Pat. No. 10,192,623

SEMICONDUCTOR DEVICE

RENESAS ELECTRONICS CORPO...

1. A semiconductor device comprising:a memory unit; and
a control unit which controls the memory unit,
wherein the memory unit includes
a memory which is configured with a non-volatile memory device, and stores setting information necessary for rewriting,
a first control circuit which has a first register and a rewrite end flag, and
a power source circuit which generates a rewrite voltage,
wherein the control unit includes
a second control circuit which has a rewrite start flag,
a counter which measures a rewrite voltage application time based on the rewrite start flag and the rewrite end flag, and
a second register which stores a next rewrite voltage based on the rewrite voltage application time, and
wherein, when a command for rewriting the memory is received, the control unit reads the setting information necessary for rewriting from the memory, and writes it back to the first register.

US Pat. No. 10,192,622

SYSTEMS, METHODS, AND APPARATUS FOR MEMORY CELLS WITH COMMON SOURCE LINES

Cypress Semiconductor Cor...

1. A method for operating a memory device, comprising:providing a first voltage to a first transistor of a first memory cell and a third transistor of a second memory cell, wherein the first and second memory cells are coupled to a common source line;
providing a second voltage to a second transistor of the first memory cell and a fourth transistor of the second memory cell; and
providing a third voltage to the first transistor of the first memory cell and the third transistor of the second memory cell.

US Pat. No. 10,192,621

FLASH MEMORY

Renesas Electronics Corpo...

1. A flash memory comprising:a memory cell array formed by a plurality of memory cells arranged in a matrix shape;
a plurality of word lines provided in each column of the memory cell array;
a first word line driver that outputs a first voltage group to each of the plurality of word lines; and
a second word line driver that outputs a second voltage group to each of the word lines together with the first word line driver, wherein the first word line driver includes:
a plurality of first level shifters, each level shifter provided to a corresponding word lines,
a plurality of inverters that drive outputs of the respective first level shifters, and
a plurality of first voltage relaxing transistors that relax voltages applied to a respective inverter, wherein:
the inverters are separately formed on a plurality of P wells provided individually in every unit of the memory cells targeted for memory data erasing at once,
the first word line driver includes:
a P well from the plurality of P wells, a plurality of second level shifters that supply a common potential to each source of an NMOS transistor of respective PMOS and NMOS transistors forming the respective inverters formed on the P well, and
a plurality of third level shifters that separately supply a potential to a plurality of N wells provided correspondingly to the plurality of P wells, wherein each of the first voltage relaxing transistors comprises an N channel type MOS transistor provided in an output stage of a respective inverter.

US Pat. No. 10,192,620

NONVOLATILE MEMORY DEVICE, OPERATING METHOD OF NONVOLATILE MEMORY DEVICE, AND STORAGE DEVICE INCLUDING NONVOLATILE MEMORY DEVICE

Samsung Electronics Co., ...

1. A nonvolatile memory device, comprising:a memory cell array including a plurality of nonvolatile memory cells configured to store data therein, wherein each of the nonvolatile memory cells is connected to one of a plurality of word lines and one of a plurality of bit lines of the memory cell array;
a row decoder connected to the word lines and configured to selectively apply at least one word line voltage to at least one of the word lines;
a page buffer connected to the plurality of bit lines; and
a ready/busy signal pin,
wherein the nonvolatile memory device is configured to perform a word line precharge operation by:
causing the ready/busy signal pin to indicate that the nonvolatile memory device is in a precharge busy state wherein the nonvolatile memory device is not available to perform memory access operations for the nonvolatile memory cells;
applying one or more word line precharge voltages to one or more selected word lines among the plurality of word lines to precharge the selected word lines; and
after at least a portion of the word line precharge operation, causing the ready/busy signal pin to transition from indicating the precharge busy state, to indicating that the nonvolatile memory device is in a ready state wherein the nonvolatile memory device is available to perform memory access operations for the nonvolatile memory cells.

US Pat. No. 10,192,619

METHODS FOR PROGRAMMING 1-R RESISTIVE CHANGE ELEMENT ARRAYS

Nantero, Inc., Woburn, M...

1. A method for adjusting the resistive state of a single resistive change element within a resistive change element array, comprising:providing a resistive change element array, said resistive change element array comprising:
a plurality of word lines;
a plurality of bit lines; and
a plurality of resistive change elements, wherein each resistive change element has a first terminal and a second terminal and wherein said first terminal of each resistive change element is in electrical communication with a word line and said second terminal of each resistive change element is in electrical communication with a bit line;
floating all of said bit lines and all of said word lines within said resistive change element array;
selecting one of said plurality of resistive change elements;
driving the bit line in electrical communication with said selected resistive change element to a preselected voltage;
driving the word line in electrical communication with said selected resistive change element to ground;
discharging said bit line in electrical communication with said selected resistive change element through said selected resistive change element to provide a programming current through said selected resistive change element;
wherein said programming current adjusts the electrical resistance of said selected resistive change element from a first resistive state to a second resistive state.

US Pat. No. 10,192,618

NONVOLATILE MEMORY DEVICE AND OPERATING METHOD THEREOF

SAMSUNG ELECTRONICS CO., ...

1. An operating method of a nonvolatile memory device, the method comprising:first storing a first data in a first reference cell and a second data opposite to the first data in a second reference cell, the first reference cell connected to a word line and a first reference bit line and the second reference cell connected to the word line and a second reference bitline;
comparing a voltage of the first reference bit line with a voltage of the second reference bit line to determine whether at least one of the first and second data is abnormally stored in the first and second reference cells after the first storing is performed; and
when it is determined that at least one of the first and second data is abnormally stored in the first and second reference cells, second storing the second data in the first reference cell and the first data in the second reference cell.

US Pat. No. 10,192,617

CIRCUIT AND ARRAY CIRCUIT FOR IMPLEMENTING SHIFT OPERATION

Huawei Technologies Co., ...

1. A circuit for implementing a shift operation, the circuit comprising:a resistive random-access memory, a first switch, a second switch, a third switch, and a fourth switch;
wherein the first switch is closed when a first end of the first switch is at a low level, the second switch is closed when a first end of the second switch is at a high level, the third switch is closed when a first end of the third switch is at a high level, and the fourth switch is closed when a first end of the fourth switch is at a low level;
wherein a second end of the first switch and a second end of the third switch are connected to a negative input end of the resistive random-access memory;
wherein a second end of the second switch and a second end of the fourth switch are connected to a positive input end of the resistive random-access memory;
wherein the first end of the first switch, the first end of the second switch, the first end of the third switch, and the first end of the fourth switch are connected to an output end of a previous-stage circuit for implementing the shift operation;
wherein a third end of the first switch and a third end of the second switch are connected to a bias voltage end; and
wherein a third end of the third switch and a third end of the fourth switch are connected to a ground end.

US Pat. No. 10,192,616

OVONIC THRESHOLD SWITCH (OTS) DRIVER/SELECTOR USES UNSELECT BIAS TO PRE-CHARGE MEMORY CHIP CIRCUIT AND REDUCES UNACCEPTABLE FALSE SELECTS

WESTERN DIGITAL TECHNOLOG...

1. A memory device, comprising:a word line;
a bit line disposed perpendicular to the word line;
a memory element disposed between the word line and the bit line;
a select element coupled to the memory element, wherein the select element is disposed adjacent to the bit line wherein the select element is selected from the group consisting of an ovonic threshold switch (OTS), a doped chalcogenide alloy, a thin film silicon, a metal-metal oxide switch, or a Field Assisted Superlinear Threshold selector (FAST);
a wire that at least partly overlaps the word line, the wire coupled with a voltage source providing a predefined unselect bias voltage; and
a connecting element comprising an undoped polysilicon material disposed between the word line and the wire wherein the connecting element comprises a second memory element and a second select element, wherein the second select element is constructed from one of a RRAM and a MRAM material.

US Pat. No. 10,192,615

ONE-TIME PROGRAMMABLE DEVICES HAVING A SEMICONDUCTOR FIN STRUCTURE WITH A DIVIDED ACTIVE REGION

Attopsemi Technology Co.,...

1. An One-Time Programmable (OTP) memory, comprising:a plurality of OTP cells, at least one of the OTP cells comprising:
a resistive element; and
at least one semiconductor fin structure residing in a common well or on an isolated substrate, the semiconductor fin structure including a plurality of fins, at least one of the plurality of fins being covered by at least one MOS gate to divide the at least one of the plurality of fins into at least a first active region and a second active region, the first active region having a first type of dopant, and the second active region having the first type of dopant or the second type of dopant; the first active region coupled to one end of the resistive element, the other end of the resistive element coupled to a first voltage supply line, the second active region coupled to a second voltage supply line, and the MOS gate coupled to a third voltage supply line,
wherein the first and/or the second active regions of two or more of the plurality of fins are coupled together by at least one extended source/drain, and
wherein the resistive element can be configured to be programmable into a different resistance state by applying voltages to the first, second, and the third voltage supply lines.

US Pat. No. 10,192,614

ADAPTIVE READ THRESHOLD VOLTAGE TRACKING WITH GAP ESTIMATION BETWEEN DEFAULT READ THRESHOLD VOLTAGES

Seagate Technology LLC, ...

1. A device comprising:a controller configured to adjust a read threshold voltage for a memory by performing the following steps, wherein the controller is distinct from the memory:
estimating a gap between two adjacent default read threshold voltages using binary data from the memory;
determining, using the controller, statistical characteristics comprising at least a mean and a standard deviation of each of two adjacent memory levels of the memory based at least in part on a type of statistical distribution of the memory levels, a distribution of data values read from one or more cells using a plurality of discrete read threshold voltages associated with at least one of the two adjacent default read threshold voltages and the gap, wherein each of the plurality of discrete read threshold voltages associated with a first one of the two adjacent default read threshold voltages is obtained by adding a corresponding offset value to the first default read threshold voltage, wherein the corresponding offset values are relative to the first default read threshold voltage, wherein the first default read threshold voltage has a first set of non-zero offset values that are independent of each other;
computing an adjusted read threshold voltage associated with the two adjacent memory levels by using the statistical characteristics of the two adjacent memory levels; and
updating the read threshold voltage with the adjusted read threshold voltage.

US Pat. No. 10,192,613

SEMICONDUCTOR DEVICE

Renesas Electronics Corpo...

1. A semiconductor device comprising:a first memory module;
a second memory module; and
a third memory module,
each of the memory modules having a memory cell array including a plurality of memory cells,
each of the memory modules having a first state to consume less electric power than in a second state, and
the first memory module having a greater number of memory cells than the second memory module;
a first control signal line coupled with the first memory module and the second memory module to transmit a control signal for controlling the first state and the second state to the first memory module and the second memory module;
a second control signal line coupled with the first memory module and the third memory module to transmit the control signal from the first memory module to the third memory module;
wherein a first wiring is disposed in the first memory module, and coupled between the first control signal line and the second control signal line for transmitting the control signal from the first control signal line to the second control signal line via the first wiring, and
wherein the first wiring is coupled with a first MOS transistor in the first memory module.

US Pat. No. 10,192,612

MEMORY CELL OF STATIC RANDOM ACCESS MEMORY BASED ON RESISTANCE HARDENING

Institute of Automation C...

1. A memory cell of static random access memory based on resistance reinforcement comprising a latch circuit and a bit selection circuit, characterized in that the latch circuit consists of two PMOS transistors P1 and P2, two NMOS transistors N1 and N2, a first resistance-capacitance network and a second resistance-capacitance network; the bit selection circuit consists of NMOS transistors N5 and N6; the latch circuit forms four storage nodes X1, X1B, X2, X2B;wherein the first resistance-capacitance network consists of a resistor R1 and a capacitor C1, and the second resistance-capacitance network consists of a resistor R2 and a capacitor C2;
wherein a drain of P1 is connected to X1, a source thereof is connected to a power supply, and a gate thereof is connected to X1B; an input terminal and an output terminal of the first resistance-capacitance network are connected to X1 and X2 respectively, a first terminal of the capacitor C1 of the first resistance-capacitance network being connected to ground and a second terminal of the capacitor C1 of the first resistance-capacitance network being connected to the terminal X1; a drain of N1 is connected to X2, a source thereof is connected to the ground, and a gate thereof is connected to X2B;
wherein a drain of P2 is connected to X1B, a source thereof is connected to a power supply, and a gate thereof is connected to X1; an input terminal and an output terminal of the second resistance-capacitance network are connected to X1B and X2B respectively, a first terminal of the capacitor C2 of the second resistance-capacitance network being connected a ground and a second terminal of the capacitance C2 of the second resistance-capacitance network connected to the terminal X1B; a drain of N2 is connected to X2B, a source thereof is connected to the ground, and a gate thereof is connected to X2;
wherein a drain of N5 is connected to X2 or X1, a drain of N6 is accordingly connected to X2B or X1B; a source of N5 is connected to a bit line BL; a source of N6 is connected to a complementary bit line BLB; gates of N5 and N6 are connected to each other and are connected to a word line WL.

US Pat. No. 10,192,611

SENSING CIRCUIT, SET OF PRE-AMPLIFIERS, AND OPERATING METHOD THEREOF

NATIONAL TSING HUA UNIVER...

1. A set of pre-amplifiers of a sense amplifier, comprising:a first pre-amplifier, coupled to a first input terminal of the sense amplifier; and
a second pre-amplifier, coupled to a second input terminal of the sense amplifier;
wherein the first pre-amplifier and the second pre-amplifier respectively performs a discharging operation to discharge the first input terminal and the second input terminal of the sense amplifier after the first input terminal and the second input terminal of the sense amplifier are charged to a predetermined voltage; and
one of the first pre-amplifier and the second pre-amplifier amplifies a voltage difference between the first input terminal and the second input terminal of the sense amplifier by terminating the discharging operation of another of the first pre-amplifier and the second pre-amplifier;
wherein the first pre-amplifier comprises:
a first switch, having a first terminal, a second terminal, and a control terminal, wherein the first terminal of the first switch is coupled to the predetermined voltage, the second terminal of the first switch is coupled to the first input terminal of the sense amplifier, and the control terminal of the first switch receives a pre-charge signal;
a second switch, having a first terminal, a second terminal, and a control terminal, wherein the first terminal of the second switch is coupled to the second terminal of the first switch and the control terminal of the second switch is coupled to the second input terminal of the sense amplifier;
a third switch, having a first terminal, a second terminal, and a control terminal, wherein the first terminal of the third switch is coupled to the second terminal of the second switch, the second terminal of the third switch is coupled to a ground, and a control terminal of the third switch receives an initializing signal; and
a first capacitor, having a first terminal and a second terminal, wherein the first terminal of the first capacitor is coupled to the second terminal of the second switch.

US Pat. No. 10,192,610

METHODS AND APPARATUS FOR SYNCHRONIZING COMMUNICATION WITH A MEMORY CONTROLLER

Rambus Inc., Sunnyvale, ...

1. An integrated-circuit device comprising:a data transmitter having a data input to receive a data input signal, a timing input to receive a timing signal, and a data output to transmit a data output signal timed to the timing signal;
a strobe transmitter to transmit a transmit-strobe signal synchronized with the timing signal; and
a phase-control circuit to control a phase of the timing signal and the transmit-strobe signal, the phase-control circuit including:
memory to store at least one transmit state setting the phase of the timing signal and the transmit-strobe signal.

US Pat. No. 10,192,609

MEMORY COMPONENT WITH PATTERN REGISTER CIRCUITRY TO PROVIDE DATA PATTERNS FOR CALIBRATION

Rambus Inc., Sunnyvale, ...

1. A controller to control operations of a memory component, the controller comprising:a first circuit to transmit commands to the memory component, the commands including:
a first command that specifies a first data pattern to be stored in a first register of the memory component;
a second command that specifies a second data pattern to be stored in a second register of the memory component; and,
a third command to select one of the first data pattern or the second data pattern to be output by the memory component;
a second circuit to receive, from the memory component as a received data pattern, the one of the first data pattern or the second data pattern output by the memory component, as selected by the third command; and,
calibration circuitry to based on the received data pattern, adjust a timing of a timing reference signal for sampling data at the second circuit.

US Pat. No. 10,192,608

APPARATUSES AND METHODS FOR DETECTION REFRESH STARVATION OF A MEMORY

Micron Technology, Inc., ...

1. An apparatus comprising:a plurality of memory cells; and
a control circuit configured to monitor refresh request commands and to perform an action that prevents unauthorized access to data stored at the plurality of memory cells in response to detection that timing of the refresh request commands has failed to meet a refresh timing limit.

US Pat. No. 10,192,606

CHARGE EXTRACTION FROM FERROELECTRIC MEMORY CELL USING SENSE CAPACITORS

MICRON TECHNOLOGY, INC., ...

1. A method of operating a ferroelectric memory cell, comprising:selecting the ferroelectric memory cell that is in electronic communication with a digit line;
activating a switching component that is in electronic communication with the digit line to virtually ground the digit line, wherein activating the switching component comprises applying a charging voltage to a capacitor when the switching component and the capacitor are connected in parallel;
virtually grounding the digit line; and
activating a sense amplifier that is in electronic communication with the digit line based at least in part on virtually grounding the digit line.

US Pat. No. 10,192,605

MEMORY CELLS AND SEMICONDUCTOR DEVICES INCLUDING FERROELECTRIC MATERIALS

Micron Technology, Inc., ...

1. A semiconductor device, comprising:a ferroelectric material comprising hafnium oxide, zirconium oxide, or a combination thereof, the ferroelectric material configured to exhibit asymmetric characteristics and configured to switch from a first polarization state to a second polarization state responsive to exposure to a first bias voltage and configured to change from the second polarization state to the first polarization state responsive to exposure to a negative bias voltage having a different magnitude than the positive bias voltage.

US Pat. No. 10,192,604

SEMICONDUCTOR MEMORY DEVICE

TOSHIBA MEMORY CORPORATIO...

1. A semiconductor storage device comprising:a cell array including a plurality of memory cells;
a sense amplifier reading data of the memory cell;
write drivers writing data to the memory cell;
a sub cell area including the cell array, the sense amplifier, and the write driver;
a memory area including a plurality of sub cell areas; and
a control circuit, when performing a first operation of supplying a first voltage to a selected sub cell area, supplying first write data to the sub cell area which performs the first operation, for selecting the sub cell area as a target of the first operation.

US Pat. No. 10,192,603

METHOD FOR CONTROLLING A SEMICONDUCTOR MEMORY DEVICE

TOSHIBA MEMORY CORPORATIO...

1. A method for controlling a semiconductor storage device which comprises:a cell array including a plurality of memory cells;
a sense amplifier reading data of the memory cell;
a write driver writing data to the memory cell;
a sub cell area including the cell array, the sense amplifier, and the write driver;
a memory area including a plurality of sub cell areas; and
a control circuit controlling the sense amplifier and the write driver,
the method comprising causing the control circuit to supply first write data to the sub cell area which performs a first operation of supplying a first voltage to a selected sub cell area.

US Pat. No. 10,192,600

STORAGE ELEMENT

Sony Corporation, Tokyo ...

1. A storage element comprising:a layer structure including
a first layer having a first magnetization state of a first material,
a second layer having a second magnetization state of a second material; and
an intermediate layer including a nonmagnetic material and provided between the first layer and the second layer,
wherein the intermediate layer includes a carbon layer and one or more of Bi2O3, MgF2, CaF, SrTiO2, AlLaO3, and AlNO wherein the carbon layer has a thickness of less than 0.5 nm.

US Pat. No. 10,192,599

SEMICONDUCTOR DEVICE

SK hynix Inc., Incheon-s...

1. A semiconductor device comprising:an internal clock generation circuit configured to generate a first internal clock having a cycle corresponding to double a cycle of an external clock and a second internal clock having a substantially opposite phase to a phase of the first internal clock, based on the cycle of the external clock;
a control signal receiver circuit configured to sequentially receive first and second control signals and generate first and second internal control signals, based on the first and second internal clocks;
an on-die termination (ODT) command generation circuit configured to generate an ODT control signal based on results obtained by decoding the first and second internal control signals; and
an internal command generation circuit configured to generate first and second internal commands based on the ODT control signal and the decoding results of the first and second internal control signals.

US Pat. No. 10,192,596

APPARATUSES INCLUDING MULTIPLE READ MODES AND METHODS FOR SAME

Micron Technology, Inc., ...

1. An apparatus, comprising:an input-output control circuit;
a memory array configured to store data, the memory array further including signal lines for accessing memory of the memory array;
control logic coupled to the input-output control circuit and the memory array, the control logic configured to provide, in a first mode, internal control signals responsive to receiving a read command that controls activation of a charge pump circuit to develop a full pumped voltage prior to driving signal lines to a target signal line voltage based on the full pumped voltage, and
wherein the control logic is configured to provide, in a second mode, internal control signals prior to receiving a read command that controls the charge pump circuit to develop a ready pumped voltage that is less than the full pumped voltage, the control logic further configured to provide control signals to control the ready pumped voltage based on temperature compensation information of the memory array.

US Pat. No. 10,192,595

LEVEL SHIFTER AND OPERATION METHOD THEREOF

SK Hynix Inc., Gyeonggi-...

1. A level shifter, comprising:an input control unit suitable for outputting an output control signal according to a pulse width of a data signal and a pulse width of an input control signal; and
an output control unit suitable for controlling an output driving signal according to the output control signal.

US Pat. No. 10,192,594

SEMICONDUCTOR DEVICE

Renesas Electronics Corpo...

1. A semiconductor device comprising:a booster circuit configured to boost an input voltage and generate a first boosted voltage;
a voltage hold circuit configured to hold a second boosted voltage having a smaller absolute value than the first boosted voltage;
a first output terminal configured to output the first boosted voltage as first output;
a second output terminal configured to output the second boosted voltage as second output;
a first switch that is placed between the first output terminal and the second output terminal; and
a control circuit configured to generate a switch signal for switching the first switch from close to open in response to an output voltage of the booster circuit reaching a hold voltage level set to the voltage hold circuit,
wherein during a first period when the switch signal indicates close of the first switch, the voltage hold circuit is further configured to increase or decrease a voltage value of the second boosted voltage to be output in accordance with the output voltage of the booster circuit, and during a second period at a point in time when the switch signal indicates open of the first switch, the second boosted voltage has a particular value, and the voltage hold circuit is further configured to maintain the particular voltage value of the second boosted voltage after the first switch is open,
wherein the voltage hold circuit includes:
a plurality of voltage hold circuits,
the first switch includes a plurality of first switches corresponding to the plurality of voltage hold circuits, and
the control circuit outputs the switch signal to a pair of the first switch and the voltage hold circuit to which the hold voltage level corresponding to a detected voltage value of the output voltage of the booster circuit is set each time the output voltage of the booster circuit reaches a plurality of hold voltage levels respectively set to the plurality of voltage hold circuits, and
wherein the control circuit includes:
a first resistor and a second resistor that are connected in series between a boost node at which the output voltage of the booster circuit is generated and a bias terminal through which a specified voltage is supplied,
a third resistor that is connected in series with the first resistor and the second resistor and includes a plurality of resistors connected in parallel,
a comparator configured to compare a detection target voltage generated at a connection node between the first resistor and the second resistor with a preset reference voltage, and
a detection voltage control circuit configured to enable any one of a plurality of switch signals in response that an output of the comparator becomes enabled, and
the detection voltage control circuit switches a resistor to be short-circuited among the plurality of resistors included in the third resistor at the same time as enabling any one of the plurality of switch signals.

US Pat. No. 10,192,593

RECEPTION CIRCUIT FOR REDUCING CURRENT AND ELECTRONIC APPARATUS INCLUDING THE SAME

SK hynix Inc., Icheon-si...

1. An electronic apparatus comprising:a system control circuit configured to generate a plurality of first control signals individually provided to a plurality of chips and a second control signal commonly and simultaneously provided to the plurality of chips; and
the plurality of chips each including a reception circuit configured to generate a reception control signal in response to the first control signal and selectively receive the second control signal in response to the reception control signal,
wherein the reception circuit comprises:
a controller configured to generate the reception control signal based on the first control signal;
a first buffer configured to receive the second control signal; and
a delay circuit configured to receive the second control signal from the first buffer in response to the reception control signal and provide the second control signal to other elements in the chips.

US Pat. No. 10,192,592

SYSTEMS AND METHODS INVOLVING DATA BUS INVERSION MEMORY CIRCUITRY, CONFIGURATION AND/OR OPERATION INCLUDING DATA SIGNALS GROUPED INTO 10 BITS AND/OR OTHER FEATURES

GSI TECHNOLOGY, INC., Su...

1. A DRAM device involving data signals grouped into 10 bits, the device comprising:a memory core;
input circuitry that receives a data bus inversion (DBI) bit associated with a data signal as input directly, without transmission through DBI logic associated with an input buffer;
circuitry, including one or both of section circuitry and memory circuitry, that stores the DBI bit into the memory core, reads the DBI bit from the memory core, and provides the DBI bit as output, wherein the memory device stores and processes the DBI bit on an internal data bus as a regular data bit; and
a data buffering circuit coupled to the memory core, the data buffering circuit including a write buffer comprising a data register positioned between the input circuitry and the DBI logic and storing the data to be written into the memory core on a later cycle, an address register storing addresses corresponding to the stored data signal, and a comparator comparing a read address to the addresses stored in the write buffer,
wherein data from the data register is retrieved as an output data signal instead of data from the DBI logic when the comparator determines that the address stored in the address register matches the read address, thereby causing the output data signal to bypass the DBI logic.

US Pat. No. 10,192,591

MEMORY DEVICES HAVING SPECIAL MODE ACCESS

Micron Technology, Inc., ...

1. A memory device comprising a register, a memory array, and a serial interface controller configured to receive and operate using a serial message to access the register that controls operation of the memory array by storing bits, the serial message having a format that comprises:a command field of the serial message configured to enable the serial interface controller to access the register;
a register address field of the serial message immediately following the command field indicating an address of the register; and
a data field of the serial message immediately following the register address field;
wherein the serial interface controller is configured to receive the serial message, wherein the command field of the serial message comprises a command that the serial interface controller is configured to interpret as enabling write access to a special mode enable register of the memory device, wherein the address of the register is configured to identify the special mode enable register, wherein the data field of the serial message comprises data to be written into the special mode enable register that is configured, when written into the special mode enable register, to cause the memory device to operate according to a special mode of operation, wherein the special mode of operation comprises a one time programmable (OTP) access mode, a parameter page access mode, or a block lock access mode, or any combination thereof.

US Pat. No. 10,192,588

METHOD, DEVICE, AND COMPUTER-READABLE MEDIUM FOR TAGGING AN OBJECT IN A VIDEO

VIVOTEK INC., New Taipei...

1. A method for tagging an object in a video, comprising:playing a video, wherein the video has a plurality of frames and the plurality of frames have a plurality of first frames showing a plurality of objects;
selecting a target object in a playing frame of the plurality of frames by a cursor, wherein the playing frame is one of the first frames, and the target object is one of the objects;
obtaining, from an object meta data, a plurality of bounding boxes that correspond to the target object and a plurality of timestamps that belong to the individual bounding boxes, wherein the timestamps correspond to the target frames of the first frames showing the objects respectively, and each target frame is the first frame showing the object identical to the target object;
showing a selectable area in the playing frame according to the bounding box corresponding to the timestamp of the playing frame;
generating at least one tag function item linking to the selectable area;
tagging the target frame for the timestamp belonging to each of the bounding boxes according to the bounding boxes when the one of the at least one tag function item is selected;
showing a sub timeline of the target object on a main timeline of the video according to the timestamps correspond to the target frames;
moving the cursor to a selected thumbnail image of a plurality of thumbnail images of the main timeline;
generating at least one timeline adjusting item, wherein the at least one timeline adjusting item comprises a mark-in item;
linking the at least one timeline adjusting item to the selected thumbnail image;
displaying the at least one timeline adjusting item;
receiving a selected signal of the mark-in item; and
resetting a start time and/or an end time of the sub timeline according to the selected signal and the selected thumbnail image.

US Pat. No. 10,192,587

MOVIE ADVERTISING PLAYBACK SYSTEMS AND METHODS

Open Text SA ULC, Halifa...

1. A method of video production, comprising:receiving, in playback of a video, a command from a viewer to advance the play of the video, wherein advancement of the play of the video skips a proxy advertisement in the video, the receiving performed by a video player device having a transcoder embodied in at least one physical unit;
responsive to the command from the viewer to advance the play of the video, determining a location in the video to resume playback of the video, the determining performed by the video player device;
moving the proxy advertisement to the location in the video determined by the video player device, the moving performed by the video player device, the proxy advertisement including an ad request;
sending the ad request to an advertisement server, the sending performed by the video player device;
receiving an advertisement from the advertisement server, the receiving performed by the video player device; and
delivering the advertisement received from the advertisement server to the location in the video indicated by the proxy advertisement, the delivering performed by the video player device, the video player device to play the advertisement at the location.

US Pat. No. 10,192,586

INFORMATION ENTRY METHOD AND DEVICE

HUIZHOU UNIVERSITY, Huiz...

1. An information entry method, comprising:step a): acquiring in real-time motion data from a device comprising a sensor, a processor, a recorder and a microphone, wherein the sensor comprises (i) an accelerometer to detect an acceleration of a user, (ii) a velocimeter to sense a speed of the user, (iii) a gyroscope to sense a direction of the user, and (iv) a GPS component to sense a position of the user;
step b): determining, executed by the processor, whether the device detects a change from a first motion status at a first time interval to a second motion status at a second time interval based on the motion data from the sensor, wherein the change comprises differences in (a) the acceleration of the user, (b) the speed of the user, (c) the direction of the user and (d) the position of the user; if so, activating, executed by the processor, the recorder of the device when (1) each of the differences is larger than a respective predetermined threshold and (2) the device is shaken regularly, thereby activating the recorder to prepare for recording without performing a touch operation on the device;
wherein the differences include:
(A) acceleration data change when the device changes from a first instantaneous acceleration at a first time t1 to a second instantaneous acceleration at a second time t2;
(B) speed data change when the device changes from a first average speed within the first time interval to a second average speed within the first time interval;
(C) direction data change when the device changes from having direction changes within the second time interval to having no direction changes within the second time interval; and
(D) position data change when the device changes from having position changes within a third time interval to having no position changes within the third time interval;
wherein the acceleration data change, the speed data change, the direction data change and the position data change are acquired in real time; and
wherein shaking of the device corresponds to adding a trigger condition for activating the recording module, and the trigger condition adds an extra interaction for the user, thereby avoiding unnecessary activation to the recorder and reducing unnecessary energy consumption,
step c): recording in real-time user's voice input through the recorder of the device;
step d): stopping recording according to a preset voice instruction of stopping recording, wherein the preset voice instruction of stopping recording is collected through the microphone of the device;
wherein the first motion state corresponds to a running or trotting status of the user, and the second motion status corresponds to a walking status of the user.

US Pat. No. 10,192,584

COGNITIVE DYNAMIC VIDEO SUMMARIZATION USING COGNITIVE ANALYSIS ENRICHED FEATURE SET

International Business Ma...

1. A method of providing a summary of a media production comprising:receiving the media production in computer-readable form, by executing first instructions in a computer system;
dividing the media production into original segments having respective time stamps indicating a time order of the original segments, by executing second instructions in the computer system;
conducting a cognitive analysis of each of the original segments to extract at least one cognitive feature associated with each original segment, by executing third instructions in the computer system;
grouping the original segments into multiple clusters based on the cognitive features by identifying one or more predominant features for each given cluster based on segments making up the given cluster, by executing fourth instructions in the computer system;
selecting a representative segment for each of the clusters based on one or more selection factors which include a distance of a given segment to a centroid of its corresponding cluster, an emotion level of the given segment, an audio uniqueness of the given segment, or a video uniqueness of the given segment wherein the representative segment for a given cluster corresponds to one of the original segments within the given cluster, by executing fifth instructions in the computer system; and
combining the representative segments in time order according to their time stamps to form a media summary, by executing sixth instructions in the computer system.

US Pat. No. 10,192,582

AUTOMATIC GENERATION OF TIME-LAPSE VIDEOS

ADOBE INC., San Jose, WA...

1. One or more computer storage media storing computer-useable instructions that, when used by one or more computing devices, cause the one or more computing devices to perform operations to facilitate generation of time-lapse videos, the method comprising:analyzing frames of a photographic input to detect activity occurring across frame pairs, the photographic input being input for which a time-lapse video is to be generated, wherein a length of the time-lapse video is shorter than a length of the photographic input;
identifying a threshold of activity change based on a function associated with the length of the time-lapse video and a global extent of activity across the frames of the photographic input, wherein the threshold of activity change is inversely correlated to the length of the time-lapse video;
utilizing the threshold of activity change and activity detected across frame pairs to automatically select a plurality of the frames to use in generating the time-lapse video; and
generating the time-lapse video based on the plurality of frames.

US Pat. No. 10,192,581

REPRODUCING DEVICE

SHARP KABUSHIKI KAISHA, ...

1. A reproducing device capable of reproducing content from an optical information recording medium in which the content is recorded in a form of a pit group including one or more pits shorter than an optical system resolution limit of the reproducing device, comprising:an irradiation section for irradiating the optical information recording medium with reproduction light;
a conversion section for converting, into reproduction signal indicative of the content, light which reflected off the optical information recording medium;
a signal quality evaluating section for evaluating quality of the reproduction signal converted by the conversion section; and
a spherical aberration correcting section for correcting a spherical aberration caused by the irradiation section, by using a result of evaluation of the quality of the reproduction signal which quality has been evaluated by the signal quality evaluating section; wherein
the signal quality evaluating section is an i-MLSE (Integrated-Maximum Likelihood Sequence Estimation) detecting section for (a) detecting an i-MLSE which is an evaluation index for evaluating a signal characteristic of the reproduction signal and (b) evaluating quality of the reproduction signal,
the optical information recording medium has a BCA (Burst Cutting Area) recording region, and
the reproducing device further comprises a BCA reproduction control section for reproducing information recorded in the BCA recording region.

US Pat. No. 10,192,579

FLUID DYNAMIC BEARING MOTORS WITH DIFFERENT WIDTH PUMP SEALS AND JOURNAL BEARINGS

Seagate Technology LLC, ...

1. A motor comprising:a shaft positioned adjacent a sleeve for relative rotation, wherein the sleeve includes a first radial recirculation channel, and wherein the shaft and the sleeve form:
a first gap containing fluid forming a first seal, positioned above the first radial recirculation channel, and having a width measured between the shaft and the sleeve,
wherein one of the shaft and the sleeve includes grooves at the first gap configured to pump fluid towards a journal bearing, and
a second gap containing fluid forming the journal bearing, positioned below the first radial recirculation channel, and having a width measured between the shaft and the sleeve,
wherein the width of the first gap is greater than the width of the second gap.

US Pat. No. 10,192,578

SENSORLESS MONITORING OF LASER POWER INSTABILITY IN A HEAT-ASSISTED MAGNETIC RECORDING HEAD

Seagate Technology LLC, ...

1. A method, comprising:operating a laser diode of a heat-assisted magnetic recording apparatus at each of a plurality of different constant currents during a write operation;
monitoring a forward voltage across the laser diode while operating the laser diode at each of the plurality of constant currents during the write operation;
detecting a change in the forward voltage indicative of laser power instability due to mode hopping;
determining temperature boundaries for each of the different constant currents where the forward voltage change is detected; and
avoiding the temperature boundaries during write operations.

US Pat. No. 10,192,577

WRITE POLE COATING LAYER

Seagate Technology LLC, ...

1. An apparatus, comprising:a slider having a media-facing surface and configured for heat-assisted magnetic recording, the slider comprising:
a write pole including two or more sides extending into the slider and a pole tip at the media-facing surface;
a heatsink layer proximate at least part of the two or more sides where a first portion of the heatsink layer is proximate the pole tip; and
a diffusing metal disposed proximate the write pole and configured to diffuse through the write pole toward the media-facing surface.

US Pat. No. 10,192,576

METHOD AND APPARATUS THAT MODIFIES SEEKS TO REMEDIATE INTER-ACTUATOR COUPLING IN A STORAGE DRIVE

Seagate Technology LLC, ...

1. A method, comprising:determining a faulty tracking condition affecting a first head driven by a first actuator of a hard disk drive, the faulty tracking condition caused by a second actuator of the hard disk drive that is moving while the first actuator is performing a tracking operation:
responsive to the determination of the faulty tracking condition, reducing seek forces of the second actuator that cause the faulty tracking condition affecting the first head; and
verifying that similar faulty tracking conditions are reduced with the first head responsive to the reduction in seek forces.

US Pat. No. 10,192,575

SPLIT ACTUATOR WITH MULTIPLE HEAD STACK ASSEMBLIES BONDED TO BEARING SLEEVES

Seagate Technology LLC, ...

1. An apparatus, comprising:at least one actuator shaft;
first and second head stack assemblies coaxially located on the at least one actuator shaft, the first and second head stack assemblies each comprising:
at least one bearing having an inner race coupled to an outer surface of the at least one actuator shaft;
a bearing sleeve surrounding an outer race of the at least one bearing;
an E-block surrounding the bearing sleeve;
an annular gap between the E-block and the outer race of the at least one bearing;
a ring of bonding material filling the annular gap;
an access gap providing a fluid path to the annular gap from at least one of a top and a bottom of the E-block; and
a groove fluidly coupled to the annular gap and facing away from the access gap, the groove encompassing a greater volume than that of the annular gap.

US Pat. No. 10,192,574

DEVICES INCLUDING A DIFFUSION BARRIER LAYER

Seagate Technology LLC, ...

1. A device having an air bearing surface (ABS), the device comprising:a write pole;
a near field transducer (NFT) comprising a peg and a disc, wherein the peg is at the ABS of the device;
a heat sink positioned adjacent the disc of the NFT;
a dielectric gap positioned adjacent the peg of the NFT at the ABS of the device;
a conformal diffusion barrier layer, wherein the conformal diffusion barrier layer forms at least one angle that is not greater than 135°; and
a peg coupler layer,
wherein the conformal diffusion barrier layer is positioned adjacent the write pole,
the peg coupler layer is positioned between the conformal diffusion barrier layer and the dielectric gap, the disc and the heat sink, and
the dielectric gap and the disc are positioned between the peg coupler layer and the heat sink and the peg.

US Pat. No. 10,192,573

DEVICES INCLUDING METAL LAYER

Seagate Technology LLC, ...

1. A device having an air bearing surface (ABS), the device comprising:a write pole;
a near field transducer (NFT) comprising a peg and a disc, wherein the peg is at the ABS of the device;
a metallic layer positioned over at least the peg of the NFT at the ABS, the metallic layer comprising: iridium (Ir), chromium (Cr), tin (Sn), platinum (Pt), or combinations thereof;
an adhesion layer comprising silicon (Si), chromium (Cr), titanium (Ti), tantalum (Ta), zirconium (Zr), niobium (Nb), neodymium (Nd), hafnium (Hf), nickel (Ni), or combinations thereof; and
an overcoat positioned over at least the metallic layer,
wherein the adhesion layer is positioned between at least the metallic layer and the overcoat layer.

US Pat. No. 10,192,572

MAGNETIC RECORDING HEAD WITH SPECIFIED THICKNESS AND SATURATION MAGNETIC FLUX DENSITY PRODUCTS FOR STO MAGNETIC LAYERS

Kabushiki Kaisha Toshiba,...

1. A magnetic recording and reproducing device, comprising:a magnetic recording head; and
a controller,
the magnetic recording head including:
a magnetic pole;
a shield;
a stacked body including
a first magnetic layer provided between the magnetic pole and the shield,
a second magnetic layer provided between the first magnetic layer and the shield, and
an intermediate layer provided between the first magnetic layer and the shield, the intermediate layer being non-magnetic; and
a first non-magnetic layer provided between the second magnetic layer and the shield, the first non-magnetic layer contacting the shield and the second magnetic layer,
the first magnetic layer having a first thickness and a first saturation magnetic flux density, the first thickness being along a first direction from the second magnetic layer toward the first magnetic layer,
the second magnetic layer having a second thickness along the first direction and a second saturation magnetic flux density, and
a second product of the second thickness and the second saturation magnetic flux density being larger than a first product of the first thickness and the first saturation magnetic flux density,
the controller is configured to flow a current in the stacked body from the second magnetic layer toward the first magnetic layer,
wherein
in a first state, a first magnetic pole magnetic field is generated from the magnetic pole, the first magnetic pole magnetic field having a component along the first direction,
in a second state, a second magnetic pole magnetic field is generated from the magnetic pole, the second magnetic pole magnetic field having a component along a second direction from the first magnetic layer toward the second magnetic layer, and
in the first state, magnetization of the first magnetic layer has a component along the second direction.

US Pat. No. 10,192,570

MAGNETIC DISK DEVICE AND WRITE METHOD

Kabushiki Kaisha Toshiba,...

1. A magnetic disk device comprising:a disk;
a head configured to write data on the disk; and
a controller configured to
generate a target trajectory of the head in a circumferential direction for writing to a plurality of sectors in a current track, wherein the target trajectory is based on an actual trajectory of the head for writing to a plurality of sectors in a previously written track that is adjacent to the current track;
determine that the previously written track is discontinuous between an initial sector of the previously written track and an end sector of the previously written track by a radial offset;
based on the radial offset, generate a corrected trajectory for writing the plurality of sectors in the current track; and
control a position of the head in a radial direction based on the corrected trajectory while writing to the plurality of sectors in the current track.

US Pat. No. 10,192,569

INFORMING A SUPPORT AGENT OF A PARALINGUISTIC EMOTION SIGNATURE OF A USER

INTUIT INC., Mountain Vi...

1. A computer-implemented method for assisting a support agent assigned to interact with a user during a support encounter, comprising:receiving, at a computing device, an audio stream comprising audio of a user interacting with an application;
evaluating the audio stream to identify a collection of paralinguistic information present in the audio stream, wherein the paralinguistic information comprises a set of descriptors characterizing acoustic aspects of the audio that are distinct from verbal content of the audio;
determining, from the paralinguistic information, one or more attribute measures associated with the user interacting with the application; and
upon receiving a request to initiate a support encounter:
generating, before a support agent assigned to handle the support encounter interacts with the user and based on evaluating at least one of the attribute measures with an uplift model, a set of activities for the support agent to use when interacting with the user that increases a likelihood of achieving a specified outcome for the support encounter;
providing information content on a support agent interface before the support agent interacts with the user, the information content comprising the one or more attribute measures determined from the paralinguistic information and the generated set of activities, wherein the one or more attribute measures comprises an emotional state of the user responsive to at least one content item provided by the application; and
generating, before the support agent interacts with the user, a mockup of the application on the support agent interface, the mockup comprising the at least one content item.

US Pat. No. 10,192,568

AUDIO SOURCE SEPARATION WITH LINEAR COMBINATION AND ORTHOGONALITY CHARACTERISTICS FOR SPATIAL PARAMETERS

Dolby Laboratories Licens...

1. A method of audio source separation from audio content, the method comprising:determining a spatial parameter of an audio source, wherein the determining comprises:
determining a power spectrum parameter of the audio source based on one of a linear combination characteristic of the audio source and an orthogonality characteristic of two or more audio sources to be separated in the audio content;
updating the power spectrum parameter based on the other of the linear combination characteristic and the orthogonality characteristic; and
determining the spatial parameter of the audio source based on the updated power spectrum parameter; and
separating the audio source from the audio content based on the spatial parameter.

US Pat. No. 10,192,567

ECHO CANCELLATION AND SUPPRESSION IN ELECTRONIC DEVICE

Motorola Mobility LLC, C...

8. A portable device comprising:an audio playback subsystem comprising a first speaker;
a first microphone;
an echo cancellation and echo suppression system communicatively coupled to the audio playback subsystem and the first microphone and comprising:
a dual channel echo cancellation stage comprising:
an adaptive filter that receives a first reference signal from a first channel based on an audio playback component of a portable device and that receives an echo signal from a second channel based on a microphone signal of the portable device and which generates an adaptively filtered first reference signal;
a least mean squares filter that calculates adaptive filter weights for the adaptive filter;
a subtraction component that subtracts the adaptively filtered first reference signal from the first microphone from an echo signal to create an error signal; and
a dual channel echo suppression stage that receives the adaptively filtered first reference signal and the error signal and that:
detects spectral energy in the adaptively filtered first reference signal and in the error signal;
calculates echo-to-speech ratio (ESR) of the spectral energy; and
adjusts spectral gain of the error signal based on the ESR to generate a first output signal.

US Pat. No. 10,192,566

NOISE REDUCTION IN AN AUDIO SYSTEM

Sorenson IP Holdings, LLC...

15. A method comprising:obtaining a plurality of microphone signals derived from a microphone array that includes a plurality of omnidirectional microphones, each of the plurality of microphone signals being derived from a different microphone of the microphone array;
determining that the plurality of microphone signals include noise based on two or more of the plurality of microphone signals; and
selecting a reduced-noise signal instead of a beamformed signal as all of an output signal based on determining that the plurality of microphone signals include noise, the beamformed signal is based on beamforming of two or more of the plurality of microphone signals and the reduced-noise signal is based on an averaging of two or more of the plurality of microphone signals or is based on only one of the plurality of microphone signals.

US Pat. No. 10,192,565

CROSS PRODUCT ENHANCED HARMONIC TRANSPOSITION

Dolby International AB, ...

1. A system for decoding an audio signal, the system comprising:a core decoder for decoding a low frequency component of the audio signal;
an analysis filter bank for providing a plurality of analysis subband signals of the low frequency component of the audio signal;
a subband selection reception unit for receiving information associated with a fundamental frequency ? of the audio signal, and for selecting, in response to the information, a first analysis subband signal and a second analysis subband signal from the plurality of analysis subband signals;
a non-linear processing unit to generate a synthesis subband signal from the first analysis subband signal and the second analysis subband signal by modifying the phase of the first analysis subband signal and modifying the phase of the second analysis subband signal, and by combining the phase-modified first analysis subband signal and the phase-modified second analysis subband signal; and
a synthesis filter bank for generating a high frequency component of the audio signal from the synthesis subband signal;
wherein the information associated with the fundamental frequency ? of the audio signal is received in an encoded bit stream.

US Pat. No. 10,192,564

SIGNAL QUALITY-BASED ENHANCEMENT AND COMPENSATION OF COMPRESSED AUDIO SIGNALS

Harman International Indu...

1. A system for treatment of compressed audio signals, comprising:a processor;
a sampler executable by the processor to divide an audio signal into a series of sequential samples;
a signal quality detector executable by the processor to identify a consistent brick wall frequency of the audio signal spanning a plurality of the sequential samples at an outset of the audio signal and to determine a signal treatment indication proportional to the brick wall frequency; and
a signal enhancer executable by the processor to
sequentially receive and analyze one or more sample components of the audio signal to identify lost parts of the audio signal in the one or more sample components of respective sequential samples, and
apply to the audio signal, at a level in accordance with the signal quality indication, a corresponding signal treatment for each of the one or more sample components of respective sequential samples having a corresponding identified lost part.

US Pat. No. 10,192,563

APPARATUS AND METHOD FOR SCREEN RELATED AUDIO OBJECT REMAPPING

Fraunhofer-Gesellschaft z...

1. An apparatus for generating loudspeaker signals, comprising:an object metadata processor, and
an object renderer,
wherein the object renderer is configured to receive an audio object,
wherein the object metadata processor is configured to receive metadata, comprising an indication on whether the audio object is screen-related, and further comprising a first position of the audio object,
wherein the object metadata processor is configured to calculate a second position of the audio object depending on the first position of the audio object and depending on a size of a screen if the audio object is indicated in the metadata as being screen-related,
wherein the object renderer is configured to generate the loudspeaker signals depending on the audio object and depending on position information,
wherein the object metadata processor is configured to feed the first position of the audio object as the position information into the object renderer if the audio object is indicated in the metadata as being not screen-related, and
wherein the object metadata processor is configured to feed the second position of the audio object as the position information into the object renderer if the audio object is indicated in the metadata as being screen-related.

US Pat. No. 10,192,562

CROSS PRODUCT ENHANCED SUBBAND BLOCK BASED HARMONIC TRANSPOSITION

Dolby International AB, ...

1. A system configured to generate a time stretched and/or frequency transposed signal from an input signal, the system comprising one or more processing elements that:derive a number Y?1 of analysis subband signals from the input signal, wherein each analysis subband signal comprises a plurality of complex-valued analysis samples, each having a phase and a magnitude;
generate a synthesis subband signal from the Y analysis subband signals using a subband transposition factor Q and a subband stretch factor S, at least one of Q and S being greater than one by:
forming Y frames of L input samples, each frame being extracted from said plurality of complex-valued analysis samples in an analysis subband signal and the frame length being L>1, wherein at least one of the L input samples is derived by interpolating two or more of the plurality of complex-valued analysis samples;
applying a block hop size of h samples to said plurality of analysis samples, prior to forming a subsequent frame of L input samples, thereby generating a sequence of frames of input samples;
generating, on the basis of Y corresponding frames of input samples formed by the block extractor, a frame of processed samples by determining a phase and magnitude for each processed sample of the frame, wherein, for at least one processed sample:
i) the phase of the processed sample is based on the respective phases of the corresponding input sample in each of the Y frames of input samples; and
ii) the magnitude of the processed sample is determined as a mean value of the magnitude of the corresponding input sample in a first frame of the Y frames of input samples and the magnitude of the corresponding input sample in a second frame of the Y frames of input samples; and
determining the synthesis subband signal by overlapping and adding the samples of a sequence of frames of processed samples; and
generate the time stretched and/or frequency transposed signal from the synthesis subband signal, wherein the system is operable at least for Y=2.

US Pat. No. 10,192,561

AUDIO PROCESSOR AND METHOD FOR PROCESSING AN AUDIO SIGNAL USING HORIZONTAL PHASE CORRECTION

Fraunhofer-Gesellschaft z...

1. An audio processor for processing an audio signal comprising:an audio signal phase measure calculator configured for calculating a phase measure of an audio signal for a time frame;
a target phase measure determiner for determining a target phase measure for said time frame;
a phase corrector configured for correcting phases of the audio signal for the time frame using the calculated phase measure and the target phase measure to achieve a processed audio signal,
wherein the phase corrector is configured for forming a vector of deviations, wherein a first element of the vector refers to a first deviation for the first subband of the plurality of subbands and a second element of the vector refers to a second deviation for the second subband of the plurality of subbands from a previous time frame to a current time frame, and wherein the phase corrector is configured to apply the vector of deviations to the phases of the audio signal, wherein the first element of the vector is applied to a phase of the audio signal in a first subband of a plurality of subbands of the audio signal and the second element of the vector is applied to a phase of the audio signal in a second subband of the plurality of subbands of the audio signal, or
wherein the target phase measure determiner is configured for achieving a fundamental frequency estimate for a time frame, for calculating a frequency estimate for each subband of the plurality of subbands of the time frame using the fundamental frequency for the time frame, for forming a vector of frequency estimates for each subband of the plurality of subbands, wherein the first element of the vector refers to a frequency estimate for a first subband and a second element of the vector refers to a frequency estimate for a second subband, and for calculating the frequency estimate using multiples of the fundamental frequency, wherein the frequency estimate of the current subband is that multiple of the fundamental frequency which is closest to the center of the subband, or wherein the frequency estimate of the current subband is a border frequency of the current subband if none of the multiples of the fundamental frequency are within the current subband.

US Pat. No. 10,192,560

ROBUST SPECTRAL ENCODING AND DECODING METHODS

Digimarc Corporation, Be...

1. A device for decoding a digital watermark embedded in an audio signal, wherein the digital watermark is embedded in the audio signal by adjusting signal values, the device comprising:a memory in which is stored blocks of the audio signal;
a processor in communication with the memory to obtain blocks of the audio signal, the processor configured with instructions to:
perform an initial synchronization of the digital watermark, distorted due to time scale change, by converting blocks of the audio to frequency domain data, pre-filtering the frequency domain data to produce first pre-filtered blocks, summing the first pre-filtered blocks to produce a first accumulated block, the first pre-filtered blocks being selected over a sufficiently long block of audio such that plural instances of watermark signal representing the same code at different time locations are accumulated, and correlating the first accumulated block with a pattern to detect a time scale of an embedded code signal; and
perform decoding of variable code data of the digital watermark at the detected time scale by correlating phase of the audio signal at the detected shift with a data signal pattern, wherein the processor is configured with instructions to decode the variable code data by correlating phase of the audio signal with a synchronization code signal to identify a start position of the variable code, and correlating phase of the audio signal with data code signals to detect data code signals encoded as the variable code data of the digital watermark.

US Pat. No. 10,192,558

ADAPTIVE GAIN-SHAPE RATE SHARING

Telefonaktiebolaget LM Er...

1. A method in an encoder for allocating bits to a gain adjustment quantizer and a shape quantizer to be used for encoding a gain shape vector for a received audio signal, the method comprising:determining a current bitrate and a value for a first signal property of the audio signal;
identifying a bit allocation for the gain adjustment quantizer and the shape quantizer for the determined current bitrate and the determined value for the first signal property, by using information from a table indicating a number of bits to be allocated to the gain adjustment quantizer and the shape quantizer for each of a plurality of combinations of bitrate and values for the first signal property; and
applying the identified bit allocation when encoding the gain shape vector.

US Pat. No. 10,192,557

ELECTRONIC DEVICE AND METHOD FOR VOICE RECOGNITION USING A PLURALITY OF VOICE RECOGNITION ENGINES

Samsung Electronics Co., ...

1. A method of performing voice recognition by an electronic device including a first voice recognition device and a second voice recognition device, the method comprising:when an audio signal is not output from the electronic device, receiving a first voice by the first voice recognition device of the electronic device;
when an audio signal is output from the electronic device, receiving the first voice by the second voice recognition device of the electronic device;
when the first voice is received by the first voice recognition device and the first voice recognition device recognizes a predetermined command in the first voice, transferring a received second voice to an external electronic device and receiving a result of recognizing the received second voice from the external electronic device; and
when the first voice is received by the second voice recognition device and the second voice recognition device recognizes the predetermined command in the first voice, recognizing a second command in the received second voice, and performing an operation based on the recognized second command.

US Pat. No. 10,192,556

SPEECH RECOGNITION WITH ACOUSTIC MODELS

Google LLC, Mountain Vie...

1. A computer implemented method comprising:receiving, by one or more computers, an acoustic sequence, the acoustic sequence representing an utterance, and the acoustic sequence comprising a sequence of multiple frames of acoustic data at each of a plurality of time steps;
stacking, by the one or more computers, one or more frames of acoustic data to generate a sequence of modified frames of acoustic data;
subsampling, by the one or more computers, the sequence of modified frames of acoustic data to generate a sequence of subsampled modified frames by removing one or more modified frames from the sequence of modified frames; and
processing, by the one or more computers, the sequence of subsampled modified frames of acoustic data through an acoustic modeling neural network to generate as output, for each subsampled modified frame, a set of scores for the subsampled modified frame, the set of scores for the subsampled modified frame comprising (i) a respective score for each of a plurality of vocabulary phonemes and (ii) a score for a blank character, the score for each vocabulary phoneme representing a respective likelihood that the vocabulary phoneme represents the utterance at the subsampled modified frame and the score for the blank character representing a likelihood that the utterance at the subsampled modified frame is incomplete.

US Pat. No. 10,192,555

DYNAMIC SPEECH RECOGNITION DATA EVALUATION

MICROSOFT TECHNOLOGY LICE...

1. A method of dynamically providing speech recognition data from a client computing device to a server computing device, the method comprising:receiving audio input at the client computing device;
processing the audio input to generate the speech recognition data;
determining a first estimated confidence level for a first identified portion of the speech recognition data comprising a first feature vector, wherein the first estimated confidence level exceeds a predetermined confidence threshold that corresponds to a valid result;
based on determining that the first estimated confidence level corresponds to the valid result, continuing to process the speech recognition data with the first identified portion;
determining a second estimated confidence level for a second identified portion of the speech recognition data comprising a second feature vector, wherein the second estimated confidence level also exceeds the predetermined confidence threshold that corresponds to the valid result;
identifying at least one statistically improbable characteristic associated with the second feature vector;
determining that the client computing device comprises a first feature extractor;
comparing the first feature extractor of the client computing device with a second feature extractor utilized by the server computing device;
based on comparing the first feature extractor of the client computing device with the second feature extractor utilized by the server computing device, determining that the second feature extractor of the server computing device is different from the first feature extractor;
based on (1) determining the second estimated confidence level corresponds to the valid result, (2) identifying the at least one statistically improbable characteristic, and (3) determining that the server computing device comprises the second feature extractor different from the first feature extractor, providing the second feature vector to the server computing device for an evaluation of the second feature vector by the second, different feature extractor.

US Pat. No. 10,192,554

TRANSCRIPTION OF COMMUNICATIONS USING MULTIPLE SPEECH RECOGNITION SYSTEMS

Sorenson IP Holdings, LLC...

1. A method to transcribe communications, the method comprising:obtaining audio data originating at a first device during a communication session between the first device and a second device, the communication session configured for verbal communication;
providing the audio data to a first automated speech recognition system that works independent of human interaction to generate a first transcript using the audio data;
directing the first transcript to the second device;
in response to obtaining a quality indication that indicates a quality of the first transcript is below a quality threshold and while continuing to provide the audio data to the first automated speech recognition system to generate the first transcript and continuing to direct the first transcript to the second device, the method including:
multiplexing the audio data to provide the audio data to the first automated speech recognition system and a second automated speech recognition system;
broadcasting, by the second automated speech recognition system, audio based on the multiplexed audio data;
obtaining, by the second automated speech recognition system, second audio data based on a re-voicing of the broadcast audio; and
generating, by the second automated speech recognition system, a second transcript using the second audio data; and
in response to a transfer indication that occurs after multiplexing of the audio data, directing the second transcript to the second device instead of directing the first transcript to the second device and ceasing providing the audio data to the first automated speech recognition system.

US Pat. No. 10,192,553

INITIATING DEVICE SPEECH ACTIVITY MONITORING FOR COMMUNICATION SESSIONS

Amazon Technologes, Inc.,...

1. A method, comprising:receiving, from an initiating device, a request to initiate a communications session between the initiating device and a recipient device;
establishing the communications session;
receiving first data indicating that first sounds were received by at least one microphone of the initiating device during a first amount of time after the communications session is initiated;
determining that the first sounds correspond to non-speech;
receiving second data indicating that second sounds were received by the at least one microphone during a second amount of time after an end of the first amount of time;
determining that the second sounds correspond to non-speech;
determining a third amount of time between the first amount of time and the second amount of time;
determining that the third amount of time is greater than a threshold amount of time; and
causing the communications session to end based, at least in part, on the first sounds and the second sounds corresponding to non-speech and the third amount of time being greater than the threshold amount of time.

US Pat. No. 10,192,552

DIGITAL ASSISTANT PROVIDING WHISPERED SPEECH

Apple Inc., Cupertino, C...

1. An electronic device, comprising:one or more processors;
memory; and
one or more programs stored in memory, the one or more programs including instructions for:
receiving a speech input from a user;
determining, based on the speech input, that a whispered speech response is to be provided;
upon determining that a whispered speech response is to be provided, generating the whispered speech response, wherein generating the whispered speech response comprises:
generating text based on the speech input;
performing natural language processing of the text;
generating an intermediate speech based on a result of the natural language processing;
obtaining a residual signal based on a linear prediction analysis of the intermediate speech;
modifying the residual signal; and
obtaining the whispered speech response based on a linear prediction synthesis of the modified residual signal; and
providing the whispered speech response to the user.

US Pat. No. 10,192,551

USING TEXTUAL INPUT AND USER STATE INFORMATION TO GENERATE REPLY CONTENT TO PRESENT IN RESPONSE TO THE TEXTUAL INPUT

Google LLC, Mountain Vie...

1. A method implemented by one or more processors, comprising:receiving textual input, the textual input being based on user interface input generated by a user via one or more user interface input devices of a computing device of the user,
wherein the user interface input is generated by the user as part of a dialog that includes the user and an automated assistant implemented by one or more of the processors;
determining user state information for the user, wherein the user state information identifies a state of the user, is in addition to the textual input, and is based on sensor data generated by the computing device or an additional computing device of the user;
generating reply content based on both the textual input and the user state information, wherein the reply content includes at least one selectable graphical element that, when selected via further user interface input, causes the computing device of the user to present additional content to the user, and wherein generating the reply content based on both the textual input and the user state information comprises:
issuing a search of one or more databases based on both the textual input and the user state information,
receiving one or more search results in response to issuing the search, and
incorporating one or more of the search results into the reply content, wherein the selectable graphical element is associated with one of the search results; and
providing the reply content in response to the user interface input, wherein the reply content is provided for inclusion in the dialog in response to the textual input, and wherein the reply content is provided for presentation via one or more user interface output devices.

US Pat. No. 10,192,550

CONVERSATIONAL SOFTWARE AGENT

Microsoft Technology Lice...

1. A computer system comprising:an input configured to receive voice input from a user;
an automatic speech recognition (ASR) system for identifying individual words in the voice input, the ASR system configured to generate in memory a set of one or more words it has identified in the voice input, and update the set each time it identifies a new word in the voice input by adding the new word to the set;
a speech detection module configured to detect speech activity in the voice input, prevent a speech inactivity interval from commencing until a grammatically complete sentence is detected in the voice input, cause the speech inactivity interval to commence when the grammatically complete sentence is detected in the speech input, and determine whether the ASR system has identified any more words in the voice input during the speech inactivity interval; and
a response module configured to generate a response for output based on the set of identified words, in response to the detection of an end of the speech inactivity interval, the response module configured to output the generated response after the speech inactivity interval has ended and only if the ASR system has not identified any more words in the voice input during the speech inactivity interval such that the generated response is not output if one or more words are identified in the voice input during the speech inactivity interval.

US Pat. No. 10,192,546

PRE-WAKEWORD SPEECH PROCESSING

AMAZON TECHNOLOGIES, INC....

1. A computer-implemented method, comprising:receiving audio;
storing, in non-transitory memory, audio data representing the audio;
determining a first location in the audio data that includes a first amount of non-speech audio data;
determining a wakeword at a second location in the audio data, the audio data including non-wakeword speech between the first location and the second location;
determining a third location in the audio data that includes a second amount of non-speech audio data, the third location being after the second location in the audio data; and
selecting, for speech processing, a portion of the audio data starting with the first location and ending with the third location, the portion of the audio data comprising at least the non-wakeword speech.

US Pat. No. 10,192,545

LANGUAGE MODELING BASED ON SPOKEN AND UNSPEAKABLE CORPUSES

Microsoft Technology Lice...

1. A system comprising:at least one processor; and
a memory storing instructions that when executed by the at least one processor perform a set of operations comprising:
evaluating training data from a first information source;
determining unspeakable portions of the training data;
training a classifier based on the unspeakable portions of the training data,
wherein the unspeakable portions of the training data are used as negative examples;
generating, using the classifier, a corpus based on typed text from a second information source, wherein the classifier is used to filter unspeakable portions from the second information source;
training a language model using the corpus; and
performing speech recognition on audio data using the language model.

US Pat. No. 10,192,543

METHOD AND SYSTEM FOR CONVEYING AN EXAMPLE IN A NATURAL LANGUAGE UNDERSTANDING APPLICATION

Nuance Communications, In...

1. A system for facilitating development, in a natural language understanding (NLU) application development environment, of an NLU model associated with an NLU application, the system comprising:at least one processor;
a database storing information used for training one or more NLU models;
at least one non-transitory computer-readable storage medium encoded with instructions that, when executed by the at least one processor, cause the at least one processor to perform:
obtaining at least one expected user entry and a corresponding desired routing destination;
applying the NLU model to the at least one expected user entry to determine whether the NLU model associates the at least one expected user entry with the desired routing destination;
when it is determined that the NLU model associates the at least one expected user entry with the desired routing destination, selecting the at least one expected user entry for presentation to a user in a help message of the NLU application as an example of input the user could provide to be routed to the desired routing destination; and
when it is determined that the NLU model does not associate the at least one expected user entry with the desired routing destination:
training the NLU model using training data accessed in the database to associate the at least one expected user entry with the desired routing destination; and
validating that the trained NLU model associates the at least one expected user entry with the desired routing destination.

US Pat. No. 10,192,542

SPEAKING-RATE NORMALIZED PROSODIC PARAMETER BUILDER, SPEAKING-RATE DEPENDENT PROSODIC MODEL BUILDER, SPEAKING-RATE CONTROLLED PROSODIC-INFORMATION GENERATION DEVICE AND PROSODIC-INFORMATION GENERATION METHOD ABLE TO LEARN DIFFERENT LANGUAGES AND MIMIC VAR

NATIONAL TAIPEI UNIVERSIT...

1. A prosodic-information generation device configured to synthesize second language speech of language content based on first information originating from a first language and prosodic-information of first and second language speech, comprising:a first prosodic-information generation unit including a first speaking-rate normalized prosodic parameter builder, a first storage and a second storage, configured to generate and output a first statistic datum, a first speaking-rate normalized prosodic parameter model stored in the first storage, a second statistic datum and a first speaking-rate dependent prosodic model of the first language in the second storage, in response to the first information originating from the first language spoken by a first speaker;
a second prosodic-information generation unit including a second speaking-rate normalized prosodic parameter builder, a third storage and a fourth storage, configured to provide a first functional information unit and a second functional information unit, and to generate and output a second speaking-rate normalized prosodic parameter model stored in the third storage and a second speaking-rate dependent prosodic model stored in the fourth storage in response to the first statistic datum, the first speaking-rate normalized prosodic parameter model, the second statistic datum, the first speaking-rate dependent prosodic model and a second information originating from the second language spoken by a second speaker, wherein:
the first functional information unit has a first function including a likelihood function, generates a first plurality of parameters capable of joining a speaking-rate normalization of a pitch contour, a syllable duration and/or a pause duration of the second language in response to the second information, the first statistic datum and the first speaking-rate normalized prosodic parameter model in the first storage, and constructs the second speaking-rate normalized prosodic parameter model of the second language in the third storage according to the first plurality of parameters, where the first function uses a Maximum a Posteriori Linear Regression (MAPLR) algorithm to estimate the first plurality of parameters, and the likelihood function is used to relate among a pitch contour, a syllable duration and/or a pause duration of the first language and those of the second language; and
the second functional information unit has a second function including one of a second plurality of parameters simultaneously relate to the first language and the second language, and a plurality of sub-parameters of any one in a third plurality of parameters relevant to the second language alone, in which the first functional information unit, under a maximum a posteriori (MAP) condition, in response to the first information, the second information and one of the second plurality of parameters and the plurality of sub-parameters, produces a speaking-rate dependent reference information so as to construct the second speaking-rate dependent prosodic model of the second language in the fourth storage according to the reference information; and
a prosodic-information generator configured to generate a first prosodic parameter of a second language content in response to the second speaking-rate normalized prosodic parameter model in the third storage, the second speaking-rate dependent prosodic model in the fourth storage, and a desired speaking-rate, wherein:
the second plurality of parameters and the third plurality of parameters include a break-syntax model, a prosodic state model, a prosodic state-syntax model, a syllable prosodic-acoustic model and a syllable-juncture prosodic-acoustic model, and the plurality of sub-parameters include several additive factors related to tone, basic syllable type, initial type, coarticulation and prosodic states such that the language content is synthesized in the second language speech using the prosodic-information generator.

US Pat. No. 10,192,541

SYSTEMS AND METHODS FOR GENERATING SPEECH OF MULTIPLE STYLES FROM TEXT

Nuance Communications, In...

1. A method for use in a text-to-speech system comprising a computer-implemented linguistic analysis component operative to generate a phonetic transcription based upon input text, a speech base comprising speech unit recordings associated with a plurality of styles of speech, and at least one computer-implemented speech generation component operative to generate output speech from stored speech unit recordings based at least in part on the phonetic transcription, the method comprising acts of:(A) receiving, by the linguistic analysis component, input text produced by a text-producing application, wherein the text produced by a text-producing application comprises a speech style indication indicating a style of speech to be output by the text-to-speech system for an associated segment of the input text;
(B) generating, by the linguistic analysis component, a phonetic transcription based at least in part on the input text, the phonetic transcription specifying a first style of speech of the plurality of styles of speech to be output by the at least one speech generation component for the segment of the input text; and
(C) generating, by the at least one speech generation component, output speech based at least in part on the phonetic transcription generated in the act (B), wherein the generating comprises the at least one speech generation component selecting, from the speech unit recordings in the speech base, speech unit recordings associated with a second style of speech of the plurality of styles of speech, the second style of speech being different than the first style of speech, and concatenating the selected speech unit recordings to generate output speech in the first style.

US Pat. No. 10,192,540

COORDINATED ROUTE DISTRIBUTION SYSTEMS AND METHODS

FLIR BELGIUM BVBA, Meer ...

1. A system comprising:a logic device configured to communicate with a user interface coupled to a mobile structure and optionally a controller for the mobile structure, wherein the logic device is adapted to:
retrieve route data for the mobile structure from a route distribution server over a network;
determine the route data for the mobile structure comprises a complete route;
indicate successful retrieval of the route data to the route distribution server; and
provide the route data to the user interface and optionally the controller for the mobile structure, wherein the providing the route data comprises:
translating the route data into a target heading and a first series of waypoints, corresponding to a first successfully retrieved route, that are displayed by the user interface and/or used by the controller to autopilot the mobile structure; and
translating the route data into a second series of waypoints corresponding to a second successfully retrieved route for at least one other mobile structure that is displayed by the user interface.

US Pat. No. 10,192,539

SYSTEM AND METHOD FOR PROVIDING A QUIET ZONE

Sound United, LLC, Vista...

1. An audio system comprising:at least one module operable to, at least:
filter an audio signal to pass a frequency band of sound to be counteracted, wherein the frequency band is characterized by at least a lower bound;
identify an unwanted sound at a location, by, at least in part, operating to receive the unwanted sound using at least one sound sensor positioned at a distance away from the location at least one fourth of a wavelength of the lower bound of the frequency band of sound to be counteracted;
identify a loudspeaker to utilize to quiet the unwanted sound;
determine a counteracting sound that, when output by the loudspeaker, will quiet the unwanted sound at the location; and
output the counteracting sound at the loudspeaker.

US Pat. No. 10,192,538

MOBILE BODY

SONY INTERACTIVE ENTERTAI...

1. A mobile body comprising:a driving mechanism that supplies power to rotors of the mobile body;
a speaker;
a global positioning system (GPS) module for detecting a geographic position of the mobile body;
a control unit that generates, from the speaker, a cancellation sound for canceling a driving sound generated by the driving mechanism,
wherein the control unit starts the cancellation sound when the geographic position is within a first geographic area, and
wherein the control unit stops the cancellation sound when the geographic position is within a second geographic area different than the first geographic area; and
a camera for capturing a video;
wherein the control unit interrupts the cancellation sound when the camera is capturing the video, and
wherein the control unit enables the cancellation sound when the camera is not capturing the video.

US Pat. No. 10,192,536

PEDAL BOARD AND SOUND EFFECT ADJUSTING DEVICE USING SAME

SWIFF TECHNOLOGY CO., LTD...

1. A sound effect adjusting device, comprising:an effect pedal including a second pins assembly;
a pedal board including a first housing, a three-way toggle switch mounted in the first housing, a microswitch mounted in the first housing and electrically connected with the three-way toggle switch, and a mounting member mounted on the first housing to attach to the effect pedal;
wherein,
the first housing includes an input interface, an output interface, a send interface and a return interface formed thereon;
the three-way toggle switch has a first contact blade electrically connected with the input interface, a second contact blade electrically connected with the send interface, and a third contact blade connected with the microswitch;
the mounting member has a first pins assembly electrically coupled to the second pins assembly and removably attached to the second pins assembly; wherein,
while the effect pedal is assembled with the pedal board, the microswitch is off, and actuates the three-way toggle switch so that the effect pedal is connected between the input interface and the output interface in series, or, the effect pedal is connected between the send interface and the return interface in series.

US Pat. No. 10,192,535

SYSTEM AND METHOD FOR TRANSMITTING LOW FREQUENCY VIBRATIONS VIA A TACTILE FEEDBACK DEVICE

Backbeat Technologies LLC...

1. A device for providing a tactile feedback response to a user, comprising:an electrical circuit, the electrical circuit including a frequency filter circuit and an amplifier circuit;
a tactile transducer electrically coupled to the amplifier circuit, the tactile transducer including an electrical coil, the electrical coil having a resistance of greater than approximately 30 ohms and a current draw of approximately 0.4 amps or less;
an input connection configured to receive an electrical signal, and the input connection is communicatively coupled to the electrical circuit; and
a support strap for supporting a musical instrument, the tactile transducer is detachably connected to the support strap by an attachment apparatus;
wherein the electrical circuit transforms the electrical signal making it suitable for moving at least a portion of the tactile transducer, at least indirectly, against a portion of the user's body.

US Pat. No. 10,192,534

PERCUSSION INSTRUMENT

YAMAHA CORPORATION, Shiz...

1. A percussion instrument comprising:a shell having a wall portion and at least one opening;
a head attached to the shell and overlying the at least one opening of the shell; and
a speaker provided inside of the shell and oriented to output sound having a main direction of propagation towards the wall portion of the shell according to an input signal.

US Pat. No. 10,192,533

CONTROLLER AND SYSTEM FOR VOICE GENERATION BASED ON CHARACTERS

Yamaha Corporation, Hama...

1. A manually-operable controller for a voice generation device including a processor, the voice generation device being configured to generate a voice on the basis of one or more designated characters in a pre-defined character string and a pitch designated by a pitch selector manual-operator, the manually-operable controller comprising:a character selector manual-operator located at a first position on the manually-operable controller and structurally dedicated to be operable by a user, during an outputting of an output voice from a sound output circuit, to designate in real time the one or more designated characters in the pre-defined character string; and
a voice control manual-operator located at a second position on the manually-operable controller and structurally dedicated to be operable by the user, during the generation of the generated voice, to control in real time a state of the voice generated on the basis of the one or more characters designated by the character selector manual-operator and the pitch designated by the pitch selector manual-operator,
wherein the character selector manual-operator includes a separation selector manual-operator for instructing that a voice of a character group, comprising one or more characters, included in the character string be separated into a plurality of syllables and that a voice of the separated syllables be generated at different timings.

US Pat. No. 10,192,531

NONSLIP INSTRUMENT PICK

1. An apparatus for a finger of a user to play a stringed instrument, the finger having a finger diameter, the apparatus comprising:a string pick configured to pick strings of the stringed instrument, and having a tip end, a tail end opposite the tip end, a pick body extending between the tip end and the tail end that is substantially flat, has a first flat face and a second flat face opposite the first flat face, a periphery about the pick body extending between the first flat face and the second flat face, and is tapered at the tip end, the pick body also having a pick axis extending between the tip end and the tail end, a grip axis normal to the pick axis and intersecting the first flat face and the second flat face, a pick length as measured between the tip end and the tail end along the pick axis, and a maximum pick width as measured normal to the pick axis and through the pick body, the maximum pick width greater than the finger diameter, the string pick including a pair of opposing tail side tabs extending outwardly from the pick body, normal to both the pick axis and the grip axis, and defining the maximum pick width; and
an elastic securing band forming a loop about a band center axis, and having a finger end, a pick end opposite the finger end, a band length extending between the finger end and the pick end parallel with the band center axis, a tube wall thickness, a tubular inner surface extending between the finger end and the pick end, and a tubular outer surface opposite the tubular inner surface and extending between the finger end and the pick end, the elastic securing band configured to couple with the string pick via the tail side tabs, and to secure the string pick to the finger of a user via a conformal fit against the finger.

US Pat. No. 10,192,530

MUSICAL INSTRUMENT PITCH CHANGER

1. A pitch changing apparatus, comprising:a bender lever pivotally secured to a musical instrument configured to move between unengaged and engaged positions;
a bender saddle secured to the musical instrument configured to vary the tension in a string on the musical instrument in response to movement of the bender lever between the unengaged and engaged positions, wherein the bender saddle further comprises a head with a cam portion and a bore therethrough, said bore configured to receive a string threaded through the bore and wrapped around a portion of the cam section;
a string mount configured to secure the bender saddle to a first selected string in a first bending configuration or to a second selected string in a second bending configuration; and
wherein the bender saddle is configured to move between the first selected string and the second selected string of the musical instrument.

US Pat. No. 10,192,529

ELECTRONIC APPARATUS, FRAMES PER SECOND DECISION METHOD, AND NON-TRANSITORY COMPUTER READABLE STORAGE MEDIUM THEREOF

MediaTek, Inc., Hsinchu ...

1. An electronic apparatus, comprising:a circuit, being configured to calculate a first movement value according to a plurality of first data corresponding to a first frame for display and a plurality of second data corresponding to a second frame for display, and calculate a first target Frames Per Second (FPS) for displaying a plurality of third frames according to the first movement value and a first number of frame time between the first frame and the second frame,
wherein the first movement value indicates a movement distance of one or more objects between the first frame and the second frame, and the first number of frame time indicates a time measurement between the first frame and the second frame, and
wherein the circuit calculates the first target FPS by dividing the first movement value by the first number of frame time, and wherein the greater the first target FPS, the faster the plurality of third frames are displayed.

US Pat. No. 10,192,528

REAL-TIME USER ADAPTIVE FOVEATED RENDERING

Sony Interactive Entertai...

1. A graphics processing method comprising:obtaining gaze tracking data representing a user's gaze with respect to one or more images presented to the user;
determining one or more gaze tracking parameters from gaze tracking data, wherein the gaze tracking parameters include one or more gaze tracking error parameters, wherein determining the one or more gaze tracking error parameters from the gaze tracking data includes determining whether the user's eye is moving in smooth pursuit;
generating adjusted foveation data representing an adjusted size and/or shape of one or more regions of interest in one or more images to be subsequently presented to the user based on the one or more gaze tracking parameters including the one or more gaze tracking error parameters;
generating foveated image data representing one or more foveated images using the adjusted foveation data, wherein the one or more foveated images are characterized by level of detail within the one or more regions of interest and lower level of detail outside the one or more regions of interest; and
presenting the one or more foveated images to the user.

US Pat. No. 10,192,527

USER INTERFACES FOR HAND-HELD ELECTRONIC DEVICES

THOMSON LICENSING, Issy ...

1. A hand-held device operative to be held in normal, upside down, left tilt, and right tilt orientations, said hand-held device comprising:a processor;
a display;
a first physical button located on a first side of said display when said hand-held device is held in said normal orientation;
a second physical button located on a second side of said display opposite to said first side, said second physical button positioned diagonally to said first physical button when said hand-held device is held in said normal orientation; and wherein:
activation of said first and second physical buttons respectively causes said processor to perform first and second functions when said hand-held device is held in said normal orientation, and respectively causes said processor to perform said second and first functions when said hand-held device is held in said upside down orientation;
when said hand-held device is detected to be held in one of said left tilt and right tilt orientations, said processor causes display of first and second virtual buttons via said display, and touch activation of said first and second virtual buttons respectively causes said processor to perform said first and second functions;
said first and second virtual buttons are respectively displayed in respective positions in said display in said one of said left tilt and right tilt orientations respectively corresponding to positions and said first and second functions of said first and second physical buttons when said hand-held device is held in said normal orientation; and wherein
said first and second virtual buttons are only displayed when said hand-held device is detected to be in one of said left tilt and right tilt orientations, and are not displayed when said hand-held device is detected to be in one of said normal orientation and said upside down orientation.

US Pat. No. 10,192,523

METHOD AND APPARATUS FOR PROVIDING AN OVERVIEW OF A PLURALITY OF HOME SCREENS

NOKIA TECHNOLOGIES OY, E...

1. A method comprising:causing a display of a first home screen;
causing, with a processor, the display to zoom out from the first home screen to a canvas overview representing a plurality of home screens including the first home screen, wherein the canvas overview is configured to present the plurality of home screens in a continuous arrangement without visible delineation or demarcation between the plurality of home screens and to group items accessible via a respective home screen in proximity to one another;
causing an item to be moved from one home screen to another portion of the canvas overview designated for creating a new home screen and not associated with an existing one of the plurality of home screens;
in response to the movement of the item from one home screen to the another portion of the canvas overview designated for creating the new home screen and determining the item is to be moved to the another portion of the canvas overview, causing creation of the new home screen;
causing an application associated with the item to launch in response to the item being selected; and
facilitating switching from a prior active application to the launched application from the canvas overview.

US Pat. No. 10,192,522

MULTI-LAYERED DISPLAY DEVICE

YAZAKI CORPORATION, Mina...

1. A display device comprising:a first display surface configured to display vehicle information in a display area and include a segment bar which transmits light;
a second display surface configured to be disposed facing the first display surface and to transmit light, the second display surface including a drawing pattern drawn across an inside and an outside of the display area when seen from a direction in which the second display surface is stacked on the first display surface, and be able to switch to a displayed state in which the drawing pattern is displayed and a hidden state in which the drawing pattern is hidden;
a dial plate disposed between the first display surface and the second display surface; and
a circuit board, wherein
the circuit board includes a plurality of light sources facing a side of the second display surface in a direction substantially perpendicular to a depth direction in which the second display surface transmits light from a back face side to a front face side,
the light sources are configured to transmit light through the side of the second display surface in a direction substantially perpendicular to the depth direction,
the display area is an area exposed through an opening provided in the dial plate, the display device displays information by the first display surface and the second display surface, and
a part of the drawing pattern is disposed over the opening such that the part of the drawing pattern overlaps the first display surface in the direction and the part of the drawing pattern is superimposed on the segment bar and serves as an indication part indicated by the segment bar.

US Pat. No. 10,192,520

BACKLIGHT UNIT, DISPLAY PANEL AND DISPLAY DEVICE

SHANGHAI TIANMA MICRO-ELE...

1. A backlight unit, comprising:a light source having a plurality of light-emitting units that emit light in at least three different colors;
only one light guide plate having N preset regions, where N is a positive integer, and N>1; and
a backlight control unit controlling the light-emitting units to provide light to the preset regions in the only one light guide plate,
wherein:
the only one light guide plate has a light incidence side and a side surface opposite to the light incidence side, and the N preset regions continuously extend from the light incidence side to the side surface of the only one light guide plate;
all light-emitting units in the light source are disposed at the light incidence side of the only one light guide plate, and the light emitted from the plurality of light-emitting units enters the N preset regions from the light incidence side of the only one light guide plate;
in the light-emitting units corresponding to a same preset region in the N present regions, the light-emitting units with a same color are connected in series;
the light-emitting units corresponding to different preset regions in the N present regions are independent;
the light emitted by the light source spreads in the preset regions in a convergent way;
the backlight control unit acquires image data information corresponding to the N preset regions, and derives chrominance and luminance information of an image corresponding to each preset region, by calculating the image data information corresponding to each preset region, wherein the chrominance and luminance information of the image corresponding to each present region comprises a ratio of a red component, a green component and a blue component; and
the backlight control unit then, based on the chrominance and luminance information of each preset region, determines an electric current for each red light-emitting unit, each green light-emitting unit and each blue light-emitting unit of each preset region, according to the ratio of the red component, the green component and the blue component.

US Pat. No. 10,192,519

AMBIENT LIGHT ADAPTIVE DISPLAYS WITH PAPER-LIKE APPEARANCE

Apple Inc., Cupertino, C...

1. A method for displaying images on a display having an adjustable white point, comprising:with a color-sensitive light sensor, determining a color and an intensity of ambient light;
with display control circuitry, determining whether the intensity of ambient light is above or below a threshold;
with the display control circuitry, operating the display in a first mode in response to determining that the intensity of ambient light is below the threshold, wherein operating the display in the first mode comprises automatically adjusting the white point of the display to a preset low light mode white point that is not adapted to the color of the ambient light; and
with the display control circuitry, operating the display in a second mode in response to determining that the intensity of ambient light is above the threshold, wherein operating the display in the second mode comprises automatically adjusting the white point of the display based on the color of ambient light, and wherein the display control circuitry shifts the display from the second mode to the first mode when the intensity of ambient light drops from above the threshold to below the threshold.

US Pat. No. 10,192,516

METHOD FOR WIRELESSLY TRANSMITTING CONTENT FROM A SOURCE DEVICE TO A SINK DEVICE

BlackBerry Limited, Wate...

1. A method for wirelessly transmitting content from a source device to a sink device, the source device comprising a processor, a graphics processing unit (GPU) coupled to the processor, and a wireless communication subsystem coupled to the processor, the method comprising:preparing, by the processor and/or GPU of the source device, a first set of display frames for the sink device from a set of source display frames in accordance with a selected transmission format, wherein the selected transmission format is one of screencasting, graphics processing unit (GPU) processing or GPU processing with media streaming;
wirelessly transmitting, by the wireless communication subsystem of the source device, the first set of display frames to the sink device;
determining, by the processor of the source device, whether predetermined performance criteria have been met; and
when the predetermined performance criteria have not been met and the selected transmission format is GPU processing or GPU processing with media streaming, changing the selected transmission format from GPU processing or GPU processing with media streaming to screencasting.

US Pat. No. 10,192,515

DISPLAY DEVICE AND DATA DRIVER

AU OPTRONICS CORPORATION,...

1. A data driver applicable to a display device, comprising:a first boost circuit, receiving a supply voltage value and generating a first boosted voltage at a first preset voltage value;
a first gate clock generation circuit, electrically coupled to the first boost circuit, receiving a plurality of timing signals and the first boosted voltage, and generating a first timing signal;
a first level shift circuit, receiving a first timing signal and generating a first gate timing signal; and
a data drive circuit, receiving the plurality of timing signals and generating a plurality of display data signals;
wherein the first boost circuit is electrically coupled to a second boost circuit of a second data driver, and the second booster circuit generates a second boosted voltage at the first preset voltage value.

US Pat. No. 10,192,513

CIRCUITS FOR PROCESSING A VOLTAGE OF A PIXEL ELECTRODE AND DISPLAY APPARATUSES

BOE TECHNOLOGY GROUP CO.,...

1. A circuit for processing a voltage of a pixel electrode, comprising:a first input terminal configured to input an original voltage of the pixel electrode;
a second input terminal configured to input a voltage of a common electrode; and
an output terminal configured to output a processed voltage of the pixel electrode,
wherein the circuit for processing a voltage of a pixel electrode is configured to superimpose the voltage of the common electrode on the original voltage of the pixel electrode, to acquire a voltage which is stable with respect to the voltage of the common electrode as the processed voltage of the pixel electrode,
wherein the circuit for processing a voltage of a pixel electrode further comprises:an operational amplifier having a negative phase input terminal connected to the ground through a first resistor and connected to an output terminal thereof through a second resistor;a third resistor having a first end connected to the first input terminal and a second end connected to a positive phase input terminal of the operational amplifier; and
a fourth resistor having a first end connected to the second input terminal and a second end connected to a positive phase input terminal of the operational amplifier;
wherein a resistance value of the second resistor and a resistance value of the fourth resistor satisfy:

wherein K is a superposition multiple of a dynamic fluctuation voltage waveform of the common electrode; R2 is a resistance value of the second resistor, and R4 is a resistance value of the fourth resistor, and
wherein the fourth resistor is a variable resistor.

US Pat. No. 10,192,512

GATE VOLTAGE GENERATION CIRCUIT, TRANSISTOR SUBSTRATE AND DISPLAY DEVICE

Japan Display Inc., Toky...

1. A display device comprising:a gate voltage generation circuit for generating a gate voltage including a first voltage, a second voltage and a third voltage and supplying the gate voltage to a pixel transistor of the display device; and
a transistor substrate provided with the gate voltage generation circuit,
wherein the first voltage is a voltage for opening the pixel transistor,
the second voltage is lower than the first voltage and is a voltage for closing the pixel transistor,
the third voltage is an intermediate voltage between the first voltage and the second voltage,
the voltage rises by way of the intermediate voltage at the time of rising from the second voltage to the first voltage,
the transistor substrate comprises:
a plurality of source lines and a plurality of gate lines formed in a display region;
a pixel region formed by crossing the source lines and the gate lines;
a peripheral region outside the display region;
a gate selection circuit formed in the peripheral region and connected to the gate line of the pixel transistor;
a first transistor constituting the gate selection circuit;
a first source electrode and a first drain electrode constituting the first transistor;
a second transistor constituting the gate selection circuit;
a first gate electrode and a first channel opposed to the first gate electrode, which constitute the first transistor; and
a second gate electrode and a second channel opposed to the second gate electrode, which constitute the second transistor,
the pixel transistor is formed in the pixel region,
the gate voltage generation circuit is formed in the peripheral region,
the first source electrode is electrically connected to the gate voltage generation circuit and the first drain electrode is electrically connected to the gate line, and
a channel length of the first channel is shorter than a channel length of the second channel.

US Pat. No. 10,192,511

DISPLAY DRIVING CIRCUIT AND PIXEL STRUCTURE

WUHAN CHINA STAR OPTOELEC...

1. A display driving circuit, comprising:a first latch for latching a first data voltage;
a second latch for latching a second data voltage;
a logic control unit having two logic control ends, four voltage input ends and a voltage output end, wherein an output end of the first latch and an output end of the second latch are respectively connected with one of the logic control ends, the four voltage input ends are respectively connected with four different preset voltages, and the logic control unit is used for selecting to output one of the four preset voltages to a pixel electrode via the voltage output end based upon a first data voltage and a second data voltage input by the two logic control ends.

US Pat. No. 10,192,509

DISPLAY APPARATUS AND A METHOD OF OPERATING THE SAME

SAMSUNG DISPLAY CO., LTD....

1. A display apparatus, comprising:a timing controller configured to generate a mode selection signal and output image data in response to input image data, the mode selection signal indicating a first operation mode or a second operation mode;
a first data driver configured to generate first through M-th data voltages and (M+1)-th through N-th data voltages in response to the mode selection signal and the output image data, and to apply the first through N-th data voltages to first through N-th data lines, respectively, where M is a natural number and N is a natural number greater than M; and
a display panel connected to the first through N-th data lines,
wherein, during a first duration of the first operation mode, each of a polarity pattern of the first through M-th data voltages and a polarity pattern of the (M+1)-th through N-th data voltages repeats a first polarity pattern,
wherein, during a first duration of the second operation mode, the polarity pattern of the first through M-th data voltages repeats the first polarity pattern, and the polarity pattern of the (M+1)-th through N-th data voltages repeats a second polarity pattern different from the first polarity pattern,
wherein the first data driver includes:
a digital-to-analog converter configured to generate the first through N-th data voltages in response to the mode selection signal, a polarity control signal and the output image data, wherein the mode selection signal and the polarity control signal are directly provided to the digital-to-analog converter; and
an output buffer configured to output the first through N-th data voltages to the first through N-th data lines.

US Pat. No. 10,192,506

DRIVING METHOD FOR DISPLAY PANEL, TIMING CONTROLLER AND LIQUID CRYSTAL DISPLAY

Shenzhen China Star Optoe...

1. A liquid crystal display, comprising:a timing controller for outputting a timing control signal;
a display driving circuit including a source driver and a gate driver for receiving the timing control signal, wherein the source driver generates a data driving signal according to the timing control signal, and the gate driver generates a scanning driving signal; and
a liquid crystal display panel including multiple data lines, multiple scanning lines and multiple pixel units, wherein the scanning line receives the scanning driving signal and the data line receives the data driving signal in order to control a corresponding pixel unit to display;
wherein, the timing controller comprises:
a control circuit for outputting a first frequency switching instruction when an image frame to be displayed is detected as an overloaded image;
a signal generation circuit connected with the control circuit for switching an operation frequency from a first frequency to a second frequency in a switching moment of adjacent frames according to the first frequency switching instruction, and using the second frequency to output the timing control signal to the source driver such that after the source driver receives the timing control signal, the source driver outputs the data driving signal having a lower frequency to drive the display panel to display the overloaded image;
the control circuit is further used for outputting a second frequency switching instruction when an image frame to be displayed is detected as a non-overloaded image;
the signal generation circuit is further used for switching the operation frequency from the second frequency to the first frequency according to the second frequency switching instruction, and using the first frequency to output the timing control signal to the source driver such that after the source driver receives the timing control signal, the source driver outputs corresponding data driving signal to drive the display panel to display the non-overloaded image;
wherein, the second frequency is one half of the first frequency; and
wherein the overloaded image is defined as when the timing controller adopts the first frequency as the operation frequency to control the source driver to display an image frame to be displayed, the power consumption of the source driver exceeds a preset power consumption value, and the image frame to be displayed is an overloaded image.

US Pat. No. 10,192,503

ELECTROOPTIC DEVICE AND ELECTRONIC APPARATUS

SEIKO EPSON CORPORATION, ...

1. An electrooptic device comprising:a scan line;
a first data line and a second data line that intersect the scan line;
a scan line driving circuit that selects the scan line;
a data line driving circuit that supplies data signals to the first data line or the second data line during a period where the scan line is selected;
a first transistor that includes a gate electrode receiving gate signals for selecting the first data line, the first transistor having one end connected to the first data line and the other end connected to the data line driving circuit; and
a second transistor that includes a gate electrode receiving gate signals for selecting the second data line, the second transistor having one end connected to the second data line and the other end connected to the data line driving circuit,
wherein the gate electrode of the second transistor overlaps the first data line in plan view,
the first transistor includes a plurality of first sub-transistors,
the second transistor includes a plurality of second sub-transistors, and
an overlap between a gate electrode of one of the first sub-transistors and the second data line and an overlap between a gate electrode of one of the second sub-transistors and the first data line alternate in a direction in which the first data line and the second data line extend.

US Pat. No. 10,192,502

APPARATUS HAVING SPATIAL LIGHT MODULATOR AND CONVERTING UNIT CONVERTING INPUT VALUE TO CONTROL VALUE TO CONTROL SPATIAL LIGHT MODULATOR

HAMAMATSU PHOTONICS K.K.,...

1. An apparatus for modulating light, comprising:a spatial light modulator including a plurality of blocks, each of the blocks including a plurality of pixels, the spatial light modulator being configured to modulate input light in response to a drive voltage for each of the pixels;
an input value setting unit configured to set an input value for the each of the pixels;
a converting unit configured to convert the input value to a control value based on a plurality of different look-up tables, each of the look-up tables corresponding to a respective block of the plurality of blocks; and
a driving unit configured to drive each of the pixels in response to the drive voltage corresponding to the control value, wherein
each of the look-up tables is configured to store values for the corresponding block based on a phase modulation amount measured for each of the pixels,
when the phase modulation amount is measured for only one pixel in the block, the stored values are based on the phase modulation amount of the one pixel of the plurality of pixels in the block, and
when the phase modulation amount is measured for more than one pixel in the block, the stored values are based on an average of the phase modulation amount for each of the plurality of pixels in the block.

US Pat. No. 10,192,500

POLARITY REVERSION DRIVING METHOD AND APPARATUS OF LIQUID CRYSTAL DISPLAY, AND A LIQUID CRYSTAL DISPLAY

BOE TECHNOLOGY GROUP CO.,...

1. A polarity reversion driving apparatus of a liquid crystal display, comprising a time schedule controller, an inverter, a first logic controller, a second logic controller and a source driver, wherein,the time schedule controller is configured to transmit a first polarity reversion signal POL1 to the inverter and the first logic controller, and transmit a second polarity reversion signal POL2 to the first logic controller and the second logic controller;
the inverter is configured to invert the polarity of the received first polarity reversion signal to generate a third polarity reversion signal POL3, and transmit the third polarity reversion signal POL3 to the first logic controller;
the first logic controller is configured to get through the received first polarity reversion signal POL1 and the third polarity reversion signal POL3 to constitute a fourth polarity reversion signal POL4 according to a level of the received second polarity reversion signal POL2, and transmit the fourth polarity reversion signal POL4 to the second logic controller;
the second logic controller is configured to select and output the fourth polarity reversion signal POL4 or the second polarity reversion signal POL2 to the source driver according to a level of the control signal;
the source driver is configured to output image data signals with corresponding polarities according to a level of the fourth polarity reversion signal POL4 or a level of the second polarity reversion signal POL2;
wherein polarities of the fourth polarity reversion signal POL4 and the second polarity reversion signal POL2 are inverted for every two frames, and a polarity of the control signal is inverted for every frame.

US Pat. No. 10,192,499

DRIVING DEVICE FOR LIQUID CRYSTAL PANEL AND DRIVING METHOD FOR THE SAME FOR DETERMINING IF AMPLIFYING ORIGINAL DATA VOLTAGES IN A SCANNING DIRECTION

Wuhan China Star Optoelec...

1. A driving device for a liquid crystal panel, comprising:a scanning driver for applying a scanning voltage to pixels arranged as a matrix in a liquid crystal panel row by row; and
a data driver for receiving an image data and a polarity inversion signal, obtaining original data voltages to provide to the pixels in each column according to the image data, determining an amplification coefficient for the original data voltages to provide to the pixels in each column along a scanning direction according to the polarity inversion signal, and providing the original data voltages or amplified data voltages to the pixels in each column;
wherein, if the polarity inversion signal is inverted to a positive polarity from a negative polarity, the original data voltages provided to the pixels in each column along the scanning direction are amplified to produce the amplified data voltages;
wherein, the gain module further utilizes a following formula 1 to amplify the original data voltages to provide to the pixels in each column,
V0=Vi·(Y·U+X)pn  [formula 1]
wherein, Vi represents an original data voltage, Vo represents a data voltage after being amplified, (Y·U+X)pn represents an amplification coefficient, which is gradually increased along the scanning direction; U, X and n are reference coefficients, and each is a fixed value; Y represents a regulation coefficient; p represents a gain coefficient;
wherein, when the polarity inversion signal is inverted to a positive polarity from a negative polarity, the gain coefficient p is set as 1; when the polarity inversion signal is inverted to a negative polarity from a positive polarity, the gain coefficient p is set as 0.

US Pat. No. 10,192,498

MULTI-DOMAIN LIQUID CRYSTAL DISPLAY DEVICE WITH IMPROVED TRANSMITTANCE AND VIEWING ANGLES

Hisense Electric Co., Ltd...

1. A multi-domain liquid crystal display device, comprising:a multi-domain liquid crystal image display apparatus including multiple liquid crystal domains;
a storage medium including a set of instructions for displaying images by the multi-domain liquid crystal image display apparatus; and
a processor in communication with the storage medium and the multi-domain liquid crystal image display apparatus, wherein when executing the set of instructions, the processor is directed to:
obtain a first output frame associated with a first image, wherein the first output frame corresponds to a first GAMMA curve having a GAMMA voltage lower than a reference GAMMA curve at each gray level among a set of predetermined gray levels other than at least one lowest gray level and at least one highest gray level of the set of predetermined gray levels;
obtain a second output frame associated with a second image, wherein the second output frame corresponds to a second GAMMA curve having a GAMMA voltage higher than the reference GAMMA curve at each gray level among the set of predetermined gray levels other than the at least one lowest gray level and the at least one highest gray level of the set of predetermined gray levels; and
display, on the multi-domain liquid crystal image display apparatus, the first output frame and the second output frame as two neighboring output frames in time with different respective angular viewing-profiles, wherein a single domain of the multiple liquid crystal domains within each controllable pixel of the multi-domain liquid crystal image display apparatus uses the first GAMMA curve when the first output frame is displayed to produce a first respective angular viewing-profile and uses the second GAMMA curve when the second output frame is displayed to produce a second respective angular viewing-profile.

US Pat. No. 10,192,497

IMAGE DISPLAY DEVICE AND METHOD FOR DIMMING LIGHT SOURCE

NEC DISPLAY SOLUTIONS, LT...

1. An image display device, comprising:a light source;
a display unit that spatially modulates light from said light source on a basis of an input video signal to form an image;
a histogram acquisition unit that acquires, on the basis of said input video signal, a first histogram, in which image data is indicated by frequencies of levels of brightness, and a second histogram that has a number of levels of brightness that differs from a number of levels of brightness of said first histogram; and
a control unit that implements dimming control for adjusting a luminance of said light source on a basis of said first histogram and said second histogram,
wherein a total sum of histogram count values of said first histogram is equal to a total sum of histogram count values of said second histogram.

US Pat. No. 10,192,496

ANGLE CUTTING MODULATING CIRCUIT AND LIQUID CRYSTAL DISPLAY DEVICE HAVING THE ANGLE CUTTING MODULATING CIRCUIT

Shenzhen China Star Optoe...

1. A liquid crystal display device having an angle cutting modulating circuit, wherein the liquid crystal display device comprises an angle cutting modulating circuit and a thin-film transistor, the angle cutting modulating circuit comprises a first modulating circuit and a second modulating circuit, wherein the angle cutting modulating circuit is used to select to open one of the first modulating circuit and the second modulating circuit to realize modulating of a resistance of an angle cutting resistor when switching is conducted among modes of the liquid crystal display device to optimize the angle cutting of gate voltages provided to a thin film transistor in different ones of the modes by the angle cutting modulating circuit;wherein the angle cutting modulating circuit comprises the angle cutting resistor, a first resistor, a second resistor, a third resistor connected to the second resistor, a fourth resistor connected to the third transistor, a fifth resistor, a first field effect transistor and a second field effect transistor, wherein the second resistor forms the first modulating circuit; and the third resistor, the fourth resistor, the fifth resistor and the second field effect transistor jointly form the second modulating circuit, wherein the first resistor is connected to the first modulating circuit and the second modulating circuit by the first field effect transistor.

US Pat. No. 10,192,495

DISPLAY APPARATUS WITH LIGHTING DEVICE, CONTROL METHOD FOR DISPLAY APPARATUS, AND STORAGE MEDIUM

CANON KABUSHIKI KAISHA, ...

1. A display apparatus comprising:a plurality of light-emitting units configured to emit light;
a display unit configured to display an image on a screen with transmitted light emitted based on an input image;
a first acquisition unit configured to acquire initial luminance values of the plurality of light-emitting units based on the luminance of each of a plurality of regions of the input image corresponding to each of the plurality of light-emitting units;
a first processing unit configured to acquire intermediate luminance values of the plurality of light-emitting units by correcting the initial luminance values, wherein the first processing unit increases an initial luminance value of a first target light-emitting unit among the plurality of light-emitting units that is greater than an initial luminance value of a first neighboring light-emitting unit neighboring the first target light-emitting unit, according to a difference of the initial luminance value of the first target light-emitting unit and the initial luminance value of the first neighboring light-emitting unit;
a second processing unit configured to acquire correct luminance values of the plurality of light-emitting units by correcting the intermediate luminance values, wherein the second processing unit increases an intermediate luminance value of a second target light-emitting unit among the plurality of light-emitting units that is smaller than an intermediate luminance value of a second neighboring light-emitting unit neighboring the second target light-emitting unit, according to a difference of the intermediate luminance value of the second target light-emitting unit and the intermediate luminance value of the second neighboring light-emitting unit, the second target light-emitting unit being same or different from the first target light-emitting unit; and
a control unit configured to control light emission of each of the plurality of light-emitting units according to the correct luminance value of each of the plurality of light-emitting units.

US Pat. No. 10,192,493

DISPLAY DEVICE

SHARP KABUSHIKI KAISHA, ...

1. A display device, comprising:a case;
a display panel on a first side of the case and capable of being in a transparent display state where a background scene is viewable through the display panel;
a panel light source on a second side of the case and that irradiates the display panel with colored light of a plurality of colors in a time division manner;
a rear side light source on a third side of the case or behind the display panel and that irradiates a rear surface side of the display panel, the rear side light source being capable of emitting colored light of a plurality of colors in a time division manner; and
a control circuit that controls emission timings of the colored light from the panel light source and from the rear side light source,
wherein the panel light source and the rear side light source are synchronized by the control circuit such that colored light of different colors are not emitted at a same timing.

US Pat. No. 10,192,492

ORGANIC LIGHT EMITTING DIODE DISPLAY

Samsung Display Co., Ltd....

1. An organic light emitting diode display comprising:a substrate comprising a displaying area and a peripheral area having a peripheral circuit;
a scan line on the substrate for transferring a scan signal;
a data line for transferring a data voltage;
a switching transistor connected to the scan line and the data line;
a driving transistor connected to the switching transistor and comprising a semiconductor;
an organic light emitting diode electrically connected to the driving transistor;
an initialization bus line positioned between the peripheral circuit and the organic light emitting diode in a plane view; and
a dummy semiconductor that overlaps the initialization bus line in the plane view and is connected to the semiconductor of the driving transistor.

US Pat. No. 10,192,490

PIXEL ARRAY AND DISPLAY CIRCUIT FOR VIRTUAL REALITY WITH TWO DISPLAY MODES

EVERDISPLAY OPTRONICS (SH...

1. A pixel array with two display modes, comprising a plurality of rows of pixel circuits, each of the pixel circuits comprising:a first transistor comprising a first end connected to a power supply terminal, a second end, and a control end accessing a first enable signal,
a second transistor comprising a first end connected to a display device, a second end connected to the second end of the first transistor, and a control end accessing the first enable signal;
a third transistor comprising a first end connected to the power supply terminal, a second end connected to the second end of the first transistor, and a control end connected to a second enable signal; and
a fourth transistor comprising a first end connected to the display device, a second end connected to the second end of the second transistor, and a control end accessing the second enable signal;
a fifth transistor comprising a first end connected to the second end of the second transistor, a second end connected to the second end of the first transistor, and a control end connected to the power supply terminal through a capacitor;
a sixth transistor comprising a first end connected to a cathode of the capacitor, a second end, and a control end accessing the first control signal, the capacitor comprising an anode connected to the power supply terminal;
a seventh transistor comprising a first end connected to a second terminal of the sixth transistor, a second end connected to an initial voltage power supply terminal, and a control end accessing the first control signal; and
an eighth transistor comprising a first end connected to the initial voltage supply terminal and a second end connected to the display device;
wherein the first transistor and the second transistor are transistors of the same channel type, and the third transistor and the fourth transistor are transistors of the same channel type, and
wherein the first enable signal drives the display devices in each row of the pixel circuits to light line by line, and the second enable signal which accesses each row of the pixel circuits is the same so that the second enable signal drives display devices in each row of the pixel circuits to be lit at the same time.

US Pat. No. 10,192,488

OLED PIXEL DRIVING CIRCUIT AND OLED PIXEL DRIVING METHOD

SHENZHEN CHINA STAR OPTOE...

1. An organic light-emitting diode (OLED) pixel driving circuit comprising:a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, a fifth thin film transistor, a sixth thin film transistor, a capacitor and an OLED;
a gate of the fifth thin film transistor receiving a fourth scan signal, a source of the fifth thin film transistor receiving a positive power supply, a drain of the fifth thin film transistor being connected to a drain of the third thin film transistor and a source of the first thin film transistor;
a gate of the third thin film transistor receiving a second scan signal, both a source of the third thin film transistor and a source of the fourth thin film transistor receiving a data voltage or an initial voltage, a gate of the fourth thin film transistor receiving a third scan signal;
a gate of the first thin film transistor being connected to a source of the second thin film transistor and one terminal of the capacitor, another terminal of the capacitor being grounded;
a gate of the second thin film transistor receiving a first scan signal, a drain of the second thin film transistor being connected to a drain of first thin film transistor, a drain of the fourth thin film transistor and a drain of the sixth thin film transistor; and
a gate of the sixth thin film transistor receiving the fourth scan signal, a source of the sixth thin film transistor being connected to an anode of the OLED, a cathode of the OLED receiving a negative power supply,
wherein the first thin film transistor, the second thin film transistor, the third thin film transistor, the fourth thin film transistor, the fifth thin film transistor and the sixth thin film transistor are all P-type thin film transistors,
wherein the first scan signal, the second scan signal, the third scan signal and the fourth scan signal are all generated through an external timing controller.

US Pat. No. 10,192,487

PIXEL CIRCUIT HAVING THRESHOLD VOLTAGE COMPENSATION, DRIVING METHOD THEREOF, ORGANIC ELECTROLUMINESCENT DISPLAY PANEL, AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A pixel circuit, comprising a light emitting element, a driving control module, a resetting control module, a charging control module, a writing control module, and a light emitting control module, wherein:a first control terminal and a second control terminal of the resetting control module are connected to a reset signal terminal, an input terminal of the resetting control module is connected to a first level signal terminal, a first output terminal of the resetting control module is connected to a first node, and a second output terminal of the resetting control module is connected to an output terminal of the driving control module and an input terminal of the light emitting element; the resetting control module is configured to reset the first node and the light emitting element;
a control terminal of the charging control module is connected to the reset signal terminal, an input terminal of the charging control module is connected to an output terminal of the light emitting control module and a first input terminal of the driving control module, and an output terminal of the charging control module is connected to a second node; the charging control module is configured to charge the second node through the light emitting control module and discharge the second node through the driving control module and the resetting control module;
a control terminal of the writing control module is connected to a scan signal terminal, an input terminal of the writing control module is connected to a data signal terminal, and an output terminal of the writing control module is connected to the second node; the writing control module is configured to write a data signal to the second node;
a control terminal of the light emitting control module is connected to a light emitting signal terminal, and an input terminal of the light emitting control module is connected to a second level signal terminal; the light emitting control module is configured to control the driving control module to drive the light emitting element to emit light;
a second input terminal of the driving control module is connected to the first node, and a third input terminal of the driving control module is connected to the second node; and
an output terminal of the light emitting element is connected to a third level signal terminal,
wherein the driving control module comprises a driving transistor having a gate connected to the first node, a first electrode connected to the input terminal of the charging control module and the output terminal of the light emitting control module, a second electrode connected to the input terminal of the light emitting element and the second output terminal of the resetting control module without intervention of any transistor.

US Pat. No. 10,192,486

PIXEL CIRCUIT, A DRIVING METHOD FOR DRIVING THE PIXEL CIRCUIT, AND A DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A pixel circuit, comprising:a threshold compensation unit, connected to a first level terminal, a first scanning signal terminal, a first node, a second node and a third node, configured to pull a voltage of the first node and a voltage of the first level terminal to be uniform and pull a voltage of the third node and a voltage of the second node to be uniform under the control of the voltage of the first scanning signal terminal, and further configured to make the voltage of the first node and the voltage of the third node have an equipotential change and store the voltage of the first node and the voltage of the third node, so that the voltage of the first node is changed into a voltage sum obtained by adding the threshold voltage of the driving unit a voltage difference obtained by subtracting the voltage of the third level terminal from the voltage of the data signal terminal;
a driving unit, connected to the first node, the second node, a second level terminal, a fourth node and a third scanning signal terminal, and configured to output a driving current through the fourth node under the control of the voltage of the first node and a voltage of the third scanning signal terminal, or adjust the voltage of the second node into a voltage difference between the voltage of the first node and a threshold voltage of the driving unit under the control of the voltage of the first node;
a data writing unit, connected to a data signal terminal, a second scanning signal terminal and the third node, and configured to pull the voltage of the third node and the voltage of the data signal terminal to be uniform under the control of a voltage of a second scanning signal terminal;
a resetting unit, connected to the second scanning signal terminal, a third level terminal and the fourth node, and configured to pull a voltage of the fourth node and a voltage of a third level terminal to be uniform under the control of the voltage of the second scanning signal terminal;
an EL light-emitting unit, connected to the fourth node and a fourth level terminal, and configured to display gray scales through driving current input by the fourth node; and
a feedback unit, connected to the third node and the fourth node, and configured to store the voltage of the third node and the voltage of the fourth node and make the voltage of the third node and the voltage of the fourth node have an equipotential change.

US Pat. No. 10,192,485

PIXEL COMPENSATION CIRCUIT AND AMOLED DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A pixel compensation circuit comprising:a capacitor;
a driving transistor;
a light emitting device;
a data signal writing circuit connected to a first end of the capacitor;
a high voltage writing circuit connected to the first end of the capacitor; and
a first reference voltage generation circuit connected to a second end of the capacitor, an anode of the light emitting device and a drain electrode of the driving transistor,
wherein a gate electrode of the driving transistor is connected to the second end of the capacitor, a source electrode of the driving transistor is connected to the high voltage writing circuit, and the drain electrode of the driving transistor is connected to the anode of the light emitting device; and
wherein a cathode of the light emitting device is connected to a common grounding electrode,
wherein the high voltage writing circuit comprises a high voltage signal terminal and a second transistor, and
wherein a control electrode of the second transistor is connected to a light emitting signal terminal, a source electrode of the second transistor is connected to the high voltage signal terminal, and a drain electrode of the second transistor is connected to the first end of the capacitor.

US Pat. No. 10,192,484

PIXEL CIRCUIT AND DRIVING METHOD THEREOF, DISPLAY PANEL AND DISPLAY DEVICE

BOE Technology Group Co.,...

1. A pixel circuit comprising: a preset unit, a compensation unit, a data writing unit, a driving unit, an energy storage unit, and a light emitting unit,wherein the preset unit is connected to a first scanning signal terminal, a first node, a second node, a third node and a second electric level terminal, and is configured to connect the first node and the third node to the second electric level terminal, and to provide a first scanning signal from the first scanning signal terminal to the second node, based on the first scanning signal provided to the first scanning signal terminal,
wherein the compensation unit is connected to a second scanning signal terminal, the first node, the second node, the third node, a fourth node and the second electric level terminal, and is configured to connect the first node and the third node to the second electric level terminal, and to connect the fourth node to the second node, based on a second scanning signal provided to the second scanning signal terminal,
wherein the data writing unit is connected to a third scanning signal terminal, a data signal terminal and the first node, and is configured to connect the data signal terminal to the first node under the control of a signal of the third scanning signal terminal,
wherein the energy storage unit is connected to the first node and the second node, and is configured to store a voltage between the first node and the second node,
wherein the driving unit is connected to the second node, the third node and the fourth node, and is configured to output a driving signal to the third node based on a voltage between the second node and the fourth node,
wherein the light emitting unit comprises a light emission control unit and a light emitting component,
wherein the light emission control unit is connected to a control signal terminal, the third node, the fourth node, a first electric level terminal and the light emitting component, the light emitting component is connected to the light emission control unit and the second electric level terminal, the light emission control unit is configured to connect the first electric level terminal to the fourth node and to connect the third node to the light emitting component under the control of the signal of the control signal terminal, the light emitting component is configured to emit light based on the driving signal and a signal provided to the second electric level terminal, and
wherein the second electric level terminal is directly connected to a cathode of the light emitting component for providing said signal provided to the second electric level terminal to the cathode of the light emitting component.

US Pat. No. 10,192,482

PIXEL COMPENSATION CIRCUITS, SCANNING DRIVING CIRCUITS AND FLAT DISPLAY DEVICES

Shenzhen China Star Optoe...

1. A pixel compensation circuit, comprising:a first controllable transistor having a control end, a first end, and a second end, the control end of the first controllable transistor connects to a first scanning line, and the first end of the first controllable transistor connects to one data line to receive a data voltage via the data line;
a driving transistor having a control end, a first end, and a second end, the control end of the driving transistor directly connects to the second end of the first controllable transistor, and the first end of the driving transistor connects to a first voltage end;
a second controllable transistor having a control end, a first end, and a second end, the control end of the second controllable transistor connects to a second scanning line, and the first end of the second controllable transistor connects to the second end of the driving transistor;
an OLED having an anode and a cathode, the anode of the OLED directly connects to the second end of the second controllable transistor, and the cathode of the OLED is grounded;
a first capacitor having a first end and a second end, the first end of the first capacitor connects to the control end of the driving transistor, and the second end of the first capacitor connects to the first end of the second controllable transistor; and
a second capacitor includes a first end and a second end, the first end of the second capacitor connects to the first end of the second controllable transistor and the second end of the first capacitor, and the second end of the second capacitor connects to a second voltage end.

US Pat. No. 10,192,481

PIXEL CIRCUIT AND DRIVING METHOD THEREOF, AND ORGANIC LIGHT EMITTING DISPLAY

KONKUK UNIVERSITY INDUSTR...

1. A pixel circuit of an organic light emitting display, the pixel circuit comprising:a drive control sub-circuit configured to transmit a reference voltage to a drive transistor in response to a first scan signal, the drive control sub-circuit further configured to transmit a data signal to the drive transistor in response to a second scan signal;
a drive sub-circuit including the drive transistor, the drive sub-circuit configured to generate a drive current compensated with respect to a threshold voltage difference and mobility deviation in the drive transistor based on the reference voltage, the data signal, and a power signal; and
an organic light emitting diode (OLED) configured to emit light based on the drive current,
wherein the drive sub-circuit further configured to
store a threshold voltage of the drive transistor, based on a voltage change of the power signal transmitted to the drive transistor and the reference voltage,
store a drive voltage compensated with respect to the threshold voltage difference and mobility deviation in the drive transistor, based on the stored threshold voltage and the data signal, and
generate the drive current corresponding to the drive voltage.

US Pat. No. 10,192,479

DISPLAY SYSTEM USING SYSTEM LEVEL RESOURCES TO CALCULATE COMPENSATION PARAMETERS FOR A DISPLAY MODULE IN A PORTABLE DEVICE

Ignis Innovation Inc., W...

1. A portable electronic device comprising:a driver unit;
a timing controller;
a display memory unit;
an electronic video display communicatively coupled to at least one of the driver unit, a measurement unit, the timing controller, a compensation sub-module, and the display memory unit, each of which uses display resources, wherein the driver unit, the timing controller, the display memory unit, the electronic video display, are all included in a display module carried on a first substrate and integrated in the portable electronic device;
one or more interface modules;
one or more system memory units;
at least one processing unit, included in a system module physically arranged on one or more substrates separate from the first substrate, and configured to execute system level applications of the portable electronic device and, during an offline operation in which the electronic video display is off, to perform calculations, offloaded from or shared with said compensation sub-module, for new compensation parameters for the display module, using system level resources distinct from the display level resources, including using the one or more system memory units; and
a connector cable configured to interface the display module with the system module.

US Pat. No. 10,192,476

OPERATING MODULE FOR DISPLAY AND OPERATING METHOD, AND ELECTRONIC DEVICE SUPPORTING THE SAME

Samsung Electronics Co., ...

1. An electronic device comprising a display driver configured to:in response to receiving display data, divide the display data into a plurality of segments corresponding to a plurality of display regions;
compare the display data in the plurality of segments to determine whether the display data in at least one segment is substantially same as the display data in another segment; and
based on the comparison outcome, selectively amplify a first display signal generated from the display data in the at least one segment or a second display signal generated from the display data in the another segment,
wherein the display driver comprises:
a data latch configured to transmit stored line data to a source driver;
data shift registers configured to sequentially transmit shifted line data to the data latch;
a logic circuit block including a data comparison circuit configured to compare the display data to be provided to the data shift registers,
wherein the data shift registers is grouped into groups of a certain number of members for each channel corresponding to each sub pixel,
wherein the source driver comprises:
source pads connected to output stages of amplifiers associated with each segment,
switches disposed between each output stage and each source pad, and
a MUX connected to the switches, and
wherein the display driver is configured to control the plurality of segments through the MUX.

US Pat. No. 10,192,474

CONTROLLABLE VOLTAGE SOURCE, SHIFT REGISTER AND UNIT THEREOF, AND DISPLAY

Peking University Shenzhe...

1. A controllable voltage source, comprising:a control module, coupled between a high voltage level terminal and a low voltage level terminal;
a storage module comprising a storage capacitor, wherein two ends of the storage capacitor are coupled to the control module to form a first terminal and a second terminal;
an output module coupled to the second terminal, wherein a signal output terminal of the output module is configured to provide a controllable voltage source to an external circuit; and wherein the control module is configured to couple the first terminal to the high voltage level terminal in accordance with the effective voltage of a first clock signal ?1, and the first terminal is charged through the high voltage level terminal;
the control module is configured to couple the second terminal to the high voltage level terminal in accordance with the effective voltage of a second clock signal thus the second terminal is charged through the high voltage level terminal, and the first terminal is coupled to the low level voltage terminal and discharged through the low level voltage terminal; and
effective level periods of the first clock signal and effective level periods of the second clock signal do not overlap; and
further comprising a threshold modulation module,
wherein the threshold modulation module is coupled to the first terminal and the second terminal respectively, and the threshold modulation module is configured to couple to the low level terminal;
a sensing terminal of the threshold modulation module is configured to couple to an element to be sensed of the external circuit, and sense a threshold voltage of the element and feedback the threshold voltage to the first terminal and/or the second terminal.

US Pat. No. 10,192,470

APPARATUS AND METHOD FOR OUTPUTTING IMAGE INFORMATION, AND NON-TRANSITORY COMPUTER-READABLE STORAGE MEDIUM FOR STORING PROGRAM FOR OUTPUTTING IMAGE INFORMATION

FUJITSU LIMITED, Kawasak...

1. An apparatus for outputting image information, comprising:a memory; and
a processor coupled to the memory and configured to:
execute an acquisition process that includes acquiring pixel value information items from a sensor, the sensor being configured to execute a reciprocation scan with a measurement wave in a scan direction and output the pixel value information items obtained at multiple sampling angles during the reciprocation scan;
execute a calculation process that includes calculating, based on the pixel value information items for one reciprocating motion in the reciprocation scan for each of multiple different arrangement orders in which a chronological pixel value information item on a forward path and a reverse-chronological pixel value information item on a backward path are assumed to be alternately assigned, differences between the chronological pixel value information item and the reverse-chronological pixel value information item which are adjacent to each other in an arrangement direction; and
execute a generation process that includes generating, based on the differences, a correction information item related to the pixel value information items for the one reciprocating motion in the reciprocation scan.

US Pat. No. 10,192,469

DISPLAY DEVICE FOR A WALKER

Michael J. Brenner and Jo...

1. A display device for a walker comprising:a panel having a front side, a back side, a left side edge, a right side edge, a top side edge, and a bottom side edge;
an interior pocket formed between the front side and the back side;
a series of grommets positioned along the left side edge of the panel;
a series of grommets positioned along the right side edge of the panel;
a closure device positioned along the top side edge; and
an adjustable back attachment device comprising a portion of hook material attached to the back side of the panel, a first tab member separate from the hook material attached to the back side of the panel having a first end having a portion of loop material with the loop material for mating with the portion of hook material attached to the back side of the panel and a second end having a portion of hook material, a second tab member separate from the hook material attached to the back side of the panel having a first end having a portion of loop material with the loop material for mating with the portion of hook material attached to the back side of the panel and a second end having a portion of loop material with the portion of loop material of the second end of the second tab member for mating with the portion of hook material of the second end of the first tab member.

US Pat. No. 10,192,467

TAMPER-EVINCING SEAL ASSEMBLY, SYSTEM, AND METHOD

The Boeing Company, Chic...

1. A tamper-evincing seal assembly that is configured to be secured to a component to indicate tampering of the component, the tamper-evincing seal assembly comprising:a curling member that lies flat in a tamper-free state, and outwardly curls in a tampered state,
wherein the curling member comprises a first portion and a second portion, wherein the first portion and the second portion outwardly curl away from each other in the tampered state.

US Pat. No. 10,192,466

RECONFIGURABLE LABEL ASSEMBLY FOR USE WITH A PET

1. A method for using an improved reconfigurable label assembly comprising the steps of:(a) removing a label from a container in a first configuration, said label including a front panel, a back panel and a bottom panel, said front panel substantially parallel to each of said back panel and said bottom panel, said container including a consumable pet product;
(b) configuring said label so that said front panel and said back panel are separated and said bottom panel is expanded to form a receptacle in a second configuration, said receptacle being capable of holding said consumable pet product; and
(c) reconfiguring said receptacle in the configuring step to said label in the removing step so that said front panel is once again substantially parallel to each of said back panel and said bottom panel.

US Pat. No. 10,192,465

PERITONEAL CAVITY SIMULATOR

Fasotec Co., Ltd., Chiba...

1. A peritoneal cavity simulator for learning a laparoscopic medical procedure, comprising:at least one biologically textured organ model;
a first casing defining a simulated peritoneal cavity, a pelvis area, an abdomen area, and a back area having right and left sides;
the abdomen area furnished with a plurality of ports, each port capable of receiving inserted surgical instruments used under a laparoscopic medical procedure;
the pelvis area simulating a human body pelvis shape;
the peritoneal cavity containing a model gripping portion for fixing, mounting or clipping the biologically textured organ model in the peritoneal cavity;
the model gripping portion including a strip member abutting against an inner wall of the casing in the pelvis area, the biologically textured organ model detachable from the model gripping portion;
wherein the biologically textured organ model includes a urinary bladder model having a plurality of holes for suturing and connecting a urine duct, an end portion of the strip member having an engaging portion engageable with the urinary bladder model, the engaging portion having a polygonal shape.

US Pat. No. 10,192,464

MEDICAMENT DELIVERY DEVICE CONFIGURED TO PRODUCE WIRELESS AND AUDIBLE OUTPUTS

kaleo, Inc., Richmond, V...

1. A method, comprising:removing a distal end portion of a medical injector from within an outer case, the medical injector including a housing, an actuator, a locking member, and an electronic circuit system, the locking member in contact with the actuator to limit movement of the actuator when the locking member is in a first position, the electronic circuit system including an output device and a network interface device, the outer case including a protrusion disposed within the housing and in contact with the electronic circuit system when the distal end portion of the medical injector is within the outer case, the protrusion disposed outside of the housing when the distal end portion of the medical injector is outside of the outer case, the electronic circuit system producing a first output via the output device in response to the protrusion being spaced apart from the electronic circuit system when the distal end portion of the medical injector is removed from within the outer case,
moving the locking member from the first position to a second position, the locking member spaced apart from the actuator when the locking member is in the second position; and
moving the actuator to initiate delivery of a medicament from the medical injector, the electronic circuit system producing a second output via the output device in response to the moving the actuator, the network interface device transmitting a wireless signal to a remote device, the wireless signal associated with at least one of the moving the locking member or the moving the actuator.

US Pat. No. 10,192,460

SYSTEM FOR MIXING A VIDEO TRACK WITH VARIABLE TEMPO MUSIC

JAMMIT, INC, Hollywood, ...

1. A system for a user to view a video that is synchronized to a prerecorded variable tempo music, the system comprising:a processor and a memory on a non-transitory computer readable medium, the memory including
a multi-track digital audio file of a preselected piece of music having a plurality of audio tracks that include an isolated instrument audio track containing only audio from the isolated instrument, and an emulation audio track consisting of the multi-track digital audio file having the isolated instrument audio track removed; and,
a variable timing reference track designed and provided for a user for the preselected piece of music, wherein the preselected piece of music was prerecorded, and the designing of the variable timing reference track includes creating a tempo map having variable tempos, rhythms, and beats using notes from the preselected piece of music;
a transformation module on a non-transitory computer readable storage medium and in operable communication with the processor for transforming the multi-track digital audio file to include a variable gain ratio of (i) the isolated instrument audio track to (ii) an emulation audio track, wherein the emulation audio track represents a subtraction of the isolated instrument audio track from the plurality of audio tracks, and the gain ratio is selected by the user;
an emulation module on a non-transitory computer readable storage medium and in operable communication with the processor for emulating the isolated instrument audio track with a preselected musical instrument under a guidance of the variable timing reference track; and,
a video display module on a non-transitory computer readable storage medium and in operable communication with the processor for viewing a digital video that is synchronized to the variations in the musical tempo using the variable timing reference track.

US Pat. No. 10,192,458

ENHANCING KNOWLEDGE BASES USING RICH SOCIAL MEDIA

INTERNATIONAL BUSINESS MA...

1. A method comprising:utilizing at least one processor to execute computer code configured to perform the steps of:
establishing at least one legitimacy standard for filtering questions, wherein the at least one legitimacy standard includes presence of a question pattern and at least one exception relative to the question pattern, wherein a question pattern identifies data as requesting additional information;
automatically obtaining a question from at least one social media conversation, wherein obtaining a question comprises obtaining data from at least one social media forum, extracting domain-specific communications directed to a target domain by filtering the data using domain-specific keywords, and identifying questions from the extracted domain-specific communications by determining presence of a question pattern;
ascertaining a legitimacy of the question, based on the at least one legitimacy standard, via:
determining presence of a question pattern within the obtained data; and
determining presence of at least one exception to the question pattern, wherein an exception indicates that the data identified as corresponding to a question pattern should not be answered;
wherein the determined at least one exception to the question pattern comprises at least one of: sentiment, author reputation, nature of one or more responses to the question, and a number of sentences relative to the question;
classifying, based upon the ascertained legitimacy, the automatically obtained question as legitimate or not legitimate, wherein a legitimate question comprises obtained data identified as containing a question pattern and as not containing at least one exception to the question pattern, wherein a not legitimate question comprises obtained data identified as containing a question pattern and containing at least one exception to the question pattern;
filtering out the automatically obtained questions classified as not legitimate;
harvesting, for the automatically obtained questions classified as legitimate, from at least one social media conversation an answer to the question, wherein said harvesting comprises:
harvesting an answer comprising at least one rich media component taken from the group consisting of: video content; audio content; picture content; and
harvesting text associated with the at least one rich media component; and
augmenting an existing question knowledge base corresponding to the target domain using the questions classified as legitimate and including the harvested answer corresponding to the question; and
automatically providing an answer the automatically obtained question using the harvested answer.

US Pat. No. 10,192,457

ENHANCING KNOWLEDGE BASES USING RICH SOCIAL MEDIA

INTERNATIONAL BUSINESS MA...

1. An apparatus comprising:at least one processor; and
a computer readable storage medium having computer readable program code embodied therewith and executable by the at least one processor, the computer readable program code comprising:
computer readable program code configured to establish at least one legitimacy standard for filtering questions, wherein the at least one legitimacy standard includes presence of a question pattern and at least one exception relative to the question pattern, wherein a question pattern identifies data as requesting additional information;
computer readable program code configured to automatically obtain a question from at least one social media conversation, wherein to obtain a question comprises obtaining data from at least one social media forum, extracting domain-specific communications directed to a target domain by filtering the data using domain-specific keywords, and identifying questions from the extracted domain-specific communications by determining presence of a question pattern;
computer readable program code configured to ascertain a legitimacy of the question, based on the at least one legitimacy standard, via:
determining presence of a question pattern within the obtained data; and
determining presence of at least one exception to the question pattern,
wherein an exception indicates that the data identified as corresponding to a question pattern should not be answered;
wherein the determined at least one exception to the question pattern comprises at least one of: sentiment, author reputation, nature of one or more responses to the question, and a number of sentences relative to the question;
computer readable program code configured to classify, based upon the ascertained legitimacy, the automatically obtained question as legitimate or not legitimate, wherein a legitimate question comprises obtained data identified as containing a question pattern and as not containing at least one exception to the question pattern, wherein a not legitimate question comprises obtained data identified as containing a question pattern and containing at least one exception to the question pattern;
computer readable program code configured to filter out the automatically obtained questions classified as not legitimate;
computer readable program code configured to harvest, for the automatically obtained questions classified as legitimate, from at least one social media conversation an answer to the question, wherein the harvesting comprises:
harvesting an answer comprising at least one rich media component taken from the group consisting of: video content; audio content; picture content; and
harvesting text associated with the at least one rich media component; and
computer readable program code configured to augment an existing question knowledge base corresponding to the target domain using the questions classified as legitimate and including the harvested answer corresponding to the question; and
computer readable program code configured to automatically provide an answer the automatically obtained question using the harvested answer.

US Pat. No. 10,192,456

STIMULATING ONLINE DISCUSSION IN INTERACTIVE LEARNING ENVIRONMENTS

President And Fellows of ...

1. A method of increasing productivity of a discussion server hosting online discussions in connection with an educational resource provided to students over network-connected devices, the method comprising the steps of:(a) distributing an interactive educational resource over a network to a plurality of student devices, the student devices being associated with students enrolled in a class utilizing the educational resource;
(b) providing a discussion server configured to host a plurality of different online discussions;
(c) hosting, at a discussion server, an online discussion for receiving and making visible, to student devices assigned to a first discussion group, annotations concerning the educational resource and received by the discussion server from the student devices assigned to the first discussion group;
(d) computationally analyzing the annotations to identify high-quality annotations likely to generate responses and stimulate discussion threads based on at least one of historical performance, average word length, or word sophistication; and
(e) making the identified annotations visible to student devices associated with students assigned to one or more second discussion groups to improve quality of annotations received by the discussion server from student devices assigned to the one or more second discussion groups and increase a proportion of generative and argumentative discussion threads in online discussions associated with the one or more second discussion groups, thereby increasing productivity of the discussion server.

US Pat. No. 10,192,453

AIRCRAFT TRAFFIC ALERT AND COLLISION AVOIDANCE SYSTEM WITH AUTOFLIGHT SYSTEM MODE PROTECTION

HONEYWELL INTERNATIONAL I...

1. An autopilot-coupled traffic alert and collision avoidance system (AP TCAS) configured to be implemented on an aircraft, the AP TCAS comprising:a flight control system that is configured to provide a first and a second aircraft vertical speed setting, and further to provide a first and a second horizontal heading direction setting;
an autopilot (AP) system that is configured to automatically cause the aircraft to fly at a vertical speed in accordance with the first vertical speed setting and in accordance with the first horizontal heading direction setting;
a traffic alert and collision avoidance system (TCAS) that senses a range, bearing, and relative altitude of an intruder aircraft, and, based on the sensed range, bearing, and relative altitude, is configured to issue a preventative resolution advisory (RA) that indicates a maximum vertical speed the aircraft should not exceed in order to avoid a conflict with the intruder aircraft and further indicates to maintain the first horizontal heading direction setting; and
an AP/automatic flight control system (AFCS) that is configured to receive the second aircraft vertical speed setting and the second horizontal heading direction setting after the TCAS issues the preventive RA, wherein the second aircraft vertical speed setting exceeds the maximum TCAS vertical speed and wherein the second horizontal heading direction setting is different from the first horizontal heading direction setting, the AP/AFCS being further configured to:
modify the second aircraft vertical speed setting so as to be less than the maximum vertical speed, and relay the modified second aircraft vertical speed to the AP/AFCS system to automatically cause the aircraft to fly at a vertical speed in accordance with the modified second vertical speed setting, and substitute the second horizontal heading direction setting for the first horizontal heading direction setting and relay the first horizontal heading direction setting to the AP/AFCS system to automatically cause the aircraft to continue to fly in accordance with the first horizontal heading direction setting.

US Pat. No. 10,192,452

DETERMINING LANDING LOCATIONS

Amazon Technologies, Inc....

1. A system, comprising:an aerial vehicle configured to deliver a payload to one of a plurality of delivery locations; and
a delivery management service configured with at least a non-transitory memory and a processor configured to:
access a first digital elevation dataset corresponding to a geographic region and collected according to a first collection procedure using a first collection device;
access a second digital elevation dataset corresponding to the geographic region and collected according to a second collection procedure using the first collection device or a second collection device, the second collection procedure being distinct from the first collection procedure;
determine a delivery location for the aerial vehicle by at least comparing the second digital elevation dataset with the first digital elevation dataset to identify an open area within the geographic region, first elevation values of the first digital elevation dataset in the open area and second elevation values of the second elevation dataset in the open area being within a threshold of similarity; and
provide the delivery location to the aerial vehicle.

US Pat. No. 10,192,451

LOW ALTITUDE AIRCRAFT IDENTIFICATION SYSTEM

Airspace Systems, Inc., ...

1. A device configured to communicate identification information associated with low-altitude aircraft, the device comprising:one or more light arrays each including color light emitters that generate a defined color sequence in response to an instruction received from a light controller configured to control the color light emitters, wherein the one or more light arrays are coupled to the low-altitude aircraft;
a radio frequency communication antenna coupled to a radio communication module that transmits information associated with the low-altitude aircraft through a transmitted radio signal, wherein the radio communication module is configured to receive a received radio signal and store the information in a storage, wherein the radio frequency communication antenna is coupled to the low-altitude aircraft and the radio communication module is configured to utilize a secure identifier, and the radio communication module is configured for two-way communication;
a light detection sensor coupled to a light receiver module configured to detect external excitation of the color light emitters based on a light beam with a wavelength and an intensity; and
a location module configured to log a flight path in the storage and transmit positioning data, wherein the location module is coupled to a location system antenna, and the device is coupled to the low-altitude aircraft and configured to utilize the secure identifier.

US Pat. No. 10,192,449

COLLISION RISK CALCULATION METHOD, COLLISION RISK CALCULATION DEVICE, AND COMPUTER-READABLE RECORDING MEDIUM

FUJITSU LIMITED, Kawasak...

1. A non-transitory computer-readable recording medium storing a collision risk calculation program that causes a computer to execute a process comprising:acquiring traveling information on a position and a speed of each of a first ship and a second ship;
calculating a future traveling direction range of at least one of the first ship and the second ship based on a position of the at least one of the first ship and the second ship and traveling information of a ship that sailed in a past;
calculating a risk of collision between the first ship and the second ship based on the future traveling direction range by calculating a risk of collision for each combination of cases where each of the first ship and the second ship sails a future course thereof; and
outputting information regarding ship-to-ship collision using the risk of collision.

US Pat. No. 10,192,441

TRAFFIC SIGNAL SYSTEM FOR CONGESTED TRAFFICWAYS

1. A traffic signal system for congested trafficways in a workspace populated by a plurality of pedestrians and a plurality of vehicle-driver driven land vehicles and at least one mobile ceiling hung piece of equipment, said system comprising:a plurality of transponders for wearing by pedestrians and indicating each such wearer's status equates at least to being a pedestrian;
a plurality of vehicle-drivers;
a plurality of transponders for wearing by land vehicles and indicating each such wearer's status equates as least to being a land vehicle;
at least one transponder for wearing by the at least one mobile ceiling hung piece of equipment;
a plurality of mobile traffic lights mounted on the land vehicles; and
a plurality of mobile sensors/readers of transponder output mounted on the land vehicles;
wherein the land vehicles include fork trucks as well as mobile aerial work platforms;
wherein each of said mobile sensors/readers of transponder output is configured to monitor for at least one alarm condition and, in the event of the alarm condition, activates at least one alarm signal to the respective vehicle driver.

US Pat. No. 10,192,436

RED LIGHT WARNING SYSTEM BASED ON PREDICTIVE TRAFFIC SIGNAL STATE DATA

TRAFFIC TECHNOLOGY SERVIC...

1. A computer-implemented method comprising steps of:identifying a traffic signal;
accessing a signal timing plan of the identified traffic signal;
in a processor, pre-processing the signal timing plan to derive a set of rules from the signal timing plan and storing the derived rules in a derived rules database, the derived rules including (a) identification of state changes that are certain to occur; (b) identification of state changes that begin a fixed-time control event; and (c) identification of state changes that necessarily end with a change to red signal state;
receiving a set of predicted traffic signal state data for the identified traffic signal located at an intersection;
wherein the predicted traffic signal state data indicates, for a phase of the identified traffic signal, a current signal state, an expected signal state change to a next signal state, and a predicted time interval remaining until the expected signal state change;
applying a timestamp to the received predicted traffic signal state data;
querying the derived rules database, based on the predicted traffic signal state data, to obtain results;
determining, based on the query results, that the expected signal state change will change to a fixed-time control event;
determining, based on the query results, that at a conclusion of the fixed-time control event, the identified traffic signal will change state to a red signal state;
based on the determination that the fixed-time control event will conclude with the selected traffic signal changing state to the red signal state:
generating a red-light warning message associated with the identified traffic signal;
applying the timestamp to the red-light warning message; and
transmitting the time-stamped red-light warning message to a downstream application for input into operational logic of an autonomous vehicle system;
wherein the downstream application is configurable, for a non-autonomous vehicle, to cause display of a message in the vehicle based on the time-stamped, generated red-light warning message; and for an autonomous or semi-autonomous vehicle, to provide the red-light warning message to the operational logic to affect controlling the vehicle ahead of the intersection.

US Pat. No. 10,192,435

REMOTE CONTROL OF TRAFFIC HEADS

GE LIGHTING SOLUTIONS, LL...

1. A traffic communication network comprising:a signaling system comprising a plurality of light signaling devices disposed around at least one traffic intersection, each including a wireless node having a processor; and
a remote control system configured to wirelessly transmit commands to (i) a traffic intersection controller and (ii) the plurality of light signaling devices via the wireless node, the commands being configured for controlling each of the plurality of light signaling devices;
wherein the plurality of light signaling device are in wireless communication with the remote control system and are configured to transmit status information and provide location information to the remote control system;
wherein the remote control system is configured to wirelessly receive the status information from the plurality of light signaling devices and controls the plurality of light signaling devices, based on the status information received.

US Pat. No. 10,192,428

CODESET COMMUNICATION FORMAT AND RELATED METHODS AND STRUCTURES

Universal Electronics Inc...

1. A method comprising:describing a codeset in a format block comprising a first portion and a second portion, wherein the first portion has a first data field that describes a key of a controlling device and a second data field that describes at least one function that is to be performed by a controllable device in response to an activation of the key, wherein the key of the controlling device and the at least one function that is to be performed by the controllable device are each described via use of one or more characters taken from an alphabet, wherein the one or more characters taken from the alphabet for use in describing the key of the controlling device are visibly reproduced on the controlling device in association with the key of the controlling device, and wherein the second portion comprises information that is to be used by a processing device of the controlling device in response to an activation of the key of the controlling device to cause a transmission device of the controlling device to transmit to the controllable device at least one command communication for controlling the at least one function of the controllable device that is described within the second data field;
providing the format block to the controlling device; and
causing the controlling device to use the format block to configure itself to issue command communications to the controllable device in response to an activation of the key of the controlling device.

US Pat. No. 10,192,427

COMMUNITY EMERGENCY NOTIFICATION SYSTEM WITH INTER-ORGANIZATIONAL COMPATIBILITY

1. A method of inter-organizational alert communication, comprising:receiving, by a notification management entity, an alert from a user through a community safety system application operating on a user device, wherein the notification management entity comprises one or more servers, the user device comprises a memory and a processor, and the user device and the notification management entity are connected through a network;
identifying, by the notification management entity, a location of the user;
determining, by the notification management entity, an organization associated with the location of the user;
determining, by the notification management entity, whether the user is a member of the organization;
determining, by the notification management entity, whether the location of the user is within a security zone of the organization;
sending, by the notification management entity, the alert from the user to one or more administrator users of the organization based on the determination of whether the user is a member of the organization and the determination of whether the location of the user is within the security zone of the organization; and
opening a two-way communication channel between the user and at least one of the one or more administrator users of the organization.

US Pat. No. 10,192,423

FAULT DETECTION DEVICES AND FAULT DETECTION METHODS

QUANTA COMPUTER INC., Gu...

1. A fault detection device, adapted to an electronic device having a display screen, comprising:a first warning unit, generating a first warning signal;
a second warning unit, generating a second warning signal;
a first sensor, disposed in front of the display screen for obtaining and outputting a first current brightness value of the display screen every first predetermined period of time; and
a microprocessor, coupled to the first warning unit, the second warning unit and the first sensor for comparing the first current brightness value with a first previous brightness value;
wherein the microprocessor enables the first warning unit to generate the first warning signal when the first current brightness value is equal to the first previous brightness value, and the microprocessor enables the second warning unit to generate the second warning signal when the first current brightness value is equal to the first previous brightness value for more than a second predetermined period of time, wherein the second predetermined period of time is greater than the first predetermined period of time;
wherein the first sensor is a light sensor; and
wherein the first warning unit is an LED and the second warning unit is a buzzer.

US Pat. No. 10,192,422

HVAC SYSTEM AND AN HVAC CONTROLLER CONFIGURED TO GENERATE MASTER SERVICE ALARMS

Lennox Industries Inc., ...

1. A method of generating an alarm based on temperature conditions within an enclosed space, the method comprising:receiving, by a processor of a heating, ventilation, and air conditioning (HVAC) system, information for operating the HVAC system in at least one of a cooling mode and a heating mode;
determining, by the processor of the HVAC system from the received information, whether air temperature within the enclosed space is approaching a setpoint temperature, wherein the setpoint temperature comprises a target temperature setting of the HVAC system indicative of an existing or future comfort violation of a user desired temperature setting;
responsive to a determination that the air temperature within the enclosed space has failed to approach the setpoint temperature, determining by the processor of the HVAC system, whether anomaly conditions exist;
responsive to a determination that the anomaly conditions do not exist, generating the alarm by the processor of the HVAC system, wherein the generated alarm comprises a master service alarm indicating that the HVAC system is in need of service, wherein the master service alarm is used by the processor of the HVAC system to provide a prognosis of the HVAC system;
forwarding the generated alarm to at least one communication device that is distinct from the HVAC system, wherein the at least one communication device is a non-HVAC device that is configured to interact with the HVAC system;
responsive to a determination that the anomaly conditions exist, no alarm is generated; and
wherein the anomaly conditions comprise the HVAC system entering a defrost cycle.

US Pat. No. 10,192,421

DEVICE FOR CONTROLLING A CLOSURE SYSTEM OF AN ARTICLE AND CORRESPONDING ARTICLE

GENIUS OBJECTS, Bordeaux...

1. A monitor device for monitoring the closed or open state of an article, such as an article of clothing or an article of baggage, the monitor device being an electronic circuit comprising:a first closure system comprising first and second electrically conductive elements that are electrically connectable and disconnectable relative to each other, with at least the first element comprising a hollow body;
an electrical power supply, housed in the hollow body, said electrical power supply having a positive pole and a negative pole, one of the poles being electrically connected to the hollow body of the first element, and the other pole being connected to an electrically conductive element having means electrically insulating said electrically conductive element from the hollow body and passing through said hollow body;
a second closure system comprising a first terminal and a second terminal; and
a detector-and-signaling device comprising both a detector module configured to be powered by the power supply when the first closure system is in the closed state and to detect the open or closed state of the second closure system, and also a signaling module configured to issue a signal as a function of the open or closed state of the second closure system as detected by the detector module.

US Pat. No. 10,192,420

MONITORING DEVICE AND MONITORING SYSTEM

MSA EUROPE GMBH, Jona (C...

1. A mobile monitoring device, comprising:at least one transmitter;
at least one receiver;
at least one sensor for recording measured values on or in at least one of the following: a wearing person, a surrounding of the wearing person, equipment of the wearing person, or any combination thereof;
at least one processing unit in operative connection with the at least one transmitter, the at least one receiver, and the at least one sensor;
wherein the at least one processing unit sets the mobile monitoring device to one of a basic mode and a base station mode according to a setting;
wherein, in the basic mode, the at least one processing unit is configured to monitor the measured values of the at least one sensor,
wherein, in the base station mode, the at least one processing unit is configured to monitor measured values of at least one other, compatible mobile monitoring device operating in the basic mode, and
wherein the at least one processing unit is configured to automatically set the mobile monitoring device to the basic mode at a time of start up by coupling, via physical proximity to or physical contact with, a compatible mobile monitoring device set to the base station mode.

US Pat. No. 10,192,419

SHOPPING PARTY LOCATOR SYSTEMS AND METHODS

WALMART APOLLO, LLC, Ben...

1. A system for locating a member separated from a group, the system comprising:a plurality of scanning devices for scanning bar codes; and
a computer system of a computing system, which computer system is coupled to the plurality of scanning devices and programmed to:
i. receive from a scanning device of the plurality of scanning devices a signal comprising data associated with a scanned bar code;
ii. automatically identify a group in response to processing the data from the scanning device;
iii. automatically display a photo of the group on computers of the computing system in response to identifying the group, wherein a member separated from the group is identifiable;
iv. using data received and stored, automatically generate and transmit to all computers of the computing system that displays a photo of the separated member of the group;
v. receive from a scanning device of the plurality of scanning devices a signal comprising data associated with a scanned bar code of a label of the separated member from the group; and
vi. automatically notify the computing system that the separated member of the group has been scanned.