US Pat. No. 10,171,294

INFORMATION PROCESSING DEVICE AND SYSTEM DESIGN SUPPORT METHOD

NEC CORPORATION, Tokyo (...

1. An information processing device comprising:a memory storing instructions; and
one or more processors configured to execute the instructions to:
generate a computer communication requirement, based on a software communication requirement and identifiers of computers in which software components in a system are to be deployed in an environment, the software communication requirement indicating a connection between software components to be connected among the software components in the system and characteristics conditions of the connection between the software components to be connected, the computer communication requirement indicating a connection between computers to be connected among the computers in the environment and characteristics conditions of the connection between the computers to be connected, and generate a network requirement, based on the computer communication requirement, the network requirement indicating a connection to be provided by a network in the environment and characteristics conditions of the connection to be provided by the network; and
generate a network setting, a computer communication setting, and a software communication setting, based on the network requirement, the computer communication requirement, and the software communication requirement, respectively, the network setting indicating information for configuring the connection to be provided by the network, the computer communication setting indicating information for configuring the computers to be connected with respect to the connection between the computers to be connected, and the software communication setting indicating information for configuring the software components to be connected with respect to the connection between the software components to be connected.

US Pat. No. 10,171,293

INITIALIZING, PROVISIONING, AND MANAGING DEVICES

Comcast Cable Communicati...

1. A method comprising:receiving, from a network server, and processing, by a first device, a modem configuration file specifying a network address type corresponding to a first protocol of a plurality of protocols; and
sending, from the first device to a second device, a message instructing the second device to use the network address type corresponding to the first protocol when requesting, from the network server, a network address for the second device.

US Pat. No. 10,171,292

DEPLOYING A CLOUD INFRASTRUCTURE IN A REMOTE SITE

Amazon Technologies, Inc....

1. A method for deploying a cloud infrastructure, the method comprising:obtaining a specification of one or more network resources in a new region of a service provider, wherein the specification comprises at least one of the following: a number of servers to operate within the new region or information identifying one or more services to be performed by the one or more network resources in the new region;
configuring, based on the specification, a virtual private cloud (VPC) within an existing region of the service provider with a plurality of core configuration services;
establishing a network connection between the VPC and the new region;
configuring, over the established connection, the one or more network resources in the new region as a network infrastructure, wherein the network infrastructure includes a number and type of network switches, using at least one of the plurality of core configuration services;
using the plurality of core configuration services, configuring the one or more network resources, including the network switches, in the network infrastructure to run at least one compute service;
transferring the plurality of core configuration services to the one or more network resources in the new region; and
disconnecting the new region from the VPC.

US Pat. No. 10,171,291

TENANT-SPECIFIC LOG FOR EVENTS RELATED TO A CLOUD-BASED SERVICE

International Business Ma...

1. A method to establish and utilize a tenant-specific log for events related to a cloud-based service, the method comprising:creating, by one or more processors, a metamodel for a cloud-based service running on a cloud, wherein the cloud-based service is provided to a specific tenant of the cloud, and wherein the metamodel describes types of resources, on the cloud, that are providing the cloud-based service for the specific tenant and that the specific tenant desires to monitor;
appending, by one or more processors, the metamodel to the cloud-based service;
in response to the cloud-based service being executed for the specific tenant of the cloud, applying, by one or more processors, the metamodel to identify a set of resources, on the cloud, that are providing the cloud-based service for the specific tenant;
issuing, by one or more processors, instructions to establish a tenant-specific log for events related to the cloud-based service, wherein the tenant-specific log tracks events that occur on each actual resource from the set of resources, on the cloud, that are providing the cloud-based service to the specific tenant, and wherein the tenant-specific log identifies a specific unit of hardware being used to provide the cloud-based service to the specific tenant; and
in response to the tenant-specific log recording access to the specific unit of hardware by a predefined party, transferring, by one or more processors, all operations related to the cloud-based service from the specific unit of hardware to another unit of hardware, wherein the predefined party is an authorized user of the specific unit of hardware, and wherein said another unit of hardware is a local device that is available only to the specific tenant.

US Pat. No. 10,171,290

SYSTEMS AND METHODS FOR REAL-TIME CORRECTION OF CORE APPLICATIONS

Sprint Communications Com...

1. A method for correcting connectivity failures of core applications on a user equipment (UE), the method comprising:detecting, via execution of a client on a processor of the UE, a plurality of request-reply message sequences between a core application of a plurality of core applications and a corresponding server;
learning, by execution of the client, a set of reply messages within the plurality of request-reply message sequences that are coming from the corresponding server and not producing a connection error with the corresponding server;
based on the set of reply messages, creating, by execution of a ghost client on the processor of the UE, a series of ghost replies that each mimics a reply that is one of the set of learned reply messages coming from the corresponding server;
retaining, by execution of the client within a memory of the UE, the series of ghost replies;
subsequent to retaining the series of ghost replies, detecting, by the client, that the core application has exceeded a threshold number of request messages that are unanswered by the corresponding server due to a lack of reply by the corresponding server; and
based on the detecting, feeding, by execution of the client, a ghost reply from the retained series to the core application.

US Pat. No. 10,171,289

EVENT AND ALERT ANALYSIS IN A DISTRIBUTED PROCESSING SYSTEM

International Business Ma...

1. A method of event and alert analysis in a distributed processing system, the distributed processing system including a local event analyzer embedded in an alert analyzer, the method comprising:receiving, by the local event analyzer embedded in the alert analyzer, events from an event queue;
creating, based on the received events and local event analysis rules specific to the alert analyzer, by the local event analyzer, a temporary alert for the alert analyzer, wherein the temporary alert is an alert that is visible to one or more specific alert analyzers including the alert analyzer;
receiving, by the alert analyzer, alerts created by a plurality of event analyzers, wherein each event analyzer of the plurality of event analyzers is configured to create the alerts by processing the events from the event queue according to each event analyzer's own event analysis rules; and
analyzing, by the alert analyzer, based on alert analysis rules, the temporary alert and the alerts created by the plurality of event analyzers.

US Pat. No. 10,171,288

DIAGNOSING FAULTS IN STATELESS DISTRIBUTED COMPUTING PLATFORMS

International Business Ma...

1. A computer-implemented method, comprising:processing a plurality of communication messages exchanged between two or more distributed components within a stateless distributed system, wherein the plurality of communication messages comprises (i) one or more representational state transfer messages and (ii) one or more remote procedure call messages;
determining a message context for each of the plurality of communication messages based on one or more message identifiers extracted from each of the plurality of communication messages;
grouping the plurality of communication messages into multiple clusters pertaining to message invocation, wherein said grouping is based on the determined message context for each of the plurality of communication messages;
generating a control flow graph by creating one or more connections across the multiple clusters; and
detecting a causal chain of events associated with a detected fault in the stateless distributed system by navigating the control flow graph;
wherein the steps are carried out by at least one computing device.

US Pat. No. 10,171,287

MULTI-USER ANALYTICAL SYSTEM AND CORRESPONDING DEVICE AND METHOD

INTERNATIONAL BUSINESS MA...

1. A method for isolating users on a multi-user computer system, the method comprising:intercepting a request of a user;
determining whether the request is for a core object in a group that is one of an analytical job, a scoring job, user data, an analytical stream, a predictive model, a configuration for the analytical job, and a configuration for the scoring job, the group consisting of: an analytical job, a scoring job, user data, an analytical stream, a predictive model, a configuration for the analytical job, and a configuration for the scoring job;
upon determining that the request is for the core object,
attaching a user context of the user to the request, the user context comprising a user identifier of the user and metadata of the user;
determining an isolation type of the core object using configuration information of an isolation policy in the metadata;
routing the request to a storage device identified within the metadata and invoking an Application Programming Interface (API) to process the request, if the isolation type indicates a shared database is to be used and different users are to be distinguished from one another; and
managing a first core object specific to the user, if the isolation type indicates the shared database is to be used and different users are not to be distinguished from one another; and
abandoning the request upon determining that the request is not for the core object.

US Pat. No. 10,171,285

PROACTIVE M2M FRAMEWORK USING DEVICE-LEVEL VCARD FOR INVENTORY, IDENTITY, AND NETWORK MANAGEMENT

Cisco Technology, Inc., ...

1. A method comprising:receiving, by a centralized server corresponding to a network management system, device attributes for a newly connected network device;
using, by the centralized server, the device attributes to identify the newly connected network device;
adding, by the centralized server, the newly connected network device to a device directory at the centralized server comprising a listing of network devices registered to the network management system, wherein the network management system is configured to cause an existing network device to forward, over a peer-to-peer network connection to the newly connected network device, location information for the network management system designated to receive the device attributes, and wherein the newly connected network device, after receiving the location information and additional information, is enabled to generate and send the device attributes comprising an identity and asset data; and
notifying, by the centralized server, that the newly connected network device has been added;
wherein receiving the device attributes comprises receiving, from the network device, a vCard generated by the newly connected network device, the vCard comprising the device attributes necessary for at least one of the following:
identifying the newly connected network device,
registering the newly connected network device,
adding the newly connected network device to the device directory, and
managing the newly connected network device.

US Pat. No. 10,171,284

REACHABILITY-BASED COORDINATION FOR CYCLIC DATAFLOW

Microsoft Technology Lice...

1. A computer-readable storage medium storing computer-executable instructions that, when executed by a processor, configure the processor to perform operations comprising:scheduling a plurality of threads to operate independently on a plurality of partitions of data, wherein the plurality of threads includes a first thread and a second thread, and wherein the plurality of partitions includes a first partition and a second partition;
beginning a first operation on the first partition by the first thread;
beginning the first operation on the second partition by the second thread;
tracking progress of the first operation by the first thread using a replicated data structure;
tracking progress of the first operation by the second thread using the replicated data structure;
for a record on which the first operation is to be performed, adding an entry to the replicated data structure, wherein the entry includes a timestamp, and wherein the timestamp indicates an epoch and an iteration at which the record was produced;
determining a number of yet-to-be-processed records for a selected entry of the replicated data structure, wherein the selected entry has a most recent timestamp for the first thread; and
in response to the number of yet-to-be-processed records for the selected entry being zero, terminating the first thread.

US Pat. No. 10,171,283

GLOBAL PRODUCTION RULES FOR DISTRIBUTED DATA

International Business Ma...

1. A method of running a global production rule on data distributed over a plurality of machines, comprising:receiving a local production rule that can run on each of the plurality of machines to jointly accomplish a global computation specified in a global production rule;
deploying the local production rule to each of the plurality of machines, said each of the plurality of machines storing a portion of the data and running an instance of a rules engine that can run the local rule;
allowing communicating between the plurality of machines, intermediate data produced by the instance of the rules engine running the local production rule on said each of the machines; and
allowing coordinating between the plurality of machines to synchronize one or more local computations performed locally according to the local production rule on said each machine,
wherein the global production rule is automatically translated into the local production rule,
wherein to translate the global production rule automatically translated into the local production rule, the global production rule is automatically translated into an intermediate language, the intermediate language is automatically transformed to add one or more explicit communication points, and the intermediate language is automatically translated to the local production rule.

US Pat. No. 10,171,282

DYNAMIC OPTIMIZATION OF AMPLITUDE WEIGHTS

Sprint Communications Com...

1. A method for dynamic optimization of amplitude weights, the method comprising:receiving user data from a set of user devices, wherein the user data comprises reference signal received power (RSRP) data;
identifying antenna gain data;
based on the RSRP data and the antenna gain data, generating insertion loss data;
determining the insertion loss data is above a predetermined threshold;
in response to determining that the insertion loss data is above the predetermined threshold,
receiving current radio settings, wherein the current radio settings comprise a set of current amplitude values,
based on the current radio settings, generating a new set of amplitude values,
transmitting a signal to apply the new set of amplitude values.

US Pat. No. 10,171,281

4-LEVEL PULSE AMPLITUDE MODULATION TRANSMITTER ARCHITECTURES UTILIZING QUADRATURE CLOCK PHASES

International Business Ma...

1. A four-level pulse amplitude modulation transmitter, comprising:a first processing section including:
a first set of three pairs of retiming latches and a single retiming latch, wherein each pair comprises a first retiming latch and a second retiming latch connected in series between a different one of four parallel data inputs and a first serializer, and the single retiming latch is connected between a remaining one of the four parallel data inputs and the first serializer for equally distributing a timing margin for all quarter-rates of a quarter-rate four-phase quadrature clock, wherein the one phase of the quarter-rate four-phase quadrature clock triggers all of the first retiming latches in each or the three pairs and the single retiming latch, and the remaining three phases of the quarter-rate four-phase quadrature clock triggers a respective one of the second retiming latch in each of the three pairs of retiming latches in sequence.

US Pat. No. 10,171,280

DOUBLE-SIDEBAND COFDM SIGNAL RECEIVERS THAT DEMODULATE UNFOLDED FREQUENCY SPECTRUM

1. Receiver apparatus for double-sideband coded orthogonal frequency-division modulation (COFDM) radio-frequency signals, said receiver apparatus comprising:means for selectively receiving a double-sideband coded orthogonal frequency-division modulation (DSB-COFDM) radio-frequency signal;
means for developing a first set of QAM symbols descriptive of the discrete Fourier transform of COFDM carriers from the upper sideband of the selectively received DSB-COFDM radio-frequency signal;
means for developing a second set of QAM symbols descriptive of the discrete Fourier transform of COFDM carriers from the lower sideband of the selectively received DSB-COFDM radio-frequency signal;
means for serially arranging said first set of QAM symbols in each COFDM symbol according to ascending spectral order of COFDM carriers in said upper sideband of said selectively received double-sideband coded orthogonal frequency-division modulation radio-frequency signal;
means for serially arranging said second set of QAM symbols in each COFDM symbol according to descending spectral order of COFDM carriers in said lower sideband of said selectively received DSB-COFDM radio-frequency signal;
means for demapping said first set of QAM symbols as thus serially arranged to recover a first succession of QAM symbol map labels in soft-bit format and for demapping said second set of QAM symbols as thus serially arranged to recover a second succession of QAM symbol map labels in soft-bit format; and
a diversity combiner of soft bits of corresponding QAM symbol map labels in said first and second successions thereof, thereby to reproduce soft bits of coded data.

US Pat. No. 10,171,279

TRANSMITTER AND RECEIVER

Mitsubishi Electric Corpo...

1. A transmitter comprising:processing circuitry:
to determine a null symbol arrangement pattern in a two-dimensional space by arranging one of at least two different unit patterns in each of parts of the two-dimensional space and combining the at least two different unit patterns determining positions of data symbols and null symbols, the two-dimensional space being divided into the parts each having a size of the unit pattern, the two-dimensional space being defined by a plurality of subcarriers for use in multicarrier transmission and a time series represented in units of time determined in accordance with a single symbol, wherein the unit pattern is a combination of a plurality symbols defined having a dimensional size defined by a number of rows and columns of symbols which include the data symbols and the null symbols, each unit pattern as a whole representing a different digital data value;
to assign, in the two-dimensional space, transmission data to positions of data symbols of the respective subcarriers determined in accordance with the null symbol arrangement pattern;
to generate the data symbols by modulating the transmission data assigned to the respective subcarriers, assign null symbols having a power of 0 to positions of null symbols of the respective subcarriers determined in accordance with the null symbol arrangement pattern, and generate transmission symbols of the respective subcarriers;
to output a baseband signal on a basis of the generated transmission symbols; and
to generate a pseudorandom sequence on a basis of an initial value, wherein
the processing circuitry determines the null symbol arrangement pattern by combining the unit patterns on a basis of the pseudorandom sequence.

US Pat. No. 10,171,278

METHODS AND APPARATUS FOR FREQUENCY OFFSET ESTIMATION

CAVIUM, LLC, Santa Clara...

1. A method, comprising:determining a demodulation reference signal (DMRS) frequency offset estimate from DMRS symbols in a received signal;
determining a cyclic prefix (CP) frequency offset estimate from cyclic prefix values associated with symbols received in the received signal, wherein the determining the CP frequency offset estimate includes adjusting a time offset of the received signal and separating a selected user's uplink transmission from the time adjusted received signal to generate a separated signal; and
combining the DMRS and CP frequency offset estimates to determine a final frequency offset estimate.

US Pat. No. 10,171,277

FRAME FORMAT AND DESIGN OF WAKE-UP FRAME FOR A WAKE-UP RECEIVER

HUAWEI TECHNOLOGIES CO., ...

1. A method of providing a low-rate data signal, the method comprising:receiving input data bits;
retrieving a stored multicarrier waveform for a multicarrier symbol, the multicarrier symbol including a null sub-carrier;
Manchester modulating the input data bits onto successive multicarrier symbols in time domain, each multicarrier symbol being encoded as two sub-symbols of equal length, each multicarrier symbol having one sub-symbol encoded and stored with a corresponding half of the multicarrier waveform and one sub-symbol encoded and stored with a zero energy waveform;
up-converting the successive multicarrier symbols to a carrier frequency to provide the low-rate data signal; and
transmitting the low-rate data signal over a wireless channel.

US Pat. No. 10,171,274

DATA TRANSMISSION APPARATUS, DATA RECEPTION APPARATUS, DATA TRANSMISSION AND RECEPTION SYSTEM

SK HYNIX INC., Icheon (K...

1. A data reception apparatus, comprising:a reception driver configured to receive N Tx signals that correspond to N binary data and are transmitted in parallel through N single-ended signal lines, and to generate decoded data having a bit number corresponding to the number of all cases in which the N Tx signals are compared to each other, wherein N is a natural number equal to or larger than 2; and
a decoder configured to restore the N binary data by combining bits of the decoded data,
wherein the reception driver receives four Tx signals, and generates 6-bit decoded data by comparing the four Tx signals to each other, and
wherein the decoder comprises:
a first multiplexer configured to select one of first and second bits of the decoded data;
a second multiplexer configured to select one of third and fourth bits of the decoded data; and
a logic circuit configured to perform an XOR operation on fifth and sixth bits of the decoded data,
wherein outputs of the first and second multiplexers are determined in response to an output of the logic circuit, and
wherein the outputs of the first and second multiplexers and the fifth and sixth bits are output as four binary data.

US Pat. No. 10,171,273

DECISION FEEDBACK EQUALIZER AND INTERCONNECT CIRCUIT

FUJITSU LIMITED, Kawasak...

1. A decision feedback equalizer comprising:a comparison circuit configured to compare a value indicated as 2n of a pulse amplitude modulated signal with a threshold value, wherein n is an integer of 2 or more;
a latch circuit configured to retain data of a comparison result of the comparison circuit;
a decoder configured to decode the retained data by the latch circuit; and
a setting circuit on/off-controlled by the retained data fed back from the latch circuit and configured to set the threshold value based on the retained data fed back from the latch circuit,
the latch circuit is disposed between the comparison circuit and the decoder.

US Pat. No. 10,171,272

COMPUTATIONALLY EFFICIENT ALGORITHM FOR MITIGATING PHASE NOISE IN OFDM RECEIVERS

Intel Corporation, Santa...

1. An inter-carrier interference (ICI) mitigation circuit associated with an orthogonal frequency division multiplexing (OFDM) receiver, comprising:an ICI cancellation circuit configured to:
receive an OFDM symbol associated with an OFDM signal;
determine an ICI associated with one or more OFDM subcarriers within the OFDM symbol, wherein the ICI associated with an OFDM subcarrier is determined based on a relation between one or more ICI coefficients and one or more ICI kernels associated with the respective OFDM subcarrier; and
cancel the ICI from the one or more OFDM subcarriers associated with the OFDM symbol, in order to generate a desired OFDM symbol, wherein the ICI is determined and cancelled in accordance with a predetermined ICI mitigation algorithm.

US Pat. No. 10,171,271

METHOD AND DEVICE FOR TRANSMITTING INTERFERENCE CANCELLATION INFORMATION FOR CANCELLING INTERFERENCE BETWEEN CELLS

LG ELECTRONICS INC., Seo...

1. A method for transmitting interference cancellation information, the method comprising:estimating a symbol error rate or a packet error rate in a cell-edge area based on feedback information received from a terminal belonging to a cell controlled by a predetermined base station;
determining a probability indicator that indicates a probability of cancelling inter-cell interference in the cell-edge area by comparing the symbol error rate or the packet error rate with a predetermined threshold;
transmitting information on the probability indicator to an adjacent cell, and
transmitting scheduling information based on the probability indicator to the terminal.

US Pat. No. 10,171,270

SYSTEMS AND METHODS FOR CORRECTING FOR PRE-CURSOR AND POST-CURSOR INTERSYMBOL INTERFERENCE IN A DATA SIGNAL

Cadence Design Systems, I...

1. A circuit comprising:a first data path comprising a first plurality of circuit components, the first data path receiving an input data signal x at time interval n and retrieving, from the input data signal x, an estimated next data bit d_aux[n?1] corresponding to a time interval n?1 wherein the first plurality of circuit components comprising:
a plurality of addition circuits to apply a plurality of voltage offsets, associated with correction for post-cursor intersymbol interference, to the input data signal x received at the time interval n to generate a plurality of input data signals corresponding to the time interval n;
a plurality of slicers to convert the plurality of input data signals to a plurality of data bits that correspond to the plurality of input data signals;
a multiplexer to receive the plurality of data bits and select a particular data bit, from the plurality of data bits, as output of the multiplexer, the particular data bit comprising a data bit d[n] corresponding to the time interval n, the particular data bit being selected by the multiplexer based on the estimated next data bit d_aux[n?1] provided by a digital flip-flop included in the first plurality of circuit components; and
the digital flip-flop to receive the particular data bit from the output of the multiplexer and delay the data bit d[n] to produce the estimated next data bit d_aux[n?1]; and
a second data path comprising a second plurality of circuit components, the second data path receiving the input data signal x at the time interval n and retrieving, from the input data signal x, a previous data bit d[n?1] corresponding to a time interval n?1 based on the estimated next data bit retrieved by the first data path.

US Pat. No. 10,171,269

EQUALIZER CIRCUIT AND INTEGRATED CIRCUIT INCLUDING THE SAME

SAMSUNG ELECTRONICS CO., ...

1. An equalizer circuit comprising:an equalizer controller configured to provide an enable signal, a delay control signal, and a voltage control signal based on a control signal; and
at least one equalizer configured to provide an equalizer signal based on the enable signal, the delay control signal and the voltage control signal, the at least one equalizer configured to provide the equalizer signal to a corresponding connection node, the corresponding connection node being connected to a corresponding logic circuit,
wherein the at least one equalizer includes,
a delay control circuit configured to delay a transfer signal from the corresponding logic circuit to provide a delayed transfer signal, the delay control circuit configured to delay the transfer signal based on the delay control signal, and
a voltage control circuit configured to provide the equalizer signal based on the delayed transfer signal and the voltage control signal,
wherein the voltage control circuit includes,
a voltage control inverter configured to provide the equalizer signal based on the delayed transfer signal.

US Pat. No. 10,171,266

SWITCH-EXTENDER AND A METHOD FOR CALIBRATING

1. A method for calibrating a system comprising a measurement system, a switch-extender, signal connects, attenuators and one calibration system comprising a first measurement unit, a second measurement unit, and a signal splitter, wherein the method comprises the steps of:connecting a first output of the signal splitter to the first measurement unit;
connecting a second output of the signal splitter to the second measurement unit;
connecting the first and the second measurement unit;
connecting the switch extender to the measurement system;
connecting each one end of the several signal connectors to the switch extender;
connecting the other end of one of the several signal connectors with an attenuator to an input of the signal splitter;
generating a signal with a specific signal level and/or a specific signal frequency with the measurement system;
measuring a signal level and/or a signal frequency with the calibration system at the first output of the signal splitter, measuring a signal power at the second output of the signal splitter and transmitting measured values to the first measurement unit;
determining a difference between the measured signal level and/or the measured signal frequency and the generated signal with the specific signal level and/or the specific signal frequency; and
calculating calibration data by using the determined difference between the measured signal level and/or the measured signal frequency and the generated signal with the specific signal level and/or the specific signal frequency.

US Pat. No. 10,171,265

UPLINK CHANNEL INFORMATION

QUALCOMM Incorporated, S...

1. A method of beamforming data, the method comprising:receiving, at a first station of a plurality of stations, a trigger frame from an access point of a wireless network;
performing, at the first station, a downlink channel estimation based on the trigger frame;
determining, at the first station, uplink beamforming parameters based at least in part on the downlink channel estimation, wherein determining the uplink beamforming parameters comprises:
determining a reverse of the downlink channel estimation to generate an uplink channel estimate; and
determining the uplink beamforming parameters based on the uplink channel estimate; and
sending data from the first station to the access point based on the uplink beamforming parameters.

US Pat. No. 10,171,263

CAPABILITY AWARE ROUTING

CISCO TECHNOLOGY, INC., ...

1. A method comprising:detecting a plurality of equal cost nodes, wherein
the plurality of equal cost nodes are equal cost with respect to a source node, and
the source node is capable by virtue of implementing a data plane capability;
determining whether one or more nodes of the plurality of equal cost nodes are capable, wherein
a capable node of the one or more nodes is capable by virtue of implementing the data plane capability, and
a non-capable node of the one or more nodes is non-capable by virtue of not implementing the data plane capability;
in response to at least one of the plurality of equal cost nodes being capable, selecting a capable node of the at least one of the plurality of equal cost nodes as a next-hop destination for network traffic; and
in response to none of the plurality of equal cost nodes being capable,
selecting a non-capable node of the plurality of equal cost nodes as the next-hop destination, and
implementing a network path from the source node to a capable downstream node, wherein
the capable downstream node is downstream of the non-capable node, and
the capable downstream node is capable by virtue of implementing the data plane capability.

US Pat. No. 10,171,260

MANAGING ROUTER ADVERTISEMENT MESSAGES TO SUPPORT ROAMING OF WIRELESS MOBILE CLIENT DEVICES

Cisco Technology, Inc., ...

1. A method comprising:at a controller configured to control one or more wireless access point devices that serve wireless mobile client devices that are part of a first virtual local area network, storing information identifying any other controllers that control other wireless access point devices to which at least one wireless mobile client device that is part of the first virtual local area network has roamed;
storing a list of one or more wireless mobile client devices from which router solicitation messages have been received;
at the controller, receiving a router advertisement message sent by a network router device;
determining whether the router advertisement message is a multicast message and if so determining for which virtual local area network the router advertisement message is intended;
determining whether the router advertisement responds to a router solicitation message received from a particular wireless mobile client device on the stored list;
generating a unicast router advertisement message by changing a header field of the router advertisement message to replace a multicast destination address in the router advertisement message with a media access control address for a wireless mobile client device that is part of the first virtual local area network for which the router advertisement message was intended;
sending the unicast router advertisement message to one or more wireless access point devices for wireless transmission to the particular wireless mobile client device when it is determined that the router advertisement message is intended for the first virtual local area network, wherein the unicast router advertisement message is sent without waiting for a next permitted router advertisement message according to a stored router advertisement frequency parameter; and
forwarding a copy of the multicast router advertisement message to the other controllers that control wireless access point devices to which at least one wireless mobile client device that is part of the first virtual local area network has roamed.

US Pat. No. 10,171,258

DATA COLLECTION METHOD AND SYSTEM

International Business Ma...

1. A method of collecting data into a server from a plurality of client computers each having a storage unit, the method comprising the steps of:reconstructing, by the server, a collection network in a tree structure at predetermined time intervals, the collection network comprising a highest node embodied by the server and a plurality of child nodes embodied by respective ones of the plurality of client computers;
broadcasting, by the server, a parent-child declaration to the client computers through the collection network, the parent-child declaration assigning different ones of the client computers to different levels of the collection network;
receiving, by the server, data accumulated by at least one client computer of the client computers disposed in a level one below the server in the collection network;
transmitting, by the server, an ACK for the data accumulated by the server to the at least one client computer disposed in the level one below the server in the collection network, wherein the ACK causes the at least one client computer disposed in the level one below the server to delete an entry in an identifier association table associated with the data accumulated by the server and maintain at least one entry in the identifier association table including data yet to be acknowledged by the server for transmission in a next reconstructed collection network;
generating, by each of the client computers, an identifier association table upon receipt of the parent-child declaration, the identifier association table recording therein association of transmitted and received data; and
recording, by each of the client computers, the association of transmitted and received data to the identifier association table when transferring the data to a parent node thereof through of the collection network,
wherein the identifier association table of each of the client computers includes a transmission-source child-node name representing a transmission source, a reception-complex-data identifier which is an identifier of data received from a child node of a respective client computer, a generation-data identifier which is an identifier of data generated by the respective client computer, and a transmission-complex-data identifier which is an identifier of data to be transmitted to the parent node of the respective client computer.

US Pat. No. 10,171,257

UPDATING DATA OBJECTS ON A SYSTEM

International Business Ma...

1. A computer system for updating data objects across a storage area network, the computer system comprising:one or more computer processors;
one or more computer readable storage media;
computer program instructions;
the computer program instructions being stored on the one or more computer readable storage media; and
the computer program instructions comprising instructions to:
identify a request directed to a first server to perform a first core storage function for a first data object stored on a first storage device, the first core storage function being at least one of (i) real-time replication or (ii) real-time mirroring;
generate, in response to identifying the request to perform the first core storage function, a multicast group, wherein the multicast group includes at least: (i) the first server, (ii) a first storage controller located on the first storage device, (iii) a second server, and (iv) a second storage controller located on a second storage device;
multicast, via a reliable multicast, a first set of data write operations associated with the first core storage function to: (i) the first storage controller, (ii) the second server, and (iii) the second storage controller included in the multicast group; and
update, based on the first set of write operations multicasted to the multicast group: (i) the first data object stored on the first storage device, and (ii) a second data object stored on the second storage device, wherein the second data object is a replica of the first data object.

US Pat. No. 10,171,256

INTERACTIVE TIMELINE FOR A TELECONFERENCE SESSION

Microsoft Technology Lice...

1. A system comprising:one or more processing units; and
a computer-readable medium having encoded thereon computer-executable instructions to cause the one or more processing units to:
cause content of a teleconference session to be displayed;
cause an interactive timeline associated with the teleconference session to be displayed, wherein the interactive timeline includes a plurality of representations that correspond to a plurality of notable events associated with the teleconference session and wherein the plurality of representations are of one or more different types;
receive a first request associated with a representation of the plurality of representations while the content of the teleconference session continues to be displayed in association with a current view;
based at least in part on receiving the first request, cause first information to be displayed while the content of the teleconference session continues to be displayed in association with the current view, the first information describing a notable event that corresponds to the representation;
receive a second request associated with the representation; and
based at least in part on receiving the second request, switch from the current view to a different view to display second information associated with the notable event.

US Pat. No. 10,171,254

DISTRIBUTED LIVE MULTIMEDIA SWITCHING MECHANISM AND NETWORK

Oath Inc., New York, NY ...

1. A method for sharing multimedia content, comprising:receiving an entry for a map location from an interface provided at a receiving device;
returning a portion of a map for the selected map location for rendering on the receiving device, the portion identifying one or more events occurring at the map location;
receiving a selection of an event of the one or more events, the selection generating a request for receiving live multimedia content for an event that is currently occurring;
tracking capturing devices available at the map location to identify select ones of the capturing devices that are available for capturing the live multimedia content for the event;
obtaining streams of live multimedia content for the event captured by select ones of the capturing devices at the map location for rendering on a user interface at the receiving device, in response to the selection of the event, each of the select ones of the capturing devices and the receiving device being operated by a distinct operator, the streams of live multimedia content are configured to be rendered at the user interface as thumbnails that are each updated and provide a view of content that is being captured by the different capturing devices, wherein a subset of the streams of live multimedia content for the event provided by the select ones of the capturing devices are automatically selected for rendering and are organized in accordance to filtering criteria defined for the event; and
receiving selection of a stream from the subset of streams of live multimedia content rendered on the user interface at the receiving device, the selection resulting in use of a peer-to-peer interactive communication connection established between the receiving device and a specific one of the capturing devices that is producing the selected stream to enable interactive communication, the interactive communication used to influence the specific capturing device to change at least one aspect of the specific capturing device so as to adjust the multimedia content captured in the selected stream, the selection causing the selected stream to be rendered at the receiving device, wherein the selected stream that is rendered at the receiving device includes the adjustment to the multimedia content caused by the change to at least one aspect of the specific capturing device,
wherein operations of the method are performed by a processor of a server computing device.

US Pat. No. 10,171,252

DATA DETERMINATION APPARATUS, DATA DETERMINATION METHOD, AND COMPUTER READABLE MEDIUM

Mitsubishi Electric Corpo...

1. A data determination apparatus comprising:processing circuitry configured to
measure a period of time during which an operating state of the data determination apparatus continues;
store a state transition model representing a state transition between respective operating states of a plurality of operating states according to obtained information obtained by the data determination apparatus;
store a history of the obtained information as an obtained information history;
hold an operating state of the data determination apparatus based on the state transition model;
store, as a communication permission list, communication permitted data whose communications are permitted in the respective operating states of the plurality of operating states;
obtain communication data as communication determination data; and
obtain the communication determination data obtained, obtain the operating state of the data determination apparatus held as a current operating state, and determine whether or not the communication determination data is communication permitted data whose communication has been permitted in the current operating state, using the current operating state and the communication permission list, wherein
the obtained information includes the communication data obtained by the communication, an operation signal indicating receipt of an operation on the data determination apparatus, and a timer signal output from the timer,
the processing circuitry generates the state transition model and the communication permission list, based on the obtained information history,
the processing circuitry generates the state transition model by setting a wait state when a period of time elapsed between successive communication data included in the Obtained information history is a first period or more, setting, as a first change point, a point of time of having obtained information other than the communication data and setting each of states before and after the first change point as a first operating state, and setting, as a second change point, a point of time of having obtained transition communication data whereby an operating state transition has been determined to be made in each first operating state and setting each of states before and after the second change point as a second operating state.

US Pat. No. 10,171,251

TAMPER-PROTECTED HARDWARE AND METHOD FOR USING SAME

Emsycon GmbH, (DE)

1. A tamper-protected hardware module, comprising:a hardware structure providing a Physical Unclonable Function (PUF), the hardware structure being adapted to provide a response to challenges input to the PUF implemented in the hardware structure,
storage memory to store a set of challenges and a set of correct PUF responses for each of said challenges,
processor circuitry to provide at least one challenge from said set of challenges to the hardware structure implementing the PUF, and to receive a PUF response for each challenge provided to the hardware structure implementing the PUF,
the processor circuitry to verify integrity of the tamper-protected hardware module by checking, for each PUF response received for a challenge provided to the hardware structure implementing the PUF, whether the respective PUF response received from the hardware structure implementing the PUF matches the correct PUF response of said challenge stored in the storage memory, and
wherein the processor circuitry makes the tamper-protected hardware module temporarily or permanently unusable if integrity of the tamper-protected hardware module is not verified by the processor circuitry, and wherein the tamper-protected hardware module is a chip or a die, and wherein the tamper-protected hardware module further comprises an on-chip trusted time source for providing the current date and time, wherein the current date and time is used by the tamper-protected hardware module to verify validity of certificates.

US Pat. No. 10,171,249

PRIVACY FRIENDLY LOCATION BASED SERVICES

INTERNATIONAL BUSINESS MA...

1. A cryptographic method for enabling access to services provided by a server in a set of reference areas; the method comprising:obtaining, by a user device, a set of reference credentials of the server that certifies data indicating the set of reference areas, wherein the set of reference areas are defined using Military Grid Reference System (MGRS), wherein at least one reference credential of the set of reference credentials is an attribute-based credential, wherein attributes in the reference credential indicate respective MGRS precision levels of a reference area of the set of reference areas, wherein the set of reference credentials are signed by the server using a predefined signature scheme, wherein the set of reference credentials are obtained from the server by the user device, wherein the user device is connected to a mobile network controller and the server, wherein the mobile network controller is of a network to which the user device is connected, wherein the mobile network controller comprises a mobile network operator server;
obtaining, by the user device, a location credential that certifies location data indicating a current location of the user device, wherein the location credential is an attribute-based credential, wherein attributes in the location credential indicate respective MGRS precision levels of the current location of the user device, wherein the location credential is obtained from the mobile network operator server by the user device, wherein the location credential is signed by the mobile network operator server using the predefined signature scheme;
generating, by the user device, an authentication token comprising a cryptographic proof for proving that the current location of the user device certified by the location credential matches at least one reference area certified by the set of reference credentials, the cryptographic proof proving that the respective MGRS precision levels of the at least one reference area match at least a part of the respective MGRS precision levels of the current location of the user device; and
sending, by the user device, the authentication token to the server for accessing the services in the at least one reference area, wherein the server is configured to determine from the cryptographic proof that the location of the user device matches at least one area of the set of reference areas, wherein the server performs the determining without receiving the current location of the user device.

US Pat. No. 10,171,248

METHOD AND SYSTEM BLOCKCHAIN VARIANT USING DIGITAL SIGNATURES

MASTERCARD INTERNATIONAL ...

1. A method for using digital signatures for signing blockchain transactions, comprising:generating, by a generation module of a processing server, a domain key pair comprising a domain private key and a domain public key, wherein the domain public key is signed after generation;
receiving, by a receiving device of the processing server, a plurality of member public keys, wherein each member public key is a public key in a key pair comprising the member public key and a member private key corresponding to an associated member;
signing, by a signing module of the processing server, each member public key of the plurality of member public keys using the domain private key;
receiving, by the receiving device of the processing server, a transaction block from a specific member of the blockchain network, wherein the transaction block includes a hash signed using the member private key corresponding to the specific member;
electronically transmitting, by the transmitting device of the processing server, each signed member public key to one or more members of the blockchain network;
receiving, by the receiving device of the processing server, a new transaction block and a signed second hash value from the specific member of the blockchain network;
signing, by the signing module of the processing server, the received new transaction block using the domain private key; and
electronically transmitting, by the transmitting device of the processing server, the signed new transaction block for validation of the blockchain transactions by a member of the blockchain network.

US Pat. No. 10,171,243

SELF-VALIDATING REQUEST MESSAGE STRUCTURE AND OPERATION

INTERNATIONAL BUSINESS MA...

14. A method for execution by a storage unit (SU), the method comprising:receiving, via an interface of the SU configured to interface and communicate with a dispersed or distributed storage network (DSN) and from a computing device, a self-validating request message, wherein the self-validating request message is generated by the computing device to include a first message authentication code of the computing device, and the self-validating request message is generated by the computing device based on the computing device creating a master key of the computing device, creating a message encryption key based on the master key of the computing device and a secret function, encrypting a message using the message encryption key to generate an encrypted message, encrypting the master key of the computing device using a public key of the SU to generate an encrypted master key;
processing the self-validating request message to verify the first message authentication code of the computing device that is included within the self-validating request message, and when the first message authentication code of the computing device is verified:
decrypting the encrypted master key that is included within the self-validating request message using a private key of the SU to recover the master key of the computing device;
generating the message encryption key based on the master key of the computing device and the secret function; and
decrypting the encrypted message that is included within the self-validating request message to recover the message; and
generating, in response to the self-validating request message, a self-validating response message that includes a second message authentication code and an encrypted response including to:
generating a responder encryption key based on the master key and another secret function; and
encrypting a response to the message based on the responder encryption key to generate the encrypted response; and
transmitting, via the interface of the SU and to the computing device, the self-validating response message.

US Pat. No. 10,171,242

MAKING CRYPTOGRAPHIC CLAIMS ABOUT STORED DATA USING AN ANCHORING SYSTEM

PeerNova, Inc., San Jose...

1. A computer implemented method comprising:receiving, by a first computer system, second data to store;
generating, by the first computer system, a second hash based on the second data and a first hash that was generated based on first data stored in the first computer system;
storing, by the first computer system, the second hash;
transmitting, by the first computer system to a second computer system, a copy of the second hash;
receiving, by the first computer system from the second computer system, an import anchor generated based on the copy of the second hash and a time stamp generated by a time stamping authority; and
storing, by the first computer system, the import anchor in association with the second hash, such that the import anchor provides a cryptographic proof for verifying whether the second data stored at the first computer system was not modified.

US Pat. No. 10,171,239

SINGLE USE RECOVERY KEY

Microsoft Technology Lice...

1. A computing device comprising: at least one processor and a memory, the at least one processor configured to:receive a message to add a first recovery key for an encrypted volume to a database;
add the first recovery key to the database;
receive a request for a recovery key for the encrypted volume;
find, in response to the request, a most recent recovery key for the encrypted volume;
subsequently provide the first recovery key if the first recovery key is the most recent recovery key;
indicate, in the database, in response to the provision of the first recovery key, that the first recovery key has been disclosed; and
mark each recovery key in the database as disclosed due to the database being restored from a backup thereof irrespective of whether any recovery key in the database was actually provided to a requestor.

US Pat. No. 10,171,238

SECURE DATA TRANSMISSION USING QUANTUM COMMUNICATION

THE BOEING COMPANY, Chic...

1. A method for transmitting data comprising:transmitting first data comprising a random data stream; and
transmitting second data comprising indicators as to which data of the random data stream is valid data to be communicated, the first data transmitted using quantum entanglement;
wherein the random data stream is a random bit stream and the second data comprises a bit stream that corresponds to the random bit stream with a pause inserted to indicate that a previous bit is a valid bit.

US Pat. No. 10,171,237

HIGH-SPEED AUTOCOMPENSATION SCHEME OF QUANTUM KEY DISTRIBUTION

1. A communication system for transmitting a cryptographic key across a channel, comprising:a transmission node (“Alice”) including a beam splitter, an electro-optical attenuator, an amplitude modulator, an electro-optical phase modulator, a storage line, a Faraday mirror, and a synchronization detector, wherein the storage line directly connects the Faraday mirror and the electro-optical phase modulator;
a receiver node (“Bob”) including a laser, avalanche photodiodes, a beam splitter, a circulator, a delay line, an electro-optical phase modulator, a polarizing beam splitter, and a Mach-Zehnder interferometer connected between the beam splitter and the polarizing beam splitter; and
a quantum channel connecting the transmission and receiver nodes,
wherein the storage line is placed between the electro-optical phase modulator of the transmission node and the Faraday mirror.

US Pat. No. 10,171,236

METHOD FOR OPERATING A PRIMARY UNIT

ROBERT BOSCH GMBH, Stutt...

1. A method for operating a primary unit, the primary unit exchanging pieces of information with a secondary unit, the method comprising:receiving first pieces of information from the secondary unit, the first pieces of information being formed as a function of at least one first measured value of a physical variable in an area of the secondary unit and as a function of a first random number;
measuring the at least one physical variable in an area of the primary unit to obtain a second measured value;
ascertaining a first estimated value for the first random number as a function of the first pieces of information and of the second measured value;
measuring the at least one physical variable in the area of the primary unit to obtain a third measured value;
forming second pieces of information as a function of the first estimated value and of the third measured value; and
transmitting the second pieces of information to the secondary unit.

US Pat. No. 10,171,235

USER-INITIATED MIGRATION OF ENCRYPTION KEYS

NXP B.V., Eindhoven (NL)...

1. A method, comprising:storing a master key in a non-volatile memory;
using a communication circuit of a computing server,
authenticating a first network communication device in a data network using a first key, wherein the first key is derived from the master key and a first set of key derivation data stored on the first network communication device, and
receiving a data migration request from a second network communication device in the data network, the data migration request specifying the first set of key derivation data and specifying a second set of key derivation data stored at the second network communication device;
in response to receiving the data migration request, using a processing circuit of the computing server to
determine a temporary key used by the second network communication device based on the first and second sets of key derivation data and the master key, and
generate a second key based on the master key and the second set of key derivation data; and
using the communication circuit,
providing the second key to the second network communication device via a secure communication channel established using the temporary key, and
authenticating the second network communication device using the second key.

US Pat. No. 10,171,234

WIDE ENCODING OF INTERMEDIATE VALUES WITHIN A WHITE-BOX IMPLEMENTATION

NXP B.V., Eindhoven (NL)...

1. A method for mapping an input message to an output message by a keyed cryptographic operation in a white-box cryptographic system to resist differential attacks, the keyed cryptographic operation including a plurality of substitution layers and state data, comprising:mapping the input message to first state data in a first substitution layer of the keyed cryptographic operation including a substitution box (S-box), wherein the first substitution layer includes N basic blocks that implement the first substitution layer and wherein a non-linear encoding having a first size is placed on inputs and outputs of the N basic blocks of the first substitution layer, where N is an integer;
mapping the first state data to second state data in a plurality of intermediate substitution layers of the keyed cryptographic operation each intermediate layer including an S-box, wherein the intermediate substitution layers include M blocks that implement the intermediate substitution layers and wherein a plurality of non-linear encodings having a second size are placed on the inputs and outputs of the M basic blocks of the intermediate substitution layers, where M is an integer; and
mapping the second state data to the output message in a final substitution layer of the keyed cryptographic operation including an S-box, wherein the final substitution layer includes K basic blocks that implement the final substitution layer and wherein a non-linear encoding having a third size is placed on the inputs and outputs of the K basic blocks of the final substitution layer, where K is an integer,
wherein the first size and the third size are greater than the second size,
wherein N wherein K

US Pat. No. 10,171,233

SYSTEM AND METHOD FOR EFFICIENT SUPPORT FOR SHORT CRYPTOPERIODS IN TEMPLATE MODE

11. A method for communicating encryption information in template mode in dynamic adaptive streaming over hypertext transfer protocol (DASH), the method comprising:receiving, by a client, a media presentation description (MPD), from a server, wherein the MPD includes a template associated with a universal resource locator (URL);
configuring, by the client, a URL for an IV using the template;
sending, by the client, the URL to the server; and
receiving, by the client, an initialization vector (IV) associated with the URL, wherein the received IV is for decrypting a segment at the client.

US Pat. No. 10,171,232

FLEXIBLE ARCHITECTURE AND INSTRUCTION FOR ADVANCED ENCRYPTION STANDARD (AES)

Intel Corporation, Santa...

1. A system comprising:a processor comprising:
a plurality of cores;
a level 1 (L1) instruction cache to store a plurality of instructions, the plurality of instructions to include a plurality of Advanced Encryption Standard (AES) instructions of an instruction set of the processor that includes a Single Instruction Multiple Data (SIMD) instruction set, wherein the plurality of AES instructions include more than four but less than ten AES instructions including a first AES instruction for a final round of an AES encryption operation, a second AES instruction for a round of the AES encryption operation, a third AES instruction for a round of an AES decryption operation, and a fourth AES instruction for a final round of the AES decryption operation, and wherein the plurality of AES instructions each comprise a different opcode;
an L1 data cache;
instruction fetch logic to fetch instructions from the L1 instruction cache;
decode logic to decode instructions including the first AES instruction;
a microcode memory to store microcode;
a first 128-bit source register to store a round key to be used for the final round of the AES encryption operation;
a second 128-bit source register to store input data to be encrypted by the final round of the AES encryption operation;
a plurality of ports each associated with one or more corresponding execution resources to support parallel execution of integer and floating point operations;
an execution unit including AES execution logic to execute the first AES instruction to perform the final round of the AES encryption operation using microcode determined from the decode of the first AES instruction and obtained from the microcode memory, the final round of the AES encryption operation to use the round key from the first 128-bit source register to encrypt the input data from the second 128-bit source register, and to store a final encrypted result of the final round of the AES encryption operation in a 128-bit destination register,
wherein the final round of the AES encryption operation is to include:
a substitution operation to be performed on the input data, the substitution operation to use a substitution box (S-box) lookup to result in a first array of substituted data;
a Shift Rows transform to shift row data in the first array by a specified amount to generate a shift rows result; and
an Add Round Key transform in which an exclusive OR function is to use data from the round key and the shift rows result; and
a retirement unit
a memory controller to couple the processor to a dynamic random access memory (DRAM); and
an input/output (I/O) controller to couple the processor to one or more devices, the one or more devices to include one or more storage devices, wherein at least one of the one or more storage devices is to be coupled to the processor over at least one Serial Attached Small Computer System Interface (SAS).

US Pat. No. 10,171,231

FLEXIBLE ARCHITECTURE AND INSTRUCTION FOR ADVANCED ENCRYPTION STANDARD (AES)

Intel Corporation, Santa...

1. A system comprising:a processor comprising:
a plurality of cores;
a level 1 (L1) instruction cache to store a plurality of instructions, the plurality of instructions to include a plurality of Advanced Encryption Standard (AES) instructions of an instruction set of the processor that includes a Single Instruction Multiple Data (SIMD) instruction set, wherein the plurality of AES instructions include more than four but less than ten AES instructions including a first AES instruction for a round of an AES encryption operation, a second AES instruction for a final round of the AES encryption operation, a third AES instruction for a round of an AES decryption operation, and a fourth AES instruction for a final round of the AES decryption operation, and wherein the plurality of AES instructions each comprise a different opcode;
an L1 data cache;
instruction fetch logic to fetch instructions from the L1 instruction cache;
decode logic to decode instructions including the first AES instruction;
a microcode memory to store microcode;
a first 128-bit source register to store a round key to be used for the round of the AES encryption operation;
a second 128-bit source register to store input data to be encrypted by the round of the AES encryption operation;
a plurality of ports each associated with one or more corresponding execution resources to support parallel execution of integer and floating point operations; and
an execution unit including AES execution logic to execute the first AES instruction of the instruction set of the processor to perform the round of the AES encryption operation using microcode determined from the decode of the first AES instruction and obtained from the microcode memory, the AES encryption operation to use the round key from the first 128-bit source register to encrypt the input data from the second 128-bit source register, and to store a result of the round of the AES encryption operation in a 128-bit destination register,
wherein the round of the AES encryption operation is to include:
a Sub Bytes transform to perform a byte substitution on the input data, the Sub Bytes transform to use a substitution box (S-box) lookup to result in a first array of substituted data;
a Shift Rows transform to shift row data in the first array by a specified amount to result in a second array;
a Mix Columns transform in which columns of the second array are to be treated as polynomials over a Galois Field GF(28) and multiplied modulo x4+1 with a fixed polynomial to generate a mix columns result; and
an Add Round Key transform in which an exclusive OR function is to use data from the round key and the mix columns result;
a memory controller to couple the processor to a dynamic random access memory (DRAM); and
an input/output (I/O) controller to couple the processor to one or more devices, wherein the one or more devices are to include one or more storage devices, and wherein the one or more storage devices are to be arranged as a Redundant Array of Independent Disks (RAID).

US Pat. No. 10,171,230

HOMOMORPHIC ENCRYPTION SCHEME

Empire Technology Develop...

1. A method performed under control of a first device, the method comprising:determining an enciphering function, based at least in part on a secret key of the first device and a system parameter;
enciphering a plaintext into a first ciphertext, based at least in part on the enciphering function;
transmitting, to a server, the first ciphertext and the system parameter;
transmitting, to a second device, a request to process the plaintext, wherein the first ciphertext, which corresponds to the plaintext, is processed to a second ciphertext by the second device, based at least in part on the request, and wherein the request includes a type of calculations to be performed on particular plaintext elements among multiple plaintext elements of the plaintext;
receiving, from the second device, the second ciphertext to which the first ciphertext has been processed by the second device without deciphering the first ciphertext wherein the transmission of the request to process the first ciphertext to the second ciphertext without deciphering the first ciphertext facilitates the plaintext to be hidden from the second device, to enable protection against attacks on the plaintext; and
deciphering the second ciphertext, based at least in part on the system parameter and a deciphering function.

US Pat. No. 10,171,228

RECEIVING CIRCUIT, ELECTRONIC DEVICE, TRANSMISSION/RECEPTION SYSTEM, AND RECEIVING CIRCUIT CONTROL METHOD

Sony Corporation, Tokyo ...

1. A receiving circuit comprising:a timing signal generating unit that generates a plurality of timing signals indicating different timings in synchronization with a timing at which a status of a reception signal transitions;
a first data signal generating unit that generates, each time a predetermined first timing signal among the plurality of timing signals becomes a specific value, a first data signal from statuses of the reception signal before and after a timing at which the predetermined first timing signal becomes the specific value, and outputs the first data signal in synchronization with a second timing signal different from the first timing signal among the plurality of timing signals; and
a second data signal generating unit that generates, each time the second timing signal becomes the specific value, a second data signal from statuses of the reception signal before and after timing at which the second timing signal becomes the specific value, and outputs the second data signal in synchronization with a timing signal different from the first timing signal among the plurality of timing signals.

US Pat. No. 10,171,227

METHOD AND APPARATUS FOR CONFIGURING ONU AS IEEE 1588 MASTER CLOCK IN PON

ALCATEL LUCENT, Boulogne...

1. A method for making Institute of Electrical and Electronics Engineers (IEEE) 1588 protocol master clock configuration for an optical network unit (ONU) in a passive optical network (PON), said method comprising:creating a precision time protocol (PIP) port on a user network interface (UNI) of the ONU, and generating a corresponding PTP port management entity (ME) for the PTP port to indicate that the UNI is operating in a master clock mode;
generating an IEEE 1588 protocol master clock configuration data ME, based on PTP port MEs of all PTP ports in the ONU, to store profiles of all PTP ports used as master clock devices;
generating a clock data set ME, according to the IEEE 1588 protocol master clock configuration data ME, to indicate clock source information of all the PTP ports used as the master clock devices; and
transmitting the IEEE 1588 protocol master clock configuration data ME and the clock data set ME from a PTP port used as a master clock device to corresponding slave clock devices using IEEE 1588 protocol messages.

US Pat. No. 10,171,223

METHOD AND APPARATUS FOR DYNAMICALLY ASSIGNING MASTER/SLAVE ROLES WITHIN A DISTRIBUTED ANTENNA DIVERSITY RECEIVER APPARATUS

NXP B.V., Eindhoven (NL)...

15. A method of dynamically assigning master/slave roles within a distributed antenna diversity receiver apparatus; the method comprising:receiving intra-packet channel reliability parameters for a master wireless receiver and for at least one slave wireless receiver, wherein the at least one slave wireless receiver is independent of the master wireless receiver and coupled to the master wireless receiver via a bi-directional communication link,
determining whether to assign a new master receiver for the distributed antenna diversity receiver apparatus based on the received intra-packet reliability parameters, and
if it is determined to assign a new master receiver, dynamically re-assigning the master receiver within the distributed antenna diversity receiver apparatus.

US Pat. No. 10,171,222

METHOD FOR CONFIGURING CQI MEASUREMENT SUBFRAME, BASE STATION, AND USER EQUIPMENT

Huawei Technologies Co., ...

1. A base station, comprising:a transceiver configured to receive an interference neighboring cell identifier of a user equipment (UE) sent by the UE; and
a processor configured to:
obtain almost blank subframe (ABS) configuration information according to the interference neighboring cell identifier of the UE, wherein the ABS configuration information is an ABS configuration of an interference neighboring cell corresponding to the interference neighboring cell identifier; and
configure an ABS measurement subframe and a non-almost blank subframe (NonABS) measurement subframe for the UE according to the ABS configuration information; and
wherein the transceiver is configured to send the ABS measurement subframe and the NonABS measurement subframe to the UE, wherein the ABS measurement subframe is used by the UE to perform first channel quality indicator (CQI) measurement and the NonABS measurement subframe is used by the UE to perform second CQI measurement.

US Pat. No. 10,171,220

TERMINAL, BASE STATION, AND COMMUNICATION METHOD

SHARP KABUSHIKI KAISHA, ...

1. A user equipment comprising:a receiver that receives a physical downlink shared channel (PDSCH) or a control channel indicating semi-persistent scheduling (SPS) release on a serving cell;
a processor that generates hybrid automatic repeat request-acknowledgement (HARQ-ACK) feedback bits for the PDSCH or the control channel; and
a transmitter that transmits the HARQ-ACK feedback bits, wherein
the processor determines the HARQ-ACK feedback bits based on a time division duplex (TDD) HARD-ACK reporting procedure for different UL/DL configurations, in a case that (a) the user equipment is configured with more than one serving cell, (b) a frame structure type of each serving cell of the more than one serving cell is a frame structure type 2, and (c) at least two configured serving cells of the more than one serving cell have respective UL/DL configurations which are different from each other,
the processor determines the HARQ-ACK feedback bits based on UL-reference UL/DL configuration belonging to {1, 2, 3, 4, 6} and the TDD HARQ-ACK reporting procedure, in a case that (a) the user equipment is configured with more than one serving cell, (b) frame structure types of any two configured serving cells are different, (c) a primary cell is a frame structure type 2, (d) the serving cell is a frame structure type 1, (e) downlink(DL)-reference uplink(UL)/DL configuration of the two configured serving cells belongs to {0,1,2,3,4,6}, and (f) a physical uplink control channel (PUCCH) format 1b with channel selection is configured for a transmission of the HARQ-ACK feedback bits for the serving cell and the primary cell.

US Pat. No. 10,171,219

METHOD AND APPARATUS FOR ENCODING AND PROCESSING ACKNOWLEDGEMENT INFORMATION

HUAWEI TECHNOLOGIES CO., ...

1. A method for encoding acknowledgement information, comprising:receiving at least one component carrier, wherein each component carrier in the at least one component carrier comprises at least one downlink subframe;
generating acknowledgement information bits corresponding to the each component carrier according to the each component carrier;
ordering the acknowledgement information bits corresponding to the each component carrier according to a maximum value DAI_max of a downlink assignment index (DAI) field in downlink control information (DCI) which is received on the each component carrier and used for controlling physical downlink shared channel (PDSCH) transmission or indicating downlink semi-persistent scheduling (SPS) release and the number N_sps of physical downlink shared channels (PDSCHs) scheduled by the SPS in the at least one downlink subframe;
alternately assigning the ordered acknowledgement information bits corresponding to the each component carrier to two groups, and obtaining two groups of acknowledgement information bits; and
encoding the two divided groups of acknowledgement information bits to obtain two groups of codeword bits, respectively, and generating a total codeword bits to be transmitted, from the two groups of codeword bits obtained by the encoding;
wherein the ordering the acknowledgement information bits corresponding to the each component carrier according to the DAI_max and the N_sps comprises:
placing acknowledgement information bits into last N_sps×a bit positions, with the acknowledgement information bits corresponding to N_sps PDSCHs scheduled by semi-persistent scheduling;
placing acknowledgement information bits into first DAI_max×a bit positions, with the acknowledgement information bits corresponding to downlink subframes corresponding to DCI of DAI=1 to DAI=DAI_max; and
setting the remaining (D×a?(DAI_max+N_sps)×a) acknowledgement information bits to ‘0’;
wherein the a is a bit number of acknowledgement information bits corresponding to each of the downlink subframes and the D is a number of downlink subframes for which the acknowledgement information bits need to be generated.

US Pat. No. 10,171,218

METHOD FOR ESTIMATING SIGNAL QUALITY OF TRANSMISSION TO A USER EQUIPMENT FROM A TRANSMISSION POINT

Telefonaktiebolaget LM Er...

1. A method performed by a network node for enabling transmissions to a user equipment (UE) from transmission points (TPs) in a coordination cell area in a radio communications network, the method comprising:configuring two or more TPs in the coordination cell area not currently serving the UE to transmit signals on interference measurement (IM) resources of two or more Channel State Information (CSI) processes of the UE according to three or more different interference states;
receiving, from the UE, CSI reports based on the transmitted signals on the IM resources of the two or more CSI processes of the UE;
estimating one signal quality value for each of the three or more different interference states of the transmitted signals and at least one further signal quality value corresponding to at least one interference state that is not part of the three or more different interference states of the transmitted signals, based on the received CSI reports of the two or more CSI processes;
one or more of scheduling coordinated transmissions to the UE from TPs in the coordination cell area and selecting transmission configuration settings for TPs in the coordination cell area, using the estimated signal quality values; and
performing coordinated transmissions to the UE from one or more TPs of the coordination cell area.

US Pat. No. 10,171,216

DOWNLINK CONTROL FOR DEMODULATION REFERENCE SIGNAL TRANSMISSIONS

Qualcomm Incorporated, S...

1. A method of wireless communication, comprising:receiving, by a first user equipment (UE), a first content during a first transmission time interval (TTI), the first content including at least a control region which includes a demodulation reference signal (DMRS), a location of the DMRS being defined by either a closed-loop precoding structure or an open-loop precoding structure, a duration of the first TTI being shorter than 1 ms, the control region further including a downlink (DL) grant for a second TTI, and the DL grant allocating both control and data regions associated with the second TTI for DL data reception;
demodulating the control region based at least on the DMRS;
receiving DL data during the second TTI; and
demodulating the DL data using the DMRS received in the first TTI.

US Pat. No. 10,171,215

SEGREGATING UES AMONG CARRIERS TO HELP FACILITATE OPERATION IN LEAN-CARRIER MODE

Sprint Spectrum L.P., Ov...

1. A method operable in a base station (BS) that provides service at least on a particular carrier, wherein the BS is configured to operate in a legacy mode in which the BS engages in a particular extent of reference signaling on the particular carrier, wherein the BS is also configured to operate in a lean-carrier mode in which the BS engages in a reduced extent of reference signaling on the particular carrier, wherein the reduced extent is less than the particular extent, and wherein the BS operates in the lean-carrier mode when bearer data is not being communicated on the particular carrier, the method comprising:of a plurality of user equipment devices (UEs) served by the BS, identifying, by the BS, one or more UEs based on each of the one or more UEs communicating bearer data less frequently than a threshold frequency of bearer data communication; and
serving, by the BS, just the identified one or more UEs on the particular carrier, thereby increasing a probability of the BS operating in the lean-carrier mode.

US Pat. No. 10,171,214

CHANNEL STATE INFORMATION FRAMEWORK DESIGN FOR 5G MULTIPLE INPUT MULTIPLE OUTPUT TRANSMISSIONS

1. A network node device, comprising:a processor; and
a memory that stores executable instructions that, when executed by the processor, facilitate performance of operations, comprising:
based on a signal received from a user equipment indicating that the user equipment has decomposed a multiple input multiple output channel into multiple domains comprising at least an H domain and a V domain related to a co-variance between correlated antenna elements, and a U domain related to a co-phasing between multiple antenna sub-groups, configuring channel state information reference signal resources for the user equipment to measure the multiple domains;
transmitting a message to the user equipment indicating the channel state information reference signal resources for the user equipment to facilitate measurement of the multiple domains, wherein the message comprises a group of feedback formats;
transmitting a channel state information reference signal using the channel state information reference signal resources configured for the multiple domains;
receiving feedback from the user equipment, wherein the feedback comprises a feedback format selected from the group of feedback formats; and
based on a decoding of the feedback, determining a transmission parameter comprising a transmission protocol for transmissions between the network node device and the user equipment.

US Pat. No. 10,171,213

COMMUNICATION DEVICE AND METHOD FOR PERFORMING RADIO COMMUNICATION

Intel IP Corporation, Sa...

1. A communication device, comprising:a radio frequency circuit configured to receive and transmit radio frequency signals;
a processing circuit configured to process network information;
a memory circuit configured to transmit a first network information to the processing circuit; and
a subscriber identity module configured to transmit a second network information to the processing circuit,
wherein the processing circuit is configured to select a first network based on the first network information and to register information associated with the communication device at a second network based on comparing the second network information to the first network information.

US Pat. No. 10,171,212

METHOD AND DEVICE FOR PERFORMING CHANNEL ESTIMATION

LG Electronics Inc., Seo...

1. A method for performing channel state reporting on a downlink channel transmitted through M two-dimensionally arranged antenna ports, the method implemented by a user equipment (UE) and comprising:receiving a channel state information-reference signal (CSI-RS) configuration for N virtual antenna ports formed by applying beamforming to each vertical antenna group of the M two-dimensionally arranged physical antenna ports matrix;
calculating channel state information (CSI) about the downlink channel using the received CSI-RS configuration; and
reporting the CSI to a serving cell associated with the UE,
wherein the reported CSI comprises information about rotational transformation of a first codeword in a codebook for a combination of Q unit vectors orthogonal to each other in an N-dimensional space,
wherein the reported CSI further comprises an indicator indicating whether the rotational transformation to be applied overlaps with a previous rotational transformation, and
wherein N and Q are integers satisfying 2?Q?N, and M is an integer satisfying 2?M.

US Pat. No. 10,171,210

METHOD AND DEVICE FOR SPECTRUM COMB SIGNALING NOTIFICATION AND FOR SOUNDING REFERENCE SIGNAL TRANSMISSION

1. A spectrum comb signaling notification method, comprising:a network side configuring and notifying a receiving side of a two-layer spectrum comb signaling, including a first spectrum comb signaling and a second spectrum comb signaling, and the two-layer spectrum comb signaling indicating subcarrier positions of transmitting sounding reference signals to the receiving side;
wherein the method further comprises: performing joint encoding on a repetition factor and a spectrum comb value to generating the second spectrum comb signaling;
wherein the first spectrum comb signaling is used to instruct a first user at the receiving side to determine the subcarrier positions of transmitting the sounding reference signals, and the second spectrum comb signaling is used to instruct a second user at the receiving side to determine the subcarrier positions of transmitting the sounding reference signals;
wherein the second spectrum comb signaling is a 3-bit high layer signaling, and an attribute of the 3-bit high layer signaling is UE-specific;
wherein the second spectrum comb signaling instructs the second user to occupy subcarrier positions whose subcarrier indexes are a multiple of 2, a multiple of 2 plus 1, a multiple of 4, a multiple of 4 plus 1, a multiple of 4 plus 2, or a multiple of 4 plus 3 within a sounding signal bandwidth.

US Pat. No. 10,171,209

METHOD FOR COMMUNICATING MEDIA DATA BETWEEN TWO DEVICES INCORPORATING EFFECTIVENESS OF ERROR CORRECTION STRATEGIES AND ASSOCIATED COMPUTER PROGRAM, COMMUNICATION QUALITY MODULE AND DEVICE

1. A method for communicating multimedia data betweena first device and a second device over a network, the method comprising:
repeatedly generating multimedia data via a first device, the multimedia data comprising audio data and/or video data;
sending said multimedia data to a second device;
repeatedly receiving from the second device quality data representative of the quality of the communication between the first and second devices;
applying, via the first device, at least one current error correction strategy selected from a group of error correction strategies in order to increase the quality of the communication between the first and second devices; and
evaluating the effectiveness of each current error correction strategy on the quality of the communication between the two devices as a function of newly received quality data, wherein the first device keeps track of a strategy counter for each of the current error correction strategies, the strategy counter of a given error correction strategy being incremented at least when a packet loss for the multimedia data sent by the first device is above a chosen threshold.

US Pat. No. 10,171,207

METHODS AND APPARATUS FOR CONTROL BIT DETECTION

Cavium, LLC, Santa Clara...

1. A method of detecting control bit information from a user equipment (UE) via a communication network which includes at least one radio tower, switching network, and a control bit detector (CBD), wherein the CBD includes a threshold generator, a control bit log-likelihood ratio (LLR) input interface, a processor, and an output register, the method comprising:receiving, at the control bit LLR input interface, an LLR sequence (l) that includes P control bits;
calculating, at the processor, a sum of LLR squares parameter (L) associated with the LLR sequence;
generating a (Vp) value for each of 2P combinations of the control bits, wherein each Vp value is computed based on a new sequence and the LLR sequence;
determining, by the processor, a smallest value of Vp; and
outputting, by the CBD, a determination that a control bit combination was received if the smallest value of Vp is less than a threshold value (THD) multiplied by the parameter L.

US Pat. No. 10,171,206

METHODS AND APPARATUSES FOR REFRAMING AND RETRANSMISSION OF DATAGRAM SEGMENTS

1. A source device for sending datagrams contained in an aggregated packet structure comprising transport containers each containing a segment of a respective datagram, the source device comprising:a transmitter, the transmitter comprising:
a detector circuit configured to obtain information if a transmission of a transport container by the transmitter has failed;
a disassembler circuit configured to disassemble the transport container in which transmission has failed; and
a container creator circuit configured to create a plurality of new transport containers, the new transport containers to include at least one of fragments or portions of the datagram segment contained in the transport container in which transmission has failed,
wherein the transmitter is configured to send sequence information indicating a conversion between a sequence of the transport containers of the aggregated packet structure comprising the transport container in which transmission has failed and a sequence of the transport containers of the aggregated packet structure comprising the new transport containers,
wherein the source device is configured to reformat and retransmit datagrams in which transmission has failed, wherein the reformatting is performed without splitting datagrams, and
wherein the source device is further configured to:
notify a destination device that the reformatted datagram segments have been reformatted and are ready to be transmitted using the transmitter,
receive notification from the destination device that the destination device can accept the reformatted datagram segments, and
thereafter transmit the reformatted datagram segments to the destination device using the transmitter.

US Pat. No. 10,171,205

SPACE TIME LABELLING TECHNIQUE FOR WIRELESS COMMUNICATION SYSTEMS

University of Kwazulu-Nat...

1. A transmitter for a wireless communications system for implementing space-time labelling diversity for uncoded conventional modulation, the transmitter including:a first bit mapper;
a second bit mapper which is different to the first bit mapper;
a first transmitter;
a second transmitter; and
a processor connected to the first and second mappers and the first and second transmitters, the processor controlling these to:
receive two bit streams and simultaneously feed these into the first mapper and the second mapper, wherein the first mapper maps these into first and second mapped bit streams and the second mapper maps these into third and fourth mapped bit streams which are different from the first and second mapper bit streams;
transmit the first mapped bit stream in a first time slot via the first transmitter;
transmit the second mapped bit stream in the first time slot via the second transmitter;
transmit the third mapped bit stream in a second time slot via the second transmitter; and
transmit the fourth mapped bit stream in a second time slot via the first transmitter.

US Pat. No. 10,171,204

CODED BIT PUNCTURING FOR POLAR CODES

MEDIATEK INC., Hsinchu (...

1. A method for polar code puncturing in a wireless communication system, comprising:receiving information bits;
encoding the information bits to generate a first polar code including a sequence of N coded bits, the sequence of N coded bits having indices {0, . . . , N?1} and including at least a first block of coded bits having indices {0, . . . , i?1}, a second block of coded bits having indices {i, . . . , i+k?1}, a third block of coded bits having indices {i+k, . . . , i+k+k?1};
interleaving the second block of coded bits with the third block of coded bits to form a rearranged sequence of coded bits including the N coded bits;
extracting the last M coded bits from the rearranged sequence of coded bits to generate a punctured code having a length of M, wherein M is a code length determined according to allocated transmission resources; and
generating a signal modulated by the punctured code.

US Pat. No. 10,171,203

APPARATUS AND METHOD FOR RECEIVING SIGNAL IN COMMUNICATION SYSTEM SUPPORTING LOW DENSITY PARITY CHECK CODE

Samsung Electronics Co., ...

1. A method for reducing memory access when receiving a signal by a physical electronic signal receiving apparatus in a communication system supporting a low density parity check (LDPC) code, the physical electronic signal receiving apparatus including a receiver, a processor, a low power LDPC decoder, and a plurality of non-transitory computer readable recordable memories, the processor being configured to control the receiver, the low power LDPC decoder and the plurality of non-transitory computer readable recordable memories, the method comprising:receiving, via the receiver, a signal; and
performing, via the low power LDPC decoder, an LDPC decoding operation for the received signal,
wherein performing, via the low power LDPC decoder, the LDPC decoding operation comprises:
detecting, via the low power LDPC decoder, non-zero matrices among M x N sub-matrices included in a first parity check matrix;
generating, via the low power LDPC decoder, a second parity check matrix including the non-zero matrices;
grouping, via the low power LDPC decoder, the non-zero matrices into a plurality of groups, each of the plurality of groups including a preset number of non-zero matrices included in each block column of the first parity check matrix;
storing, via the low power LDPC decoder, the plurality of groups to the plurality of non-transitory computer readable recordable memories in the physical electronic signal receiving apparatus, respectively, a number of regions included in each of the plurality of non-transitory computer readable recordable memories being equal to a number of non-zero matrices included in a corresponding group of the plurality of groups;
updating, via the low power LDPC decoder, check node to variable node messages (check-to-variable messages) corresponding to at least one nonzero matrix having a same block column stored in each of the plurality of non-transitory computer readable recordable memories; and
simultaneously updating, via the low power LDPC decoder, variable node to check node messages (variable-to-check messages) using the updated check-to-variable messages.

US Pat. No. 10,171,202

DIVERSITY REPETITION IN MIXED-RATE WIRELESS COMMUNICATION NETWORKS

QUALCOMM Incorporated, S...

1. A method of wireless communication, comprising:generating, at a wireless device, a packet comprising a plurality of symbols;
segmenting an input bit vector into a plurality of symbol vectors according to one of a sequential or distributed segmentation procedure;
splitting each of the plurality of symbol vectors into two or more split vectors according to one of:
allocating sequential groups of N/R input bits to each split vector in turn, where N is a number of bits per symbol, R is a repetition factor, and the N/R input bits in each split vector are ordered based at least in part on the symbol vector; and
allocating each bit of each symbol vector to an I modulo Rth split vector, where R is the repetition factor, I is an index number of each bit, and each I modulo Rth split vector comprises bits associated with a matching I modulo R value;
mapping each of the split vectors into the plurality of symbols according to one of a block-level repetition or a symbol-level repetition; and
transmitting the packet.

US Pat. No. 10,171,200

OPTICAL COMMUNICATION USING SUPER-NYQUIST SIGNALS

ZTE Corporation, Shenzhe...

23. An optical communication system, comprising:an optical signal transmission apparatus that transmits a multi-channel optical signal carrying data; and
an optical signal receiver that receives the multi-channel optical signal and recovers the data using a 9-Quadrature Modulated (9-QAM) multi-modulus blind equalization (MMBE) algorithm with maximum likelihood sequence detection (MLSD);
wherein the optical signal transmission apparatus:
for a first optical channel from a plurality of optical channels having an equal baud rate:
maps data using a quadrature phase shift keying (QPSK) constellation into a modulated signal;
upsamples the modulated signal, thereby generating an upsampled signal;
filters the upsampled signal using a digital super-Nyquist lowpass filter having a cutoff frequency that is less than or equal to half of the baud rate, thereby generating a bandlimited modulated digital signal; and
converts the bandlimited modulated digital signal into a first optical analog signal; and
optically multiplexes the first optical analog signal of the first optical channel with a second optical analog signal of a second optical channel from the plurality of optical channels to generate a multi-channel optical signal carrying data.

US Pat. No. 10,171,198

CHANNEL SET UP METHOD OF OPTICAL RECEIVER WITH WAVELENGTH TUNABLE FILTER

PHOVEL. CO.LTD., Yuseong...

1. A method of controlling a temperature of a wavelength tunable filter in order to select desired channels of an optical receiver, and the channels being selected by changing a temperature of the wavelength tunable filter using two adjacent transmissive modes among transmissive modes of an FP type etalon filter have a cyclic characteristic, the method comprising:(a) selecting a referenced channel temperature range via the FP type etalon filter and scanning the temperature of the wavelength tunable filter, in the selected referenced channel temperature range, to determine a wavelength of a transmissive peak in a current transmissive mode selected in the selected referenced channel temperature range from communication signal channels having a predetermined wavelength spacing;
(b) storing a first temperature (TO+T1) of the wavelength tunable filter into a memory, and, based on a current temperature (TO) of the wavelength of the transmissive peak, increasing the temperature of the wavelength tunable filter to the first temperature (TO+T1) to obtain a first reference channel located within a predetermined temperature range;
(c) increasing the temperature of the wavelength tunable filter via one of a heater and a thermoelectric element, with regard to a communication signal channel having a wavelength existing after the transmissive peak in the current transmissive mode, by a second increase in temperature (+A) which corresponds a second reference channel (+1);
(d) increasing the temperature of the wavelength tunable filter via one of the heater and the thermoelectric element, with regard to the communication signal channel having the wavelength existing after the transmissive peak in the current transmissive mode, by a third increase in temperature (+2A) which corresponds a third reference channel (+2);
(e) increasing the temperature of the wavelength tunable filter via one of the heater and the thermoelectric element, with regard to the communication signal channel having the wavelength existing after the transmissive peak in the current transmissive mode, by a fourth increase in temperature (+3A) which corresponds a third reference channel (+3); and
(f) storing, in the memory, information which corresponds to at least the first reference channel, the second reference channel (+1), the third reference channel (+2), and the fourth reference channel (+3).

US Pat. No. 10,171,197

METHOD AND APPARATUS FOR ROUTING TRAFFIC USING ASYMMETRICAL OPTICAL CONNECTIONS

1. A method for routing traffic in a reconfigurable optical add-drop multiplexer layer of a dense wavelength division multiplexing network, the method comprising:determining, by a processor, the reconfigurable optical add-drop multiplexer layer has asymmetric traffic, wherein a symmetry ratio is calculated by an equation of,
wherein ?network is the symmetry ratio of the entire network, t(Zi?Ai) is an amount of traffic in bits per second traveling from node Z to node A for each link i and t(Ai?Zi) is an amount of traffic in bits per second traveling from node A to node Z for each link i; androuting, by the processor, the asymmetric traffic in the reconfigurable optical add-drop multiplexer layer over a plurality of asymmetrical optical connections, wherein the plurality of asymmetrical optical connections is provided with only uni-directional equipment in the reconfigurable optical add-drop multiplexer layer, wherein the routing comprises changing a route of the asymmetric traffic in one direction from travelling directly from an internet protocol layer to the reconfigurable optical add-drop multiplexer layer by by-passing an optical transport network layer to travelling from the internet protocol layer to the reconfigurable optical add-drop multiplexer layer via the optical transport network layer.

US Pat. No. 10,171,196

TERMINAL DEVICE, BASE STATION APPARATUS, AND INTEGRATED CIRCUIT

SHARP KABUSHIKI KAISHA, ...

1. A terminal device that communicates with a base station device, comprising:higher layer processing circuitry configured to receive configuration information;
reception circuitry configured to monitor downlink control information (DCI) via a physical downlink control channel (PDCCH); and
signal detection circuitry configured to detect a modulation and coding scheme (MCS) for the terminal device based on the monitored DCI,
wherein, the configuration information includes whether a prescribed reception scheme for a multi-user transmission is applied or not,
in a case where the prescribed reception scheme is applied, the signal detection circuitry detects a modulation scheme of an interference from the DCI,
in a case where the prescribed reception scheme is not applied, the signal detection circuitry detects the MCS for the terminal device from the DCI, and
the DCI is defined in a same DCI format regardless of whether the prescribed reception scheme is applied or not.

US Pat. No. 10,171,195

NAICS SIGNALING FOR ADVANCED LTE FEATURES

Qualcomm Incorporated, S...

1. A method of wireless communication of a user equipment (UE), comprising:receiving a configuration with carrier aggregation; and
determining a first starting symbol for a physical downlink shared channel (PDSCH), wherein the first starting symbol for the PDSCH is determined based on a blind detection, wherein the determining the first starting symbol for the PDSCH comprises:
performing blind detection of one or more PDSCH symbols on a per resource block basis in order to determine the first starting symbol.

US Pat. No. 10,171,194

INTERFERENCE MANAGEMENT AND DECENTRALIZED CHANNEL ACCESS SCHEMES IN HOTSPOT-AIDED CELLULAR NETWORKS

Board of Regents, The Uni...

1. A system for decentralized spectrum allocation in a two-tier network, comprising:one or more low power base stations deployed in a secondary tier within a coverage range of a macro cellular base station deployed in a first tier, wherein the macro cellular base station utilizes a wireless frequency band and respective low power base stations utilize a wireless frequency band that is the same as the macro cellular base station wireless frequency band,
wherein respective low power base stations are configured to employ at least one cross-tier interference avoidance technique such that coexistence between the macro cellular base station and the corresponding low power base station is enabled, the at least one cross-tier interference avoidance technique comprising the use of two or more transmit antennas at the low power base station to null interference in the direction of a nearby macro cellular base station's user, and
wherein the direction to null the low power base station's transmissions is determined by channel state feedback sent from the macro cellular base station's downlink user to its associated macro base station.

US Pat. No. 10,171,192

METHOD OF PROVIDING AN EMERGENCY ALERT SERVICE VIA A MOBILE BROADCASTING AND APPARATUS THEREFOR

LG ELECTRONICS INC., Seo...

1. A method of providing an emergency alert in a broadcast transmitter, the method comprising:generating service data of a broadcast service;
generating an emergency alert table including an emergency alert message;
generating an additional content related to the emergency alert message;
generating wake-up information indicating whether a broadcast receiver is to be woken up; and
transmitting a broadcast signal including the service data, the emergency alert table, the additional content, and the wake-up information,
wherein the emergency alert table further includes information for identifying a viewing target for the emergency alert message and emergency-related broadcast service information for an emergency-related broadcast service,
wherein the emergency-related broadcast service information includes information for identifying the emergency-related broadcast service and information for identifying a broadcast stream delivering the emergency-related broadcast service,
wherein the wake-up information indicates a wake-up call by being changed from 0 to 1, and
wherein the wake-up information indicates a different wake-up call from the wake-up call by being changed from 1 to 2.

US Pat. No. 10,171,191

BROADCAST RECEIVING APPARATUS AND BROADCAST RECEIVING METHOD

DENSO TEN Limited, Kobe ...

1. A broadcast receiving apparatus comprising:a processor programmed to:
receive a signal of an analog broadcast and a signal of a digital broadcast having a same broadcast content;
perform, when an output of the broadcast receiving apparatus is switched into the analog broadcast from the digital broadcast, a switching control of switching into an acoustic characteristic of the analog broadcast from an acoustic characteristic of the digital broadcast so that the acoustic characteristic of the output digital broadcast gradually approaches the acoustic characteristic of the analog broadcast based on a reception intensity of the received signal of the analog broadcast; and
determine, after the switching control is started and in a middle of gradual switching from the acoustic characteristic of the digital broadcast to the acoustic characteristic of the analog broadcast, whether or not the started switching control is to be continued, based on a reception state of the received signal of the digital broadcast.

US Pat. No. 10,171,188

MOBILE COMPUTING DEVICE INCLUDING A GRAPHICAL INDICATOR

Hewlett-Packard Developme...

1. A mobile computing device, comprising:a display;
a housing coupled to the display, the housing including a chamber, a first antenna to communicate with a first wireless network, a first exterior antenna region, a second antenna to communicate with a second wireless network, and a second exterior antenna region;
a first graphical indicator to identify the first exterior antenna region on the housing and a first signal strength of a connection to the first wireless network; and
a second graphical indicator to identify the second exterior antenna region on the housing and a second signal strength of a connection to the second wireless network.

US Pat. No. 10,171,187

SYSTEM AND METHOD FOR TESTING HIGH-SPEED ADC IN DP-QPSK RECEIVER

XIAMEN UX HIGH-SPEED IC C...

1. A system for testing a high-speed analog-to-digital converter (ADC) in a Dual-Polarization Quadrature Phase Shift Keying (DP-QPSK) receiver, being characterized in comprising:a simulation module, for generating a DP-QPSK data flow, performing coupling and phase shift, and outputting a data flow;
an arbitrary waveform generator, connected to the simulation module for receiving the data flow and outputting a high-speed analog signal and a clock signal;
a high-speed ADC, connected to the arbitrary waveform generator, for converting the high-speed analog signal and the clock signal into a high-speed digital signal;
a cache memory circuit, connected to the high-speed ADC, for converting the high-speed digital signal into a low-speed digital signal; and
a logic analyzer, connected to the cache memory circuit, for sending the low-speed digital signal to the simulation module;
wherein the simulation module receives the low-speed digital signal and performs signal recovery and compares a recovered signal to an original signal so as to realize testing.

US Pat. No. 10,171,186

METHOD AND DEVICE FOR DETECTING NOTCH BAND

MSTAR SEMICONDUCTOR, INC....

1. A method for detecting a notch band in a bandwidth of a frequency spectrum of a received signal, applied to a multicarrier system operating in a wideband, the method comprising:receiving the received signal, and generating a plurality of frequency-domain signals according to the received signal;
performing a magnitude operation on the plurality of frequency-domain signals to obtain a plurality of magnitude values; and
determining whether there is a notch band in the bandwidth of the frequency spectrum of the received signal according to a plurality of ratios of a first magnitude set among the plurality of magnitude values to a second magnitude set among the plurality of magnitude values;
wherein, a first magnitude value in the first magnitude set corresponds to a second magnitude value in the second magnitude set, and a frequency where the first magnitude value is located is spaced from a second frequency where the second magnitude value is located by a fixed interval,
wherein the step of determining whether there is a notch band in the bandwidth of the frequency spectrum of the received signal according to the plurality of ratios of the first magnitude set among the plurality of magnitude values to the second magnitude set among the plurality of magnitude values comprises;
obtaining the plurality of ratios of the first magnitude set among the plurality of magnitude values to the second magnitude set among the plurality of magnitude values; and
determining whether there is a notch band in the bandwidth of the frequency spectrum of the received signal according to the plurality of ratios; and
wherein the step of obtaining the plurality of ratios comprises:
obtaining each of the plurality of ratios as a ratio of a third magnitude value in the first magnitude set to a fourth magnitude value in the second magnitude set corresponding to the third magnitude value.

US Pat. No. 10,171,185

DEVICE AND METHOD OF HANDLING SOFT INFORMATION

Realtek Semiconductor Cor...

1. A receiving device, comprising:a signal detection circuit, for receiving a plurality of compensated symbols on a plurality of subcarriers, to generate a plurality of soft information and a plurality demodulated symbols of the plurality of compensated symbols according to the plurality of compensated symbols;
a reliability circuit, coupled to the signal detection circuit, for generating a plurality of weights of the plurality of soft information according to a plurality of reliability information of the plurality of subcarriers; and
a decoding circuit, coupled to the signal detection circuit and the reliability circuit, for decoding the plurality of compensated demodulated symbols according to the plurality of soft information and the plurality of weights, to generate a plurality of decoded bits.

US Pat. No. 10,171,178

LASER COMMUNICATION SYSTEM

1. A laser communication system comprising;a plurality of lasers each having a laser beam populated by a plurality of entangled photons, at least one of said plurality of lasers having a laser scanner for moving said at least one laser beam emanating therefrom;
a laser beam detector array positioned for each said laser beam to impinge thereupon, each of the laser beams partially overlapping each other laser beam of said plurality of laser beams of entangled photons to create at least one interference pattern therebetween;
an encoding computer for encoding the interference patterns between at least two of said plurality of intersecting laser beams; and
a decoding computer for decoding the encoded interference patterns of said at least two of said plurality of overlapping laser beams impinging upon said laser beam detector array;
whereby data can be transmitted between points of a laser beam using the interference patterns in overlapping laser beams of entangled photons.

US Pat. No. 10,171,177

DIGITAL SIGNAL PROCESSOR, DIGITAL OPTICAL RECEIVER USING THE SAME, AND DIGITAL SIGNAL PROCESSING METHOD

NEC CORPORATION, Tokyo (...

1. A digital signal processor, comprising:a fixed equalizer configured to perform a distortion compensation process based on a fixed equalization coefficient on an input digital signal;
an adaptive equalizer configured to perform an adaptive distortion compensation process based on an adaptive equalization coefficient on an equalized digital signal output by the fixed equalizer;
a low-speed signal generator configured to generate a low-speed digital signal by intermittently extracting one of the input digital signal and the equalized digital signal;
a low-speed equalization coefficient calculation part implemented at least in hardware and configured to calculate a low-speed equalization coefficient to be used for a distortion compensation process of the low-speed digital signal; and
a fixed equalization coefficient calculation part implemented at least in the hardware and configured to calculate the fixed equalization coefficient by using, out of the low-speed equalization coefficient and a predetermined coefficient obtained by back calculation from a transfer function of a transmission line, the predetermined coefficient.

US Pat. No. 10,171,175

METHOD AND APPARATUS FOR DESPREADING IN OPTICAL DOMAIN

Huawei Technologies Co., ...

1. An apparatus for despreading in an optical domain, comprising:an optical splitter configured to:
split a received optical signal into a first optical signal and a second optical signal;
output the first optical signal to an optical coupler; and
output the second optical signal to an optical modulator,
wherein the optical modulator is coupled to the optical splitter and is configured to:
perform field modulation on the second optical signal to obtain a third optical signal; and
output the third optical signal to the optical coupler, wherein a phase difference between the third optical signal and the first optical signal is a first difference,
wherein the optical coupler is coupled to the optical splitter and the optical modulator and is configured to:
perform phase deflection processing on the first optical signal and the third optical signal to obtain a fourth optical signal and a fifth optical signal respectively; and
output the fourth optical signal and the fifth optical signal to a balanced receiver,
wherein the balanced receiver is coupled to the optical coupler and is configured to:
superimpose electrical signals obtained by converting the fourth optical signal and the fifth optical signal to generate a first electrical signal; and
output the first electrical signal to an accumulator, and
wherein the accumulator is coupled to the balanced receiver and is configured to accumulate the first electrical signal in each code word period.

US Pat. No. 10,171,174

METHOD AND SYSTEM FOR OPTICAL VECTOR ANALYSIS

SUZHOU LIUYAOSI INFORMATI...

1. An apparatus comprising:a phase modulator having a first input port to receive a radiation and having a first output port to provide a first signal toward a device under test (DUT), wherein the phase modulator is configured to generate the first signal by performing phase modulation on the radiation received at the first input port;
an intensity modulator having a second input port to receive the radiation and having a second output port to provide a second signal toward the DUT, wherein the intensity modulator is configured to generate the second signal by performing intensity modulation on the radiation received at the second input port; and
a transfer function analyzer configured to determine a transfer function of the DUT based on the first signal and the second signal.

US Pat. No. 10,171,173

OPTICAL SIGNAL TRANSMISSION APPARATUS AND OPTICAL SIGNAL TRANSMISSION METHOD

NIPPON TELEGRAPH AND TELE...

1. An optical signal transmission apparatus comprising:a modulation unit which modulates a transmission signal;
a training signal sequence generation unit which generates a training signal sequence by generating a plurality of signal sequences which have power concentrated in a plurality of different frequency bands and subsequently modulating at least one of an amplitude and a phase of the plurality of signal sequences;
a signal multiplexing unit which appends the training signal sequence to the transmission signal; and
an electro-optical conversion unit which converts a signal sequence obtained by appending the training signal sequence to the transmission signal into an optical signal and transmits the optical signal.

US Pat. No. 10,171,169

SOFTWARE PROGRAMMABLE FLEXIBLE AND DYNAMIC OPTICAL TRANSCEIVERS

Ciena Corporation, Hanov...

1. A software programmable optical transceiver, comprising:one or more Field Programmable Gate Arrays (FPGAs); and
an electro-optical front end communicatively coupled to the one or more FPGAs, wherein the electro-optical front end comprises a transmitter and a receiver, wherein the transmitter is adapted to transmit a transmit signal from the one or more FPGAs and the receiver is adapted to receive a receive signal and provide the receive signal to the one or more FPGAs,
wherein one or more applications are utilized to dynamically configure the one or more FPGAs for digital functionality to operate the software programmable optical transceiver in an associated mode of a plurality of modes, the plurality of modes comprising a Data Center interconnect mode, a metro mode, a regional mode, a long-haul mode, and a submarine mode, each of said plurality of modes requiring different digital functionality based in part on distance, wherein the one or more applications for the associated mode are loaded in the one or more FPGAs as needed such that the software programmable optical transceiver is configured to operate in any one of the plurality of modes with only the one or more applications loaded for the associated mode.

US Pat. No. 10,171,168

OPTOELECTRONIC TRANSCEIVER WITH POWER MANAGEMENT

Intel Corporation, Santa...

1. An optoelectronic device comprising:a photodetector to receive an optical signal and generate an electrical signal based at least in part on the optical signal;
a loss of signal detector coupled with the photodetector, to detect when the photodetector is not receiving the optical signal; and
a re-timer coupled with the loss of signal detector, wherein a first component of the re-timer is to be disabled in response to a detection by the loss of signal detector that the optical signal has not been received for a first predetermined time period, and wherein a second component of the re-timer is to be disabled in response to a detection by the loss of signal detector that the optical signal has not been received for a second predetermined time period, the second predetermined time period being longer than the first predetermined time period.

US Pat. No. 10,171,167

MULTIMEDIA NETWORK DATA PROCESSING SYSTEM

Beijing JiShi HuiTong Tec...

1. A multimedia network data processing system, comprising:a head-end switch, configured to transmit multimedia network data of the data sent from a server to a terminal device, to a head-end network processor, wherein the multimedia network data is multimedia network data based on the TCP/HTTP protocol;
the head-end network processor, configured to encapsulate the multimedia network data to form a UDP packet, and send the UDP packet to a unidirectional broadcasting optical fiber network;
a data processing module, configured to receive the UDP packet from the unidirectional broadcasting optical fiber network, and decapsulate the UDP packet to obtain the multimedia network data based on the TCP/HTTP protocol for the terminal device to play; and
the unidirectional broadcasting optical fiber network, whose physical layer is based on fiber optic Ethernet protocol, configured to use one or more optical amplifiers and one or more optical splitters for unidirectional broadcasting to transmit IP data stream, the IP data stream comprising at least UDP multicast packets or UDP broadcast packets.

US Pat. No. 10,171,166

OPTICAL COMMUNICATION SYSTEM AND OPTICAL COMMUNICATION METHOD

NIPPON TELEGRAPH AND TELE...

1. An optical communication system comprising: a signal processing apparatus; and a wireless apparatus, in which functions of a base station are divided between the signal processing apparatus and the wireless apparatus, a periodic symbol sequence comprising a cyclic prefix appended to a signal of a predetermined size to which an IFFT (Inverse Fast Fourier Transform) has been applied is transmitted between the signal processing apparatus and the wireless apparatus by means of digital RoF (Radio over Fiber) transmission,the signal processing apparatus and the wireless apparatus each comprises a transmission unit and a reception unit,
the transmission unit comprises:
a first separation unit that acquires symbol information relating to a starting position of the symbol sequence and lengths of symbols constituting the symbol sequence and that equalizes the lengths of the symbols by separating a portion of the symbol sequence based on the acquired symbol information; and
a compression unit that compresses symbols that are to be compressed from which the separated portion of the symbol sequence has been removed, and
the reception unit comprises an expansion unit that expands the compressed symbols and restores the symbols.

US Pat. No. 10,171,165

VISIBLE LIGHT SIGNAL GENERATING METHOD, SIGNAL GENERATING APPARATUS, AND PROGRAM

PANASONIC INTELLECTUAL PR...

1. A method comprising:generating a preamble in which a first luminance value and a second luminance value alternately appear along a time axis, the first luminance value and second luminance value being different luminance values from each other;
generating a first payload in which the first luminance value and the second luminance value alternately appear along the time axis by determining a first time length of the first luminance value and a second time length of the second luminance value using a first formula, the first time length being a time length in which the first luminance value continues in the first payload, the second time length being a time length in which the second luminance value continues in the first payload, the first formula determining the first time length and the second time length according to a transmission target signal;
generating a visible light signal by joining the preamble and the first payload; and
transmitting the visible light signal by a change in luminance of a light source.

US Pat. No. 10,171,164

2D BARCODE-BASED BI-DIRECTIONAL WIRELESS TRANSMISSION SYSTEM

NATIONAL CHUNG CHENG UNIV...

1. A 2D barcode-based bi-directional wireless transmission system, comprising:a first apparatus comprising a first display screen, a first processing system and a first camera, the first processing system configured to store information, to execute software, to encode data to be transmitted into one or more 2D barcodes, to capture 2D barcodes of other apparatuses, and to decode the captured 2D barcodes;
a second apparatus comprising a second display screen, a second processing system and a second camera, the second processing system configured to store information, to execute software, to encode data to be transmitted into one or more 2D barcodes, to capture 2D barcode images of other apparatuses and to decode the captured 2D barcode images;
wherein said first apparatus is further configured to encode said data to be sent into multiple 2D barcode images, and then sequentially display said multiple 2D barcode images on the first display screen;
wherein said second apparatus is configured to use the second camera to photograph the first display screen so as to sequentially capture said multiple 2D barcode images from said first apparatus, and then decode the captured said multiple 2D barcode images into a received data for storage;
wherein said second apparatus is further configured to encode a feedback information into a first 2D barcode image and display the first 2D barcode image on the second display screen;
wherein said first apparatus is further configured to capture the first 2D barcode image of said feedback information by aiming the first camera at the second display screen and then decoding the captured first 2D barcode image of said feedback information so as to obtain said feedback information, and
wherein said second apparatus is configured to encode the data to be sent into multiple 2D barcode images and sequentially display the multiple 2D barcode images on the second display screen;
wherein said first apparatus is configured to capture the multiple 2D barcode images from said second apparatus by aiming the first camera at the second display screen, and then decode the captured 2D barcode images into a second received data for storage;
wherein said first apparatus is configured to encode a second feedback information into a second 2D barcode image and display the second 2D barcode image on the first display screen; and
wherein said second apparatus is configured to capture the 2D barcode image of said feedback information by aiming the second camera at the first display screen and then decoding the captured second 2D barcode image of said second feedback information so as to obtain said second feedback information.

US Pat. No. 10,171,163

SIGNAL QUALITY MEASUREMENT DEVICE AND SIGNAL QUALITY MEASUREMENT METHOD

FUJITSU LIMITED, Kawasak...

1. A signal quality measurement device that measures quality of an optical signal that is transmitted from a transmitter, passes through wavelength selective switches and optical amplifiers, and is received by a receiver,the signal quality measurement device comprising:
a memory, and
a processor coupled to the memory, the processor being coupled to:
set respective passbands of the wavelength selective switches; and
calculate the quality of the optical signal by acquiring a first power of an optical component in a first wavelength band including a center wavelength of the optical signal received by the receiver, and a second power of an optical component in a second wavelength band adjacent to the first wavelength band,
wherein the processor
detects a combined power of various amplified spontaneous emissions of the optical amplifiers from the second power, and detects a power of the optical signal from the first power and the second power, when the processor sets each of the passbands of the wavelength selective switches as a wavelength band including the first wavelength band and the second wavelength band,
detects, from the second power, the amplified spontaneous emission of at least one optical amplifier existing between one of the wavelength selective switches and the receiver among the optical amplifiers, when the processor sets the passband of one of the wavelength selective switches as the first wavelength band, and
calculates the quality of the optical signal from each of the detected powers.

US Pat. No. 10,171,162

APPARATUS AND METHOD FOR MEASURING FREQUENCY RESPONSE CHARACTERISTICS OF OPTICAL TRANSMITTER AND OPTICAL RECEIVER

FUJITSU LIMITED, Kawasak...

8. A method for measuring frequency response characteristics of an optical transmitter and an optical receiver, the optical transmitter including a modulator, and the optical receiver including a photoelectric detector, the modulator of the optical transmitter being directly connected to the photoelectric detector of the optical receiver, and signals outputted by the modulator being directly inputted into the photoelectric detector, the method comprising:generating a driving signal for driving the modulator of the optical transmitter, which driving signal comprises at least two frequencies; and
respectively calculating the frequency response characteristics of the optical transmitter and the optical receiver according to output signal components in output signals of the optical receiver corresponding to at least two detection signal components of identical amplitudes and different frequencies in detection signals;
wherein the detection signals have photoelectric conversion performed by the photoelectric detector of the optical receiver.

US Pat. No. 10,171,161

MACHINE LEARNING FOR LINK PARAMETER IDENTIFICATION IN AN OPTICAL COMMUNICATIONS SYSTEM

Ciena Corporation, Hanov...

1. A method for link parameter identification in an optical communications system, the method comprising:applying a first trained artificial neural network (ANN) to first input values representative of nonlinear noise in a signal received at a receiver from a transmitter over a link in the optical communications system, thereby generating first output values;
applying a second trained ANN to second input values comprising the first output values and one or more known parameters of the link, thereby generating second output values; and
identifying one or more link parameter estimates of the link based on the second output values.

US Pat. No. 10,171,159

DONOR SELECTION FOR RELAY ACCESS NODES USING REFERENCE SIGNAL BOOSTING

Sprint Spectrum L.P., Ov...

1. A method for donor selection in a relay access node, the method comprising:identifying a plurality of candidate donor access nodes;
obtaining one or more characteristics associated with each of the plurality of candidate donor access nodes;
determining a primary donor access node based on a comparison of the one or more characteristics between each of the plurality of candidate donor access nodes;
receiving a reference signal transmitted by the primary donor access node at a transmission power higher than a transmission power of downlink information transmitted by the primary donor access node;
evaluating one or more quality characteristics of the primary donor access node; and
based on the one or more quality characteristics meeting a predetermined threshold, requesting a connection to the primary donor access node.

US Pat. No. 10,171,158

ANALOG SURFACE WAVE REPEATER PAIR AND METHODS FOR USE THEREWITH

1. An analog surface wave repeater pair comprising:a first launcher configured to transmit and receive first guided electromagnetic waves that propagate on an outer surface of a first segment of a transmission medium without requiring an electrical return path;
a second launcher configured to transmit and receive second guided electromagnetic waves that propagate on an outer surface of a second segment of transmission medium without requiring an electrical return path;
a first transceiver including:
a first low noise amplifier configured to receive a first microwave signal from the first launcher, wherein the first microwave signal is generated by the first launcher in response to receiving the first guided electromagnetic waves from the first segment of the transmission medium;
a first notch filter configured to attenuate signals in a fourth generation (4G) wireless frequency band from the first microwave signal;
a first amplifier configured to amplify a second microwave signal; and
a first directional coupler configured to couple the first microwave signal from the first launcher and the second microwave signal to the first launcher to facilitate transmission of the first guided electromagnetic waves on the first segment of the transmission medium; and
a second transceiver including:
a second low noise amplifier configured to receive the second microwave signal from the second launcher, wherein the second microwave signal is generated by the second launcher in response to receiving the second guided electromagnetic waves from the second segment of the transmission medium;
a second notch filter configured to attenuate signals in the 4G wireless frequency band from the second microwave signal;
a second amplifier configured to amplify the first microwave signal; and
a second directional coupler configured to couple the second microwave signal from the second launcher and the first microwave signal to the second launcher to facilitate transmission of the second guided electromagnetic waves on the second segment of the transmission medium.

US Pat. No. 10,171,156

APPARATUS AND METHOD FOR TRANSMITTING UPLINK INFORMATION IN A BROADCASTING SYSTEM

Samsung Electronics Co., ...

1. A mobile broadcasting system comprising:a first terminal including a transceiver configured to receive a broadcast signal and at least one processor configured to generate a first uplink signal comprising a first broadcast service identifier (ID) and first data using the broadcast signal;
a second terminal;
a repeater; and
a transmitting station for providing a broadcast service,
wherein the transceiver is further configured to transmit the first uplink signal to the repeater,
wherein a second uplink signal comprising a second broadcast service ID and second data is transmitted from the second terminal to the repeater,
wherein, in response to the first broadcast service ID matching the second broadcast service ID, the first broadcast service ID and the second broadcast service ID are removed, by the repeater, from the first uplink signal and the second uplink signal, respectively, to store the first data and the second data in a queue corresponding to the broadcast service identified by the first broadcast ID and the second broadcast ID, and generate, by the repeater, a third uplink signal comprising the first data and the second data based on information stored in the queue, and
wherein the third uplink signal is transmitted from the repeater to a transmitting station corresponding to the broadcast service identified by the first broadcast service ID and the second broadcast service ID.

US Pat. No. 10,171,155

PUCCH TRANSMIT DIVERSITY WITH ONE-SYMBOL STBC

QUALCOMM Incorporated, S...

1. A scheduling entity within a wireless communication network, comprising:a processor;
a memory communicatively coupled to the processor; and
a transceiver communicatively coupled to the processor, wherein the processor is configured to:
receive an uplink signal comprising an uplink control channel via the transceiver, the uplink control channel comprising a plurality of uplink control information, each transmitted by one of a set of scheduled entities, wherein each of the plurality of uplink control information comprises a plurality of single-carrier frequency division multiple access (SC-FDMA) symbols;
time domain de-spread the plurality of SC-FDMA symbols to produce a plurality of code blocks;
identify, from the plurality of code blocks, a first code block and a second code block that each comprise a same spreading code;
apply space-time block decoding over the first code block and the second code block to produce a first information block comprising a first set of modulated control symbols and a first cyclic affix appended to the first set of modulated control symbols and a second information block comprising a second set of modulated control symbols and a second cyclic affix appended to the second set of modulated control symbols; and
demodulate the first set of modulated control symbols and the second set of modulated control symbols to produce a plurality of control data.

US Pat. No. 10,171,154

METHOD FOR REPORTING BEAM INDEX FOR 3D MIMO TRANSMISSION IN WIRELESS COMMUNICATION SYSTEM, AND DEVICE THEREFOR

LG ELECTRONICS INC., Seo...

1. A method of reporting a beam index by a user equipment (UE) to an enhanced Node B (eNB) in a wireless access system, the method comprising:receiving a plurality of reference signals from the eNB;
measuring a plurality of beams using the plurality of the reference signals;
reporting an index of a most preferred beam among the plurality of the beams to the eNB; and
reporting information on at least one second preferred beam, which is determined on the basis of the most preferred beam, to the eNB,
wherein the information on the at least one second preferred beam corresponds to information on an index difference between the most preferred beam and the at least one second preferred beam.

US Pat. No. 10,171,153

METHOD AND APPARATUS FOR TRANSMITTING CHANNEL STATE INFORMATION IN WIRELESS COMMUNICATION SYSTEM

LG ELECTRONICS INC., Seo...

1. A method for transmitting channel state information (CSI) by a user equipment in a wireless communication system, the method comprising:subsampling a first codebook associated with a first PMI (precoding matrix indicator) and a second codebook associated with a second PMI according to a reporting submode for 4 antenna ports,
wherein the subsampling, for selecting Discrete Fourier Transform (DFT) vectors, comprises selecting a second codebook index for the second PMI based on a first codebook index for the first PMI,
wherein the DFT vectors selected are odd-numbered vectors of vectors of a beam group constructing the first codebook if the first codebook index corresponds to an even number, and
wherein the DFT vectors selected are even-numbered vectors of the vectors of the beam group if the first codebook index corresponds to an odd number; and
transmitting the channel state information based on the subsampled first codebook and the second codebook.

US Pat. No. 10,171,151

THROUGHPUT OPTIMIZATION BY GUARD INTERVAL SELECTION FROM BEAMFORMING FEEDBACK

QUALCOMM Incorporated, S...

1. An apparatus for wireless communication, comprising:a processor;
memory in electronic communication with the processor; and
instructions stored in the memory and operable, when executed by the processor, to cause the apparatus to:
obtain compressed beamforming (CBF) information from one or more stations (STAs) as part of a sounding procedure, the CBF information comprising signal-to-noise ratio (SNR) information for a channel;
obtain, based at least in part on the compressed beamforming information, an indication of frequency variation within a per-tone SNR information using a fast Fourier transform (FFT) of the per-tone SNR information;
determine a delay spread based on the indication of frequency variation within the per-tone SNR information;
determine a guard interval (GI) based at least in part on the determined delay spread; and
transmit a plurality of orthogonal frequency-division multiplexing (OFDM) symbols utilizing the determined GI.

US Pat. No. 10,171,150

DYNAMIC OPTIMIZATION OF BEAMFORMING WEIGHTS

Sprint Communications Com...

1. A method of dynamic beamforming based on detected parameters, the method comprising:receiving, from a first user device, a first set of communication parameters associated with communication between a first antenna array associated with a base station and the first user device, wherein the first set of communication parameters comprises user device location data and at least one of channel quality index (CQI), channel load, band load, and signal-to-noise ratio (SINR);
receiving, from a second user device, a second set of communication parameters associated with communication between the first antenna array and the second user device;
analyzing the first set of communication parameters and the second set of communication parameters;
based on the analyzing, determining how to modify at least one component of a first set of beamforming weights to produce a second set of beamforming weights used to modify a beam emitted by a second antenna array associated with the base station;
dynamically applying the second set of beamforming weights to the second antenna array; and
in response to the dynamic application, transferring communication between the second device and the first antenna array to the second antenna array.

US Pat. No. 10,171,149

APPARATUS, SYSTEM AND METHOD OF WIRELESS BACKHAUL AND ACCESS COMMUNICATION VIA A COMMON ANTENNA ARRAY

INTEL CORPORATION, Santa...

1. A wireless communication apparatus comprising:a memory; and
a beamforming processor component to process Multi-User (MU) Multi-Input-Multi-Output (MIMO) communications via an antenna array of a wireless communication node, the beamforming processor component to cause one or more first sub-arrays of the antenna array to form one or more first directional beams to allow communications on one or more backhaul links between the wireless communication node and one or more other wireless communication nodes, and to cause one or more second sub-arrays of the antenna array to form one or more second directional beams to allow communications on one or more access links between the wireless communication node and one or more User Equipment (UEs);
a backhaul processor component to process the communications on said one or more backhaul links; and
an access processor component to process the communications on said one or more access links.

US Pat. No. 10,171,148

WIRELESS COMMUNICATION DEVICE

KABUSHIKI KAISHA TOSHIBA,...

1. A wireless communication device comprising:a transmitter configured to multiplex and transmit a plurality of first frames;
a receiver configured to receive a plurality of second frames that represent acknowledgement responses to the plurality of first frames and are multiplexed and transmitted; and
controlling circuitry, wherein
first information necessary for transmission of the plurality of second frames is set in the plurality of first frames, and
the controlling circuitry is configured to separate the plurality of second frames based on the first information, wherein
the plurality of second frames are transmitted in spatial multiplexing,
the first information is information necessary to separate the plurality of second frames transmitted in the spatial multiplexing, and
the first information contains information specifying preamble patterns to be disposed in the plurality of second frames.

US Pat. No. 10,171,147

METHOD FOR TRANSMITTING SIGNAL IN MULTIPLE-ANTENNA WIRELESS COMMUNICATION SYSTEM AND APPARATUS FOR SAME

LG ELECTRONICS INC., Seo...

1. A method of transmitting a signal, the method performed by a first base station (BS) supporting a plurality of vertical beam directions in a wireless communication system that supports multiple antennas and comprising:configuring a group of a plurality of BSs including the first BS for a user equipment (UE) at a location higher than locations of the plurality of BSs;
setting a sector for supporting coverage of the group;
determining whether to perform beamforming on the set sector for the UE;
transmitting information to other of the plurality of BSs included in the group, the information indicating that the first BS will perform beamforming for the UE when it is determined to perform the beamforming for the UE; and
transmitting the signal through the BS transmitting the information to other BSs of the plurality of BSs to the UE in an upward beam direction of the plurality of BSs.

US Pat. No. 10,171,146

MIMO RANK REDUCTION TO IMPROVE DOWNLINK THROUGHPUT

Telefonaktiebolaget L M E...

13. A device adapted to:determine at least one of that an imbalance between a plurality of parallel channels of a spatial multiplexing downlink transmission to a wireless device based on a plurality of measurements where each measurement is indicative of a signal quality for a corresponding one of the parallel channels is greater than an imbalance threshold and that a Negative Acknowledgement (NACK) rate over time for the plurality of parallel channels of a spatial multiplexing downlink transmission reported by the wireless device is greater than a NACK rate threshold; and
in response to determining at least one of that the imbalance between the plurality of parallel channels is greater than the imbalance threshold and that the NACK rate is greater than the NACK rate threshold, perform a rank reduction for the next downlink transmission whereby a rank is reduced from a rank indicator reported by the wireless device to some lower rank.

US Pat. No. 10,171,144

LOW COMPLEXITY HIGH PERFORMANCE SINGLE CODEWORD MIMO FOR 5G WIRELESS COMMUNICATION SYSTEMS

1. A transmitter device, comprising:a processor; and
a memory that stores executable instructions that, when executed by the processor, facilitate performance of operations, comprising:
determining a rank associated with a first transmission via a control channel to a receiver device;
determining a first number of codewords to be used to transmit control channel information for the first transmission based on the rank; and
scheduling a second number of control channel grants to transmit the first number of codewords, wherein respective codewords of the first number of codewords are scheduled separately on respective control channel grants of the second number of control channel grants, and wherein a control channel grant of the second number of control channel grants comprises information relating to an antenna port corresponding to the control channel grant.

US Pat. No. 10,171,142

DATA TRANSMISSION METHOD, APPARATUS, AND DEVICE

Huawei Technologies Co., ...

1. A data transmission method, wherein the method comprises:determining, by a transmit end device, a signature matrix S according to a quantity L of layers of a data stream and a quantity R of receive antennas used by a receive end device, wherein the signature matrix S comprises L first element sequences arranged in a first dimensional direction, the L first element sequences are in one-to-one correspondence with the L layers of the data stream, each first element sequence of the L first element sequences comprises R first elements arranged in a second dimensional direction, the R first elements are in one-to-one correspondence with the R receive antennas, the R first elements comprise at least one zero element and at least one non-zero element, R?2, the L first element sequences are different from each other, the L layers of the data stream correspond to a same time-frequency resource, and L?2;
determining, by the transmit end device, a precoding matrix P according to a channel matrix H and the signature matrix S, and performing precoding processing on the L-layer data stream according to the precoding matrix P, wherein the channel matrix H corresponds to channels between the transmit end device and the receive end device, the precoding matrix P comprises L second element sequences arranged in the first dimensional direction, the L second element sequences are in one-to-one correspondence with the L first element sequences, and the L second element sequences are in one-to-one correspondence with the L layers of the data stream; and
sending, by the transmit end device to the receive end device, the L-layer data stream on which the precoding processing has been performed and information used to indicate the signature matrix S.

US Pat. No. 10,171,141

HYBRID BEAM-FORMING ANTENNA ARRAY USING SELECTION MATRIX FOR ANTENNA PHASE CALIBRATION

ROSS SCIENCES LIMITED, H...

1. A hybrid beam-forming antenna array used in a multi-user massive multi-input multi-output (MU-MIMO) communication system, comprising:a single digital beam-former connected to M number of passive beam-former sub-arrays, wherein M is an integer equal to or greater than 1;
the M number of passive beam-former sub-arrays, each of the passive beam-former sub-arrays comprising:
a radio frequency (RF) transceiver having an output connected to an input of a single RF chain;
a 2N-inputs-2N-outputs selection matrix having all its inputs connected to the single RF chain output; and
2N number of antennas, each connected to and fed by one of the outputs of the selection matrix, wherein N is an integer equal to or greater than 0;
wherein the single digital beam-former output is connected to and feeding the RF transceiver of the passive beam-former sub-arrays; and
wherein the selection matrix has no power-consuming element and no external control, and configured to be fed with an RF signal at one or more of its 2N number of inputs and produce 2N number of separate RF signal beams with progressive phase distribution at its 2N number of outputs; and
wherein hybrid beam-forming antenna array has no antenna calibration network.

US Pat. No. 10,171,140

MU-MIMO GROUP SELECTION

Hewlett Packard Enterpris...

1. A communications device, comprising:communications circuitry to wirelessly communicate with a number of client devices using multiple possible bandwidth settings; and
control circuitry to determine signal-to-interference-plus-noise ratios (SINRs) for the client devices based on compressed client-side channel state information received from the client devices, and to select a set of multi-user-multiple-input-multiple-output (MU-MIMO) groups and bandwidth settings respectively assigned thereto, by:
estimating, based on the SINRs, bandwidth-specific throughputs for potential MU-MIMO groups at a specified bandwidth setting from among the multiple-possible bandwidth settings, and
selecting the set of MU-MIMO groups together with their respectively assigned bandwidth settings based on the bandwidth-specific throughputs.

US Pat. No. 10,171,138

INDICATING OPTIONAL PARAMETER GROUPS

NOKIA TECHNOLOGIES OY, E...

1. A method, comprising:determining optional configurations for parameters that override or supplement a default configuration of the parameters, wherein the optional configurations are grouped into optional parameter groups;
determining a number of the optional parameter groups to be encoded so as to not exceed a container size of a physical broadcast channel;
encoding the optional parameter groups in a system information block; and
transmitting the system information block from a network node to a user equipment.

US Pat. No. 10,171,137

METHOD AND DEVICE FOR TRANSMITTING DATA BY USING SPATIAL MODULATION SCHEME IN WIRELESS ACCESS SYSTEM

LG ELECTRONICS INC., Seo...

1. A method for transmitting data signals from a transmitter by using a spatial modulation (SM) scheme in a wireless access system, the method performed an enhanced Node-B (eNB) and comprising:selecting two or more transmitting antennas for transmitting the data signals by using two or more ranks;
deriving data bit streams by applying the SM scheme,
wherein the data bit streams correspond to the two or more ranks;
configuring the data signals by using the SM scheme on the basis of the data bit streams;
transmitting, to a user equipment (UE), an enhanced physical downlink control channel (E-PDCCH) and demodulation reference signals (DM-RSs) through one of the two or more transmitting antennas, the E-PDCCH including rank information indicating a number of rank used for transmitting the data signals; and
transmitting, to the UE, the configured data signals through the selected two or more transmitting antennas and DM-RSs matched with each of the selected two or more transmission antennas,
wherein each of the two or more transmission antennas uses different predetermined DM-RSs from each other,
wherein combinations of the rank information and the DM-RSs identify each of the two or more transmission antennas,
wherein, if the E-PDCCH is transmitted through a first transmission antenna of the two or more transmission antennas, this represents a positive acknowledgment (ACK) for uplink data transmitted from the UE, and
wherein, if the E-PDCCH is transmitted through a second transmission antenna of the two or more transmission antennas, this represents a negative acknowledgement (NACK) for the uplink data transmitted from the UE.

US Pat. No. 10,171,136

REDUCING INTERNAL SIGNALING BURDEN IN THE DISTRIBUTED ANTENNA SYSTEM

LG ELECTRONICS INC., Seo...

1. A method for a user equipment (UE) to receive signals from a network, the method comprising:receiving a first information unit from the network by a first distributed unit (DU) among multiple DUs distributed within the UE;
reporting, by the first DU, reception information of the first information unit to a central unit (CU) of the UE before decoding the received first information unit, wherein the CU controls the multiple DUs;
receiving, at the first DU from the CU, a direction indicating whether the first DU is to decode the received first information unit or not, and indicating whether the first DU is to transfer the received first information unit to the CU or another DU within the UE,
wherein the CU sends the direction based on the reception information of the first received information unit; and
decoding and transferring, by the first DU, the received first information unit to the CU and the another DU within the UE when the direction indicates a specific value,
wherein the CU sends the direction with an indication that the first DU is to transfer the first information unit.

US Pat. No. 10,171,135

PRECODING METHOD, APPARATUS, AND SYSTEM

HUAWEI TECHNOLOGIES CO., ...

1. A precoding method for a level 1 data center comprising:obtaining, by the level 1 data, center, a channel information signal between a terminal and the level 1 data center, wherein the channel information signal comprises a channel matrix;
encoding, by the level 1 data center, the channel matrix according to a precoding matrix to obtain an equivalent channel;
sending, by the level 1 data center, the equivalent channel to a level 2 data center for further processing when a frequency selectivity of the equivalent channel is less than or equal to a frequency selectivity of the channel; and
sending, by the level 1 data center, the channel matrix and the precoding matrix to the level 2 data center for further processing when the frequency selectivity of the equivalent channel is greater than the frequency selectivity of the channel.

US Pat. No. 10,171,134

ELECTRIC DEVICE AND OPERATION METHOD

Canon Kabushiki Kaisha, ...

1. An electric device for performing short distance wireless communication with a mobile terminal, comprising:an antenna configured to generate induced power by an RF signal from the mobile terminal;
a resistor configured to drop a peak voltage generated by the induced power;
a circuit driven by the voltage dropped by the resistor and configured to perform the short distance wireless communication; and
a light emission element driven by the voltage dropped by the resistor and configured to emit light, wherein
the resistor is series-connected between the circuit and the antenna.

US Pat. No. 10,171,132

CURRENT-MODE RECEIVERS FOR INDUCTION-BASED COMMUNICATION AND RELATED METHODS

MEDIATEK Singapore Pte. L...

1. A method comprising:generating a current with a transmitter of an integrated circuit (IC) and coupling the current to an inductor via an input/output (I/O) terminal of the IC; and
sensing information received at the IC through the inductor by sensing a variation in impedance seen at the I/O terminal, wherein sensing the variation in impedance comprises:
sensing the current coupled to the inductor;
converting the sensed current into a voltage; and
sensing a variation in the voltage with a receiver.

US Pat. No. 10,171,131

ELECTRONIC TUNING SYSTEM

William Redman-White, Al...

1. A circuit configured to control a resonant frequency of a tuned circuit so as to correspond with an applied excitation frequency over a continuous range of excitation frequencies, the tuned circuit comprising: an inductor; at least two capacitors; and at least one switch connected in combination with one of the at least two capacitors, wherein an apparent resonant frequency can be varied by controlling the duty cycle of an opening and closing of the at least one switch; and a source providing an excitation signal to the tuned circuit, the circuit configured to control the resonant frequency comprising:a voltage sensor configured to sense a voltage across two terminals of the at least one switch when the at least one switch is in an open state;
tuning control circuitry configured to derive a tuning control input signal from the sensed voltage; and
switch timing circuitry configured to control the timing of the opening and closing of the at least one switch in a manner based on the derived tuning control input signal, wherein the opening and closing instants of the said at least one switch are synchronous with the applied excitation signal and wherein the opening and closing instants of the said at least one switch are substantially equally spaced in time around a peak of a voltage at the connection between the inductor and the capacitors when the circuit is at resonance.

US Pat. No. 10,171,130

RECEIVER CIRCUIT

Power Integrations, Inc.,...

1. An analog receiver frontend, comprising:a first amplification circuit coupled to receive an input signal, wherein the first amplification stage is coupled to amplify a difference between the input signal and a threshold to generate the first signal;
a second amplification circuit coupled to receive the first signal from the first amplification circuit, wherein the second amplification circuit is coupled to amplify the first signal to generate a second signal;
an output circuit coupled to receive the second signal from the second amplification circuit, wherein the output circuit is coupled to output a recovered signal wherein the recovered signal is a pulse waveform of high and low sections; and
an input hysteresis circuit coupled to the output circuit to receive the recovered signal and generate a hysteresis signal, wherein one or both of the input signal and the threshold are level shifted by the hysteresis signal in response to the recovered signal.

US Pat. No. 10,171,129

PULSE SHAPING INTEROPERABILITY PROTOCOL FOR ULTRA WIDEBAND SYSTEMS

Apple Inc., Cupertino, C...

1. An electronic device comprising:a memory; and
one or more processors communicatively coupled to the memory and configured to:
receive pulse shape information from an other electronic device, wherein the pulse shape information is used in Ultra Wideband (UWB) communications between the electronic device and the other electronic device, and wherein the pulse shape information comprises a time-zero index that identifies a time instant reference to be used to process the UWB communications;
receive a ranging signal based at least in part on the pulse shape information; and
determine an estimated distance between the electronic device and the other electronic device based at least in part on the time-zero index and the ranging signal.

US Pat. No. 10,171,128

DATA TRANSMISSION METHOD AND APPARATUS

1. A data transmission method, comprising the following steps:determining a transmission resource to be used and a complex-valued spreading sequence to be used;
processing a data symbol to be sent by using the complex-valued spreading sequence to generate a symbol sequence; and
sending the symbol sequence through the transmission resource,
wherein each element of the complex-valued spreading sequence is a complex number, and values of a real part and an imaginary part of each element are both from an M-element real number set, wherein the M is an integer greater than or equal to 2, and the M-element real number set is selected from:
a set formed by M integers within a range of [?(M?1)/2, (M?1)/2], wherein the M is an odd number;
a set formed by M odd numbers within a range of [?(M?1), (M?1)], wherein the M is an even number;
a set formed by M real numbers obtained through multiplying respectively M integers within a range of [?(M?1)/2, (M?1)/2] by specified coefficient(s), wherein the M is an odd number; and
a set formed by M real numbers obtained through multiplying respectively M odd numbers within a range of [?(M?1), (M?1)] by specified coefficient(s), wherein the M is an even number.

US Pat. No. 10,171,127

METHOD, SYSTEM AND COMPUTER PROGRAM FOR SYNCHRONIZING PSEUDORANDOM BINARY SEQUENCE MODULES

1. A method for synchronizing a first pseudorandom binary sequence module of a receiver and a second pseudorandom binary sequence module of a transmitter, the method comprising:initializing the first pseudorandom binary sequence module with a first received bit sequence and performing bit sequence generation with the aid of the second pseudorandom binary sequence module;
comparing received remaining bits to bit sequences generated with the aid of the first pseudorandom binary sequence module to determine whether a bit error rate is below a predefined threshold;
accounting for phase ambiguities to check whether the bit error rate of each of a number of candidate phase positions for an initial phase is below the predefined threshold; and
in a case where there is no phase information available, testing each of a plurality of possible phase positions for the respective number of candidate phase positions.

US Pat. No. 10,171,126

APPARATUS FOR UPLINK MULTI-ANTENNA COMMUNICATION BASED ON A HYBRID COUPLER AND A TUNABLE PHASE SHIFTER

Intel IP Corporation, Sa...

1. Front end module (FEM) circuitry, comprising:a hybrid coupler to generate a first antenna transmit signal and a second antenna transmit signal based on hybrid coupler input signals; and
one or more tunable phase shifters to generate the hybrid coupler input signals based at least partly on an FEM input signal,
wherein the first antenna transmit signal is based on a first signal summation that comprises summation of a first hybrid coupler input signal and a second hybrid coupler input signal phase-shifted, by the hybrid coupler, according to a predetermined hybrid coupler phase shift, and
wherein the second antenna transmit signal is based on a second signal summation that comprises summation of the second hybrid coupler input signal and the first hybrid coupler input signal phase-shifted, by the hybrid coupler, according to the predetermined hybrid coupler phase shift.

US Pat. No. 10,171,125

TUNABLE ANTENNA SYSTEMS

Apple Inc., Cupertino, C...

1. An electronic device having a periphery, comprising:radio-frequency transceiver circuitry;
an antenna having an antenna feed and ground plane structures;
a transmission line path coupled between the radio-frequency transceiver circuitry and the antenna feed;
peripheral conductive housing structures that run along the periphery and surround the ground plane structures, wherein the peripheral conductive housing structures include a portion that forms at least part of the antenna;
storage and processing circuitry configured to generate a control signal; and
an adjustable electrical component coupled to the peripheral conductive housing structures, wherein the adjustable electrical component has a control input that receives the control signal and the adjustable electrical component is configured to adjust a frequency response of the antenna based on the control signal.

US Pat. No. 10,171,124

LOW NOISE AMPLIFIER ARBITER FOR LICENSE ASSISTED ACCESS SYSTEMS

Apple Inc., Cupertino, C...

1. An electronic device, comprising:a network interface configured to allow the electronic device to communicate over one or more channels of a wireless network;
a transceiver operably coupled to the network interface and configured to transmit data and to receive data over the one or more channels; and
a front end module (FEM) operably coupled to the transceiver and configured to receive licensed cellular signals and unlicensed cellular signals over the one or more channels, the FEM having an arbiter device configured to receive information related to the licensed cellular signals and the unlicensed cellular signals and to control at least one variable-gain amplifier and at least one gain adjustment device to independently amplify the licensed cellular signals and the unlicensed cellular signals.

US Pat. No. 10,171,123

TRIPLE-GATE PHEMT FOR MULTI-MODE MULTI-BAND SWITCH APPLICATIONS

SKYWORKS SOLUTIONS, INC.,...

1. A switch element comprising:a source including a plurality of source fingers and a drain including a plurality of drain fingers interleaved with the source fingers;
an active mesa region defined between at least one of the plurality of source fingers and an adjacent at least one of the plurality of drain fingers; and
a plurality of gates disposed between the at least one of the plurality of source fingers and the adjacent at least one of the plurality of drain fingers, at least one of the plurality of gates including a finger extending into the active mesa region from outside of the active mesa region and terminating within the active mesa region, the plurality of gates including a first gate, a second gate, and a third gate, a non-zero voltage difference across the source and the drain being evenly divided between the first gate, the second gate, and the third gate.

US Pat. No. 10,171,121

RUGGEDIZED PROTECTIVE CASE WITH INTEGRATED EASEL KICKSTAND FOR MOBILE DEVICE

MobileDemand LC, Hiawath...

1. A ruggedized protective case for a mobile computing device, comprising:an inner housing configured to partially enclose a mobile computing device, the inner housing fashioned of a rigid material;
an outer housing configured to partially enclose the inner housing, the outer housing fashioned of a flexible material and including one or more reinforced corners, each reinforced corner configured to provide impact protection to a corner of the mobile computing device;
a kickstand consisting of a rigid core entirely overmolded with the flexible material, the kickstand having an inner end hingedly coupled to the inner housing and an outer end coupled to the kickstand at a first angle and configured to hold the mobile computing device at a second angle to a flat surface, the kickstand positionable at a third angle of at most 170 degrees to the inner housing.

US Pat. No. 10,171,120

APPARATUS AND METHOD FOR SUPPRESSING INTERMODULATION DISTORTION COMPONENT IN RECEPTION SIGNAL, AND COMMUNICATION APPARATUS

FUJITSU LIMITED, Kawasak...

1. An apparatus for suppressing an intermodulation distortion component in a reception signal, the apparatus comprising:a memory; and
processor circuitry coupled to the memory and configured to
execute acquisition to acquire a plurality of transmission signals transmitted at frequencies different from each other,
execute reception to receive a reception signal including an intermodulation distortion component caused by the plurality of transmission signals,
execute generation to generate a replica of the intermodulation distortion component according to the plurality of transmission signals,
execute normalization to normalize the reception signal so that the reception signal has certain amplitude,
execute calculation to calculate a correlation value between the normalized reception signal and the replica,
execute adjustment to adjust delay in the replica relative to the reception signal according to the correlation value, and
execute combination to combine the replica for which the delay is adjusted with the reception signal.

US Pat. No. 10,171,118

METHOD FOR TRANSMITTING REFERENCE SIGNAL IN CELL THAT USES UNLICENSED FREQUENCY BAND AND DEVICE

HUAWEI TECHNOLOGIES CO., ...

1. A method for transmitting a reference signal in a cell that uses an unlicensed frequency band, comprising:determining a candidate resource set that is used when a first reference signal is transmitted in the cell that uses the unlicensed frequency band, wherein the candidate resource set comprises a preset resource and at least one flexible candidate resource, wherein the preset resource is a resource that is in a time window and that is required, when the cell is in an active state, for transmission of the first reference signal according to a first period, and wherein the flexible candidate resource is a candidate resource that is in the time window and that is obtained after the preset resource is translated in terms of time, wherein a period in which the time window emerges is a second period, and the second period is greater than the first period;
determining a first candidate resource that is used when the first reference signal is transmitted in the cell that uses the unlicensed frequency band, wherein a channel on the unlicensed frequency band corresponding to the first candidate resource is in an idle state, and wherein the first candidate resource is one of the preset resource or a flexible candidate resource in the candidate resource set; and
sending the first reference signal on the first candidate resource.

US Pat. No. 10,171,117

METHODS AND APPARATUS TO MEASURE EXPOSURE TO BROADCAST SIGNALS HAVING EMBEDDED DATA

The Nielsen Company (US),...

1. A broadcast signal exposure meter comprising:a first decoder to obtain an identifier of a broadcast station from an audio signal output by an end user broadcast receiver;
a radio to tune to a broadcast signal from the broadcast station associated with the identifier of the broadcast station;
a second decoder to obtain embedded data from the broadcast signal, the embedded data representing media contained in the broadcast signal;
a location detector to determine location information; and
an interface to provide the embedded data and the location information to a server, the server to determine audience measurement information for the media based on the provided embedded data.

US Pat. No. 10,171,114

RADIO FREQUENCY SWITCH APPARATUS HAVING IMPROVED NOISE SUPPRESSION CHARACTERISTICS

Samsung Electro-Mechanics...

1. A radio frequency switch apparatus, comprising:a first switching circuit connected between an antenna terminal and a first signal terminal, comprising a first series switching circuit and a first shunt switching circuit configured to switch a first signal band on and off;
a second switching circuit connected between the antenna terminal and a second signal terminal, configured to switch a second signal band, different from the first signal band, on and off; and
an inductor circuit comprising a first inductor device connected between the first shunt switching circuit and a ground,
wherein the first inductor device suppresses noise, except for the first signal band and the second signal band, by being resonant with a capacitance present upon the first shunt switching circuit being turned off.

US Pat. No. 10,171,113

MULTIPLEXER, TRANSMISSION DEVICE, AND RECEPTION DEVICE

MURATA MANUFACTURING CO.,...

1. A multiplexer that transmits and receives high-frequency signals via an antenna element, the multiplexer comprising:a plurality of elastic wave filters with passbands different from each other;
a common terminal, with which at least one first circuit element is connected between a connection path of the common terminal and the antenna element, and a reference terminal, and at least one second circuit element is connected in series to the connection path; and
a first inductance element; wherein
one elastic wave filter of the plurality of elastic wave filters includes:
a series resonator connected between an input terminal and an output terminal; and
a parallel resonator connected between a connection path connecting the input terminal and the output terminal, and a reference terminal;
each of the plurality of elastic wave filters other than the one elastic wave filter includes a series resonator connected between an input terminal and an output terminal;
in the one elastic wave filter of the plurality of elastic wave filters, one of the input terminal and the output terminal of the one elastic wave filter, which is a terminal closer to the antenna element, is connected to the common terminal via the first inductance element that is connected to the terminal closer to the antenna element and the common terminal, and the terminal closer to the antenna element is connected to the parallel resonator; and
in each of the plurality of elastic wave filters other than the one elastic wave filter, one of the input terminal and the output terminal of the elastic wave filter, which is a terminal closer of to the antenna element, is connected to the common terminal, and is connected to the series resonator.

US Pat. No. 10,171,112

RF MULTIPLEXER WITH INTEGRATED DIRECTIONAL COUPLERS

QUALCOMM Incorporated, S...

1. A circuit comprising:an RF diplexer including a first channel and a second channel, wherein the first channel includes a first primary inductor and the second channel includes a second primary inductor;
a first directional coupler for the first channel including a first transformer that includes the first primary inductor and a first secondary inductor, wherein a first terminal for the first secondary inductor is a coupled port for the first directional coupler and a second terminal for the first secondary inductor is an isolated port for the first directional coupler;
a second directional coupler for the second channel including a second transformer that includes the second primary inductor and a second secondary inductor, wherein a first terminal for the second secondary inductor is a coupled port for the second directional coupler and a second terminal for the second secondary inductor is an isolated port for the second directional coupler;
an input port for the first channel coupled to a first terminal for the first primary inductor;
a first capacitor coupled between a second terminal for the first primary inductor and the second terminal for the first secondary inductor;
a second capacitor coupled between the input port for the first channel and ground;
a third capacitor coupled in parallel with the first primary inductor;
a first antenna;
a first inductor coupled between the second terminal of the first secondary inductor and the first antenna; and
a fourth capacitor coupled between the second terminal of the first secondary inductor and ground.

US Pat. No. 10,171,111

GENERATING ADDITIONAL SLICES BASED ON DATA ACCESS FREQUENCY

INTERNATIONAL BUSINESS MA...

1. A method for execution by a computing device of a dispersed storage network (DSN), the method comprises:determining whether a frequency of access via the DSN from one or more other computing devices to a set of encoded data slices that is stored in a set of storage units of the DSN exceeds a frequently accessed threshold, wherein a data segment of a data object is dispersed storage error encoded in accordance with first dispersed error encoding parameters including a first encoding matrix to produce the set of encoded data slices that is stored in the set of storage units of the DSN, wherein the set of encoded data slices includes a pillar width number and a decode threshold number, wherein the pillar width number corresponds to number of encoded data slices in the set of encoded data slices, and wherein the decode threshold number corresponds to a number of encoded data slices of the set of encoded data slices to retrieve a corresponding data segment of the data object;
when the frequency of access via the DSN from the one or more other computing devices to the set of encoded data slices that is stored in the set of storage units of the DSN exceeds the frequently accessed threshold, determining an access amount indicative of a degree in which the frequency of access exceeds the frequently accessed threshold;
generating a number of additional encoded data slices for the set of encoded data slices based on the access amount in accordance with second dispersed error encoding parameters including a second encoding matrix that includes at least one of more rows or more columns than the first encoding matrix;
storing the number of additional encoded data slices in a number of additional storage units within the DSN, wherein the set of storage units and the number of additional storage units produce an expanded set of storage units within the DSN that includes more storage units than the set of storage units; and
sending, via the DSN from at least one of the computing device or the one or more other computing devices, a plurality of data access requests for the set of encoded data slices to different respective subsets of the expanded set of storage units in a distributed manner to load balance the plurality of data access requests for the set of encoded data slices among the expanded set of storage units within the DSN, wherein, over time, each storage unit of the expanded set of storage units within the DSN receives approximately an equal number of the plurality of data access requests and less than all of the plurality of data access requests.

US Pat. No. 10,171,110

SEQUENTIAL POWER TRANSITIONING OF MULTIPLE DATA DECODERS

Seagate Technology LLC, ...

1. An apparatus comprising:a non-volatile memory (NVM) configured to store data in the form of code words, each code word comprising a user data payload and associated code bits;
a plurality of data decoder circuits each configured to use the code bits to detect and correct bit errors in the code words during a read operation; and
a power transition circuit configured to transition each of the data decoder circuits from a first power mode to a different, second power mode in accordance with a time varying profile in which each data decoder circuit is transitioned at a different time and at a conclusion of a predetermined time interval.

US Pat. No. 10,171,109

FAST ENCODING METHOD AND DEVICE FOR REED-SOLOMON CODES WITH A SMALL NUMBER OF REDUNDANCIES

Hefei High-Dimensional Da...

1. A fast encoding method for Reed-Solomon codes with a small number of redundancies, the method comprising:a step of setting parity-check matrices comprising:
presetting parity-check matrices H2 and H3; wherein the number of redundant symbols s in the Reed-Solomon codes is 2 or 3, and when s is 3, the preset parity-check matrix is:

when s is 2, the preset parity-check matrix is:

a step of constructing shortened Reed-Solomon codes comprising:
constructing (k, s) Reed-Solomon codes over a finite field GF(2m) that conform to the preset parity-check matrix; using k points {oi}i=1k in R-points input {oi}i=0R?1 as message symbols, and setting the remaining points to zero; setting the remaining points of the R points to zero, that is, o0=0 and ok+1=. . . =oR?1=0;
wherein m denotes the number of binary bits for each symbol, R=2r, r=? log2(k+1)?, k denotes the number of message symbols, s denotes the number of redundant symbols, i=0,1 , . . . , R?1, and oi denotes the message symbol;
a step of encoding comprising:
calculating s redundant symbols according to the R-points input and the base vector of the finite field, to achieve the encoding of Reed-Solomon codes with a small number of redundancies.

US Pat. No. 10,171,108

PARALLEL CRC CALCULATION FOR MULTIPLE PACKETS WITHOUT REQUIRING A SHIFTER

ALTERA CORPORATION, San ...

1. A programmable integrated circuit device for parallel calculation of cyclic redundancy check (“CRC”) values for a plurality of packets received in a clock cycle, the programmable integrated circuit device comprising:a padding bit-replacement block configured to:
receive a stream comprising the plurality of packets, wherein the plurality of packets have N packets;
generate N copies of the stream, wherein each copy of the stream is associated with a respective packet of the plurality of packets; and
for each respective copy of the N copies of the stream, replace with padding bits all packets but the respective packet associated with the respective copy to create a respective padded copy of a plurality of padded copies;
a CRC calculation block configured to:
receive the plurality of padded copies; and
calculate a packet CRC value for each packet of the plurality of packets to form a plurality of packet CRC values by calculating a respective CRC value for each respective padded copy of the plurality of padded copies; and
a matrix reverse block configured to iteratively merge each padded copy of the plurality of padded copies by removing the padding bits from each padded copy of the plurality of padded copies to produce a reformed stream.

US Pat. No. 10,171,107

GROUPS OF PHASE INVARIANT CODEWORDS

Hewlett-Packard Developme...

1. A system comprising:a lookup table (LUT) to store in a non-transitory computer readable medium (CRM) associations between phase invariant codewords and bit strings in which each phase invariant codeword belongs to a group of codewords having a particular property, wherein the particular property is a range of values defining a number of active bits in the phase invariant codeword, each bit string having a first length; and
an encoder which upon execution instructs at least one processor coupled to the CRM to:
read a message comprising a bit string of a second length longer than the first length;
divide the message into a plurality of substrings from the LUT such that each substring is of the first length; and
encode in a halftone image, on a data bearing medium, a composite codeword comprising each phase invariant codeword associated in the LUT with a substring from the message;
wherein less storage in the CRM is needed for messages of a given bit size than encoding schemes implemented in the CRM with a simple table including all non-composite phase invariant codewords packed in order.

US Pat. No. 10,171,106

SYSTEMS AND METHODS FOR MULTI-STAGE DATA SERIALIZATION IN A MEMORY SYSTEM

Micron Technology, Inc., ...

1. A memory system, comprising:a memory device configured to provide a set of data in parallel;
a memory controller configured to coordinate data transmission of a memory device;
multi-stage serializer circuitry configured to receive the set of data in parallel and provide, to the memory controller, the data serially as a serialized data burst;
wherein the multi-stage serializer circuit comprises a set of two or more double data rate (DDR) shift registers; and
wherein each of the two or more DDR shift registers comprises at least two single data rate (SDR) shift registers, wherein each of the at least two SDR shift registers comprises a series of data flip flops configured to load an error data control (EDC) hold pattern in parallel.

US Pat. No. 10,171,105

CARRY-LESS POPULATION COUNT

INTERNATIONAL BUSINESS MA...

1. A population count circuit that determines a population count of an n-bit input bit-string, wherein:the population count circuit is configured to output the population count, wherein the population count is a number of 1s in the n-bit input bit-string; and
the population count circuit comprises:
a carryless counter circuit configured to determine a pair of 3-bit counts of 1 s, one for each 4-bit nibble from a pair of 4-bit nibbles from an n-bit input bit-string input to the population count circuit; and
an adder circuit configured to determine the population count by summing the pair of 3-bit counts of 1s from the carryless counter circuit corresponding to each 4-bit nibble, the adder circuit comprising a plurality of adders that perform the summing without propagating a carry bit that results from a most significant bit (MSB) of a sum of the pair of 3-bit counts of 1s being added, the plurality of adders setup as a sequential tree to propagate the 3-bit counts, where the tree comprises log2(n/4) levels, and wherein:
at level k of the tree, k being 2 to log 2(n/4), the 3-bit counts from a level k?1 of the tree in consecutive pairs are used by a first adder to determine the MSB of the sum based on the MSBs of the 3-bit counts only, without depending on carry propagation;
at level k of the tree, results from the level k?1 of the tree are added by a second adder for sum bits other than the MSB; and
result of additions at level log 2(n/4) of the tree is output as the population count of the n-bit input bit-string.

US Pat. No. 10,171,104

ENCODING VARIABLE LENGTH INTEGERS FOR GRAPH COMPRESSION

INTERNATIONAL BUSINESS MA...

1. A graph compression system comprising:a memory unit configured to store graph data; and
an electronic hardware controller in signal communication with the memory unit, the electronic hardware controller configured to determine a distribution of a set of vertices in a graph, and to encode each vertex included in the set of vertices as a variable length integer (VLI) that includes a variable number of bytes,
wherein the variable number of bytes of each vertex is based on the determined distribution, and
wherein the memory unit stores each encoded vertex.

US Pat. No. 10,171,101

MODULATORS

Cirrus Logic, Inc., Aust...

1. An analogue to digital converter comprising:a time-encoding modulator comprising:
a first controlled oscillator configured to receive a first oscillator driving signal and output a first oscillation signal;
an accumulator configured to provide an accumulator value based on a number of pulses of the first oscillation signal; and
a hysteretic comparator configured to output either a first output state or a second output state and to alternate between said first and second output states based on a hysteretic comparison of said accumulator value with a defined reference;
wherein the first oscillator driving signal is based on a combination of an input signal and a feedback signal derived from an output of the hysteretic comparator; and
at least one further controlled oscillator and a counter, wherein the at least one further controlled oscillator is driven by the output state of the hysteretic comparator and the counter is configured to generate a count value based on the number of pulses in an output of the at least one further controlled oscillator in a frame period defined a received clock signal.

US Pat. No. 10,171,099

TIME-BASED DELAY LINE ANALOG TO DIGITAL CONVERTER

MICROCHIP TECHNOLOGY INCO...

1. A differential digital delay line analog-to-digital converter (ADC), comprising:a plurality of differential digital delay lines;
a first circuit comprising a set of delay elements included in the differential digital delay lines; and
a second circuit comprising another set of delay elements included in the differential digital delay lines; wherein:
the first circuit is configured to generate data representing an analog to digital conversion of an input; and
the second circuit is configured to calibrate a source to the differential digital delay lines based on an out of input range determination.

US Pat. No. 10,171,098

ANALOG-TO-DIGITAL CONVERTER (ADC) WITH IMPROVED POWER DISTURBANCE REDUCTION

SK Hynix Inc., Gyeonggi-...

1. An analog-to-digital converter (ADC) for converting an input analog voltage to an output digital code, the ADC comprising:a first node of the input analog voltage;
nodes of a plurality of reference voltages;
a plurality of comparators, inputs of each comparator being coupled to the first node and a node of a corresponding reference voltage among the plurality of reference voltages;
a logic circuit block adapted to receive outputs of the plurality of comparators and generating the output digital code; and
a voltage stabilizer, terminals of the voltage stabilizer being coupled with the first node and a node of a first reference voltage among the plurality of reference voltages,
wherein the voltage stabilizer is configured to reduce a phase difference between a first disturb on the input analog voltage of the first node and a second disturb on the node of the first reference voltage.

US Pat. No. 10,171,096

PIPELINED SAR WITH TDC CONVERTER

Taiwan Semiconductor Manu...

12. An analog-to-digital converter (ADC), comprising:a voltage-based signal processing element configured to receive an input signal and to generate a first digital signal and a residue voltage;
a residue offset circuit configured to provide a residue offset voltage to the residue voltage;
a voltage-to-time conversion element configured to use the residue voltage and the residue offset voltage to generate a time domain representation of the residue voltage; and
a time-based signal processing element configured to convert the time domain representation to a second digital signal.

US Pat. No. 10,171,095

ATOMIC OSCILLATOR, ELECTRONIC APPARATUS, MOVING OBJECT, AND MANUFACTURING METHOD OF ATOMIC OSCILLATOR

Seiko Epson Corporation, ...

1. An atomic oscillator comprising:a cell which encapsulates metal atoms therein;
a light source which generates light for irradiation of the cell; and
a frequency modulation signal generator configured to generate a frequency modulation signal for causing the light source to generate the light, the light being frequency-modulated and including a resonance light pair, the resonance light pair causing an electromagnetically induced transparency phenomenon in the metal atoms,
wherein modulation indexes of the frequency modulation signal include a first modulation index, and
a first-order differential value of oscillation frequency deviation of the atomic oscillator is zero at the first modulation index.

US Pat. No. 10,171,094

HIGH ACCURACY CLOCK SYNCHRONIZATION CIRCUIT

SEIKO EPSON CORPORATION, ...

1. A circuit device comprising:a comparator that performs a comparison between an input signal based on an oscillation signal and a reference signal, the comparator including a counter that performs a count operation by using the input signal, and performs the comparison by comparing a count value in the counter in n (where n is an integer of 2 or more) cycles of the reference signal with an expected value of the count value in integers;
a processor that performs a signal process on frequency control data based on a result of the comparison; and
an oscillation signal generation circuit that generates the oscillation signal having an oscillation frequency which is set on the basis of the frequency control data having undergone the signal process.

US Pat. No. 10,171,093

SLEW RATE LOCKED LOOP

2. A slew rate locked loop circuit for controlling and maintaining a constant slew rate at an output of a buffer, wherein said buffer receives (i) a first input signal and (ii) at least one of a control voltage, said slew rate locked loop circuit comprising:a slew rate determining unit that comprises:
a first reference voltage generator that generates (i) an upper threshold voltage (Vh) and (ii) a lower threshold voltage (Vl);
a first comparator that compares said upper threshold voltage (Vh) with said output of said buffer to obtain a first output digital signal;
a second comparator, that compares said lower threshold voltage (Vl) with said output of said buffer to obtain a second output digital signal; and
a phase detector that determines a phase difference between said first output digital signal and said second output digital signal, wherein said phase difference is directly proportional to said slew rate at said output of said buffer;
a loop filter that produces a DC voltage from an output of said phase detector;
a second reference voltage generator that generates a reference voltage; and
an amplifier that (a) receives said DC voltage from said loop filter and said reference voltage generated by said second reference voltage generator, and (b) amplifies the difference between (i) said DC voltage from said loop filter and (ii) said reference voltage to obtain a control voltage, wherein said control voltage is fed back to said buffer, wherein said slew rate at said output of said buffer is determined using said control voltage.

US Pat. No. 10,171,091

PHASE INTERPOLATOR FOR INTERPOLATING PHASE OF DELAY CLOCK SIGNAL AND DEVICE INCLUDING THE SAME AND FOR PERFORMING DATA SAMPLING BY USING PHASE INTERPOLATED CLOCK SIGNAL

SAMSUNG ELECTRONICS CO., ...

1. A phase interpolator comprising:a control circuit configured to generate a selection control signal that corresponds to a selected coarse phase interval, and generate a weight setting signal for generating a phase interpolation clock signal with an interpolated phase within the coarse phase interval;
a phase selector configured to receive a plurality of inversion delay clock signal pairs, select at least two inversion delay clock signal pairs from the plurality of inversion delay clock signal pairs based on the selection control signal, select and output a selection delay clock signal pair corresponding to the coarse phase interval from the selected at least two inversion delay clock signal pairs; and
a phase mixer configured to receive the selection delay clock signal pair from the phase selector and generate the phase interpolation clock signal based on the weight setting signal.

US Pat. No. 10,171,090

OSCILLATOR, ELECTRONIC APPARATUS, AND MOVING OBJECT

SEIKO EPSON CORPORATION, ...

1. An oscillator comprising:a vibrator element;
a container in which the vibrator element is housed;
a base substrate on which the container is mounted via one or more supporting bodies;
at least one of a heating element and a cooling body configured to control temperature on an inside of the container;
an oscillation circuit electrically connected to the vibrator element;
a D/A conversion circuit configured to control a frequency output by the oscillation circuit;
a first reference-voltage generation circuit configured to supply voltage to the D/A conversion circuit; and
a second reference-voltage generation circuit configured to generate, on the basis of a power supply voltage supplied from outside of the oscillator, a power supply voltage of the oscillation circuit, wherein
temperature of the first reference-voltage generation circuit is controlled by the at least one of the heating element and the cooling body, and
the container is elevated and separated from the base substrate by being supported by the one or more supporting bodies.

US Pat. No. 10,171,089

PVT-FREE CALIBRATION FUNCTION USING A DOUBLER CIRCUIT FOR TDC RESOLUTION IN ADPLL APPLICATIONS

Taiwan Semiconductor Manu...

1. A circuit, comprising:a time-to-digital converter (TDC) configured to generate a phase variation signal indicative of a phase difference between a first signal and a reference signal; and
a doubler electrically coupled to the TDC, wherein the doubler is configured to receive a first voltage signal and generate a second voltage signal, wherein the second voltage signal is provided to a voltage input of the TDC, and wherein the TDC generates one or more control signals configured to adjust the second voltage signal, wherein the doubler comprises:
a first ring oscillator;
a first flip-flop electrically coupled to the first ring oscillator; and
a first clock generator electrically coupled to an output of the first flip-flop.

US Pat. No. 10,171,088

QUANTUM CIRCUIT FOR SHIFTING PHASE OF TARGET QUBIT BASED ON CONTROL QUBIT

ELECTRONICS AND TELECOMMU...

1. A quantum circuit that shifts a phase of a target qubit by ?/2n?1 based on a control qubit, the quantum circuit comprising:a first auxiliary circuit configured to convert a first qubit state according to an entanglement of the control qubit, the target qubit, and an ancillary qubit having a |0> state to a second qubit state;
a rotation gate configured to shift a phase for at least one basis state of the second qubit state by ?/2n?1 to convert the second qubit state to a third qubit state; and
a second auxiliary circuit configured to convert the third qubit state to a fourth qubit state so as to shift the phase of the target qubit by ?/2n?1,
wherein the first auxiliary circuit determines a |111> basis state of the second qubit state based on a |110> basis state of the first qubit state, and the second auxiliary circuit determines a |110> basis state of the fourth qubit state based on a |111> basis state of the third qubit state.

US Pat. No. 10,171,087

LARGE FAN-IN RQL GATES

Northrop Grumman Systems ...

1. A reciprocal quantum logic (RQL) gate circuit comprising:an input stage having more than two logical inputs each configured to be asserted based on receiving a positive single flux quantum (SFQ) pulse, the input stage comprising, for each logical input, at least one storage loop associated with the logical input, each storage loop comprising at least one input Josephson junction (JJ), at least one inductor, and a logical decision JJ, the logical decision JJ being common to all the storage loops associated with the logical inputs; and
an output stage configured to assert an output based on a triggering of the logical decision JJ in response to a combination of logical inputs.

US Pat. No. 10,171,086

SUPERCONDUCTING THREE-TERMINAL DEVICE AND LOGIC GATES

Massachusetts Institute o...

1. A three-terminal device comprising:a main channel connecting a first terminal and a second terminal;
a gate channel connecting a control terminal to the main channel; and
a low-resistance constriction formed in the gate channel between the control terminal and the main channel, wherein the constriction is configured to increase a gate current density proximal to the main channel and the constriction is located within approximately 200 nm of an edge of the main channel.

US Pat. No. 10,171,084

SPARSE CODING WITH MEMRISTOR NETWORKS

The Regents of The Univer...

1. A system for sparse coding with an array of resistive memory devices, comprising:an array of resistive memory devices arranged in columns and rows to form a matrix, wherein each column represents a potential feature of an input;
an interface circuit electrically coupled to the matrix, wherein the interface circuit cooperatively operates with the array of resistive memory devices to perform computing in the array of resistive memory devices, wherein the interface circuit controls a computation of:
(a) a first dot product operation by feeding an input vector forward through the matrix to yield an output vector, where the input vector is a column vector with each element representing intensity of a pixel in an image and the output vector is row vector with each element representing the dot product between the input vector and a feature vector stored in a corresponding column of the matrix;
(b) a second dot product operation by feeding a neuron activity vector backward through the matrix to yield an intermediate result vector, where the neuron activity vector is a row vector representing a level of activity from all of the neurons in the matrix and the intermediate result vector is a column vector;
(c) a new input vector by subtracting the intermediate result vector from the input vector; and
(d) a third dot product operation by feeding the new input vector forward through the matrix to yield a new output vector, where the output vector is a row vector with each element representing the dot product between the input vector and the feature vector stored in the corresponding column of the matrix.

US Pat. No. 10,171,083

MEMRISTOR LOGIC DESIGN USING DRIVER CIRCUITRY

Board of Regents, The Uni...

1. A logic gate, comprising:a first memristor and a second memristor connected in series;
a switch, wherein a node of said second memristor is connected to said switch;
a third memristor connected to said switch in series;
a first voltage source connected to said first memristor via a first resistor;
a second voltage source connected in series to said switch and third memristor;
a second resistor connected to said second memristor and ground; and
a third resistor connected to said third memristor and said ground.

US Pat. No. 10,171,082

DRIVING CIRCUIT

FUJI ELECTRIC CO., LTD., ...

1. A driving circuit which drives a subsequent stage circuit depending on a set signal and a reset signal that are inputted, comprising:a set side level shift circuit which operates depending on the set signal, and generates a set potential,
a reset side level shift circuit which operates depending on the reset signal, and generates a reset potential, and
a control circuit which generates a control signal depending on the set potential and the reset potential, and drives the subsequent stage circuit, wherein
each of the set side level shift circuit and the reset side level shift circuit has
an input transistor which is provided between a high potential and a reference potential, operates depending on the set signal or the reset signal, and outputs a drain potential as the set potential or the reset potential, and
a serial transistor unit which includes a first MOS transistor and a second MOS transistor which are connected in series between a drain terminal of the input transistor and the high potential,
the first MOS transistors in the set side level shift circuit and the reset side level shift circuit complementarily operate to each other corresponding to a logical value of the control signal which the control circuit outputs,
the set side level shift circuit further has a set side buffer which compares a level of the set potential with a threshold value of the set side buffer depending on the high potential, and controls the second MOS transistor of the reset side level shift circuit based on a result of the comparison of the level of the set potential with the threshold value of the set side buffer,
the reset side level shift circuit further has a reset side buffer which compares a level of the reset potential with a threshold value of the reset side buffer depending on the high potential, and controls the second MOS transistor of the set side level shift circuit based on a result of the comparison of the level of the reset potential with the threshold value of the reset side buffer.

US Pat. No. 10,171,081

ON-CHIP SUPPLY NOISE VOLTAGE REDUCTION OR MITIGATION USING LOCAL DETECTION LOOPS IN A PROCESSOR CORE

INTERNATIONAL BUSINESS MA...

1. A device, comprising:a first voltage noise sensor located at a first unit of a processor core, wherein the first voltage noise sensor detects a first voltage droop at the first unit, and wherein the processor core is divided into the first unit and a second unit;
a global noise manager component located in the processor core and associated with a global control loop of the processor core, and that receives, from the first voltage noise sensor, an indication of the first voltage droop; and
a first local noise manager component located in the first unit and associated with a first local control loop of the first unit, where the first local noise manager component is distinct from the global noise manager component and:
receives, from the first voltage noise sensor, the indication of the first voltage droop; and
implements a first noise mitigation procedure at the first unit.

US Pat. No. 10,171,080

VOLTAGE LEVEL SHIFTER (VLS) CIRCUITS EMPLOYING A PRE-CONDITIONING CIRCUIT FOR PRE-CONDITIONING AN INPUT SIGNAL TO BE VOLTAGE LEVEL SHIFTED IN RESPONSE TO A PRE-CHARGE PHASE

QUALCOMM Incorporated, S...

1. A voltage level shifter (VLS) circuit, comprising:a pre-conditioning circuit configured to:
receive an input signal in a first voltage domain; and
generate a pre-conditioned input signal on an input node in the first voltage domain at a voltage level on an input node indicating a charge logic state, in response to a pre-condition control signal having a voltage level of the charge logic state indicating a pre-charge phase;
a pre-charge circuit coupled to an output node and a first supply rail of a supply voltage relative to a second supply rail in a second voltage domain higher than the first voltage domain, the pre-charge circuit configured to couple the first supply rail to the output node in response to a pre-charge control signal indicating the pre-charge phase;
a pull-up circuit coupled to the first supply rail and the output node, the pull-up circuit configured to couple the first supply rail to the output node in response to the pre-conditioned input signal having a voltage level of the charge logic state; and
a pull-down circuit coupled to the input node and the second supply rail, the pull-down circuit configured to:
decouple the second supply rail from the output node in response to the pre-condition control signal indicating the pre-charge phase; and
couple the second supply rail to the output node in response to the pre-conditioned input signal having a voltage level of a discharge logic state in response to the pre-condition control signal having the voltage level of the discharge logic state indicating an evaluation phase.

US Pat. No. 10,171,079

METHODS AND APPARATUSES FOR DYNAMIC STEP SIZE FOR IMPEDANCE CALIBRATION OF A SEMICONDUCTOR DEVICE

Micron Technology, Inc., ...

1. An apparatus comprising:a resistor; and
a chip comprising a driver impedance calibration circuit configured to determine an impedance of a driver based on an impedance of the resistor, wherein, during a calibration operation, the driver impedance calibration circuit is configured to adjust an impedance code that controls an impedance of the driver and to provide a next impedance code based on a comparison of a driver output voltage with a reference voltage, wherein an adjustment step size of the impedance code is determined based on a value of the impedance code, wherein the driver impedance calibration circuit comprises an adder/subtractor circuit configured to adjust the impedance code based on a comparison of a driver output voltage with a reference voltage and wherein the adder/subtractor circuit is configured to adjust the impedance code by a value equal to a value of a subset of most significant bits of the impedance code.

US Pat. No. 10,171,078

NONVOLATILE MEMORY DEVICES WITH ON DIE TERMINATION CIRCUITS AND CONTROL METHODS THEREOF

Samsung Electronics Co., ...

1. A method of operating a nonvolatile memory device, comprising:receiving a write command via data input/output terminals in synchronization with a write enable signal while a command latch enable signal (CLE) is enabled;
receiving an address via the data input/output terminals in synchronization with the write enable signal while an address latch enable signal (ALE) is enabled, wherein after the receiving the write command and the address, the CLE and the ALE are disabled;
after the CLE and the ALE are disabled, activating an on-die termination mode of the data input/output terminals in response to an initial falling edge of a data strobe signal and before a rising edge of the data strobe signal, the rising edge of the data strobe signal following the initial falling edge of the data strobe signal;
receiving write data in synchronization with the data strobe signal; and
deactivating the on-die termination mode of the data input/output terminals in response to a transition of at least one of a chip enable signal, the ALE, and the CLE;
wherein the activating the on-die termination mode of the data input/output terminals includes activating a pseudo differential signaling mode of the data input/output terminals and activating a differential signaling mode of the data strobe signal.

US Pat. No. 10,171,077

SCALABLE QUBIT DRIVE AND READOUT

INTERNATIONAL BUSINESS MA...

1. A system for qubit drive and readout, the system comprising:a lossless microwave signal distributor connected to a quantum system, wherein a first input line is connectable to the lossless microwave signal distributor;
a lossless microwave switch connected to the quantum system, wherein a second input line is connectable to the lossless microwave switch, wherein the second input line is configured to drive the quantum system via the lossless microwave switch and the first input line is configured to read out the quantum system via the lossless microwave signal distributor;
a first circulator configured to connect the first input to the lossless microwave signal distributor and configured to connect a quantum-limited amplifier to the lossless microwave signal distributor.

US Pat. No. 10,171,073

REGULATING TRANSITION SLOPE USING DIFFERENTIAL OUTPUT

SEMICONDUCTOR COMPONENTS ...

1. A circuit for producing a differential output signal pair, the circuit comprising:a first driver for a first output signal in the differential output signal pair;
a second driver for a second output signal in the differential output signal pair;
one or more monitor modules coupled to the first and second drivers to measure slope times of the first and second drivers during each transition;
a comparator coupled to the one or more monitor modules to compare the slope times of the first and second drivers;
one or more regulators coupled to the comparator and at least one of the first and second drivers to regulate at least one slope time of the first or second driver, based on output of the comparator, to provide the first and second output signals in the differential output signal pair with a constant average.

US Pat. No. 10,171,071

DEVICE AND METHOD FOR PRODUCING A DYNAMIC REFERENCE SIGNAL FOR A DRIVER CIRCUIT FOR A SEMICONDUCTOR POWER SWITCH

Power Integrations, Inc.,...

1. A device for producing a dynamic reference signal for a control circuit for a power semiconductor switch, wherein the device comprises:a reference signal generator for providing a dynamic reference signal having a steady-state signal level after a predetermined time has elapsed after a switchover process of the power semiconductor switch;
a passive charging circuit, which is configured to increase a signal level of the dynamic reference signal in reaction to a switchover of a control signal of the power semiconductor switch from an OFF state into an ON state for at least one part of the predetermined time above the steady-state signal level, in order to produce the dynamic reference signal; and
an output for tapping off the dynamic reference signal.

US Pat. No. 10,171,070

SIGNAL TRANSMISSION CIRCUIT AND POWER CONVERSION DEVICE

Mitsubishi Electric Corpo...

1. A signal transmission circuit comprising:a first circuit to output first and second transmission signals on the basis of an external input signal;
first and second transformers to receive said first and second transmission signals on a primary side and obtain first and second transformer output signals on a secondary side; and
a second circuit to generate an external output signal on the basis of said first and second transformer output signals,
wherein said external input signal has first and second logic levels, changes from the second logic level to the first logic level at a first transition time, and changes from the first logic level to the second logic level at a second transition time,
said first circuit outputs said first and second transmission signals such that said first transmission signal changes between the first and second logic levels in a first period when said external input signal is at the first logic level, is fixed to the second logic level when said external input signal is at the second logic level, and is set at the first logic level for a predetermined period at said first transition time of said external input signal, and
such that said second transmission signal changes between the first and second logic levels in a second period when said external input signal is at the second logic level, is fixed to the second logic level when said external input signal is at the first logic level, and is set at the first logic level for a predetermined period at said second transition time of said external input signal, and
said second circuit includes
first and second control protectors to invalidate said first and second transformer output signals for first and second mask periods on the basis of the first or second logic level of said external output signal,
a first signal shaping circuit to receive said first transformer output signal via said first control protector and generate a first logic setting signal indicating an active level for a first logic setting period exceeding a period for which said first transformer output signal indicates an active level,
a second signal shaping circuit to receive said second transformer output signal via said second control protector and generate a second logic setting signal indicating an active level for a second logic setting period exceeding a period for which said second transformer output signal indicates an active level,
a logic setting signal control circuit to receive said first and second logic setting signals and invalidate indication of an active level by said first and second logic setting signals when both said first and second logic setting signals indicate an active level, and
an output signal generation circuit to receive said first and second logic setting signals via said logic setting signal control circuit and generate said external output signal that is set at one logic level of first and second logic levels when said first logic setting signal indicates an active level, and set at the other logic level when said second logic setting signal indicates an active level.

US Pat. No. 10,171,069

SWITCH CONTROLLER FOR ADAPTIVE REVERSE CONDUCTION CONTROL IN SWITCH DEVICES

GENERAL ELECTRIC COMPANY,...

1. A switch controller configured to control a voltage-controlled power switch device, comprising:an output stage coupled to a control terminal of the voltage-controlled power switch device, wherein the output stage is configured to receive a driving signal and provide a driving voltage to the control terminal of the voltage-controlled power switch device;
a voltage sensor configured to provide a measurement of a voltage across the power switch device; and
a digital processing unit configured to receive a switching command and the measurement of the voltage, and to provide the driving signal to the output stage, wherein the digital processing unit is configured to:
compare the measurement with a limit voltage;
cause, using the driving signal, the output stage to provide a first voltage as the driving voltage when the digital processing unit receives the switching command and the measurement is above the limit voltage; and
cause, using the driving signal, the output stage to provide a second voltage as the driving voltage when the digital processing unit receives the switching command and the measurement is below the limit voltage.

US Pat. No. 10,171,068

INPUT INTERFACE CIRCUIT

MSTAR SEMICONDUCTOR, INC....

1. An input interface circuit, comprising:a power line, supplying a default operating voltage;
a ground line, supplying a ground voltage;
an input pad, receiving a pad voltage;
a clamping circuit, coupled between the input pad and a first node, the clamping circuit causing a voltage at the first node to be maintained at the default operating voltage when the pad voltage is higher than the default operating voltage;
a first inverter, having an input end and an output end, the input end coupled to the first node and the output end coupled to a second node;
a high-voltage buffering circuit, having a first input end, a second input end and an output end, the first input end coupled to the input pad, the second input end coupled to the second node, and the output end coupled to a third node, wherein a voltage at the third node is adjusted along with the pad voltage and a voltage at the second node, and the voltage at the third node has a same voltage change trend as the pad voltage;
a second inverter, having an input end and an output end, the input end coupled to the third node and the output end coupled to a fourth node;
a voltage recovery circuit, connected between the power line and the ground line, having an input end and an output end, the input end coupled to the fourth node and the output end coupled to the third node, the third node is selectively coupled to one of the power line and the ground line according to a voltage at the fourth node; and
a third inverter, having an input end thereof coupled to the fourth node and an output end thereof providing a converted voltage.

US Pat. No. 10,171,067

WAVEFORM SHAPING FILTER, INTEGRATED CIRCUIT, RADIATION DETECTION DEVICE, METHOD FOR ADJUSTING TIME CONSTANT OF WAVEFORM SHAPING FILTER, AND METHOD FOR ADJUSTING GAIN OF WAVEFORM SHAPING FILTER

KABUSHIKI KAISHA TOSHIBA,...

1. A waveform shaping filter comprising:a filter stage comprising:
a differentiation signal generation circuit which generates a differentiation signal by amplifying a signal obtained by differentiating an input signal,
a proportional signal generation circuit which generates a proportional signal by amplifying the input signal, and
an adder circuit which outputs an output signal obtained by adding the proportional signal and the differentiation signal; and
a control circuit connected to the filter stage, the control circuit comparing the output signal and a first value so as to detect an overshoot or an undershoot of the output signal, and controlling a time constant of the filter stage, based on whether the overshoot or the undershoot of the output signal has been detected.

US Pat. No. 10,171,066

COMPACT HIGH VOLTAGE RF GENERATOR USING A SELF-RESONANT INDUCTOR

SMITHS DETECTION-WATFORD ...

1. An RF circuit for providing a radio frequency signal, the circuit comprising:a dual inductor including one winding including an input and an output, and another winding including an input and an output;
wherein the one winding and the another winding are arranged to provide, between the one winding and the another winding, a parasitic capacitance selected to determine the frequency of the radio frequency signal; and
wherein the outputs of the windings are configured to electrically couple to a capacitive load.

US Pat. No. 10,171,065

PVT STABLE VOLTAGE REGULATOR

International Business Ma...

1. An apparatus comprising:a voltage regulation module configured to provide an output voltage signal (Vout);
an auto-calibration module configured to provide a calibration current signal (Isink) corresponding to a voltage difference between a target voltage signal (Vtarget) and the output voltage signal (Vout), wherein the output voltage signal (Vout) is substantially equal to the target voltage signal (Vtarget); and
the voltage regulation module configured to adjust the output voltage in response to changes in the calibration current signal.

US Pat. No. 10,171,064

ELASTIC WAVE DEVICE AND ELASTIC WAVE MODULE

MURATA MANUFACTURING CO.,...

1. An elastic wave device comprising:a first piezoelectric substrate including a first principal surface and a second principal surface;
a second piezoelectric substrate including a first principal surface and a second principal surface, a thickness of the second piezoelectric substrate being greater than a thickness of the first piezoelectric substrate;
a plurality of first interdigital transducer (IDT) electrodes and a plurality of second IDT electrodes, the plurality of first IDT electrodes being located on the first principal surface of the first piezoelectric substrate, and the plurality of second IDT electrodes being located on the first principal surface of the second piezoelectric substrate; and
a plurality of external connection terminals located on the second principal surface of the first piezoelectric substrate; wherein
a first elastic wave filter including the plurality of first IDT electrodes is located on the first principal surface of the first piezoelectric substrate;
a second elastic wave filter including the plurality of second IDT electrodes is located on the first principal surface of the second piezoelectric substrate;
at least one of the plurality of external connection terminals is a ground terminal;
the first piezoelectric substrate and the second piezoelectric substrate are joined with a support member located therebetween, with the first principal surface of the first piezoelectric substrate and the first principal surface of the second piezoelectric substrate facing each other;
the support member surrounds a region where the first elastic wave filter and the second elastic wave filter are located, in a planar view;
out-of-band attenuation of the first elastic wave filter is greater than out-of-band attenuation of the second elastic wave filter; and
a maximum value of out-of-band attenuation in a frequency band in a range between about 0.85 times and about 1.15 times a center frequency of a passband of the first elastic wave filter, both inclusive, is greater than any out-of-band attenuation in a frequency band in a range between about 0.85 times and about 1.15 times a center frequency of a passband of the second elastic wave filter, both inclusive.

US Pat. No. 10,171,062

VARIABLE-FREQUENCY FILTER

MURATA MANUFACTURING CO.,...

1. A variable-frequency filter allowing a pass band and an attenuation range to be adjusted, the filter comprising:a series-arm resonant circuit connected between a first input/output terminal and a second input/output terminal; and
a parallel-arm resonant circuit connected between a ground and a transmission line connecting one of the first input/output terminal and the second input/output terminal to the series-arm resonant circuit,
wherein each of the series-arm resonant circuit and the parallel-arm resonant circuit includes a piezoelectric resonator, an inductor connected to the piezoelectric resonator, and a variable capacitor connected to the piezoelectric resonator,
wherein the pass band or attenuation range is adjusted by using at least one of a sub-resonant point or a sub-anti-resonant point of the series-arm resonant circuit, or a sub-resonant point or a sub-anti-resonant point of the parallel-arm resonant circuit,
wherein the inductor of the parallel-arm resonant circuit is connected in parallel with the piezoelectric resonator of the parallel-arm resonant circuit, and generates sub-anti-resonance at a lower frequency than a resonant point of the parallel-arm resonant circuit, and
wherein the pass band is set by using the sub-anti-resonant point of the parallel-arm resonant circuit.

US Pat. No. 10,171,061

ELASTIC WAVE DEVICE

MURATA MANUFACTURING CO.,...

1. An elastic wave device comprising:a piezoelectric film;
a high acoustic velocity material in which an acoustic velocity of a bulk wave that propagates through the high acoustic velocity material is higher than that of an elastic wave that propagates through the piezoelectric film;
a low acoustic velocity film which is laminated on the high acoustic velocity material and in which an acoustic velocity of a bulk wave that propagates through the low acoustic velocity film is lower than that of the elastic wave that propagates through the piezoelectric film; and
an IDT electrode on one surface of the piezoelectric film; wherein
the piezoelectric film is laminated on the low acoustic velocity film;
the IDT electrode includes a first busbar, a second busbar that is spaced apart from the first busbar, a plurality of first electrode fingers with proximal ends electrically connected to the first busbar and distal ends extending towards the second busbar, and a plurality of second electrode fingers with proximal ends connected to the second busbar and distal ends extending towards the first busbar;
a direction that is perpendicular or substantially perpendicular to a direction in which the first electrode fingers and the second electrode fingers extend is a width direction, the first electrode fingers, or the second electrode fingers, or each of the first electrode fingers and the second electrode fingers, includes a wide width portion with a dimension in the width direction that is larger than a dimension at a center in a length direction of the first electrode fingers and the second electrode fingers and being provided closer to at least one of a side of the proximal end and a side of the distal end than a central region;
at least one of the first busbar and the second busbar includes a plurality of cavities that are distributed in a length direction of the first busbar or the second busbar; and
the first busbar, or the second busbar, or each of the first busbar and the second busbar, includes an inner busbar portion which is positioned closer to a side of the first electrode fingers or a side of the second electrode fingers than the cavities are and which extends in the length direction of the first busbar and the second busbar, a central busbar portion that includes the cavities, and an outer busbar portion that is positioned opposite to the inner busbar portion with the central busbar portion being interposed therebetween.

US Pat. No. 10,171,060

HIGH PASS FILTER

MURATA MANUFACTURING CO.,...

1. A high pass filter comprising:a first input and output terminal;
a second input and output terminal;
at least one ground terminal;
a signal path disposed between the first input and output terminal and the second input and output terminal;
a first LC series resonator including a first inductor, a first capacitor, a first end electrically connected to the signal path, and a second end electrically connected to the at least one ground terminal, the first inductor, and the first capacitor;
a second LC series resonator including a second inductor, a second capacitor, a third end electrically connected to the signal path, and a fourth end electrically connected to the at least one ground terminal, the second inductor, and the second capacitor;
a third capacitor; and
a multilayer body including a stack of a plurality of insulator layers in a stacking direction; wherein
one electrode of the third capacitor is connected between the first capacitor and the first inductor, and another electrode of the third capacitor is connected between the second capacitor and the second inductor;
the first LC series resonator includes at least one first conductor layer disposed on a corresponding one of the plurality of insulator layers;
the second LC series resonator includes at least one second conductor layer disposed on a corresponding one of the plurality of insulator layers;
the third capacitor includes a first capacitor conductor layer facing at least one of the at least one first conductor layer and the at least one second conductor layer, with a corresponding at least one of the plurality of insulator layers interposed therebetween;
the at least one first conductor layer includes at least one first inductor conductor layer wound in a predetermined direction when viewed in the stacking direction and a second capacitor conductor layer; and
the at least one second conductor layer includes at least one second inductor conductor layer wound in a direction opposite to the predetermined direction when viewed in the stacking direction and a third capacitor conductor layer.

US Pat. No. 10,171,059

COMPOSITE COMPONENT AND FRONT-END MODULE

MURATA MANUFACTURING CO.,...

1. A composite component adapted for being disposed on a mounting substrate, the composite component comprising:a transmitting filter;
a first substrate adapted for being disposed adjacent to the mounting substrate and electrically connected to the mounting substrate;
a second substrate disposed opposite to the first substrate;
a spacer member interposed between the first substrate and the second substrate to support the first substrate and the second substrate, the spacer member being configured to electrically connect the first substrate to the second substrate,
wherein the second substrate is adapted for being electrically connected to the mounting substrate through a second spacer member; and
the transmitting filter is disposed in an internal space and on a principal surface of the first substrate, the internal space being surrounded by the first substrate and the second substrate.

US Pat. No. 10,171,058

ELECTRONIC DEVICE WITH IN-POCKET AUDIO TRANSDUCER ADJUSTMENT AND CORRESPONDING METHODS

Motorola Mobility LLC, C...

1. A method in an electronic device, the method comprising:detecting, with one or more sensors of the electronic device, an enclosed condition;
determining, with one or more processors, an audio signal adjustment function for one or more audio transducers of the electronic device in response to the enclosed condition, wherein the one or more audio transducers comprise a plurality of microphones;
applying, with the one or more processors, the audio signal adjustment function to signals received from, or delivered to, the one or more audio transducers during the enclosed condition;
determining, with the one or more processors, which microphone of the plurality of microphones receives a least amount of enclosure noise; and
selecting, with the one or more processors, the microphone receiving the least amount of enclosure noise to capture audio input from an environment of the electronic device during the enclosed condition.

US Pat. No. 10,171,056

APPARATUS AND METHOD FOR IMPROVING NONLINEARITY OF POWER AMPLIFIER IN WIRELESS COMMUNICATION SYSTEM

Samsung Electronics Co., ...

1. A method for operating an apparatus comprising a transceiver and a power amplifier, in a wireless communication system, the method comprising:attenuating a power of a signal based on a gain compensation value corresponding to the power of the signal, if the power of the signal inputted to the transceiver coupled with the power amplifier is smaller than a reference value; and
transmitting the signal with the attenuated power to the power amplifier.