US Pat. No. 10,560,054

CIRCUIT SYSTEM

HUAWEI TECHNOLOGIES CO., ...

1. A circuit system, comprising an operational amplification circuit, whereinthe operational amplification circuit comprises:
N stages of operational amplification units that are cascaded, N being greater than or equal to 2, wherein each of the N stages comprises an input terminal and an output terminal and the N stages include a 1st stage, an Nth stage, and an ith stage, wherein
an input terminal of the 1st stage is an input terminal of the operational amplification circuit and is configured to receive an initial input signal,
an output terminal of the Nth stage is an output terminal of the operational amplification circuit, and
the output terminal of the ith stage is connected to the input terminal of the (i+1)th stage, so as to provide an input signal for the (i+1)th stage, wherein i is 1, 2, . . . , or N?1; and
a feedback channel from the output terminal of the Nth stage to the input terminal of each of the N stages of operational amplification units exists, wherein the feedback channel is configured to facilitate a transmission of an output signal of the Nth stage of operational amplification unit to the input terminal of each of the N stages; and, wherein
the operational amplification circuit is a dual-input and single-output operational amplification circuit for receiving a differential signal and driving a single-terminal load circuit;
the Nth stage comprises an operational amplifier, and
the Nth stage further comprises a phase inverter disposed on the feedback channel, the phase inverter and the operational amplifier in the Nth stage of operational amplification unit constituting a pseudo-differential structure.

US Pat. No. 10,560,046

MOTOR CONTROL DEVICE

JTEKT CORPORATION, Osaka...

1. A motor control device that controls an electric motor that has three-phase motor coils in two systems with a phase difference of 60 degrees, 180 degrees, or 300 degrees between the two systems via a first drive circuit that drives three-phase motor coils in a first system, which is one of the two systems, and a second drive circuit that drives three-phase motor coils in a second system, which is the other system, the first drive circuit and the second drive circuit each having sets of upper and lower switching elements for three phases, the motor control device comprising:a setting unit that sets a two-phase current command value corresponding to a target current value for a current that is to flow through the electric motor;
an actual current value computation unit that computes an actual two-phase current value that matches a current that flows through the electric motor;
a first PWM count computation unit that computes a first PWM count for each of three phases in the first system in each PWM cycle on the basis of the two-phase current command value and the actual two-phase current value; and
a second PWM count computation unit that computes a second PWM count for each of three phases in the second system in each PWM cycle in accordance with the phase difference on the basis of the first PWM count for each of the three phases in the first system, wherein
the upper and lower switching elements for each phase in one of the first system and the second system are controlled in accordance with a first pattern in which the upper and lower switching elements are varied in an order of an upper on state, a lower on state, and the upper on state from a time of start of PWM cycles, and the upper and lower switching elements for each phase in the other system are controlled in accordance with a second pattern in which the upper and lower switching elements are varied in an order of a lower on state, an upper on state, and the lower on state from a time of start of PWM cycles.

US Pat. No. 10,560,038

HIGH TEMPERATURE DOWNHOLE POWER GENERATING DEVICE

Saudi Arabian Oil Company...

1. A high temperature power generating device, the device comprising:a power generator including a first material of one polarity and a second material that is fixed in position relative to the first material and is of opposite polarity of the first material, wherein the first material is configured to be propelled toward the second material based on motion of the high temperature downhole power generator so that the two materials have a maximized point of contact to generate maximum power;
at least one electrode that is connected to the first material or second material;
a bridge rectifier connected to the at least one electrode to transform the power generated into direct current from alternating current;
a storage unit for storing the power generated by the power generator;
a first housing for housing the power generator, the electrode, and the bridge rectifier, wherein the first housing comprises a polymeric material; and
a second housing for housing the storage unit, wherein the second housing comprises a material selected from the group consisting of certain solids, transition metals, as well as high strength alloys and/or compounds of the transition metals, and high temperature dewars.

US Pat. No. 10,560,029

CONTROLLER FOR INCREASING EFFICIENCY OF A POWER CONVERTER AND A RELATED METHOD THEREOF

Leadtrend Technology Corp...

1. A controller for increasing efficiency of a power converter, the controller comprising:an enable signal generation unit electrically connected to a direct current (DC) input terminal of a primary side of the power converter through a high voltage pin of the controller, wherein the enable signal generation unit is used for generating an enable signal corresponding to a duty cycle of a gate control signal according to a DC input voltage of the DC input terminal and a feedback voltage corresponding to a secondary side of the power converter, and the feedback voltage corresponds to an output voltage of the secondary side of the power converter; and
a gate signal generation unit having two transistors in parallel, wherein a first terminal of a first transistor of the two transistors and a first terminal of a second transistor of the two transistors are coupled to ground, a second terminal of the first transistor is coupled to a gate pin of the controller through a switch comprised in the gate signal generation unit, a second terminal of the second transistor is directly coupled to the gate pin, and a control terminal of the first transistor and a control terminal of the second transistor receive a pulse width modulation signal;
wherein the gate signal generation unit utilizes the enable signal to control turning-on and turning-off of the switch to change a sink current flowing through the gate pin of the controller, wherein the gate pin is coupled to a power switch of the primary side of the power converter, and the gate signal generation unit is further used for generating a gate control signal to the power switch.

US Pat. No. 10,560,027

SEMICONDUCTOR DEVICE AND METHOD THEREFOR

FAIRCHILD SEMICONDUCTOR C...

1. A power supply circuit having a control circuit comprising:configuring a PWM circuit of the control circuit to control a power switch to regulate an output voltage formed from a secondary winding of a transformer wherein the secondary winding is configured to be coupled to a synchronous rectifier;
a feedback circuit configured to receive a sense signal from an auxiliary winding of the transformer, the feedback circuit configured to allow the sense signal to increase in response to a turn-off of the power switch, to subsequently detect a second increase of the sense signal that occurs in response to a turn-off of the synchronous rectifier, and to form a feedback signal as a value of the sense signal responsively to detecting the second increase of the sense signal; and
the control circuit configured to adjust an on-time of a subsequent enabling of the power switch according to a value of the feedback signal.

US Pat. No. 10,560,023

MULTI-PHASE POWER REGULATOR

Texas Instruments Incorpo...

1. A circuit for use in system with a multi-phase power regulator to supply power to an electrical load, the multi-phase power regulator including a power stage including a first phase and a second phase, the circuit comprising:phase management circuitry to couple to the first phase and the second phase to control the first phase and the second phase;
a first comparator to couple to an output node of the multi-phase power regulator to compare a first output voltage level at the output node of the multi-phase power regulator to a first threshold value to produce a first comparison result; and
a second comparator to couple to the output node of the multi-phase power regulator to compare the first output voltage level to a second threshold value to produce a second comparison result, wherein the second threshold value is less than the first threshold value;
current detection circuitry to detect:
first electrical characteristics associated with providing a first amount of current to the load at the first output voltage level, the first electrical characteristics indicative of an increased current draw by the load; and
second electrical characteristics associated with providing a second amount of current to the load at the first output voltage level, the second electrical characteristics indicative of a decreased current draw by the load;
a load line to lower the first output voltage level based on an increase in current draw by the load; and
phase shedding circuitry coupled to the first comparator and the second comparator, and the phase management circuitry to control the phase management circuitry to activate or deactivate the second phase based at least partially on the first comparison result and the second comparison result.

US Pat. No. 10,560,019

BIPOLAR HIGH-VOLTAGE NETWORK AND METHOD FOR OPERATING A BIPOLAR HIGH-VOLTAGE NETWORK

Airbus Operations GmbH, ...

1. A bipolar high-voltage network for an aircraft or spacecraft, comprising:a DC voltage converter comprising two unipolar input connections, two bipolar output connections and a single reference potential connection;
at least one unipolar device having only two electrical connections, each one of the two electrical connections being coupled to one of the two unipolar input connections,
a first DC voltage intermediate circuit which is coupled between the unipolar input connections of the DC voltage converter;
a second DC voltage intermediate circuit which is coupled between the bipolar output connections of the DC voltage converter,
the DC voltage converter comprising a first DC voltage converter module, comprising circuitry comprising two capacitors, two switches and a choke, wherein a first of the two capacitors is connected in series between the module input connection and the reference potential connection, a second of the two capacitors is connected in series between the module output connection and the reference potential connection, the first DC voltage converter model being coupled to a first of the unipolar input connections of the DC voltage converter via a module input connection, to the reference potential connection of the DC voltage converter via a module reference potential connection, and to a first of the bipolar output connections of the DC voltage converter via a module output connection, and
the DC voltage converter comprising a second DC voltage converter module, comprising circuitry comprising two capacitors, two switches and a choke, wherein a first of the two capacitors is connected in series between the module input connection and the reference potential connection, a second of the two capacitors is connected in series between the module output connection and the reference potential connection, the second DC voltage converter module being coupled to a second of the unipolar input connections of the DC voltage converter via a module input connection, to the reference potential connection of the DC voltage converter via a module reference potential connection, and to a second of the bipolar output connections of the DC voltage converter via a module output connection; and
six additional switches, two additional capacitors, and four zero diodes,
wherein two sets of series-connected switches are connected in parallel with the unipolar input connections and the bipolar output connections,
wherein two of the capacitors are coupled between the two unipolar input connections and two of the capacitors are connected in series between a tapping terminal and a reference potential terminal,
wherein the four zero diodes are connected in parallel with four of the additional six switches, and,
wherein the two unipolar input connections and the reference potential connection are different connections.

US Pat. No. 10,560,005

APPARATUS FOR MANUFACTURING LAMINATED IRON CORE

MITSUI HIGH-TEC, INC., F...

1. An apparatus for manufacturing a laminated iron core, the apparatus comprising:a conveyance jig on which a laminated iron core body is placed, wherein the laminated iron core body is lamination of a plurality of iron core pieces;
a die unit including a lower die and an upper die upwardly and downwardly movable with respect to the lower die, which holds the laminated iron core body placed on the conveyance jig from both sides in a lamination direction of the plurality of iron core pieces between the lower die and the upper die;
an injector injecting a resin into a through hole formed through the laminated iron core body held by the die unit in the lamination direction of the plurality of iron core pieces from the lower die through the conveyance jig or from the upper die; and
a lift configured to selectively move the conveyance jig upwardly and downwardly with respect to and separately from the lower die, wherein the lift is mounted so as to be unaffixed to both the die unit and the conveyance jig, and
wherein the lower die is configured to come into contact with the conveyance jig.

US Pat. No. 10,560,002

COOLANT FLOW DISTRIBUTION USING COATING MATERIALS

FORD GLOBAL TECHNOLOGIES,...

1. An electric machine comprising:a stator core, within a transaxle housing, having a channel-less outer surface portion;
one or more layers of an oleophobic or hydrophobic patterned coating defining boundaries wrapping around a perimeter of the stator core; and
one or more layers of an oleophilic or hydrophilic coating on the portion within the boundaries configured to direct coolant flow over the oleophilic or hydrophilic coating within the boundaries.

US Pat. No. 10,559,997

BRUSH DEVICE, ELECTRIC MOTOR WITH BRUSH DEVICE, AND MANUFACTURING METHOD OF BRUSH DEVICE

DENSO CORPORATION, Kariy...

1. A brush device comprising:a positive side brush sub-assembly having a positive side brush for feeding a commutator, a positive side brush holder for holding the positive side brush, and a positive side plate to which the positive side brush holder is attached, and
a negative side brush sub-assembly having a negative side brush for feeding the commutator, a negative side brush holder for holding the negative side brush, and a negative side plate to which the negative side brush holder is attached, wherein
the positive side brush holder has a positive convex portion engaging with the negative side plate,
the negative side brush holder has a negative convex portion engaging with the positive side plate,
the positive side plate has a positive slit engaging with the negative convex portion,
the negative side plate has a negative slit engaging with the positive convex portion, and
the positive side brush sub-assembly and the negative side brush sub-assembly are combined with each other by the positive convex portion and the negative slit being engaged and the negative convex portion and the positive slit being engaged.

US Pat. No. 10,559,993

STATOR AND MOTOR

FANUC CORPORATION, Yaman...

1. A stator comprising:a stator core having a cylindrical yoke portion and a plurality of tooth portions protruding toward an inner side of a radial direction of the yoke portion from positions spaced from each other in a circumferential direction of an inner circumferential portion of the yoke portion and extending in an axial direction of the yoke portion;
a plurality of coils attached to the tooth portion so as to surround the tooth portion, the coils forming a first void portion between an inner circumferential portion of the coil and a first end surface on one end side in the axial direction of the tooth portion and forming a second void portion between the inner circumferential portion of the coil and a second end surface on the other end side in the axial direction of the tooth portion;
a plurality of first coil fixing components inserted into the first void portion from an inner side of the radial direction toward an outer side thereof to fix the coils; and
a plurality of second coil fixing components inserted into the second void portion from the inner side of the radial direction toward the outer side to fix the coils, wherein
the first end surface has a first concave portion,
the second end surface has a second concave portion,
the first coil fixing component has a first body portion inserted into the first void portion, a first convex portion protruding from a position contacting the first end surface, of the first body portion so as to be inserted into the first concave portion, and a first locking portion extending from an end on the inner side of the radial direction of the first body portion toward the opposite side of the first end surface to lock the coil from the inner side of the radial direction,
the second coil fixing component has a second body portion inserted into the second void portion, a second convex portion protruding from a position contacting the second end surface, of the second body portion so as to be inserted into the second concave portion, and a second locking portion extending from an end on the inner side of the radial direction of the second body portion toward the opposite side of the second end surface to lock the coil from the inner side of the radial direction,
the first body portion has a first guiding portion that guides insertion into the first void portion,
the second body portion has a second guiding portion that guides insertion into the second void portion,
the first body portion and the second body portion each have a shape that is tapered toward an outer side of the radial direction, and
at least one of the first body portion and the second body portion has an elastic structure that exerts elastic force in the axial direction.

US Pat. No. 10,559,992

STATOR OF ROTATING ELECTRICAL MACHINE, AND ROTATING ELECTRICAL MACHINE

Hitachi Automotive System...

1. A stator of a rotary electric machine, the stator comprising:a stator core in which a plurality of slots is formed;
a stator coil to be inserted into the slot; and
an insulating paper to be inserted into the slot, and insulating the stator coil and the stator core, wherein
the insulating paper includes a first insulating paper portion arranged adjacent to the stator core at an outside of an end surface in an axial direction of the slot and at least a second insulating paper portion arranged between the first insulating paper portion and the stator coil, and
the insulating paper forms a resin reservoir portion in which an insulating resin is arranged, between the first insulating paper portion and the second insulating paper portion, wherein a lowermost point of the resin reservoir is located outside of the stator core, such that the insulating resin in the resin reservoir is only disposed outside of the stator core.

US Pat. No. 10,559,990

STRUCTURES UTILIZING A STRUCTURED MAGNETIC MATERIAL AND METHODS FOR MAKING

Persimmon Technologies Co...

1. A motor, comprising:a stator comprising at least one core and an outer wall, the outer wall extending in an axial direction;
a coil wound on the at least one core of the stator such that an edge of the outer wall extending in the axial direction is below, even with, or extends beyond a surface of the coil facing in the axial direction and such that the outer wall extends radially beyond an outer edge of the coil;
a rotor having a rotor pole and being rotatably mounted relative to the stator;
at least one magnet disposed between the rotor and the stator; and
a conical air gap between the stator and the at least one magnet;
wherein a separation plane normal to an axis of rotation extends through the stator and the rotor, and wherein the coil, the at least one magnet, and the conical air gap are together configured to allow flux flow between the stator and the rotor in a three-dimensional flux pattern such that the flux flow does not cross the separation plane.

US Pat. No. 10,559,989

ROTOR CARRIER AND LOCKING DIAPHRAGM SPRING

11. A carrier hub of a hybrid drive module including a torque converter and an electric motor including a rotor, the carrier hub comprising:a carrier hub surface including a retention groove configured to interlock the carrier hub to one or more fingers of a diaphragm spring and inhibit rotation and axial movement of the diaphragm spring relative to the carrier hub, wherein the retention groove includes a first and second passageway connected by a third passageway, wherein the first, second, and third passageways extend in different directions to allow the finger to be translated along the retention groove in three different directions.

US Pat. No. 10,559,988

ROTOR FOR ROTARY ELECTRIC MACHINE

MITSUBISHI ELECTRIC CORPO...

1. A rotor for a rotary electric machine, comprising:a first rotor member; and
a second rotor member,
the first rotor member including a first core member and a first magnet group provided to the first core member,
the second rotor member including a second core member and a second magnet group provided to the second core member,
the first core member and the second core member being fixed to each other under a state of being aligned in an axial direction of the rotor,
the first magnet group and the second magnet group being adjacent to each other in the axial direction,
the first magnet group including a plurality of first magnets arrayed in a circumferential direction of the rotor,
the second magnet group including a plurality of second magnets arrayed in the circumferential direction,
the first magnet and the second magnet, which are adjacent to each other and have the same polarity, being shifted from each other in the circumferential direction so as to mutually receive a magnetic repulsive force in the circumferential direction,
one of the first core member and the second core member having a first recessed portion, and another of the first core member and the second core member having a first protruding portion to be engaged with the first recessed portion in the circumferential direction,
at least any one of the first core member and the second core member is formed as a core assembly member including a main body core block and a plurality of arc-shaped core blocks mounted to any one of an outer peripheral portion and an inner peripheral portion of the main body core block,
magnets included in the plurality of first magnets and the plurality of second magnets, which are provided to the core assembly member, are provided to the arc-shaped core blocks,
any one of the main body core block and the plurality of arc-shaped core blocks has a second recessed portion formed thereon, and another of the main body core block and the plurality of arc-shaped core blocks has a second protruding portion formed thereon to be engaged with the second recessed portion in a direction in which the first protruding portion is brought into engagement with the first recessed portion,
the second recessed portion has a second recessed-portion engagement portion having a width which continuously decreases in a direction in which the second protruding portion is brought into engagement with the second recessed portion, and
the second protruding portion has a second protruding-portion engagement portion to be fitted into the second recessed-portion engagement portion.

US Pat. No. 10,559,986

SYSTEM, METHOD, AND APPARATUS FOR WIRELESS CHARGING

CAPITAL ONE SERVICES, LLC...

1. An electronic transaction card comprising:a Near-Field Communication (NFC) antenna;
an energy storage component; and
a processor configured to:
send and receive data packets to and from a terminal system to conduct a transaction using contactless payment technology, wherein the data packets include user authentication information to authenticate payment;
transmit, via the NFC antenna, an advertising packet from the electronic transaction card to a mobile power receiving device;
receive, via the NFC antenna, a response to the advertising packet from the mobile power receiving device, wherein the response indicates a first frequency of energy transmission via the NFC antenna;
alter the first frequency of energy transmission via the NFC antenna to a second frequency of energy transmission via the NFC antenna based on a distance between the electronic transaction card and the mobile power receiving device; and
broadcast, via the NFC antenna, a signal to the mobile power receiving device using the second frequency and configured to charge the mobile power receiving device via inductive charging.

US Pat. No. 10,559,984

POWER TRANSFER SYSTEM, AND POWER RECEIVING APPARATUS, POWER TRANSMITTING APPARATUS, AND CONTROL METHOD THEREOF

CANON KABUSHIKI KAISHA, ...

1. A power receiving apparatus comprising:a first antenna for wirelessly receiving power from a power transmitting apparatus and for performing communication;
a second antenna for performing communication;
one or more memories storing instructions; and
one or more processors executing the instructions to:
perform communication regarding identification information, with the power transmitting apparatus, via the first antenna;
transmit a first signal via the second antenna;
receive a second signal indicating a request for communication via the second antenna after transmitting the first signal;
determine whether a transmission source of the second signal is the power transmitting apparatus with which the identification information is communicated via the first antenna based on identification information included in the second signal;
control to perform communication regarding power receiving control via the second antenna, based on determining the transmission source of the second signal is the power transmitting apparatus with which the identification information is communicated via the first antenna, with the transmission source of the second signal, and control not to perform communication regarding power receiving control via the second antenna, based on determining the transmission source of the second signal is not the power transmitting apparatus with which the identification information is communicated via the first antenna, with the transmission source of the second signal.

US Pat. No. 10,559,981

POWER LINKS AND METHODS FOR IMPROVED EFFICIENCY

Daxsonics Ultrasound Inc....

1. A method of improving transfer efficiency in an ultrasonic power link having a send transducer and configured to transmit at a transmit frequency, in which the send transducer has a fixed resonant global best operating frequency characteristic to the send transducer, the method comprising detecting changes in impedance phase as seen by the send transducer by sweeping the transmit frequency over a range of frequencies, identifying a target frequency at which the impedance phase is at a local minimum that is closest in value to the global best operating frequency, and adjusting the transmit frequency to the target frequency.

US Pat. No. 10,559,979

CHARGING RECHARGEABLE APPARATUS

Nokia Technologies Oy, E...

9. A method comprising:accessing a trigger event comprising a battery level threshold of a rechargeable apparatus;
linking the rechargeable apparatus with a charging apparatus for wireless communication;
determining that the trigger event has occurred and the rechargeable apparatus is outside of a charging range of the charging apparatus;
in response to a determination that the trigger event has occurred and that the rechargeable apparatus is outside of the charging range of the charging apparatus, causing transmission of a wireless communication from the rechargeable apparatus to the charging apparatus;
causing an alert associated with the rechargeable apparatus to be provided by the charging apparatus; and
in an instance the rechargeable apparatus is positioned within the charging range of the charging apparatus, causing the provision of the alert associated with the rechargeable apparatus to be stopped.

US Pat. No. 10,559,974

CONSTANT POWER OUTPUT FROM EMERGENCY BATTERY PACKS

Eaton Intelligent Power L...

1. An electrical system comprising:a power supply that provides primary power;
an electrical device comprising at least one electrical load, wherein the electrical device is coupled to the power supply, wherein the at least one electrical load operates when the electrical device receives the primary power;
an energy storage unit comprising at least one energy storage device, wherein the at least one energy storage device charges using the primary power; and
a controller that determines an initial charging period during which the at least one energy storage device is charged using a constant supply of the primary power, wherein the controller changes the constant supply of the primary power to a trickle charge of the primary power at the end of the initial charging period to maintain a minimum charge level of the at least one energy storage device,
wherein the at least one electrical load receives reserve power from the energy storage unit when the power supply ceases providing the primary power and the trickle charge,
wherein the controller further causes the reserve power delivered by the energy storage unit to be substantially constant over time,
wherein the energy storage unit comprises a boost converter,
wherein the reserve power is less than the primary power but greater than a minimum threshold value.

US Pat. No. 10,559,959

MULTI-GENERATOR POWER PLANT ARRANGEMENT, ENERGY SUPPLY NETWORK HAVING A MULTI-GENERATOR POWER PLANT ARRANGEMENT AND METHOD FOR DISTRIBUTING REACTIVE POWER GENERATION IN A MULTI-GENERATOR POWER PLANT ARRANGEMENT

1. A multi-generator power plant arrangement, comprising:a network feeding-in point, which is electrically coupled to an energy supply network;
a plurality of generators, which are in each case electrically coupled to the network feeding-in point and are designed to provide a reactive power in dependence on a first control variable, wherein at least one generator of the plurality of generators is a grid-forming generator, which is designed to provide an output voltage at a specified amplitude and a specified frequency or phase on a basis of a second control variable, wherein the reactive power to be provided by the plurality of generators is divided among the plurality of generators using a predetermined ratio or predetermined rules such that each respective generator of the plurality of generators has a designated reactive power to be fed in; and
a control device, which is designed to calculate a respective second control variable for the output voltage of the at least one grid-forming generator by using the designated reactive power to be fed in by a respective grid-forming generator of the plurality of generators, and to transmit the calculated respective second control variable to the respective grid-forming generator of the plurality of generators.

US Pat. No. 10,559,954

METHODS AND APPARATUS FOR VOLTAGE AND CURRENT CALIBRATION

SEMICONDUCTOR COMPONENTS ...

1. A calibration circuit, comprising:a battery pack comprising a negative pack terminal; and
an intermediate node;
a first protection IC coupled to a first transistor, wherein the first transistor is coupled between the negative pack terminal and the intermediate node;
a second protection IC coupled in parallel with the first protection IC and coupled to a second transistor;
a power source adapted to be coupled in parallel with the first and second protection ICs; and
a current source adapted to be coupled between the negative pack terminal and the intermediate node;
wherein:
the intermediate node is positioned between the first transistor and the second transistor; and
the power source is configured to provide a current to the first protection IC through a first current loop.

US Pat. No. 10,559,950

CROSSOVER-BRIDGE CABLE ROUTER

CABLOFIL INC., Mascoutah...

1. A crossover-bridge cable router for use in a cable tray, comprising:a floor, at least a portion of which is substantially horizontal;
a first ramp extending downward from a first side of the floor, the first ramp being configured to reside above a bottom of the cable tray when the cable router is attached to the cable tray;
a second ramp extending downward from a second side of the floor, the second ramp being configured to reside above a bottom of the cable tray when the cable router is attached to the cable tray, wherein the first and second ramps are positioned either parallel or perpendicular to each other; and
a fastener having a first attachment structure configured to position the cable router on the cable tray such that the floor is a first distance above the bottom of the cable tray and a second attachment structure configured to position the cable router on the cable tray such that the floor is a second distance different from the first distance above the bottom of the cable tray.

US Pat. No. 10,559,948

CASING, ELECTRICAL CONNECTION BOX, AND WIRE HARNESS

YAZAKI CORPORATION, Toky...

1. A casing comprising:a frame peripheral wall on which an opening portion is formed at an edge;
a cover that covers the opening portion by rotational movement; and
a packing that is assembled in a packing groove to be formed in the cover and is pressed against the edge during the rotational movement,
wherein a position adjusting portion for adjusting a position of the packing groove with respect to the edge is formed on an inner surface of the frame peripheral wall.

US Pat. No. 10,559,947

PROTECTIVE SKIRT FOR TELECOMMUNICATIONS LINES

Corning Optical Communica...

1. A protective apparatus for telecommunication lines, comprising:a mounting frame, wherein the mounting frame comprises a sidewall having a sidewall opening;
a transition platform coupled to the mounting frame, the transition platform comprising an opening; and
a protective skirt, wherein the mounting frame, the transition platform and the protective skirt define an internal space when the protective skirt is removably coupled to the mounting frame, wherein the protective skirt comprises a cutout for allowing unobstructed access to the sidewall opening, wherein the opening of the transition platform comprises a non-enclosed shape having an open end, and wherein the open end is positional against an external wall when the mounting frame is secured to the external wall to facilitate trapping a telecommunications line between the opening and the external wall.

US Pat. No. 10,559,942

LASER DEVICE AND INTERNAL COMBUSTION ENGINE

Ricoh Company, Ltd., Tok...

1. A laser device, comprising:a light source configured to emit light;
an optical system configured to concentrate the light emitted from the light source;
a housing configured to accommodate the optical system; and
a window disposed to the housing, to which the light passed through the optical system is incident, wherein the window includes
an optical window having an exit plane through which the light exits from the optical system, and having a side surface,
an optical window holding member configured to hold the optical window,
a joint between the side surface of the optical window and the optical window holding member to join the optical window to the optical window holding member, and
a protective layer disposed on a surface of the joint, on a side where the light is emitted from the window, wherein the protective layer is a coating.

US Pat. No. 10,559,934

MULTIFUNCTIONAL ROTARY DATA MEMORY

SHENZHEN DNS INDUSTRIES C...

1. A multifunctional rotary data memory, comprising a housing, a master control module, a memory, a first connector, and a second connector, wherein the housing comprises an upper housing having a first side wall between a first baseplate and a first cover and a lower housing having a second side wall between a second baseplate and a second cover, the upper housing and the lower housing are movably connected, and the upper housing and the lower housing can relatively and rotatably move around a pivot shaft; the first connector is mounted on the first side wall, the second connector is mounted on the second side wall, and the first connector and the second connector are both communicatively connected to the master control module; the first baseplate and the second baseplate are rotatably connected through the pivot shaft; a first through hole is arranged in a middle of the first baseplate, a second through hole is arranged in a middle of the second baseplate, and the second through hole is communicated with the first through hole for a conductor to pass through; the second baseplate is provided with a plurality of bulges standing and extending outwardly at a periphery of the second through hole, the plurality of bulges are arranged in circular and pass through the first through hole, so as to be served as the pivot shaft; and the first baseplate is provided with a shaft sleeve standing and extending inwardly at a periphery of the first through hole and corresponding to the plurality of bulges, and top portions of at least a part of the plurality of bulges are provided with reverse hooks so as to prevent the bulges from being separated from the first baseplate.

US Pat. No. 10,559,928

ELECTRIC CONNECTOR

DAI-ICHI SEIKO CO., LTD.,...

1. An electric connector comprising:a contact member that electrically connects a signal transmission line of a connecting object to a signal conducting path of a connected object; and
a shell member electrically connects a ground transmission line of the connecting object to a ground conducting path of the connected object;
wherein the shell member includes
a first shell, disposed in a state of facing the connected object, that entirely covers the contact member and
a second shell disposed to face the first shell and disposed between the connecting object and the connected object,
wherein the first shell has a connecting object ground contact point which comes to be electrically connected to the ground transmission line provided on the connecting object, and has a connected object ground contact point which comes to be electrically connected to the ground conducting path provided on the connected object,
the second shell has a connecting object ground contact point which comes to be electrically connected to the ground transmission line provided on the connecting object, and has a connected object ground contact point which comes to be electrically connected to the ground conducting path provided on the connected object, and
wherein the first shell is disposed in a state of entirely covering the contact member without gaps from above,
the second shell is disposed to cover the contact member from below.

US Pat. No. 10,559,927

SWITCHABLE RJ45/ARJ45 JACK

Panduit Corp., Tinley Pa...

1. A communication connector, comprising:a housing configured for receiving a communication plug;
a printed circuit board at least partially within said housing;
a rocker switch at least partially within said housing, said rocker switch configured to rotate about a pivot point for actuating said printed circuit board; and
a translating crossbar at least partially within said housing, said translating crossbar engaging said rocker switch and causing said rocker switch to rotate about the pivot point.

US Pat. No. 10,559,911

PLUG CONNECTOR MODULE PROVIDING GROUND CONNECTION THROUGH A MODULE HOLDING FRAME

1. An electrical plug connector module and a frame assembly for insertion into a modular plug connector, wherein said frame assembly comprises a holding frame for accommodating two or more electrical plug connector modules, and having one or more electrical plug connector modules fixed in the holding frame, the electrical plug connector modules each comprising an insulating housing and at least one electrical contact, wherein the insulating housing comprises fixing devices for fixing the electrical plug connector module in the holding frame, and wherein the at least one electrical contact is received in the insulating housing and comprises a second plugging side and also a second connecting side that can be accessed from a first plugging side and a first connecting side of the insulating housing respectively, wherein the electrical plug connector module further comprises a contact means that is connected to the at least one electrical contact in an electrically conductive manner and is guided to an outer side of the insulating housing, wherein the contact means is embodied on the outer side of the insulating housing as an L-shaped resilient region having an S-shaped formation at a distal end of the L-shaped region, wherein the electrical plug connector module is inserted into the holding frame, wherein the holding frame is arranged in the modular plug connector, and the resilient region of the contact means contacts the holding frame.

US Pat. No. 10,559,889

SLOT ARRAY ANTENNA, AND RADAR, RADAR SYSTEM, AND WIRELESS COMMUNICATION SYSTEM INCLUDING THE SLOT ARRAY ANTENNA

NIDEC CORPORATION, Kyoto...

1. A slot array antenna comprising:a first electrically conductive member including a first electrically conductive surface and a plurality of slots therein, the plurality of slots being arrayed in a first direction which extends along the first electrically conductive surface and in a second direction which intersects the first direction;
a second electrically conductive member including a second electrically conductive surface which opposes the first electrically conductive surface;
a plurality of ridge-shaped waveguide members arrayed between the first and second electrically conductive members along the second direction, each of the plurality of waveguide members including an electrically conductive waveguide face which extends along the first direction so as to oppose at least two slots among the plurality of slots; and
an artificial magnetic conductor in a subregion which is within a region between the first and second electrically conductive members, but which is outside of a subregion including the plurality of waveguide members; wherein
the second electrically conductive member includes a plurality of through holes;
at least one of the plurality of waveguide members is split by one of the plurality of through holes into a first ridge and a second ridge, each of the first and second ridges including an end face, the end faces opposing each other;
the one of the plurality of through holes includes an inner peripheral surface connected to the end faces of the first and second ridges;
each of a length of the first ridge and a length of the second ridge is greater than a distance between the first and second electrically conductive surfaces;
the artificial magnetic conductor includes a plurality of electrically conductive rods arrayed on the second electrically conductive member;
no electric wall exists in a space between two adjacent waveguide faces of two adjacent waveguide members among the plurality of waveguide members; and
one row of electrically conductive rods is provided between the two adjacent waveguide members.

US Pat. No. 10,559,880

MULTI-LAYERED HYBRID BEAMFORMING

AVAGO TECHNOLOGIES INTERN...

1. A device comprising:at least one processor configured to:
determine a first beam setting based on a first set of criteria associated with a first user device;
form a first beam based on the first beam setting using two radio frequency (RF) beamforming circuits and at least one digital beamforming circuit, the at least one digital beamforming circuit being interspersed between the two radio frequency beamforming circuits; and
transmit, via first antenna elements, the first beam to the first user device.

US Pat. No. 10,559,863

DYNAMIC METAL-ANODE FLOW BATTERY ENERGY-STORAGE SYSTEM

NATIONAL TAIPEI UNIVERSIT...

1. A dynamic metal-anode flow battery energy-storage system, comprising:a discharge module including at least one metal-air battery which includes a plurality of discharge reactants in a first electrolyte, wherein the discharge reactants react with oxygen in air to form a plurality of discharged products and discharge electric energy;
a charging module, being electrically connected to the discharge module and including at least one electrolysis device and at least one removal device, wherein the at least one electrolysis device includes a conductive member and a plurality of electrolysis reactants immersed in a second electrolyte; the electrolysis reactants are electrolyzed to form a plurality of electrolysis products which are adhered to a surface of the conductive member; the electrolysis products and the discharge reactants are of the same material; the at least one removal device includes a scraper adapted to remove the adhered electrolysis products from the surface of the conductive member; and
a delivery device adapted to deliver the electrolysis products into the first electrolyte as the discharge reactants, and deliver the discharged products into the second electrolyte as the electrolysis reactants.

US Pat. No. 10,559,841

FUEL CELL AND MANUFACTURING METHOD OF FUEL CELL

TOYOTA JIDOSHA KANUSHIKI ...

1. A fuel cell, comprising:a cell stacked body provided by stacking a plurality of unit cells, the cell stacked body configured to include stacked body side faces arranged along a stacking direction of the plurality of unit cells; and
a case configured to surround at least the stacked body side faces of the cell stacked body, wherein
the case comprises:
a first case configured to include a first case side wall and a pair of first opposed side walls that are arranged to rise from a circumference of the first case side wall such as to have a draft angle, the pair of first opposed side walls configured to be opposed to each other across the cell stacked body; and
a second case configured to include a second case side wall that is opposed to the first case side wall across the cell stacked body, and a pair of second opposed side walls that are arranged to rise from a circumference of the second case side wall such as to have a draft angle, the pair of second opposed side walls configured to be opposed to each other across the cell stacked body; and
a case bottom wall that is located on one side of the cell stacked body in the stacking direction, wherein
a first edge of each of the first opposed side walls on an opposite side that is opposite to the first case side wall is welded at a joint portion with a second edge of each of the second opposed side walls on an opposite side that is opposite to the second case side wall,
a clamping force is applied to the cell stacked body from respective sides in the stacking direction,
the first case further comprises first intersecting wall that is arranged to rise from the circumference of the first case side wall such as to have a draft angle and is configured to intersect with the pair of first opposed side walls, and
the second case further comprises a second intersecting wall that is arranged to rise from the circumference of the second case side wall such as to have a draft angle and is configured to intersect with the pair of second opposed side walls, wherein
a third edge of the first intersecting wall on an opposite side that is opposite to the first case side wall is joined with a fourth edge of the second intersecting wall on an opposite side that is opposite to the second case side wall, and
the first intersecting wall and the second intersecting wall constitute the case bottom wall, wherein
the case bottom wall receives the clamping force and maintains the clamping force.

US Pat. No. 10,559,833

FUEL CELL STACK

Toyota Jidosha Kabushiki ...

1. A fuel cell stack comprising a plurality of stacked cells each having separators,wherein:
a base material of each of separators used for an end cell located at a positive-side end of the fuel cell stack and a base material of each of separators used for cells other than the end cell are different metallic materials, and
the base material of each of the separators used for the end cell is a material with higher corrosion resistance than the base material of each of the separators used for the cells other than the end cell.

US Pat. No. 10,559,826

MULTIVALENT METAL ION BATTERY HAVING A CATHODE OF RECOMPRESSED GRAPHITE WORMS AND MANUFACTURING METHOD

Global Graphene Group, In...

1. A multivalent metal-ion battery comprising an anode, a cathode, a porous separator electronically separating said anode and said cathode, and an electrolyte in ionic contact with said anode and said cathode to support reversible deposition and dissolution of a multivalent metal, multivalent selected from Ni, Zn, Be, Mg, Ca, Ba, La, Ti, Ta, Zr, Nb, Mn, V, Co, Fe, Cd, Cr, Ga, In, or a combination thereof, at said anode, wherein said anode contains said multivalent metal or its alloy as an anode active material and said cathode comprises a cathode layer of an exfoliated graphite or carbon material having inter-flake pores from 2 nm to 10 ?m in pore size,the cathode layer comprises an active layer of recompressed exfoliated graphite or carbon material comprising a physical density of 0.5 to 1.8 g/cm3 and has a meso-scaled pores having a pore size of 2 nm to 50 nm.

US Pat. No. 10,559,818

NEGATIVE ELECTRODE FOR RECHARGEABLE LITHIUM BATTERY, AND RECHARGEABLE LITHIUM BATTERY INCLUDING SAME

Samsung SDI Co., Ltd., Y...

1. A negative electrode for a rechargeable lithium battery, comprising:a negative active material layer including a negative active material including a Si-based active material; nanoclay; and an aqueous binder; and
a current collector supporting the negative active material layer.

US Pat. No. 10,559,815

METHOD OF PRODUCING MULTI-LEVEL GRAPHENE-PROTECTED CATHODE ACTIVE MATERIAL PARTICLES FOR BATTERY APPLICATIONS

Global Graphene Group, In...

1. A method of producing a mass of graphene-embraced particulates or secondary particles directly from a graphitic material for use as a lithium-ion battery cathode active material, said method comprising:a) mixing multiple particles of a graphitic material and multiple primary particles of a solid cathode active material and optional ball-milling media to form a mixture in an impacting chamber of an energy impacting apparatus, wherein said graphitic material has never been previously intercalated, oxidized, or exfoliated and said impacting chamber contains therein no previously produced isolated graphene sheets;
b) operating said energy impacting apparatus with a frequency and an intensity for a length of time sufficient for peeling off graphene sheets from said particles of graphitic material and transferring said peeled graphene sheets to surfaces of said primary particles of said solid cathode active material and fully embrace or encapsulate said primary particles to produce graphene-embraced or graphene-encapsulated primary particles of said cathode active material inside said impacting chamber;
c) recovering said graphene-embraced or graphene-encapsulated primary particles from said impacting chamber, wherein at least one of said embraced or encapsulated primary particles contains multiple graphene sheets of a first graphene material embracing or encapsulating at least one of said primary particles; and
d) combining a mass of said recovered graphene-embraced or graphene-encapsulated primary particles, an optional conductive additive, and graphene sheets of a second graphene material into a mass of graphene-embraced particulates, wherein said particulate comprises a single or a plurality of graphene-encapsulated primary particles of an cathode active material, comprising a primary particle of said cathode active material and multiple sheets of first graphene material overlapped together to embrace or encapsulate said primary particle, and wherein said single or a plurality of graphene-encapsulated primary particles, along with an optional conductive additive, are further embraced or encapsulated by multiple sheets of a second graphene material, wherein said first graphene material is the same as or different from said second graphene material, and wherein said first graphene and said second graphene material is each in an amount from 0.01% to 20% by weight and said optional conductive additive is in an amount from 0% to 50% by weight, all based on the total weight of said particulate.

US Pat. No. 10,559,810

POSITIVE ELECTRODE ACTIVE MATERIAL, POSITIVE ELECTRODE, BATTERY, BATTERY PACK, ELECTRONIC DEVICE, ELECTRIC VEHICLE, POWER STORAGE DEVICE, AND POWER SYSTEM

Murata Manufacturing Co.,...

1. A positive electrode active material comprising:a particle including a lithium composite oxide;
a first layer that is provided on a surface of the particle and includes a lithium composite oxide; and
a second layer that is provided on a surface of the first layer,
wherein the lithium composite oxide included in the particle and the lithium composite oxide included in the first layer have the same constituent elements and the same atomic ratio or a difference between atomic ratios of the constituent elements of the core particles and the first covering layer is within 10 atom %,
the second layer includes an oxide or a fluoride, and
the lithium composite oxide included in the first layer has lower crystallinity than the lithium composite oxide included in the particle.

US Pat. No. 10,559,802

SEPARATOR MEMBRANES FOR LITHIUM ION BATTERIES AND RELATED METHODS

Celgard, LLC, Charlotte,...

1. A ceramic coated separator for an energy storage device, such as a secondary lithium ion battery, comprising:a microporous polyolefin membrane having a first surface and a second surface, wherein said microporous membrane is at least one of a single layer, multiple layer, single ply, and/or multiple ply structure; and,
a ceramic coating on at least one surface of said microporous membrane, said ceramic coating comprising a layer of ceramic particles in a polymeric binder, said ceramic particles having an average particle size ranging from 0.01 ?m to 5 ?m in diameter, said polymeric binder includes poly (sodium acrylate-acrylamide-acrylonitrile) copolymer,
wherein said ceramic coated separator has a TMA TD shrinkage of about 0.5% or less at ?130° C. and at least one of the following physical characteristics: a TMA MD dimensional change of ?2% or more at ?110° C.; a MD shrinkage of 15% or less at 135° C. for one hour; a volatile component evolution of ?0.5% volatile components at ?250° C.; and a strain shrinkage of 0% at ?120° C.

US Pat. No. 10,559,778

COMPOSITE GAS BARRIER LAMINATE AND METHOD FOR PRODUCING SAME

ZEON CORPORATION, Tokyo ...

1. A composite gas barrier layered body for an organic electroluminescent light-emitting element, consisting of:a gas barrier layered body (A) having a film (a) of an alicyclic polyolefin resin and one or more inorganic barrier layers (a) directly provided on at least one surface of the film (a);
a film (b) formed of an alicyclic polyolefin resin having a thickness that is equal to less than a thickness of the film (a); and
a heat-melting layer that is interposed between the inorganic barrier layer (a) and the film (b) to bond the inorganic barrier layer (a) to the film (b), wherein
a difference (TgB?TgA) between a glass transition temperature TgA of the heat-melting layer and a glass transition temperature TgB of the alicyclic polyolefin resin constituting the film (a) and the film (b) is 25° C. or higher,
a ratio of the thickness of the film (a) relative to the thickness of the film (b) is from 10:9 to 3:1,
a thickness of the heat-melting layer is 3 ?m or more and 50 ?m or less, and
the heat-melting layer is
a layer of a styrene-based thermoplastic elastomer resin,
a layer of an olefin-based thermoplastic elastomer resin,
a layer of a vinyl chloride-based thermoplastic elastomer resin,
a layer of a polyester-based thermoplastic elastomer resin, or
a layer of a urethane-based thermoplastic elastomer resin.

US Pat. No. 10,559,777

RADIATION CURABLE COMPOSITION FOR WATER SCAVENGING LAYER, AND METHOD OF MANUFACTURING THE SAME

1. A photocurable resin composition comprising:(A) 1-30% by weight of alkaline earth metal oxide particles selected from the group consisting of dehydrated CaO, dehydrated BaO and dehydrated MgO particles;
(B) 0.1-10% by weight of at least one photoinitiator, or any mixture thereof;
(C) 30-80% by weight of at least one acrylate or methacrylate component with a ClogP higher than 2, or any mixture thereof;
(D) 5-40% by weight of at least one monofunctional acrylate or methacrylate diluent component, or any mixture thereof;
(E) 5-30% by weight of at least one acrylate or methacrylate component with functionality equal or higher than 3, or any mixture thereof;
(F) 0.1-30% by weight of a polybutadiene acrylate or methacrylate, a silicone acrylate or methacrylate, or a two-mole ethoxylated bisphenol A di(meth)acrylate, or any mixture thereof;
based on the total weight of the composition;
wherein the photocurable resin exhibits a water content of less than 1000 ppm by weight;
wherein Mica is excluded from the group of (A) alkaline earth metal oxide particles; and
wherein the photocurable resin composition does not comprise any urethane (meth)acrylate, polyester (meth)acrylate, or polyethylene glycol (PEG) (meth)acrylate.

US Pat. No. 10,559,776

OLED DISPLAY DEVICE AND METHOD OF PACKAGING THE SAME

BOE TECHNOLOGY GROUP CO.,...

1. An OLED display device, comprising:a substrate;
a cover plate provided opposite to the substrate;
a light emitting region located on a surface of the substrate facing the cover plate, wherein the light emitting region has an OLED display structure;
a dam around the light emitting region; and
a packaging adhesive layer disposed on the light emitting region and configured to cover the OLED display structure,
wherein, the cover plate is provided with a groove at a position corresponding to the dam, an end of the dam away from the substrate being received in the groove,
the dam includes a first sub-dam and a second sub-dam stacked on the first sub-dam, wherein the first sub-dam is disposed close to the substrate, and the second sub-dam is received in the groove, and
the first sub-dam has a first surface, a portion of which is in contact with the second sub-dam and another portion of the first surface is in contact with the cover plate.

US Pat. No. 10,559,765

ORGANIC LIGHT-EMITTING DEVICE

SAMSUNG DISPLAY CO., LTD....

1. An organic light-emitting device comprising:a first electrode;
a second electrode facing the first electrode; and
an emission layer disposed between the first electrode and the second electrode; and
an electron transport region between the second electrode and the emission layer,
wherein the electron transport region comprises an electron injection layer comprising a first component comprising at least one halide of an alkali metal (Group I), a second component comprising at least one organometallic compound, and a third component comprising at least one lanthanide metal,
wherein the electron injection layer comprises a first layer and a second layer,
wherein the first layer is a film comprising the second component dispersed within a matrix comprising the first component, and the second layer is a film comprising the third component dispersed within a matrix comprising the first component; or
the first layer is a film comprising the second component dispersed within a matrix comprising the first component, and the second layer is a film comprising the third component dispersed within a matrix comprising the second component; or
the first layer is a film comprising the third component dispersed within a matrix comprising the first component, and the second layer is a film comprising the second component dispersed within a matrix comprising the first component; or
the first layer is a film comprising the third component dispersed within a matrix comprising the first component, and the second layer is a film comprising the third component dispersed within a matrix comprising the second component; or
the first layer is a film comprising the third component dispersed within a matrix comprising the second component, and the second layer is a film comprising the second component dispersed within a matrix comprising the first component; or
the first layer is a film comprising the third component dispersed within a matrix comprising the second component, and the second layer is a film comprising the third component dispersed within a matrix comprising the first component.

US Pat. No. 10,559,750

NONVOLATILE MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME

KABUSHIKI KAISHA TOSHIBA,...

1. A nonvolatile memory device comprising:a first conductive portion;
an insulating film surrounding a side surface of the first conductive portion;
an intermediate layer provided on the first conductive portion and the insulating film;
a first film including a first portion provided on the intermediate layer and at least one second portion provided in the intermediate layer and outside an upper edge of the first conductive portion, the first film including, above the first conductive portion, a resistance change portion that has a first resistance state and a second resistance state having resistance higher than resistance in the first resistance state; and
a second conductive portion provided at least on the resistance change portion,
wherein the resistance change portion is located at a position corresponding to a position where crystal grain boundaries of three crystal grains contained in the first film are gathered.

US Pat. No. 10,559,740

DRIVING DEVICE, PIEZOELECTRIC MOTOR, ELECTRONIC COMPONENT CONVEYANCE APPARATUS, AND ROBOT

Seiko Epson Corporation, ...

1. A driving device comprising a plurality of motive power generators that receive electric power supply and generate motive power,the plurality of motive power generators forming a plurality of sets of motive power generators in which two or more of the motive power generators are electrically parallel-connected, and
the plurality of sets of motive power generators electrically series-connected.

US Pat. No. 10,559,734

LIGHT EMITTING DEVICE PACKAGE AND LIGHT UNIT INCLUDING THE SAME

LG Innotek Co., Ltd., Se...

1. A light emitting device package comprising:a body;
a plurality of lead frames including a first lead frame and a second lead frame embedded in the body;
a first light emitting device disposed on the first lead frame;
a second light emitting device disposed on the second lead frame;
a first wire having a first end connected to the first lead frame and a second end connected to the first light emitting device; and
a second wire having a first end connected to the second lead frame and a second end connected to the second light emitting device,
wherein the body includes:
a bottom portion;
a first sidewall and a second sidewall disposed on the bottom portion and extending in a first direction;
a third sidewall and a fourth sidewall disposed on the bottom portion and extending from the first sidewall toward the second sidewall, and
wherein the bottom portion is disposed on a bottom of the body between the first sidewall, the second sidewall, the third sidewall and the fourth sidewall,
wherein a length between an outer side of the first sidewall and an outer side of the second sidewall in a second direction orthogonal to the first direction is longer than a length between an outer side of the third sidewall and an outer side of the fourth sidewall in the first direction,
wherein the first lead frame includes:
a first upper surface on which the first light emitting device is disposed and exposed on the bottom portion; and
a second upper surface extending from the first upper surface toward the first sidewall, exposed on the bottom portion and on which the first end of the first wire is disposed,
wherein the second lead frame includes:
a third upper surface on which the second light emitting device is disposed and exposed on the bottom portion; and
a fourth upper surface extending from the third upper surface toward the second sidewall, exposed on the bottom portion and on which the first end of the second wire is disposed,
wherein the first light emitting device is disposed closer to a center line passing from a center of the outer side of the third sidewall to a center of the outer side of the fourth sidewall than the outer side of the first sidewall,
wherein the second light emitting device is disposed closer to the center line than the outer side of the second sidewall,
wherein the center line extends from the center of the outer side of the third sidewall toward the center of the outer side of the fourth sidewall in the first direction,
wherein a length of the first upper surface in the first direction is longer than a length of the second upper surface in the first direction,
wherein a length of the third upper surface in the first direction is longer than a length of the fourth upper surface in the first direction,
wherein a length of the first upper surface in the second direction is longer than a length of the second upper surface in the second direction,
wherein a length of the third upper surface in the second direction is longer than a length of the fourth upper surface in the second direction, and
wherein a region of the body in the first direction corresponding to the center line is exposed to the bottom portion of the body and on which the plurality of lead frames are not exposed.

US Pat. No. 10,559,732

SURFACE-MOUNTED LIGHT-EMITTING DEVICE AND FABRICATION METHOD THEREOF

XIAMEN SANAN OPTO ELECTRO...

5. A method of fabricating a surface-mounted light-emitting diode (LED) light-emitting device, the method comprising:1) epitaxial growth: form an LED epitaxial structure over a growth substrate through epitaxial growth;
2) chip fabrication:
determine P and N electrode regions and an isolating region on a surface of the LED epitaxial structure; and
fabricate P and N electrode pads and an insulator over the P and N electrode regions and the isolating region, respectively on the surface of the LED epitaxial structure,
wherein the insulator fabricated on the surface of the LED epitaxial structure has opposite a first insulator surface and a second insulator surface,
wherein the first insulator surface is adjacent to the LED epitaxial structure and the second insulator surface extrudes beyond either of the second electrode surfaces of the P and N electrode pads to prevent the P and N electrode pads from short circuiting when directly applied in the SMT packaging;
wherein the P and N electrode pads have sufficient thicknesses to support the LED epitaxial structure, and the insulator is formed between the P and N electrode pads to prevent the P and N electrode pads from a short circuit;
remove the growth substrate and unitize the LED epitaxial structure to form a LED chip;
3) Surface-Mounted Technology (SMT) packaging:
provide a supporting substrate and directly mount the P and N electrode pads of the LED chip over the supporting substrate through SMT packaging to thereby form the surface-mounted LED light-emitting device;
wherein in step 3), the supporting substrate has a surface coated with a solder layer with a thickness smaller than or equal to a height difference between the second insulator surface and either of the second electrode surfaces of the P and N electrode pads, wherein the insulator extends through the solder layer and is in contact with the solder layer and the supporting substrate, wherein a distance between edges of the P and N electrode pads beyond that of the LED epitaxial structure is D, a minimum thickness of the P and N electrode pads is T, and wherein D/T is 0.5-2.

US Pat. No. 10,559,730

COLLIMATED LED LIGHT FIELD DISPLAY

APPLIED MATERIALS, INC., ...

1. A method of forming a light field display, comprising:forming a plurality of light emitting diodes from a patterned substrate, comprising:
depositing a resist layer on a surface of a substrate, the substrate comprising:
a structural base;
an active layer stack disposed on the structural base; and
a transparent conductive oxide layer disposed on the active layer stack;
patterning the resist layer; and
transferring the pattern formed in the resist layer to the transparent conductive oxide layer and to at least a portion of the active layer stack disposed therebeneath to form the patterned substrate; and
arranging one or more of the plurality of light emitting diodes beneath a light-directing feature of a plurality of light-directing features formed on a substrate panel, wherein each of the light-directing features and at least one of the one or more light emitting diodes positioned there beneath forms a pixel of angular resolution of the light field display.

US Pat. No. 10,559,726

LAYERED STRUCTURES AND QUANTUM DOT SHEETS AND ELECTRONIC DEVICES INCLUDING THE SAME

SAMSUNG ELECTRONICS CO., ...

1. A quantum dot sheet comprising:a photoconversion layer comprising a polymer matrix and a plurality of quantum dots dispersed in the polymer matrix; and
a layered structure comprising a first layer comprising a polymerization product of a monomer combination comprising a first monomer having at least two thiol groups at its terminal end and a second monomer having at least two carbon-carbon unsaturated bond-containing groups at its terminal end,
wherein the first monomer comprises a first thiol compound represented by Chemical Formula 1-1 comprising a thioglycolate moiety and a second thiol represented by Chemical Formula 1-2:

wherein in Chemical Formula 1-1,
L1 is a carbon atom, a substituted or unsubstituted C1 to C30 alkylene group, a substituted or unsubstituted C6 to C30 cycloalkylene group, a substituted or unsubstituted C6 to C30 arylene group, a substituted or unsubstituted C3 to C30 heteroarylene group, or a substituted or unsubstituted C3 to C30 heterocycloalkylene group,
Y1 is a single bond or a substituted or unsubstituted C1 to C4 alkylene group,
R1 is same or different and each independently hydrogen or C1 to C3 alkyl group,
n is an integer of 2 to 4,
L1 has a valence of at least n,

wherein in Chemical Formula 1-2,
L1 is a carbon atom, a substituted or unsubstituted C1 to C30 alkylene group, a substituted or unsubstituted C6 to C30 cycloalkylene group, a substituted or unsubstituted C6 to C30 arylene group, a substituted or unsubstituted C3 to C30 heteroarylene group, or a substituted or unsubstituted C3 to C30 heterocycloalkylene group,
Y2 is a single bond; —(OCH2CH2)m— (wherein m is an integer of 1 to 10), sulfonyl (—S(?O)2—), carbonyl (—C(?O)—), ether (—O—), sulfide (—S—), sulfoxide (—S(?O)—), ester (—C(?O)O—), amide (—C(?O)NR—) (wherein R is hydrogen or a C1 to C10 linear or branched alkyl group), —RB— [wherein R is a C1 to C20 substituted or unsubstituted divalent linear or branched alkylene group, a C1 to C20 substituted or unsubstituted divalent linear or branched alkylene group having at least one methylene replaced with sulfonyl (—S(?O)2—), carbonyl (—C(?O)—), ether (—O—), sulfide (—S—), sulfoxide (—S(?O)—), ester (—C(?O)O—), amide (—C(?O)NR—) (wherein R is hydrogen or a C1 to C10 linear or branched alkyl group), or a combination thereof, or —(OCH2CH2)m— (wherein m is an integer of 1 to 10) and B is sulfonyl (—S(?O)2—), carbonyl (—C(?O)—), ether (—O—), sulfide (—S—), sulfoxide (—S(?O)—), ester (—C(?O)O—), amide (—C(?O)NR—) (wherein R is hydrogen or a C1 to C10 linear or branched alkyl group), or a combination thereof], or a combination thereof,
A is a C2 to C4 divalent alkylene group,
n is an integer of 2 to 4,
L1 has a valence of at least n; and
the second monomer comprises an ene compound represented by Chemical Formula 2:

wherein in Chemical Formula 2,
X is —CR?CR2 or —C?CR (wherein R is each independently hydrogen or a C1 to C3 alkyl group),
R2 is selected from hydrogen; a substituted or unsubstituted C1 to C30 linear or branched alkyl group; a substituted or unsubstituted C6 to C30 aryl group; a substituted or unsubstituted C3 to C30 heteroaryl group; a substituted or unsubstituted C3 to C30 cycloalkyl group; a substituted or unsubstituted C3 to C30 heterocycloalkyl group; a C1 to C10 alkoxy group; a hydroxy group; —NH2; a substituted or unsubstituted alkyl amine group (—NRR?, wherein R and R? are independently hydrogen or a C1 to C30 linear or branched alkyl group provided that both of R and R? cannot be hydrogen at the same time); an isocyanate group; a halogen; —ROR? (wherein R is a substituted or unsubstituted C1 to C20 alkylene group and R? is hydrogen or a C1 to C20 linear or branched alkyl group); an acyl halide (—RC(?O)X, wherein R is a substituted or unsubstituted alkylene group and X is a halogen); —C(?O)OR? (wherein R? is hydrogen or a C1 to C20 linear or branched alkyl group); —CN; —C(?O)ONRR? (wherein R and R? are independently hydrogen or a C1 to C20 linear or branched alkyl group); or a combination thereof,
L2 is a carbon atom, a substituted or unsubstituted C1 to C30 alkylene group, a substituted or unsubstituted C6 to C30 cycloalkylene group, a substituted or unsubstituted C6 to C30 arylene group, a substituted or unsubstituted C3 to C30 heteroarylene group, or a substituted or unsubstituted C3 to C30 heterocycloalkylene group,
Y2 is a single bond; a substituted or unsubstituted C1 to C30 alkylene group; a substituted or unsubstituted C2 to C30 alkenylene group; or a C1 to C30 alkylene group or a C2 to C30 alkenylene group wherein at least one methylene (—CH2—) group is replaced by sulfonyl (—S(?O)2—), carbonyl (—C(?O)—), ether (—O—), sulfide (—S—), sulfoxide (—S(?O)—), ester (—C(?O)O—), amide (—C(?O)NR—) (wherein R is hydrogen or a C1 to C10 linear or branched alkyl group), imine (—NR—) (wherein R is hydrogen or a C1 to C10 linear or branched alkyl group), or a combination thereof,
n is an integer of 1 or more,
k3 is an integer of 0 or more,
k4 is an integer of 1 or more, and
the sum of n and k4 is an integer of 3 or more,
provided that n does not exceed the valence of Y2, and
provided that the sum of k3 and k4 does not exceed the valence of L2, and
wherein the layered structure is disposed on at least one surface of the photoconversion layer, wherein the at least one surface of the photoconversion layer faces a surface of the first layer of the layered structure.

US Pat. No. 10,559,725

LIGHT EMITTING DEVICE

NICHIA CORPORATION, Anan...

1. A light emitting device comprising:a light emitting element having a peak emission wavelength in a range of 410 nm to 440 nm; and
a phosphor member, the phosphor member containing a phosphor comprising:
a first phosphor having a peak emission wavelength in a range of 430 nm to 500 nm and containing an alkaline-earth phosphate, which includes Cl and is activated with Eu;
a second phosphor having a peak emission wavelength in a range of 440 nm to 550 nm and containing at least one of an alkaline-earth aluminate, which is activated with Eu, and a silicate, which includes Ca, Mg, and Cl and is activated with Eu;
a third phosphor having a peak emission wavelength in a range of 500 nm to 600 nm and containing a rare-earth aluminate, which is activated with Ce;
a fourth phosphor having a peak emission wavelength in a range of 610 nm to 650 nm and containing a silicon nitride, which includes Al and at least one of Sr and Ca and is activated with Eu; and
a fifth phosphor having a peak emission wavelength in a range of 650 nm to 670 nm and containing a fluorogermanate, which is activated with Mn, wherein a percentage content of the first phosphor to a total content of the phosphor is in a range of 20 mass % to 80 mass %, and wherein when the light emitting device is configured to emit light of correlated color temperature in a range of 5,500 K to 7,500 K, and a ratio of peak optical intensity of the first phosphor to the light emitting element is in a range of 0.4 to 1.5;
when the light emitting device is configured to emit light of correlated color temperature in a range of 4,500 K to 5,500 K, and a ratio of peak optical intensity of the first phosphor to the light emitting element is in a range of 0.4 to 1.5;
when the light emitting device is configured to emit light of correlated color temperature in a range of 3,500 K to 4,500 K, and a ratio of peak optical intensity of the first phosphor to the light emitting element is in a range of 0.3 to 1.3; and
when the light emitting device is configured to emit light of correlated color temperature in a range of 2,500 K to 3,500 K, and a ratio of peak optical intensity of the first phosphor to the light emitting element is in a range of 0.2 to 1.4;
wherein the light emitting device is configured to emit light with a sum of special color rendering Indices R9 to R15 of 600 or greater.

US Pat. No. 10,559,724

LIGHT EMITTING DEVICE AND METHOD OF MANUFACTURING SAME

NICHIA CORPORATION, Anan...

1. A light emitting device comprising:a light emitting element including a light extraction surface, an electrode-formed surface on a side opposite to the light extraction surface, lateral surfaces positioned between the light extraction surface and the electrode-formed surface, and a pair of electrodes on the electrode-formed surface;
a reflective member covering the lateral surfaces of the light emitting element, the part of the pair of the electrodes being exposed from the reflective member;
a first light-transmissive member arranged at least between lateral surfaces of the light emitting element and the reflective member, the first light-transmissive member being in contact with the lateral surfaces of the light emitting element;
a covering member including a lens portion on an upper surface thereof, the covering member covering the light emitting element and the reflective member;
a wavelength conversion member arranged over the light extraction surface of the light emitting element, the wavelength conversion member including a light-transmissive portion; and
a second light-transmissive member arranged between the wavelength conversion member and the covering member with an outer edge of the second light-transmissive member being disposed on an outer side of an outer edge of the light-transmissive portion of the wavelength conversion member, as seen in a plan view, a thickness of the second light-transmissive member as measured between the wavelength conversion member and the covering member being smaller than a thickness of the wavelength conversion member.

US Pat. No. 10,559,722

LIGHT-EMITTING DEVICE

CITIZEN ELECTRONICS CO., ...

1. A light-emitting device comprising:a planar lead frame configured from first and second metal portions which are spaced apart from each other with an insulating resin interposed therebetween;
light-emitting elements mounted on the first metal portion and electrically connected by wires to the first and second metal portions;
a first resin frame disposed on the lead frame so as to enclose the light-emitting elements;
a sealing resin containing a phosphor for converting a wavelength of light emitted from the light-emitting elements, the sealing resin being filled into a region on the lead frame enclosed by the first resin frame to seal the light-emitting elements; and
a second resin frame being harder than the first resin frame and covering an outer surface of the first resin frame at an outer edge of the lead frame.

US Pat. No. 10,559,712

QUANTUM DOTS AND DEVICES INCLUDING THE SAME

SAMSUNG ELECTRONICS CO., ...

1. A core-shell quantum dot including at least two different halogens,the core-shell quantum dot comprising:
a core comprising a first semiconductor nanocrystal; and
a shell disposed on the core, the shell comprising a crystalline or amorphous material,
wherein the core-shell quantum dot does not include cadmium,
wherein a solid state photoluminescence quantum efficiency of the core-shell quantum dot, when measured at 90° C. or greater, is greater than or equal to about 95% of a solid state photoluminescence quantum efficiency of the core-shell quantum dot when measured at 25° C., and
wherein the at least two different halogens comprise fluorine and at least one of chlorine, bromine, and iodine.

US Pat. No. 10,559,697

SEMICONDUCTOR DEVICE, MANUFACTURING METHOD OF THE SEMICONDUCTOR DEVICE, OR DISPLAY DEVICE INCLUDING THE SEMICONDUCTOR DEVICE

Semiconductor Energy Labo...

1. A semiconductor device comprising a transistor,wherein the transistor comprises:
a first gate electrode,
a first insulating film over the first gate electrode,
an oxide semiconductor film over the first insulating film,
a source electrode over the oxide semiconductor film,
a drain electrode over the oxide semiconductor film,
a second insulating film over the oxide semiconductor film, the source electrode, and the drain electrode, and
a second gate electrode over the second insulating film,
wherein the first insulating film comprises a first opening,
wherein a single layer connection electrode electrically connected to the first gate electrode through the first opening is formed over the first insulating film,
wherein the second insulating film comprises a second opening that reaches the single layer connection electrode,
wherein the second gate electrode comprises an oxide conductive film, and a single layer metal film over the oxide conductive film,
wherein the single layer connection electrode and the second gate electrode are electrically connected to each other, and
wherein the single layer metal film is in direct contact with the single layer connection electrode.

US Pat. No. 10,559,695

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Semiconductor Energy Labo...

1. A semiconductor device comprising:a gate electrode;
a gate insulating layer over the gate electrode;
a first oxide semiconductor layer over the gate insulating layer, the first oxide semiconductor layer having a first carrier concentration;
a second oxide semiconductor layer over the first oxide semiconductor layer, the second oxide semiconductor layer having a second carrier concentration;
a third oxide semiconductor layer over the first oxide semiconductor layer, the third oxide semiconductor layer having a third carrier concentration;
a fourth oxide semiconductor layer over the second oxide semiconductor layer, the fourth oxide semiconductor layer having a fourth carrier concentration;
a fifth oxide semiconductor layer over the third oxide semiconductor layer, the fifth oxide semiconductor layer having a fifth carrier concentration;
an insulating layer over and in contact with the first oxide semiconductor layer;
a source electrode over and in contact with the fourth oxide semiconductor layer; and
a drain electrode over and in contact with the fifth oxide semiconductor layer,
wherein an inner edge of the second oxide semiconductor layer and an inner edge of the third oxide semiconductor layer are over the insulating layer,
wherein an inner edge of the source electrode is deviated from an inner edge of the fourth oxide semiconductor layer and the inner edge of the second oxide semiconductor layer,
wherein an inner edge of the drain electrode is deviated from an inner edge of the fifth oxide semiconductor layer and the inner edge of the third oxide semiconductor layer,
wherein each of the first to fifth oxide semiconductor layers contains indium, gallium, and zinc,
wherein the second carrier concentration is higher than the first carrier concentration and lower than the fourth carrier concentration, and
wherein the third carrier concentration is higher than the first carrier concentration and lower than the fifth carrier concentration.

US Pat. No. 10,559,689

CRYSTALLIZED SILICON CARBON REPLACEMENT MATERIAL FOR NMOS SOURCE/DRAIN REGIONS

Intel Corporation, Santa...

16. A method of forming an integrated circuit, the method comprising:forming a semiconductor body, the semiconductor body comprising one of a fin, nanowire, or nanoribbon;
forming a gate structure at least above and adjacent sides of at least a portion of the semiconductor body, the gate structure including a gate electrode and a gate dielectric between the gate electrode and the at least a portion of the semiconductor body;
forming a source trench to one side of the gate structure, the source trench corresponding to a source region;
forming a drain trench to another side of the gate structure, the drain trench corresponding a drain region;
depositing in both of the source trench and the drain trench an amorphous alloy of silicon, germanium, and carbon, wherein the carbon concentration is at least 5 atomic percent; and
crystallizing the amorphous alloy of silicon, germanium, and carbon, the crystallizing applying a tensile strain to the at least a portion of the semiconductor body.

US Pat. No. 10,559,678

CASCODE CIRCUIT HAVING A GATE OF A LOW-SIDE TRANSISTOR COUPLED TO A HIGH-SIDE TRANSISTOR

SEMICONDUCTOR COMPONENTS ...

1. A cascode circuit comprising:a high-side transistor including a source, a gate, and a body; and
a low-side transistor including a drain, a source, and a gate; and
a first coupling element having a first terminal and a second terminal,
wherein:
the source of the high-side transistor is coupled to the drain of the low-side transistor,
the gate of the high-side transistor is coupled to the source of the low-side transistor,
the body of the high-side transistor is coupled to the gate of the low-side transistor,
the first terminal of the first coupling element is electrically connected to the gate of the high-side transistor,
the second terminal of the first coupling element is electrically connected to the source of the low-side transistor, and
the first coupling element includes an impendence element, a charge storage element, or an electrical connection.

US Pat. No. 10,559,675

STACKED SILICON NANOTUBES

INTERNATIONAL BUSINESS MA...

1. A method for forming a semiconductor device, the method comprising: forming one or more stacked nanowires comprising a sacrificial material over a substrate, the sacrificial material comprising a first type of semiconductor material; forming a pull-out layer around each of the one or more stacked nanowires; reacting the pull-out layer with the first type of semiconductor material to form a silicon-rich layer on a surface of each of the one or more stacked nanowires; and removing the sacrificial material to define one or more hollow nanotubes comprising the silicon-rich layer.

US Pat. No. 10,559,666

DEVICE ISOLATION USING PREFERENTIAL OXIDATION OF THE BULK SUBSTRATE

INTERNATIONAL BUSINESS MA...

1. A structure, comprising:a semiconductor substrate;
a semiconductor buffer layer disposed over the semiconductor substrate;
an oxide layer disposed over the buffer layer; and
a fin comprising a semiconductor material disposed over the oxide layer,
wherein the semiconductor material has an oxidation rate different from an oxidation rate of the buffer layer, and
wherein a distance between a top surface of the oxide layer and a bottom surface of the buffer layer is more than a distance between a bottom surface of the fin and the bottom surface of the buffer layer.

US Pat. No. 10,559,662

HYBRID ASPECT RATIO TRAPPING

International Business Ma...

1. A semiconductor structure comprising:a material stack consisting of a silicon germanium alloy portion that is relaxed and defect-free and a semiconductor material pillar that is defect-free, wherein the silicon germanium alloy portion is in direct physical contact with a topmost surface of a semiconductor substrate and the semiconductor material pillar is in direct physically contact with a topmost surface of the silicon germanium alloy portion, and wherein an entirety of the semiconductor substrate extends beyond outermost sidewalls of the material stack; and
a dielectric material structure located laterally adjacent to the material stack and having a bottommost surface in direct contact with physically exposed portions of the topmost surface of the semiconductor substrate, wherein the bottommost surface of the dielectric material stack is coplanar with a bottommost surface of the silicon germanium alloy portion of the material stack that forms an interface with the topmost surface of the semiconductor substrate.

US Pat. No. 10,559,659

POWER SEMICONDUCTOR DEVICE

Mitsubishi Electric Corpo...

1. A power semiconductor device comprising:a surface electrode disposed on a semiconductor substrate and through which a main current flows;
a first metal layer that is disposed on the surface electrode and is not a sintered compact; and
at least one second metal layer that is disposed on the first metal layer and is a sintered compact,
wherein the second metal layer has a size to cover all the surface electrode in plan view, and has higher heat conductivity than the first metal layer,
wherein the first metal layer is wider in the plan view than the second metal layer, and
wherein the first metal layer is disposed between the second metal layer and the surface electrode.

US Pat. No. 10,559,654

NANOSHEET ISOLATION FOR BULK CMOS NON-PLANAR DEVICES

International Business Ma...

1. A semiconductor structure comprising:a semiconductor substrate including a first device region and a second device region, wherein first trench isolation structures surround said first and second device regions and extend below first and second pedestal portions of said semiconductor substrate;
a first semiconductor material fin stack located above said first pedestal portion of said semiconductor substrate;
a second semiconductor material fin stack located above said second pedestal portion of said semiconductor substrate; and
second trench isolation structures located at ends of each first semiconductor material fin stack and said second semiconductor material fin stack, wherein a portion of one of said second trench isolation structures is located directly between a bottommost surface of said first semiconductor material fin stack and said first pedestal portion of said semiconductor substrate and another of said second trench isolation structures is located directly between a bottommost surface of said second semiconductor material fin stack and said second pedestal portion of said semiconductor substrate, and wherein said first trench isolation structures have a depth that is greater than a depth of said second trench isolation structures.

US Pat. No. 10,559,651

METHOD OF FORMING MEMORY CAPACITOR

UNITED MICROELECTRONICS C...

1. A method of forming a memory capacitor, comprising:providing a substrate, which comprises a plurality of storage node contacts;
forming a patterned supporting structure on the substrate, wherein the patterned supporting structure comprises a plurality of openings, each of which corresponding to each of the storage node contacts;
forming a bottom electrode layer on the patterned supporting layer, wherein the bottom electrode layer is conformally formed on the patterned supporting layer and sidewalls and bottom surfaces of the openings, and contacting the storage node contacts;
forming a sacrificial layer on the bottom electrode layer, wherein the sacrificial layer is filled into the openings, wherein before the soft etching process, a bottom surface of the sacrificial layer is lower than a top surface of the patterned supporting layer;
performing a soft etching process for removing the bottom electrode layer on the patterned supporting layer and partials of sidewalls of the openings, wherein said soft etching process comprises using a fluoride containing compound, a nitrogen and hydrogen containing compound and an oxygen containing compound;
completely removing the sacrificial layer;
removing partials of the patterned supporting layer;
forming a capacitor dielectric layer on the bottom electrode layer; and
forming a top electrode layer on the capacitor dielectric layer.

US Pat. No. 10,559,648

CHIP RESISTOR AND CHIP RESISTOR ASSEMBLY

SAMSUNG ELECTRO-MECHANICS...

1. A chip resistor, comprising:a base substrate having a first surface and a second surface opposing each other, two side surfaces connecting the first surface and the second surface, and two end surfaces connecting the first surface and the second surface;
a resistive layer disposed on the second surface of the base substrate, the resistive layer having a first surface in contact with the base substrate and a second surface opposing the first surface of the resistive layer;
a first terminal and a second terminal spaced apart from each other and each being connected to the resistive layer on the second surface of the resistive layer; and
a third terminal connected to the resistive layer on the second surface of the resistive layer, disposed between the first terminal and the second terminal, and extending to the first surface of the base substrate along the side surfaces,
wherein the third terminal includes a first surface portion disposed on the first surface of the base substrate, and the first surface portion is divided into two portions extended from the two side surfaces.

US Pat. No. 10,559,642

ORGANIC LIGHT-EMITTING DEVICE HAVING A FLUORIDE AND METAL BASED INTERMEDIATE LAYER AND PRODUCTION METHOD

JOLED INC., Tokyo (JP)

2. An organic light-emitting device, comprising:a substrate;
an anode disposed above the substrate;
a wiring disposed above the substrate, the wiring being spaced away from the anode in a direction parallel to a main surface of the substrate;
a light-emitting layer disposed above the anode and containing an organic light-emitting material;
an intermediate layer disposed on the light-emitting layer and above the wiring, the intermediate layer being continuous over the light-emitting layer and the wiring and containing a fluoride of a first metal, the first metal being an alkali metal or an alkaline earth metal;
an organic functional layer disposed on the intermediate layer, the organic functional layer being continuous over the light-emitting layer and the wiring and made of an organic material doped with a second metal, the organic material having at least one of an electron transporting property and an electron injection property, the second metal having a property of cleaving a bond between the first metal and fluorine in the fluoride of the first metal; and
a cathode disposed on the organic functional layer, the cathode being continuous over the light-emitting layer and the wiring, wherein
1?x?2, 20?y?40, and y?20x, where
x denotes a film thickness [nm] of the intermediate layer and y denotes a dope concentration [wt %] of the second metal in the organic functional layer.

US Pat. No. 10,559,641

MULTIPLE SUBTHRESHOLD SWING CIRCUIT AND APPLICATION TO DISPLAYS AND SENSORS

International Business Ma...

1. A three-terminal apparatus, comprising:a field-effect transistor (FET) comprising:
a first layer comprising silicon having a first type of carrier as its majority carrier;
a gate comprising a second layer formed on the first layer, the second layer comprising intrinsic amorphous hydrogenated silicon, a third layer formed on the second layer, the third layer comprising amorphous hydrogenated silicon having a second type of carrier as its majority carrier, and a conductive layer formed on the third layer; and
drain and source terminals, each of the drain and source terminals comprising a fourth layer formed on the first layer, the fourth layer comprising crystalline hydrogenated silicon having the first type of carrier as its majority carrier, and a conductive layer formed on the fourth layer; and
a set of one or more serially-connected diodes, each diode having first and second terminals, wherein the first terminal of a first diode in the set of one or more serially-connected diodes is connected to the source terminal of the FET;
wherein the gate of the FET forms a first terminal of the three-terminal apparatus, the drain terminal of the FET forms a second terminal of the three-terminal apparatus, and the second terminal of a last diode in the set of one or more serially-connected diodes forms a third terminal of the three-terminal apparatus, the first, second and third terminals of the three-terminal apparatus being independently controllable relative to one another; and
wherein a subthreshold swing of the three terminal apparatus is higher than a subthreshold swing of the FET by a factor proportional to a sum of ideality factors of the set of one or more serially-connected diodes.

US Pat. No. 10,559,639

ORGANIC LIGHT-EMITTING DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME

SHENZHEN CHINA STAR OPTOE...

1. A method for manufacturing an organic light-emitting display device, comprising steps of:providing a substrate;
forming a first patterned metal layer on the substrate, wherein the patterned metal layer comprises a gate of a switching thin film field-effect transistor and a gate of a driving thin film field-effect transistor;
forming a gate insulating layer having a first via hole on the first patterned metal layer;
forming a first indium-gallium-zinc oxide layer on the gate insulating layer, wherein the first indium-gallium-zinc oxide layer comprises a first active layer for reducing a sub-threshold swing of a transfer characteristic curve of the switching thin film field-effect transistor;
forming a second indium-gallium-zinc oxide layer on the first active layer and the gate insulating layer, wherein the second indium-gallium-zinc oxide layer comprises a third active layer and a second active layer for increasing a sub-threshold swing of a transfer characteristic curve of the driving thin film field-effect transistor;
forming a second patterned metal layer on the second indium-gallium-zinc oxide layer, wherein the second patterned metal layer comprises a source and a drain of the switching thin film field-effect transistor and a source and a drain of the driving thin film field-effect transistor, and the source of the switching thin film field-effect transistor is connected with the gate of the driving thin film field-effect transistor through the first via hole;
forming a passivation layer having a second via hole on the second patterned metal layer; and forming a third metal layer on the passivation layer, wherein the third metal layer comprises a pixel electrode connecting with the source of the driving thin film field-effect transistor through the second via hole,
wherein an oxygen content of the second indium-gallium-zinc oxide layer is greater than that of the first indium-gallium-zinc oxide laver.

US Pat. No. 10,559,631

METHOD OF MANUFACTURING A DISPLAY DEVICE UTILIZING PIXEL AND DUMMY PORTIONS

Samsung Display Co., Ltd....

1. A method for manufacturing a display device, the method comprising:preparing a first mother substrate;
preparing a second mother substrate having a plurality of unit areas divided by an imaginary line;
forming a pixel portion at the unit areas;
forming a dummy portion along the imaginary line;
bonding the first mother substrate and the second mother substrate with an interlayer between the first mother substrate and the second mother substrate; and
cutting the first mother substrate and the second mother substrate along the imaginary line,
wherein at least a portion of the pixel portion and at least a portion of the dummy portion are formed by a same process.

US Pat. No. 10,559,626

NEUROMORPHIC DEVICE INCLUDING A SYNAPSE HAVING CARBON NANO-TUBES

SK hynix Inc., Icheon (K...

1. A neuromorphic device comprising:a pre-synaptic neuron;
a row line extending in a row direction from the pre-synaptic neuron;
a post-synaptic neuron;
a column line extending in a column direction from the post-synaptic neuron; and
a synapse disposed at an intersection between the row line and the column line,
wherein the synapse comprises:
a first synapse layer including a plurality of first carbon nano-tubes;
a second synapse layer including a plurality of second carbon nano-tubes having different structures from the plurality of first carbon nano-tubes; and
a third synapse layer including a plurality of third carbon nano-tubes having different structures from the plurality of first carbon nano-tubes and the plurality of second carbon nano-tubes,
wherein the synapse further comprises a capping layer disposed on the first to third synapse layers,
wherein the capping layer comprises a plurality of horizontal carbon nano-tubes that are densely and horizontally arranged in the capping layer, the plurality of horizontal carbon nano-tubes being arranged denser than the pluralities of the first to third carbon nano-tubes, and
wherein the first synapse layer, the second synapse layer, the third synapse layer, and the capping layer are vertically stacked and horizontally disposed in parallel with each other.

US Pat. No. 10,559,615

METHODS FOR HIGH-DYNAMIC-RANGE COLOR IMAGING

OmniVision Technologies, ...

8. A method for generating high-dynamic-range images, comprising:partly absorbing first light propagating from a scene toward a plurality of first pixels of a photosensitive pixel array to attenuate the first light as compared to second light propagating from the scene toward a plurality of second pixels of the photosensitive pixel array, the plurality of second pixels being interleaved with the plurality of first pixels; and
after said partly absorbing, spectrally filtering the first light to form an attenuated color image of the scene on the photosensitive pixel array at the first pixels and spectrally filtering the second light to form a brighter color image of the scene on the photosensitive pixel array at the second pixels;
said spectrally filtering the first and second light including (a) spectrally filtering, with first color filters having a first thickness, first and second light propagating toward a first subset of the plurality of first pixels and the plurality of second pixels and (b) spectrally filtering, with second color filters having a second thickness, first and second light propagating toward a second subset of the plurality of first pixels and the plurality of second pixels, the second thickness exceeding the first thickness, the first color filters being configured to transmit longer wavelengths than the second color filters;
said partly absorbing including partly absorbing, with the same type of grey material, the first light propagating toward (a) the first pixels of the first subset and (b) the first pixels of the second subset, the grey material over the first pixels of the first subset being thinner than the grey material over the first pixels of the second subset to compensate for transmission of the grey material being an increasing function of wavelength.

US Pat. No. 10,559,614

DUAL CONVERSION GAIN CIRCUITRY WITH BURIED CHANNELS

SEMICONDUCTOR COMPONENTS ...

1. An image sensor pixel formed on a semiconductor substrate, the image sensor pixel comprising:a photodetector that generates charge in response to incident light;
a floating diffusion node that stores the charge;
a dual conversion gain capacitor;
a dual conversion gain switch that transfers the charge from the floating diffusion node to the dual conversion gain capacitor while the dual conversion gain switch is on; and
a buried channel in the semiconductor substrate that transfers the charge from the floating diffusion node to the dual conversion gain capacitor while the dual conversion gain switch is off.

US Pat. No. 10,559,612

SIGNAL PROCESSING CIRCUIT AND SEMICONDUCTOR DEVICE INCLUDING THE SIGNAL PROCESSING CIRCUIT

Semiconductor Energy Labo...

1. A semiconductor device comprising:a transistor; and
a back gate voltage control circuit;
wherein the transistor comprises a gate, a back gate and a channel formation region,
wherein the channel formation region comprises an oxide semiconductor, wherein the gate of the transistor is electrically connected to a wiring,
wherein the back gate of the transistor is electrically connected to the back gate voltage control circuit, and
wherein the back gate voltage control circuit is configured to apply a potential corresponding to a command to the back gate of the transistor.

US Pat. No. 10,559,611

IMAGE SENSOR

STMicroelectronics (Croll...

1. An image sensor including a plurality of pixels, each pixel comprising:a semiconductor substrate doped with a first dopant type;
a first insulated vertical electrode that delimits a photosensitive area doped with a second dopant type, wherein the first insulated vertical electrode is electrically connected to receive a first bias voltage;
a second insulated vertical electrode and a third insulated vertical electrode that delimit a charge storage area doped with said second dopant type, wherein the second and third insulated vertical electrodes are physically separate from each other but electrically connected to receive a second bias voltage;
wherein said first insulated vertical electrode and said third insulated vertical electrode extend parallel to each other with a first portion of said semiconductor substrate doped with the first dopant type positioned in contact with and extending between said first and third insulated vertical electrodes;
wherein the third insulated vertical electrode extends between the charge storage area and the photosensitive area; and
wherein the second insulated vertical electrode extends perpendicular to the third insulated vertical electrode at a first end of the third insulated vertical electrode to delimit a region for charge passage between the photosensitive area and the charge storage area in response to the second bias voltage.

US Pat. No. 10,559,603

DISPLAY PANEL AND DISPLAY APPARATUS THEREOF

SHANGHAI TIANMA MICRO-ELE...

1. A display panel, comprising:a display region;
a bonding region bonding a flexible circuit board with the display panel,
wherein the bonding region comprises a first surface located at a displaying side of the display panel and an opposing second surface,
the bonding region includes a plurality of first pins and a plurality of second pins,
the plurality of first pins are disposed at the first surface of the bonding region, and
the plurality of second pins are disposed at the second surface of the bonding region; and
a plurality of first transmission lines and a plurality of second transmission lines,
wherein a first transmission line of the plurality of first transmission lines is connected to a first pin of the plurality of first pins,
a distance between the first pin and the display region is a first distance,
a second transmission line of the plurality of second transmission lines is connected to a second pin of the plurality of second pins,
a distance between the second pin and the display region is a second distance,
the first distance is approximately equal to the second distance,
the second transmission line and the second pin are disposed on different film layers, and
the plurality of first transmission lines and the plurality of second transmission line transmit display signals.

US Pat. No. 10,559,602

DISPLAY DEVICE

Semiconductor Energy Labo...

1. A display device having a plurality of pixels, at least one of the plurality of pixels comprising:a transistor;
a pixel electrode;
a first insulating layer over the transistor and the pixel electrode, the first insulating layer having an opening through which part of the pixel electrode is exposed;
a second insulating layer on the first insulating layer and the part of the pixel electrode; and
a common electrode over the pixel electrode,
wherein the transistor is electrically connected to a signal line, a scan line, and the pixel electrode,
wherein the common electrode comprises:
a plurality of first regions provided parallel to each other, each of the plurality of first regions having a stripe pattern including a first bent portion and a second bent portion;
a second region being connected to ends of the plurality of first regions; and
a third region intersecting with the scan line and being connected to a common electrode in an adjacent pixel, and
wherein the third region does not overlap with the signal line.

US Pat. No. 10,559,597

DISPLAY PANEL AND DISPLAY DEVICE

WUHAN TIANMA MICRO-ELECTR...

20. A display device, comprising:a display panel comprising a display area and a non-display area surrounding the display area, wherein:
the display area is disposed with a plurality of data lines extending along a first direction; the display area has a notch, and a boundary of the display area is recessed into the display area in a second direction to form the notch; the second direction intersects with the first direction; and the non-display area includes a notched non-display area that surrounds the notch by substantially in half; and
the display panel includes:
a substrate layer;
an array layer located over the substrate layer, wherein the data lines are located at the array layer;
a display layer located at a side of the array layer away from the substrate layer, wherein the display layer includes a plurality of light emitting components;
an encapsulation cover located at a side of the display layer away from the array layer;
an encapsulant disposed between the array layer and the encapsulation cover, wherein the encapsulant is located in the non-display area and surrounds the display layer; and
an encapsulated metal located in the non-display area, wherein the encapsulated metal is disposed in the array layer; in a laser-sintering process of the encapsulant, the encapsulated metal is used for reflecting laser light; an orthographic projection of the encapsulated metal in the substrate layer has a non-closed pattern; and the encapsulated metal is undisposed in at least a portion of the notched non-display area.

US Pat. No. 10,559,596

DISPLAY DEVICE

INNOLUX CORPORATION, Chu...

1. A display device, comprising:a substrate;
a first metal layer, disposed on the substrate and having a first pinhole;
a second metal layer, disposed on the first metal layer and having a second pinhole;
a pixel electrode layer, disposed on the second metal layer; and
a light detecting element for detecting a light passing through the second pinhole and the first pinhole;
wherein a first edge of the first pinhole has a first slope, and a second edge of the second pinhole has a second slope, and the first slope and the second slope are different.

US Pat. No. 10,559,590

THREE-DIMENSIONAL SEMICONDUCTOR DEVICES

SAMSUNG ELECTRONICS CO., ...

1. A three-dimensional semiconductor device, comprising:a semiconductor substrate, an underlying layer on the semiconductor substrate,
and a first structure on the underlying layer;
an opening penetrating at least the first structure;
an insulating spacer on an inner wall of the opening;
a recessed hole disposed at a lower end of the opening and exposing a portion of the semiconductor substrate and a portion of the underlying layer;
and
a semiconductor pattern covering the insulating spacer in the opening and being in direct contact with an inner wall of the recessed hole, wherein
a bottom surface of the insulating spacer is positioned at a vertical level between top and bottom surfaces of the underlying layer, and
the bottom surface of the insulating spacer is spaced apart from a top surface of the semiconductor substrate.

US Pat. No. 10,559,586

SEMICONDUCTOR MEMORY DEVICE

Toshiba Memory Corporatio...

1. A semiconductor memory device, comprising:a semiconductor substrate comprising a termination region surrounding a device region thereof, the termination region comprising a first stacked body extending around the device region and including a first layer composed of an insulating material located on a surface of the semiconductor substrate, a second layer composed of a conductive material located over the first layer, and a third layer composed of an insulating material located over the second layer;
an opening extending through the first stacked body and extending around the device region;
a fourth layer, composed of an insulating material, located in the opening in the first stacked body and over the surface of the semiconductor substrate in the opening;
a fifth layer, composed of an insulating material, located over the fourth layer; and
a wall surrounding the device region, the wall extending inwardly of the opening and contacting one of the surface of the semiconductor substrate or a nitride material on the surface of the semiconductor substrate, wherein
the composition of the third and fifth layers is different from that of the first and fourth layers.

US Pat. No. 10,559,583

MEMORY DEVICE

Samsung Electronics Co., ...

1. A memory device comprising:a substrate having an upper surface and source regions at the upper surface;
a stack on the upper surface and including gate electrode layers, each of some of the gate electrode layers including unit electrodes and connecting electrodes, each of the unit electrodes extending longitudinally in a first direction, and each of the connecting electrodes disposed between a pair of the unit electrodes being closest to each other in a second direction and connecting the pair of the unit electrodes to each other;
first common source lines, each of the first common source lines connecting to a respective one of the source regions and extending longitudinally in the first direction to separate the stack into a plurality of blocks; and
second common source lines, each of the second common source lines connecting to a respective one of the source regions and extending longitudinally in the first direction, wherein
each of the second common source lines includes a first line and a second line separated in the first direction, by a respective one of the connecting electrodes, the first line and the second line in each of the second common source lines are disposed at the same position in the second direction,
the first lines included in a pair of the second common source lines being closest to each other in the second direction, in at least one of the plurality of blocks, have different lengths in the first direction,
in at least one of the plurality of blocks, two of the second lines have the same length in the first direction, and one of the second lines between the two of the second lines have a different length from the two of the second lines in the first direction, and
a distance between the first line and the second line included in one of the pair of the second common source lines is substantially the same with a distance between the first line and the second line included in another one of the pair of the second common source lines.

US Pat. No. 10,559,582

THREE-DIMENSIONAL MEMORY DEVICE CONTAINING SOURCE CONTACT TO BOTTOM OF VERTICAL CHANNELS AND METHOD OF MAKING THE SAME

SANDISK TECHNOLOGIES LLC,...

1. A three-dimensional memory device comprising:source-level material layers located over a substrate, the source-level material layers comprising a source contact layer;
an alternating stack of insulating layers and electrically conductive layers located over the source-level material layers;
memory stack structures extending through the alternating stack, wherein each of the memory stack structures comprises a memory film and a vertical semiconductor channel having a bottom surface that contacts a respective horizontal surface of the source contact layer; and
dielectric pillar structures embedded within the substrate-level material layers and located between the memory stack structures.

US Pat. No. 10,559,580

SEMICONDUCTOR MEMORY DEVICE

Samsung Electronics Co., ...

1. A semiconductor memory device comprising:a substrate;
insulating patterns and gate patterns alternately stacked on the substrate;
a channel structure that intersects the insulating patterns and the gate patterns and that is connected to the substrate;
a charge storage structure that is between the channel structure and the gate patterns; and
a contact structure that is on the substrate at a side of the insulating patterns and the gate patterns,
wherein at least one of the gate patterns comprises:
a first barrier pattern that is between a first insulating pattern of the insulating patterns and a second insulating pattern of the insulating patterns that is adjacent the first insulating pattern in a first direction perpendicular to a main surface of the substrate, the first barrier pattern defining a concave region that is between a first portion of the first barrier pattern that extends along the first insulating pattern, a second portion of the first barrier pattern that extends along the second insulating pattern, and a third portion of the first barrier pattern that extends between the first portion and the second portion; and
a metal pattern that is in the concave region defined by the first barrier pattern and is between the third portion of the first barrier pattern and the charge storage structure.

US Pat. No. 10,559,579

ASSEMBLIES HAVING VERTICALLY-STACKED CONDUCTIVE STRUCTURES

Micron Technology, Inc., ...

1. An assembly, comprising:a stack comprising first and second levels; the first levels comprising insulative material, and the second levels comprising conductive material;
insulative panel structures extending through the stack;
the conductive material within the second levels having outer edges; the outer edges having proximal regions near the insulative panel structures and distal regions spaced from the insulative panel structures by the proximal regions; and
interface material along the outer edges of the conductive material, the interface material having a first composition along the proximal regions of the outer edges, and having a second composition along the distal regions of the outer edges; the first composition being different than the second composition.

US Pat. No. 10,559,570

SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF

UNITED MICROELECTRONICS C...

1. A semiconductor memory device, comprising:a semiconductor substrate;
bit line structures disposed on the semiconductor substrate, wherein each of the bit line structures is elongated in a first direction, and the bit line structures are repeatedly disposed in a second direction, wherein the second direction is substantially orthogonal to the first direction;
storage node contacts disposed on the semiconductor substrate, wherein each of the storage node contacts is disposed between two of the bit line structures disposed adjacent to each other in the second direction;
isolation structures disposed on the semiconductor substrate, wherein each of the isolation structures is disposed between two of the bit line structures disposed adjacent to each other in the second direction, each of the storage node contacts is disposed between two of the isolation structures disposed adjacent to each other in the first direction, and each of the isolation structures comprises two first portions and a second portion disposed between the two first portions in the second direction, wherein each of the first portions is elongated in the first direction and partially disposed between one of the bit line structures disposed adjacent to the isolation structure and one of the storage node contacts disposed adjacent to the isolation structure in the second direction, wherein each of the first portions is disposed between the second portion and one of the bit line structures disposed adjacent to the isolation structure in the second direction; and
a plurality of word line structures having extending direction thereof in the second direction.

US Pat. No. 10,559,563

METHOD FOR MANUFACTURING MONOLITHIC THREE-DIMENSIONAL (3D) INTEGRATED CIRCUITS

Taiwan Semiconductor Manu...

1. A method for manufacturing an integrated circuit (IC), the method comprising:forming a first interlayer dielectric (ILD) layer over a semiconductor substrate, while also forming first vias and first interconnect wires alternatingly stacked in the first ILD layer;
transferring a first doping-type layer and a second doping-type layer to a top surface of the first ILD layer, wherein the first and second doping-type layers are stacked and are semiconductor materials with opposite doping types;
patterning the first and second doping-type layers to form a first doping-type wire and a second doping-type wire overlying the first doping-type wire; and
forming a gate electrode straddling the first and second doping-type wires, wherein the gate electrode and the first and second doping-type wires at least partially define a junctionless semiconductor device (JSD).

US Pat. No. 10,559,560

SEMICONDUCTOR ELECTROSTATIC DISCHARGE PROTECTION DEVICE

NANYA TECHNOLOGY CORPORAT...

1. A semiconductor electrostatic discharge (ESD) protection device comprising:a substrate comprising a first conductivity type;
a gate disposed on the substrate;
a source region and a drain region disposed in the substrate, the source region and the drain region comprising a second conductivity type complementary to the first conductivity type;
a body region disposed in the substrate, the body region comprising the first conductivity type, wherein the drain region is formed between the gate and the body region; and
an isolation structure formed in the substrate, the body region being separated from the drain region by the isolation structure;
wherein the body region is electrically connected to the gate;
wherein the drain region is electrically connected to a first pad;
wherein the gate is electrically connected to the first pad through a capacitor; and
wherein the body region is electrically coupled to a line formed between the gate and the capacitor.

US Pat. No. 10,559,553

POWER MODULE

General Electric Company,...

1. A power module, comprising:a plurality of conductive traces disposed on a first portion of a surface and a second portion of the surface, wherein the first portion is opposite the second portion; and
a bus bar structure comprising:
a first bus bar having a first plurality of tabs extending away from the first bus bar, wherein each tab of the first plurality of tabs is electrically coupled to a respective conductive trace of the plurality of conductive traces disposed on the first portion of the surface, and wherein the first bus bar comprises a first terminal disposed on a first side of a transversal axis;
a second bus bar having a second plurality of tabs extending away from the second bus bar, wherein each tab of the second plurality of tabs is electrically coupled to a respective conductive trace of the plurality of conductive traces disposed on the second portion of the surface, and wherein the second bus bar comprises a second terminal disposed on the first side of the transversal axis; and
a third bus bar having a third plurality of tabs extending away from the third bus bar, wherein at least one tab of the third plurality of tabs is electrically coupled to a respective conductive trace of the plurality of conductive traces disposed on the first portion of the surface and at least one tab of the third plurality of tabs is electrically coupled to a respective conductive trace of the plurality of conductive traces disposed on the second portion of the surface; wherein the third bus bar comprises a third terminal disposed on a second side of the transversal axis, and wherein the first side is opposite the second side.

US Pat. No. 10,559,552

SEMICONDUCTOR DEVICE COMPRISING PN JUNCTION DIODE AND SCHOTTKY BARRIER DIODE

ROHM CO., LTD., Kyoto (J...

1. A semiconductor device comprising:an insulating substrate;
a first conductive wiring provided on the insulating substrate;
a second conductive wiring provided on the insulating substrate and separated from the first conductive wiring;
a third conductive wiring provided on the insulating substrate and separated from the first and second conductive wirings, the second and third conductive wirings being arranged on the insulating substrate with the first conductive wiring interposed therebetween;
a MOSFET made of a semiconducting material that chiefly includes SiC, the MOSFET including a PN junction diode having a cathode connected to the first conductive wiring;
a diode having an operating voltage lower than an operating voltage of the PN junction diode, the diode having a cathode connected to the first conductive wiring;
a first bonding wire that connects an anode of the PN junction diode to the second conductive wiring;
a second bonding wire that connects an anode of the diode to the second conductive wiring, the second bonding wire having an inductance that is smaller than an inductance of the first bonding wire; and
a third bonding wire that connects a gate of the MOSFET to the third conductive wiring.

US Pat. No. 10,559,548

ANISOTROPIC CONDUCTIVE BONDING MEMBER, SEMICONDUCTOR DEVICE, SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR DEVICE PRODUCTION METHOD

FUJIFILM Corporation, To...

1. An anisotropic conductive bonding member comprising:an insulating base which is made of an inorganic material;
a plurality of conductive paths which are made of a conductive member, penetrate the insulating base in a thickness direction thereof, and are provided in a mutually insulated state; and
a pressure sensitive adhesive layer which is provided on a surface of the insulating base,
wherein each of the conductive paths has a protrusion protruding from the surface of the insulating base,
the protrusion of each of the conductive paths is buried in the pressure sensitive adhesive layer,
the pressure sensitive adhesive layer contains an antioxidant material and a polymer material, and
wherein in the pressure sensitive adhesive layer, the antioxidant material is eccentrically located on a side close to an interface between the protrusion of each of the conductive paths and the pressure sensitive adhesive layer.

US Pat. No. 10,559,546

PACKAGE ON PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAME

Taiwan Semiconductor Manu...

1. A semiconductor device comprising a solder ball, the solder ball comprising:a copper ball;
a layer of solder over an outer surface of the copper ball; and
an intermediate layer separating the copper ball and the layer of solder, wherein the intermediate layer has a first annular thickness on a first portion of the copper ball and has a second annular thickness on a second portion of the copper ball, the second annular thickness being greater than the first annular thickness.

US Pat. No. 10,559,540

FAN-OUT SEMICONDUCTOR PACKAGE

SAMSUNG ELECTRONICS CO., ...

1. A fan-out semiconductor package comprising:a first connection member having a through-hole;
a first semiconductor chip and a second semiconductor chip, the first semiconductor chip and the second semiconductor chip being disposed in the through-hole;
an encapsulant encapsulating the first semiconductor chip and the second semiconductor chip;
a second connection member disposed on at least one side of the first semiconductor chip and the second semiconductor chip and including a redistribution layer electrically connected to the first semiconductor chip and the second semiconductor chip; and
an insulating via extending through at least a portion of the first connection member in a thickness direction and being filled with an insulating material,
wherein the insulating via has a width smaller than that of the through-hole and is spaced apart from the through-hole.

US Pat. No. 10,559,538

POWER MODULE

MITSUBISHI ELECTRIC CORPO...

1. A power module which comprises a power semiconductor element mounted on a circuit board, and an adapter connected to a front-surface main electrode of the power semiconductor element,wherein the adapter includes a main-electrode wiring member which is connected to the front-surface main electrode of the power semiconductor element;
wherein the main-electrode wiring member includes: an element connection portion connected to the front-surface main electrode of the power semiconductor element; a board connection portion which is placed outside the element connection portion and connected to the circuit board; and a connector connection portion which is placed outside the element connection portion and connected to an external electrode through a connector,
wherein an opposite surface of the main-electrode wiring member, which is opposite to a surface of the main-electrode wiring member on which the element connection portion placed, is covered with a resin,
wherein the element connection portion of the main-electrode wiring member is covered with a gap sealing material,
wherein (i) a peripheral portion of the adapter, which extends from a facing portion of the adapter facing the circuit board and in a direction away from the circuit board, and (ii) the circuit board, are covered with a peripheral-portion sealing material, and
wherein the gap sealing material has heat resistance higher than that of the peripheral-portion sealing material.

US Pat. No. 10,559,534

CIRCUIT SUBSTRATE

Industrial Technology Res...

1. A circuit substrate, comprising:a dielectric layer;
a first conductive structure, comprising a first conductive circuit and a first conductive via, wherein the first conductive circuit is disposed on the dielectric layer, the first conductive via is disposed in the dielectric layer, and the first conductive circuit is connected to the first conductive via; and
a second conductive structure, comprising a second conductive circuit and a second conductive via, wherein the second conductive circuit is disposed in the dielectric layer, the second conductive circuit and the first conductive circuit of the first conductive structure are arranged with an interval, and the second conductive via surrounds the first conductive via with an interval,
wherein the second conductive structure has an extending portion, wherein the extending portion protrudes toward the first conductive via and does not contact the first conductive via.

US Pat. No. 10,559,532

LAYOUT TECHNIQUES FOR HIGH-SPEED AND LOW-POWER SIGNAL PATHS IN INTEGRATED CIRCUITS WITH SMALL CHANNEL DEVICES

QUALCOMM Incorporated, S...

1. An integrated circuit (IC) comprising:a plurality of layers, wherein at least a portion of the plurality of layers is configured to form a power/ground grid having odd-numbered metal layers and even-numbered metal layers, wherein a majority of traces of the even-numbered metal layers have a first orientation, and wherein a majority of traces of at least one of the odd-numbered metal layers are oriented parallel to the majority of the traces of the even-numbered metal layers, wherein the odd-numbered metal layers comprise a first metal layer (M1), a third metal layer (M3), and a fifth metal layer (M5), wherein M1 is disposed beneath M3, wherein M3 is disposed beneath M5, and wherein the even-numbered metal layers comprise a second metal layer (M2) disposed between M1 and M3, a fourth metal layer (M4) disposed between M3 and M5, and a sixth metal layer (M6) disposed above M5; and
one or more circuit components configured to use high-speed, low-power signals carried by one or more of the plurality of layers.

US Pat. No. 10,559,528

SEMICONDUCTOR DEVICE INCLUDING EXTERNAL TERMINAL GROUPS

Rohm Co., Ltd., Kyoto (J...

1. An electronic apparatus comprising:a semiconductor device, and
a bypass capacitor,
wherein the semiconductor device comprises:
an upper-side transistor,
a lower-side transistor, and
a plurality of external terminals arranged in a matrix at a bottom surface of a package,
wherein the plurality of external terminals include:
a first external terminal group connected to a first node of the upper-side transistor,
a second external terminal group connected to a second node of the upper-side transistor and a first node of the lower-side transistor,
a third external terminal group connected to a second node of the lower-side transistor, and
a fourth external terminal which does not belong to the first external terminal group, the second external terminal group or the third external terminal group, and
wherein the first external terminal group, the second external terminal group and the third external terminal group are laid out such that an arrangement pattern of the second external terminal group engages with at least one of an arrangement pattern of the first external terminal group or an arrangement pattern of the third external terminal group,
wherein the first external terminal group is connected to a power supply line which is outside the semiconductor device, and the third external terminal group is connected to a ground line which is outside the semiconductor device,
wherein the bypass capacitor is connected between the power supply line and the ground line outside the semiconductor device, and
wherein the fourth terminal is disposed neither between the first external terminal group and the bypass capacitor, nor between the third external terminal group and the bypass capacitor.

US Pat. No. 10,559,526

ELECTRO-LUMINESCENCE DISPLAY DEVICE AND DRIVER IC FILM UNIT FOR ELECTRO-LUMINESCENCE DISPLAY DEVICE

LG Display Co., Ltd., Se...

1. A driver IC film unit including:a flexible film;
a driver IC on a first surface of the flexible film and configured to receive an input signal and convert the input signal into an image signal for a display panel;
at least first to third pad units, on the first surface of the flexible film, configured to electrically connect the driver IC and the flexible film; and
at least first to third wire units, on the first surface of the flexible film, electrically connected to the at least first to third pad units,
wherein at least one wire unit among the at least first to third wire units is configured to be extended to a second surface facing the first surface via a first via hole passing through the flexible film, and is configured to include a cut portion of wire corresponding to an edge of the flexible film.

US Pat. No. 10,559,524

2-STEP DIE ATTACH FOR REDUCED PEDESTAL SIZE OF LAMINATE COMPONENT PACKAGES

TEXAS INSTRUMENTS INCORPO...

1. A method of assembling a semiconductor device, comprising:providing a leadframe (LF) strip having a plurality of LFs each with a plurality of laminate-supporting pedestals;
adding a first die attach (DA) material comprising an ultraviolet (UV)-curing DA material or a B-stage DA material on an outer edge of the plurality of pedestals;
adding a thermally-curing DA material on an area of the plurality of pedestals not occupied by the UV-curing DA material;
mounting a laminate component having bond pads on a top side with the top side up on the plurality of pedestals, and
thermally curing to cure the thermally-curing DA material.

US Pat. No. 10,559,522

INTEGRATED DIE PADDLE STRUCTURES FOR BOTTOM TERMINATED COMPONENTS

INTERNATIONAL BUSINESS MA...

1. A bottom terminated component comprising:a die paddle; and
at least one die paddle structure configured to prevent wicking into a respective thermal via of a printed circuit board, the at least one die paddle structure comprising:
a base defining an axis, the base having an axial thickness extending from the die paddle;
a contact surface configured to contact the printed circuit board at the thermal via of the printed circuit board to prevent wicking of solder into the respective thermal via; and
a positioning member tapered in an axial direction, the positioning member configured to enable positioning the bottom terminated component on a printed circuit the positioning member is, wherein the positioning member extends from the contact surface in an axial direction away from the base.

US Pat. No. 10,559,521

SEMICONDUCTOR DEVICE AND PROCESS FOR FABRICATING THE SAME

LAPIS SEMICONDUCTOR CO., ...

1. A stacked semiconductor device comprising:a daughter board having an upper surface and a lower surface, the daughter board including a plurality of bump electrodes that are fixed on the lower surface; and
a first semiconductor device electrically connected with the bump electrodes and fixed on the upper surface of the daughter board,
wherein the daughter board comprises
wires in the daughter board or on the upper surface of the daughter board, and
a plurality of terminal electrodes that are electrically connected with respective ones of the wires and are exposed to the upper surface of the daughter board,
wherein the first semiconductor device comprises
a first semiconductor substrate having one surface and another surface, the first semiconductor substrate including a circuit element on the one surface,
a multilayer wiring part on the one surface of the first semiconductor substrate,
a first insulating layer that covers the multilayer wiring part,
a plurality of through-type electrodes that pierce through the first semiconductor substrate from a specified depth of the multilayer wiring part, and that contact the first semiconductor substrate through an insulating film, and
protruding electrodes, each of which are electrically connected with respective ones of the through-type electrodes, and
wherein the bump electrodes are electrically connected with the through-type electrodes through the protruding electrodes, and are larger in diameter than the protruding electrodes and the through-type electrodes.

US Pat. No. 10,559,514

SEMICONDUCTOR DEVICE

FUJI ELECTRIC CO., LTD., ...

1. A semiconductor device comprising:a semiconductor substrate having a first main surface and a second main surface, and containing a semiconductor material that has a bandgap wider than that of silicon;
a first semiconductor layer of a first conductivity type provided in the semiconductor substrate;
a second semiconductor layer of a second conductivity type provided in the semiconductor substrate, the second semiconductor layer being closer to the first main surface than is the first semiconductor layer, the second semiconductor layer being in contact with the first semiconductor layer and exposed at the first main surface;
a first first-conductivity-type semiconductor region of the first conductivity type selectively provided in the second semiconductor layer;
a trench penetrating the first first-conductivity-type semiconductor region and the second semiconductor layer, and reaching the first semiconductor layer;
a gate insulating film provided in the trench, along an inner wall of the trench;
a gate electrode provided on the gate insulating film in the trench;
an interlayer insulating film provided on the first main surface of the semiconductor substrate and covering the gate insulating film and the gate electrode;
a contact hole penetrating the interlayer insulating film in a depth direction and reaching the first main surface of the semiconductor substrate;
a first electrode forming an ohmic contact with the first first-conductivity-type semiconductor region and the second semiconductor layer in the contact hole;
a terminal pin soldered to the first electrode via a plating film; and
a second electrode provided on the second main surface of the semiconductor substrate, wherein
the first electrode includes:
a first titanium nitride film provided separated from the first main surface of the semiconductor substrate exposed in the contact hole, the first titanium nitride film covering a part of the interlayer insulating film,
a silicide film forming the ohmic contact and provided on the first main surface of the semiconductor substrate exposed in the contact hole,
an aluminum-based metal film containing aluminum as a principal component and provided on the first main surface of the semiconductor substrate, from on the interlayer insulating film, the aluminum-based metal film covering the first titanium nitride film and the silicide film.

US Pat. No. 10,559,513

CIRCUIT BOARD AND PACKAGED CHIP

MEDIATEK INC., Hsinchu (...

1. A circuit board, comprising:an upper surface and a lower surface that are opposite to each other;
a plurality of heat sink bonding pads, disposed on the upper surface, and electrically insulated from one another, for electrically connecting to a heat sink;
a plurality of heat sink conductive pads, disposed on the lower surface, electrically insulated from one another, and electrically connected to the heat sink bonding pads, respectively; and
a circuit layer, comprising a plurality of heat sink traces, wherein the heat sink conductive pads are electrically connected to the heat sink bonding pads through the heat sink traces, respectively, and the heat sink traces are electrically insulated from one another.

US Pat. No. 10,559,510

MOLDED WAFER LEVEL PACKAGING

Semiconductor Components ...

1. An apparatus comprising:a metal layer;
a first semiconductor die having a first side and a second side that is opposite the first side, the first side of the first semiconductor die being disposed on the metal layer;
a second semiconductor die having a first side and a second side that is opposite the first side, the first side of the second semiconductor die being disposed on the metal layer, the metal layer electrically coupling the first side of the first semiconductor die with the first side of the second semiconductor die;
a molding compound at least partially encapsulating the metal layer, the first semiconductor die and the second semiconductor die;
a first electrical contact, the first electrical contact being to the second side of the first semiconductor die, the first electrical contact being disposed on a surface of the apparatus; and
a second electrical contact, the second electrical contact being to the second side of the second semiconductor die, the second electrical contact being disposed on the surface of the apparatus,
the metal layer including a groove disposed between the first semiconductor die and the second semiconductor die.

US Pat. No. 10,559,509

INSULATING SUBSTRATE AND SEMICONDUCTOR DEVICE USING SAME

Hitachi Metals, Ltd., To...

1. An insulating substrate comprising:a heat dissipation layer;
a wire layer;
a wire formed within the wire layer that is connected to a first semiconductor and a second semiconductor;
an insulating layer formed between the wire layer and the heat dissipation layer that electrically insulates the wire layer from the heat dissipation layer;
and
a resistance layer that is integrally formed with the wire from a paste including RuO2 and a glass powder, wherein a width and length of the resistance layer are adjusted to provide an equal resistance to an input gate of the first semiconductor and the second semiconductor.

US Pat. No. 10,559,503

METHODS, APPARATUS AND SYSTEM FOR A PASSTHROUGH-BASED ARCHITECTURE

GLOBALFOUNDRIES INC., Gr...

1. A finFET device, comprising:a first gate structure and a second gate structure on a semiconductor substrate;
a first active area contacting a first end of said first gate structure and contacting a first end of said second gate structure;
a second active area contacting a second end of said first gate structure and contacting a second end of said second gate structure; and
a self-aligned trench silicide (TS) structure configured to operatively couple said first active area to said second active area, wherein said TS structure is flush in height with said first gate structure and said second gate structure.

US Pat. No. 10,559,500

METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE WITH WIDER SIDEWALL SPACER FOR A HIGH VOLTAGE MISFET

RENESAS ELECTRONICS CORPO...

1. A manufacturing method of a semiconductor device, comprising the steps of:(a) providing a semiconductor substrate;
(b) forming a first gate electrode via a first gate insulating film and a second gate electrode via a second gate insulating film over the semiconductor substrate;
(c) forming first sidewall insulating films selectively formed on side surfaces of the first and second gate electrodes;
(d) forming a first insulating film over the semiconductor substrate to cover upper surfaces of the first and second gate electrodes and side surfaces of the first sidewall insulating films, the first insulating film having first portions on upper surfaces of the first and second gate electrodes and second portions on side surfaces of the first sidewall insulating films on the first and second gate electrode;
(e) forming second sidewall insulating films selectively formed on the second portions at the side surfaces of the second gate electrode;
(f) forming a second insulating film over the first insulating film and the second sidewall insulating film; and
(g) after the step (e), etching back the second insulating film, the second sidewall insulating films and the first insulating film to thereby form third sidewall insulating films having a first width which are formed on the side surfaces of the first gate electrode via the first sidewall insulating films and fourth sidewall insulating films having a second width which are formed on the side surfaces of the second gate electrode via the first sidewall insulating films,wherein the first width is smaller than the second width.

US Pat. No. 10,559,498

LOCATION-SPECIFIC LASER ANNEALING TO IMPROVE INTERCONNECT MICROSTRUCTURE

INTERNATIONAL BUSINESS MA...

1. A system for completing of annealing metal interconnect overburden layers on semiconductor devices being fabricated on a chip on a semiconductor wafer, comprising:a scanning electron microscope (SEM) equipped with an electron backscatter diffraction (EBSD) capability;
a laser;
a processor; and
a memory, the memory storing instructions to cause the processor to perform:
on a wafer having a metal interconnect overburden layer initially partially annealed, detecting and determining an orientation of early recrystallizing grains at specific locations on a top surface of the metal overburden layer, as implemented and controlled by the processor, using data from the SEM equipped with the EBSD capability;
determining whether the orientations of the early recrystallizing grains at the specific locations is desirable or undesirable, as executed by the processor; and
selectively performing a laser anneal of the metal interconnect overburden layer, as implemented and controlled by the processor, using the laser, in a manner that selectively promotes or inhibits grain orientations from growing at selective locations on the metal interconnect overburden layer.

US Pat. No. 10,559,491

FABRICATION OF VERTICAL TRANSPORT FIN FIELD EFFECT TRANSISTORS WITH A SELF-ALIGNED SEPARATOR AND AN ISOLATION REGION WITH AN AIR GAP

INTERNATIONAL BUSINESS MA...

1. A method of forming a vertical transport fin field effect transistor with self-aligned dielectric separators, comprising:foil ling two vertical fins on a bottom source/drain region;
forming an isolation channel through the bottom source/drain region into a substrate between the two vertical fins; and
forming an insulating plug in the isolation channel, wherein the insulating plug has a pinch-off void within the isolation channel that does not extend beyond the bottom source/drain region and the substrate, and a section of the insulating plug extends beyond the bottom source/drain region and the substrate.

US Pat. No. 10,559,490

DUAL-DEPTH STI CAVITY EXTENSION AND METHOD OF PRODUCTION THEREOF

GLOBALFOUNDRIES INC., Gr...

1. A device comprising:a multiple depth shallow trench isolation (STI) regions, wherein each of the multiple depth STI regions comprises: a top region having a vertical sidewall profile; and a bottom region having a width greater than or equal to the top region and a sidewall profile;
a first well in a portion of a substrate, the first well electrically isolated from the substrate;
a second well in a portion of the first well, the second well electrically isolated from the first well and the substrate;
a silicon-on-insulator (SOI) layer over a buried oxide (BOX) layer above the second well; and
the multiple depth STI regions, laterally separated, through the SOI layer and the BOX layer and in the substrate, wherein at least one of the multiple depth STI regions is deeper than other multiple depth STI regions,
wherein the multiple depth STI regions further comprise:
a first, second and third multiple depth STI regions, wherein the first and third multiple depth STI regions are deeper than the second well;
a silicon nitride (SiN) liner on sidewall portions of the top region of the first and third multiple depth STI regions;
an oxide layer in the bottom region and a portion of the top region of the first and third multiple depth STI regions; and
a high density plasma (HDP) or tetraethyl orthosilicate (TEOS) layer in remaining portion of the top region of the first and third multiple depth STI regions, the upper surface of the HDP or TEOS layer coplanar to the upper surface of the SOI layer.

US Pat. No. 10,559,489

APPARATUS FOR MANUFACTURING A DISPLAY DEVICE AND A MANUFACTURING METHOD THEREOF

SAMSUNG DISPLAY CO., LTD....

1. An apparatus for manufacturing a display device, comprising:a first jig including a first side, the first side having a concave groove for receiving a cover window, wherein the cover window includes a first planar portion, a first curved portion and a second curved portion, wherein the first and second curved portions are disposed at opposite ends of the first planar portion in a first direction;
a second jig including a planar side for receiving a display panel and provided to horizontally move in a second direction crossing the first direction, wherein when the second jig is moved in the second direction with the display panel on the planar side, the display panel is disposed between the first and second curved portions of the cover window; and
a pair of third jigs for supporting the first and second curved portions of the cover window.

US Pat. No. 10,559,487

WAFER DIVIDING METHOD AND DIVIDING APPARATUS

DISCO CORPORATION, Tokyo...

1. A wafer dividing method using a dividing apparatus, the dividing apparatus including a table adapted to suction hold a wafer through a heat-shrinkable tape of a work set, the work set having the tape attached to a ring frame to close an opening of the ring frame, the wafer being formed with division starting points along division lines and attached to the tape at the opening; a ring frame holding section adapted to hold the ring frame of the work set; a lifting unit adapted to relatively move the table and the ring frame holding section in a vertical direction for bringing them closer to and away from each other; and a heater adapted to heat the tape in a ring shape between an outer periphery of the wafer and an inner periphery of the ring frame of the work set, the table and the ring frame holding section being relatively moved respectively in an upward direction and a downward direction such as to be spaced away from each other by the lifting unit, in a state in which the work set is held by the ring frame holding section, to expand the tape at the opening and thereby to divide the wafer at the division starting points into chips, the water dividing method comprising:a holding step of holding the work set by the ring frame holding section;
a dividing step of relatively moving the table and the ring frame holding section away from each other by the lifting unit to expand the tape, and dividing the wafer at the division starting points to form a predetermined gap between the adjacent chips, after the holding step;
a tape holding step of suction holding that area of the expanded tape to which the wafer is adhered by the table, after the dividing step;
a ring tape expanding step of relatively moving the table and the ring frame holding section further away from each other, to expand the ring-shaped tape between the outer periphery of the wafer and the inner periphery of the ring frame, after the tape holding step; and
a fixing step of relatively moving the table and the ring frame holding section closer to each other by the lifting unit to slacken the ring-shaped tape and heating the ring-shaped tape by the heater, to heat shrink the ring-shaped tape and to fix the work set while maintaining the predetermined gap between the adjacent chips, after the ring tape expanding step.

US Pat. No. 10,559,479

SEMICONDUCTOR MANUFACTURING APPARATUS AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE

TOSHIBA MEMORY CORPORATIO...

1. A semiconductor manufacturing apparatus comprising:a lid member opposed to a surface of a semiconductor substrate;
a support member supporting the lid member;
an oxidation resistant member opposed to a back of the semiconductor substrate; and
an oxidizing system gas introducing member introducing an oxidizing system gas that oxidizes the back of the semiconductor substrate.

US Pat. No. 10,559,466

METHODS OF FORMING A CHANNEL REGION OF A TRANSISTOR AND METHODS USED IN FORMING A MEMORY ARRAY

Micron Technology, Inc., ...

1. A method of forming a channel region of a transistor, comprising:forming amorphous channel material over a substrate, the amorphous channel material having first and second opposing sides;
forming an insulator material adjacent the second side of the amorphous channel material below a crystallization temperature at and above which the amorphous channel material would become crystalline; and
subjecting the amorphous channel material having the insulator material there-adjacent to a temperature at or above the crystallization temperature to transform the amorphous channel material into crystalline channel material; and
the insulator material being formed directly against the second side of the amorphous channel material.

US Pat. No. 10,559,462

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING APPARATUS, AND RECORDING MEDIUM

Kokusai Electric Corporat...

1. A method of manufacturing a semiconductor device, comprising:forming a film containing at least Si, O and N on a substrate in a process chamber by performing a cycle a predetermined number of times, the cycle including non-simultaneously performing:
forming a first layer by supplying a precursor gas containing at least a Si—N bond and a Si—Cl bond and a first catalyst gas to the substrate;
exhausting the precursor gas and the first catalyst gas in the process chamber through an exhaust system;
forming a second layer by supplying an oxidizing gas and a second catalyst gas to the substrate to modify the first layer; and
exhausting the oxidizing gas and the second catalyst gas in the process chamber through the exhaust system.

US Pat. No. 10,559,459

METHOD FOR PRODUCING SILICON NITRIDE FILM AND SILICON NITRIDE FILM

TAIYO NIPPON SANSO CORPOR...

1. A method for producing a silicon nitride film having the following film properties (a) to (c) on a substrate having a temperature of 250° C. or lower by using an organosilane gas as a raw material gas by a plasma chemical vapor deposition method,wherein a processing gas obtained by adding a hydrogen reducing gas in a range of 200 to 2000 volumetric flow rate to an organosilane gas of 1 volumetric flow rate is used,
a pressure in a process chamber accommodating the substrate is adjusted to be in a range of 35 to 400 Pa, and
a density of high-frequency electric power applied to an electrode installed in the process chamber is adjusted to be in a range of 0.2 to 3.5 W/cm2,
(a) an etching rate by a hydrofluoric acid solution is 10 nm/min or lower,
(b) a formation rate of a silicon oxide while being exposed to a saturated water vapor atmosphere at 208 kPa and 121° C. is 2 nm/hour or lower in terms of a silicon oxide film, and
(c) an internal stress in the film is in the range of ?1000 to 1000 MPa,
wherein the organosilane gas is represented by a formula (R1R2N)nSiH4-n, and wherein R1 and R2 are each independently a hydrocarbon group and n is any one of 2, 3 and 4.

US Pat. No. 10,559,453

TECHNIQUES FOR DETECTING MICRO-ARCING OCCURRING INSIDE A SEMICONDUCTOR PROCESSING CHAMBER

Taiwan Semiconductor Manu...

1. A system for determining micro-arcing in a chamber comprising:a magnetic-field sensor comprising a closed conductive path, wherein the magnetic-field sensor is configured to generate a magnetic-field signal that varies in time commensurate with a time-varying magnetic flux passing through the closed conductive path;
a micro-arc detecting element configured to determine whether a micro-arc has occurred in the chamber based on a magnitude of the magnetic-field signal;
a radio frequency (RF) generator configured to output a RF signal;
a transmission line coupled to the RF generator; and
wherein the transmission line has a central portion that extends laterally along a first plane, and a pair of peripheral portions that extend laterally from the central portion in parallel with a second plane.

US Pat. No. 10,559,451

APPARATUS WITH CONCENTRIC PUMPING FOR MULTIPLE PRESSURE REGIMES

Applied Materials, Inc., ...

10. A processing chamber comprising:a chamber body defining a processing region and configured to generate a plasma therein;
a substrate support assembly disposed in the process region; and
an exhaust module comprising:
a body coupled to the chamber body, the body having a first vacuum pump opening and a second vacuum pump opening formed therethrough;
a pumping ring positioned in the body over both the second vacuum pump opening and the vacuum pump opening, the pumping ring comprising:
a substantially ring shaped body, comprising:
a top surface and a bottom surface, the top surface having one or more through holes formed therein, wherein the one or more through holes are arranged in a pattern concentric with the first vacuum pump opening and the bottom surface having a fluid passage formed therein fluidly isolated from the first vacuum pump opening, the fluid passage interconnecting each of the one or more through holes to the second vacuum pump opening; and
an opening formed in the substantially ring shaped body, the opening substantially aligned with the first vacuum pump opening; and
a symmetric flow valve positioned in the body over the pumping ring, the symmetric flow valve movable between a raised position allowing for passage through the opening of the substantially ring shaped body and into the vacuum pump opening and a lowered position substantially sealing the opening of the substantially ring shaped body without sealing the one or more through holes.

US Pat. No. 10,559,449

STABLE SUPPORT FILMS FOR ELECTRON MICROSCOPY

The Regents of the Univer...

10. A method comprising:(a) providing an electron microscopy grid, the electron microscopy grid comprising a first surface and a second surface, the first surface having a holey carbon film disposed thereon;
(b) providing a plurality of lipid molecules, each lipid molecule of the plurality of lipid molecules having a hydrophilic head and a hydrophobic tail;
(c) contacting the holey carbon film with hydrophobic tails of the plurality of lipid molecules to form a lipid monolayer disposed in a hole in the holey carbon film, the lipid monolayer comprising a portion of the plurality of lipid molecules;
(d) after operation (c), attaching a biotin-binding protein to hydrophilic heads of the lipid monolayer; and
(e) after operation (d), allowing a period of time to elapse to allow the biotin-binding protein to crystalize while being attached to the hydrophilic heads of the lipid monolayer disposed in the hole in the holey carbon film.

US Pat. No. 10,559,445

PHOTOELECTRIC SURFACE, PHOTOELECTRIC CONVERSION TUBE, IMAGE INTENSIFIER, AND PHOTOMULTIPLIER TUBE

HAMAMATSU PHOTONICS K.K.,...

1. A photoelectric surface having a laminated structure, the photoelectric surface comprising:a window material that transmits ultraviolet rays;
a conductive film that is formed on the window material and has conductivity;
an intermediate film that is formed on the conductive film and includes a compound of magnesium and fluorine; and
a photoelectric conversion film that is formed on the intermediate film and includes tellurium and an alkali metal, wherein the photoelectric conversion film receives light that has passed through the window material, the conductive film, and the intermediate film, in order, and generates photoelectrons,
wherein the intermediate film has a thickness selected from the range of 0.5 nm to 5.0 nm based on a wavelength of the ultraviolet rays and to cause the photoelectrons generated by the photoelectric conversion film to have a guantum efficiency of 20% or more relative to the ultraviolet rays transmitted by the window material.

US Pat. No. 10,559,436

KEYFRAME MODULE FOR AN INPUT DEVICE

Logitech Europe S.A., La...

1. An input device comprising:a keyframe having a key opening, wherein the keyframe is configured to receive a key within the key opening, the key having a plurality of tabs that extend laterally from a bottom surface of the key; and
a plate coupled to the keyframe, the plate having a top surface and an opening disposed therein,
wherein a location of the opening within the plate is in alignment with a location of the plurality of tabs of the key such that one or more of the plurality of tabs pass through the opening within the plate and below a top surface of the plate in response to a depression of the key, and
wherein the opening and the location of the plurality of tabs are vertically aligned along a path defined by the depression of the key.

US Pat. No. 10,559,430

POWER STORAGE MODULE

AutoNetworks Technologies...

1. An electricity storage module comprising:an electricity storage element group composed of a plurality of electricity storage elements having exhaust ports that discharge gas produced therein, each of the exhaust ports having a constant diameter so as to be continuously open; and
a cover attached to the electricity storage element group,
wherein the electricity storage element group has exhaust surfaces on which the exhaust ports are arranged, and the cover is attached so as to cover the exhaust surfaces,
guide portions that surround the exhaust ports in the form of loops are respectively formed integrally on the exhaust surfaces of the plurality of electricity storage elements,
guided portions that come into close contact with the guide portions are formed integrally on an opposing surface of the cover that opposes the exhaust surfaces, and
the cover is provided with a duct that communicates with the exhaust ports and through which gas discharged from the exhaust ports passes.

US Pat. No. 10,559,428

MULTILAYER CERAMIC ELECTRONIC COMPONENT AND METHOD OF MANUFACTURING THE SAME

SAMSUNG ELECTRO-MECHANICS...

1. A multilayer ceramic electronic component comprising:a ceramic body including dielectric layers and internal electrodes stacked to be alternately exposed to a first end surface and a second end surface of the ceramic body with respective dielectric layers interposed therebetween; and
external electrodes disposed on external surfaces of the ceramic body,
wherein the external electrodes include seed layers disposed on at least one surface of the ceramic body in a thickness direction, first electrode layers electrically connected to the internal electrodes and the seed layers, and plating layers disposed on the seed layers and the first electrode layers, respectively,
0.8?T2/T1?1.2, where T1 is a thickness of each of the first electrode layers in a central region of the ceramic body in the thickness direction, and T2 is a thickness of each of the first electrode layers at a point at which an outermost internal electrode, among the internal electrodes, is positioned, and
the first electrode layers are connected to the seed layers in contact portions between the at least one surface of the ceramic body in the thickness direction and the at least one surface of the ceramic body in a length direction,
wherein the first electrode layers and the seed layers directly contact each other without a gap.

US Pat. No. 10,559,426

ELECTRONIC DEVICE HAVING CERAMIC ELEMENT BODY AND EXTERNAL TERMINAL

TDK CORPORATION, Tokyo (...

1. An electronic device, comprising:a chip component including a terminal electrode formed on an end surface of a ceramic element body containing an internal electrode; and
an external terminal including a first end electrically connected with the terminal electrode and a second end disposed opposite to the first end and connected with a mounting surface,
wherein:
the external terminal comprises:
a first metal; and
a second metal different from the first metal;
the first metal and the second metal are arranged next to each other in a surface direction of the external terminal and alternately exposed on a surface of the external terminal; and
a width of the second metal exposed to the surface of the external terminal is 1/10 to 9/10 of the width of the terminal electrode.

US Pat. No. 10,559,401

CABLE, DEVICE AND METHOD OF SUPPLYING POWER

1. A cable comprising:an original cable having an insulating sheath as an outermost layer;
a first material provided on the insulating sheath of the original cable; and
a metal sheath provided on the first material and made of aluminum, magnesium, copper, rhodium, silver or gold,
wherein the first material is at least one of a hygroscopic fiber, an inorganic ion exchanger influence fiber, a supercritical influence fiber, and a composite fiber obtained by mixing two or more among the mentioned fibers, and
wherein the first material is impregnated with a silver ion nano-colloidal solution and a tungsten oxide containing solution.

US Pat. No. 10,559,400

FLEX FLAT CABLE STRUCTURE AND FIXING STRUCTURE OF CABLE CONNECTOR AND FLEX FLAT CABLE

ENERGY FULL ELECTRONICS C...

1. A flex flat cable (FFC) electrical connector fix structure, comprising:an electrical connector, comprising:
a housing;
a spacer, assembled onto the housing, and comprising a plurality of containing recesses;
a printed circuit board (PCB), comprising a plurality of conductive portions and a plurality of connecting portions, and the plurality of conductive portions being electrically connected to the plurality of corresponding connecting portions respectively;
a plurality of terminals, one end of the plurality of terminals passing through the containing recess and being connected to the plurality of connecting portions; and
a shell, assembled onto the housing; and
an FFC structure, comprising:
a plurality of metallic transmission lines, being arranged parallel, and comprising one or more power line and a plurality of signal lines; the power line being configured to transmit power; the plurality of signal lines being configured to transmit a data signal;
a plurality of first insulating jackets, each of the plurality of first insulating jackets enclosing one of the plurality of metallic transmission lines;
a second insulating jacket, surrounding the plurality of first insulating jackets;
a third insulating jacket, enclosing the plurality of first insulating jackets without any gap, and the second insulating jacket enclosing the third insulating jacket; and
a shield layer, configured to isolate the second insulating jacket from the third insulating jacket, comprising:
an insulating film, comprising a first side and a second side, and the first side and the second side being on opposite sides of the insulating film;
a first block layer, adhering to the first side of the insulating film; and
a second block layer, adhering to and contacting the first block layer,
wherein the first block layer and the second block layer are made of different materials,
wherein all of the plurality of metallic transmission wires are respectively connected to all of the plurality of conductive portions on one surface of the PCB,
wherein the printed circuit board is between the FFC structure and the spacer.

US Pat. No. 10,559,383

EMPLOYEE VISIT VERIFICATION SYSTEM

1. A visit verification (VV) system for verifying visits by a Mobile Service Provider (MSP) to a residence of a client comprising:a. a beacon having:
i. a transmitter configured for transmitting a signal;
ii. a visual code;
b. a mobile computing device (MCD) having:
i. an optical device configured for reading the visual code on the beacon;
ii. a receiver capable of receiving the signal from the beacon,
iii. a controller configured for determining the distance from the beacon based upon the received signal;
iv. a communication device configured for communicating information from the MCD;
c. a server comprising:
i. a network adapter configured for receiving information from the MCD,
ii. a memory configured for storing information;
iii. an input/output (I/O) device configured for providing output to, and receiving input from a user;
iv. a controller connected to the network adapter, the memory, the I/O device, configured to:
1. authenticate an MSP;
2. determine when the MSP is outside of an acceptable perimeter:
3. store task status information from the MCD.

US Pat. No. 10,559,382

EMPLOYEE VISIT VERIFICATION SYSTEM

1. A visit verification (VV) system for verifying visits by a Mobile Service Provider (MSP) to a residence of a client comprising:a. a beacon having:
i. an RF transmitter configured for transmitting an RF signal;
ii. a visual code;
b. a mobile computing device (MCD) having:
i. an optical device configured for reading the visual code on the beacon;
ii. a receiver capable of receiving the signal from the beacon,
iii. a controller running executable code configured for determining:
1. if the visual code matches a prestored code indicating that this is the proper beacon;
2. the distance from the beacon to the MCD based upon the received signal;
iv. a direct communication link configured for communicating information from the MCD to another local computing device;
c. a server, being a computing device, configured for receiving information periodically from the MCD relating to at least one of login information, RSSI, distance from beacon, longitude, latitude, tasks completed, task status through a manual, direct connection, storing and providing information being at least one of a task schedule, client to visit, beacon UUIDs, addresses, residence locations to the MCD.

US Pat. No. 10,559,367

REDUCING PROGRAMMING DISTURBANCE IN MEMORY DEVICES

Micron Technology, Inc., ...

1. A method comprising:precharging channel material of strings of memory cells in both a selected sub-block and an unselected sub-block in a block of memory cells to a precharge voltage during a first portion of a programming operation; and
after precharging the channel material of the strings of memory cells in the selected sub-block and the unselected sub-block, applying a programming voltage to an access line of a selected memory cell in the selected sub-block of the block of memory cells during a second portion of the programing operation,
wherein the selected memory cell in the selected sub-block and an unselected memory cell in the unselected sub-block are coupled to the access line, and
wherein during the second portion of the programing operation, the channel material in the unselected sub-block is charged to a first voltage higher than the precharge voltage in response to a coupled voltage induced on the channel material by the programming voltage on the selected access line of the selected memory cell in the selected sub-block.

US Pat. No. 10,559,355

DEVICE AND METHOD FOR WRITING DATA TO A RESISTIVE MEMORY

1. A resistive memory comprising resistive elements arranged in rows and in columns, the columns being distributed in groups of columns, the resistance of each resistive element being capable of alternating between a high value in a first range of values and a low value in a second range of values smaller than the high value, the memory further comprising a device for switching, for each group, the resistance of at least one resistive element selected from among the resistive elements of said group between the high and low values, the device comprising a first circuit connected to all columns, configured to provide a first increasing voltage ramp, that is a function linearly increasing with time, and configured to apply the first increasing voltage ramp across each selected resistive element while the selected resistive element is at the high value or at the low value, the device further comprising, for each group, a second circuit configured to detect the switching of the resistance of the selected resistive element, the device further comprising, for each group, a third circuit configured to interrupt a current flowing through the selected resistive element of said group on detection of the switching and the device further comprising a fourth circuit configured to supply a second increasing voltage ramp, that is a function linearly increasing with time, the second circuit being configured to compare the second increasing voltage ramp with a voltage which varies according to the resistance of the selected resistive element, wherein the voltage is proportional to the second voltage ramp with a proportionality factor which varies according to the resistance of the selected resistive element.

US Pat. No. 10,559,349

POLARIZATION GATE STACK SRAM

Intel Corporation, Santa...

1. An apparatus comprising:a first inverter comprising a first pull up transistor and a first pull down transistor;
a second inverter cross coupled to the first inverter, the second inverter comprising a second pull up transistor and a second pull down transistor;
a first access transistor coupled to the first inverter; and
a second access transistor coupled to the second inverter, a gate stack of one transistor of each inverter comprising a polarization layer between and in contact with a gate oxide and a respective channel of each transistor that comprises the polarization layer.

US Pat. No. 10,559,348

SYSTEM, APPARATUS AND METHOD FOR SIMULTANEOUS READ AND PRECHARGE OF A MEMORY

Intel Corporation, Santa...

1. An apparatus comprising:a memory array having a plurality of memory cells, a plurality of bitlines coupled to the plurality of memory cells, and a plurality of wordlines coupled to the plurality of memory cells; and
a sense amplifier circuit to sense and amplify a value stored in a memory cell of the plurality of memory cells, the sense amplifier circuit including:
a buffer circuit to store the value, the buffer circuit coupled between a first internal node of the sense amplifier circuit and a second internal node of the sense amplifier circuit, the first and second internal nodes separate from a first bitline coupled to the memory cell; and
an equalization circuit to equalize the first internal node and the second internal node while the sense amplifier circuit is decoupled from the memory array.

US Pat. No. 10,559,338

MULTI-BIT CELL READ-OUT TECHNIQUES

Spin Memory, Inc., Fremo...

1. A memory device comprising:an array of Multi-Bit Cells (MBCs), the MBCs including a plurality of cell elements having different sets of state parameter values;
one or more memory circuits configured to;
sequentially apply different successive sets of state programming conditions to a selected plurality of the MBCs, wherein a respective set of state programming conditions programs a corresponding one of the plurality of cell elements to a respective state parameter value;
determine, after applying each of the set of programming conditions, a state change result for the selected plurality of the MBCs; and
determine a read state of the selected plurality of MBCs based on the determined state change results.

US Pat. No. 10,559,335

METHOD OF TRAINING DRIVE STRENGTH, ODT OF MEMORY DEVICE, COMPUTING SYSTEM PERFORMING THE SAME AND SYSTEM-ON-CHIP PERFORMING THE SAME

SAMSUNG ELECTRONICS CO., ...

1. A method of training for a memory device, the method comprising:performing an initialization operation on the memory device based on the memory device being powered on;
performing a training operation on a plurality of operating frequencies of the memory device to obtain, as a configurable operating parameter for each of the plurality of operating frequencies, at least one of a plurality of operating parameters of the memory device;
storing, as training data, the obtained configurable operating parameter for each of the plurality of operating frequencies; and
using an optimized operating parameter for the memory device based on the training data, a current operation mode of the memory device, and a current operating frequency of the memory device.

US Pat. No. 10,559,331

MEMORY DEVICE AND METHOD OF OPERATING THE SAME

SK hynix Inc., Icheon-si...

1. A memory device, comprising:a memory block including a plurality of word lines;
peripheral circuits configured to perform a verify operation and a discharge operation on memory cells coupled to a selected word line which is selected from among the word lines; and
a control logic configured to control the peripheral circuits such that, during the discharge operation, word lines coupled to memory cells having threshold voltages lower than target threshold voltages and word lines coupled to memory cells having the target threshold voltages are discharged at different times.

US Pat. No. 10,559,320

MAGNETIC RECORDING MEDIUM AND MAGNETIC RECORDING/REPRODUCING APPARATUS

SHOWA DENKO K.K., Minato...

1. A magnetic recording medium comprising at least a magnetic layer, a protective layer and a lubricant layer in this order on a non-magnetic substrate, whereinthe protective layer is made of carbon or carbon nitride;
the lubricant layer which is formed on and in contact with the protective layer, comprises
a compound A represented by the following general formula (1):
R1—C6H4OCH2CH(OH)CH2OCH2—R2—CH2OCH2CH(OH)CH2OH  (1)
wherein, R1 is an alkoxy group having 1 to 4 carbon atoms,
R2 is
—CF2O(CF2CF2O)x(CF2O)yCF2—
wherein in parentheses of x and y, connection in this order, in reverse, or randomly; and x, y are real numbers of 0 to 15, respectively,
—CF2CF2O(CF2CF2CF2O)zCF2CF2—
wherein z is a real number of 1 to 15, or
—CF2CF2CF2O(CF2CF2CF2CF2O)nCF2CF2CF2—
wherein n is a real number from 0 to 4, and
a compound B represented by the following general formula (2):
HOCH2CF2CF2O(CF2CF2CF2O)mCF2CF2CH2OCH2CH(OH)CH2OH  (2)
wherein m is an integer;
a mass ratio (A/B) of the compound A with respect to the compound B is in the range of 0.2 to 3.0; and
an average film thickness of the lubricant layer is 0.8 nm to 2 nm.

US Pat. No. 10,559,312

USER AUTHENTICATION USING AUDIOVISUAL SYNCHRONY DETECTION

International Business Ma...

1. A method for preventing a replay attack, comprising:receiving, at a first time, first video and first audio signals generated in response to a user uttering a passphrase;
receiving, at a second time subsequent to the first time, second video and second audio signals generated respectively by a camera and a microphone in response the user uttering the passphrase;
extracting, from the received audio signals, speech-based features;
extracting, from the received video signals, visual-based features;
computing, by a processor, an audio temporal alignment between the first and the second audio signals, by computing a dynamic time warping on the audio-based features extracted from the first and second audio signals, the audio temporal alignment comprising a first registration that synchronizes the first and the second audio signals;
computing, by the processor, a video temporal alignment between the first and the second video signals, by computing a dynamic time warping on the video-based features extracted from the first and second video signals, the video temporal alignment comprising a second registration that synchronizes the first and the second video signals;
comparing the audio temporal alignment between the first and the second audio signals to the video temporal alignment between the first and the second video signals; and
successfully authenticating the user upon detecting, as a result of the comparing, that the audio and the video temporal alignments are synchronized; and
failing the authentication of the user upon detecting, as a result of the comparison, that the audio and the video temporal alignments are not synchronized.

US Pat. No. 10,559,304

VEHICLE-MOUNTED VOICE RECOGNITION DEVICE, VEHICLE INCLUDING THE SAME, VEHICLE-MOUNTED VOICE RECOGNITION SYSTEM, AND METHOD FOR CONTROLLING THE SAME

Hyundai Motor Company, S...

1. A vehicle-mounted voice recognition device comprising:a storage configured to store a plurality of databases for voice recognition generated based on an address book database sent from a terminal device;
a processor configured to detect at least one element from the plurality of databases for voice recognition and determine an order of displaying contact information corresponding to the at least one element; and
a user interface configured to display the contact information corresponding to the at least one element in the order of displaying and receive a selection of a piece of the contact information from a user,
wherein the processor is further configured to detect a database among the plurality of databases for voice recognition, the detected database including an element corresponding to the selected piece of contact information, and re-determine the order of displaying the contact information based on detection frequencies of the plurality of databases for voice recognition.

US Pat. No. 10,559,303

METHODS AND APPARATUS FOR REDUCING LATENCY IN SPEECH RECOGNITION APPLICATIONS

Nuance Communications, In...

1. A computing device including a speech-enabled application installed thereon, the computing device comprising:an input interface, which receives audio comprising speech from a user of the computing device;
an automatic speech recognition (ASR) engine, which:
detects an end of speech in a first audio portion of the received audio, and
generates a first ASR result based, at least in part, on the first audio portion; and
at least one processor programmed to:
determine whether a valid action can be performed by the speech-enabled application using the first ASR result; and
instruct the ASR engine to process a second audio portion of the received audio, recorded after the detected end of speech of the first audio portion, when it is determined that a valid action cannot be performed by the speech-enabled application using the first ASR result,
wherein the ASR engine processes the second audio portion in addition to the first audio portion when instructed by the at least one processor.

US Pat. No. 10,559,298

DISCUSSION MODEL GENERATION SYSTEM AND METHOD

International Business Ma...

1. A computer-implemented method comprising:receiving, at a computing device, an input text;
tagging one or more portions of the input text, wherein tagging the one or more portions of the input text includes tagging the one or more portions of the input text with one or more sentiment metrics based upon, at least in part, performing sentiment analysis on the one or more portions of the input text;
generating a discussion model between a plurality of virtual speakers based upon, at least in part, the tagging of the one or more portions of the input text; and
presenting the discussion model.

US Pat. No. 10,559,296

AUTOMATED SPEECH PRONUNCIATION ATTRIBUTION

Google LLC, Mountain Vie...

1. A computer-implemented method comprising:receiving, by a digital assistant device that stores multiple user profiles that are each associated with a respective one of multiple users, a voice command of a particular one of the multiple users, wherein the voice command includes a particular term that, among the multiple users, is pronounced uniquely by the particular one of the multiple users, and wherein each user profile stored by the digital assistant device specifies pronunciation data for terms that the respective user pronounces uniquely;
matching the voice command to a particular user profile among the multiple stored user profiles that are stored by the digital assistant;
generating, by the digital assistant device, an acknowledgment of the voice command, wherein the acknowledgement includes the particular term and pronunciation data that was stored in the matched, particular user profile and that reflects the unique pronunciation of the particular term by the particular one of the multiple users; and
providing, for output by a speech synthesizer of the digital assistant device, a spoken representation of the acknowledgment, wherein the spoken representation of the acknowledgement of the voice command includes the particular term as uniquely pronounced by the particular one of the multiple users.

US Pat. No. 10,559,295

ARTIFICIAL REVERBERATOR ROOM SIZE CONTROL

1. An artificial reverberator comprising:an input for accepting a nominal room impulse response;
an input for accepting a perceived room size control, wherein the perceived room size control specifies a perceived room size that is different than a nominal room size associated with the nominal room impulse response; and
a convolution operation with a processing room impulse response, wherein the processing room impulse response is derived by resampling a generating room impulse response related to the nominal impulse response according to the perceived room size control.

US Pat. No. 10,559,288

STEEL DRUM WITH GREATER RANGE OF NOTES

1. A steel drum for playing soprano music, comprising:a. a single circular steel drum having a concave surface with notes placed in the order of 4ths and 5ths, with an associated steel skirt extending downward from a rim; and
b. a stand associated with the steel drum, said steel drum suspended from the stand by at least two non-rigid attachments;
c. the single circular steel drum comprising at least 14 note areas adjacent to and around the rim on the concave surface wherein the at least 14 note areas consist of at least twelve root notes and two octaves C and C? adjacent said root notes, and a plurality of other note areas distributed over the concave surface below the rim, with at least two octaves available for each root note.

US Pat. No. 10,559,286

DISPLAY DEVICE

Japan Display Inc., Toky...

1. A display device comprising:a plurality of sub-pixels arranged in a row direction and a column direction and each including a memory block that includes a plurality of memories each of which configured to store therein sub-pixel data;
a plurality of memory selection line groups provided corresponding to a plurality of rows and each including a plurality of memory selection lines electrically coupled to the memory blocks in the sub-pixels that belong to the corresponding row;
a memory selection circuit configured to concurrently output memory selection signals to the memory selection line groups, the memory selection signals each being a signal for selecting one from the memories in the corresponding memory block;
a potential line having a potential for operating the memories applied thereto;
a conduction switch provided for at least one of the memories in the memory block on a one-to-one basis and configured to switch between electrically coupling and electrically uncoupling the potential line and a corresponding one memory; and
an operating-memory conduction circuit configured to output, to the conduction switch, an operation signal for determining whether to electrically couple or uncouple the potential line and the corresponding one memory,
wherein each of the memories is capable of storing sub-pixel data therein when being coupled to the potential line, and
wherein each of the sub-pixels displays an image based on the sub-pixel data stored in one of the memories in the sub-pixel in accordance with the memory selection line that has been supplied with the memory selection signal.

US Pat. No. 10,559,284

VEHICLE INFORMATION DISPLAY CONTROL DEVICE, AND METHOD FOR DISPLAYING AUTOMATIC DRIVING INFORMATION

MITSUBISHI ELECTRIC CORPO...

1. A vehicle information display control device, comprising:a memory to store a program and a processor to execute the program to perform the method of:
defining a first image and a second image for each of the actuators, the first image representing a manual control mode, the second image representing an automatic control mode;
obtaining automatic driving information including information indicating whether each of actuators of a vehicle is in the manual control mode or the automatic control mode; and
causing a display to simultaneously display the first image and the second image of each of the actuators and to display, based on the automatic driving information, (i) the first image of an actuator in the manual control mode closer in position to a driver of the vehicle than the second image of the actuator in the manual control mode and (ii) the second image of an actuator in the automatic control mode closer in position to the driver of the vehicle than the first image of the actuator in the automatic control mode.

US Pat. No. 10,559,282

PIXEL DRIVING CIRCUITS FOR SWITCHING DISPLAY RESOLUTION, DRIVING METHODS THEREOF AND DISPLAY APPARATUSES

BOE TECHNOLOGY GROUP CO.,...

1. A pixel driving circuit, comprising:N operational amplifiers;
N data lines connected to the N operational amplifiers respectively, the N data lines at least comprising r first data lines and k second data lines, wherein each of the first data lines has a first switch provided thereon, wherein each of the first data lines corresponds to at least one of the k second data lines and is connected to the at least one of the k second data lines through at least one second switch respectively, where r+k?N, and k=r*q, wherein q is the number of the at least one of the k second data lines, wherein r, k, and q are integers greater than 0;
wherein the first switch and the second switch are connected to a signal control unit respectively, and the signal control unit is configured to control the first switch to be turned on and the second switch to be turned off when display is to be performed at a first resolution, and the signal control unit is further configured to control the first switch to be turned off and the second switch to be turned on when display is to be performed at a second resolution, wherein the first resolution is greater than the second resolution,
wherein the first data lines comprise an ith data line and an (i+1)th data line of the N data lines, and the second data lines comprise a jth data line and a (j+1)th data line of the N data lines, wherein the ith data line is connected to a voltage output terminal of an ith operational amplifier of the N operational amplifiers through the first switch provided on the ith data line, and the (i+1)th data line is connected to a voltage output terminal of an (i+1)th operational amplifier of the N operational amplifiers through the first switch provided on the (i+1)th data line, the jth data line is connected to a voltage output terminal of a jth operational amplifier, and the (j+1)th data line is connected to a voltage output terminal of a (j+1)th operational amplifier, wherein each of the ith data line and the (i+1)th data line is connected to one of the jth data line and (j+1)th data line through a respective second switch; and
wherein the ith operational amplifier has a first power supply input terminal connected to a second power supply input terminal of the (i+1)th operational amplifier and a second power supply input terminal connected to the ground, and the (i+1)th operational amplifier has a first power supply input terminal connected to a power supply and the second power supply input terminal connected to the first power supply input terminal of the ith operational amplifier.

US Pat. No. 10,559,276

APPARATUS, SYSTEM, AND METHOD FOR MITIGATING MOTION-TO-PHOTON LATENCY IN HEAD-MOUNTED DISPLAYS

Facebook Technologies, LL...

1. A special-purpose hardware device comprising:an image signal processor that receives at least one image frame captured by a camera device of a head-mounted-display system;
an input-formatting component that receives computer-generated imagery intended to be blended with the image frame;
a blending component communicatively coupled to the image signal processor and the input-formatting component, wherein the blending component generates at least one mixed-reality frame by overlaying the computer-generated imagery onto the image frame received from the camera device of the head-mounted-display system;
a hardware-accelerated image-correction component that performs at least one image-correction procedure on the mixed-reality frame to prepare the mixed-reality frame to be displayed to a user of the head-mounted display system; and
a frame-output interface communicatively coupled to the hardware-accelerated image-correction component, wherein the frame-output interface feeds the mixed-reality frame processed by the hardware-accelerated image-correction component to a display device of the head-mounted-display system to facilitate displaying the mixed-reality frame for presentation to the user wearing the head-mounted-display system.

US Pat. No. 10,559,274

MULTIPLEXER AND METHOD FOR DRIVING THE SAME

AU OPTRONICS CORPORATION,...

1. A multiplexer, comprising:a plurality of first driving units, each of the first driving units comprising:
a first data voltage input terminal, for receiving a first pixel voltage signal;
a first capacitor, comprising:
a first terminal, for receiving a first switch signal; and
a second terminal;
a first transistor, comprising:
a first terminal, coupled to the second terminal of the first capacitor;
a second terminal, for receiving a first reset signal; and
a control terminal, for receiving a second switch signal;
wherein the first switch signal and the second switch signal have opposite phases; and
a second transistor, comprising:
a first terminal, coupled to the first data voltage input terminal;
a second terminal, coupled to a first data line; and
a control terminal, coupled to the second terminal of the first capacitor; and
a plurality of second driving units, each of the second driving units comprising:
a second data voltage input terminal, for receiving a second pixel voltage signal, wherein the first pixel voltage signal and the second pixel voltage signal have opposite polarities;
a second capacitor, comprising:
a first terminal, coupled to the first terminal of the first capacitor, and is for receiving the first switch signal; and
a second terminal;
a third transistor, comprising:
a first terminal, coupled to the second terminal of the second capacitor;
a second terminal, for receiving a second reset signal; and
a control terminal, coupled to the control terminal of the first transistor, for receiving the second switch signal; and
a fourth transistor, comprising:
a first terminal, coupled to the second data voltage input terminal;
a second terminal, coupled to a second data line; and
a control terminal, coupled to the second terminal of the second capacitor;
wherein the first reset signal is different from the second reset signal.

US Pat. No. 10,559,252

DISPLAY APPARATUS

Sakai Display Products Co...

1. A display apparatus comprising:a display panel comprising a plurality of display elements arranged in a matrix form on a substrate having flexibility;
a supporting member having a surface, the substrate of the display panel being placed on the surface; and
a holding member provided at a part of or the entire of an outer edge of the display panel along the outer edge so as to rim the display panel, the holding member holding the display panel on the surface of the supporting member,
wherein the holding member engages with an outer periphery of the display panel,
the holding member is bonded to the surface of the supporting member,
the substrate closely contacts with the surface of the supporting member at a lower strength than a bonding strength between the holding member and the surface of the supporting member,
the holding member has a frame-like shape surrounding the display panel along the entire of the outer edge, and
the holding member comprises:
a through hole or a groove communicating with an inside of the frame-like shape in the holding member and communicating with an outside of the frame-like shape in the holding member; and
a closing member to prevent ventilation through the through hole or the groove.

US Pat. No. 10,559,221

PROCESSOR-IMPLEMENTED SYSTEMS AND METHODS FOR ENHANCING COGNITIVE ABILITIES BY PERSONALIZING COGNITIVE TRAINING REGIMENS

Akili Interactive Labs, I...

1. A processor-implemented method for enhancing cognitive abilities of a user by personalizing a cognitive training regimen through difficulty progression, the method comprising:performing, using one or more data processors, a cognitive assessment of a user using a set of assessment tasks;
estimating, using the one or more data processors, a maximal performance of the user related to the set of assessment tasks;
determining, using the one or more data processors, a performance range based at least in part on the maximal performance of the user;
dividing, using the one or more data processors, the performance range into a plurality of progress gates, the plurality of progress gates corresponding to a plurality of task difficulty levels that the user may perform to progress within the training regimen, data related to the performance range being stored in a data structure in a non-transitory machine-readable storage medium;
selecting, using the one or more data processors, a first progress gate within the performance range;
generating, using the one or more data processors, a first set of training tasks associated with the first progress gate;
collecting the user's first training responses to the first set of training tasks;
determining, using the one or more data processors, whether the user succeeds at the first progress gate based at least in part on the user's first training responses; and
in response to the user succeeding at the first progress gate,
selecting, using the one or more data processors, a second progress gate within the performance range;
generating, using the one or more data processors, a second set of training tasks associated with the second progress gate; and
collecting the user's second training responses to the second set of training tasks for determining whether the user succeeds at the second progress gate,
wherein (i) the plurality of task difficulty levels are within a range personalized for the user, and (ii) difficulties of the generated first and second sets of training tasks are within the personalized range of task difficulty levels.

US Pat. No. 10,559,218

METHOD AND DEVICE FOR CONTROLLING A SIMULATOR

1. A method for actuating a simulator for simulating translational and rotational movements of a vehicle, wherein, in relation to a three vehicle axes, a rotational rate about a first vehicle axis and specific forces respectively acting along a second vehicle axis and a third vehicle axis are provided from a movement model that simulates the vehicle and converted into translational and rotational control commands for actuating the simulator, comprising the following steps:calculating, using a control unit, a rotational angle from the rotational rate about the first vehicle axis,
calculating, using the control unit, from the specific forces, an apparent perpendicular angle between a vertical axis as the third vehicle axis and the apparent perpendicular arising on account of the specific forces acting along the second vehicle axis and third vehicle axis,
calculating, using the control unit, an apparent perpendicular angle difference between a rotational angle and the apparent perpendicular angle and ascertaining a high-frequency difference component of the apparent perpendicular angle difference that is intended to be compensated by a translational movement of the simulator, depending on the apparent perpendicular angle difference,
calculating, using the control unit, translational control commands for actuating the simulator for a translational movement of the simulator along the second vehicle axis, depending on the ascertained high-frequency rotational angle component of the apparent perpendicular angle difference,
calculating, using the control unit, a compensation angle that corresponds to an acceleration value to be simulated along the second vehicle axis by inclining the simulator in relation to perpendicular to the Earth, depending on the rotational angle, the high-frequency difference component of the apparent perpendicular angle difference and the apparent perpendicular angle,
calculating, using the control unit, a limited compensation angle from the compensation angle by means of a physiological rotational rate limitation, which restricts an inclination of the simulator below a perception threshold, and
calculating, using the control unit, rotation control commands for actuating the simulator for a rotational movement of the simulator about the first vehicle axis, depending on the limited compensation angle and the rotational angle.

US Pat. No. 10,559,198

SYSTEM AND METHOD OF ADAPTIVE CONTROLLING OF TRAFFIC USING ZONE BASED OCCUPANCY

Cubic Corporation, San D...

1. A device comprising:memory having computer-readable instructions stored therein; and
one or more processors configured to execute the computer-readable instructions to:
receive identification of zones and corresponding rules for a signalized roadway intersection, wherein a perimeter of at least one zone is based on user input at a graphical user interface of a traffic control system that is communicatively coupled to the device; and
for each identified zone:
receive traffic data from one or more sensors at the signalized roadway intersection;
detect a number of objects in the zone by performing one or more of image processing or video processing on the received traffic data;
based at least in part on the number of objects detected in the zone, determine if a corresponding condition is met; and
upon determining that the corresponding condition is met for the zone, send a corresponding signal to a traffic signal controller to change a traffic signal for the zone.

US Pat. No. 10,559,176

RECOILER FOR A MERCHANDISE SECURITY SYSTEM

InVue Security Products I...

1. A merchandise security system for displaying and protecting an article of merchandise and an auxiliary device of the article of merchandise from theft, comprising:a sensor that is secured to the article of merchandise and that detects removal of the article of merchandise from the sensor;
a base that removably supports the sensor and the article of merchandise thereon, wherein the base further comprises an auxiliary port housed therein that operably connects to the auxiliary device; and
a cable operably connected to the sensor,
wherein the base transfers power to the auxiliary port for powering the auxiliary device, and
wherein a security signal is transmitted through the auxiliary port that is used to detect removal of the auxiliary device from the base.

US Pat. No. 10,559,167

METHOD OF AND SYSTEM FOR RENDERING FINANCIAL SERVICES

Novomatic AG, Gumpoldski...

1. A financial services system comprising:A financial services server (1), a plurality of user terminals (2), and a first database (11) operatively coupled with the financial services server (1) for handling an e-wallet account (71) of a user; wherein the financial services server (1) and the plurality of user terminals (2) are connected via a network (6);
the first database (11) storing a plurality of records, each record having an account number of the user as a key value;
each user terminal (2) comprising at least one payment device (61, 62, 21) and a biometric device (72), wherein a user-identification-signal (83) is provided to the financial services server (1) based on a user's biometric data upon accessing the biometric device (72); and wherein the financial services server (1), upon, receiving the user-identification-signal (83), is adapted to request both a credit value of the user terminal (2) and the value of the respective user's e-wallet account (71); and wherein if the credit value is zero and the e-wallet account (71) value is greater than or equal to zero, then a disable-signal (84) for locking the biometric device (72) is sent to the biometric device (72) and, if the e-wallet account (71) value is greater than zero then the e-wallet value is transferred from the e-wallet account (71) to the credit of the user terminal (2); and
wherein while the biometric device (72) is locked, the payment device (61, 62, 21) is unlocked.

US Pat. No. 10,559,157

AUTOMATED VENDING MACHINE WITH TRAY TRANSPORT SYSTEM

SIGNIFI SOLUTIONS INC., ...

1. An automated vending machine comprising:a housing defining an interior, the interior having a dispensing zone accessible from an exterior of the automated vending machine;
a shelving system having wall racking, support shelves, and declined rails;
each support shelf of the support shelves and the wall racking configured with hook coupling mechanisms for facilitating manual releasable coupling of the support shelf to the wall racking, the wall racking for receiving and supporting each support shelf of the support shelves at desired heights;
each support shelf of the support shelves supporting a declined rail of the declined rails having a declivity from an upper end of the declined rail to a lower end of the declined rail and a stopper at the lower end;
a plurality of moveable trays disposed within the interior of the housing, each of the plurality of moveable trays riding on a respective declined rail of the declined rails, whereby each respective moveable tray is gravity fed toward the stopper at the lower end of the respective declined rail;
each moveable tray of the plurality of moveable trays configured to support a vendible product displayed thereon;
a dispensing unit having a coupling mechanism configured to releasably couple with a selected moveable tray of the plurality of moveable trays; and
a gantry system configured to move the dispensing unit about the interior of the automated vending machine and the dispensing zone, and configured to position the coupling mechanism of the dispensing unit for releasably coupling and decoupling with the selected moveable tray.

US Pat. No. 10,559,151

NETWORKED DOOR CLOSER AND AUTO-OPERATOR

Schlage Lock Company LLC,...

1. An access control system, comprising:a first door operator;
at least one processing device; and
at least one memory comprising a plurality of instructions stored therein that, in response to execution by the at least one processing device, causes the access control system to:
identify a current status of the first door operator at a first time;
determine a scheduled status of the first door operator for the first time; and
modify a status of a second door operator in response to a determination that the scheduled status of the first door operator differs from the current status of the first door operator at the first time.

US Pat. No. 10,559,147

MOBILE ACCESSORY STORAGE, SECURITY MANAGEMENT, AND TRACKING SYSTEM

A Priori, LLC, Columbia,...

1. A method for storing, tracking, and regulating upkeep with respect to mobile accessories comprising:providing at least one security rail comprising a single ingress/egress opening, a detention end, and a security space defined between the single ingress/egress opening and the detention end;
providing at least one sensor disposed on the security rail to receive a proximity signal from a mobile accessory transmitter;
providing at least one user interface, wherein the interface is in electronic communication with the security rail and the at least one sensor;
providing a network and a server, wherein the server is in electronic communication with the at least one security rail and the at least one user interface;
establishing a security rail identifier for each security rail and entering same into the network;
establishing a mobile accessory identifier for each mobile accessory and entering same into the network;
establishing an authentication protocol for allowing mobile accessories to be removed from the at least one security rail and entering same into the network;
authentication by the server, via the authentication protocol, of an access request made at the user interface;
wherein the least one security rail and at least one user interface are configured such that:
when the server authenticates the access request made at the user interface; and
the at least one sensor receives the proximity signal from the mobile accessory transmitter, a releasable lock is moved from a locked position to an unlocked position to allow the at least one mobile accessory to be removed from the at least one security rail.

US Pat. No. 10,559,133

VISUAL SPACE MANAGEMENT ACROSS INFORMATION HANDLING SYSTEM AND AUGMENTED REALITY

Dell Products L.P., Roun...

1. An information handling system comprising:a processor operable to execute instructions that process information;
a memory interfaced with the processor and operable to store the instructions and information;
a flat panel display operable to present visual information as visual images;
a head mounted display operable to present visual information as three dimensional visual images focused at a location in front of the head mounted display;
one or more graphics processors interfaced with one or more of the flat panel display and head mounted display and operable to communicate the visual information to the flat panel display and head mounted display formatted for presentation as visual images;
a plurality of sensors disposed proximate the flat panel display and operable to sense end user hand gestures;
a token having one or more features identifiable by one or more of the plural sensors; and
an environment definition engine interfaced with the plural sensors and the one or more graphics processors, the environment definition engine applying gestures detected by the plural sensors to visual images of the flat panel display absent the token identification of the token by the one or more of the plural sensors and applying gestures detected by the plural sensors to the visual images of the head mounted display in the event of identification of the token.

US Pat. No. 10,559,132

DISPLAY APPARATUS, DISPLAY SYSTEM, AND CONTROL METHOD FOR DISPLAY APPARATUS

OLYMPUS CORPORATION, Tok...

1. A display apparatus that combines images into a single frame of reference, the display apparatus comprising:a first camera that acquires a first image;
a communication interface that is communicatively coupled to a second camera;
a display; and
a processor that is communicatively coupled to the first camera, the communication interface and the display,
wherein the processor:
receives the first image from the first camera,
determines a first imaging range of the first image in a first frame of reference,
receives, using the communication interface, information from the second camera,
calculates a second imaging area of the second camera in a second frame of reference based on the information, the second imaging area included in the first imaging range,
superimposes the second imaging area onto the first frame of reference to identify a surveillance area of the second camera, and
displays, on the display, the surveillance area of the second camera as a superimposed display image on the first image.

US Pat. No. 10,559,127

METHODS AND SYSTEMS FOR DETECTING AND COMBINING STRUCTURAL FEATURES IN 3D RECONSTRUCTION

Magic Leap, Inc., Planta...

1. A method for forming a reconstructed 3D mesh, the method comprising:receiving, at one or more processors, a set of captured depth maps associated with a scene;
performing, using the one or more processors, an initial camera pose alignment associated with each captured depth map of the set of captured depth maps;
overlaying, using the one or more processors, the set of captured depth maps in a reference frame;
detecting, using the one or more processors, one or more shapes in the overlaid set of captured depth maps, thereby providing one or more detected shapes;
updating, using the one or more processors and the one or more detected shapes, the initial camera pose alignment based on an overlap between the overlaid set of captured depth maps and the one or more detected shapes to provide a shape-aware camera pose alignment associated with each captured depth map of the set of captured depth maps;
performing, using the one or more processors and the one or more detected shapes, shape-aware volumetric fusion; and
forming, using the one or more processors, the reconstructed 3D mesh associated with the scene.

US Pat. No. 10,559,126

6DOF MEDIA CONSUMPTION ARCHITECTURE USING 2D VIDEO DECODER

Samsung Electronics Co., ...

10. A method for rendering three-dimensional (3D) media content, comprising:receiving a multimedia stream;
parsing the multimedia stream into 2D video bitstreams including geometry frames and texture frames, 2D to 3D conversion metadata for rendering 3D points from 2D frames, and scene description metadata describing 6 degree of freedom (6DoF) relationships among objects in a 6DoF scene;
decoding the 2D video streams including the geometry frames and texture frames to generate 2D pixel data;
converting the 2D pixel data into 3D voxel data using the 2D to 3D conversion metadata; and
generating the 6DoF scene from 3D voxel data using the scene description metadata.

US Pat. No. 10,559,113

SYSTEM, DEVICE AND METHOD FOR PROVIDING USER INTERFACE FOR A VIRTUAL REALITY ENVIRONMENT

Facebook Technologies, LL...

1. A device connectable to a portable computing platform, the device comprising:an illuminator configured to illuminate a scene with structured light;
a camera configured to capture reflections of the structured light coming from at least one object in the scene; and
a pre-processor configured to:
perform initial image processing of data related to the captured reflections from the camera, and
communicate the data after initial image processing to a processor of the portable computing platform to generate a depth map of the at least one object based on the reflections, the device being in communication via the pre-processor with the portable computing platform and a near eye display forming a virtual reality headset.

US Pat. No. 10,559,097

METHODS AND SYSTEMS FOR PROVIDING MAPPING, DATA MANAGEMENT, AND ANALYSIS

ESRI TECHNOLOGIES, LLC., ...

1. A method for providing mapping, data management and analysis, comprising:accepting data for at least two different data sets, the data comprising user-generated vector data comprising application data and geo-spatial data, the application data comprising desktop application data and Web-enabled application data;
performing a vector density analysis of each data set using: temporal analysis, intersection analysis, spatial concentration analysis, or spatial correlation analysis;
rating and tagging each vector density analyzed data set in order to identify the most relevant and accurate data;
initiating, using user criteria, creation of a map for each rated and tagged data set with a desired Gaussian aggregation and desired color map parameters;
loading each rated and tagged data set to be utilized in each map;
rasterizing each loaded data set by converting images described in terms of mathematical elements to equivalent images composed of pixel patterns that are stored and manipulated as sets of bits;
converting each rasterized data set to a certain scale;
performing a convolution operation on each converted data set;
applying convolution results to a color ramp; and
creating each map based on the color ramp and the convolution results;
creating a combination map illustrating where the at least two different data sets intersects each other and illustrating proximity and magnitude of the at least two different data sets.

US Pat. No. 10,559,096

DIGITAL PAINT GENERATION BASED ON PHYSICAL DIGITAL PAINT PROPERTY INTERACTION

Adobe Inc., San Jose, CA...

1. In a digital paint generation and physical property animation environment, a method implemented by at least one computing device, the method comprising:receiving, by the at least one computing device, user selection of at least two color or physical digital paint properties via a user interface;
associating, by the at least one computing device, the at least two color or physical digital paint properties with a mix control in the user interface;
receiving, by the at least one computing device, a first user input resulting from user interaction detected with respect to the mix control in the user interface as specifying amounts of both of the at least two color or physical digital paint properties;
determining, by the at least one computing device, interaction of the at least two color or physical digital paint properties based on the first user input; and
generating, by the at least one computing device, an animation of digital paint in the user interface in real time as following a second user input with respect to the user interface and having the amounts of the at least two color or physical digital paint properties as the first user input is received based on the interaction of the at least two color or physical digital paint properties.

US Pat. No. 10,559,089

INFORMATION PROCESSING APPARATUS AND INFORMATION PROCESSING METHOD

Sony Interactive Entertai...

1. An information processing apparatus comprising:an image acquisition block configured to acquire data of stereo images with a same space taken by left and right cameras having a known interval there between; and
a positional information generation block configured to detect corresponding points by executing block matching on a reference block set to one of said stereo images for detecting an area having a high similarity degree within a search range set to the other of said stereo images, generate information of a position including a distance of a target from the camera on the basis of an obtained parallax, and output the generated information,
wherein said positional information generation block executes said block matching after once adjusting and determining a start position and a length of said search range on the basis of an approximate value of said position of an acquired target, thereby generating final information of said position of the same target,
wherein said positional information generation block includes a distance approximate value acquisition block configured to estimate a distance of a target so as to acquire said approximate value, and
wherein said distance approximate value acquisition block acquires a distance of an object to be imaged from the camera by executing block matching on said stereo images in a search range wider than a search range in generating information of said final position, generates a depth image with the acquired distance indicative of a pixel value on an image plane, and estimates a distance of said target by applying an area of a figure of the target detected from one of said stereo images.

US Pat. No. 10,559,087

INFORMATION PROCESSING APPARATUS AND METHOD OF CONTROLLING THE SAME

CANON KABUSHIKI KAISHA, ...

1. An information processing apparatus connected to an image display apparatus, comprising:one or more processors; and
a memory coupled to the one or more processors, the memory having stored thereon instructions which, when executed by the one or more processors, cause the information processing apparatus to function as:
a first acquisition unit configured to acquire a real space image captured by an image capturing unit provided for the image display apparatus;
a second acquisition unit configured to acquire data that is measured by a measuring unit which is provided for the image display apparatus and measures a distance from the image display apparatus to an object included in the real space;
a generating unit configured to, generate, based on the data that indicates the distance acquired by the second acquisition unit, a combined image by superimposing a CG (Computer Graphics) object on the image acquired by the first acquisition unit; and
a setting unit configured to set a measurement frequency of the measuring unit to a first measurement frequency in a case where a specific object is included in the image acquired by the first acquisition unit, and to set the measurement frequency of the measuring unit to a second measurement frequency lower than the first measurement frequency in a case where the specific object is not included in the image acquired by the first acquisition unit,
wherein a display range that the image display apparatus displays is narrower than a captured imaging range that the image capturing unit captures, and is a central portion of the imaging range, and the setting unit,
in a case where there is a physical object moving toward the display range within the image that the image capturing unit captured, sets the measurement frequency of the measuring unit to the first measurement frequency, and
in a case where, outside of the display range within the image that the image capturing unit captured, there is a physical object moving away from the display range, sets the measurement frequency of the measuring unit to the second measurement frequency.

US Pat. No. 10,559,077

IMAGE PROCESSING APPARATUS, IMAGE PROCESSING METHOD, AND PROGRAM

TERUMO KABUSHIKI KAISHA, ...

1. An image processing apparatus for using OCT to process a plurality of cross-sectional images obtained by moving an imaging core inside a catheter in an axial direction while rotating the imaging core, the apparatus comprising:a processor configured to:
store data relating to the cross-sectional images in association with position information in the axial direction when each of the cross-sectional images is acquired;
extract a first cross-sectional image in which a disappearance section enabling determination that there is a disappeared portion of an external elastic membrane included in a vascular tomographic image starts, and a second cross-sectional image in which the disappearance section ends, in the plurality of cross-sectional images; and
acquire the position information in the axial direction of the first cross-sectional image and the second cross-sectional image, and for calculating an ablation range influenced by ablation at a position associated with the disappearance section, based on a difference in the acquired position information in the axial direction; and
wherein in a case where a distance from an intravascular wall to the external elastic membrane is set to t and a difference in the position information in the axial direction is set to m, the processor is configured to:
set a semicircle having a string having a length m at a position away from the center as far as the distance t, as the ablation range.

US Pat. No. 10,559,075

PRINTER-VERIFIERS AND SYSTEMS AND METHODS FOR VERIFYING PRINTED INDICIA

1. A printer-verifier device, comprising:an imaging sensor, configured to capture an image of a printed indicium on a print media; and
a processor communicatively coupled to the imaging sensor, and configured to:
evaluate a print quality of the printed indicium from the image of the printed indicium captured by the imaging sensor;
retrieve two or more messages from a plurality of messages stored in a memory, based on at least a first language corresponding to a specific location of the printer-verifier device and a second language corresponding to a language preferred by a printer user; and
cause the printer-verifier device to print the two or more messages on a rejected printed media, wherein the rejected printed media comprises the printed indicium having the evaluated print quality to be not meeting a print quality standard, wherein the first language and the second language comprise human languages.

US Pat. No. 10,559,074

SAMPLE OBSERVATION DEVICE AND SAMPLE OBSERVATION METHOD

Hitachi High-Technologies...

1. A sample observation device comprising:a charged particle microscope that images a sample placed on a movable table by irradiating and scanning the sample with a charged particle beam;
an image storage device configured to store a degraded first image having poor image quality and a high quality second image having satisfactory image quality which are obtained at a same first location of the sample, wherein the degraded first image is imaged by the charged particle microscope with first imaging conditions and the high quality second image is imaged by the charged particle microscope with second imaging conditions different from the first imaging conditions; and
a processor programmed to:
calculate an estimation process parameter for estimating the high quality second image from the degraded first image by using the degraded first image and the high quality second image which are stored in the image storage device,
obtain a degraded third image at a desired second location of the sample and which is imaged by the charged particle microscope with the first imaging conditions, and
estimate a high quality fourth image of the desired second location by using the calculated estimation process parameter and the degraded third image.

US Pat. No. 10,559,068

IMAGE PROCESSING DEVICE, IMAGE PROCESSING METHOD, AND PROGRAM PROCESSING IMAGE WHICH IS DEVELOPED AS A PANORAMA

FUJIFILM Corporation, To...

1. An image processing device comprising:an image acquisition section that acquires a first image which is acquired from an imaging element by imaging a subject image using an optical system;
a second image generation section that generates a second image which is developed as a panorama by performing polar coordinate transformation on the first image acquired by the image acquisition section, wherein the sagittal direction and the tangential direction of the first image correspond to the horizontal direction and the vertical direction of the second image such that the tangential direction and the sagittal direction of the first image and the vertical direction and the horizontal direction of the second image are aligned; and
a resolution enhancement processing section that performs resolution enhancement processing on the second image asymmetrically in the horizontal direction and the vertical direction of the second image,
wherein the resolution enhancement processing section performs the resolution enhancement processing on only a partial area of the second image in the vertical direction.

US Pat. No. 10,559,063

IMAGE GENERATING APPARATUS AND METHOD FOR GENERATION OF 3D PANORAMA IMAGE

SAMSUNG ELECTRONICS CO., ...

1. A method for generating a 3D panoramic image by an image generating apparatus, the method comprising:receiving a plurality of 2D images and a plurality of depth maps, each depth map corresponding to a respective one of the plurality of 2D images;
setting a left-eye image area and a right-eye image area for each of the plurality of 2D images based on the plurality of depth maps; and
generating a left-eye panoramic image by composing the left-eye image areas set for each of the plurality of 2D images, and generating a right-eye panoramic image by composing the right-eye image areas set for each of the plurality of 2D images,
wherein the setting comprises analyzing depth values of each of the plurality of depth maps and setting, from among 2D image areas in a respective 2D image corresponding to areas having similar depth values, an image area belonging to a first area as a left-eye image area for the respective 2D image and an image area belonging to a second area as a right-eye image area for the respective 2D image.

US Pat. No. 10,559,060

METHOD AND APPARATUS FOR REAL TIME IMAGE DISTORTION COMPENSATION IN IMMERSIVE THEATER SYSTEM

KOREA ADVANCED INSTITUTE ...

1. A method for real time content viewpoint distortion compensation in an immersive theater system comprising:a) creating geometry data of a theater screen, and mapping position information of seating on the geometry data to reconstruct a virtual theater structure;
b) generating a grid mesh for each seat corresponding to each of a plurality of seats in the theater screen without changing edges of the theater screen; and
c) generating a compensation map with minimized distortion of the grid mesh for each seat, and based on this, single-sampling compensating a pixel of an image to be displayed on the theater screen by the compensation map,
wherein the step c) comprises comparing grid coordinates of a reference viewpoint best represented in image projected onto the theater screen with the grid mesh dependent on the viewpoint for each seat, and creating a compensation map with minimized grid mesh disparity depending on the viewpoint for each seat,
wherein the theater screen is one of a “?” shaped three-screen, a cylindrical screen in shape, and a dome screen in shape,
wherein the grid mesh may be created using different coordinate systems depending on the type of theater screen, in the case of “?” shape, the grid mesh is represented by a xy coordinate system, in the case of cylindrical shape, the grid mesh is represented by a cylindrical coordinate system, and in the case of dome shape, the grid mesh is represented by a fisheye coordinate system.

US Pat. No. 10,559,037

SYSTEM AND METHOD FOR AUTOMATICALLY CREATING INSURANCE POLICY QUOTES BASED ON RECEIVED IMAGES OF VEHICLE INFORMATION STICKERS

STATE FARM MUTUAL AUTOMOB...

1. A GUI and server based method for real-time generation and editing of dynamic insurance policy quotes based on camera image data of new vehicles and user-specific data, the method comprising:implementing a dynamic policy module as software as a service (SaaS) on a back-end server, the dynamic policy module implemented at least partially on the back-end server and at least partially on a smart phone, the dynamic policy module including an application programming interface (API) portion executing on the back-end server, and the dynamic policy module further including a client portion executing on the smart phone, wherein the client portion accesses the back-end server via the API portion through a computer network;
generating, with the client portion of the dynamic policy module, a graphical user interface (GUI) on a display of the smart phone, the smart phone associated with a customer;
receiving, via the GUI of the smart phone, customer data from a customer to be insured, wherein the customer data includes a user name, a user password, and customer responses to demographic or lifestyle questions;
transmitting, via the computer network, the customer responses to the demographic or lifestyle questions, from the client portion to the API portion of the dynamic policy module;
capturing, by a camera of the smart phone, an image comprising a vehicle information sticker of a new vehicle;
transmitting, via the computer network, the image of the vehicle information sticker to the API portion of the dynamic policy module, the image of the vehicle information sticker comprising at least one of a make, a model, a year, a color, a manufacturer's suggested retail price (MSRP), a fuel economy, a quick response (QR) code, a standard equipment list, an optional equipment list, or a safety rating corresponding to the new vehicle;
processing, by the back-end server, the image of the vehicle information sticker, wherein the processing includes:
(i) extracting information from the image;
(ii) transforming, by the API portion of the dynamic policy module, the image of the vehicle information sticker into a computer readable format by implementing one or more of optical character recognition, bar-code scanning, or QR-code scanning;
(iii) identifying a particular vehicle based on the extracted and transformed information, wherein the vehicle information sticker includes one or more of a make, a model, a year, a color, a manufacturer's suggested retail price (MSRP), a fuel economy, a quick response (QR) code, a standard equipment list, an optional equipment list, or a safety rating corresponding to the particular vehicle;
determining, based on the computer readable format of the image of the vehicle information sticker, by the API portion of the dynamic policy module, that the new vehicle corresponds to a particular vehicle, the particular vehicle having a set of technical specifications;
retrieving, via the computer network, vehicle data corresponding to the particular vehicle from a vehicle database operating separately from the back-end server;
creating, by the back-end server, an insurance policy quote based at least in part on the customer responses to the demographic or lifestyle questions and the retrieved vehicle data of the particular vehicle, wherein each insurance policy quote includes a premium and one or more of: (i) a deductible amount, (ii) a liability amount, (iii) an uninsured motorist amount, or (iv) a damage coverage amount;
sending to the client portion of the dynamic policy module on the smart phone, via the computer network, the insurance policy quote for the particular vehicle to be presented via the GUI of the smart phone;
receiving, at the back-end server via the GUI of the smart phone and via the computer network, an indication to edit the insurance policy quote;
presenting, via the GUI of the smart phone, an editing interface, wherein the editing interface receives a customer input to modify one or more of (i) the deductible amount, (ii) a liability amount, (iii) an uninsured motorist amount, or (iv) a damage coverage amount of the insurance policy quote of the particular vehicle;
executing, via the client portion of the dynamic policy module, the GUI on the display of the smart phone, the GUI providing an editing interface for editing the insurance policy quote for the particular vehicle in real-time, wherein editing the insurance-policy quote for the particular vehicle in real-time comprises:
(a) receiving, by the API portion executing on the back-end server, edited insurance policy quote information corresponding to the one or more of (i) the deductible amount, (ii) a liability amount, (iii) an uninsured motorist amount, or (iv) a damage coverage amount of the insurance policy quote of the particular vehicle,
(b) receiving, by the API portion executing on the back-end server, the customer data corresponding to demographic or lifestyle information of the customer,
(c) updating, by the API portion executing on the back-end server, the insurance policy quote for the particular vehicle based on the edited insurance policy quote information and the customer data to generate a new insurance policy quote,
(d) calculating, by the back-end server, a new premium for the new insurance policy quote for the particular vehicle based on the customer input,
(e) transmitting, to the client portion of the dynamic policy module, the new insurance policy quote for the particular vehicle,
(f) presenting, via the GUI of the smart phone, the new insurance policy quote for the particular vehicle,
(g) receiving, from the client portion of the dynamic policy module, an indication to purchase the new insurance policy quote,
(h) receiving, at the back-end server, a purchase transaction corresponding to the new insurance policy quote, and
(i) generating a profile of the customer associating the new insurance policy quote with the new vehicle.

US Pat. No. 10,559,029

SYSTEM AND METHOD FOR MANAGEMENT AND ACTIVATION OF CONDITIONAL BID OFFERS

1. A system for interaction between a plurality of network-connected buyer devices and a plurality of network-connected seller devices, comprising:a network-connected controller computer comprising at least a processor and a storage device further comprising a program stored in the storage device and operating on the processor, the program when executed by the processor, causes the processor to:
receive a plurality of connections, over a network, from a plurality of seller devices;
receive a plurality of connections, over the network, from a plurality of buyer devices;
receive a plurality of subscriptions from the plurality of seller devices wherein the plurality of subscriptions subscribe to at least a plurality of seller product keywords, the plurality of seller product keywords corresponding to a plurality of products;
receive a bid offer request from a first buyer device of the plurality of buyer devices, the bid offer request comprising at least a plurality of buyer product keywords;
parse the bid offer request to identify at least one buyer product keyword;
identify at least one identified seller device from the plurality of seller devices that subscribe to the plurality of seller product keywords wherein the at least one buyer product keywords is in a same category as an at least one seller product keyword of the plurality of seller product keywords;
send the bid offer request to the at least one identified seller device;
receive a plurality of conditional offer responses from at least a portion of the plurality of seller devices, each conditional offer response of the plurality of conditional offer responses comprising at least an offer and conditional variables, the conditional variables comprising a criterion to quantify a purchase condition;
send the plurality of conditional offer responses to the first buyer device;
receive a first activation response from the first buyer device, the first activation response fulfilling a purchase condition of a first conditional offer response from a first seller device whereby fulfilling the purchase condition activates a corresponding first offer of the first conditional offer response;
receive a fulfillment of the purchase condition, from the first buyer device, the fulfillment associated to processing and verifying a pre-payment;
generate a unique token code associated to the first offer;
send the token code to the first buyer device and to the first seller device.

US Pat. No. 10,559,016

GENERATION ONLINE E-COMMERCE AND NETWORKING SYSTEM FOR TRANSFORMING CURRENT ONLINE ADVERTISEMENTS INTO USER-INTERACTIVE AND USER PARTICIPATED ONLINE ADVERTISEMENTS

1. A computer implemented method, executable by a computer system residing on at least one server, for transforming current online advertisements into user-interactive or user-participated online advertisements to address low membership reach rates of websites, poor online advertising response rates (CPC, CPM, etc.), and to combat phony clicks on online advertisements, wherein said system comprising a plurality of online accounts associated with end-users, a plurality of online accounts associated with advertisers, a plurality of online accounts associated with publishers, and a plurality of connected external websites, said method (a) for transforming current online advertisements into user-interactive online advertisements comprises the steps of:automatically identifying, by at least one processor, said current online advertisements from online accounts associated with advertisers;
automatically activating, by at least one processor, a sponsor advertisement to capture incentive data populated from accounts associated with advertisers, wherein said incentive data are stored in at least one database;
automatically inserting, by at least one processor, user incentive links, buttons and the like into said current online advertisements upon detecting linkage commands to generate enhanced online advertisements;
automatically activating said enhanced online advertisements with incentives upon detecting posting commands, via said sponsor advertisement module, from said accounts associated with advertisers;
automatically displaying said enhanced online advertisements on websites associated with publishers via said sponsor advertisement module and interface scripts; and
automatically providing interactive computer functions, via said sponsor advertisement module and interface scripts, to user accounts associated with end-users upon detecting clicks on said enhanced online advertisements, wherein said enhanced online advertisements are programmed for machine and human interactions, such as end-user controlling which enhanced online advertisements to be displayed on webpages associated with end-users, depositing incentives upon qualified clicks, displaying incentives, inputting comments and rating, signing in or creating new accounts, requesting sponsorship, selecting sponsors, interacting with sponsors, and the like, therefore, said current online advertisements are transformed into user-interactive online advertisements for advertising entities and individuals;
Said method (b) for transforming current online advertisements into user-participated online advertisements comprises the steps of:
automatically identifying, by at least one processor, said current and user-interactive online advertisements previously created from online accounts associated with advertisers;
automatically inserting, by at least one processor, user-participation incentive links, buttons and the like into said current and user-interactive online advertisements upon detecting computer commands from online accounts associated with advertisers;
automatically activating, by at least one processor, a sponsor advertisement module to embed computer functions for accounts associated with end-users to participate in modification, design and endorsement of said current and user-interactive online advertisements upon detecting selections of said current and user-interactive online advertisements for transformation from online accounts associated with advertisers;
automatically displaying, via said sponsor advertisement module and interface scripts, said transformed online advertisements on said computer system online screens and webpages of external websites;
automatically executing said embedded computer functions, via said sponsor advertisement module and interface scripts, upon detecting computer commands to modify and design said current and user-interactive online advertisements selected by user accounts associated with end-users, wherein said embedded computer functions include but not limited to changing font, size, color, content, uploading or modifying audio or video files and the like, therefore, transforming said advertisements into user-participated online advertisements for advertising entities and individuals; and
automatically executing said embedded computer functions, via said sponsor advertisement module and interface scripts, upon detecting commands to endorse current and user-interactive online advertisements selected by user accounts associated with end-users, wherein said endorsement computer functions include but not limited to adding text, graphical, audio and video endorsements to said current and user interactive online advertisements, therefore, transforming said advertisements into user-participated online advertisements for advertising entities and individuals.

US Pat. No. 10,559,011

VIRAL MARKETING OBJECT ORIENTED SYSTEM AND METHOD

PAYASONE INTELLECTUAL PRO...

1. A computer server for providing reference placement on sites accessible over a network by a viewer, said computer server comprising:a processor and associated memory said memory including:
reference specification software module enabling the processor to receive and store a topic specified by a user and at least one parameter relating to the display of references relating to the specified topic for a specified type of viewer;
site information software module enabling said processor to obtain information relating to at least one of a web site being visited and information relating to the viewer;
content evaluation software module enabling said processor to evaluate a favorability of content of a web page in relation to the specified topic, wherein favorability relates to approving or supporting the specified topic; and
placement software module enabling said processor to send a computer file having at least one reference to a web page in response to a placement request wherein the reference relates to content correlated to the parameter and specified topic in accordance with favorability indicated by the content evaluation software module,
wherein said placement software module enables the processor to send a reference in the form of a link, and
wherein said site information software module includes software enabling said processor to obtain metadata relating to at least one of the web site being visited and information relating to the viewer.