US Pat. No. 10,193,618

LOOPBACK TESTING IN FREQUENCY DIVISION DUPLEX SYSTEMS

Telefonaktiebolaget LM Er...

6. A communication device for loopback testing, the communication device being operable in a communication system, and comprising a transmitter and a receiver and being configured to apply frequency division duplex (FDD) for communication, the communication device being further configured to:degrade a linearity of the transmitter as compared to the linearity of the transmitter during normal operation by inducing one or more amplifiers of the transmitter to operate in a more non-linear region of their transfer function;
transmit at least one test signal in a transmit frequency band, such that at least one signal is created in a receive frequency band, wherein the at least one created signal is a distortion product of the at least one test signal; and
receive a response to the at least one created signal in the receive frequency band for performing loopback testing irrespective of a requirement for one or more additional switching circuitry to bypass transmit or receive filters.

US Pat. No. 10,193,617

RELAY METHOD, RELAY SYSTEM, RECORDING MEDIUM, AND METHOD

FUJITSU LIMITED, Kawasak...

1. A relay method executed by a plurality of relay apparatuses included in a ring network that establishes a plurality of virtual area networks (VLANs), the relay method comprising:when a communication failure of a path among a plurality of paths of the ring network is detected, transmitting a control frame for acquiring, from each of the plurality of relay apparatuses, one or more VLANs and one or more priority levels corresponding to the one or more VLANs;
switching each of one or more paths which is different from the failed path and related to a VLAN of the failed path, to an alternate path, based on the acquired one or more VLANs, the acquired one or more priority levels, and a location at which the communication failure is occurred;
when another route among the one or more paths exists in the alternate path, determining whether to switch the another route based on the acquired one or more priority levels;
switching or maintaining the another route based a result of the determining; and
switching the failed path to the alternate path.

US Pat. No. 10,193,616

LOW DATA VOLUME SATELLITE COMMUNICATION SYSTEM

eSAT Global, Inc., Solan...

1. A communication system, comprising:at least one terminal; and
at least one network infrastructure in wireless communication with the at least one terminal, the at least one network infrastructure having an information element which includes scheduled transmission information;
wherein the at least one terminal is configured to communicate with the at least one network infrastructure by sending a burst comprising a message at a pre-scheduled time such that the at least one network infrastructure can derive a terminal identity for the at least one terminal by comparing the time of the burst with the scheduled transmission information in the information element without having to include terminal identity information in the message.

US Pat. No. 10,193,615

APPARATUS AND METHOD FOR COMMUNICATIONS MANAGEMENT

BAE Systems Plc, London ...

1. Apparatus for management of communications resources of a moving platform comprising an on-board communications system configured to effect wireless data communication between said moving platform and another node, said communications resources comprising a plurality of wireless communications links and a plurality of antennas associated therewith, the apparatus comprising an antenna analysis and selection module residing with said communications system and configured to:receive, during a mission from one or more systems/subsystems and/or functions of said moving platform, attribute data representative of said emissions control criteria, said attribute data comprising (i) location data representative of a specified emissions control region, and (ii) position and/or attitude and/or velocity data representative of an adversary node defining an emissions control region;
determine, using said attribute data and based on said emissions control criteria, suitability of one or more on-board antennas and/or portions of aperture antenna for supporting said communications requirement;
for each of a plurality of antennas/portions of aperture antenna determined to be suitable for supporting said communications requirement based on said emissions control criteria, determine a quality metric, said quality metric being indicative of a respective performance criterion; and
select one or more of said suitable antennas/portion of aperture antenna having a highest performance criterion, for facilitating said communications requirement.

US Pat. No. 10,193,614

DATA-RECEIVING METHOD AND APPARATUS FOR RELAY STATION IN WIRELESS COMMUNICATION SYSTEM

LG ELECTRONICS INC., Seo...

1. A method of transmitting one or more signals in a wireless communication system, performed by an evolved NodeB (eNB), the method comprising:transmitting one or more reference signals to a relay node (RN),
wherein the one or more reference signals are transmitted on an antenna port 7;
transmitting the one or more signals in one or more downlink subframes,
wherein the one or more signals are eNB-to-RN transmissions on a R-PDCCH (relay-physical downlink control channel),
wherein the R-PDCCH is demodulated based on the one or more reference signals transmitted on the antenna port 7,
wherein the one or more downlink subframes are configured as one or more MBSFN (Multimedia Broadcast multicast service Single Frequency Network) subframes,
wherein each of the one or more downlink subframes includes a plurality of OFDM (orthogonal frequency division multiplexing) symbols in a time domain,
wherein, when six OFDM symbols in a second slot of the downlink subframe are used for the eNB-to-RN transmissions, the one or more reference signals are only mapped to one or more resource elements in a first slot of the downlink subframe.

US Pat. No. 10,193,613

PING PONG BEAMFORMING

Intel IP Corporation, Sa...

1. One or more non-transitory, computer-readable media having one or more instructions, the one or more instructions comprising instructions that, when executed, cause a first device to:perform a ping-pong beamforming process, wherein the instructions that, when executed, cause the first device to perform the ping-pong beamforming process comprise instructions that, when executed, cause the first device to:
send a first training signal using a first weight vector to a second device;
receive, from the second device, a second training signal sent using a second weight vector;
estimate, based on the second training signal, an indexed signal, wherein an estimate of the indexed signal comprises a product of the second weight vector and a channel;
determine a third weight vector based on a complex conjugate of the estimate of the indexed signal; andnormalize the third weight vector; andperform a first iteration of the ping-pong beamforming process using a transmission protocol to exchange one or more messages with the second device, the transmission protocol comprising a plurality of time slots, and an individual time slot selected from the plurality of time slots dedicated to one transmission direction and comprising a training period followed by a data period, wherein the first iteration of the ping-pong beamforming process comprises the send, the receive, the estimate, the determine, and the normalize.

US Pat. No. 10,193,612

TIME-BASED RADIO BEAMFORMING WAVEFORM TRANSMISSION

The United States of Amer...

1. A method performed, at least in part, by a multiple input-multiple output beamforming system, the method comprising:transmitting, by way of a first transmitter that is part of a plurality of transmitters, a first radio beamforming waveform at a first time;
selecting a second time;
transmitting, by way of a second transmitter that is part of the plurality of transmitters, a second radio beamforming waveform at the second time after transmission of the first radio beamforming waveform at the first time such that the second radio beamforming waveform does not interfere with the first radio beamforming waveform;
receiving a response to the first radio beamforming waveform; and
receiving a response to the second radio beamforming waveform,
where the selection of the second time is made so that a start of the transmission of the second radio beamforming waveform occurs after completion of the transmission of the first radio beamforming waveform and
where the selection of the second time is made so that a start of the transmission of the second radio beamforming waveform occurs after completion of the reception of the response to the first radio beamforming waveform.

US Pat. No. 10,193,611

SYSTEMS AND METHODS FOR FOCUSING BEAMS WITH MODE DIVISION MULTIPLEXING

NXGEN IP PARTNERS, LLC, ...

1. A method for focusing a Hermite-Gaussian function multiplexed beam, comprising:receiving a Hermite-Gaussian function multiplexed signal from a data processing source, the Hermite-Gaussian function multiplexed signal including a plurality of data streams each having a unique Hermite-Gaussian function applied thereto and multiplexed together within the Hermite-Gaussian function multiplexed signal, each unique Hermite-Gaussian function having a beam helicity value greater than l=2;
splitting the Hermite-Gaussian function multiplexed signal into a plurality of Hermite-Gaussion function multiplexed signals;
providing each of the plurality of Hermite-Gaussion function multiplexed signals to a transmitting antenna of a plurality of transmitting antennas of an antenna array;
controlling a timing of transmissions of each of the plurality of Hermite-Gaussion function multiplexed signals from an associated transmitting antenna of the plurality of transmitting antennas to cause a transmitted plurality of Hermite-Gaussian function multiplexed signals to focus at a predetermined focus point at substantially a same time to overcome a divergence of the transmitted plurality of Hermite-Gaussian function multiplexed signals caused by the beam helicity value of greater than l=2 for each of the unique Hermite-Gaussian functions; and
transmitting the plurality of Hermite-Gaussian function multiplexed signals from the antenna array as a transmission beam.

US Pat. No. 10,193,610

ENHANCING MU-MIMO TO GROUP CLIENTS ACROSS MULTIPLE BSSIDS FOR A PHYSICAL RADIO

Hewlett Packard Enterpris...

1. A method comprising:determining, by a network device, a first plurality of client devices associated with an access point (AP) corresponding to a first basic service set (BSS) that uniquely identifies a first wireless local area network (WLAN), wherein traffic flows between each of the first plurality of client devices and the AP comprise similar frame sizes and similar inter-arrival times;
transmitting, by the network device, sounding frames to the first plurality of client devices associated with the AP;
receiving, by the network device, a plurality of feedback frames, each feedback frame indicating how the sounding frames were received by each of the first plurality of client devices;
grouping, by the network device, the first plurality of client devices into a single multi-user multiple input multiple output (MU-MIMO) group for beamforming based on the received plurality of feedback frames;
simultaneously transmitting, by the network device, the traffic flows to the first plurality of client devices in the MU-MIMO group.

US Pat. No. 10,193,609

METHOD FOR FEEDING BACK CHANNEL STATE INFORMATION, BASE STATION AND USER EQUIPMENT

China Academy of Telecomm...

1. A method for feeding back Channel State Information (CSI), comprising steps of:dividing a plurality of antenna ports into a plurality of groups of antenna ports;
configuring for each group of antenna ports a same intra-group codebook set consisting of a plurality of intra-group precoding matrices, allocating for each group of antenna ports a plurality of different reference signals corresponding to a same reference resource, and configuring for each antenna port in each group of antenna ports a precoded reference signal acquired after a precoding operation using the intra-group precoding matrices, a number of the reference resources corresponding to a number of the intra-group precoding matrices in the intra-group codebook set, and a number of the reference signals corresponding to each reference resource corresponding to a number of groups of inter-group antenna ports;
transmitting the precoded reference signal to a User Equipment (UE) via each antenna port; and
receiving the CSI fed back by the UE based on measurement on the reference signal.

US Pat. No. 10,193,608

METHOD FOR TRANSMITTING/RECEIVING CHANNEL STATE INFORMATION IN WIRELESS COMMUNICATION SYSTEM AND DEVICE THEREFOR

LG ELECTRONICS INC., Seo...

1. A method for transmitting, by a user equipment (UE), channel state information (CSI) in a wireless communication system, the method comprising:determining CSI for a serving cell of an unlicensed band; and
transmitting the CSI at a periodic CSI reporting instance within a reserved resource period (RRP) which is a time period occupied to transmit and receive data in the serving cell,
wherein another CSI prior to an initial rank indication (RI) reporting instance within the RRP is dropped or transmitted through an out of range (OOR) message.

US Pat. No. 10,193,607

DETERMINING A SOUNDING INTERVAL BASED ON THROUGHPUT

ARRIS Enterprises LLC, S...

15. A method for determining a sounding interval, wherein the method comprises:by an electronic device:
initializing a set of potential sounding intervals, wherein a given potential sounding interval specifies how often transmission beamforming is updated using sounding packets;
communicating, for at least another electronic device, first packets with and second packets without transmission beamforming for the set of potential sounding intervals, wherein, during the communication, an antenna pattern of the electronic device for use when communicating the first packets is updated;
receiving transmission statistics for the communication with at least the other electronic device;
calculating rank positions for the set of potential sounding intervals based at least in part on a performance metric associated with the transmission statistics and numbers of packets transmitted with transmission beamforming for the set of potential sounding intervals out of a total number of packets transmitted;
determining an output sounding interval based at least in part on the calculated rank positions;
repeating the communicating, receiving, calculating, and determining until a convergence criterion is achieved, wherein the convergence criterion corresponds to a difference in the output sounding interval determined in two or more instances of the repeating;
calculating frequencies, over multiple iterations, based at least in part on the rank positions for the set of potential sounding intervals;
determining, when the convergence criterion is achieved, a moment based at least in part on the calculated frequencies;
revising the set of potential sounding intervals; and
repeating, one or more times, the communicating, receiving, calculating, determining the output sounding interval, calculating the frequencies, and determining the moment based at least in part on the revised set of potential sounding intervals.

US Pat. No. 10,193,606

BEAM CONFIGURATION METHOD AND DEVICE

HUAWEI TECHNOLOGIES CO., ...

1. A beam configuration method applied to an electronic device, wherein the electronic device comprises a first plane, the first plane comprises at least two antenna array units, and the method comprises:determining whether an included angle between a ray that is perpendicular to the first plane and that extends outward from the electronic device and a ray pointing from the electronic device to a peer device is less than or equal to a preset angle; and
when the included angle between the ray that is perpendicular to the first plane and that extends outward from the electronic device and the ray pointing from the electronic device to the peer device is less than or equal to the preset angle, adjusting a phase difference between the antenna array units in the first plane, so that the array factors satisfy a condition of an end-fire state;
when the at least two antenna array units in the first plane are in uniform straight-line distribution, array factors of the antenna array units in the first plane are
wherein ?=?+kd cos ?, ? is a wave path difference between different antenna array units, ? is a phase difference between the two antenna array units,k is a quantity of waves, ? is a wavelength, d is a distance between the two antenna array units, and ? is an included angle between the ray that is perpendicular to the first plane and that extends outward from the electronic device and a ray in the direction of the first beam.

US Pat. No. 10,193,605

BEAMFORMING CODEWORD EXCHANGE BETWEEN BASE STATIONS

Comcast Cable Communicati...

1. A first base station configured to communicate with a wireless device, the first base station comprising:one or more processors; and
memory storing instructions that, when executed by the one or more processors, cause the first base station to:
receive, from a second base station, at least one message comprising a plurality of downlink beamforming information elements for a downlink cell, wherein each downlink beamforming information element of the plurality of downlink beamforming information elements is associated with a respective resource block of a plurality of resource blocks in the downlink cell and indicates a parameter for beamforming for the respective resource block;
select, for at least one resource block of the plurality of resource blocks, a first beamforming codeword based at least in part on at least one first downlink beamforming information element of the plurality of downlink beamforming information elements, wherein the at least one first downlink beamforming information element is associated with the at least one resource block; and
transmit, to the wireless device, signals on the at least one resource block employing the first beamforming codeword.

US Pat. No. 10,193,604

DEVICE, NETWORK, AND METHOD FOR RECEIVING DATA TRANSMISSION UNDER SCHEDULING DECODING DELAY IN MMWAVE COMMUNICATION

Futurewei Technologies, I...

1. A method for receiving a millimeter wave (mmWave) communication, comprising the operations of:receiving, at a user equipment (UE), a control transmission portion of the mmWave communication;
assigning scheduling restrictions to an earlier portion of the control transmission portion of the mmWave communication;
performing demodulation and decoding of the earlier portion of the control transmission portion;
prior to completion of the demodulation and decoding of the earlier portion of the control transmission portion, receiving, an earlier portion of a data transmission portion of the mmWave communication, the earlier portion of the data transmission portion of the mmWave communication corresponding to the earlier portion of the control transmission portion of the mmWave communication;
performing beamforming of the earlier portion of the data transmission portion of the mmWave communication using default parameters;
performing demodulation and decoding of a later portion of the control transmission portion; and
performing beamforming of the later portion of the data transmission portion of the mmWave communication using parameters obtained during the performing of demodulation and decoding of the later portion of the control transmission portion.

US Pat. No. 10,193,603

COMMUNICATION UNIT, INTEGRATED CIRCUIT AND METHOD FOR GENERATING A PLURALITY OF SECTORED BEAMS

Analog Devices Global, H...

1. A communication unit for generating a plurality of sectored beams, the communication unit comprising:a plurality of antenna element feeds arranged to couple to a plurality of antenna elements of an antenna array, wherein an individual antenna element feed of the plurality of antenna element feeds is configured to provide a transmit signal associated with two sectors;
a plurality of transmitters operably coupled to the plurality of antenna element feeds; wherein a transmitter of the plurality of transmitters is configured to receive a first signal associated with a first sector and a second signal associated with a second sector, the two sectors comprising the first sector and the second sector, and the transmitter comprises:
beamformer logic arranged to apply independent beamform weights on the first signal and the second signal of the transmitter to generate a weighted first signal and a weighted second signal, respectively, wherein each of the independent beamform weights is allocated on a per sector basis; and
a signal combiner arranged to combine the weighted first signal and the weighted second signal to produce a combined signal such that the combined signal supports sectored beams for the two sectors, wherein an output of the signal combiner is operably coupled to the individual antenna element feed, and
wherein the beamformer logic is configured to apply a calibration correction coefficient so as to calibrate an amplitude and a phase of the combined signal.

US Pat. No. 10,193,602

THERMAL THROTTLING USING RF DIVERSITY

QUALCOMM Incorporated, S...

1. An apparatus for wireless communications, comprising:an interface; and
a processing system configured to:
determine a link quality for each one of a plurality of radio frequency (RF) modules;
select a first one of the plurality of RF modules having a highest determined link quality;
generate a signal;
configure the interface to output a first portion of the signal to the first one of the plurality of RF modules for transmission;
determine a throughput of the first one of the plurality of RF modules during thermal throttling of the first one of the plurality of RF modules;
compare the determined throughput of the first one of the plurality of RF modules with a throughput of a second one of the plurality of RF modules; and
configure the interface to output a second portion of the signal to the second one of the plurality of RF modules for transmission if the throughput of the second one of the plurality of RF modules is higher than the determined throughput of the first one of the plurality of RF modules.

US Pat. No. 10,193,601

PRECODING CODEBOOK BITMAPS IN TELECOMMUNICATIONS

TELEFONAKTIEBOLAGET LM ER...

1. A method of operation at a Base Station (BS), the method comprising:receiving channel state information (CSI) feedback from a wireless terminal served by the BS, the wireless terminal configured with a codebook subset restriction that restricts which precoders in a precoding codebook the wireless terminal can select for indication to the BS as a preferred precoder for precoding High Speed Downlink Packet Access (HSDPA) transmissions from the BS for the wireless terminal;
determining from the CSI feedback that the configured codebook subset restriction should be changed;
generating a bitmap decision signal indicating a precoding codebook bitmap defining a changed codebook subset restriction; and
sending the bitmap decision signal to a Serving Radio Network Controller (SRNC) via an interface coupling the BS and the RNC, to trigger the SRNC to send reconfiguration signaling to the wireless terminal via the BS, to reconfigure the wireless terminal to use the changed codebook subset restriction.

US Pat. No. 10,193,600

CODEBOOK SUBSET RESTRICTION SIGNALING

Telefonaktiebolaget LM Er...

1. A method implemented by a network node for signaling to a wireless communication device which precoders in a codebook are restricted from being used, the method characterized by:generating codebook subset restriction signaling that, for each of one or more groups of precoders, jointly restricts the precoders in the group by restricting a certain component that the precoders in the group have in common, wherein the codebook subset restriction signaling is rank-agnostic signaling that jointly restricts the precoders in a group without regard to the precoders' transmission rank; and
sending the generated signaling from the network node to the wireless communication device.

US Pat. No. 10,193,598

COMMUNICATION APPARATUS, POWER RECEIVING APPARATUS, AND ANTENNA SWITCHING METHOD

Sony Corporation, Tokyo ...

1. A communication apparatus comprising:one or a plurality of sensors;
a communicator that performs proximity wireless communication; and
a connection section that couples one of a plurality of antennae to the communicator, on a basis of a detection result of the one or the plurality of sensors, wherein
the plurality of antennae includes a first antenna,
the one or the plurality of sensors includes a first sensor that is disposed nearer to the first antenna than to one of the plurality of antennae other than the first antenna, and detects contact or proximity of a user, and
the connection section couples the one of the plurality of antennae other than the first antenna to the communicator in a case where the first sensor detects the contact or the proximity of the user.

US Pat. No. 10,193,597

ELECTRONIC DEVICE HAVING SLOTS FOR HANDLING NEAR-FIELD COMMUNICATIONS AND NON-NEAR-FIELD COMMUNICATIONS

Apple Inc., Cupertino, C...

1. An electronic device, comprising:a housing having a peripheral conductive wall;
a dielectric-filled gap in the peripheral conductive wall that divides the peripheral conductive wall into first and second segments;
an antenna ground separated from the peripheral conductive wall by a slot;
a non-near-field communications antenna having an antenna feed coupled between the first segment and the antenna ground across the slot;
a near-field communications antenna having a first antenna feed terminal coupled to the first segment and a second antenna feed terminal coupled to the second segment;
a transmission line coupled to the first and second antenna feed terminals; and
near-field communications transceiver circuitry coupled to the transmission line, wherein the near-field communications transceiver circuitry is configured to convey near-field communications signals using the near-field communications antenna.

US Pat. No. 10,193,596

MAGNETIC COUPLING DEVICE WITH REFLECTIVE PLATE AND METHODS FOR USE THEREWITH

1. A coupling device comprising:a receiving portion, that receives, from a transmitting device, a radio frequency signal conveying data;
an electromagnetic coupler, that electromagnetically couples the radio frequency signal to a transmission medium as a guided electromagnetic wave that is guided by a surface of the transmission medium; and
a dielectric portion that secures the transmission medium adjacent to the electromagnetic coupler and provides a spacing between the electromagnetic coupler and a reflective plate that reduces electromagnetic emissions from the electromagnetic coupler, wherein the spacing corresponds to substantially one-half of a wavelength of the radio frequency signal.

US Pat. No. 10,193,594

METHOD AND APPARATUS FOR TRANSMITTING AND RECEIVING SIGNALS OVER PAIRS OF WIRES

British Telecommunication...

1. A method of transmitting data from a transmitter device to a plurality of receiver devices, each of which is connected to the transmitter device via a respective wire connection, the method comprising:transmitting a common signal onto all or both of the respective wire connections; and
using a multiple access technique to enable respective virtual data channels to be generated for transmitting data from the transmitter device to each of the receiver devices via its own respective virtual data channel,
wherein the common signal transmitted onto all or both of the respective wire connections is employed in a predetermined upper portion of an available frequency spectrum available for use in communicating over metallic pair connections, and in a lower portion of the available frequency spectrum vectored discrete multitone transmission is used.

US Pat. No. 10,193,593

SIGNAL PROCESSING DEVICE, COMMUNICATION SYSTEM, AND SIGNAL PROCESSING METHOD

NEC CORPORATION, Minato-...

1. A signal processing device comprising:an electrical signal generation unit generating an electrical signal on the basis of an optical signal which is polarization-multiplexed and multi-value-modulated and which is transmitted through an optical transmission path; and
a compensation unit performing a compensation process on the electrical signal,
wherein the compensation unit includes:
a Fourier transform unit performing Fourier transform on the electrical signal;
an equalization processing unit performing an equalization process on the electrical signal having undergone the Fourier transform in a frequency domain;
an inverse Fourier transform unit performing inverse Fourier transform on the electrical signal having undergone the equalization process; and
an equalization coefficient setting unit setting an equalization coefficient matrix W(f) used for the equalization process, and
wherein the equalization coefficient setting unit sets the equalization coefficient matrix W(f) on the basis of the following equation:
W(f)=H(f)H(f)(H(f)HH(f)+(1/Es)×???1
such that H(f)=G(f)×C(f), HH is a Hermitian transposed matrix of a matrix H, Es is power of the optical signal, and ? is a diagonal matrix with N rows and N columns defined on the basis of colored noise, and
G(f) is a diagonal matrix set on the basis of a band limit condition during generation of the optical signal, and C(f) is a diagonal matrix set on the basis of wavelength dispersion incurred in the optical transmission path.

US Pat. No. 10,193,592

TECHNIQUES FOR DETECTING AND CANCELLING INTERFERENCE IN WIRELESS COMMUNICATIONS

QUALCOMM Incorporated, S...

1. A method for cancelling interference in wireless communications, comprising:performing an energy level detection of a received signal to determine an allocation size and position corresponding to an interfering device in the received signal;
determining an interference demodulation reference signal (DM-RS) and cyclic shift of the interfering device in the received signal;
determining, based at least in part on the allocation size and position and the interference DM-RS and cyclic shift, whether to apply successive interference cancellation on the received signal to cancel interference from the interfering device; and
applying the successive interference cancellation on the received signal based on determining to apply the successive interference cancellation.

US Pat. No. 10,193,591

METHODS AND DEVICES FOR CONTROLLING RECEIVE CONFIGURATIONS IN WIRELESS COMMUNICATIONS

Intel Deutschland GmbH, ...

1. A circuit, comprising:a first receiver configured to demodulate a first down-converted signal, which is generated by a first radio frequency (RF) stage;
a second receiver configured to demodulate a second down-converted signal, which is generated by a second radio frequency (RF) stage; and
a controller configured to control the first RF stage and the second RF stage and the first receiver and the second receiver to alternate between a first receive configuration, in which the first down-converted signal and the second down-converted signal are both received from a first radio network, and a second receive configuration, in which the first down-converted signal is received from the first radio network and the second down-converted signal is received from a second radio network.

US Pat. No. 10,193,590

SMALL FORM-FACTOR PLUGGABLE TRANSCEIVER

AXCEN PHOTONICS CORP., N...

1. A small form-factor pluggable (SFP) transceiver for being inserted into an electrical connection slot of an electronic apparatus, comprising:a housing having a front end, a rear end opposite the front end, a top surface, a bottom surface opposite the top surface, and an engaging portion disposed on the bottom surface, wherein when the SFP transceiver is inserted into the electrical connection slot, the engaging portion is engaged with the electrical connection slot;
two electrical signal connectors disposed on the front end of the housing; and
an unlocking assembly including:
an unlocking member pivotally connected to the housing and including a manipulating portion, wherein the manipulating portion is exposed at the front end and is arranged adjacent to the top surface, and the manipulating portion is configured to be rotated in a direction away from the front end and the top surface by an external force; and
an interlock member movably disposed on the housing, wherein when the manipulating portion is rotated in the direction away from the front end and the top surface, the unlocking member moves the interlock member such that the engaging portion is out of engagement with the electrical connection slot.

US Pat. No. 10,193,589

ELECTRONIC DEVICE

GETAC TECHNOLOGY CORPORAT...

6. An electronic device, comprising: a housing; a battery demountably disposed on the housing and comprising a first engaging portion; and a locking assembly, comprising: a linking element movably disposed on the housing and comprising a second engaging portion, wherein the second engaging portion engages with the first engaging portion, allowing the battery to be fixedly disposed on the housing; a limiting element disposed on the housing and comprising a first limiting portion and a second limiting portion; and a pressing element connected to the linking element and disposed at the first limiting portion to fix relative positions of the first engaging portion and the second engaging portion, wherein, when the pressing element separates from the first limiting portion and moves to the second limiting portion, the linking element drives the second engaging portion to separate from the first engaging portion, causing the battery to separate from the housing; wherein the pressing element moves in a first direction to separate from the first limiting portion, whereas the linking element drives the second engaging portion to move in a second direction and thereby separate from the first engaging portion, wherein the first direction and the second direction are not parallel; and wherein the first limiting portion and the second limiting portion each comprise an opening, whereas the limiting element comprises a passage whereby the two openings are in communication with each other in the second direction, and a width of the passage in a third direction perpendicular to the second direction is less than widths of the two openings in the third direction.

US Pat. No. 10,193,588

HEAD PROTECTION DEVICE, COMMUNICATION UNIT, CONNECTION UNIT AND SYSTEM COMPRISING HEAD PROTECTION DEVICE, COMMUNICATION UNIT AND CONNECTION UNIT

1. A head protection device comprising a communication unit, wherein the communication unit comprises:a communication interface configured to transmit a first communication signal and to receive a second communication signal, the communication signals being digital electrical signals; and
a signal processor with an interface configured to send the first communication signal, an interface configured to detect a microphone signal, an interface configured to detect a second communication signal and an interface configured to send an ear speaker signal and the signal processor is configured such that the first communication signal is sent as a function of the microphone signal, and that the ear speaker signal is sent as a function of the second communication signal, wherein:
the signal processor further comprises a data interface incorporated into the communication interface;
the signal processor is configured to receive parameter data via the data interface;
the signal processor is configured to adapt a digital signal processing of the microphone signal for sending the first communication signal as a function of the parameter data, the signal processor adapts the digital signal processing of the microphone signal to the sending of the first communication signal such that an adaptation of the frequency response of the first communication signal is made;
the communication interface is located in an external area of the communication unit; and
the communication interface is an electrical contact unit configured to mechanically and electrically connect to a connection unit.

US Pat. No. 10,193,587

MOBILE PHONE AND COMMUNICATION METHOD THEREOF

ZTE CORPORATION, Shenzhe...

1. A mobile phone, comprising a mobile phone body and a mobile phone accessory, wherein the mobile phone accessory comprises a mobile phone card configured to communicate with an external communication device, a storage module configured to store user data and a second communication module configured to establish wireless communication with the mobile phone body; and the mobile phone body comprises:a first communication module configured to perform data interaction with the second communication module and establish wireless communication between the mobile phone body and the mobile phone accessory;
a mobile phone card information reading module configured to read information of the mobile phone card in the mobile phone accessory;
a basic communication module configured to communicate with an external communication device according to the information of the mobile phone card; and
a data transmission control module configured to send an operation instruction to the storage module, to store the user data stored in the storage module to a local memory or update user data in the local memory to the storage module.

US Pat. No. 10,193,586

DIRECT CONVERSION RECEIVER WITH CORRECTION FOR SECOND ORDER DISTORTION IN RF MIXER

TEXAS INSTRUMENTS INCORPO...

1. A receiver comprising:a clock generator to provide a first clock signal and a second clock signal;
a first node;
a second node;
a zero-intermediate frequency (zero-IF) mixer coupled to the first and second nodes, clocked by the first and second clock signals, and comprising a first transimpedance amplifier and a second transimpedance amplifier to provide a direct-conversion voltage;
a current injector, coupled to the first and second nodes, configurable to inject into the first and second nodes a common mode current or a differential mode current; and
a controller, coupled to the zero-IF mixer and the current injector, to adjust at least one of the first and second transimpedance amplifiers based on the direct-conversion voltage when the current injector is to inject the common mode current.

US Pat. No. 10,193,585

TONE REMOVAL FOR DIGITAL CIRCUITS

SiTune Corporation, San ...

1. A system comprising:an analog-to-digital converter (ADC) for converting a noisy analog signal to a noisy digital signal, the noisy analog signal comprising a first signal and a second signal, the second signal of a first frequency;
a tone signal generator for providing a third signal comprising the first frequency;
a phase estimator circuit for generating an estimated phasor value, the estimated phasor value multiplied with the third signal to provide a fourth signal;
a subtractor circuit for subtracting the fourth signal from the noisy digital signal, thereby removing a noisy component from the noisy digital signal and providing a filtered signal; and
a feedback circuit in the phasor estimator circuit, the feedback circuit comprising a complex conjugate multiplier for complex conjugate multiplication of the filtered signal and the third signal, the complex conjugate multiplication generating an error signal for generating at least a component of the fourth signal.

US Pat. No. 10,193,584

ADJUSTING AN ANTENNA CONFIGURATION OF A TERMINAL DEVICE IN A CELLULAR COMMUNICATION SYSTEM

Sony Mobile Communication...

1. A method for adjusting an antenna configuration of a terminal device in a cellular communication system, the cellular communication system comprising a base station and the terminal device. the terminal device being a portable user equipment and comprising a plurality of antenna elements, the method comprising:providing, in the terminal device, a plurality of preset antenna configurations, each antenna configuration of the plurality of preset antenna configurations defining phase information and amplitude information for each of the plurality of antenna elements, the phase information and the amplitude information used in combining signals respectively received by the antenna elements,
determining a reception characteristic of a signal transmission sent from the base station and received at the plurality of antenna elements,
comparing the determined reception characteristic with a threshold value,
in response to the determined reception characteristic is greater than the threshold value, adjusting the antenna configuration according to a channel sounding procedure, and
in response to the determined reception characteristic is less than the threshold value, adjusting the antenna configuration by:
performing consecutively for each preset antenna configuration of the plurality of preset antenna configurations:
applying the antenna configuration to the plurality of antenna elements, and
determining a reception characteristic of a signal transmission sent from the base station and received at the plurality of antenna elements with the applied antenna configuration,
selecting one antenna configuration of the plurality of preset antenna configurations based on the plurality of reception characteristics determined for the plurality of preset antenna configurations, and
applying the selected antenna configuration to the plurality of antenna elements for further signal transmissions.

US Pat. No. 10,193,583

RADIO FREQUENCY TUNER

SiTune Corporation, San ...

9. A system comprising:a transconductor configured to amplify a first signal in a voltage format to a second signal in a current format, an amplitude of the second signal being proportional to an amplitude of the first signal;
a switch connected to the transconductor and configured to convert the second signal with a first frequency to a third signal with a second frequency, wherein the second frequency is lower than the first frequency;
a first filter configured to receive the third signal and to filter the third signal into a fourth signal;
a first received signal strength indicator (RSSI) configured to:
measure a power value of the fourth signal;
determine that the power value is larger than a threshold value; and
decrease the amount of amplification at the transconductor;
a second RSSI;
a quadrature path configured to receive a quadrature component of the second signal; and
an in-phase path configured to receive an in-phase component of the second signal, wherein one of the quadrature path or the in-phase path carries both the third signal and the fourth signal, and wherein the second RSSI is configured to measure the power of a fifth signal that is on the path that does not carry both the third signal and the fourth signal.

US Pat. No. 10,193,582

INTERFERENCE CANCELLATION METHOD AND BASE STATION APPARATUS THEREFOR

Samsung Electronics Co., ...

1. A method of operating a base station for interference cancellation in a wireless communication system, the method comprising:receiving, from a target terminal, an uplink signal comprising at least one interference signal generated by at least one interference terminal;
identifying at least one dominant terminal from the at least one interference terminal based on a reception power of each of the at least one interference terminal;
performing primary decoding for the uplink signal;
generating a cancelling signal corresponding to an interference signal of the at least one dominant terminal if the primary decoding fails;
performing a cancellation by applying the cancelling signal to the uplink signal; and
performing secondary decoding for the uplink signal to which the cancelling signal has been applied.

US Pat. No. 10,193,580

MULTI-BAND RADIO-FREQUENCY RECEPTION

QUALCOMM Incorporated, S...

1. A device for wireless communication, comprising:a plurality of single-band circuits, each single-band circuit being tuned to a different frequency band; and
an amplifier comprising a transistor and coupled with the plurality of single-band circuits, the amplifier configured to receive a wide-band radio-frequency voltage signal at a gate of the transistor and select a single-band circuit from the plurality of single-band circuits, the selected single-band circuit configured to:
extract a selected frequency band signal from an amplified wide-band radio-frequency signal received from the amplifier; and
downconvert the selected frequency band signal.

US Pat. No. 10,193,579

STORAGE CONTROL DEVICE, STORAGE SYSTEM, AND STORAGE CONTROL METHOD

Toshiba Memory Corporatio...

1. A storage control device comprising:a controller that receives a request to write a data item and determines whether or not a wear degree of a target region in a storage device is less than a threshold value, the target region being a region to which the data item is written;
a compression condition determiner that determines, based on the wear degree, a compression condition out of a plurality of compression conditions including lossy compression, the compression conditions indicating how to compress the data item;
a first error correction encoder that adds an error correction code to the data item when the wear degree is less than the threshold value to generate a first encoded data item; and
a compressor that generates a compressed data item of the first encoded data item based on the compression condition,
wherein the compression condition determiner determines the compression condition that performs lossy compression capable of correcting the error and has a shortest code length of the compressed data item.

US Pat. No. 10,193,578

FLEXIBLE POLAR ENCODERS AND DECODERS

1. A method of encoding data comprising:inputting data to a first non-systematic polar encoder having a first pipeline defining a first input and a first output, and capable of encoding a polar code of length nmax;
extracting, via at least one first multiplexer of size log nmax×1, a first polar code of length n modifying the first encoded output to set frozen bits to a known value to obtain a modified first encoded output;
inputting the modified first encoded output to a second non-systematic polar encoder having a second pipeline defining a second input and a second output, and capable of encoding a polar code of length nmax; and
extracting, via at least one second multiplexer of size log nmax×1, a second polar code of length n

US Pat. No. 10,193,577

STOPPING CRITERIA FOR LAYERED ITERATIVE ERROR CORRECTION

Micron Technology, Inc., ...

1. A method, comprising:receiving a codeword with an error correction circuit;
iteratively error correcting the codeword with the error correction circuit including:
parity checking the codeword on a layer-by-layer basis; and
updating the codeword after each layer;
stopping the iterative error correction in response to a parity check being correct for a particular layer of a particular iteration within a threshold number of units of data without error correcting a next layer of the particular iteration, wherein the threshold number of units of data is at least one; and
selecting the threshold number based on a characteristic of an apparatus, the apparatus including the error correction circuit, selected from the group of characteristics including: a temporal age of the apparatus, a number of program/erase cycles of the apparatus, a storage density of the apparatus, a retention rate of the apparatus, and a physical location within the apparatus where the codeword is stored.

US Pat. No. 10,193,576

MEMORY SYSTEM AND MEMORY DEVICE

TOSHIBA MEMORY CORPORATIO...

1. A memory system comprising:a memory cell array configured to store data, a first parity generated in association with the data based on a first error correction code (ECC) scheme, and a second parity generated in association with the data and the first parity based on a second error correction code (ECC) scheme;
a first ECC control circuit configured to execute a first error correction using the first ECC scheme and the first parity during a read operation on the memory cell array;
a second ECC control circuit configured to execute a second error correction using the second ECC scheme and the second parity during a scrub operation on the memory cell array; and
a register in which a range of addresses is registered within which an error uncorrectable by the first error correction with the first ECC control circuit has occurred,
wherein the first ECC scheme and the second ECC scheme have error correction capabilities of different levels, and
wherein the second ECC control circuit executes the second error correction so as to give priority to the range indicated by the registered addresses.

US Pat. No. 10,193,575

DIGITAL BROADCASTING SYSTEM AND METHOD OF PROCESSING DATA IN DIGITAL BROADCASTING SYSTEM

LG ELECTRONICS INC., Seo...

1. An apparatus for receiving a broadcast signal, the apparatus comprising:a tuner to receive the broadcast signal, wherein the broadcast signal includes a first region and a second region, wherein the first region is concatenated with the second region, wherein the broadcast signal includes known data, signaling information, and service data;
a signaling decoder to decode the signaling information for signaling the service data, wherein the signaling information includes a first field indicating a number of subframes in a frame;
a deinterleaver to deinterleave the service data; and
a decoder to decode the deinterleaved service data,
wherein the broadcast signal further includes fast service acquisition information between a physical layer and an upper layer,
wherein the signaling information further includes a second field for the fast service acquisition information,
wherein the service data includes a data packet which includes a header and a payload,
wherein the header of the data packet includes a pointer field which represents start position information of the payload, and
wherein the header of the data packet further includes a field which is related with stuffing bytes which fills a portion in front of the payload in the data packet.

US Pat. No. 10,193,574

EFFICIENT SYNDROME CALCULATION IN PROCESSING A GLDPC CODE

APPLE INC., Cupertino, C...

1. An apparatus, comprising:an interface, which is configured to receive input data to be processed in accordance with a Generalized Low-Density Parity-Check (GLDPC) code defined by a parity-check-matrix comprising multiple sub-matrices, wherein each of the sub-matrices comprises N block-rows and N block-columns of block matrices, wherein the sub-matrices comprise main diagonals and secondary diagonals, and wherein each of the main diagonals and each of the secondary diagonals comprises N respective block matrices;
a main processing module, which is configured to calculate N first partial syndromes based on the input data and on the block matrices of the main diagonals of the sub-matrices;
a secondary processing module, which is configured to calculate N second partial syndromes based on the input data and on the block matrices of the secondary diagonals of the sub-matrices; and
combiner circuitry, which is configured to produce N syndromes by respectively combining the N first partial syndromes with the N second partial syndromes, and to encode or decode the input data, based on the N syndromes, in accordance with the GLDPC code.

US Pat. No. 10,193,573

METHOD AND DATA PROCESSING DEVICE FOR DETERMINING AN ERROR VECTOR IN A DATA WORD

Infineon Technologies AG,...

1. A method of increasing data word correctability of a corrupted data word beyond a threshold of half a minimum distance of a code minus one using linear recursion syndrome determination, the method comprising:receiving the data word, wherein n is a length of the received data word, and k is a dimension of the code as determined by n=2k?1;
determining a syndrome, the syndrome comprising a first 2k?1?k sequence elements of the received data word and a second 2k?1?k elements derived according to a linear recursion formula;
successively generating code words by selecting each of a first 2k?1?k elements to be either 0 or 1 calculating a next n?2k?1?k elements using a linear recursion formula; forming, for each code word generated, a sum of the syndrome supplemented with zeros to the data word length and the code word, and checking, for the code word, whether the sum of the syndrome supplemented with zeros to the data word length and the code word has a minimum weight among each of the sum of the syndrome supplemented with zeros; and
determining the error vector as the sum of the syndrome and the code word for which the sum of the syndrome supplemented with zeros to the data word length and the code word has a minimum weight among all code words; and
correcting the data word using the error vector,
wherein the minimum distance of the code is a smallest Hamming distance between two code words.

US Pat. No. 10,193,572

METHOD FOR RECONSTRUCTING A DATA PACKET INCORRECTLY RECEIVED IN A WIRELESS SENSOR NETWORK

AVL LIST GMBH, Graz (AT)...

1. A method for reconstructing an incorrectly received data packet that has been transmitted in a wireless sensor network from a wireless node to a receiving unit, whereina first method and a second method for reconstructing the incorrectly received data packet are implemented in the receiving unit, the first method requiring less computational effort than the second method,
in a first step, the first method for reconstructing the incorrectly received data packet is applied and a check is made for whether the incorrectly received data packet has thus been reconstructed, and
in a subsequent second step, the second method for reconstructing the incorrectly received data packet is applied if the incorrectly received data packet has not been reconstructed with the first method, and a check is made for whether the incorrectly received data packet has thus been reconstructed.

US Pat. No. 10,193,571

DATA PROCESSING DEVICE AND DATA PROCESSING METHOD

SATURN LICENSING LLC, Ne...

1. A method for generating a terrestrial digital television broadcast signal, the method decreasing a signal-to-noise power ratio per symbol for a selected bit error rate of the generated terrestrial digital television broadcast signal and/or expanding reception range of the terrestrial digital television broadcast signal at which the data is decodable by a receiving device for presentation to a user, the method comprising:receiving data to be transmitted in a terrestrial digital television broadcast signal;
performing low density parity check (LDPC) encoding, in an LDPC encoding circuitry, on input bits of the received data according to a parity check matrix of an LDPC code having a code length N of 64800 bits and a coding rate r of 13/15 to generate an LDPC code word, the LDPC code enabling error correction processing to correct errors generated in a transmission path of the terrestrial digital television broadcast signal;
wherein the LDPC code word includes information bits and parity bits, the parity bits being processed by the receiving device to recover information bits corrupted by transmission path errors,
the parity check matrix includes an information matrix portion corresponding to the information bits and a parity matrix portion corresponding to the parity bits,
the information matrix portion is represented by a parity check matrix initial value table, and
the parity check matrix initial value table, having each row indicating positions of elements ‘1’ in corresponding 360 columns of the information matrix portion as a subset of information bits used in calculating the parity bits in the LDPC encoding, is as follows,
142 2307 2598 2650 4028 4434 5781 5881 6016 6323 6681 6698 8125
2932 4928 5248 5256 5983 6773 6828 7789 8426 8494 8534 8539 8583
899 3295 3833 5399 6820 7400 7753 7890 8109 8451 8529 8564 8602
21 3060 4720 5429 5636 5927 6966 8110 8170 8247 8355 8365 8616
20 1745 2838 3799 4380 4418 4646 5059 7343 8161 8302 8456 8631
9 6274 6725 6792 7195 7333 8027 8186 8209 8273 8442 8548 8632
494 1365 2405 3799 5188 5291 7644 7926 8139 8458 8504 8594 8625
192 574 1179 4387 4695 5089 5831 7673 7789 8298 8301 8612 8632
11 20 1406 6111 6176 6256 6708 6834 7828 8232 8457 8495 8602
6 2654 3554 4483 4966 5866 6795 8069 8249 8301 8497 8509 8623
21 1144 2355 3124 6773 6805 6887 7742 7994 8358 8374 8580 8611
335 4473 4883 5528 6096 7543 7586 7921 8197 8319 8394 8489 8636
2919 4331 4419 4735 6366 6393 6844 7193 8165 8205 8544 8586 8617
12 19 742 930 3009 4330 6213 6224 7292 7430 7792 7922 8137
710 1439 1588 2434 3516 5239 6248 6827 8230 8448 8515 8581 8619
200 1075 1868 5581 7349 7642 7698 8037 8201 8210 8320 8391 8526
3 2501 4252 5256 5292 5567 6136 6321 6430 6486 7571 8521 8636
3062 4599 5885 6529 6616 7314 7319 7567 8024 8153 8302 8372 8598
105 381 1574 4351 5452 5603 5943 7467 7788 7933 8362 8513 8587
787 1857 3386 3659 6550 7131 7965 8015 8040 8312 8484 8525 8537
15 1118 4226 5197 5575 5761 6762 7038 8260 8338 8444 8512 8568
36 5216 5368 5616 6029 6591 8038 8067 8299 8351 8565 8578 8585
1 23 4300 4530 5426 5532 5817 6967 7124 7979 8022 8270 8437
629 2133 4828 5475 5875 5890 7194 8042 8345 8385 8518 8598 8612
11 1065 3782 4237 4993 7104 7863 7904 8104 8228 8321 8383 8565
2131 2274 3168 3215 3220 5597 6347 7812 8238 8354 8527 8557 8614
5600 6591 7491 7696
1766 8281 8626
1725 2280 5120
1650 3445 7652
4312 6911 8626
15 1013 5892
2263 2546 2979
1545 5873 7406
67 726 3697
2860 6443 8542
17 911 2820
1561 4580 6052
79 5269 7134
22 2410 2424
3501 5642 8627
808 6950 8571
4099 6389 7482
4023 5000 7833
5476 5765 7917
1008 3194 7207
20 495 5411
1703 8388 8635
6 4395 4921
200 2053 8206
1089 5126 5562
10 4193 7720
1967 2151 4608
22 738 3513
3385 5066 8152
440 1118 8537
3429 6058 7716
5213 7519 8382
5564 8365 8620
43 3219 8603
4 5409 5815
5 6376 7654
4091 5724 5953
5348 6754 8613
1634 6398 6632
72 2058 8605
3497 5811 7579
3846 6743 8559
15 5933 8629
2133 5859 7068
4151 4617 8566
2960 8270 8410
2059 3617 8210
544 1441 6895
4043 7482 8592
294 2180 8524
3058 8227 8373
364 5756 8617
5383 8555 8619
1704 2480 4181
7338 7929 7990
2615 3905 7981
4298 4548 8296
8262 8319 8630
892 1893 8028
5694 7237 8595
1487 5012 5810
4335 8593 8624
3509 4531 5273
10 22 830
4161 5208 6280
275 7063 8634
4 2725 3113
2279 7403 8174
1637 3328 3930
2810 4939 5624
3 1234 7687
2799 7740 8616
22 7701 8636
4302 7857 7993
7477 7794 8592
9 6111 8591
5 8606 8628
347 3497 4033
1747 2613 8636
1827 5600 7042
580 1822 6842
232 7134 7783
4629 5000 7231
951 2806 4947
571 3474 8577
2437 2496 7945
23 5873 8162
12 1168 7686
8315 8540 8596
1766 2506 4733
929 1516 3338
21 1216 6555
782 1452 8617
8 6083 6087
667 3240 4583
4030 4661 5790
559 7122 8553
3202 4388 4909
2533 3673 8594
1991 3954 6206
6835 7900 7980
189 5722 8573
2680 4928 4998
243 2579 7735
4281 8132 8566
7656 7671 8609
1116 2291 4166
21 388 8021
6 1123 8369
311 4918 8511
0 3248 6290
13 6762 7172
4209 5632 7563
49 127 8074
581 1735 4075
0 2235 5470
2178 5820 6179
16 3575 6054
1095 4564 6458
9 1581 5953
2537 6469 8552
14 3874 4844
0 3269 3551
2114 7372 7926
1875 2388 4057
3232 4042 6663
9 401 583
13 4100 6584
2299 4190 4410
21 3670 4979;
group-wise interleaving, by interleaving circuitry, the LDPC code word in units of bit groups of 360 bits to generate a group-wise interleaved LDPC code word;
wherein, in the group-wise interleaving, when an (i+1)-th bit group from a head of the generated LDPC code word is indicated by a bit group i, a sequence of bit groups 0 to 179 of the generated LDPC code word of 64800 bits is interleaved into a following sequence of bit groups
0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, 72, 74, 76, 78, 80, 82, 84, 86, 88, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, 124, 126, 128, 130, 132, 134, 136, 138, 140, 142, 144, 146, 148, 150, 152, 154, 156, 158, 160, 162, 164, 166, 168, 170, 172, 174, 176, 178, 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123, 125, 127, 129, 131, 133, 135, 137, 139, 141, 143, 145, 147, 149, 151, 153, 155, 157, 159, 161, 163, 165, 167, 169, 171, 173, 175, 177, 179;
mapping the group-wise interleaved LDPC code word to any one of four signal points in a modulation scheme in units of 2 bits; and
transmitting, by a terrestrial broadcast transmitter, the digital television broadcast signal including the mapped group-wise interleaved LDPC code word in units of 2 bits.

US Pat. No. 10,193,570

METHOD OF AND APPARATUS FOR GENERATING SPATIALLY-COUPLED LOW-DENSITY PARITY-CHECK CODE

Samsung Electronics Co., ...

29. A mobile system that supports hybrid automatic repeat request (HARD) transmission configured to generate an algebraic, Spatially-Coupled Low-Density Parity Check (SC LDPC) code and transmitting a signal generated therefrom, comprising:an LDPC block code selector;
a parity-check matrix generator connected to an output of the LDPC block code selector and configured to generate a non-diagonal parity-check matrix;
an array generator connected to an output of the parity check matrix generator;
a mask matrix generator connected to an output of the array generator configured to select a step size c of a matrix of L matrices to be spatially coupled and one or more of a length a and a width b of the matrix of the L matrices, wherein a masking matrix W has a different rate than an LDPC block code, and wherein a, b, c, and L are integers;
a masker and SC LDPC code generator connected to an output of the mask matrix generator; and
a signal generator/transmitter connected to the masker and SC LDPC code generator and configured to generate a signal based on an SC LDPC code generated by the SC LDCP code generator and transmit the signal.

US Pat. No. 10,193,569

DECODING METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT

PHISON ELECTRONICS CORP.,...

1. A decoding method, for a flash memory device, the decoding method comprising:executing at least one first iteration decoding procedure of a low density parity code (LDPC) on a first codeword according to a first clock signal by a correcting circuit;
generating, by a memory control circuit unit, a control parameter for adjusting a first frequency of the first clock signal to a second frequency of a second clock signal according to a first iteration count of the at least one first iteration decoding procedure in order to reduce a power consumption for decoding and maintain a decoding efficiency;
outputting, by the memory control circuit unit, the second clock signal to the correcting circuit according to the control parameter;
executing at least one second iteration decoding procedure of the LDPC on a second codeword according to the second clock signal by the correcting circuit;
outputting, by the memory control circuit unit, another clock signal to an adding circuit for outputting a valid codeword to a host system, wherein the another clock signal inputted to the adding circuit has a preset frequency which is different from the first frequency of the first clock signal or the second frequency of the second clock signal inputted to the correcting circuit for executing the at least one first iteration decoding procedure of the LDPC or the at least one second iteration decoding procedure of the LDPC;
correcting the second codeword, by the adding circuit, according to the another clock signal and error index information output by the correcting circuit,
wherein the error index information includes an error bit index, the error bit index is used to correct one or more data bits in the second codeword to generate the valid codeword; and
outputting, by the adding circuit, the valid codeword to the host system.

US Pat. No. 10,193,568

OPTICAL COHERENT RECEIVER WITH FORWARD ERROR CORRECTION

Alcatel Lucent, Boulogne...

1. An optical coherent receiver comprising a number of decoding blocks, each decoding block being configured to implement an iteration of a forward error correction iterative message-passing decoding algorithm, said number of decoding blocks being distributed into at least two parallel chains of cascaded decoding blocks, wherein said optical coherent receiver also comprises at least one intermediate circuit interposed between said two parallel chains, wherein said optical coherent receiver is switchable between:a first operating mode, in which said intermediate circuit is inactive and each one of said two parallel chains separately implements said forward error correction message-passing decoding algorithm on a respective client channel; and
a second operating mode, in which said intermediate circuit is active and said two parallel chains jointly implement said forward error correction message-passing decoding algorithm on a same client channel by cooperating through said intermediate circuit.

US Pat. No. 10,193,567

METHODS AND NETWORK DEVICE FOR UNCODED BIT PROTECTION IN 10GBASE-T ETHERNET

Marvell International Ltd...

1. A method, comprising:receiving, at a network interface device, a plurality of bits for transmission in a communication frame via a communication link;
encoding, at the network interface device, the plurality of bits into a plurality of bit blocks, wherein the plurality of bit blocks comprises a first set of bit blocks and a second set of bit blocks;
transcoding, at the network interface device, the first set of bit blocks to generate a third set of bit blocks;
aggregating, at the network interface device, the second set of bit blocks and the third set of bit blocks into an aggregated set of bit blocks;
encoding, with a first error correction encoder of the network interface device, a first portion of the bits in the aggregated set of bit blocks to generate a first set of encoded bits including a set of first parity bits for protecting bits in the first set of encoded bits, the set of first parity bits generated according to a first error correction code;
encoding, with a second error correction encoder of the network interface device, a second portion of the bits in the aggregated set of bit blocks to generate a second set of encoded bits including a set of second parity bits for protecting bits in the second set of encoded bits, the second set of parity bits generated according to a second error correction code, wherein a number of bits in the second set of encoded bits is greater than a number of bits in the second portion of the bits in the aggregated set of bit blocks, and wherein the set of second parity bits includes a smaller number of parity bits as compared to a greater number of parity bits included in the set of first parity bits;
selecting, at the network interface, constellation points for modulating the first set of encoded bits and the second set of encoded bits, including
selecting, based on bits in the second set of encoded bits, clusters from among a plurality of clusters of adjacent constellation points, and
selecting, based on bits in the first set of encoded bits, constellation points within the clusters of adjacent constellation points such that, when transmitted via the communication link, bits in the second set of encoded bits that includes the smaller number of parity bits are less prone to errors than bits in the first set of encoded bits that includes the greater number of parity bits; and
generating, at the network interface, the communication frame for transmission via the communication link, including modulating, at the network interface device, the first set of encoded bits and the second set of encoded bits according to the selected constellation points.

US Pat. No. 10,193,566

ENCODING/DECODING SYSTEM FOR PARALLEL DATA

NIPPON TELEGRAPH AND TELE...

1. A parallel data encoding/decoding system which performs parallel data transmission from an encoder to a decoder using a plurality of lanes, the number of the plurality of lanes being R, R being an integer that is larger than or equal to 2,wherein the encoder generates a code vector M having R elements, each element of the code vector M is a symbol to be transmitted in parallel using the plurality of lanes, the code vector M being denoted M={m0, m1, m2, . . . mR?1|mi?GF(2n)}, m0, m1, m2, . . . mR?1 being the elements of the code vector M, GF(2n) being an n-order extension field of a Galois field, the number of the elements being equal to the number of the plurality of lanes, and the state vector U having R elements, each element in the state vector U is a code indicating to the decoder whether each of the corresponding elements of the code vector M is valid or invalid, the state vector U being denoted as U=(u0, u1, u2, . . . uR?1|ui?{0, 1}), u0, u1, u2, . . . uR?1 being the elements of the state vector U,
calculates products {m0u0, m1u1, m2u2, . . . , mR?1uR?1|mi?M, ui?U} of the elements of the code vector M and the elements of the state vector U,
generates a transmission vector Y by encoding the calculated products using a maximum distance separable (2R, R) block code with which erasure of R symbols is capable of being corrected,
transmits the transmission vector Y through the plurality of lanes, and
transmits the state vector U through the plurality of lanes or a path separate from the plurality of lanes,
the encoder comprises an MDS encoding computer that performs the encoding of the calculated products using the maximum distance separable (MDS) block code, and
the decoder decodes a subset Msub of the code vector M, the subset Msub being constituted of a valid element of the code vector M, using a received reception vector Y?, the received state vector U, and an erasure vector E indicating whether each element of the transmission vector Y has been erased in a transmission/reception section.

US Pat. No. 10,193,565

COMPRESSIVE ENCODING APPARATUS, COMPRESSIVE ENCODING METHOD, DECODING APPARATUS, DECODING METHOD, AND PROGRAM

Sony Corporation, Tokyo ...

1. A compressive encoding apparatus comprising:an encoding unit that converts M bits of a ??-modulated digital signal into N bits (M>N) with reference to a first conversion table, and when the M bits are not able to be converted into the N bits with the first conversion table, converts the M bits into the N bits with reference to a second conversion table,
wherein, when the number of bit patterns of the N bits is P,
the first conversion table is a table storing (P?1) number of codes having higher generation frequencies for past bit patterns, and
the second conversion table is a table storing (P?1) number of codes having higher generation frequencies for past bit patterns, which follow those of the first conversion table; and
a data transmission unit that transmits converted data converted by the encoding unit,
wherein the data transmission unit transmits data of the first conversion table and the second conversion table along with the converted data.

US Pat. No. 10,193,564

ANALOG-TO-DIGITAL CONVERTER

TEXAS INSTRUMENTS INCORPO...

1. A system, comprising:a multiplex circuit having: a plurality of inputs to receive a respective plurality of analog signals, including a first input to receive a first analog signal; and an output to provide an output signal, multiplexed from among the received analog signals; and
an analog-to-digital converter (ADC) to convert the output signal, relative to a reference voltage, into a corresponding digital value, wherein: if the output signal is the first analog signal, then the reference voltage is a fixed voltage; and if the output signal is other than the first analog signal, then the reference voltage is a variable voltage of the first analog signal.

US Pat. No. 10,193,563

SEMICONDUCTOR DEVICE, WIRELESS SENSOR, AND ELECTRONIC DEVICE

Semiconductor Energy Labo...

1. A semiconductor device comprising:a sample-and-hold circuit including a transistor including an oxide semiconductor containing indium and oxide in a channel formation region and a capacitor;
a comparator electrically connected to one of a source and a drain of the transistor and the capacitor;
a successive approximation register electrically connected to the comparator;
a digital-analog converter circuit electrically connected to the successive approximation register and the comparator; and
a timing controller electrically connected to a gate of the transistor, the successive approximation register, and the digital-analog converter circuit,
wherein the other of the source and the drain of the transistor is electrically connected to an input terminal of the sample-and-hold circuit.

US Pat. No. 10,193,562

DIGITAL PHASE LOCKED LOOP CIRCUIT ADJUSTING DIGITAL GAIN TO MAINTAIN LOOP BANDWIDTH UNIFORMLY

Samsung Electronics Co., ...

1. A digital phase locked loop circuit comprising:a phase frequency detector configured to,
generate a first detection value associated with order between a first phase of a reference signal and a second phase of a fed-back signal, and
generate a second detection value based on the first detection value in response to the reference signal;
a bandwidth calibrator configured to,
amplify a signal level of the second detection value by a gain value, to generate an amplified detection value, and
adjust the gain value based on the first detection value;
a digital loop filter configured to generate a digital code based on the amplified detection value; and
a digital controlled oscillator configured to generate an output signal which has a frequency corresponding to the digital code, wherein
the fed-back signal is generated based on the output signal and is fed back to the phase frequency detector.

US Pat. No. 10,193,561

PHASE LOCKED LOOPS

Cirrus Logic, Inc., Aust...

1. A phase-locked-loop apparatus comprising:a phase-and-frequency detector configured to:
receive a reference clock signal and a feedback signal; and
output first adjustment signal that is modulated between respective first and second signal levels to provide control pulses indicating that an increase in frequency required for phase and frequency lock, and
output a second adjustment signal that is modulated between respective first and second signal levels to provide control pulses indicating that a decrease in frequency required for phase and frequency lock; and
first and second time-to-digital converters configured to respectively receive the first and second adjustment signals respectively and output respective first and second digital signals indicative of the duration of said control pulses;
wherein each time-to-digital converter comprises:
a controlled-oscillator configured so as to operate at a first frequency when the respective adjustment signal is at the first signal level and operate at a second frequency when the respective adjustment signal is at the second signal level; and
a counter configured to produce a count value of the number oscillations of the controlled-oscillator in each of a succession of count periods defined by a count clock signal; and
wherein said first and second digital signals are based on the count values output from the respective counters.

US Pat. No. 10,193,560

METHOD AND CIRCUITS FOR CHARGE PUMP DEVICES OF PHASE-LOCKED LOOPS

Analog Bits Inc., Sunnyv...

1. A charge pump configured to receive a first p-bias input, a second p-bias input, a first n-bias input, a second n-bias input; and generate a voltage output on an output line, the charge pump comprising:a source configured to generate a current supply;
a p-channel source current network coupled to the source, the p-channel source current network comprising:
a first p-channel transistor comprising a source terminal coupled to the source to receive the current supply, a gate configured to receive the first p-bias input, and a drain terminal;
a second p-channel transistor comprising a source terminal coupled to the drain terminal of the first p-channel transistor, a gate configured to receive the second p-bias input, and a drain terminal;
a p-channel current switch comprising at least one source terminal coupled to the drain terminal of the first p-channel transistor, at least one gate coupled to a phase comparator, and at least one drain terminal; and
a third p-channel transistor comprising a source terminal coupled to a drain terminal of the p-channel current switch, a gate configured to receive the second p-bias input, and a drain terminal coupled to the output line; and
a n-channel sink current network comprising:
a first n-channel transistor comprising a drain terminal, a gate configured to receive the first n-bias input, and a source terminal coupled to a ground;
a second n-channel transistor comprising a drain terminal coupled to the drain terminal of the second p-channel transistor, a gate configured to receive the second n-bias input, and a source terminal coupled to the drain terminal of the first n-channel transistor;
a third n-channel transistor comprising a drain terminal coupled to the drain terminal of the third p-channel transistor as well as the output of the charge pump, a gate configured to receive the second n-bias input, and a source terminal; and
a n-channel current switch comprising at least one drain terminal coupled to the source terminal of the third n-channel transistor, at least one gate coupled to the phase comparator, and at least one source terminal coupled to the drain terminal of the first n-channel transistor; and
wherein the p-channel source current network and the n-channel sink current network are configured to:
 draw a baseline current from drain terminal of the first p-channel transistor such that the baseline current flows through the second p-channel transistor to the second n-channel transistor and then the first n-channel transistor, and
 when the p-channel current switch is on, draw a first increment of current from the drain terminal of the first p-channel transistor such that the first increment of current flows (i) through the p-channel current switch and the third p-channel transistor to the output line, and (ii) in parallel with respect to the baseline current that flows from the first p-channel transistor through the second p-channel transistor to the second n-channel transistor and then the first n-channel transistor, wherein the first increment of current is smaller than the baseline current, and
 when the n-channel current switch is on, draw a second increment of current from the output line such that the second increment of current flows (i) through the third n-channel transistor and the n-channel current switch to the first n-channel transistor, and (ii) in parallel with respect to the baseline current that flows from the drain terminal of the first p-channel transistor through the second p-channel transistor to the second n-channel transistor and then the first n-channel transistor, wherein the second increment of current is smaller than the baseline current.

US Pat. No. 10,193,559

CIRCUIT DEVICE, PHYSICAL QUANTITY MEASUREMENT DEVICE, ELECTRONIC APPARATUS, AND VEHICLE

Seiko Epson Corporation, ...

1. A circuit device comprising:a delay locked loop (DLL) circuit, which has a plurality of delay elements, and to which a first clock signal generated using a first resonator and having a first clock frequency is input; and
an adjustment circuit, to which delayed clock signals from the delay elements of the DLL circuit, and a second clock signal generated using a second resonator and having a second clock frequency lower than the first clock frequency are input, and which adjusts delay amounts of the delay elements of the DLL circuit using a frequency difference between the first clock frequency and the second clock frequency.

US Pat. No. 10,193,558

CLOCK SIGNAL AND SUPPLY VOLTAGE VARIATION TRACKING

Micron Technology, Inc., ...

1. An apparatus comprising:a first tracking enablement circuit configured to enable a delay-locked loop tracking circuit based on a variation in a voltage output of a voltage source, a variation in a frequency of an input clock signal, or combinations thereof; and
a second tracking enablement circuit configured to enable a duty cycle correction circuit based on a variation in a duty cycle of the input clock signal.

US Pat. No. 10,193,557

OSCILLATION CONTROL APPARATUS AND OSCILLATION APPARATUS

Asahi Kasei Microdevices ...

1. An oscillation control apparatus comprising:a first control section that generates a first control signal that controls an oscillation frequency of an oscillator, based on a temperature detection result of a temperature detecting section;
an encoder that generates a feedback signal;
a second control section that generates a second control signal that controls the oscillation frequency of the oscillator, based on the temperature detection result of the temperature detecting section, an external input signal input from outside, and the feedback signal;
an oscillation circuit that sets the oscillation frequency of the oscillator, based on the first control signal and the second control signal; and
a reference voltage generating section that generates a reference voltage, wherein
the encoder generates the feedback signal by comparing the second control signal and the reference voltage.

US Pat. No. 10,193,556

METHOD AND APPARATUS FOR CONFIGURABLE CONTROL OF AN ELECTRONIC DEVICE

SKYWORKS SOLUTIONS, INC.,...

1. A configurable controller for establishing operational states of a device having a plurality of functional operating units, the configurable controller comprising:an input configured to receive an identifier of a desired operational state of the device;
a plurality of control outputs, each of the control outputs configured to couple to one or more of the plurality of functional operating units each having two or more operational states; and
a plurality of reference inputs each configured to receive a reference signal, at least one reference signal being mapped, based on the identifier, to at least one control output to provide a control signal that places each functional operating unit in a selected state of its two or more operational states to achieve the desired operational state of the device.

US Pat. No. 10,193,555

METHODS AND DEVICES FOR A MEMORY INTERFACE RECEIVER

Cadence Design Systems, I...

1. A receiver apparatus for receiving data from a memory device, the apparatus comprising:a first resistor wherein a first terminal of the first resistor is connected to a first receiver input of the memory receiver apparatus;
a first N-type metal oxide semiconductor (NMOS) field effect transistor (FET) wherein a drain terminal of the first NMOS FET is connected to a second terminal of the first resistor and a gate terminal of the first NMOS FET is connected to the drain terminal of the first NMOS FET;
a second NMOS FET wherein a gate terminal of the second NMOS FET is connected to the gate terminal of the first NMOS FET;
a trans-impedance amplifier wherein an input terminal of the trans-impedance amplifier is connected to a drain terminal of the second NMOS FET; and
a complementary metal oxide semiconductor (CMOS) inverter wherein an input terminal of the CMOS inverter is connected to an output terminal of the trans-impedance amplifier;
wherein the first NMOS FET and the second NMOS FET are low voltage devices; and
wherein the first resistor is configured to shield the first NMOS FET and the second NMOS FET from input/output (I/O) voltage levels.

US Pat. No. 10,193,554

CAPACITIVELY COUPLED LEVEL SHIFTER

Navitas Semiconductor, In...

1. A half bridge GaN circuit, comprising:a low side power switch configured to be selectively conductive according to one or more input signals;
a high side power switch configured to be selectively conductive according to the one or more input signals;
a high side power switch controller, configured to control the conductivity of the high sigh power switch based on the one or more input signals;
an inverting or noninverting logic gate having an input threshold based on the voltage of a power node, where the voltage of the power node has a voltage which changes according to the input signals, wherein a power terminal of the logic gate is connected to the power node; and
a voltage generator configured to generate a power voltage at a VMID node, wherein the power voltage is based on the voltage of the power node, wherein a ground terminal of the logic gate is connected to the VMID node, and wherein the input threshold voltage of the logic gate is between the voltage of the power node and the power voltage at the VMID node.

US Pat. No. 10,193,553

PROCESSING CIRCUIT CAPABLE OF DYNAMICALLY MODIFYING ITS PRECISION

1. A circuit comprising:a processing circuit comprising a plurality of circuit domains, each circuit domain comprising a plurality of transistors and being configured to apply one or more corresponding transistor biasing voltages to said transistors; and
a control circuit configured to determine, based on at least a selected accuracy setting of the processing circuit, the level of said one or more transistor biasing voltages to be applied in each of said circuit domains, the control circuit being further configured to cause said transistor biasing voltages to be applied to the circuit domains.

US Pat. No. 10,193,552

TERMINATION RESISTOR CALIBRATION CIRCUIT AND CONTROL METHOD THEREOF

LONTIUM SEMICONDUCTOR COR...

1. A termination resistor calibration circuit, wherein the termination resistor calibration circuit is connected to a current mode logic (CML) transmitter comprising a first termination resistor and a second termination resistor, and comprises:an off-chip resistor;
a first on-chip resistor;
a bandgap module configured to generate a reference voltage;
a current generation module configured to generate an absolute current based on the reference voltage and a resistance of the off-chip resistor, and generate a relative current based on the reference voltage and a resistance of the first on-chip resistor, wherein the absolute current is inputted to a constant current source of the CML transmitter as a reference current;
a second on-chip resistor, wherein the relative current flows through the second on-chip resistor;
a comparator, wherein one input terminal of the comparator is connected to a non-common terminal of the second on-chip resistor, the other input terminal of the comparator is connected to a non-common terminal of the first termination resistor of the CML transmitter, and an output terminal of the comparator is connected to a calibration control module;
an output signal control module configured to: during resistance calibration, control a first electronic switch that is connected to the first termination resistor of the CML transmitter to be turned on, and control a second electronic switch that is connected to the second termination resistor of the CML transmitter to be turned off; and
the calibration control module configured to calibrate resistances of the first termination resistor and the second termination resistor of the CML transmitter.

US Pat. No. 10,193,551

MOUNTING ARRANGEMENT FOR PIEZOELECTRIC SENSOR DEVICE

AITO BV, Amsterdam (NL)

1. A piezoelectric touch switch mounting apparatus (1), comprising:an overlay (2) having a top surface and a bottom surface, said overlay configured for being disposed over a piezoelectric touch switch and further configured to bend in response to a pressure exerted on the top surface of the overlay (2);
at least one piezoelectric touch switch (18, 27, 90), each piezoelectric touch switch (18, 27, 90) comprising at least one piezoelectric sensor (13) and disposed below the bottom surface of the overlay (2), the at least one piezoelectric sensor configured so that the piezoelectric sensor (13) bends in response to a pressure exerted on the overlay (2) causing the overlay (2) to bend;
a piezoelectric touch switch (18, 27, 90) mount comprising;
a mounting bracket (4) defining at least one opening (10), the mounting bracket (4) attached proximate a first end to the bottom surface of the overlay (2) with an adhesive attachment element (3) wherein the adhesive attachment element (3) adheres to the bottom surface of the overlay (2) in such a manner that an opposite upper surface of the overlay (2) remains intact and not penetrated by the adhesive attachment element, the at least one piezoelectric touch switch (13) located in the area of the at least one opening (10);
at least one backer piece (5), disposed proximate a second end of the mounting bracket (4), said second end opposite said first end of the mounting bracket (4);
at least one squeezer (7) disposed in the at least one opening (10) between the at least one backer piece (5) and a bottom surface of the at least one piezoelectric touch switch (13); and
one or more continuously adjustable compression adjusters (6) coupled to said mounting bracket (4) and configured to operate on the backer piece (5) to compress the piezoelectric touch switch (18, 27, 90) and the at least one squeezer (7) between the overlay (2) and the backer piece (5) without penetrating the top surface of the overlay (2).

US Pat. No. 10,193,550

INVISIBLE, CONTACTLESS SWITCH DEVICE

Roberto Airoldi, St Laur...

1. A switching device adapted to be installed behind an opaque wall so as not to be visible from the outside of said wall and intended to switch at least one electrical device on and comprising at least a first module connected by a wireless link or a wired link to a second module adapted to make the connection between said electrical device and a power source, said first module comprising a capacitive sensor adapted to change its capacitance value when the hand or any other part of the body of a user on the outside is placed near the wall where said switching device is installed,said switching device being characterized in that the capacitive sensor, which is located on a printed circuit board comprises a capacitor Cx having a first metal electrode consisting of a solid circle and a second metal electrode surrounding said first electrode and being concentric with it, both electrodes being included in a metal frame, whose function is to define the capacitive field resulting from the capacitor formed by the two electrodes in the plane of the board and to maximize this field perpendicular to the plane of the board,
wherein said capacitive sensor contains a circuit for calculating the number of times Nr a reference voltage Vr must be applied to said capacitor Cx so that it can charge a reference capacitor Cr to a predetermined value, and
wherein said first module comprises a first microcontroller adapted to transmit instructions to a second microcontroller in said second module intended to control the connection of said electrical device to its electrical power source when said reference number Nr has been reduced due to a parasitic capacitor Cc caused by the approach of the hand of the user is added in parallel to said reference capacitor Cr.

US Pat. No. 10,193,549

SENSING APPARATUS

Samsung Electronics Co., ...

1. A modular sensing apparatus comprising:a flexible substrate configurable into different shapes that conform to differently-shaped three-dimensional structures, wherein the flexible substrate is arranged to fold to cover a plurality of surfaces that form a corner of a device; and
a plurality of sensors positioned on the flexible substrate with the plurality of sensors arranged on the flexible substrate to detect touchless motion-based commands in a region that overlies said sensors when the flexible substrate is positioned on at least two of said differently-shaped three-dimensional structures.

US Pat. No. 10,193,548

BIASING SCHEME FOR HIGH VOLTAGE CIRCUITS USING LOW VOLTAGE DEVICES

Intel Corporation, Santa...

1. An apparatus comprising:an integrated circuit including a first node to receive a supply voltage and a second node to receive ground potential; and
a transmitter located in the integrated circuit, the transmitter including a buffer to transmit a signal, the buffer including:
an output stage including a first pair of transistors coupled between the first node and an output node, and a second pair of transistors coupled between the output node and the second node;
the first pair of transistors including a first transistor and a second transistor, the first transistor including a first non-gate terminal directly coupled to a first non-gate terminal of the second transistor, the second transistor including a second non-gate terminal coupled to the output node;
the second pair of transistors including a first transistor and a second transistor, the first transistor of the second pair of transistors including first non-gate terminal directly coupled to a first non-gate terminal of the second transistor of the second pair of transistors, and the second transistor of the second pair of transistors including a second non-gate terminal directly coupled to the second non-gate terminal of the second transistor of the first pair of transistors; and
a bias stage to provide a first bias voltage to a gate of the second transistor in the second pair of transistors and a second bias voltage to a gate of the second transistor in the first pair of transistors, wherein a value of each of the first and second bias voltages is greater than zero, and the value of the second bias voltage is a value of the supply voltage minus the value of the first bias voltage.

US Pat. No. 10,193,547

DRIVER SYSTEM WITH AN OPTICAL POWER BASED ISOLATED POWER SUPPLY

OHIO STATE INNOVATION FOU...

1. A driver system comprising:a plurality of optical receivers, wherein a first optical receiver of the plurality of optical receivers is configured to receive an optical power signal generated by a first optical transmitter of a plurality of optical transmitters over a first transmission medium, and wherein a second optical receiver of the plurality of optical receivers is configured to receive and an optical data signal generated by a second optical transmitter of the plurality of optical transmitters over a second transmission medium;
wherein the first optical receiver is coupled to the first optical transmitter via a first optical fiber corresponding to the first transmission medium, and the second optical receiver is coupled to the second optical transmitter via a second optical fiber corresponding to the second transmission medium;
wherein the first optical receiver is configured to convert the optical power signal to an electrical power signal comprising a given drive strength; and
a driving circuit configured to apply the electrical power signal to an input of a transistor device to drive the transistor device at the given drive strength according to a control signal, wherein the control signal defines an on-time and an off-time for the driving circuit over a given time interval.

US Pat. No. 10,193,546

PUMP SWITCHING DEVICE

S.J. Electro Systems, Inc...

1. A pump switching device comprising:a relay to selectively couple current to a pump motor;
a switch coupled in parallel with the relay;
a magnet to generate a magnetic field;
a Hall effect sensor configured to generate a signal upon the detection of the magnetic field;
a float configured and arranged to float on a fluid, the float operationally coupled to the magnet;
a latch configured to selectively hold the magnet in detection range of the Hall effect sensor until a fluid level is a select distance from the Hall effect sensor, in which the latch is a metallic member attracted to the magnetic field of the magnet; and
a controller in communication with the sensor, the controller further coupled to control the relay and the switch, the controller configured to activate the switch a select amount of time before the controller activates the relay upon initial detection of the signal from the sensor, the controller further configured to deactivate the switch a select amount of time after the relay is activated while the signal is being detected.

US Pat. No. 10,193,545

POWER-ON RESET SYSTEM FOR SECONDARY SUPPLY DOMAIN

SILICON LABORATORIES INC....

1. A power-on reset (POR) circuit for a secondary supply domain of an integrated circuit comprising a primary supply domain receiving a primary supply voltage and the secondary supply domain receiving a secondary supply voltage, said POR circuit comprising:a bias and reference circuit that develops a startup current in response to ramping up of the secondary supply voltage, and that mirrors a bias current into a plurality of transistors coupled into a voltage loop which establishes a reference voltage;
a comparator receiving said bias current, having a first input receiving said reference voltage and having a second input receiving the primary supply voltage, wherein said comparator controls a level of said bias current to a high current level when said reference voltage is greater than the primary supply voltage by more than a predetermined voltage offset and to a low current level when the primary supply voltage is at least said reference voltage less said predetermined voltage offset;
a level shift and isolation circuit that is pre-biased upon startup to isolate a primary POR signal from the secondary supply domain while said bias current is above said low current level, and after said bias current achieves said low current level, that transitions to provide said primary POR signal as a level shifted primary POR signal when said primary POR signal indicates that said primary supply domain is out of reset;
a delay circuit supplied by the secondary supply voltage, wherein said delay circuit provides a delayed secondary POR signal a predetermined time period after the secondary supply voltage achieves a predetermined voltage threshold; and
a control gate that determines a reset state of the secondary power domain based on said level shifted primary POR signal and said delayed secondary POR signal.

US Pat. No. 10,193,544

MINIMIZING RINGING IN WIDE BAND GAP SEMICONDUCTOR DEVICES

Ford Global Technologies,...

1. A power conversion circuit, comprising:first and second semiconductor switches; and
a drive circuit configured to create a period of operational overlap for the first and second switches by setting a gate voltage of the first switch to an intermediate value above a threshold voltage of the first switch, during turn-on and turn-off operations of the second switch, wherein, during the period, a gate voltage of the second switch is steady or substantially steady.

US Pat. No. 10,193,543

ELECTRONIC DEVICE AND METHOD OF CONTROLLING SWITCHING ELEMENTS

CANON KABUSHIKI KAISHA, ...

1. An electronic device comprising:a first switching element connected between a power source and one end of a power inductor;
a second switching element connected between the one end of the power inductor and ground;
a detection unit that detects a current flowing to the second switching element and generates a current detection signal from the detected current; and
a control unit that gradually decreases an on-resistance of the first switching element when the first switching element is changed from an off-state to an on-state,
wherein the control unit controls a fall time of a gate voltage of the first switching element when the control unit gradually decreases the on-resistance of the first switching element,
wherein the control unit determines a driving mode corresponding to the fall time of the gate voltage of the first switching element, based on the current detection signal generated by the detection unit,
wherein the control unit causes a selector to select a resistor corresponding to the driving mode from among resistors,
wherein the control unit supplies a driving signal to a gate of the first switching element via the resistor selected by the selector, and
wherein the control unit includes the selector and the resistors.

US Pat. No. 10,193,542

SEMICONDUCTOR DEVICE

FUJI ELECTRIC CO., LTD., ...

1. A semiconductor device for driving a high-side switching device and a low-side switching device ON and OFF in a complementary manner, the high-side switching device and the low-side switching device being totem pole-connected with a node therebetween to be connected to a load to drive the load, the semiconductor device comprising:a high-side driver circuit and a low-side driver circuit which respectively switch the high-side switching device and the low-side switching device ON and OFF in a complementary manner;
a bootstrap capacitor connected to a power supply that supplies driving power to the low-side driver circuit via a diode such that the bootstrap capacitor is charged when the low-side switching device is ON, and a resulting charge voltage is boosted and applied to the high-side driver circuit when the low-side switching device is OFF;
a supplementary bootstrap capacitor connected in parallel to the bootstrap capacitor via a switch circuit such that the supplementary bootstrap capacitor is charged by an intermediate voltage at an intermediate node between the high-side and low-side driver circuits that is to be connected to said node between the high-side switching device and the low-side switching device when the high-side switching device is ON;
a Zener diode that is connected to said intermediate node and that regulates a charging voltage of the supplementary bootstrap capacitor; and
a control circuit that controls the switch circuit so as to apply a charge voltage of the supplementary bootstrap capacitor to the high-side driver circuit when the charge voltage of the bootstrap capacitor decreases to less than a prescribed voltage while the high-side switching device is ON.

US Pat. No. 10,193,541

TRANSFORMERLESS SWITCHING REGULATOR WITH CONTROLLABLE BOOST FACTOR

Siemens Medical Solutions...

1. A switching regulator system comprising:a controller;
a boost converter comprising an inductor and a first transistor responsive to a control signal from the controller, the first transistor connected with the inductor such that the inductor connects to ground through the first transistor;
a charge pump having an input connected with an output of the boost converter;
a diode connected between the inductor and the input of the charge pump, the diode connected to prevent current from the charge pump entering the first transistor; and
a second transistor responsive to the control signal, the second transistor connected to the input of the charge pump.

US Pat. No. 10,193,540

LOW-POWER DECISION THRESHOLD CONTROL FOR HIGH-SPEED SIGNALING

XILINX, INC., San Jose, ...

1. An apparatus for decision threshold control, comprising:an alternating current coupler (“ac-coupler”) circuit configured as a high-pass circuit path for a first frequency range;
a buffer amplifier circuit coupled in parallel with the ac-coupler circuit and configured as a low-pass circuit path for a second frequency range; and
an offset injection circuit coupled to both the ac-coupler circuit and the buffer amplifier circuit and configured to inject an offset.

US Pat. No. 10,193,539

HIGH SPEED DATA SYNCHRONIZATION

SK hynix Inc., Icheon-si...

1. A semiconductor device comprising:an internal clock generation circuit configured to generate first to fourth internal clock signals from first to fourth division clock signals; and
a data input and output (I/O) circuit configured to output input data as output data in synchronization with the first to fourth internal clock signals,
wherein the first internal clock signal is generated after the fourth internal clock signal is generated, the second internal clock signal is generated after the first internal clock signal is generated, the third internal clock signal is generated after the second internal clock signal is generated, and the fourth internal clock signal is generated after the third internal clock signal is generated.

US Pat. No. 10,193,538

SEMICONDUCTOR DEVICE

Renesas Electronics Corpo...

1. A semiconductor device comprising:a first circuit block that is connected between a first power supply voltage line and a first reference voltage line;
a second circuit block that is connected between a second power supply voltage line and a second reference voltage line and transmits and receives signals with the first circuit block;
a resistor circuit that is connected between the second power supply voltage line and the second circuit block; and
a first clamp circuit that is connected between a line connected between the resistor circuit and the second circuit block and the first reference voltage line and clamps a potential difference between the line connected between the resistor circuit and the second circuit block and the first reference voltage line.

US Pat. No. 10,193,537

RANDOM DATA GENERATION CIRCUIT, MEMORY STORAGE DEVICE AND RANDOM DATA GENERATION METHOD

PHISON ELECTRONICS CORP.,...

1. A random data generation circuit, comprising:a phase difference detection circuit, configured to sample a first clock signal and a second clock signal based on a plurality of sampling clock signals, so as to detect a phase difference between the first clock signal and the second clock signal and output phase difference information; and
a random data output circuit, coupled to the phase difference detection circuit and configured to output random data according to the phase difference information.

US Pat. No. 10,193,536

SHARED KEEPER AND FOOTER FLIP-FLOP

Intel Corporation, Santa...

1. An apparatus comprising:a master latch comprising a keeper controllable by a clock input, wherein the keeper of the master latch is coupled to a memory circuitry of the master latch; and
a slave latch coupled to an output of the master latch, wherein the slave latch comprises a footer controllable by an inverse of the clock input, and wherein the footer of the slave latch is coupled to a memory circuitry of the slave latch.

US Pat. No. 10,193,535

OSCILLATION CIRCUIT, BOOSTER CIRCUIT, AND SEMICONDUCTOR DEVICE

ABLIC INC., Chiba (JP)

1. An oscillation circuit, comprising:a ring oscillator circuit in which odd stages of inverter circuits, each of which includes a PMOS transistor and an NMOS transistor that are connected to each other in series, are cascade connected such that the inverter circuits are connected to form a ring;
a first constant current element formed of a PMOS transistor configured to cause a predetermined current to flow to the inverter circuits;
a second constant current element formed of an NMOS transistor configured to cause a predetermined current to flow to the inverter circuits; and
a power supply circuit configured to generate a first bias voltage, a second bias voltage, and a second power supply voltage from a first power supply voltage,
the second power supply voltage being a constant voltage when the first power supply voltage is at a predetermined voltage or higher,
the PMOS transistor in each of the inverter circuits including a source connected to a drain of the PMOS transistor, which is the first constant current element, and a substrate to which the first power supply voltage is input,
the NMOS transistor in each of the inverter circuits including a source connected to a drain of the NMOS transistor, which is the second constant current element, and a substrate to which a ground voltage is input,
the PMOS transistor, which is the first constant current element, including a gate to which the first bias voltage is input, and a source and a substrate to which the second power supply voltage is input,
the NMOS transistor, which is the second constant current element, including a gate to which the second bias voltage is input, and a source and a substrate to which the ground voltage is input.

US Pat. No. 10,193,533

METHODS AND SYSTEMS FOR EVENT-DRIVEN RECURSIVE CONTINUOUS-TIME DIGITAL SIGNAL PROCESSING

The Trustees of Columbia ...

1. A continuous-time digital signal processor comprising:an event-grouping block, configured to receive a first input timing signal, a second input timing signal, and to generate an intermediate timing signal;
a first time delay block, configured to receive the intermediate timing signal and generate an output timing signal;
a second time delay block, configured to receive the output timing signal and generate the second input timing signal;
a two-channel memory configured to receive a first data input and a second data input and to generate a first intermediate data signal and a second intermediate data signal;
an arithmetic operation block, configured to receive the first intermediate data signal, the second intermediate data signal and to generate an output data signal, the arithmetic operation block comprising:
a scalar block configured to receive the second intermediate data signal and generate a scaled version of the second intermediate data signal; and
an adder configured to receive the first intermediate data signal and the scaled version of the second intermediate data signal, and generate the output data signal; and
a first-in-first-out (FIFO) memory configured to receive the output data signal and to generate the second input data signal.

US Pat. No. 10,193,532

METHOD OF OPERATING A FINITE IMPULSE RESPONSE FILTER

AGENCY FOR SCIENCE, TECHN...

1. A method of operating a finite impulse response filter comprising an input; an output; and a plurality of storage elements each coupled to the input via a sample switch and to the output via a transfer switch, the method comprising:during charging of the plurality of storage elements, applying a sample clock signal to each of the sample switches that achieves an operation mode where up to every one of the sample switches is simultaneously closed to connect all of the plurality of storage elements to the input; and
during averaging of the plurality of storage elements, applying a transfer clock signal to each of the transfer switches to close one or more of the transfer switches to connect the storage elements, having charge stored therein, to the output, wherein all the transfer switches are simultaneously closed during the averaging of the plurality of storage elements.

US Pat. No. 10,193,530

MULTIPLEXER, TRANSMISSION DEVICE, RECEPTION DEVICE, HIGH-FREQUENCY FRONT END CIRCUIT, COMMUNICATION DEVICE AND IMPEDANCE MATCHING METHOD FOR MULTIPLEXER

MURATA MANUFACTURING CO.,...

1. A multiplexer that transmits and receives a plurality of high-frequency signals via an antenna element, the multiplexer comprising:a plurality of elastic wave filters that have different pass bands from each other;
a common terminal connected to the antenna element; and
an inductance element; wherein
each of the plurality of elastic wave filters includes at least one of a series resonator that is connected between an input terminal and an output terminal of the respective elastic wave filter and a parallel resonator that is connected between a connection path, which connects the input terminal and the output terminal, and a reference terminal;
an antenna-element-side terminal among the input terminal and the output terminal of one elastic wave filter among the plurality of elastic wave filters is connected to the common terminal via the inductance element, which is connected to the antenna-element-side terminal and the common terminal, and is connected to the parallel resonator;
antenna-element-side terminals among the input terminals and the output terminals of the plurality of elastic wave filters other than the one elastic wave filter are connected to the common terminal, and are each connected to the series resonator; and
a complex impedance in a prescribed pass band when the one elastic wave filter is viewed in a standalone state via the inductance element in a state in which the inductance element and a terminal among the input terminal and the output terminal of the one elastic wave filter that is closer to the antenna element are connected in series with each other, and a complex impedance in the prescribed pass band when the plurality of elastic wave filters other than the one elastic wave filter are viewed from terminals thereof that are connected to the common terminal in a state in which terminals among the input terminals and the output terminals of the elastic wave filters other than the one elastic wave filter that are closer to the antenna element are connected to the common terminal are in a complex conjugate relationship with each other.

US Pat. No. 10,193,529

ELASTIC WAVE DEVICE

Murata Manufacturing Co.,...

1. An elastic wave device comprising:a first signal terminal;
a second signal terminal;
a first interdigital transducer (IDT) electrode and a second IDT electrode that are adjacent to or in a vicinity of each other in or substantially in a direction of propagation of elastic waves; and
at least one bridging capacitance; wherein
each of the first IDT electrode and the second IDT electrode includes a pair of comb-shaped electrodes, each of the comb-shaped electrodes including a busbar electrode extending in or substantially in the direction of propagation of elastic waves and a plurality of electrode fingers connected to the busbar electrode and extending in or substantially in a direction that crosses the direction of propagation of elastic waves;
one of the pair of comb-shaped electrodes in the first IDT electrode is a first comb-shaped electrode directly electrically connected to the first signal terminal, and one of the pair of comb-shaped electrodes in the second IDT electrode is a second comb-shaped electrode electrically connected to the second signal terminal;
the bridging capacitance is arranged in a region outside a region sandwiched between the electrode fingers that are adjacent to or in a vicinity of each other in or substantially in the direction of propagation of elastic waves and includes a pair of comb-shaped electrodes opposed to each other at a predetermined interval; and
a first one of the pair of comb-shaped electrodes in the bridging capacitance is a first comb-shaped electrode directly electrically connected to the first comb-shaped electrode of the first IDT electrode, and a second one of the pair of comb-shaped electrodes is a second comb-shaped electrode electrically connected to either one of the pair of comb-shaped electrodes in the second IDT electrode.

US Pat. No. 10,193,528

ACOUSTIC WAVE DEVICE AND ACOUSTIC WAVE MODULE

KYOCERA Corporation, Kyo...

1. An acoustic wave device, comprising:a piezoelectric substrate;
an excitation electrode on the piezoelectric substrate;
an electrode pad arranged on the piezoelectric substrate and electrically connected with the excitation electrode; and
a cover arranged on the piezoelectric substrate so that a oscillation space is arranged between the cover and the excitation electrode, wherein
the cover, in an internal portion, comprises a via conductor electrically connected to the electrode pad and its surface facing the piezoelectric substrate is curved so as to approach the excitation electrode side,
the cover is an organic substrate including fibers extending in the surface direction, and
a portion of the fibers is buried in the via conductor.

US Pat. No. 10,193,527

BRANCHING FILTER

TDK CORPORATION, Tokyo (...

9. A branching filter comprising:a common port;
a first signal port;
a second signal port;
a low-pass filter provided between the common port and the first signal port, and configured to selectively pass a signal of a frequency within a first passband not higher than a first cut-off frequency, the low-pass filter including:
a first LC resonant circuit; and
a first acoustic wave resonator provided in a shunt circuit connecting a path leading from the first LC resonant circuit to the first signal port to a ground, the first acoustic wave resonator having a resonant frequency higher than the first cut-off frequency; and
a high-pass filter provided between the common port and the second signal port, and configured to selectively pass a signal of a frequency within a second passband not lower than a second cut-off frequency higher than the first cut-off frequency, the high-pass filter including:
a second LC resonant circuit; and
a second acoustic wave resonator provided in a path leading from the second LC resonant circuit to the second signal port, the second acoustic wave resonator having an anti-resonant frequency lower than the second cut-off frequency.

US Pat. No. 10,193,526

BULK ACOUSTIC RESONATOR AND FILTER

Samsung Electro-Machanics...

1. A bulk acoustic resonator comprising:a substrate;
a first electrode disposed above the substrate;
a piezoelectric body disposed on the first electrode and including a plurality of piezoelectric layers each including aluminum nitride with a doping material; and
a second electrode disposed on the piezoelectric body,
wherein at least one of the piezoelectric layers is a compressive piezoelectric layer, the compressive piezoelectric layer is disposed in a portion of the piezoelectric body so as to directly contact the first electrode, and
a ratio (c/a) of a lattice constant of the compressive piezoelectric layer in a c-axis direction to a lattice constant of the compressive piezoelectric layer in an a-axis direction is higher than a ratio (c/a) of a lattice constant of another piezoelectric layer in a c-axis direction to a lattice constant of the another piezoelectric layer in an a-axis direction.

US Pat. No. 10,193,525

ACOUSTIC WAVE DEVICE AND METHOD FOR MANUFACTURING SAME

KYOCERA Corporation, Kyo...

1. An acoustic wave device, comprising:a substrate on which an excitation electrode is provided; and
a cover member which is arranged so that at least a portion covers the excitation electrode and which has a hole portion comprising a terminal thereinside, the terminal being electrically connected to the excitation electrode,
wherein, in a cross-sectional view, the terminal of the hole portion has widths at a first position and a second position, which have distances up to a surface of the substrate different from each other, are broader than a width at a third position which is positioned between the first position and the second position.

US Pat. No. 10,193,480

PROPORTIONAL INTEGRAL REGULATING LOOP FOR DIGITAL REGULATOR DEVICE FOR MOTOR VEHICLE EXCITATION ROTARY ELECTRICAL MACHINE

Valeo Equipements Electri...

1. A proportional integral regulating loop (10) for a digital regulator device (2) for a motor vehicle excitation rotary electrical machine (1) configured to function as a generator which provides an output voltage (Ub+) adjusted by an excitation current (Ie), said digital regulator device (2) comprising a control device (11) for controlling said excitation current (Ie) and said regulating loop (10), said regulating loop (10) comprising:at an input, a measuring device (35) for measurement by sampling of said output voltage (Ub+) generating a measurement signal (Um);
an error calculation system (13) generating an error signal (e) equal to a difference between said measurement signal (Um) and a set point (U0);
a processing system (14, 15, 16, 17, 18, 20) for processing of said error signal (e) generating a regulating signal (Ysat), said processing system comprising in parallel a first amplifier (14), an integrator (15) and an anti-saturation system (23); and
at an output, a generation system (38) for generation of a control signal (PWM) controlling said control device (11) according to said regulating signal (Ysat),
said anti-saturation system (23) comprising a saturation detector (24) generating a disconnection signal (Cmd) controlling a switch (25) which disconnects said integrator (15, 29) of said error calculation system (13) in the case of detection of a state of saturation (SM) of said regulating signal (Ysat).

US Pat. No. 10,193,479

DEVICE FOR CONTROLLING A REGULATOR OF A MOTOR VEHICLE ALTERNATOR, AND ALTERNATOR COMPRISING THE CORRESPONDING REGULATOR

Valeo Equipements Electri...

1. Device (1, 2) for controlling a regulator of a motor vehicle alternator, of the type comprising firstly a control circuit (1) which generates a command (KEY_ON) for activation of said regulator, by taking to a first voltage higher than a predetermined high reference voltage a single-wire two-way communication line (6) which is connected to, secondly, a circuit (2) for detection of a state (KEY_DETECT) of said activation command (KEY_ON), said detection circuit (2) comprising means (7, 9) for generation of a fault signal from a flag (LAMP_ON) which indicates a fault of said alternator, by connection of said communication line (6) to a ground by at least one semiconductor switching element (7), by this means taking said communication line (6) to a second voltage lower than a predetermined fault voltage lower than said high reference voltage, and said control circuit (1) comprising means (4) for detection of said fault signal, wherein said control circuit (1) also transmits a pulse width modulated set signal with a maximum which is higher than said high reference voltage, and a minimum which is lower than a predetermined low reference voltage higher than said fault voltage, a duty cycle of said set signal being representative of a set voltage (V0) of said regulator.

US Pat. No. 10,193,478

MOTOR DRIVING DEVICE AND DRIVING METHOD OF THE SAME

Rohm Co., Ltd., Kyoto (J...

1. A motor driving device, comprising:an electric current detecting portion for detecting electric current flowing into a motor coil; and
an auto-decay portion for performing a power supply mode to increase the electric current flowing into the motor coil before a current value detected by the electric current detecting portion reaches a reference current value, and performing a decay control to the electric current flowing into the motor coil by using a previous cycle and a present cycle after a current value detected by the electric current detecting portion reaches the reference current value,
wherein the auto-decay portion is configured to control so that a decay time of the previous cycle is different from a decay time of the present cycle,
wherein a first mode and a second mode are set by a mode selection signal, wherein the first mode selects a specified combined ratio of a slow decay mode and a fast decay mode and sets a processing time of the slow decay mode and the fast decay mode as a specified value, and the second mode has at least one of a combined ratio and a processing time of the fast decay being larger than that of the first mode.

US Pat. No. 10,193,475

SENSORLESS CONTROL OF SWITCHED RELUCTANCE MACHINES FOR LOW SPEEDS AND STANDSTILL

Caterpillar Inc., Deerfi...

1. A method for determining rotor position of a sensorless control of a switched reluctance (SR) machine having a rotor and a stator at standstill or low speed, comprising:injecting a test pulse into one or more idle phases of the SR machine;
determining a decoupled flux value based at least partially on a total flux value corresponding to the test pulse and a mutual flux value; and
determining the rotor position based at least partially on the decoupled flux value, wherein the test pulse being injected is based at least partially on a measured phase current and rotor position feedback.

US Pat. No. 10,193,473

ACTUATOR

Canon Kabushiki Kaisha, ...

1. An actuator comprising:a vibrator including a vibration plate and a piezoelectric device that generates a vibration in the vibration plate; and
a holding member that holds the vibration plate,
wherein the vibration plate includes a center portion and a fixing portion connected to the center portion, the center portion configured to have a first surface on a first side on which the piezoelectric device is fixed and a contact portion for contacting a friction member on a second side opposite to the first side so that the vibration by the piezoelectric device causes relative movement between the friction member and the vibration plate,
wherein the first surface is a polished surface, and
wherein the holding member holds the fixing portion at a location between a first plane including the first surface of the center portion and a second plane including the contact portion of the center portion.

US Pat. No. 10,193,472

SINGLE FRICTION SURFACE TRIBOELECTRIC MICROGENERATOR AND METHOD OF MANUFACTURING THE SAME

PEKING UNIVERSITY, Beiji...

1. A single friction surface microgenerator, comprising an insulating substrate having an upper surface and a lower surface, with a surface-friction-structured layer on the upper surface and a first induction electrode and a second induction electrode on the lower surface; wherein the first induction electrode is located to correspond to the surface-friction-structured layer that is used as a friction surface while the second induction electrode is located peripherially of the first induction electrode and insulatedly spaced from the first induction electrode, the second induction electrode surrounds the first induction electrode in a ring shape, and the surface-friction-structured layer has a number of micro/nano array structures or is a smooth surface.

US Pat. No. 10,193,459

HIGH STATIC GAIN BI-DIRECTIONAL DC-DC RESONANT CONVERTER

Huawei Technologies Co., ...

1. A bi-directional DC-DC converter comprising:a first terminal circuit;
a second terminal circuit;
a transformer circuit;
a first high voltage side coupled to the first terminal circuit, wherein the first high voltage side comprises a resonant tank circuit coupled between a first bridge circuit of the first high voltage side and a high voltage side of the transformer circuit, wherein the resonant tank circuit comprises:
a) a first branch comprising a first capacitor Cr1 and a first inductor Lr1 coupled in series;
b) a second branch comprising a second inductor Lr2 and a second capacitor Cr2 coupled in series; and
c) a third branch comprising a third capacitor Cr3 and a third inductor Lr3 coupled in series;
wherein the first, second and third branches are coupled to a common node, the second branch is coupled between the common node and a first terminal of the high voltage side of the transformer circuit and the third branch is coupled between the common node and a second terminal of the high voltage side of the transformer circuit; and
a second low voltage side coupled to the second terminal circuit, wherein the first high voltage side and the second low voltage side are coupled to each other via the transformer circuit.

US Pat. No. 10,193,455

RESONANT CAPACITOR STABILIZER IN RESONANT CONVERTERS

Semiconductor Components ...

1. A resonant converter for resonant capacitance stabilization during start-up, the resonant converter comprising:an oscillator configured to generate a first clock signal to drive a first driver for a first power switch, and a second clock signal to drive a second driver for a second power switch during switching operations; and
a resonant capacitor stabilizer configured to control the second driver to periodically activate the second power switch to discharge a resonant capacitor of a resonant network during initialization of the switching operations of the resonant converter,
the resonant capacitor stabilizer configured to activate the second power switch for a first duration and activate the second power switch for a second duration such that the second power switch is deactivated during a period of time between the first duration and the second duration.

US Pat. No. 10,193,453

HIGH SIDE SIGNAL INTERFACE IN A POWER CONVERTER

Power Integrations, Inc.,...

1. A controller for use in a power converter, the controller comprising:a high side signal interface circuit coupled to generate a drive signal in response to an ON signal and an OFF signal generated by a control circuit of the controller to control switching of a high side switch coupled to a half bridge node of the power converter, wherein the high side signal interface circuit comprises:
a common mode cancellation circuit coupled to receive the ON signal and the OFF signal, wherein the common mode cancellation circuit is coupled to generate a fourth current signal representative of the OFF signal referenced to a bypass voltage during an initial state, wherein the common mode cancellation circuit is coupled to generate a first current signal in response to the ON signal being pulled to a lower value relative to the OFF signal to turn ON the high side switch, and wherein the common mode cancellation circuit is coupled to generate a common mode rejection signal in response to the first current signal and the fourth current signal; and
a first current hysteresis comparator coupled to receive the first current signal, the fourth current signal, the common mode rejection signal, and a drive signal, wherein the first current hysteresis comparator is coupled to generate a first output signal in response to the first current signal, the fourth current signal, the common mode rejection signal, and the drive signal, wherein the drive signal is coupled to be generated in response to the first output signal in a presence of a common mode voltage caused by slewing at the half bridge node.

US Pat. No. 10,193,451

SYSTEMS AND METHODS FOR REGULATING POWER CONVERSION SYSTEMS WITH OUTPUT DETECTION AND SYNCHRONIZED RECTIFYING MECHANISMS

On-Bright Electronics (Sh...

22. A system for regulating a power converter, the system comprising:a first system controller configured to:
generate a first drive signal based at least in part on an input signal to turn on or off a transistor to affect a first current associated with the secondary winding of the power converter; and
a second system controller configured to:
generate a second drive signal based at least in part on a feedback signal; and
output the second drive signal to a switch to affect a second current flowing through a primary winding of the power converter;
wherein:
the first system controller is further configured to, in response to the input signal indicating that an output voltage changes from a first value larger than a first threshold to a second value smaller than the first threshold, generate one or more pulses of the first drive signal to turn on and off the transistor; and
the second system controller is further configured to:
process the feedback signal to detect the one or more pulses of the first drive signal; and
in response to the one or more pulses of the first drive signal being detected, increase a switching frequency associated with the second drive signal;
wherein the second system controller includes:
a detector configured to receive the feedback signal, detect the one or more pulses of the first drive signal based at least in part on the feedback signal, and output a detection signal based at least in part on the detected one or more pulses;
a signal generator configured to receive the detection signal and output a modulation signal based at least in part on the detection signal; and
a driver configured to receive the modulation signal and output the second drive signal to the switch.

US Pat. No. 10,193,448

METHOD OF FORMING A POWER SUPPLY CONTROL CIRCUIT AND STRUCTURE THEREFOR

SEMICONDUCTOR COMPONENTS ...

1. A circuit for a power supply control system comprising:a control circuit configured to operate a power switch at a frequency having a period to control a current through an inductor and through the power switch to provide an output voltage to a load wherein the control circuit operates the power switch at a frequency having a period;
a first switch having a first terminal, a second terminal, and a control terminal, the first terminal of the first switch configured to be coupled to a first terminal of the inductor and to a first terminal of a boost capacitor, the second terminal of the first switch configured to be coupled to a first terminal of a power source;
a second switch having a first terminal, a second terminal, and a control terminal, the first terminal of the second switch configured to be coupled to a second terminal of the boost capacitor, the second terminal of the second switch configured to be coupled to a second terminal of the power source, wherein the control circuit operates the first and second switches at the frequency and enables the first and second switches for substantially a first portion of the period; and
a third switch having a first terminal, a second terminal, and a control terminal, the first terminal of the third switch coupled to the first terminal of the second switch, the second terminal of the third switch coupled to the first terminal of the first switch, wherein the control circuit operates the third switch at the frequency and operates the third switch with a substantially opposite phase to the first switch.

US Pat. No. 10,193,447

DC TOPOLOGY CIRCUIT WORKABLE WITH VARIOUS LOADS THROUGH INCLUSION OF SUBTRACTOR

SHENZHEN CHINA STAR OPTOE...

1. A DC topology circuit, comprising a control chip, a first field effect transistor, a second field effect transistor, a third field effect transistor, a fourth field effect transistor, a first inductor, a first capacitor, and a second capacitor;the control chip comprises a control module and a subtractor; a first input terminal of the subtractor is inputted with an input voltage, a second input terminal of the subtractor is connected with a load-rated voltage and an output terminal of the subtractor is electrically connected with the control module;
a gate electrode of the first field effect transistor is inputted with a first control signal, a drain electrode of the first field effect transistor is connected with the input voltage, and a source electrode of the first field effect transistor is electrically connected to one terminal of the first inductor; a gate electrode of the second field effect transistor is inputted with a second control signal, a drain electrode of the second field effect transistor is connected the terminal of the first inductor, and a source electrode of the second field effect transistor is grounded; a gate electrode of the third field effect transistor is inputted with a third control signal, a drain electrode of the third field effect transistor is electrically connected to one other terminal of the first inductor, and the source electrode of the third field effect transistor is grounded; a gate electrode of the fourth field effect transistor is inputted with a fourth control signal, the drain electrode of the fourth field effect transistor outputs a output voltage, and the source electrode of the fourth field effect transistor is electrically connected with the other terminal of the first inductor; one terminal of the first capacitor is electrically connected with the terminal of the first inductor and one other terminal of the first capacitor is electrically connected to a first bootstrap pin of the control chip; one terminal of the second capacitor is electrically connected to the other terminal of the first inductor and one other terminal of the second capacitor is electrically connected with a second bootstrap pin of the control chip;
the first control signal, the second control signal, the third control signal, and the fourth control signal are all provided by the control module;
wherein the subtractor subtracts the input voltage and the load-rated voltage and outputs an operation result to the control module; the control module adjusts the first control signal, the second control signal, the third control signal, and the fourth control signal, to correspondingly control on/off of the first field effect transistor, the second field effect transistor, the third field effect transistor, and the fourth field effect transistor.

US Pat. No. 10,193,446

MULTI-MODULE DC-TO-DC POWER TRANSFORMATION SYSTEM

Lionel O. Barthold, Quee...

1. A multi-module dc-to-dc power transformation system that is constructed and arranged to transform power from a first dc voltage node to a separate second dc voltage node, comprising:(a) a column comprising a plurality of half-bridge modules connected in series, each half-bridge module comprising a capacitance that is configured to be either electrically inserted into the column or electrically isolated from the column using switches within the column, wherein a first end of the column is electrically connected to ground;
(b) two high voltage switches, each in series with a reactor; a first of the two high-voltage switches adapted to electrically connect a second end of the column to the first dc voltage node and a second of the two high-voltage switches adapted to electrically connect the second end of the column to the second dc voltage node; and
(c) a controller adapted to control the states of the switches within the column and the states of the two high voltage switches so as to transform power by resonant exchange of energy between capacitances of the half-bridge modules of the column through the reactors and the first and second dc voltage nodes;
wherein a half-cycle of resonant and sinusoidally varying current, initiated by a connection of the capacitances of a plurality of half-bridge modules of the column to the first and second dc voltage nodes and interrupted at a first current-zero point, is used by the controller to achieve exchange of energy between the capacitances of a plurality of half-bridge modules and the first and second dc voltage nodes.

US Pat. No. 10,193,443

SYSTEMS AND METHODS FOR ENHANCING DYNAMIC RESPONSE OF POWER CONVERSION SYSTEMS

On-Bright Electronics (Sh...

1. A system controller for regulating a power conversion system, the system controller comprising:a first amplifier configured to receive a reference signal and a feedback signal associated with an output signal of the power conversion system, the first amplifier including an amplifier terminal;
a variable-resistance component associated with a first variable resistance value, the variable-resistance component including a first component terminal and a second component terminal, the first component terminal being coupled with the amplifier terminal;
a first capacitor including a first capacitor terminal and a second capacitor terminal, the first capacitor terminal being coupled with the second component terminal; and
a modulation and drive component including a first terminal and a second terminal, the first terminal being coupled with the amplifier terminal, the modulation and drive component being configured to output a drive signal at the second terminal to a switch in order to affect the output signal of the power conversion system;
wherein the system controller is configured to:
set the first variable resistance value to a first resistance magnitude in order to operate in an on-off mode; and
set the first variable resistance value to a second resistance magnitude in order to operate in an error amplifier mode;
wherein:
the first resistance magnitude is larger than the second resistance magnitude; and
the on-off mode is different from the error amplifier mode.

US Pat. No. 10,193,440

SWITCH NETWORK OF A MULTILEVEL POWER CONVERTER ARCHITECTURE

WISCONSIN ALUMNI RESEARCH...

1. A power converter comprising:a capacitive divider including a first end providing a first converter terminal and a second end providing a second converter terminal attachable to a ground reference, the capacitive divider further including a plurality of capacitors connected in series between the first end and the second end;
a multilevel switch network including a plurality of levels, each level including at least one level switch, wherein each level switch comprises
a switch terminal;
two throw terminals;
a single-pole, double-throw switch (SPDT) having a pole and two throws, wherein each throw of the two throws is connected to a respective throw terminal of the two throw terminals, wherein the pole is electrically controllable to move between the two throws;
an inductor connected between the pole and the switch terminal; and
a capacitor connected between the two throw terminals;
wherein a number of level switches in successive levels of the plurality of levels decreases from a first level to a last level,
wherein the last level has a single level switch, wherein the switch terminal of the single level switch provides a third converter terminal and the two throw terminals of the single level switch are each connected to the switch terminal of the level switch of a previous level relative to the last level,
wherein each level switch of the first level is connected across a different capacitor of the capacitive divider to provide a switchable connection between the pole of a respective SPDT switch and each side of a respective different capacitor,
wherein each level switch of each remaining level includes a throw terminal of the two throw terminals connected to the switch terminal of a different level switch of the previous level relative to a current level;
and
at least one switch signal generator controlling a switching of the SPDT switches of the multilevel switch network to provide a power transformation between the first converter terminal and the third converter terminal.

US Pat. No. 10,193,439

POWER FACTOR CORRECTION CIRCUIT, CONTROL METHOD AND CONTROLLER

Silergy Semiconductor Tec...

1. A power factor correction circuit, comprising:a) a power meter configured to measure total harmonic distortion (THD) at an input port;
b) a switching-type regulator that is controllable by a switching control signal in order to adjust a power factor of an input signal thereof; and
c) a controller configured to generate said switching control signal to control said switching-type regulator to perform power factor correction, wherein said controller minimizes said THD by adjusting a current reference signal according to a measured THD, and said current reference signal represents an expected inductor current of said switching-type regulator.

US Pat. No. 10,193,437

BRIDGELESS AC-DC CONVERTER WITH POWER FACTOR CORRECTION AND METHOD THEREFOR

SEMICONDUCTOR COMPONENTS ...

1. A bridgeless AC-DC converter, comprising:a totem pole network having a first input adapted to be coupled to a second terminal of an AC voltage source, a second input adapted to be coupled to a first terminal of said AC voltage source through an inductor, an output terminal for providing an output voltage, and a return terminal;
an output capacitor having a first terminal coupled to said output terminal, and a second terminal coupled to a bulk ground terminal;
a sense element coupled between said return terminal and said bulk ground terminal; and
a controller circuit coupled to said return terminal of said totem pole network, wherein said controller circuit modulates an on time of an active switch in said totem pole network on a cycle-by-cycle basis by shortening said on time corresponding to an amount of time a current sense signal derived from a current through said sense element exceeds a current limit threshold.

US Pat. No. 10,193,436

SWITCHING POWER SUPPLY APPARATUS

FUJI ELECTRIC CO., LTD., ...

1. A switching power supply apparatus, comprising:a power converting device body including a resonance type DC-DC converter that has:
a series resonant circuit, formed by leakage inductance of an isolation transformer and a capacitor through which a primary winding of the isolation transformer is connected to a DC voltage source,
a first switching element, which is drivable by a control circuit to thereby cause an input voltage from the DC input voltage source to be applied to the series resonant circuit when the first switching element is ON,
a second switching element connected in parallel to the series resonant circuit, the second switching element being drivable to turn ON by the control circuit when the first switching element is OFF, so as to form a current path of the series resonant circuit,
a diode configured to rectify electric power generated by a secondary winding of the isolation transformer; and
an output capacitor configured to smoothen and output the electric power rectified by the diode;
the control circuit configured to drive the first and second switching elements, via a first drive control signal and a second drive control signal respectively, to alternately turn ON or OFF the first and second switching elements, to thereby resonate the series resonant circuit; and
an overload detecting circuit including
a comparator that receives a resonance voltage that is generated from the resonance of the series resonant circuit and a predetermined reference voltage, and compares the resonance voltage and the predetermined reference voltage,
a gate circuit that performs an AND operation on the first or second drive control signal and an output of the comparator,
a timer circuit that receives an output of the gate circuit, and, in response to falling of the resonance voltage below the predetermined reference voltage, generates an output that delays the output of the gate circuit for a first predetermined time period, and
a flip-flop having a set terminal receiving the output of the gate circuit and a reset terminal receiving the output of the timer circuit, so as to be
set responsive to the resonance voltage exceeding the predetermined reference voltage, and
reset after lapse of the first predetermined time period after the falling of the resonance voltage below the predetermined reference voltage,the overload detecting circuit being configured to stop operation of the control circuit upon determining that an output of the flip-flop continues to be in a set state over a second predetermined time period.

US Pat. No. 10,193,435

START-UP CIRCUIT TO DISCHARGE EMI FILTER FOR POWER SAVING OF POWER SUPPLIES

SEMICONDUCTOR COMPONENTS ...

1. A discharge circuit for an EMI filter having an X-capacitor, comprising:a monitor circuit configured to be coupled to the EMI filter to receive a rectified signal having a waveform that is correlated to a waveform of a power source that is filtered by the EMI filter;
a high voltage switch transistor configured to receive the rectified signal and form a sample signal having a waveform that that is correlated to the rectified signal, the high voltage switch transistor configured to charge a supply voltage;
when the power source is shut down over a period of time, a discharging path is provided to conduct a discharge current from the EMI filter through the high voltage switch transistor for discharging a stored voltage of the X-capacitor, wherein the discharging path is cut off when the power source is in an active state.

US Pat. No. 10,193,434

POWER CONVERSION DEVICE AND THREE-PHASE AC POWER SUPPLY DEVICE

Sumitomo Electric Industr...

1. A power conversion device for converting DC powers to AC powers to be supplied to a three-phase AC system, the DC powers being inputted from a first DC power supply, a second DC power supply, and a third DC power supply which are independent of each other without sharing either a positive terminal or a negative terminal, the power conversion device comprising:a first-phase conversion device configured to, based on the DC power inputted from the first DC power supply, supply the AC power to a first phase with respect to a neutral point of the three-phase AC system via a first reactor;
a second-phase conversion device configured to, based on the DC power inputted from the second DC power supply, supply the AC power to a second phase with respect to the neutral point of the three-phase AC system via a second reactor;
a third-phase conversion device configured to, based on the DC power inputted from the third DC power supply, supply the AC power to a third phase with respect to the neutral point of the three-phase AC system via a third reactor; and
a control unit configured to control the first-phase conversion device, the second-phase conversion device, and the third-phase conversion device, wherein
the first-phase conversion device, the second-phase conversion device, and the third-phase conversion device each include a step-up circuit for stepping up a DC input voltage value of the DC power, and a single-phase inverter circuit, and
for each of the first-phase conversion device, the second-phase conversion device, and the third-phase conversion device, when an absolute value of a voltage target value obtained, as an AC waveform to be outputted, by superimposing a third-order harmonic on a fundamental wave exceeds the DC input voltage value, the control unit causes the step-up circuit to perform step-up operation to generate the absolute value of the voltage target value and causes the single-phase inverter circuit to only perform necessary polarity inversion, and when the absolute value of the voltage target value is smaller than the DC input voltage value, the control unit stops the step-up operation of the step-up circuit and causes the single-phase inverter circuit to operate to generate the voltage target value, the voltage target value being set by adding a voltage appearing between both ends of each of the first reactor, the second reactor and the third reactor to a voltage value of each phase of the three-phase AC system.

US Pat. No. 10,193,433

RAILWAY VEHICLE CONTROL APPARATUS

MITSUBISHI ELECTRIC CORPO...

1. A railway vehicle control apparatus comprising:a first power conversion device comprising a primary circuit and a secondary circuit, each including a switching element, each to operate as a power conversion circuit when the switching element is activated, and each to operate as a rectifier circuit when the switching element is deactivated, the first power conversion device performing bidirectional power conversions between a primary side and a secondary side; and
a controller to perform control to deactivate, when one of either the switching element of the primary circuit or the switching element of the secondary circuit is activated, the other switching element;
wherein, while an alternating current generator is stopped that is disposed on the primary side of the first power conversion device and driven by an internal combustion engine to output alternating current power, the controller activates the switching element of the secondary circuit and deactivates the switching element of the primary circuit such that the first power conversion device converts electric power input from the secondary side to supply electric power for causing the alternating current generator to operate; and
wherein, during operation of the alternating current generator, the controller activates the switching element of the primary circuit and deactivates the switching element of the secondary circuit such that the first power conversion device converts electric power supplied from the alternating current generator to output the converted electric power to the secondary side;
the railway vehicle control apparatus further comprising:
a second power conversion device, a primary side thereof being connected to the alternating current generator, to perform bidirectional power conversions between the primary side and a secondary side;
a smoothing capacitor connected to secondary side terminals of the second power conversion device and connected to terminals of the primary side of the first power conversion device; and
an inverter connected in parallel with the smoothing capacitor between the secondary side terminals of the second power conversion device;
wherein the controller further controls the second power conversion device;
wherein, while the alternating current generator is stopped: (i) the controller, in response to a start command of the internal combustion engine, activates the switching element of the secondary circuit, and deactivates the switching element of the primary circuit such that the first power conversion device converts electric power stored in an electric power storage device connected to the secondary side terminals of the first power conversion device to charge the smoothing capacitor; (ii) thereafter the controller controls the second power conversion device such that the second power conversion device converts electric power stored in the smoothing capacitor to supply electric power for causing the alternating current generator to operate; (iii) the internal combustion engine is started by a torque output by the alternating current generator to which electric power from the second power conversion device is supplied and (iv) when starting operation of the internal combustion engine is completed, the controller deactivates the switching element of the primary circuit and the switching element of the secondary circuit; and
wherein while the alternating current generator is operated: (i) the controller controls the second power conversion device such that the second power conversion device converts the electric power supplied from the alternating current generator to charge the smoothing capacitor; and (ii) thereafter, when the voltage of the smoothing capacitor is greater than or equal to a threshold and the inverter is in a state of capable of being activated, the controller activates the switching element of the primary circuit and deactivates the switching element of the secondary circuit such that the first power conversion device converts the electric power supplied to the secondary side terminals of the second power conversion device to charge the electric power storage device.

US Pat. No. 10,193,428

ELECTRIC ROTATING MACHINE

DENSO CORPORATION, Kariy...

1. An electric rotating machine comprising:a stator serving as an armature including at least armature core segments and an armature coil; and
a radially outer rotor and a radially inner rotor, both rotatably provided relative to the stator with gaps therebetween,
wherein the stator has the armature coil wound around the armature core segments with M pairs of poles (M being a natural number), and N pairs of field poles (N being a natural number),
each of the outer and inner rotors has K (K being a natural number) soft magnetic members including a plurality of protrusions on a side facing the stator, and
the armature coil, the field poles, and the soft magnetic members satisfy a relational expression of |M±N|=K.

US Pat. No. 10,193,421

SYSTEM FOR THERMAL MANAGEMENT IN ELECTRICAL MACHINES

GENERAL ELECTRIC COMPANY,...

1. A component of an electrical machine, the component comprising:a magnetic core comprising teeth defining a plurality of slots, wherein each slot from the plurality of slots is defined between corresponding pair of adjacent teeth;
a conduction winding wound around each tooth of the teeth such that each slot accommodates two conduction windings; and
a heat dissipating element disposed in a slot of the plurality of slots between the two conduction windings, wherein the heat dissipating element comprises a thermally conducting material having an in-plane thermal conductivity higher than a through-plane thermal conductivity and wherein the heat dissipating element comprises a sheet-like element having a largest plane substantially parallel to a radial direction of the component.

US Pat. No. 10,193,419

AIR GAP BAFFLE TRAIN FOR TURBINE GENERATOR

SIEMENS ENERGY, INC., Or...

1. A turbine generator baffle train apparatus, comprising:a plurality of linearly aligned baffle blocks, each respectively having an external circumferential profile adapted for sliding receipt within an axial slot of a turbine generator stator bore, a circumferential baffle sector portion on an upper surface for radially inwardly projection into a turbine generator bore when within a stator axial slot, a lower surface, and a thru bore;
at least one axial spacer rod, adapted for sliding receipt within a turbine generator stator axial slot, passing through the respective baffle block thru bores;
at least one locking engagement member coupling each respective baffle block to the at least one axial spacer rod at an axial location corresponding to a desired axial location of the circumferential baffle sector within a generator bore;
a selectively reciprocating wedge block rod adapted for orientation within a turbine generator stator axial slot under the baffle blocks lower surfaces;
a plurality of linearly aligned wedge blocks that are axially spaced relative to each other and coupled to the wedge block rod in axial positions corresponding to each baffle block axial position, each wedge block respectively having an external circumferential profile adapted for sliding receipt within a turbine generator stator axial slot under the baffle blocks lower surfaces; and
a plurality of biasing elements adapted for sliding receipt within a turbine generator stator axial slot, respectively adapted for biasing the upper surface of a corresponding baffle block toward a stator bore when a corresponding wedge block is axially aligned with a baffle block lower surface.

US Pat. No. 10,193,411

OUTER ROTOR MOTOR

HONDA MOTOR CO., LTD., T...

1. An outer rotor motor comprising a metal motor case having an inner space, an inner stator disposed in the inner space of the motor case and having an outer circumference, and an outer rotor disposed along the outer circumference of the inner stator,the motor case comprising:
a mounting seat portion provided in the inner space of the motor case, the mounting seat portion having an inside; and
a protruding portion protruding from the inside of the mounting seat portion,
the inner stator comprising:
an opening portion formed centrally of the inner stator, the opening portion being formed to telescopically fit over the protruding portion;
a mounting portion formed adjacent the opening portion, the mounting portion facing the mounting seat portion with the opening portion telescopically fitting over the protruding portion,
the outer rotor motor further comprising:
a vibration isolating member interposed between the mounting seat portion and the mounting portion, the vibration isolating member including a metal member, a pair of elastic members sandwiching the metal member, and a pair of graphite layers laminated on surfaces of the elastic members, each graphite layer and the metal member being on opposite surfaces of each elastic member; and
a fastener that is formed through the vibration isolating member in a direction along which the metal member, the elastic members, and the graphite layers are laminated, and that fastens the mounting portion and the mounting seat portion together while compressing the vibration isolating member.

US Pat. No. 10,193,408

BRUSHLESS MOTOR HAVING TERMINAL FIXING BLOCKS

BERGSTROM, INC., Rockfor...

1. A brushless motor, comprising:a stator having a stator core; and
an upper insulating bobbin connected to an upper face of the stator core, the upper insulating bobbin including a plurality of coil wound portions, and an upper surface of the upper insulating bobbin having a plurality of terminal fixing blocks and a plurality of wire through blocks, each terminal fixing block having a wire-through notch for positioning a wire on the upper insulating bobbin with respect to the coil wound portions and a terminal socket electrically connected with the wire,
wherein a first angle between the wire-through notch of each terminal fixing block and a radial direction of the upper insulating bobbin is 50°-130°, and wherein the terminal socket of each terminal fixing block is inserted into the terminal fixing block to be electrically connected with the wire in the wire-through notch.

US Pat. No. 10,193,402

FASTENING SYSTEM FOR COUPLING ELECTRICAL MACHINE COMPONENTS

GE RENEWABLE TECHNOLOGIES...

1. An electrical machine comprising:a first item having a male dovetail portion; and
a second item having a female dovetail portion with an opening;
wherein:
a shape of the male portion and a shape of the female portion are adapted to each other such that the male dovetail portion can be fit into the opening of the female dovetail portion, and wherein
the first item formed as a stack of sheets comprising a plurality of male standard sheets with the male dovetail portion that substantially fit into the opening of the female dovetail portion and one or more male protruding sheets with dimensions at the male dovetail portion larger than the opening of the female dovetail portion along an entire length of male dovetail portion such that, in use, the male protruding sheets are deformed during insertion of the male dovetail portion into the opening of the female dovetail portion, wherein the first item is a magnet module and the second item is a rotor rim, the magnet module defining a base for housing a plurality of magnets such that the magnets are fixable to the rotor rim via the base; or
wherein the first item is a stator tooth and the second item is a stator housing, the stator tooth defining a base for a plurality of coils such that the coils are fixable to the stator housing via the base.

US Pat. No. 10,193,400

METHOD OF AND APPARATUS FOR DETECTING COIL ALIGNMENT ERROR IN WIRELESS INDUCTIVE POWER TRANSMISSION

Momentum Dynamics Corpora...

1. An apparatus for detecting coil alignment error in a wireless resonant inductive power transmission system comprising a primary inductive coil and a secondary inductive coil arranged to constitute a loosely coupled air core transformer whereby power in the primary inductive coil is transferred to the secondary inductive coil when the primary inductive coil is activated, comprising:at least two arc segment eddy current coils superimposed on the primary inductive coil, said at least two arc segment eddy current coils arranged to correspond with respective sectors of the primary inductive coil whereby an active eddy current coil has the effect of reducing a magnetic flux intercepted by the secondary inductive coil;
a switch connected to each arc segment eddy current coil;
a sequencer arranged to selectively activate the switch connected to each arc segment eddy current coil singularly or in unison in a switching sequence; and
a voltage detector that detects voltage variations in the secondary inductive coil during said switching sequence, whereby alignment of said primary inductive coil and said secondary inductive coil is detected by activating the eddy current coils sequentially and measuring detected voltage variations of the secondary inductive coil during the eddy current coil switching sequence, and whereby correspondence between the eddy current coil switching sequence and a largest magnetic flux variation of said secondary inductive coil indicates an error vector direction and a magnitude of magnetic flux variations of the secondary inductive coil indicate an error vector magnitude.

US Pat. No. 10,193,399

POWER SUPPLY DEVICE

FUNAI ELECTRIC CO., LTD.,...

1. A power supply device, comprising:a power supply part, capable of supplying a power to a plurality of external devices;
a communication part, capable of communicating with the external devices; and
a controller, disconnecting communication with one or more of the external devices based on a comparison of a power supplied information and predicted values of the power supplied information of the external devices in a case that a number of requests for a communication from the external devices exceeds a number that the communication part is capable of communicating with at the same time.

US Pat. No. 10,193,395

REPEATER RESONATOR

MINNETRONIX, INC., St. P...

1. A repeater for a wireless power transfer system, comprising:an elongated strip of material configured to be worn around a human subject with opposing ends of the elongated strip disposed in close proximity to each other;
an inductive element supported by the elongated strip and-arranged to provide a coupling with an adjacent resonator through flux directed outward from a first surface of the elongated strip; and
a capacitive element supported by the elongated strip and-arranged to resonate electromagnetic energy with the inductive element when the electromagnetic energy is transferred from the adjacent resonator through the coupling provided by the inductive element.

US Pat. No. 10,193,387

WIRELESS POWER TRANSMISSION APPARATUS AND METHOD

LG ELECTRONICS INC., Seo...

1. A wireless power transfer device, which is a medium-power wireless power transfer device that transfers power to a low-power wireless power reception device or a medium-power wireless power reception device, the wireless power transfer device comprising:a power conversion unit that converts electrical energy to a power signal; and
a communications and control unit that communicates with the wireless power reception device and controls power transfer,
the power conversion unit comprising:
an inverter that converts DC input to an AC waveform that drives a resonant circuit;
a primary coil that generates a magnetic field;
a shield material aligned with the primary coil; and
a current sensor that monitors current in the primary coil,
wherein the primary coil has a rectangular shape with a single layer of which a number of turns is 12, and consists of 105 strands Litz wire of which the diameter is 0.08 mm,
wherein the shield material is at least 1.5 mm thick and extends at least 2.5 mm beyond the outside of the primary coil,
wherein the primary coil and the shield material have a self-inductance 10.0 ?H, and
wherein the inverter operates in a full-bridge mode or in a half-bridge mode, the initial operation mode is set to the half-bridge mode, and if a detected wireless power reception device is the medium-power wireless power reception device, the communications and control unit changes the inverter operation mode from the half-bridge mode to the full-bridge mode alter receiving a control error packet from the wireless power reception device.

US Pat. No. 10,193,386

WIRELESS CHARGING METHOD AND SYSTEM, WIRELESS CHARGING DEVICE AND WEARABLE DEVICE

HUAWEI TECHNOLOGIES CO., ...

1. A wireless charging method, comprising:receiving, by a charging device, electric power usage data from at least two wearable devices;
determining, by the charging device, an electric power distribution solution according to the electric power usage data, the electric power distribution solution being used to determine a charging order and charging electric power for charging one or more of the at least two wearable devices;
performing, by the charging device, wireless charging on one or more of the at least two wearable devices according to the electric power distribution solution; and
sending, by the charging device, the electric power distribution solution to at least one of the at least two wearable devices, the at least one of the at least two wearable devices controlling output load and a quantity of turns of a wireless charging coil to receive electric power, and the at least one of the at least two wearable devices controlling output of the received electric power and an output time to a service in use and a battery.

US Pat. No. 10,193,380

POWER SOURCES AND SYSTEMS UTILIZING A COMMON ULTRA-CAPACITOR AND BATTERY HYBRID ENERGY STORAGE SYSTEM FOR BOTH UNINTERRUPTIBLE POWER SUPPLY AND GENERATOR START-UP FUNCTIONS

Inertech IP LLC, Danbury...

1. A power source comprising:a first ultra-capacitor module;
a battery module coupled in parallel with the first ultra-capacitor module;
a two-level inverter coupled to the first ultra-capacitor module and the battery module;
a high frequency DC-DC converter coupled to the first ultra-capacitor module and the battery module;
a fast charger coupled to the first ultra-capacitor module and the battery module, and operable to charge the first ultra-capacitor module and the battery module; and
a second ultra-capacitor module coupled to an output of the high frequency DC-DC converter and configured for starting up a generator.

US Pat. No. 10,193,379

DIRECT CURRENT UNINTERRUPTIBLE POWER SUPPLY SYSTEM

Jae Jin Lee, Chungcheong...

1. A direct current (DC) uninterruptible power supply system provided with a first connection unit electrically connected to a DC power conversion system which converts prevailing alternating current (AC) power into DC power, an auxiliary power supply device charged with the DC power, and a second connection unit which is electrically connected to a load and supplies the DC power or power output from the auxiliary power supply device to the load, the DC uninterruptible power supply system comprising:a charging portion which boosts a level of DC voltage power supplied from the DC power conversion system normally connected to the first connection unit and charges the auxiliary power supply device with the boosted DC voltage power;
a discharge portion which generates internal voltage power by stepping down a level of voltage power of the auxiliary power supply device;
a comparator which compares the level of the DC voltage power supplied from the DC power conversion system with a level of a set reference voltage and outputs a clear voltage or a set voltage according to a result thereof; and
a switchover portion which comprises a relay connected to the first connection unit, the second connection unit, and the discharge portion, in which due to disconnection of the DC power conversion system from the first connection unit and a damage or short circuit of the DC power conversion system, the set voltage is supplied from the comparator, thereby allowing the relay to be set in such a way that connection between the first connection unit and the second connection unit is cut off and the discharge portion and the second connection unit are connected to allow the internal voltage power generated by the discharge portion to be supplied to the second connection unit, and as the DC power conversion system is normally connected to the first connection unit, the clear voltage is supplied from the comparator to allow the relay to become in a clear state in such a way that connection between the discharge portion and the second connection unit is cut off and the first connection unit and the second connection unit are connected to supply the DC power supplied from the DC power conversion system to the second connection unit.

US Pat. No. 10,193,377

SEMICONDUCTOR ENERGY HARVEST AND STORAGE SYSTEM FOR CHARGING AN ENERGY STORAGE DEVICE AND POWERING A CONTROLLER AND MULTI-SENSOR MEMORY MODULE

SAMSUNG ELECTRONICS CO., ...

1. A system, comprising:a power source;
a circuit board;
a first integrated circuit disposed on the circuit board;
a second integrated circuit separate from the first integrated circuit and disposed on the circuit board;
an energy harvesting device configured to convert energy from the first integrated circuit to electrical energy;
an energy storage device configured to store the electrical energy; and
a power supply configured to, while supplying power to the first integrated circuit from the power source, switch between supplying power from the energy storage device to the second integrated circuit and supplying power from the power source to the second integrated circuit.

US Pat. No. 10,193,372

OPERATING AN INDUCTIVE ENERGY TRANSFER SYSTEM

Apple Inc., Cupertino, C...

1. A method for operating an inductive energy transfer system that includes a transmitter device and a receiver device, the receiver device including a touch sensing device, the method comprising:detecting if an input surface of the touch sensing device is touched while the transmitter device is transferring energy inductively to the receiver device; and
if the input surface is touched, the transmitter device transferring energy inductively only during a first time period and the touch sensing device obtaining touch samples only during a different second time period.

US Pat. No. 10,193,369

ACTIVE BATTERY MANAGEMENT SYSTEM

GBATTERIES ENERGY CANADA ...

1. A method to charge a battery cell that is operatively coupled to a power source via a switching circuit, the method comprising:controlling the switching circuit to operate in a first switch position in which the power source is connected to the battery cell to transfer energy from the power source to a plurality of capacitive regions in the battery cell, wherein the connection of the power source to the battery cell results in flow of charging current through the battery cell;
maintaining the first switch position for a first duration of time until a determination is made that a speed of change of the charging current through the battery cell is approaching zero, wherein the speed of change of the charging current approaching zero is indicative of the plurality of capacitive regions being fully charged;
in response to determining that the speed of change of the charging current through the battery cell is approaching zero, controlling the switching circuit to operate in a second switch position, in which the power source is disconnected from the battery cell, for a second duration of time, resulting in transferring of charge stored in the plurality of capacitive regions of the battery cell by migration and/or diffusion of ionic charge within the battery cell; and
controlling the switching circuit to alternate between the first switch position and the second switch position to charge the battery cell.

US Pat. No. 10,193,368

CHARGING CONTROL APPARATUS AND METHOD FOR ELECTRONIC DEVICE

GUANGDONG OPPO MOBILE TEL...

1. A charging control apparatus for an electronic device, comprising a power adapter and a charging control module; the power adapter being configured to charge a battery in the electronic device and to perform data communication with the charging control module via a communication interface of the power adapter; the charging control module being built in the electronic device and being configured to detect a voltage of the battery; each of the charging control module and the battery being coupled to the communication interface of the power adapter via a communication interface of the electronic device;wherein, during a process of charging the battery, the power adapter first charges the battery with a constant-voltage direct current output, and then after the power adapter receives a quick-charging instruction sent by the charging control module, the power adapter adjusts an output voltage according to the voltage of the battery fed back by the charging control module, and when the output voltage meets a quick-charging voltage condition pre-set by the charging control module, the power adapter adjusts an output current and the output voltage respectively according to a preset quick-charging current value and a preset quick-charging voltage value for quick-charging the battery, and meanwhile the charging control module introduces direct current from the power adapter for charging the battery; and during a process of quick-charging the battery, the power adapter adjusts the output current in real time according to the output voltage thereof and the voltage of the battery;
wherein the power adapter receiving the quick-charging instruction sent by the charging control module comprises that: when the power adapter performs data communication with the charging control module, the power adapter sends a quick-charging inquiry instruction to the charging control module when the output current of the power adapter is within a conventional current range during a preset period of time; the charging control module determines the voltage of the battery according to the quick-charging inquiry instruction; and the charging control module feeds back the quick-charging instruction to the power adapter when the voltage of the battery reaches the quick-charging voltage value.

US Pat. No. 10,193,366

RAPID BATTERY CHARGING

Potential Difference, Inc...

1. A method for charging one or more batteries with a battery charger, comprising the steps of:providing one or more batteries electrically connected to the battery charger, a recovery circuit electrically connected to each battery, and one or more energy storage devices electrically connected to each of the recovery circuits, wherein the battery charger comprises a pulse generator, a detector and a processor communicably coupled to the pulse generator and the detector;
determining a charging pulse group based on one or more battery parameters using the processor and the detector, wherein the charging pulse group comprises a positive pulse, a rest period and a negative pulse;
generating the charging pulse group using the pulse generator;
sequentially applying the charging pulse group to each of the one or more batteries, recovering an energy from each of the one or more batteries using the recovery circuits during the negative pulse, and storing the energy in the one or more energy storage devices; and
monitoring the one or more parameters of the one or more batteries and determining whether to adjust the charging pulse group for the one or more batteries using the processor and the detector.

US Pat. No. 10,193,363

HYBRID COUPLING FOR A SMART BATTERY SYSTEM

Bren-Tronics, Inc., Comm...

1. A smart battery system comprising:a battery housing containing a first battery, a second battery, and first and second memory locations for storing data about said first and second batteries respectively; and
a single hybrid coupling having a mating jack comprising
(i) a power coupling including two pairs of D.C. battery conductors disposed in a first circular configuration within said mating jack for electrically connecting an external device to said first and second batteries; and
(ii) a data coupling providing two system management buses for communicating data between the external device and said first and second memory locations respectively, wherein said data coupling has two pairs of digital bus conductors disposed in a second circular configuration within said mating jack, wherein said second circular configuration is concentric with said first circular configuration,wherein said power coupling and said data coupling terminate in contacts that are arranged in the jack starting from the 12:00 position and moving clockwise as follows:a first battery conductor of said first pair of D.C. battery conductors;
a first digital bus clock data conductor of said first pair of digital bus conductors;
an additional battery-type conductor;
a first digital bus data conductor of said first pair of digital bus conductors;
a first battery conductor of said second pair of D.C. battery conductors;
an additional data-type conductor;
a second battery conductor of said first pair of D.C. battery conductors;
a second digital bus clock data conductor of said second pair of digital bus conductors;
a second battery conductor of said second pair of D.C. battery conductors; and
a second digital bus data conductor of said second pair of digital bus conductors, andwherein the external device comprises a charger, and further comprising a further battery-type conductor in the center of the jack, and wherein said additional data-type conductor provides a charge enable signal and said further battery-type conductor provides a charge enable return signal.

US Pat. No. 10,193,358

DEEP-CHARGING POWER RESOURCES OF POWER RESOURCE GROUP HAVING IDENTIFIER CORRESPONDING TO RANGE WITHIN WHICH MODULO FALLS BASED ON CHARGING TIME

HEWLETT PACKARD ENTERPRIS...

1. A method comprising:determining a total number of minutes that have elapsed since a reference time;
computing a product of a number of power resource groups and a time to charge, each power resource group comprising a plurality of power resources, the time to charge specifying a length of time to charge each power resource;
computing a modulo of the determined total number of minutes divided by the computed product;
deep-charging power resources of a given power resource group responsive to the computed modulo being inside a range based on a numeric identifier of the given power resource group and the time to charge;
determining that the given power resource group is within a threshold amount of time from a start or an end of a charging window associated with the given power resource group;
starting deep-charging of the given power resource group responsive to determining that the given power resource group is at the threshold amount of time from the start of the charging window; and
ending deep-charging of the given power resource group responsive to determining that the given power resource group is at the threshold amount of time from the end of the charging window.

US Pat. No. 10,193,357

ENERGY STORAGE SYSTEM

TWS (MACAU COMMERCIAL OFF...

1. An energy storage system comprising:a plurality of battery building blocks which contribute load current to the output of the energy storage system, the battery building blocks comprising one or more electrical cell and a cell controller;
a system controller for providing functional control of the energy storage system and communication to an external host;
one or more system charger for charging the cells in the battery building blocks, wherein each battery building block is associated with an integrated charger;
an interface which provides a separate connection for at least two battery building blocks to allow the at least two battery building blocks to be separately removed from the energy storage system wherein, the system controller;
monitors the condition of the battery building blocks and determines a requirement to replace one of said battery building blocks; and
diverts the flow of current from the integrated charger associated with the battery building block to be replaced, wherein the charger provides a contribution to the load current in place of the contribution to the load current from the battery building block being replaced to allow said battery building block to be replaced whilst the energy storage system is in operation.

US Pat. No. 10,193,355

ELECTRIC POWER SUPPLY SYSTEM

HONDA MOTOR CO., LTD., T...

1. An electric power supply system, comprising:a first power storage device of high capacity type;
a second power storage device of high output type;
a charge control device for controlling power charge to the first power storage device and the second power storage device; and
a user input device for entering a command of a user;
wherein the power charge control device is configured to determine whether or not the first power storage device and the second power storage device can be charged up to a target residual capacity until a scheduled next use start time, and, when it is determined that the first power storage device and the second power storage device cannot be charged up to the target residual capacity until the scheduled use start time, either one or both of the first power storage device and the second power storage device are charged according to precedence which is inputted through the user input device to prioritize charge of one of the first power storage device and the second power storage device over charge of the other of the first power storage device and the second power storage device.

US Pat. No. 10,193,354

NEAR ZERO VOLT STORAGE TOLERANT ELECTROCHEMICAL CELLS THROUGH REVERSIBLE ION MANAGEMENT

Rochester Institute of Te...

1. An electrochemical cell, comprising:a positive electrode;
a negative electrode; and
an electrolyte, wherein the electrochemical cell contains reversible ions in an amount sufficient to maintain a negative electrode potential verses reference level that is less than a damage potential of the negative electrode and a positive electrode potential verses reference level that is greater than a damage potential of the positive electrode of the cell under an applied load at a near zero cell voltage state, such that the cell is capable of recharge from the near zero cell voltage state.

US Pat. No. 10,193,351

HYBRID DISTRIBUTED LOW VOLTAGE POWER SYSTEMS

COOPER TECHNOLOGIES COMPA...

1. A hybrid distributed low voltage power system, comprising:a first primary power source that distributes line voltage power during a first mode of operation and fails to distribute the line voltage power during a second mode of operation, wherein the first mode of operation is when a market price for the line voltage power is less than a threshold value, and wherein the second mode of operation is when the market price for the line voltage power is greater than the threshold value;
a first secondary power source that receives an input signal during the first mode of operation and distributes a reserve signal during the second mode of operation, wherein the reserve signal is generated from the input signal;
a power distribution module (PDM) coupled to the first primary power source and the first secondary power source, wherein the PDM comprises a first power transfer device and a first output channel, wherein the PDM receives the line voltage power from the first primary power source during the first mode of operation, and wherein the first power transfer device generates a first low-voltage (LV) signal using the line voltage power during the first mode of operation; and
at least one first LV device coupled to the first output channel of the PDM, wherein the at least one LV device operates using the first LV signal generated by the PDM during the first mode of operation, and wherein the at least one first LV device receives a reserve LV signal based on the reserve signal during the second mode of operation,
wherein the LV signal is up to 100 VAC or up to 60 VDC, and
wherein the input signal is generated by the primary power source or the PDM.

US Pat. No. 10,193,349

DISTRIBUTION SYSTEM

NABTESCO CORPORATION, To...

1. A distribution system for use in an aircraft, comprising:a central distributor provided in the aircraft and operatively connected with a power generator of an aircraft for receiving power from the power generator;
a plurality of electrical devices situated in the aircraft for performing predetermined operations, respectively;
a distal distributor provided at a location which is away from the central distributor;
a first power source wire connecting the central distributor to the distal distributor for supplying the received power to the distal distributor; and
a plurality of second power source wires connecting the distal distributor to the plurality of electrical devices for distributing the supplied power to the plurality of electrical devices, respectively,
wherein the distal distributor includes a primary monitoring controller for monitoring an operational state of each of the plurality of electrical devices,
wherein each of the plurality of electrical devices includes an electric actuator, and the distal distributor is configured to be electrically connectable to each of the electric actuators,
wherein the primary monitoring controller is configured to diagnose the operational state of each of the electric actuators, and
wherein the primary monitoring controller includes a health monitoring portion configured to diagnose the operational state of each of the electric actuators by comparing a power amount supplied from the distal distributor to the electric actuator and a mechanical output amount of the electric actuator.

US Pat. No. 10,193,346

INTERFACE FOR RENEWABLE ENERGY SYSTEM

Technology Research, LLC,...

1. An interface system for a renewable energy system, the interface system comprising:a plurality of micro-inverter boards, the micro-inverter boards each comprising:
a micro-inverter;
a DC power input configured for connecting the micro-inverter to a DC power source;
an AC power output configured for connecting the micro-inverter to a load and an external AC power grid; and
a controller for controlling AC power from the micro-inverter to be in phase with the external AC power grid; and
a switching matrix comprising:
a first switch, wherein the first switch is positioned between the load and the micro-inverters of the plurality of micro-inverter boards and also between the micro-inverters of the plurality of micro-inverter boards and the external AC power grid; and
a second switch, wherein the second switch is positioned between the external AC power grid and the micro-inverters of the plurality of micro-inverter boards and also between the external AC power grid and the load,
wherein the first switch and the second switch are each adjustable between an open position and a closed position, the micro-inverters of the plurality of micro-inverter boards being connected to the external AC power grid when the first switch and the second switch are in their respective closed positions, and the micro-inverters of the plurality of micro-inverter boards being disconnected from the external AC power grid when at least one of the first switch or the second switch is in the open position.

US Pat. No. 10,193,344

POWER STORAGE SYSTEM, POWER STORAGE MODULE, AND CONTROL METHOD

MURATA MANUFACTURING CO.,...

1. A power storage system, comprising:a plurality of power storage modules that are connected in parallel to a power line; and
a system voltage acquisition unit that obtains a system voltage in the power line,
a power storage module of the plurality of power storage modules including:
a power storage section that is formed of one or more storage batteries, and
a current control unit that comprises at least one variable resistor and a resistance control unit,
wherein the resistance control unit sets a resistance value of the at least one variable resistor based on a voltage difference that exceeds a threshold voltage,
wherein the voltage difference is between a voltage of the power storage section and the system voltage, and
wherein the current control unit controls a current that flows between the power storage section and the power line according to the set resistance value.

US Pat. No. 10,193,337

SEMICONDUCTOR DEVICE

LAPIS Semiconductor Co., ...

1. A semiconductor device comprising:an internal circuit;
a power supply line;
a grounding line;
a voltage regulator configured to generate, based on a power supply voltage, an internal power supply voltage for operating said internal circuit to apply said internal power supply voltage to said internal circuit via said power supply line and said grounding line, said internal power supply voltage having a voltage value lower than a voltage value of said power supply voltage; and
a protection circuit having first to n-th transistors (“n” denotes an integer being 2 or more) of PNP type which are Darlington-connected with one another,
wherein
a collector terminal of each of said first to n-th transistors is connected to said grounding line, and
an emitter terminal of the first transistor within said first to n-th transistors is connected to said power supply line while a base terminal of the n-th transistor within said first to n-th transistors is connected to said grounding line.

US Pat. No. 10,193,316

CORRUGATED TUBE AND WIRE HARNESS

YAZAKI CORPORATION, Toky...

1. A corrugated tube, which has a tubular shape and is configured such that a conductor path is inserted into an inside the tubular shape thereof, the corrugated tube comprising:a bellow portion having recessed grooves and projecting stripes which are alternately arrayed in a longitudinal direction of the tubular shape and extend in a circumferential direction of the tubular shape; and
a rib formed in a portion of the bellow portion in the longitudinal direction, extending in the longitudinal direction, wherein
at least one of corners of a sectional shape of the rib viewed from the longitudinal direction is a curved portion having a predetermined curvature radius, and
the rib intersects more than two of the projecting stripes.

US Pat. No. 10,193,314

POWER DISTRIBUTION PANEL WITH MODULAR CIRCUIT PROTECTION ELEMENTS

CommScope Technologies LL...

8. A body element of a circuit module comprising:a main body sized to be received into a slot of a power panel;
a bullet-nosed input power connection extending rearwardly from the main body;
an output power bus extending rearwardly from the main body, the output power bus including an output terminal;
an electrical connector on a rear side of the main body and positioned for connection to a backplane of a power panel; and
a pair of bullet-nosed connector receptacles in a front side of the main body, the pair of bullet nosed connector receptacles spaced apart to receive bullet-nosed connectors of a circuit protection module.

US Pat. No. 10,193,313

FLEXIBLE CONTROL SYSTEM FOR CORONA IGNITION POWER SUPPLY

Federal-Mogul Ignition LL...

1. A corona discharge ignition system, comprising:a corona igniter receiving energy at a drive frequency and an output current;
a first switch and a second switch each providing energy to the corona igniter at the drive frequency; and
a controller obtaining an output current signal representative of the output current received by the corona igniter;
the controller activating the first switch an amount of time after a first zero crossing of the output current signal while the second switch is not activated, wherein the first zero crossing is a zero crossing of the most recent full cycle of the output current signal, and the amount of time after the first zero crossing is determined based on at least one zero crossing of at least one full cycle of the output current signal previous to the most recent full cycle.

US Pat. No. 10,193,312

HIGH FREQUENCY DISCHARGE IGNITION APPARATUS

Mitsubishi Electric Corpo...

1. A high frequency discharge ignition apparatus for coupling high frequency energy supplied from a high frequency energy supply circuit, with a high voltage pulse supplied from an ignition coil, and supplying the coupled energy to an ignition plug, the high frequency discharge ignition apparatus comprising:a first housing having therein an output circuit for supplying the coupled energy to the ignition plug;
a second housing having therein the high frequency energy supply circuit; and
a connection member electrically connecting the output circuit and the high frequency energy supply circuit to each other, wherein
the first housing and the second housing are fixed to each other with faces thereof opposed to each other, and
the connection member is connected via pass-through portions provided at positions that are close to each other in the respective opposed faces.

US Pat. No. 10,193,309

METHOD OF MANUFACTURE FOR AN ULTRAVIOLET LASER DIODE

Soraa Laser Diode, Inc., ...

1. A system comprising:a package; and
an ultraviolet laser diode device disposed in the package, the device operable at a wavelength of less than 380 nm and greater than 200 nm, the device comprising:
a gallium and nitrogen containing substrate member comprising a surface region, a release material overlying the surface region, an n-type aluminum, gallium, and nitrogen containing material; an active region comprising aluminum, gallium, and nitrogen containing material overlying the n-type aluminum, gallium, and nitrogen containing material, a p-type aluminum, gallium, and nitrogen containing material; and a first transparent conductive oxide material with a band gap energy of greater than 3.2 eV and less than 7.5 eV overlying the p-type aluminum, gallium, and nitrogen containing material, and an interface region overlying the first transparent conductive oxide material, the gallium and nitrogen containing substrate member being configured by subjecting the release material to an energy source to initiate release of the gallium and nitrogen containing substrate member; and
a handle substrate bonded to the interface region.

US Pat. No. 10,193,308

SEMICONDUCTOR LASER WITH TENSILE STRAINED INALAS ELECTRON BLOCKER FOR 1310 NANOMETER HIGH TEMPERATURE OPERATION

Intel Corporation, Santa...

1. A multiple quantum well (MQW) laser for operating at high temperatures, comprising:at least one quantum well made of compressively strained Indium-Gallium-Aluminum-Arsenide (InGaAlAs) layers that are alternatively stacked with tensile strained InGaAlAs layers;
the at least one quantum well surrounded on one side by a n-doped cladding of Indium-Phosphide (InP) and on another side by a p-doped cladding of InP so as to form a double hetero-junction;
a confinement layer of lattice-matched Indium Aluminum Arsenide (InAlAs)
provided between the at least one quantum well and the p-doped InP cladding, the confinement layer having a first surface facing or adjacent to the quantum wells and a second surface facing or adjacent to the p-doped InP cladding;
an additional electron containment layer of tensile strained InAlAs, having a thickness smaller than that of the confinement layer, and provided either facing or adjacent to a surface of the confinement layer or between the two surfaces of the confinement layer.

US Pat. No. 10,193,305

WAVELENGTH TUNABLE LASER DEVICE AND LASER MODULE

FURUKAWA ELECTRIC CO., LT...

1. A wavelength tunable laser device, comprising:a laser cavity formed of a grating and a reflecting mirror optically coupled to the grating, said reflecting mirror including a ring resonator filter;
a gain portion arranged within the laser cavity; and
a phase adjusting portion arranged within the laser cavity,
wherein the grating forms a first comb-shaped reflection spectrum,
wherein the ring resonator filter of the reflecting mirror includes:
a ring-shaped waveguide; and
two arms that are respectively optically coupled to different points of the ring-shaped waveguide,
wherein the reflecting mirror further includes a coupler that unites respective ends of said two arms of the ring resonator filter on one end and that is optically coupled to the grating on another end,
wherein the reflecting mirror forms a second comb-shaped reflection spectrum having peaks of a narrower full width at half maximum than a full width at half maximum of peaks in the first comb-shaped reflection spectrum at a wavelength interval differing from a wavelength interval of the first comb-shaped reflection spectrum,
wherein the grating and the reflecting mirror are configured such that one of the peaks in the first comb-shaped reflection spectrum and one of the peaks in the second comb-shaped reflection spectrum are overlappable on a wavelength axis,
wherein the wavelength tunable laser device is configured to adjust a refractive index of the phase adjusting portion such that one of the cavity modes of the laser cavity enters an overlap region in which said one of the peaks in the first comb-shaped reflection spectrum and said one of the peaks in the second comb-shaped reflection spectrum are overlapped, thereby achieving laser oscillation at a wavelength of said one of the cavity modes,
wherein the laser cavity is configured such that a spacing between cavity modes is narrower than the full width at half maximum of the peaks in the first comb-shaped reflection spectrum, and such that two or more of the cavity modes are included within a peak in the first comb-shaped reflection spectrum,
wherein the wavelength tunable laser device is configured to adjust the refractive index of the phase adjusting portion so as to shift said two or more cavity modes on the wavelength axis and align only one of said two or more cavity modes with said overlap region, thereby achieving single mode laser oscillation at said one of said two or more cavity modes,
wherein the peaks in the second comb-shaped reflection spectrum protrude up higher than the peaks in the first comb-shaped reflection spectrum, and
wherein the refractive index of the phase adjustable portion is adjustable while maintaining a state in which the peaks in the second comb-shaped reflection spectrum protrude up higher than the peaks in the first comb-shaped reflection spectrum.

US Pat. No. 10,193,304

FAILSAFE PULSED LASER DRIVER

INTEL CORPORATION, Santa...

1. An apparatus comprising:a laser array having a plurality of lasers; and
a laser driver coupled to the laser array, wherein the laser driver comprises
a current limiter to limit a maximum current provided to the laser array at or below a combined threshold current of lasers in the laser array;
one or more capacitors coupled to current limiter and the laser array, the one or more capacitors to be charged in response to current from the current limiter;
a switch coupled to the one or more capacitors operable to cause current from the one or more capacitors to flow through the laser array.

US Pat. No. 10,193,301

METHOD OF MANUFACTURING LIGHT EMITTING DEVICE AND LIGHT EMITTING DEVICE

NICHIA CORPORATION, Anan...

1. A method of manufacturing a light emitting device, the method comprising:providing a wafer including a conductive first substrate, a laser element structure on an upper side of the first substrate, and an upper surface electrode on an upper surface of the laser element structure;
bonding the wafer to a second substrate at an upper surface electrode side of the wafer;
removing a portion of the first substrate to reduce a thickness of the wafer;
forming a lower surface electrode on a lower surface of the first substrate at which the removing of the portion of the first substrate has been performed;
singulating the wafer to obtain a laser element; and
mounting the laser element on a submount such that the lower surface electrode faces the submount.

US Pat. No. 10,193,293

SEMICONDUCTOR INSPECTION AND METROLOGY SYSTEM USING LASER PULSE MULTIPLIER

KLA-Tencor Corporation, ...

1. A method of generating output pulsed light at an output repetition pulse rate that is a multiplication factor greater than an input repetition pulse frequency of input laser pulses, the method comprising:optically splitting each input laser pulse of the input laser pulses into a plurality of pulses;
reflecting the plurality of pulses using a mirror and one or more multi-surface reflecting components including one or more partially reflective surfaces operably arranged and spaced apart such that the plurality of pulses are grouped into pulse trains that are of approximately equal energy and are approximately equally spaced in time; and
transmitting a set of the pulse trains as the output pulsed light.

US Pat. No. 10,193,292

JIG AND PRESS-FITTING DEVICE COMPRISING THIS JIG

J.S.T. MFG. CO., LTD., O...

1. A jig for guiding insertions of a plurality of press-fit terminals, comprising:a jig unit for installing the plurality of press-fit terminals which have shoulders and press-fit sections being formed wider than a width of a terminal main body and are arranged in at least one row, the jig unit being assembled by a plurality of plate-shaped bodies made of metal, wherein the jig unit comprises:
at least one sheet of movable guide member being formed in a comb-teeth shape having a plurality of guide grooves extending along a vertical direction into which the terminal main bodies can be fitted,
at least one sheet of insertion punch being formed in a comb-teeth shape having a plurality of punch grooves extending along the vertical direction corresponding to the guide grooves and being formed with pressing sections at the punch grooves for pressing the shoulders of the press-fit terminals, and
one sheet of rear surface plate body,
wherein the at least one sheet of movable guide member and the at least one sheet of insertion punch are alternately disposed along a front and a rear direction orthogonal to the vertical direction so that each surface of the at least of one sheet of movable guide member and the at least one sheet of insertion punch is faced to each other,
wherein the movable guide member and the rear surface plate body are attached so as to be upwardly and downwardly movable with respect to the insertion punch, and wherein when the press-fit terminals are installed to a member to be installed, and during the press-fit sections are adapted to be press fitted to the member to be installed by the insertion punch, the movable guide member and the rear surface plate body move upward with respect to the insertion punch after the lower ends of the movable guide member and the insertion punch are adapted to abut to the member to be installed.

US Pat. No. 10,193,289

PLUG-IN POWER SOURCE ADAPTING SEAT

Rich Brand Industries Lim...

1. A plug-in power source adapting seat composed of a main body, an adapting barrel, a positive pole clip, a negative pole clip and a joining body, wherein:the main body is integrally formed by a cylinder like portion and a disc like portion, the cylinder like portion has a straight-type external surface, the top surface of the cylinder like portion is opened, an inside of the cylinder like portion is disposed with a positive pole clip slot and a negative pole clip slot, an outward appearance of the cylinder like portion is formed with a shield ring at a small distance away from a bottom of the cylinder like portion, the bottom is circularly disposed with a plurality of slots, a circumference wall is disposed with a notch; the disc like portion is formed at the bottom of the cylinder like portion and formed with an expanded area, the bottom of the disc like portion is formed with a set of inserting troughs, the set of inserting troughs inwardly passing through and respectively piercing through the positive pole clip slot and the negative pole clip slot inside the cylinder like portion;
the adapting barrel is formed by a conductive material and has a cylinder shape, a circumference wall of the adapting barrel is formed with a screwing strip as a spiral shape, a bottom of the screwing strip is a vertical wall, the vertical wall is circularly disposed with a plurality of concave bodies, a top surface of the adapting barrel is formed with an opening and is embedded with an insulation body, the insulation body has a joining groove vertically penetrating;
a sheet body of the positive pole clip is formed with an extension and a bending, the positive pole clip obliquely protrudes to form a fasten piece, and a bottom of the positive pole clip is formed into a clamp line end;
a sheet body of the negative pole clip is formed with an extension and a bending, the negative pole clip obliquely protrudes to form a fasten piece, and a bottom of the negative pole clip is formed into a clamp line end; and
the joining body is formed by a conductive material to have a top cover showing an arc shape and a joining lever downwardly stretching, the top cover covers the opening of the adapting barrel, and an external diameter of the joining lever equals an inner diameter of the joining groove;
in assembling, the positive pole clip is downwardly accommodated into the positive pole clip slot from a top opening of the main body so that the clamp line end of the positive pole clip aligns with one of the set of inserting troughs, with the fasten piece of the positive pole clip and the positive pole clip slop achieving fastening and positioning; the negative pole clip is downwardly accommodated into the negative pole clip slot so that the clamp line end of the negative pole clip aligns with another of the set of inserting troughs, the fasten piece of the negative pole clip and the negative pole clip slot achieves fastening and positioning, after positioning the negative pole clip, a top section of the negative pole clip stretches from the notch of the cylinder like portion; the adapting barrel downwardly fits the cylinder like portion to enable the screwing strip of the adapting barrel to exist on the straight-type external surface of the cylinder like portion, the vertical wall is downwardly and vertically disposed from the shield ring of the cylinder like portion, the plurality of concave bodies of the adapting barrel is fastened into a corresponding slot of the cylinder like portion one on one so that the adapting barrel and the cylinder like portion achieve a combination, in the process, the top section of the negative pole clip achieves electric conductance together with the adapting barrel, at the same time, a top section of the positive pole clip enters the joining groove of the insulation body at a top end of the adapting barrel, the joining lever of the joining body pierces through the joining groove of the insulation body from an outside, the joining lever is in contact with the top section of the positive pole clip, the joining lever and the joining groove performing a packing motion, achieve an electric conductance together with the top section of the positive pole clip, and at the same time, the top cover completely covers the opening of the adapting barrel.

US Pat. No. 10,193,287

CONNECTING ADAPTER FOR A CONNECTING TERMINAL ASSEMBLY

Phoenix Contact GmbH Co. ...

1. A connecting adapter configured to connect to a connecting terminal assembly, wherein the connecting terminal assembly comprises a plurality of electrical connecting terminals, the connecting adapter comprising:a first printed circuit board comprising a first comb-type conducting structure comprising a plurality of comb teeth, wherein each comb tooth comprises a first electrical contact surface;
a second printed circuit board comprising a second comb-type conducting structure comprising a plurality of comb teeth, wherein each comb tooth comprises a second electrical contact surface;
an electrical plug connector interface configured to receive a plug connector, wherein the electrical plug connector interface comprises electrical terminals electrically connected to the first electrical contact surfaces of the comb teeth, and wherein the electrical plug connector interface is arranged on the first printed circuit board;
a first electrical signal transmission interface formed in or on the first printed circuit board, wherein the first electrical signal transmission interface is electrically connected to the electrical plug connector interface; and
a second electrical signal transmission interface formed in or on the second printed circuit board, wherein the second signal transmission interface is electrically connected to the first electrical signal transmission interface of the first printed circuit board and to the second electrical contact surfaces of the comb teeth of the second printed circuit board.

US Pat. No. 10,193,286

ELECTRONIC DEVICE AND CONTROL METHOD THEREOF

ASUSTeK COMPUTER INC., T...

1. An electronic device comprising,a first connector including a first pin and a second pin, configured to connect to an external device, wherein the electronic device determines whether the electronic device is electrically connected to the external device according to a voltage level of the first pin;
a power switching circuit;
a power module connected to the power switching circuit; and
an external terminal connected to the power module via the power switching circuit,
when the electronic device is connected to the external device, the electronic device determines whether to supply power to the external device according to a voltage level of the second pin, and
the power switching circuit is conducted to allow the power module to provide power for the external device when the electronic device determines to supply power to the external device.

US Pat. No. 10,193,283

BUSWAY STAB ASSEMBLIES AND RELATED SYSTEMS AND METHODS

Eaton Intelligent Power L...

1. A plug-in device for use with a busway system comprising a busway housing defining a longitudinal axis, the plug-in device comprising:a stab base housing having first and second opposite sides;
one or more stab conductors extending out of and away from the stab base housing at the first side of the stab base housing;
one or more stab conductors extending out of and away from the stab base housing at the second side of the stab base housing; and
a ground conductor at an upper portion of the stab base housing;
wherein the stab base housing is configured to be received through an opening at a bottom portion of the busway housing and positioned in a first position with each stab conductor extending away from the stab base housing in a direction substantially parallel to the longitudinal axis of the busway housing and with the ground conductor contacting a top wall of the busway housing;
wherein the stab base housing is configured to be rotated from the first position to a second position with each stab conductor extending away from the stab base housing in a direction substantially perpendicular to the longitudinal axis of the busway housing and with the ground conductor contacting the top wall of the busway housing;
wherein:
an enclosure is coupled to a lower portion of the stab base housing;
a cable extends from each stab conductor and from the ground conductor to outside the stab base housing at the lower portion thereof; and
each cable is electrically connected to one or more components in the enclosure.

US Pat. No. 10,193,282

PUSH-ON COAXIAL CONNECTOR

PERFECTVISION MANUFACTURI...

1. A push-on F-type coaxial connector comprising:an electrically insulating bonnet including a port grip;
the bonnet including a mouth and a collar with a throat therebetween;
a post including a tubular stem, a neck, and an end bell;
the end bell in the bonnet throat and the neck in the bonnet collar;
a body forming an annular space about the post stem;
a body collar adjacent to the bonnet collar;
the post irrotatably fixed with respect to the bonnet and the body; and,
resilient end bell fingers for spreading to accept a port and the bonnet for resisting spreading of the end bell fingers.

US Pat. No. 10,193,281

ELECTRICAL CONNECTOR ASSEMBLY HAVING A SHIELD ASSEMBLY

TE CONNECTIVITY CORPORATI...

1. A connector assembly for terminating a cable having a cable shield that is electrically conductive, the connector assembly comprising:a backshell that is electrically conductive comprising a body that extends from a mating end to a cable end along a mating axis of the connector assembly, the backshell configured to provide shielding for an electrical connector configured to be received in the backshell at the mating end, the cable end comprising a cable channel that extends through the body and is configured to hold an end segment of the cable therein;
a shield assembly comprising a clamp system, wherein the clamp system is electrically conductive and held within the cable end of the body of the backshell, the clamp system comprising a front clamping member and a rear clamping member, the cable shield of the cable configured to terminate to the front clamping member and to the rear clamping member of the clamp system between the front clamping member and the rear clamping member; and
an electromagnetic interference (EMI) gasket, wherein the EMI gasket is electrically coupled to the backshell and held within the cable end of the body of the backshell, the EMI gasket comprising a backshell interface and a clamp interface, wherein the backshell interface is configured to engage the backshell and the clamp interface is configured to engage an exterior surface of at least one of the front clamping member or the rear clamping member of the clamp system.

US Pat. No. 10,193,276

CONNECTOR HOUSING ASSEMBLY WITH COUPLING STRUCTURES

Sumitomo Wiring Systems, ...

1. A connector housing assembly configured to house an electrical connector, the connector housing assembly comprising:a connector housing having a pair of side walls, a front wall, a back wall, and a bottom wall defining a connector cavity configured to receive an electric connector and having a plurality of terminal cavities;
a terminal position assurance having a top surface, a bottom surface, a plurality of first terminal slots, and a pair of walls, the terminal position assurance configured to be seated in the connector cavity;
a male blade stabilizer having a top surface, a bottom surface, a plurality of second terminal slots, and an aperture having a pair of inner edges defining sides of the aperture, wherein each of the pair of inner edges is offset from the other, the male blade stabilizer is configured to be seated in the connector cavity over the terminal position assurance, wherein a width of each of the pair of walls of the terminal position assurance is the same length as a corresponding one of the pair of inner edges of the aperture and abuts the corresponding inner edges of the aperture when the male blade stabilizer is seated over the terminal position assurance.

US Pat. No. 10,193,275

ELECTRICAL CONNECTION DEVICE

AutoNetworks Technologies...

1. An electrical connection device, comprising:a connector unit including first connectors aligned along a specific arrangement direction;
second connectors respectively connectable to the first connectors in a connector connecting direction perpendicular to the arrangement direction; and
a connector connecting tool for connecting the respective first and second connectors;
the connector connecting tool detachably holding the second connectors in an alignment corresponding to that of the first connectors so that the first connectors and the second connectors are connectable;
one of the connector unit and the connector connecting tool including a guided portion, and the other including a guiding portion for guiding the guided portion while being engaged with the guided portion;
the guiding portion including a receiving portion for enabling the engagement of the connector unit and the connector connecting tool by receiving the guided portion in a receiving direction having a component of a direction parallel to the connector connecting direction, a connection guiding portion for allowing the connector connecting tool to be operated in a tool operating direction parallel to the arrangement direction with respect to the connector unit with the guided portion received in the receiving portion and guiding the guided portion in a connection guiding direction inclined toward the connector connecting direction with respect to a direction parallel to the tool operating direction to displace the connector connecting tool in the connector connecting direction with respect to the connector unit with a force larger than an operation force received by the connector connecting tool as the connector connecting tool is operated, and a separation allowing portion for releasing the guided portion in a separating direction having a component of a direction opposite to the receiving direction to allow the guided portion to be separated from the connection guiding portion in the separating direction after the connection.

US Pat. No. 10,193,273

PLUG-IN CONNECTION HAVING A LOCKING ELEMENT

1. A connector assembly comprising:a plug connector housing;
a mating plug connector that can be assembled with the housing;
a superstructure on the housing;
a locking element receivable in the superstructure and movable therein between a partially latched position and a fully latched position;
first mutually complementary latch formations on the plug connector and on the locking element that prevent movement of the locking element from the partially latched position out of the superstructure prior to insertion of the mating plug connector into the housing;
second mutually complementary latch formations on the mating plug connector and on the locking element, the second mutually complementary latch formations being actuated by insertion of the mating plug connector into the plug connector so that the locking element can be moved into its fully latched position; and
third mutually complementary latch formations on the plug connector housing and on the locking element that lock together the locking element and the plug connector only when the locking element has been moved into the fully latched position.

US Pat. No. 10,193,268

SFP CABLE CONNECTOR CAPABLE OF PROTECTING SOLDER JOINTS

TERALUX TECHNOLOGY CO., L...

1. An SFP cable connector capable of protecting solder joints, comprising:a lower case having a lower receiving cavity;
a cable, one end of which extends into the lower receiving cavity and the other end of which extends out of the lower case;
a circuit board being fixed in the lower receiving cavity of the lower case and being soldered with the one end of the cable to form a plurality of solder joints on the circuit board;
an insulator being formed on the top of the circuit board and covering all the solder joints; and
an upper case being mounted on the lower case and forming an upper receiving cavity and a protruding shoulder with an end surface;
wherein the protruding shoulder extends downward from the top of the upper receiving cavity, and the end surface of the protruding shoulder is capable of pressing the insulator downward firmly; and the insulator has a top surface and a horizontal bottom surface; the insulator is directly formed on the top of the circuit board; and the horizontal bottom surface of the insulator covers all the solder joints of the circuit board.

US Pat. No. 10,193,267

MULTIFUNCTION CONNECTOR

3M Innovative Properties ...

1. An elongated electrical connector for mating with a mating connector along a mating direction, the connector comprising:an elongated base extending along a longitudinal direction perpendicular to the mating direction and comprising a groove oriented along a thickness direction perpendicular to the mating and longitudinal directions, and a sliding portion configured to slide along the groove;
a bottom tongue extending forwardly along the mating direction from the base;
a top tongue extending forwardly along the mating direction from the sliding portion of the base and spaced apart from the bottom tongue along the thickness direction, the top tongue reversibly attachable to and removable from the connector by the sliding portion of the base sliding along the groove; and
a plurality of contacts disposed on the top and bottom tongues.

US Pat. No. 10,193,266

ELECTRICAL CONNECTOR DEVICE

1. An electrical connector device comprising a signal terminal housing and a protective casing, a first opening disposed at a rear end of the signal terminal housing, and a plurality of slots disposed at an upper portion of a front end of the signal terminal housing, a second opening disposed at a front end of the protective casing, and a first round hole disposed at a rear end of the protective casing, wherein a shell is disposed at the second opening of the front end of the protective casing, the shell is hollow, and a third opening is disposed at a front end of the shell and is used to receive the rear end of the signal terminal housing having the first opening, a second round hole corresponding to the first round hole of the rear end of the protective casing is disposed at a rear end of the shell;wherein an open space is disposed at a front half section of a front face of the shell, and a shield plate is disposed at a rear half section of the front face of the shell, a mouth is disposed at the shield plate, a sheet extends from an edge of the mouth;
wherein the sheet extending from the edge of the mouth of the shield plate is set to abut against the signal terminal housing, a recess is disposed at an upper portion of the rear end of the signal terminal housing, the sheet extending from the edge of the mouth of the shield plate is set to abut against and in the recess of the upper portion of the rear end of the signal terminal housing.

US Pat. No. 10,193,265

PROTECTIVE CAP

YAZAKI CORPORATION, Toky...

1. A protective cap used when a male inner housing to which a plurality of male terminals and a plurality of electric wires are attached is passed through a bellows-shaped tubular portion of a grommet in a case that a connector is to be used, a male outer housing mounted on an annular seal portion of the grommet and the male inner housing accommodated in an inner housing accommodating chamber in the male outer housing in a state where the male inner housing accommodates and holds the male terminals connected to the electric wires constitutes the connector, the protective cap comprising:a cap main body having circular shape and including an accommodating recessed portion configured to accommodate tab portions of the male terminals protruding more than a front face of the male inner housing, at least a front side of the male inner housing being fitted into the accommodating recessed portion,
wherein
an outer diameter of the cap main body is smaller than an inner diameter of the bellows-shaped tubular portion of the grommet, and
the cap main body comprises a disc-shaped front portion that covers the male terminals protruding more than the front face of the male inner housing.

US Pat. No. 10,193,262

ELECTRICAL DEVICE HAVING AN INSULATOR WAFER

TE CONNECTIVITY CORPORATI...

1. An electrical device comprising:a substrate having a signal contact and a ground contact along a surface of the substrate;
an insulator wafer having a front surface, a rear surface, and an opening, the front surface facing the signal contact, the insulator wafer also having an upper edge and a lower edge, wherein the insulator wafer is disposed inside the electrical device between the substrate and a ground bus bar; and
a communication cable including a signal conductor, an insulator surrounding the signal conductor, and a shield layer that surrounds the insulator, wherein the upper edge of the insulator wafer is substantially planar with the shield layer of the communication cable; wherein the insulator has a terminating end and the shield layer has a terminating end substantially coplanar with the terminating end of the insulator, a terminating end of the signal conductor extending beyond the terminating end of the insulator; wherein the terminating end of the signal conductor projects through the opening of the insulator wafer to electrically couple with the signal contact, the insulator wafer electrically isolating the shield layer from the signal contact;
wherein the front surface of the insulator wafer pressingly seats against the signal contact.

US Pat. No. 10,193,261

GENDERLESS ELECTRIC TERMINALS FOR VEHICLES

Ford Global Technologies,...

1. A genderless terminal comprising:a first arm;
a second arm opposite the first arm;
a wall integrally connecting the first arm and the second arm to define a slot, wherein the first arm, the second arm, and the wall extends a length of the genderless terminal; and
a first flexible contact extending from a first end of the first arm and protruding into the slot to engage a first arm of a different genderless terminal.

US Pat. No. 10,193,260

MULTI-CONTACT CONNECTOR

IRISO ELECTRONICS CO., LT...

1. A multi-contact connector comprising: terminals each includinga first contact piece section having a first contact section that achieves pressing contact with a connection target object in a first direction and a first elastic arm that extends in a direction that intersects the first direction and displaceably supports the first contact section, and
a second contact piece section having a second contact section that achieves pressing contact with the connection target object in the first direction and a second elastic arm that displaceably supports the second contact section,
wherein the second elastic arm extends in the first direction toward the first elastic arm and has a front end portion facing the first elastic arm and is formed as a spring piece linked to the second contact section.

US Pat. No. 10,193,259

RECEPTACLE CONNECTOR HOUSING WITH HOLD-DOWN RIBS

TE CONNECTIVITY CORPORATI...

1. A receptacle connector comprising:a housing including a mating end and a cable end and defining a cavity therebetween, the housing including a top wall, a bottom wall, and first and second side walls that extend between and connect the top wall and the bottom wall, the housing including a first hold-down rib in a first corner region of the cavity defined by the top wall and the first side wall, and a second hold-down rib in a second corner region of the cavity defined by the top wall and the second side wall, the first hold-down rib extending from the first side wall, the second hold-down rib extending from the second side wall; and
a terminal held in the cavity of the housing, the terminal having a contact segment that includes a floor and first and second rolled walls that extend from the floor, the floor engaging the bottom wall of the housing, the contact segment defining a receptacle configured to receive a mating tab contact therein through the mating end of the housing,
wherein the first hold-down rib extends over the terminal and is configured to engage an outer surface of the first rolled wall of the terminal and the second hold-down rib extends over the terminal and is configured to engage an outer surface of the second rolled wall of the terminal such that the terminal is held vertically between the bottom wall of the housing and the first and second hold-down ribs of the housing to limit vertical float of the terminal within the cavity.

US Pat. No. 10,193,256

POWER SUPPLY BOARD BRIDGE CONNECTOR AND CONNECTING STRUCTURE USING THE SAME

XIAMEN GHGM INDUSTRIAL TR...

1. A power supply board bridge connector, comprising an insulating base, an insulating cover, and at least one metallic elastic plate, the insulating cover being configured to cover the insulating base, at least one receiving groove is defined between the insulating base and the insulating cover, a bottom of the insulating base being formed with through holes communicating with the receiving groove, at least two left and right pins being provided beneath the insulating base, the pins being mated with insertion holes of two left and right power supply boards so that the insulating base bridges over the two power supply boards, the metallic elastic plate being placed in the receiving groove, the metallic elastic plate having two left and right elastic contacts, the two left and right elastic contacts pass through the through holes at the bottom of the receiving groove to be electrically connected to the left and right power supply boards respectively so as to achieve a bridging electrical connection between the two power supply boards,wherein opposing sides of the insulating base are provided with side slots corresponding in position to the pins, lower ends of the side slots extend to the pins respectively, each of the side slots is provided with a metallic buckle, the metallic buckle has a mounting plate abutting against a wall of the corresponding side slot, a bottom of the mounting plate of the metallic buckle is bent upward to form an elastic plate, the elastic plate is formed with a buckle protrusion to mate with respective edges of the insertion holes for installing and fixing the insulating base and the power supply boards, an upper end of the elastic plate is formed with a press portion above the power supply boards, when the press portion is pressed towards the mounting plate in the corresponding side slot, the buckle protrusion is disengaged from the edges of the insertion holes to disconnect the insulating base from the power supply boards.

US Pat. No. 10,193,253

SLANTED TYPE CARD EDGE CONNECTOR ASSEMBLY

FOXCONN INTERCONNECT TECH...

1. A card edge connector for mounting to a printed circuit board, comprising:an insulative housing including a pair of side walls extending along a longitudinal direction with a central slot therebeween in a transverse direction perpendicular to said longitudinal direction;
said housing forming a mounting face for mounting toward the printed circuit board wherein the housing extends in a plane oblique to said mounting face;
a pair of towers located at two ends of the housing in said longitudinal direction, each of said towers including a lower part and an upper part extending in a vertical direction perpendicular to both said longitudinal direction and said transverse direction; and
a pair of ejectors rotatably disposed in the corresponding towers, respectively; wherein
a width of the upper part along the transverse direction is dimensioned smaller than that of the lower part for densely arranging, on the printed circuit board, two card edge connectors in a front-to-back direction which is perpendicular to the longitudinal direction while being oblique to both said vertical direction and said transverse direction;
wherein the upper part has a recess in a downward face for receiving a bottom region of the lower part of the tower of another card edge connector therebehind in said front-to-back direction.

US Pat. No. 10,193,252

ELECTRONIC COMPONENT AND IMAGING DEVICE

IRISO ELECTRONICS CO., LT...

1. An electronic component comprising:a housing accommodating an imaging component including a board having a first contact portion and a second contact portion; and
an external device connection portion conductively connecting the imaging component to an external device,
wherein the external device connection portion includes a first rod-shaped contact piece that conductively contacts the first contact portion, a conductive first elastic member that urges the first rod-shaped contact piece toward the first contact portion, a dielectric that is formed in a tubular shape and has an accommodation hole accommodating the first rod-shaped contact piece and the first elastic member displaceably in the hole axis direction, and an external conductor that is formed in a tubular shape and holds the outer periphery of the dielectric.

US Pat. No. 10,193,250

SUBSTRATE AND TERMINALS FOR POWER MODULE AND POWER MODULE INCLUDING THE SAME

Samsung Electronics Co., ...

1. A substrate for a power module, comprising:a first part, a second part, and a third part on a same surface of an underlying part of the substrate, wherein
the first part, the second part, and the third part are spaced apart from each other, electrically insulated from each other, and not directly contacting each other,
the third part surrounds the first part and the second part,
the third part is a continuous structure,
a first element module is on the third part,
all of the first part, the second part, and the third part are conductive,
the third part defines an opening over the same surface of the underlying part of the substrate,
the first part and the second part are in the opening defined by the third part,
the opening is between a first region of the third part and a second region of the third part,
the first region of the third part and the second region of the third part are spaced apart from each other in a first direction,
the first region of the third part includes a control pin installation region or an output terminal installation region, and
a width of the first region of the third part in the first direction is different than a width of the second region of the third part in the first direction.

US Pat. No. 10,193,249

CONNECTOR COMPONENT AND RETENTION MECHANISM FOR M.2 FORM FACTOR MODULE

Hewlett-Packard Developme...

1. A connector system, comprising:a connector component including a first connector portion and a second connector portion, the first connector portion comprising a plurality of contacts to couple with a printed circuit board, and the second connector portion comprising a plurality of contacts to couple with a first end of a M.2 form factor module; and
a retention mechanism mounted on a system component, the retention mechanism to retain a second end of the M.2 form factor module, the retention mechanism positioned directly above the connector component along an axis that extends perpendicularly from a planar surface of the printed circuit board, wherein the system component is fixedly coupled directly to the printed circuit board, wherein the retention mechanism comprises at least one selected from an attachment screw and a retaining post;
wherein the second connector portion is to receive the M.2 form factor module in an upright orientation such that neither a front surface nor a rear surface of the M.2 form factor module substantially faces the planar surface of the printed circuit board,
wherein the system component is adjacent to the connector component on the printed circuit board;
wherein the system component is a power supply.

US Pat. No. 10,193,248

SYSTEM AND METHOD FOR RETAINING MEMORY MODULES

Crystal Group, Inc., Hia...

1. A system for reducing inadvertent disconnection of memory modules during operation in harsh environments comprising:a plurality of disconnection protected systems arranged in a parallel array; wherein each of said plurality of disconnection protected systems comprises:
a DIMM connector 120;
a DIMM memory module 110, having a memory module top edge 108;
a retention clip 200 having:
a retention clip central portion 208, having a retention clip first end 202 and retention clip second end 204;
a retention clip first angled portion 212 and retention clip second angled portion 214 disposed on opposing ends of said retention clip central portion 208;
a retention clip first latch engaging end 222 and a retention clip second latch engaging end 224 disposed on said retention clip first angled portion 212 and retention clip second angled portion 214, respectively;
said retention clip central portion 208 having a retention clip central portion top side 209 and a retention clip central portion bottom side 207, which has a retention clip bottom side top edge receiving groove 203 disposed therein, which is configured to receive therein said memory module top edge 108;
a plurality of retention clip first face bumper spacers 206;
a plurality of retention clip second face bumper spacers 205;
a retention clip first latch engaging tab 232 disposed on an interior side of said retention clip first latch engaging end 222;
a retention clip second latch engaging tab 234 disposed on an interior side said retention clip second latch engaging end 224 facing said retention clip first latch engaging tab 232; and
wherein said array is spatially configured such that each retention clip 200 in said plurality of disconnection protected systems has at least one of said plurality of retention clip first face bumper spacers 206 and said plurality of retention clip second face bumper spacers 205 thereon in contact with one of said plurality of retention clip first face bumper spacers 206 and said plurality of retention clip second face bumper spacers 205 of another retention clip 200 of said plurality of disconnection protection systems.

US Pat. No. 10,193,247

ELECTRICAL CONTACT SPRING WITH EXTENSIONS

Lear Corporation, Southf...

1. An electrical terminal assembly comprising:a contact member including a contact base that defines an interior space and a plurality of contact arms that extends from the contact base in an arm direction; and
a spring member supported on the contact member and including a spring base that extends through the interior space, a plurality of spring arms that extends from the spring base in the arm direction and engages the plurality of contact arms, a shroud that extends in the arm direction around and beyond the contact arms, and a shroud extension that extends from the shroud opposite the arm direction and engages the contact base.

US Pat. No. 10,193,246

MULTIPURPOSE SOCKET FOR ELECTRICAL UTILITY REPAIR APPLICATION

1. A socket for engaging a bolt of a hot line clamp, the socket comprising:a socket comprising a cylindrical socket body having an open top end and an open bottom end, the open bottom end having a square inner surface for mating with a drill;
two upwardly protruding diametrically-opposed protuberances for straddling and mating with an eyelet of a hot line clamp, the eyelet sharing a common axis with the socket;
wherein the socket is adapted to rotate axially to tighten a line clamp.

US Pat. No. 10,193,245

CONDUCTOR TERMINAL AND METHOD FOR MOUNTING THE SAME

WAGO Verwaltungsgesellsch...

1. A conductor terminal comprising:at least one insulating-material housing;
at least one contact insert arranged at least partially in the insulating-material housing and having at least one contact piece and at least one clamping spring, the contact piece, together with the clamping spring, forms at least one conductor clamping point for an electrical conductor to be contacted via the conductor terminal, the electrical conductor being adapted to be acted upon at the conductor clamping point by a spring force of the clamping spring;
at least one actuating lever pivotably supported in the insulating-material housing for actuating the clamping spring, the actuating lever being adapted to be pivoted from a closed position into an open position and vice versa relative to the insulating-material housing and/or the contact piece,
wherein the electrical conductor inserted into the conductor terminal is not acted upon by the spring force of the clamping spring at the conductor clamping point at least in the open position,
wherein the actuating lever is supported in a floating manner and is supported at least partially on the contact piece at least in the open position,
wherein the actuating lever is supported on an upper section of the contact piece, and
wherein a conductor reception chamber, for receiving the electrical conductor to be contacted, is arranged between the upper section and a contact point of the contact piece, wherein at the contact point, the conductor clamping point is formed together with an end region of the clamping spring.