US Pat. No. 10,460,792

SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY (SDRAM) AND MEMORY CONTROLLER DEVICE MOUNTED IN SINGLE SYSTEM IN PACKAGE (SIP)

Renesas Electronics Corpo...

1. An electronic device comprising:a first semiconductor memory device having a plurality of data terminals including a first data terminal and a second data terminal, and configured to store data input from the plurality of the data terminals;
a semiconductor device comprising a controller and configured to access the data stored in the first semiconductor memory device; and
a wiring substrate on which the semiconductor device and the first semiconductor memory device are mounted,
wherein the wiring substrate comprise:
a build-up layer comprising a first wiring layer, a second wiring layer and, simultaneously, a plurality of ground planes forming respective layers of the wiring substrate;
a first data wiring electrically connecting the semiconductor device with the first data terminal through the first wiring layer; and
a second data wiring electrically connecting the semiconductor device with the second data terminal through the second wiring layer,
wherein the first wiring layer is a wiring layer arranged closer to the semiconductor device than the second wiring layer,
wherein the first data terminal is located farther from the semiconductor device than the second data terminal, and
wherein the semiconductor device and the first semiconductor memory device are mounted on the wiring substrate in a thickness direction of the wiring substrate; and
wherein the first wiring layer is arranged closer to the semiconductor device than the second wiring layer in the thickness direction of the wiring substrate.

US Pat. No. 10,460,791

SYSTEMS AND METHODS FOR GENERATING STAGGER DELAYS IN MEMORY DEVICES

Micron Technology, Inc., ...

7. A method, comprising:receiving, via a circuit, a current signal that corresponds to data to be written or read via one or more memory banks;
transmit, via the circuit, a first gate signal to a first set of switches configured to couple a voltage source to an output buffer, wherein the output buffer is configured to couple to the one or more memory banks in response to the strength of the current signal being above a first threshold;
transmit, via the circuit, a second gate signal to a second set of switches configured to couple the voltage source to the output buffer in response to the strength of the current signal being below the first threshold; and
transmit, via the circuit, a third gate signal to a third set of switches configured to couple the voltage source to the output buffer in response to the strength being below a second threshold.

US Pat. No. 10,460,790

DETECTING CIRCUIT, DRAM, AND METHOD FOR DETERMINING A REFRESH FREQUENCY FOR A DELAY-LOCKED LOOP MODULE

NANYA TECHNOLOGY CORPORAT...

1. A detecting circuit, comprising:a delay-locked loop module configured to maintain a timing relationship between a clock signal and a reference signal;
a clock tree module coupled to the delay-locked loop module; and
a voltage-detecting module coupled between the delay-locked loop module and the clock tree module and configured to detect a voltage difference between the clock tree module and a reference voltage.

US Pat. No. 10,460,789

METHODS OF READING AND WRITING DATA IN A THYRISTOR RANDOM ACCESS MEMORY

TC Lab, Inc., Gilroy, CA...

1. A method of operating a volatile memory array having anodes coupled to anode lines and having cathodes coupled to cathode lines, the method to program a selected thyristor ‘on’ comprising performing steps of:applying to the anode line to which the selected thyristor is connected a positive potential;
applying to the cathode line to which the selected thyristor is connected a lower potential, the difference between the positive potential and the lower potential being greater than a potential difference to turn on the thyristor;
applying to the anode lines to which all other thyristors except the selected thyristor are connected a first potential;
applying to the cathode lines to which all thyristors other than the selected thyristor are connected a second potential, the difference between the first potential and the second potential being smaller than a potential difference to turn on or off any of the non-selected thyristors.

US Pat. No. 10,460,788

MEMORY CELL AND METHODS THEREOF

FERROELECTRIC MEMORY GMBH...

1. A memory cell, comprising:a channel region;
a gate isolation structure disposed over the channel region, wherein the gate isolation structure has a planar shape;
a first electrode structure disposed over the gate isolation structure, wherein the first electrode structure has a concave shape;
at least one remanent-polarizable layer disposed over the first electrode structure, wherein the at least one remanent-polarizable layer has a concave shape;
a second electrode structure disposed over the at least one remanent-polarizable layer;
wherein the gate isolation structure and the first electrode structure form a first lateral interface,
wherein the first electrode structure and the at least one remanent-polarizable layer form a second lateral interface,
wherein a lateral dimension of the second lateral interface is less than a lateral dimension of the first lateral interface, and
wherein a width of the first electrode structure is substantially the same as a width of the gate isolation structure.

US Pat. No. 10,460,787

SELECTION CIRCUIT USABLE WITH FERROELECTRIC MEMORY

Palo Alto Research Center...

10. A memory circuit, comprising:a plurality of ferroelectric memory cells, each ferroelectric memory cell coupled to one of a plurality of word lines and one of a plurality of bit lines;
a plurality of selection circuits between a source signal and the respective plurality of word lines, each of the selection circuits comprising:
a first thin-film transistor (TFT) that communicatively couples the word line to the source signal in response to a selection signal applied to a first gate of the first TFT, the word line used to enable and disable the respective ferroelectric memory cells coupled to the word line; and
a second TFT that communicatively decouples the word line from a ground in response to the selection signal being applied to a second gate of the second TFT, the first and second gates being connected together to a line that provides the selection signal.

US Pat. No. 10,460,786

SYSTEMS AND METHODS FOR REDUCING WRITE ERROR RATE IN MAGNETOELECTRIC RANDOM ACCESS MEMORY THROUGH PULSE SHARPENING AND REVERSE PULSE SCHEMES

Inston, Inc., Santa Moni...

1. A method for a writing mechanism for a magnetoelectric random access memory cell, the method comprising:applying a voltage of a given polarity for a period of time across a magnetoelectric junction bit of the magnetoelectric random access memory cell, wherein:
the magnetoelectric junction bit comprises:
a ferromagnetic free layer,
a ferromagnetic fixed layer, and
a dielectric layer interposed between the ferromagnetic free layer and the ferromagnetic fixed layer;
application of the voltage of the given polarity across the magnetoelectric junction bit reduces the perpendicular magnetic anisotropy and magnetic coercivity of the ferromagnetic free layer through a voltage controlled magnetic anisotropy effect;
the magnetization of the ferromagnetic free layer changes direction in response to the application of the voltage of the given polarity; and
applying a voltage of a polarity opposite the given polarity across the magnetoelectric junction bit at the end of the application of the voltage of the given polarity.

US Pat. No. 10,460,785

PARALLEL WRITE SCHEME UTILIZING SPIN HALL EFFECT-ASSISTED SPIN TRANSFER TORQUE RANDOM ACCESS MEMORY

QUALCOMM Incorporated, S...

1. An apparatus comprising:a magnetoresistive random access memory (MRAM), comprising:
a heavy metal layer coupled to a source line; and
a plurality of bit cells coupled to a word line, and a plurality of bit lines, and the heavy metal layer, such that the heavy metal layer is a continuous layer coupling the bit cells to the source line, wherein each of the bit cells comprises a magnetic tunnel junction (MTJ) and a transistor, a gate of the transistor being coupled to the word line, and at least one of a source or a drain of the transistor being coupled to the MTJ or at least one of the bit lines; and
a controller coupled to the MRAM and configured to:
apply a first voltage to at least a portion of the heavy metal layer and a second voltage lower than the first voltage at another portion of the heavy metal layer during a first phase; and
apply a third voltage to the heavy metal layer during a second phase, the third voltage being between the first voltage and the second voltage.

US Pat. No. 10,460,784

MAGNETIC MEMORY AND MEMORY SYSTEM

Kabushiki Kaisha Toshiba,...

1. A magnetic memory comprising:a memory cell including a first magnetoresistive effect element;
a reference circuit including a second magnetoresistive effect element having a first resistance state and a third magnetoresistive effect element having a second resistance state; and
a read circuit configured to read data in the memory cell based on a first signal based on an output from the memory cell and a second signal based on an output from the reference circuit,
wherein at a time of reading of the data,
a first voltage is applied to the first magnetoresistive effect element, and
a second voltage higher than the first voltage is applied to the second magnetoresistive effect element and the third magnetoresistive effect element.

US Pat. No. 10,460,783

MAGNETIC STORAGE DEVICE

Toshiba Memory Corporatio...

1. A magnetic storage device comprising:a magnetic wire including a linear magnetic body having first and second magnetic domains whose magnetization directions are variable;
a magnetoresistance element having a first resistance according to the magnetization direction of the first magnetic domain or a second resistance according to the magnetization direction of the second magnetic domain; and
a read circuit that compares the first resistance of the magnetoresistance element with the second resistance of the magnetoresistance element,
wherein the read circuit outputs first data when the first resistance and the second resistance correspond to the same low or high resistance state and outputs second data when the first resistance and the second resistance correspond to different low/high resistance states.

US Pat. No. 10,460,782

INTEGRATED CIRCUITS HAVING SINGLE STATE MEMORY REFERENCE CELLS AND METHODS FOR OPERATING THE SAME

GLOBALFOUNDARIES INC., G...

19. An integrated circuit comprising:a plurality of operational magneto-resistive random access memory (MRAM) cells arranged in an array of rows and columns; and
a plurality of read circuits, wherein each read circuit is associated with a respective MRAM cell and comprises:
an operational power supply node coupled to an operational ground node by an operational bit line, wherein each respective operational MRAM cell is coupled to the operational bit line between the operational power supply node and the operational ground node;
a reference power supply node coupled to a reference ground node by a reference bit line, wherein the reference power supply node is independent of the operational power supply node to apply a constant operational bias current to the operational bit line while a reference bias current is applied to the reference bit line and is scanned from an initial value through intermediate values to an end value;
a reference memory cell coupled to the reference bit line between the reference power supply node and the reference ground node; and
a sense amplifier coupled to the operational bit line between the operational power supply node and the selected operational memory cell and coupled to the reference bit line between the reference power supply node and the reference memory cell.

US Pat. No. 10,460,781

MEMORY DEVICE WITH A DUAL Y-MULTIPLEXER STRUCTURE FOR PERFORMING TWO SIMULTANEOUS OPERATIONS ON THE SAME ROW OF A MEMORY BANK

Spin Memory, Inc., Fremo...

1. A memory device for storing data, the memory device comprising:a memory bank comprising a memory array of addressable memory cells;
a pipeline configured to process read and write operations addressed to said memory bank;
an x decoder circuit coupled to said memory array for decoding an x portion of a memory address for said memory array; and
a y multiplexer circuit coupled to said memory array and operable to simultaneously multiplex across said memory array based on two y portions of memory addresses and, based thereon with said x portion, for simultaneously writing a value and reading a value associated with two separate memory cells of said memory array, and
wherein said x decoder and said y multiplexer are implemented to provide a read port and a write port which are operable to simultaneously operate with respect to said memory array.

US Pat. No. 10,460,780

MAGNETO-RESISTIVE RANDOM ACCESS MEMORY (MRAM) EMPLOYING AN INTEGRATED PHYSICALLY UNCLONABLE FUNCTION (PUF) MEMORY

QUALCOMM Incorporated, S...

1. A memory access circuit for controlling a physically unclonable function (PUF) operation accessing magneto-resistive magnetic random access memory (MRAM) bit cells in an MRAM array comprising an MRAM data array comprising at least one MRAM bit cell row circuit of data MRAM bit cells and an MRAM PUF array comprising at least one MRAM bit cell row circuit of PUF MRAM bit cells, the memory access circuit comprising:a write driver circuit configured to generate a reference write signal to program at least one PUF MRAM bit cell in at least one MRAM bit cell column circuit to a reference memory state, in response to a PUF write operation selecting an MRAM bit cell row circuit to be written in the MRAM PUF array;
a reference write driver circuit configured to generate a second reference write signal to program at least one reference MRAM bit cell in at least one reference MRAM bit cell column circuit to the reference memory state, in response to the PUF write operation selecting the MRAM bit cell row circuit to be written in the MRAM PUF array;
a data output circuit configured to, in response to a PUF read operation selecting an MRAM bit cell row circuit of PUF MRAM bit cells to be read:
receive a PUF data signal representing a resistance of the at least one PUF MRAM bit cell in the at least one MRAM bit cell column circuit for the selected MRAM bit cell row circuit for the PUF read operation;
receive a reference signal representing a resistance of the at least one reference MRAM bit cell in the at least one reference MRAM bit cell column circuit for the selected MRAM bit cell row circuit for the PUF read operation;
compare the PUF data signal to the reference signal; and
generate a PUF output based on a difference between the PUF data signal and the reference signal.

US Pat. No. 10,460,779

MRAM REFERENCE CELL WITH SHAPE ANISOTROPY TO ESTABLISH A WELL-DEFINED MAGNETIZATION ORIENTATION BETWEEN A REFERENCE LAYER AND A STORAGE LAYER

CROCUS TECHNOLOGY INC., ...

1. An apparatus, comprising:a reference magnetic tunnel junction to produce a reference signal, the reference magnetic tunnel junction with a high aspect ratio including a reference layer in an annealed state to establish permanent magnetization along a minor axis and a storage layer with magnetization along a major axis, wherein the storage layer magnetization is substantially perpendicular to the magnetization along the minor axis, the magnetization orientation between the minor axis and the major axis being maintained by shape anisotropy caused by the high aspect ratio.

US Pat. No. 10,460,778

PERPENDICULAR MAGNETIC TUNNEL JUNCTION MEMORY CELLS HAVING SHARED SOURCE CONTACTS

SPIN MEMORY, INC., Fremo...

1. A magnetic device, comprising:a plurality of perpendicular magnetic tunnel junction (p-MTJ) cells, each p-MTJ cell having a transistor and a magnetic tunnel junction (MTJ) sensor, wherein each of the transistors includes a drain terminal, a source terminal, and a gate terminal, wherein each of the p-MTJ cells has a cylindrical shape;
a first common word line coupled to the gate terminal of each transistor in a first subset of the plurality of p-MTJ cells;
a first common bit line coupled to a first end of each MTJ sensor in a second subset of the plurality of p-MTJ cells, wherein a second end of each of the MTJ sensors in the second subset is coupled to the source terminal of each respective transistor in the second subset; and
a first common source line coupled to the drain terminal of each transistor in the first subset.

US Pat. No. 10,460,777

APPARATUSES AND METHODS FOR PROVIDING CONSTANT DQS-DQ DELAY IN A MEMORY DEVICE

Micron Technology, Inc., ...

1. An apparatus, comprising:a first adjustable delay line configured to provide a delay corresponding to a loop delay of a data strobe signal pathway internal to a memory;
a second adjustable delay line included in the data strobe signal pathway; and
a timing control circuit coupled to the first and second adjustable delay lines and configured to adjust a delay of the second adjustable delay line responsive to output from the first adjustable delay line and the data strobe signal pathway;
wherein the timing control circuit comprises:
a phase detector coupled to receive a first input from the first adjustable delay line and a second input from an end of the data strobe signal pathway and to generate an output signal that is indicative of a phase difference between the first and second inputs; and
a shift control logic coupled to receive the output signal of the phase detector and to generate respective shift commands that adjust the first and second adjustable delay lines.

US Pat. No. 10,460,776

SEMICONDUCTOR MEMORY DEVICE AND READING METHOD FOR THE SAME

WINBOND ELECTRONICS CORP....

1. A semiconductor memory device comprising:a column selection circuit selecting n-bit data from data read from a memory cell array according to a column selection signal and outputting the selected n-bit data to an n-bit data bus;
a sensing circuit sensing the n-bit data on the n-bit data bus in response to an activation signal;
an output circuit selecting m-bit data from the n-bit data sensed by the sensing circuit in response to an internal clock signal synchronized with a serial clock signal applied from outside and outputting the selected m-bit data from output terminals; and
a verification circuit comparing the data n-bit sensed by the sensing circuit with the m-bit data output by the output circuit to verify correctness of read-out data,
wherein m is an integer which is equal to 1 or larger than 1 and n?m, and the internal clock signal having n/m cycles is generated in one cycle of the activation signal.

US Pat. No. 10,460,775

ASYNCHRONOUS/SYNCHRONOUS INTERFACE

Micron Technology, Inc., ...

1. An apparatus, comprising:a memory interface including:
a first memory interface contact;
a second memory interface contact;
a third memory interface contact;
a data strobe interface contact and
a complementary data strobe interface contact, wherein the memory interface is configured to:
switchably operate in either an asynchronous mode or a synchronous mode; and operate in the synchronous mode utilizing one additional contact of the memory interface than a quantity of contacts utilized in the asynchronous mode;
receive a first signal on the second memory interface contact as a read enable signal in the asynchronous mode and as a write/read signal in the synchronous mode; and
receive a data strobe signal on the data strobe interface contact and a complementary data strobe signal on the complementary data strobe interface contact in the synchronous mode.

US Pat. No. 10,460,774

APPARATUS AND METHOD CAPABLE OF REMOVING DUPLICATION WRITE OF DATA IN MEMORY

SK hynix Inc., Gyeonggi-...

1. An apparatus for controlling memory, the apparatus comprising:a memory device; and
a controller functionally coupled to the memory device;
a deduplication table for storing compressed data, a physical block address of the memory device in which non-compressed data corresponding to the compressed data has been written and a count value indicative of a write number of the data,
wherein the controller is suitable for:
compressing program data of a logical block address received in a data write operation;
searching for the compressed data in the deduplication table;
if the compressed data is new, writing the program data in the physical block address of the memory device; and
registering a new entry comprising the compressed data and the physical block address with the deduplication table, the compressed data comprising a hash value obtained by a hash algorithm,
wherein the controller is suitable for:
converting the program data with the logical block address into a hash value;
reading data stored in the physical block address of the memory device mapped to a retrieved hash value if the hash value is searched for in the deduplication table;
comparing the program data with the read data;
assigning another physical block address for writing the program data in the memory device if, as a result of the comparison, it is determined that the program data and the read data are different;
writing the program data in the assigned another physical block address of the memory device; and
additionally registering a new entry comprising the hash value and said another physical block address with the deduplication table, and
wherein the controller is suitable for:
selecting the physical block address mapped to a hash value having a greatest counter value if data is searched for in the deduplication table;
reading data written in the physical block address of the memory device;
selecting another physical block address mapped to a hash value having a counter value of next priority if read data is different from the program data; and
reading data written in said another physical block address of the memory device.

US Pat. No. 10,460,773

APPARATUSES AND METHODS FOR CONVERTING A MASK TO AN INDEX

Micron Technology, Inc., ...

1. A system, comprising:a memory device comprising an array of memory cells; and
a processing resource, external to the memory device, and configured to execute a program that uses column indices indicating those columns of the memory array having a particular attribute; and
wherein the memory device is configured to:
load a mask from compute components to periphery sense amplifiers; and
convert set digits of the mask to the column indices, wherein the column indices indicate the columns of the memory array having the particular attribute by performing logical operations using the mask and the compute components and wherein the particular attribute is a data value.

US Pat. No. 10,460,772

SEMICONDUCTOR DEVICE

KABUSHIKI KAISHA TOSHIBA,...

1. A semiconductor device comprising:a control circuit connected to a bus;
a first circuit operating under control of the control circuit;
a bus access detection circuit that detects bus access from the control circuit to the first circuit without going through the bus;
a switch element connected between the first circuit and a power supply; and
a second circuit connected between the first circuit and the bus, the second circuit controlling, when the bus access to the first circuit is detected by the bus access detection circuit, the switch element such that power from the power supply is supplied to the first circuit.

US Pat. No. 10,460,771

SEMICONDUCTOR CHIP MODULE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME

SK hynix Inc., Icheon-si...

1. A semiconductor package comprising:a substrate including a top surface, a bottom surface, an opening which passes through the top surface and the bottom surface, and coupling pads formed over the bottom surface;
a semiconductor chip module including a chip unit including first and second semiconductor chips formed over a single body to be adjacent in a first direction with a scribe line region interposed therebetween, and having a first surface over which bonding pads of the first and second semiconductor chips are positioned and a second surface which faces away from the first surface, a plurality of oblique redistribution lines formed over the first surface, having one set of ends which are respectively electrically coupled to the bonding pads of the first and second semiconductor chips, and extending toward the scribe line region, and a plurality of redistribution pads disposed over the first surface, and electrically coupled with another set of ends of the oblique redistribution lines which face away from the one set of ends, the semiconductor chip module being disposed over the substrate such that the redistribution pads are exposed through the opening; and
conductive coupling members electrically coupling the redistribution pads and the coupling pads through the opening,
the redistribution pads comprising:
one or more shared redistribution pads electrically coupled in common to one or more of the oblique redistribution lines electrically coupled to the bonding pads of the first semiconductor chip and one or more of the oblique redistribution lines electrically coupled to the bonding pads of the second semiconductor chip; and
a plurality of individual redistribution pads individually electrically coupled to the oblique redistribution lines which are not electrically coupled with the shared redistribution pads,
wherein the bonding pads are arranged along a second direction perpendicular to the first direction,
wherein the first and second semiconductor chips are electrically connected each other through the shared redistribution pads and the oblique redistribution lines electrically coupled to the shared redistribution pads,
the oblique redistribution lines are inclined with respective to the first direction.

US Pat. No. 10,460,770

SEMICONDUCTOR MEMORY DEVICE

Toshiba Memory Corporatio...

1. A semiconductor memory device comprising:a substrate;
a control circuit on the substrate, the control circuit comprising a transistor;
a first pad region comprising a pad above the substrate;
n (n is a natural number equal to or larger than 3) interconnect layers above the substrate, the n interconnect layers being located at different levels from the substrate, each of the n interconnect layers comprising an interconnect; and
a first interconnect region between an end of the control circuit and an end of the substrate in a direction of a first axis beside the first pad region in a direction of a second axis, the first interconnect region comprising no transistor, the first interconnect region comprising no contact coupled to the substrate, and the first interconnect region comprising an interconnect extending along the second axis in m (m is a natural number equal to or larger than 3, larger than n/2, and equal to or smaller than n) interconnect layers of the n interconnect layers.

US Pat. No. 10,460,769

MEMORY DEVICE INCLUDING ERROR DETECTION CIRCUIT

SAMSUNG ELECTRONICS CO., ...

1. A memory device comprising:a first memory cell array connected to a first internal data line;
a second memory cell array connected to a second internal data line; and
a line swap circuit configured to connect the first internal data line and the second internal data line with a first external data line and a second external data line based on a driving signal received from the outside,
the line swap circuit being configured such that,
when the driving signal has a first logic level, the line swap circuit connects the first internal data line to the first external data line and the second internal data line to the second external data line, and
when the driving signal has a second logic level different from the first logic level, the line swap circuit swaps the first external data line and the second external data line so that the first internal data line is connected to the second external data line and the second internal data line is connected to the first external data line,
wherein the first external data line and the second external data line respectively output data to the outside through different input/output pads,
wherein the memory device further comprises a test unit configured to detect an error in data output through at least one of the first external data line and the second external data line, and
wherein, the test unit is configured such that, when the driving signal has the first logic level, the test unit,
performs a first test that includes determining whether the data output through the first and second external data lines includes an error,
performs a second test that includes determining whether data output through the swapped first and second external data lines includes an error, and
stores results of the first test and the second test.

US Pat. No. 10,460,768

BASE UNIT AND DISK DRIVE APPARATUS

NIDEC CORPORATION, Kyoto...

1. A base unit for use in a disk drive apparatus in which a gas with a density lower than that of air is sealed in a housing space defined by a base member and a cover fixed to each other, the base unit comprising:the base member that supports a motor rotatable about a central axis extending in a vertical direction; and
a connector electrically connected to a wire in the housing space; wherein the base member includes:
a recessed portion extending in radial directions and recessed upward from a lower surface of the base member; and
a hole extending through the recessed portion in the vertical direction;
the recessed portion includes a recessed portion loop-shaped surface defining a loop-shaped surface in the radial direction;
the connector is located on a lower side of the recessed portion to cover the hole;
an adhesive is located between the connector and the recessed portion; and
a minimum value of a gap distance in the radial direction between an outer end of the connector and an inner end of the recessed portion in which the outer end of the connector and the inner end of the recessed portion are opposed to each other with the adhesive therebetween is greater than a minimum value of a gap in the vertical direction distance between an upper surface of the connector and the recessed portion loop-shaped surface, in which the upper surface of the connector and the recessed portion loop-shaped surface are opposed to each other with the adhesive therebetween; wherein
the adhesive includes a filler; and
the adhesive extends all the way around the hole.

US Pat. No. 10,460,767

BASE MEMBER INCLUDING INFORMATION MARK AND INSULATING COATING LAYER, AND DISK DRIVE APPARATUS INCLUDING THE SAME

NIDEC CORPORATION, Kyoto...

1. A base member structured to define a portion of a casing in which a gas with a density lower than that of air is to be sealed and to support a motor to be housed in the casing, the base member comprising:a base body made of a cast material;
an information mark including casting information and located on a portion of a surface of the base body; and
an insulating coating layer defined on the surface of the base body; wherein
the insulating coating layer covers the information mark; and
the base body includes:
a decreased thickness portion; and
an increased thickness portion with a thickness greater than that of the decreased thickness portion; and
the information mark is located on a surface of the increased thickness portion within the surface of the base body.

US Pat. No. 10,460,766

INTERACTIVE VIDEO PROGRESS BAR USING A MARKUP LANGUAGE

Bank of America Corporati...

1. An interactive video generating device, comprising:a network interface configured to receive video requests; and
a playback engine implemented by a processor operably coupled to the network interface, configured to:
receive a video request comprising:
source scene information for a set of video scenes; and
animation instructions identifying:
a set of elements; and
time durations linked with each element in the set of elements;
assign source scene identifiers for each video scene in the set of video scenes;
assign animation identifiers for each element in the set of elements;
determine a time duration for each animation identifier;
generate a scene timing map, wherein the scene timing map links a source scene identifier with an animation identifier and a time duration for the animation identifier; and
generate a video timing map, wherein the video timing map comprising a set of timestamp entries, wherein each timestamp entry references a source scene identifier and an animation identifier in the scene timing map;
link a progress bar with the video timing map;
generate a video scene in the form of a Hypertext Markup Language (HTML) page based on the source scene information, wherein the video scene comprises an interactive HTML element embedded in the video scene; and
display the progress bar with the video scene.

US Pat. No. 10,460,765

SYSTEMS AND METHODS FOR ADAPTIVE AND RESPONSIVE VIDEO

JBF Interlude 2009 LTD, ...

1. A computer-implemented method comprising:identifying one or more properties associated with a user device;
receiving video from a first video presentation;
receiving, simultaneously with the video from the first video presentation, video from a second, different video presentation;
configuring a first state of the video from the first video presentation based on at least one of the properties associated with the user device;
presenting the video from the first video presentation according to the first state;
providing a mapping of video presentations to media player window height ranges and media player window width ranges; and
during playback of the video from the first video presentation:
determining that a media player window in which the video is playing has been resized to change from first dimensions comprising a first height and a first width to second, different dimensions comprising a second height and a second width;
determining that the second height is included in a particular one of the media player window height ranges;
determining that the second width is included in a particular one of the media player window width ranges;
evaluating the mapping to determine that the second video presentation is mapped to both the particular media player window height range and the particular media player window width range; and
in response to the evaluating, seamlessly transitioning from the video from the first video presentation to the video from the second video presentation based on the change.

US Pat. No. 10,460,764

UTILIZING AUDIO DIGITAL IMPACT TO CREATE DIGITAL MEDIA PRESENTATIONS

Adobe Inc., San Jose, CA...

1. In a digital medium environment for creating digital media presentations, a method of combining and presenting visual and audio media over time, comprising:determining impact values for a plurality of time periods associated with digital audio content based on a change in a measure of energy in the digital audio content between the plurality of time periods;
generating audio interest values by applying a first decaying masking threshold to the determined impact values, the first decaying masking threshold decaying at a first rate;
analyzing the audio interest values generated by the first decaying masking threshold via a second decaying masking threshold to identify transition points, the second decaying masking threshold decaying at a second rate different than the first rate; and
based on the identified transition points, generating a presentation of digital visual content in conjunction with the digital audio content.

US Pat. No. 10,460,763

GENERATING AUDIO LOOPS FROM AN AUDIO TRACK

Adobe Inc., San Jose, CA...

1. In a digital media environment comprising pre-recorded electronic audio tracks, a computer-implemented method of generating audio loops, comprising:identifying, by at least one processor of a client device, a plurality of portions of an audio track, wherein each portion of the plurality of portions is a possible audio loop comprising a common beginning beat, and each portion of the plurality of portions comprises a different number of beats;
determining, by the at least one processor, a score for each portion of the plurality of portions of the audio track by determining a similarity of an audio profile of the beginning beat and an audio profile of an ending beat of each portion;
selecting a portion of the audio track from the plurality of portions of the audio track based on the determined score for each portion; and
generating, by the at least one processor, an audio loop using the selected portion of the audio track.

US Pat. No. 10,460,762

CANCELLING ADJACENT TRACK INTERFERENCE SIGNAL WITH DIFFERENT DATA RATE

Seagate Technology LLC, ...

1. An apparatus comprising:a circuit configured to:
receive first underlying data corresponding to a first signal with a first rate;
receive a second signal with a second rate corresponding to second underlying data;
interpolate the first underlying data to generate a plurality of interpolated signals;
determine, for the first signal, a first channel pulse response shape with the first rate;
determine an interference component signal based on the plurality of interpolated signals and the first channel pulse response shape; and
cancel interference in the second signal using the interference component signal to generate a cleaned signal.

US Pat. No. 10,460,761

DEFECT REGISTRATION METHOD

Kabushiki Kaisha Toshiba,...

1. A defect registration method comprising:measuring, on a unit-area basis, performance of a storage area of a magnetic disk including a plurality of unit areas, the storage area including a redundant area of a set capacity;
performing first extracting of unit areas up to the set capacity from the plurality of unit areas; and
registering the extracted unit areas of the set capacity as defect locations, wherein
the first extracting includes second extracting one or more unit areas in order of increasing the performance.

US Pat. No. 10,460,760

SHINGLED MAGNETIC RECORDING STORAGE SYSTEM

SEAGATE TECHNOLOGY LLC, ...

1. A method comprising:determining that an off-track write has occurred during writing data to a shingled magnetic recording (SMR) band in a storage device;
identifying unsafe written data in response to determining that the off-track write has occurred;
determining that caching space is available upon identifying the unsafe written data;
continue writing data to the SMR band without a write retry upon determining that caching space is available; and
caching exclusively the unsafe written data to the determined available caching space.

US Pat. No. 10,460,759

PARTIAL UPDATES FOR SHINGLED MAGNETIC RECORDING DEVICES

Amazon Technologies, Inc....

1. A system for performing a partial write pointer update for a shingled magnetic recording (SMR) zone of a storage device, the system comprising:the storage device, wherein the storage device comprises a storage device controller configured to:
receive a command from a host computer to update a write pointer for the SMR zone,
locate the write pointer for the SMR zone, and
set the write pointer to identify a write position after the beginning of the SMR zone without writing user data to the SMR zone, and
the host computer, wherein the host computer is connected to the storage device and is configured to:
receive a request to store data in the storage device;
transmit the command to the storage device via the connection, responsive to receipt of the request; and
transmit a separate command to the storage device to write the data at the write position identified by the write pointer of the SMR zone.

US Pat. No. 10,460,758

DISK CLAMPING MECHANISM INCLUDING ANNULAR RING MEMBER

Seagate Technology LLC, ...

1. A disk drive assembly comprising:a spindle motor comprising a hub and a central axis;
a disk stack comprising at least one disk, each disk comprising a central opening positioned on the hub and concentric about the central axis;
an annular ring member concentric about the central axis, the annular ring member comprising:
a first portion and a second portion extending from an apex at their respective proximal ends, the first portion and second portion each comprising a distal end spaced from its proximal end;
wherein the annular ring member is positioned so that the apex is closer than the distal ends of the first and second portions to an outer surface of the hub; and
wherein the first portion of the ring member is in contact with an outer surface of a top disk of the disk stack; and
a disk clamp ring screw adjacent to and in contact with a second portion of the annular ring member, wherein the disk clamp ring screw provides a clamping force that at least partially compresses the second portion of the annular ring member toward the first portion of the annular ring member and toward the top disk of the disk stack.

US Pat. No. 10,460,757

MANAGEMENT OF HEAD AND MEDIA DIMENSIONAL STABILITY

International Business Ma...

1. A method for characterizing a magnetic recording tape of a tape cartridge, the method comprising:measuring, using a magnetic head having servo readers of known pitch, a servo band difference at various locations along a length of a magnetic recording tape of a tape cartridge; and
storing the servo band difference measurements and/or derivatives thereof in association with the tape cartridge.

US Pat. No. 10,460,756

MAGNETIC TAPE DEVICE AND HEAD TRACKING SERVO METHOD EMPLOYING TMR ELEMENT SERVO HEAD AND MAGNETIC TAPE WITH CHARACTERIZED MAGNETIC LAYER

FUJIFILM Corporation, To...

1. A magnetic tape device comprising:a magnetic tape; and
a servo head,
wherein the servo head is a magnetic head including a tunnel magnetoresistance effect type element as a servo pattern reading element,
the magnetic tape includes a non-magnetic support, and a magnetic layer including ferromagnetic powder and a binding agent on the non-magnetic support,
the magnetic layer includes a servo pattern,
a center line average surface roughness Ra measured regarding a surface of the magnetic layer is equal to or smaller than 2.0 nm,
a logarithmic decrement acquired by a pendulum viscoelasticity test performed regarding the surface of the magnetic layer is equal to or smaller than 0.050, and
?SFD in a longitudinal direction of the magnetic tape calculated by Expression 1 is equal to or smaller than 0.50,
?SFD=SFD25° C.?SFD?190° C.  Expression 1
in Expression 1, the SFD25° C. is a switching field distribution SFD measured in a longitudinal direction of the magnetic tape at a temperature of 25° C., and the SFD?190° C. is a switching field distribution SFD measured in a longitudinal direction of the magnetic tape at a temperature of ?190° C.

US Pat. No. 10,460,755

PERPENDICULAR RECORDING MEDIUM WITH OXIDE GRADIENT LAYER

Seagate Technology LLC, ...

1. An apparatus comprising:a substrate;
a recording layer supported by the substrate and comprising a granular magnetic recording layer, a continuous magnetic recording layer, and an oxide gradient layer, the granular magnetic recording layer comprising a first material having a first oxide content, and the oxide gradient layer disposed between the respective granular magnetic recording layer and the continuous magnetic recording layer, the oxide gradient layer comprising a third material having a second oxide content that is greater than zero and less than the first oxide content; and
a non-magnetic grain boundary continuously extending from the granular magnetic recording layer through the oxide gradient layer into, but not completely through, the continuous magnetic recording layer, the continuous magnetic recording layer comprising a second material having nominally no oxide content other than the non-magnetic grain boundary.

US Pat. No. 10,460,754

SLIDER AND SUSPENSION ARM INTERCONNECTION FOR MAGNETIC STORAGE DEVICE

WESTERN DIGITAL TECHNOLOG...

1. A magnetic storage device, comprising:a magnetic disk;
a carriage arm rotatably movable relative to the magnetic disk;
a suspension arm co-movably fixed to the carriage arm, wherein the suspension arm comprises:
a slider attachment side; and
at least one first electrical contact pad on the slider attachment side;
a slider co-movably fixed to the suspension arm, wherein the slider comprises:
a suspension attachment side;
a non-head side facing the suspension arm and intersecting the suspension attachment side at a first slider edge of the slider;
a head side facing away from the suspension arm; and
at least one electrical contact component on the suspension attachment side up to the first slider edge, wherein the at least one electrical contact component comprises a first region, a second region, and a deformation region, and wherein the first region is narrower and nearer to the first slider edge than the second region and the deformation region is formed by lateral deformation of the first region along the first slider edge;
at least one solder weldment directly coupled to the at least one first electrical contact pad and the at least one electrical contact component; and
a read-write head coupled to the head side of the slider.

US Pat. No. 10,460,753

HELIUM DRIVE PIVOT DESIGN TO REDUCE COVER SCREW TENSION INDUCED TORQUE AND STIFFNESS CHANGES

Seagate Technology LLC, ...

1. A disk drive comprising:a disk drive base comprising a lower portion and a base post extending upwardly from the lower portion;
a rotatable spindle attached to the disk drive base; and
a head actuator pivotally attached to the disk drive base, the head actuator comprising:
an actuator body having a bore therein; and
an actuator pivot bearing disposed at least partially within the bore, the actuator pivot bearing comprising a cover attachment member at least partially engaged within a distal end portion of the base post.

US Pat. No. 10,460,752

SPIN-TORQUE OSCILLATOR WITH MULTILAYER SEED LAYER BETWEEN THE WRITE POLE AND THE FREE LAYER IN A MAGNETIC RECORDING WRITE HEAD

WESTERN DIGITAL TECHNOLOG...

1. A spin torque oscillator (STO) comprising:a first electrically conductive electrode formed of a ferromagnetic material;
a ferromagnetic free layer;
a nonmagnetic electrically conductive seed layer between the first electrode and the free layer, wherein the seed layer comprises a first layer selected from one or more films selected from one or more of Cu, Cr, Ta, Ru, Hf and Nb adjacent the first electrode, a second layer selected from one or more films of one or more of Cu, Cr, Ta, Ru, Hf, Nb and NiAl adjacent the free layer, and an intermediate layer between said first and second layers and selected from Mn and an alloy of Mn and one or more of Ir, Pt, Ni, Fe, Pd, Rh, Cu, Ta, Cr, Ru, Hf and Nb;
a ferromagnetic polarizer;
a nonmagnetic spacer layer between the free layer and the polarizer, wherein the free layer is located between the write pole and the polarizer;
a second electrically conductive electrode; and
electrical circuitry connected to the first and second electrodes.

US Pat. No. 10,460,751

STRIPE HEIGHT LAPPING CONTROL STRUCTURES FOR A MULTIPLE SENSOR ARRAY

WESTERN DIGITAL (FREMONT)...

1. A magnetic read transducer comprising:a first read sensor;
a second read sensor;
a third read sensor;
a first electronic lapping guide associated with the first read sensor to control a stripe height of the first read sensor;
a second electronic lapping guide associated with the second read sensor to control the stripe height of the second read sensor; and
a third electronic lapping guide associated with the third read sensor to control the stripe height of the third read sensor,
wherein the first electronic lapping guide is connected to a common ground connector, and wherein the third electronic lapping guide is connected to a common pad.

US Pat. No. 10,460,750

PLATING BASED PRE-DEFINED SIDE SHIELD AND APPLICATION IN MAGNETIC HEAD

SanDisk Technologies LLC,...

1. A magnetic recording head having an air bearing surface (ABS), comprising:a main pole;
a side shield laterally spaced from the main pole by a first side gap and a second side gap;
an electrically conductive non-magnetic gap material layer disposed between the main pole and the side shield in the first side gap; and
a dielectric non-magnetic gap material matrix and a conformal dielectric spacer layer disposed between the main pole and the side shield in the second side gap.

US Pat. No. 10,460,749

VOICE ACTIVITY DETECTION USING VOCAL TRACT AREA INFORMATION

NUVOTON TECHNOLOGY CORPOR...

1. A voice activity detection (VAD) system, comprising:a microphone interface circuit configured for coupling to a microphone to receive an acoustic signal and to convert the acoustic signal to an analog signal;
an analog-to-digital converter configured to receive the analog signal to generate a digital signal; and
a signal processing circuit configured to receive the digital signal and to determine if the digital signal represents a human voice, wherein the signal processing circuit comprises:
an acoustic-energy-based detection module configured to receive one of the analog signal or the digital signal and to provide a sound activity decision that indicates if the acoustic signal is in an audible energy range;
an area-function-based detection module configured to extract features of the acoustic signal from the digital signal based on area-related functions, and to use a machine-learning method to determine an area-based decision that indicates if the acoustic signal represents a human voice, wherein the machine-learning method comprises a plurality of coefficients trained by a plurality of labeled area-related functions; and
a voice activity detection (VAD) decision module configured to make a final VAD decision based on the sound activity decision from the acoustic-energy-based detection module and the area-based decision from the area-function-based detection module; and
a resource-limited device configured to receive the final VAD decision to change an operating mode of the resource-limited device.

US Pat. No. 10,460,748

CONVERSATIONAL INTERFACE DETERMINING LEXICAL PERSONALITY SCORE FOR RESPONSE GENERATION WITH SYNONYM REPLACEMENT

The Toronto-Dominion Bank...

16. A computerized method performed by one or more processors, the method comprising:receiving, via a communications module, a first signal including a conversational input received via interactions with a conversational interface;
analyzing the received conversational input via a natural language processing engine to determine an intent of the received conversational input and a lexical personality score of the received conversational input, the determined intent and the determined lexical personality score based on characteristics included within the received conversational input, wherein the determined lexical personality score includes at least a first score representing a formality score and a second score representing a politeness score of the received conversational input, wherein the formality score and the politeness score represent respective measures determined based on the characteristics included within the received conversational input;
determining a set of response content responsive to the determined intent of the received conversational input, the determined set of response content including a set of initial tokens representing an initial response to the received conversational input, wherein the initial response to the received conversational input corresponds to a default lexical personality score;
identifying a set of synonym tokens associated with at least some of the set of initial tokens, wherein each of the set of synonym tokens are associated with at least a corresponding formality score and a politeness score;
determining, from the identified set of synonym tokens, at least one synonym token associated with a lexical personality score similar to the determined formality score and politeness score of the received conversational input;
replacing at least one token from the set of initial tokens included in the determined set of response content with the at least one determined synonym token corresponding to the determined formality score and politeness score of the received conversational input to generate a modified version of the set of response content; and
transmitting, in response to the received first signal and via the communications module, a second signal including the modified version of the set of response content to a device associated with the received conversational input.

US Pat. No. 10,460,747

FREQUENCY BASED AUDIO ANALYSIS USING NEURAL NETWORKS

Google LLC, Mountain Vie...

1. A method for training a neural network that includes a plurality of neural network layers on training data,wherein the neural network is configured to receive linear scale frequency domain features of an audio sample and to process the frequency domain features to generate a neural network output for the audio sample,
wherein the neural network comprises (i) an input convolutional layer that is configured to map linear scale frequency domain features to logarithmic scaled frequency domain features, wherein the mapping from linear scale frequency domain features to logarithmic scaled frequency domain features is defined by one or more convolutional layer filters of the input convolutional layer, and (ii) one or more other neural network layers having respective layer parameters that are configured to process the logarithmic scaled frequency domain features to generate the neural network output, and
wherein the method comprises:
obtaining training data comprising, for each of a plurality of training audio samples, linear scale frequency domain features of the training audio sample and a known output for the training audio sample; and
training the neural network on the training data to adjust the values of the parameters of the other neural network layers and to adjust the one or more convolutional layer filters that define the mapping from linear scale frequency domain features to logarithmic scaled frequency domain features to determine an optimal logarithmic convolutional mapping of linear scale frequency domain features to logarithmic-scaled frequency domain features.

US Pat. No. 10,460,746

SYSTEM, METHOD, AND DEVICE FOR REAL-TIME LANGUAGE DETECTION AND REAL-TIME LANGUAGE HEAT-MAP DATA STRUCTURE CREATION AND/OR MODIFICATION

MOTOROLA SOLUTIONS, INC.,...

1. A method of real-time language detection and language heat map data structure modification, the method comprising:receiving, at an electronic computing device from a first electronic audio source, first audio content;
identifying, by the electronic computing device, a first geographic location of the first audio content as one of a location of the first electronic audio source and a sound localization process calculated as a function of the location of the first electronic audio source;
determining, by the electronic computing device, that the first audio content includes first speech audio;
identifying, by the electronic computing device from the first audio content, a first language in which the first speech audio is spoken and creating a first association between the first geographic location and the first language;
accessing, by the electronic computing device, a real-time language heat-map data structure including at least a second association between the first geographical location and a second language different from the first language;
modifying, by the electronic computing device based on the first audio content, the real-time language heat-map data structure to include the created first association;
taking a further action, by the electronic computing device, as a function of the modified real-time language heat-map data structure comprising at least one of: (i) electronically displaying at least a modified portion of the modified real-time language heat-map data structure at an electronic display coupled to the electronic computing device, (ii) transmitting at least the modified portion of the modified real-time language heat-map data structure to another electronic computing device for further processing, (iii) electronically transmitting a dispatch instruction to a user having a skill or a need in the first language to the first geographic location, and (iv) electronically transmitting a notification to a user having a skill or a need in the first language including identifying the first geographic location and the first language;
identifying a time and/or date associated with receipt of the first audio content; and
modifying a historical language heat-map data structure associated with the time and/or date to include the first association, wherein the historical language heat-map data structure includes a plurality of associations across sequential times and/or dates that track a particular language cluster as it moves across a geographic region.

US Pat. No. 10,460,745

AUDIO CONTENT SEGMENTATION METHOD AND APPARATUS

HUAWEI TECHNOLOGIES CO., ...

1. A method implemented by a server for segmenting audio content, the method comprising:receiving, by the server, a segmentation location message from a user equipment (UE), wherein the segmentation location message includes at least one piece of first segmentation location information of audio content and an audio identifier of the audio content, wherein the at least one piece of first segmentation location information indicates a selected time piece of the audio content;
identifying, by the server and based on the audio identifier of the audio content, at least one piece of second segmentation location information having an audio identifier that matches the audio identifier of the audio content;
determining, by the server, at least one piece of target segmentation location information based on the at least one piece of first segmentation location information;
determining, by the server, at least one piece of reference segmentation location information based on the at least one piece of first segmentation location information and the at least one piece of second segmentation location information;
if a difference between a quantity of each piece of target segmentation location information of the at least one piece of target segmentation location information and a quantity of corresponding reference segmentation location information is less than a first preset value, determining, by the server, at least one piece of third segmentation location information based on the at least one piece of target segmentation location information and the reference segmentation location information corresponding to each piece of target segmentation location information; and
sending, by the server, a segmentation location recommendation message to the UE, wherein the segmentation location recommendation message includes the audio identifier of the audio content and the at least one piece of third segmentation location information, wherein:
the segmentation location recommendation message further includes weight information corresponding to the at least one piece of third segmentation location information,
the weight information is used to indicate a priority of the at least one piece of third segmentation location information, and
the priority of the at least one piece of third segmentation location information indicates a closeness of the at least one piece of third segmentation location information to the at least one piece of first segmentation location information.

US Pat. No. 10,460,744

METHODS, SYSTEMS, AND MEDIA FOR VOICE COMMUNICATION

Xinxiao Zeng, Shenzhen (...

1. A system for voice communication, comprising:a first audio sensor that:
captures an acoustic input; and
generates a first audio signal based on the acoustic input, wherein the first audio sensor is positioned in a first passage located between a first surface and a second surface of a textile structure, and
a second audio sensor that generates a second audio signal based on the acoustic input, wherein the textile structure comprises a second passage, and wherein at least a portion of the second audio sensor is positioned in the second passage.

US Pat. No. 10,460,743

LOW-POWER CONVENIENT SYSTEM FOR CAPTURING A SOUND

Hallmark Cards, Incorpora...

1. A source device comprising:a processor;
an application program having computer-usable instructions that when executed enable the processor to automatically record audio, the application program comprising:
a control application configured to
define an audio segment size, and
receive a command to begin the collection of audio information; and
an audio capture application, initiated by the control application, the audio capture application configured to
store audio data incrementally in a first buffer,
monitor an amount of audio data stored in the first buffer,
receive a user-indication that recent data is interesting during the storing of audio data in the first buffer, and
resulting from receiving the user indication that recent data is interesting:
defining an end-of-capture record indicator,
determining a start-of-capture record indicator to provide maximum available data that is earlier than the end-of-capture record indicator by an amount of samples up to the defined audio segment size, and
automatically defining an audio file containing data derived from audio samples from the start-of-capture record indicator to the end-of-capture record indicator; and
a data transfer component operating on data produced by the audio capture application, wherein the data transfer component is configured to transfer the audio file to a second storage area.

US Pat. No. 10,460,742

DIGITAL FILTERBANK FOR SPECTRAL ENVELOPE ADJUSTMENT

Dolby International AB, ...

1. An apparatus for processing an audio signal, the apparatus comprising:an input interface for receiving real-valued time-domain samples;
a digital filterbank including an analysis part and a synthesis part, wherein the analysis part converts the real-valued time-domain samples to complex-valued subband samples, and the synthesis part converts the complex-valued subband samples to time-domain output samples;
a first phase shifter for shifting a phase of the complex-valued subband samples by an amount;
a spectral envelope adjuster for modifying at least a portion of a spectral envelope of the audio signal by applying gains to the complex-valued subband samples;
a second phase shifter for unshifting a phase of the complex-valued subband samples by the amount; and
an output interface for outputting the time-domain output samples,
wherein the analysis part includes Ma=32 analysis filters formed by complex-exponential modulation of a prototype filter having a length of N=640, and the analysis part further includes a decimator for maximally decimating the real-valued time-domain input samples,
wherein the synthesis part includes Ms=64 synthesis filters formed by complex-exponential modulation of the prototype filter, and the synthesis part further includes an interpolator for interpolating the complex-valued subband samples,
wherein the amount of shifting and unshifting is chosen to reduce a complexity of the digital filterbank,
wherein the digital filterbank has a system delay D that represents a latency of a signal passing through the analysis part followed by the synthesis part, and D is smaller than the prototype filter length N, and
wherein the apparatus is implemented with one or more hardware elements.

US Pat. No. 10,460,741

AUDIO CODING METHOD AND APPARATUS

HUAWEI TECHNOLOGIES CO., ...

1. An audio coding method comprising:obtaining an audio signal;
performing linear prediction analysis on the audio signal to obtain a linear predictive parameter of a current frame of the audio signal;
determining a first modification weight according to linear spectral frequency (LSF) differences of the current frame of the audio signal and LSF differences of a previous frame of the current frame of the audio signal when a signal characteristic of the current frame meets a preset modification condition;
modifying the linear predictive parameter of the current frame according to the determined first modification weight; and
coding the current frame according to the modified linear predictive parameter of the current frame.

US Pat. No. 10,460,740

METHODS AND APPARATUS FOR ADJUSTING A LEVEL OF AN AUDIO SIGNAL

Dolby Laboratories Licens...

1. A method performed in an audio decoder for reconstructing N audio channels from an audio signal having M audio channels, the method comprising:receiving a bitstream containing the M audio channels and a set of spatial parameters, wherein the set of spatial parameters includes an amplitude parameter, a correlation parameter, wherein the amplitude parameter is differentially encoded across time;
decoding the M encoded audio channels, wherein each audio channel is divided into a plurality of frequency bands, and each frequency band includes one or more spectral components;
extracting the set of spatial parameters from the bitstream;
applying a differential decoding process across time to the differentially encoded amplitude parameter to obtain a differentially decoded amplitude parameter;
analyzing the M audio channels to detect a location of a transient, wherein the location of the transient is detected based on a filtering operation;
decorrelating the M audio channels to obtain a decorrelated version of the M audio channels, wherein a first decorrelation technique is applied to a first subset of the plurality of frequency bands of each audio channel and a second decorrelation technique is applied to a second subset of the plurality of frequency bands of each audio channel;
deriving N audio channels from the M audio channels, the decorrelated version of the M audio channels, and the set of spatial parameters, wherein N is two or more, M is one or more, and M is less than N; and
synthesizing, by an audio reproduction device, the N audio channels as an output audio signal,
wherein both the analyzing and the decorrelating are performed in a frequency domain, the first decorrelation technique represents a first mode of operation of a decorrelator, the second decorrelation technique represents a second mode of operation of the decorrelator, and the audio decoder is implemented at least in part in hardware.

US Pat. No. 10,460,739

POST-QUANTIZATION GAIN CORRECTION IN AUDIO CODING

TELEFONAKTIEBOLAGET LM ER...

1. A gain adjustment method, performed by a gain adjustment apparatus, in decoding an audio signal that has been encoded with separate gain and shape representations, said method comprising:estimating an accuracy measure of the shape representation for a frequency band of the audio signal, wherein the shape representation encodes a shape vector comprising coefficients of the audio signal for the frequency band, and wherein the shape vector has been encoded using a pulse vector coding scheme where pulses may be added on top of each other to form pulses of different height, and the accuracy measure is based on the number of pulses used for encoding the shape vector and a height of the maximum pulse in the shape representation;
determining, based on the estimated accuracy measure, a gain correction; and
adjusting the gain representation for the frequency band based on the determined gain correction.

US Pat. No. 10,460,738

ENCODING APPARATUS FOR PROCESSING AN INPUT SIGNAL AND DECODING APPARATUS FOR PROCESSING AN ENCODED SIGNAL

Fraunhofer-Gesellschaft z...

1. An encoding apparatus for processing an input signal, comprising:a perceptual weighter; and
a quantizer,
wherein the perceptual weighter comprises a model provider and a model applicator, wherein the model provider is configured for providing a perceptually weighted model based on the input signal, and wherein the model applicator is configured for providing a perceptually weighted spectrum by applying the perceptually weighted model to a spectrum based on the input signal, and
wherein the quantizer is configured to quantize the perceptually weighted spectrum and for providing a bitstream, wherein the quantizer comprises a random matrix applicator and a sign function calculator, wherein the random matrix applicator is configured for applying a random matrix to the perceptually weighted spectrum in order to provide a transformed spectrum, and wherein the sign function calculator is configured for calculating a sign function of components of the transformed spectrum in order to provide the bitstream.

US Pat. No. 10,460,737

METHODS, APPARATUS AND SYSTEMS FOR ENCODING AND DECODING OF MULTI-CHANNEL AUDIO DATA

Dolby Laboratories Licens...

1. A method for decoding an encoded bitstream of multi-channel audio data and associated metadata, the method comprising:decoding the encoded bitstream of multi-channel audio data into multi-channel audio data;
detecting that the multi-channel audio data includes a first Ambisonics format;
transforming the first Ambisonics format of the multi-channel audio data to a second Ambisonics format representation of the multi-channel audio data, wherein the transforming maps the first Ambisonics format of the multi-channel audio data into the second Ambisonics format representation of the multi-channel audio data; and
wherein the detecting is based on at least part of the associated metadata that indicates existence of the first Ambisonics format of the multi-channel audio data.

US Pat. No. 10,460,736

METHOD AND APPARATUS FOR RESTORING AUDIO SIGNAL

SAMSUNG ELECTRONICS CO., ...

9. A method of extending a bandwidth of an audio signal, the method comprising:extending an audio signal of a first bandwidth to an audio signal of a second bandwidth;
determining a ratio between a first frequency value and a second frequency value if an audio signal of the second frequency value included in the second bandwidth is reconstructed based on an audio signal of the first frequency value in the first bandwidth;
determining a phase shift amount in preset unit of time with respect to the second frequency value, based on the determined ratio; and
adjusting a phase with respect to the second frequency value, based on the determined phase shift amount.

US Pat. No. 10,460,735

SPEAKER VERIFICATION USING CO-LOCATION INFORMATION

Google LLC, Mountain Vie...

1. A method comprising:receiving, at data processing hardware, audio data corresponding to an utterance of a voice command captured by a user device, the user device having a plurality of different users, each user of the plurality of different users having different corresponding user permissions to access a plurality of applications on the user device;
for each user of the plurality of different users of the user device:
obtaining, by the data processing hardware, corresponding speaker verification data from memory hardware in communication with the data processing hardware; and
generating, by the data processing hardware, a corresponding speaker verification score by comparing the corresponding speaker verification data and the audio data, the corresponding speaker verification score indicating a likelihood that the utterance of the voice command was spoken by the corresponding user of the plurality of different users of the user device;
identifying, by the data processing hardware, a speaker of the utterance of the voice command as the user of the plurality of different users of the user device associated with a highest corresponding speaker verification score; and
processing, by the data processing hardware, the voice command using a speech recognition module to identify a particular action for the user device to execute, the particular action, when executed by the user device, launching a particular application of the plurality of applications on the user device based on the corresponding user permissions associated with the identified speaker to access the application.

US Pat. No. 10,460,734

METHODS AND SYSTEMS FOR SPEECH SIGNAL PROCESSING

Frontive, Inc., Beverly ...

19. A computerized method, the method comprising:generating a profile for a user using user data indicating:
how much medical information the user wants regarding medical issues associated with the user;
accessing a medical care record associated with the user, the medical care record comprising a first medical protocol including patient care instructions, the patient care instructions including:
a first patient care instruction associated with a first time period, and
a second patient care instruction associated with a second time period;
generating a first personalized interaction model using:
the user profile, and
the user medical care record comprising a first medical protocol including patient care instructions;
updating the first personalized interaction model at least partly in response to a detection of a new medical care record or a modification of the first medical care record;
receiving over a network using a network interface digitized audio data comprising a user communication from a user, the digitized audio data received in real time from a user device;
receiving over the network using the network interface data identifying the user;
utilizing the user identifier to access the first personalized interaction model generated using the user profile and the user medical care record;
using a natural language processing engine to:
translate the digitized audio data to text;
identify a user intent associated with the user communication;
identify a variable associated with the user intent;
identifying, using the user intent identified using the natural language processing engine, what computerized service to invoke;
accessing from computer readable memory the first medical protocol associated with the user;
accessing, using a computer resource, a current date and time;
parsing the first protocol to identify one or more patient care instructions included identified in the first medical protocol associated with a specified date range and/or time period, that corresponds to the current date and/or time;
utilizing:
the first personalized interaction model,
the first medical protocol,
the identified one or more patient care instructions,
the variable associated with the user intent, and
the computerized service identified using the user intent,
to generate a response to the user communication; and
causing the response to the user communication to be transmitted to and audibly reproduced by the user device.

US Pat. No. 10,460,733

SIGNAL PROCESSING APPARATUS, SIGNAL PROCESSING METHOD AND AUDIO ASSOCIATION PRESENTATION APPARATUS

Kabushiki Kaisha Toshiba,...

1. A signal processing apparatus comprising:a memory; and
a hardware processor electrically coupled to the memory, and configured to:
separate a plurality of signals using a separation filter to obtain a plurality of separate signals, and output the plurality of separate signals, the plurality of signals including signals which come from different directions,
estimate incoming directions of the plurality of separate signals, respectively, and associate the plurality of separate signals with the incoming directions,
output for display an association between the plurality of separate signals and the incoming directions,
estimate the separation filter from the plurality of signals and successively update the separation filter, and
receive an instruction to recover the separation filter to a first state of a first time.

US Pat. No. 10,460,732

SYSTEM AND METHOD TO INSERT VISUAL SUBTITLES IN VIDEOS

Tata Consultancy Services...

1. A computer implemented system for creation of visually subtitled videos, wherein said system comprises:a memory storing instructions and coupled to the processor, wherein the processor is configured to execute the instructions to perform operations to:
segment an audio signal with at least one speaker in a video frame from an input video signal and a music segment from the input video signal;
map a plurality of recognized phones from the segmented audio signal to at least one viseme using a language model;
determine a likelihood score of the recognized phones;
determine a viseme based language model score (VLM) for the at least one mapped viseme;
compute a total viseme score for the at least one mapped viseme by determining a sum of the likelihood score and the VLM score when more than one phone maps to the same viseme or determining a product of the likelihood score and VLM score when one phone maps to a single viseme;
determine a most relevant viseme from the segmented audio signal by comparing the total viseme score and selecting a viseme with the highest total score;
generate a speaker representation sequence of the segmented audio signal; and
integrate the segmented audio signal and viseme sequence to generate visual subtitles.

US Pat. No. 10,460,731

APPARATUS, METHOD, AND NON-TRANSITORY COMPUTER READABLE STORAGE MEDIUM THEREOF FOR GENERATING CONTROL INSTRUCTIONS BASED ON TEXT

Institute For Information...

1. An apparatus for generating control instructions for playing a text, comprising:an input interface, being configured to receive the text comprising at least one string;
a storage, being configured to store a feature database and a control instruction set, wherein the feature database comprises a plurality of preset emotion tags, a plurality of preset action tags, and a plurality of preset environment tags, the control instruction set comprises a plurality of control instructions, and each of the control instructions corresponds to at least one of the preset emotion tags, the preset action tags, and the preset environment tags; and
a processor electrically connected to the input interface and the storage, being configured to analyze the at least one string comprised in the text to generate a text timestamp datum, wherein the text timestamp datum comprises at least one time for playing the at least one string respectively, and the processor further analyzes the at least one string to obtain a plurality of pieces of emotion information, a plurality of pieces of action information, and a plurality of pieces of environment information, decide a plurality of first emotion tags and corresponding timestamps thereof, a plurality of action tags and corresponding timestamps thereof, and a plurality of environment tags and corresponding timestamps thereof for the text according to the feature database and the text timestamp datum, and generate at least one first control instruction and corresponding at least one timestamp thereof for playing the text according to the first emotion tags and the corresponding timestamps thereof, the action tags and the corresponding timestamps thereof, and the environment tags and the corresponding timestamps thereof,
wherein each of the first emotion tags is one of the preset emotion tags, each of the action tags is one of the preset action tags, and each of the environment tags is one of the preset environment tags.

US Pat. No. 10,460,730

ANNOUNCEMENT SIGNALING ON BOARD AN AIRCRAFT

AIRBUS OPERATIONS GMBH, ...

1. A method of signaling speech signal related text messages on board an aircraft, wherein the method comprises:providing a speech signal related to an announcement to passengers of the aircraft;
obtaining a text message containing text corresponding to spoken words of the speech signal by applying speech recognition to the speech signal;
determining one or more mobile devices to which the text message is to be signaled as recipients of the text message; and
signaling the text message to the one or more mobile devices determined as the recipients of the text message on board the aircraft by transmitting the text message in multicast,
wherein the step of determining the one or more mobile devices comprises
determining one or more of the mobile devices on which a respective application is installed;
wherein the method is carried out by an apparatus on board the aircraft; and
wherein said providing a speech signal comprises generating the speech signal in real time on board the aircraft;
wherein the one or more mobile devices determined as the recipients of the text message are brought on board the aircraft by the passengers of the aircraft,
wherein the method comprises detecting a preferred language for each of the one or more mobile devices determined as recipients of the text message based on information related to the respective mobile device and the step of signaling comprises transmitting the text message containing text in the detected preferred language;
wherein said information related to the respective mobile device that is used to detect the preferred language comprises at least one of:
information about a Subscriber Identity Module, SIM, card of the respective mobile device;
information about a telephone number of the respective mobile device; or
information about an operating system running on the respective mobile device.

US Pat. No. 10,460,729

BINARY TARGET ACOUSTIC TRIGGER DETECTON

Amazon Technologies, Inc....

1. A method for selective transmission of sampled audio data to a speech processing server according to detection of a trigger being represented in the audio data, the method comprising:receiving sampled audio data based on an acoustic signal acquired by one or more microphones in an acoustic environment;
processing the sampled audio data to locate instances of the acoustic trigger in the acoustic signal, wherein processing the sampled audio data includes
computing a sequence of feature vectors from the sampled audio data, each feature vector in the sequence being associated with a time in the acoustic signal and representing spectral characteristics of the acoustic signal at said time,
for each time of a succession of times, forming a set of feature vectors, each feature vector corresponding to a time at a predetermined respective offset from said time, providing the set of feature vectors as an input to an artificial neural network, and computing an output from the artificial neural network indicating a presence of the trigger at said time, and
processing the outputs from the neural network for the succession of times to determine a first time corresponding to occurrences of the trigger in the acoustic signal, the first time corresponding to an extreme value of the outputs from the artificial neural network detected over the succession of times;
selecting a portion of the sampled audio data for transmission to the speech processing server according to the first time, corresponding to the extreme value of the outputs from the artificial neural networks detected over the succession of times, corresponding to the instances of the trigger; and
transmitting the selected portion of the sampled audio data to the speech processing server.

US Pat. No. 10,460,728

EXPORTING DIALOG-DRIVEN APPLICATIONS TO DIGITAL COMMUNICATION PLATFORMS

Amazon Technologies, Inc....

5. A method, comprising:receiving a launch condition associated with a dialog-driven application from a user, wherein the dialog-driven application is implemented in an application management service; and
causing the launch condition to be registered with one or more digital communication platforms distinct from the application management service, wherein the registration makes the dialog-driven application at the application management service accessible via the one or more digital communication platforms, wherein the registration configures individual ones of the one or more digital communication platforms to perform:
detecting the launch condition in a natural language input to the digital communication platform; and
responsive to the detection, causing data of further natural language input to be routed according to the registration from the digital communication platform to the application management service.

US Pat. No. 10,460,727

MULTI-TALKER SPEECH RECOGNIZER

Microsoft Technology Lice...

1. A system for multi-talker speech separation and recognition, comprising:a processor; and
a memory device coupled to the processor, the memory device to store instructions that, when executed by the processor, cause the processor to:
process a mixed speech audio received from a microphone;
use permutation invariant training (PIT) to separate and trace speech streams in the mixed speech audio, wherein the PIT includes:
estimate, in a first stage, a first mask by applying a first deep learning model to the mixed speech audio; and
estimate, in a second stage, a second mask by applying a second deep learning model to the first estimated mask and the mixed speech audio;
generate a plurality of separated speech streams from the mixed speech audio for submission to a speech decoder, wherein the plurality of separated speech streams are generated based on the first estimated mask and the second estimated mask; and
decode, using the speech decoder, speech of a first separated speech stream of the plurality of separated speech streams.

US Pat. No. 10,460,725

PROVIDING SUGGESTED VOICE-BASED ACTION QUERIES

GOOGLE LLC, Mountain Vie...

1. A computer-implemented method, comprising:receiving an indication of content recently viewed on a computing device;
determining, based on the indication of the content, an entity referenced in the content;
determining a computer-based action mapped to the entity in one or more electronic databases;
generating a suggested voice-based action query that includes at least one action term that initiates performance of the computer-based action and that includes at least one entity term selected based on the entity;
receiving a voice-based query input indication, the voice-based query input indication indicating receipt of input of the user via the computing device to initiate providing of a voice-based query via a microphone of the computing device, wherein the received input to initiate providing of the voice-based query via the computing device is one of: a phrase spoken by the user and received by the computing device via the microphone, a selection of a voice query icon via a graphical user interface of the computing device, an actuation of a touch-sensitive hardware element of the computing device, or performance of a given gesture captured by the computing device via a vision sensor;
providing, for initial display by the computing device, a voice query interface without the suggested voice-based action query;
determining an indication of a need for suggested voice-based action queries, wherein determining the indication of the need for suggested voice-based action queries comprises:
determining the indication of the need for suggested voice-based action queries based on determining that a noise level, following the input of the user to initiate providing of the voice-based query, is greater than a threshold noise level; and
providing a list of voice-based action queries, including the suggested voice-based action query in response to receiving the voice-based query input indication and based on determining the indication of the need for suggested voice-based action queries, the suggested voice-based action query provided for display by the computing device as a suggestion for the voice-based query.

US Pat. No. 10,460,724

DISCOVERING WINDOWS IN TEMPORAL PREDICATES

INTERNATIONAL BUSINESS MA...

1. A method for event processing by discovering windows in temporal predicates, comprising:separating a predicate that specifies a set of events into a temporal part and a non-temporal part, the set of events being used to reduce required computational resources for the discovering windows in temporal predicates by forming an aggregation that is incrementally maintained as events are added to and removed from the set of events;
comparing the temporal part of the predicate against a predicate of a known window type;
determining whether the temporal part of the predicate matches the predicate of the known window type; and
replacing (i) the non-temporal part of the predicate by a filter, and (ii) the temporal part of the predicate by an instance of the known window type, responsive to the temporal part of the temporal predicate matching the predicate of the known window type,
wherein the set of events is specified by first filtering the set of events by the filter replacing the non-temporal part of the predicate, with any remaining events being tracked in the instance of the known window type that replaced the temporal part of the predicate,
wherein the instance is parameterized with substitutions used to match the temporal part of the predicate to the predicate of the known window type, and
wherein a window of the known window type is associated with one or more buckets that are pre-aggregated at a bucket-level upon event arrival.

US Pat. No. 10,460,723

SOUND IDENTIFICATION UTILIZING PERIODIC INDICATIONS

INTERNATIONAL BUSINESS MA...

1. A computer-implemented method performed by a speech recognition system having at least a processor, the method comprising:estimating, by the processor, sound identification information from a neural network having periodic indications and components of a frequency spectrum of an audio signal data inputted thereto; and
performing, by the processor, a speech recognition operation on the audio signal data to decode the audio signal data into a textual representation based on the estimated sound identification information,
wherein the neural network includes a plurality of fully-connected network layers having a first layer that includes a plurality of first nodes and a plurality of second nodes, and wherein the method further comprises training the neural network by initially isolating the periodic indications from the components of the frequency spectrum in the first layer by setting weights between the first nodes and a plurality of input nodes corresponding to the periodic indications to 0.

US Pat. No. 10,460,722

ACOUSTIC TRIGGER DETECTION

Amazon Technologies, Inc....

1. A method for selective transmission of sampled audio data to a speech processing server according to detection of an acoustic trigger being represented in the audio data, the method comprising:receiving sampled audio data based on an acoustic signal acquired at one or more microphones in an acoustic environment;
processing the sampled audio data to locate instances of the acoustic trigger in the acoustic signal, the processing of the sampled audio data including
computing a sequence of feature vectors from the sampled audio data, each feature vector in the sequence being associated with a time in the acoustic signal and representing spectral characteristics of the acoustic signal in a vicinity of said time,
for each time of a succession of times, assembling a set of feature vectors each corresponding to a time offset at predetermined offset from said time, providing the set of feature vectors as an input to an artificial neural network, and computing an output from the neural network corresponding to said time, and
processing the outputs from the neural network for the succession of times to determine time locations corresponding to occurrences of the trigger in the acoustic signal;
selecting portions of the sampled audio data for transmission to the speech processing server according to locations of the located instances of the trigger;
transmitting the selected portions of the sampled audio data to the speech processing server;
wherein computing the output of the neural network includes performing a series of data transformations, multiple of the data transformations each including
forming an input to the transformation as a combination of an output from a prior transformation in the series and one or more time delayed outputs from the prior transformations, the input having a number of input data elements,
computing intermediate data elements from the input data elements as a linear transformation of the input data elements, the intermediate data elements having a number of intermediate elements smaller than the number of input data elements, and
determining output elements of the data transformation as a linear transformation of the intermediate data elements followed by an element-wise non-linear transformation, the output elements having a number of output elements greater than the number of intermediate elements.

US Pat. No. 10,460,721

DIALOGUE ACT ESTIMATION METHOD, DIALOGUE ACT ESTIMATION APPARATUS, AND STORAGE MEDIUM

PANASONIC INTELLECTUAL PR...

1. A dialogue act estimation method, in a dialogue act estimation system, comprising:acquiring sounds by a microphone in a terminal;
determining, by a processor in the terminal, whether the acquired sounds are uttered sentences of one or more speakers or noise;
outputting the uttered sentences to communication transmitter only when the processor determines that the acquired sounds are uttered sentences of the one or more speakers and are not noise;
converting the uttered sentences of the one or more speakers to one or more formatted communication signals when the processor determines that the acquired sounds are uttered sentences of the one or more speakers;
transmitting the one or more formatted communication signals from the terminal over a communication network to a server;
receiving the one or more formatted communication signals by the server;
converting the received one or more formatted communication signals by a processor in the server to the uttered sentences of the one or more speakers;
acquiring first training data by the server from the converted uttered sentences of the one or more speakers indicating, in a mutually associated manner, text data of a first sentence that can be a current uttered sentence, text data of a second sentence that can be an uttered sentence immediately previous to the first sentence, first speaker change information indicating whether a speaker of the first sentence is the same as a speaker of the second sentence, and dialogue act information indicating a class of the first sentence;
learning an association between the current uttered sentence and the dialogue act information by applying the first training data to a model;
storing a result of the learning as learning result information in a memory in the server;
acquiring dialogue data including text data of a third sentence of a current uttered sentence uttered by a user, text data of a fourth sentence of an uttered sentence immediately previous to the third sentence, and second speaker change information indicating whether the speaker of the third sentence is the same as a speaker of the fourth sentence;
estimating a dialogue act to which the third sentence is classified by applying the dialogue data to the model based on the learning result information; and
generating a correct response to the uttered sentences of the one or more speakers,
wherein the model includes
a first model that outputs a first feature vector based on the text data of the first sentence, the text data of the second sentence, the first speaker identification information, the second speaker identification information, and a first weight parameter, and
a second model that outputs a second feature vector based on the text data of the first sentence, the text data of the second sentence, the first speaker change information, and a second weight parameter,
wherein the first model determines the first feature vector from the first sentence and the second sentence according to a first RNN-LSTM (Recurrent Neural Network-Long Short Term Memory) having the first weight parameter dependent on the first speaker identification information and the second speaker identification information, and
wherein the second model determines the second feature vector from the first sentence and the second sentence according to a second RNN-LSTM having the second weight parameter dependent on first speaker change information.

US Pat. No. 10,460,720

GENERATION OF LANGUAGE UNDERSTANDING SYSTEMS AND METHODS

MICROSOFT TECHNOLOGY LICE...

1. A method for providing language understanding on a computer, comprising:receiving an utterance;
building, by the computer, two separate models in isolation from one another, the building of the two separate models comprising:
building a user intent detection model based on a user intent determined from the received utterance, the user intent detection model for determining a user intent in a subsequent utterance, wherein the user intent detection model is updateable via interactive learning to identify an unlabeled user intent associated with functionality within an associated application;
building an entity extraction model based on one or more language entities determined from the received utterance, the entity extraction model for determining one or more language entities in the subsequent utterance, wherein the entity extraction model is updateable via interactive learning to identify unlabeled language entities associated with functionality within the associated application;
automatically generating labeling for the user intent and the one or more language entities determined from the received utterance;
building a function call for calling a function in the associated application from the automatically generated labeling;
wherein in response to receiving the subsequent utterance:
the user intent detection model and the entity extraction model are applied against the subsequent utterance to identify, based on the automatically generated labeling for the subsequent utterance, the function call;
the function call is passed to the associated application to execute the function on the computer; and
the function is executed by the associated application on the computer.

US Pat. No. 10,460,719

USER FEEDBACK FOR SPEECH INTERACTIONS

Amazon Technologies, Inc....

1. A method comprising:receiving, via one or more processors of a device, text corresponding to a prior utterance of a user;
presenting the text on a display associated with the device;
receiving, via an input component associated with the display, a request to output sound associated with the prior utterance;
sending a signal corresponding to the sound for output, the sound corresponding to the prior utterance;
receiving, via the input component associated with the display, feedback associated with the text; and
sending an indication of the feedback to one or more servers.

US Pat. No. 10,460,718

AMBIENT NOISE REDUCTION ARRANGEMENTS

Cirrus Logic, Inc., Aust...

1. An ambient noise reducing system comprising:an earphone housing, comprising a circular outer rim;
a loudspeaker, wherein the loudspeaker is supported within said housing, and wherein the housing has an outlet port for sound generated by the loudspeaker;
a plurality of microphones, each microphone having a respective microphone inlet port in the circular outer rim of the housing surrounding the loudspeaker outlet port, such that said microphones are positioned to sense ambient noise approaching said housing from different respective directions; and
feedforward noise cancellation circuitry for passing the electrical signals generated by said plurality of microphones in parallel to an amplifier to form a summed electrical signal, and applying the summed electrical signal to said loudspeaker to generate an acoustic signal,
wherein a system response time is defined as a sum of an intrinsic response time of the loudspeaker and a propagation time of said acoustical signal from the loudspeaker to an eardrum of a listener having the earphone housing close to an ear, and
wherein said system response time is matched to a time taken for said ambient noise to travel from one of said microphones to the eardrum of the listener to achieve noise cancellation at the eardrum of the listener.

US Pat. No. 10,460,717

CARBON NANOTUBE TRANSDUCERS ON PROPELLER BLADES FOR SOUND CONTROL

Amazon Technologies, Inc....

1. An aerial vehicle comprising:a first motor configured to rotate a propeller such that the propeller generates a lifting force;
the propeller including:
a hub that is coupled to the first motor so that the first motor can rotate the propeller; and
a propeller blade extending from the hub, the propeller blade including an upper surface and a lower surface;
a propeller duct positioned around the propeller;
a plurality of carbon nanotube transducers formed as a mesh material and positioned over an exit of the propeller duct; and
a sound controller in communication with the plurality of carbon nanotube transducers to provide a signal to the plurality of carbon nanotube transducers to cause the plurality of carbon nanotube transducers to activate, wherein the signal causes the plurality of carbon nanotube transducers to generate an anti-sound that interferes with a sound generated by a rotation of the propeller blade.

US Pat. No. 10,460,716

SOUND WAVE FIELD GENERATION BASED ON LOUDSPEAKER-ROOM-MICROPHONE CONSTRAINTS

HARMAN BECKER AUTOMOTIVE ...

1. A loudspeaker-room-microphone system comprising:one group of loudspeakers including at least one loudspeaker in a room;
one group of microphones including at least one microphone in the room;
a filter having a controllable transfer function;
a filter controller configured to control the transfer function of the filter according to an adaptive control algorithm based on an error signal that is generated from the at least one microphone and a source input signal from an audio source; and
a gain control filter configured to weight the error signal from the at least one microphone according to a position of the group of microphones in the room to provide a modified error signal to the filter controller;
wherein the filter controller is further configured to control the filter based on a spatial constraint;
wherein the filter is configured to provide a loudspeaker signal to the at least one loudspeaker in the room; and
wherein the gain control filter has a frequency-dependent gain such that a spectral composition of the error signal is modified.

US Pat. No. 10,460,715

ACOUSTIC FLOOR UNDERLAY SYSTEM

Zephyros, Inc., Romeo, M...

1. A flooring assembly comprising:a) at least one first lofted, lapped, or airlaid bulk absorber layer for acoustic absorption and compression resistance;
b) at least one impedance layer for one or more of acoustic impedance, compression resistance, and stiffness;
c) at least one second lofted, lapped, or airlaid bulk absorber layer for acoustic absorption and compression resistance; and
d) one or more fibrous air-flow resistive layers.

US Pat. No. 10,460,714

BROADBAND ACOUSTIC ABSORBERS

United States of America ...

1. An apparatus, comprising:acoustic absorber panels located on a plurality of sides of a body to be acoustically dampened, wherein each acoustic absorber panel comprises:
at least one cubic retainer, wherein the cubic retainer is open to a surrounding gaseous environment and capable of receiving sound waves to be acoustically dampened, the cubic retainer comprising:
at least one solid side; and
at least one perforated side permitting sound waves in the surrounding gaseous environment to enter the cubic retainer; and
an acoustic absorber layer disposed within the cubic retainer and comprised of a plurality of reeds, wherein:
the plurality of reeds each comprise a first end, a second end, and a length disposed between the first end and the second end;
the plurality of reeds are natural reeds, synthetic reeds, or a combination of natural and synthetic reeds;
the plurality of reeds are fixed at one end, wherein the length of each of the reeds is substantially perpendicular to the sound waves entering the cubic retainer; and
the plurality of reeds are each open on at least one end to the surrounding gaseous environment;
wherein sound waves entering the cubic retainer are acoustically dampened by the acoustic absorber layer.

US Pat. No. 10,460,713

ACOUSTIC WAVE CLOAKING METHOD AND DEVICE CONSIDERING GENERALIZED TIME DEPENDENCY

University of Seoul Indus...

1. A method of cloaking an acoustic wave, comprising:transforming an acoustic propagation mathematical model, predetermined for propagation of an acoustic wave, into an acoustic wave cloaking mathematical model corresponding to an electromagnetic wave mathematical model predetermined for an electromagnetic wave and including a time variable for time dependency in a 4D coordinate system, based on a correlation between the acoustic propagation mathematical model and the electromagnetic wave mathematical model;
obtaining a target characteristic of a meta-material by using the acoustic wave cloaking mathematical model; and
blocking a region including a target object, from an acoustic wave by disposing the meta-material having the obtained target characteristic to surround the region,
wherein a target characteristic of the meta-material is calculated based on a space-time meta-material analysis based on the General Theory of the Relativity,
wherein an empty space of a physical space corresponding to the target region to be hidden with the target object is transformed into a virtual space that has a point the empty space of the physical space is transformed thereto, so that the empty space of the physical space is hidden from external acoustic waves, and
where the transformation of the physical space into the virtual space is obtained using covariant Maxwell's equations based on the General Theory of the Relativity, and using a coordinate transformation equation according to a spatial topology of the target region and the meta-material.

US Pat. No. 10,460,712

SYNCHRONIZING PLAYBACK OF A DIGITAL MUSICAL SCORE WITH AN AUDIO RECORDING

AVID TECHNOLOGY, INC.

1. A method of enabling a display of playback location within a graphical representation of a digital musical score in synchrony with playback of an alternate audio rendering of the digital musical score, wherein the digital musical score comprises a plurality of events, and a temporal offset for an occurrence of each of the plurality of events in the alternate audio rendering diverges from a nominal temporal offset for an occurrence of the event as specified in the digital musical score, the method comprising:receiving a synthesized audio rendering of the digital musical score, wherein the synthesized audio rendering is generated automatically by parsing the digital musical score;
receiving the alternate audio rendering of the digital musical score;
for each event of the plurality of events:
generating a subclip of the synthesized audio rendering starting at the event;
generating a subclip of the alternate audio rendering that is in approximate temporal correspondence with the subclip of the synthesized audio recording;
determining an adjusted temporal offset of the subclip of the synthesized audio for which a quality of match between the subclip of the synthesized audio rendering and the subclip of the alternate audio rendering is maximized;
identifying the adjusted temporal offset as a temporal offset for the occurrence of the event in the alternate audio rendering; and
in response to a request for synchronized playback of the alternate audio rendering with the digital score, displaying for each event of the plurality of events a graphical indication of a playback location of the event on a display of the graphical representation of the digital musical score at a playback time corresponding to the identified temporal offset for the occurrence of the event in the alternate audio rendering.

US Pat. No. 10,460,711

CROWD SOURCED TECHNIQUE FOR PITCH TRACK GENERATION

Smule, Inc., San Francis...

1. A pitch track generation system comprising:a first geographically distributed set of network-connected devices configured to capture audio signal encodings for respective vocal performances in correspondence with a backing track; and
a service platform configured to receive and process the audio signal encodings to computationally estimate, for each of the vocal performances, a time-varying sequence of vocal pitches and to aggregate the time-varying sequences of vocal pitches in preparation of a crowd-sourced pitch track, the aggregating based at least in part on confidence ratings determined as part of the computational estimation of vocal pitch.

US Pat. No. 10,460,710

MUSICAL INSTRUMENTS INCLUDING KEYBOARD GUITARS

1. A musical instrument, comprising:a body;
an elongated neck coupled to the body, wherein the body and the elongated neck define an electric guitar shape, wherein the elongated neck has a length that is greater than or equal to a length of the body, and wherein the body includes a middle portion that is narrower than opposite end portions of the body;
a plurality of neck keys disposed on the elongated neck;
a plurality of body keys disposed on the body; and
an output for transmitting an electrical signal generated by the musical instrument;
wherein activation of each neck key generates an electrical signal at the output representing a pitch associated with a musical note corresponding to the activated neck key, wherein activation of each body key generates an electrical signal at the output representing a pitch associated with a musical note corresponding to the activated body key, and wherein the plurality of body keys and the plurality of neck keys are tuned in a continuous chromatic scale that spans the plurality of body keys and the plurality of neck keys.

US Pat. No. 10,460,709

ENHANCED SYSTEM, METHOD, AND DEVICES FOR UTILIZING INAUDIBLE TONES WITH MUSIC

THE INTELLECTUAL PROPERTY...

1. A method for utilizing inaudible tones for music, comprising:initiating music with enhanced features;
determining whether inaudible tones including information or data are associated with a portion of the music; and
playing the music associated with the inaudible tone including the inaudible tones associated with the portion of the music, wherein the inaudible tones are utilized to display notes associated with the music in time with the tempo of the music.

US Pat. No. 10,460,708

FREQUENCY CONTROL CYMBAL

Sabian Ltd., Meductic (C...

1. A circular cymbal with a central mounting hole surrounded by a bell area surrounded by a bow area, and a plurality of approximately 3.175 mm diameter apertures pierced through the cymbal, where the plurality of apertures consists of at least one ring of evenly spaced apertures, where the closest ring located to the central mounting hole is 45 mm from the central mounting hole, and each ring is at least 7 mm apart in the bell area and less than 15 mm apart in the bow area nearest the bell area.

US Pat. No. 10,460,707

MAGNETIC THROW-OFF FLOATING ATTACHMENT

Randall May International...

1. A snare drum attachment, comprising:a snare movement structure mountable to the snare drum and mountable with snares of the snare drum, the snare movement structure having at least one magnet element, the snare movement structure configured to set the snares of the snare drum at a snare effect level; and
an actuator that controls the at least one magnet element to adjust the snare effect level via an alteration of a magnetic force acting between portions of the snare movement structure.

US Pat. No. 10,460,706

INTEGRATED REED PROTECTION AND STORAGE METHODS AND SYSTEMS

MUSICALLY OVERJOYED, LLC,...

1. An integrated reed protection and storage system comprising:a controlled solution container;
a sponge material positionable within the container;
at least one reed holder positionable around the sponge material; and
at least one reed, the at least one reed positionable on the at least one reed holder wherein the at least one reed is configured to contact a surface of the sponge material.

US Pat. No. 10,460,705

PICK GRIPPING SYSTEM

1. A pick gripping system comprising:a bottom surface formed on a body, the body having a left side, a right side, a proximal end, and a distal end;
an intermediate surface formed on the body; and
a top surface formed on the body, the top surface coupled to the intermediate surface with upward extending sides therebetween, the upward extending sides and the top surface forming a first lateral ridge extended from the left side of the body to the right side of the body, the upward extending sides and the top surface forming a second lateral ridge extended from the left side of the body to the right side of the body, and the first lateral ridge and the second lateral ridge forming a thumb recess therebetween.

US Pat. No. 10,460,704

SYSTEMS AND METHODS FOR HEAD-MOUNTED DISPLAY ADAPTED TO HUMAN VISUAL MECHANISM

Movidius Limited, Schiph...

1. A head-mounted display device comprising:a first display for a left eye;
a second display for a right eye;
memory to store data to present via the first display and via the second display; and
one or more processors to:
determine, based on eye-tracking information of a user wearing the head-mounted display, a first foveal region of the first display, a first extra-foveal region of the first display, a second foveal region of the second display, and a second extra-foveal region of the second display, the eye-tracking information representative of at least one of an eye movement or an eye position of the user;
identify a first subset of the data as corresponding to first foveal region pixels associated with the first foveal region, a second subset of the data as corresponding to first extra-foveal region pixels associated with the first extra-foveal region, a third subset of the data as corresponding to second foveal region pixels associated with the second foveal region, and a fourth subset of the data as corresponding to second extra-foveal region pixels associated with the second extra-foveal region;
load the first subset at a first full resolution from the memory to a first foveal frame buffer;
load the second subset at a first reduced resolution from the memory to a first extra-foveal frame buffer;
load the third subset at a second full resolution from the memory to a second foveal frame buffer; and
load the fourth subset at a second reduced resolution from the memory to a second extra-foveal frame buffer.

US Pat. No. 10,460,703

DISPLAY CONTROL APPARATUS, DISPLAY CONTROL METHOD, AND CAMERA MONITORING SYSTEM

ALPINE ELECTRONICS, INC.,...

1. A display control apparatus configured to be connected to an imaging apparatus, the display control apparatus comprising:a memory; and
a processor coupled to the memory, wherein
the processor obtains image data captured by the imaging apparatus by capturing an image behind a vehicle,
generates edge image data that indicates a peripheral portion of the image data to be viewed via an electric mirror that is placed at a rear-view mirror position inside the vehicle,
generates display image data by superimposing the generated edge image data onto the obtained image data, and
controls the generated display image data to be viewed via the electric mirror, wherein
the edge image data indicates a boundary between a front view and the display image data,and whereinthe processor detects an obstacle approaching from behind the vehicle with a speed equal to or greater than a predetermined speed, and
controls only the generated edge image data that indicates the peripheral portion to be viewed via the electric mirror without having the display image data displayed in a case where controlling for the display image data is stopped, but the obstacle is detected by the processor.

US Pat. No. 10,460,702

DISPLAY PIXEL OVERDRIVE SYSTEMS AND METHODS

Apple Inc., Cupertino, C...

1. An electronic device with a display, the electronic device comprising:a frame buffer configured to store a compressed display frame that is a preceding display frame to a current display frame;
a threshold engine configured to determine whether to perform an overdrive operation for the current display frame based on a compression error for the compressed preceding display frame and based on a comparison of an averaged version of the current display frame that is an original uncompressed version to a decompressed version of the compressed preceding display frame; and
a boost engine configured to generate, if it is determined by the threshold engine that the overdrive operation is to be performed for the current display frame, an overdriven output frame by applying a boost value to the current display frame that is an original uncompressed version, wherein the boost value is based on a comparison of the current display frame that is an original uncompressed version to the decompressed version of the compressed preceding display frame.

US Pat. No. 10,460,701

DISPLAY MURA CORRECTION METHOD, APPARATUS, AND SYSTEM

Huawei Technologies Co., ...

1. A method of correcting a display mura, the method comprising:receiving, by a terminal, initial image data for displaying an initial image, wherein the initial image data comprises image data of a mura located in a region of the initial image when displayed, and wherein when the mura is located within the region, the region has at least one pixel with a brightness value that is not within a reference threshold set;
determining, by the terminal, a target feature data set of the at least one pixel according to a brightness value of the at least one pixel from the initial image data;
obtaining, by the terminal and according to a correspondence between feature data, a correction value, and the target feature data set, a target correction value set; and
generating, by the terminal, target image data based on the initial image data and the target correction value set, wherein the target image data is for displaying the initial image with a corrected mura within the region.

US Pat. No. 10,460,700

METHOD AND APPARATUS FOR IMPROVING QUALITY OF EXPERIENCE AND BANDWIDTH IN VIRTUAL REALITY STREAMING SYSTEMS

Cinova Media, Redwood Ci...

1. A virtual reality data apparatus, comprising:a backend system coupled to each virtual reality device over a communication path that streams virtual reality data to each virtual reality device, each virtual reality device receiving a virtual reality data stream that has an in view portion of a frame of virtual reality data and one or more pieces of optimized virtual reality data, the one or more pieces of optimized virtual reality data that is an adaptive guard band that surrounds the in view portion of the frame, the adaptive guard band having a width that is not uniform around each side of the in view portion of the frame for reducing an amount of virtual reality data being streamed to each virtual reality device while addressing a head motion artifact latency issue and a scene change issue of streaming virtual reality data;
the backend system having an adaptive guard band component for receiving data about each virtual reality device, determining a motion of each virtual reality device and generating one or more pieces of optimized virtual reality data for each virtual reality device in response to the data about each virtual reality device and the detected motion of the virtual reality device; and
wherein the adaptive guard band component is configured to generate an adaptive guard band for a particular virtual reality device having a wider width in a diagonal direction if the determined motion of the particular virtual reality device is diagonal.

US Pat. No. 10,460,699

TRANSITIONING BETWEEN VIDEO PRIORITY AND GRAPHICS PRIORITY

Dolby Laboratories Licens...

1. In a video receiver, a method for blending graphics data with a processor, the method comprising:receiving input video data and input dynamic metadata for the input video data, wherein the input video data is at a video dynamic range;
receiving input graphics data and input static metadata, wherein the input graphics data is at a graphics dynamic range;
receiving display identification data from a target display to which the video receiver is linked over a video interface;
receiving a blending priority map characterizing a per-pixel priority of output pixels in an image generated based on blending the input video data and the input graphics data;
blending the input video data and the input graphics data to generate blended video data; and
sending the blended video data to the target display for rendering the blended video data at a target dynamic range;
wherein blending the input video data and the input graphics data to generate blended video data comprises computing:
output(i)=a(i)*Rgraphics(i)+(1?a(i))*Rvideo(i),
wherein output(i) denotes an output pixel; Rvideo(i) denotes an input video pixel mapped to the target dynamic range based on a video tone-mapping function; Rgraphics(i) denotes an input graphics pixel mapped to the target dynamic range based on a graphics tone-mapping function, and a(i) denotes a blending value based on the blending priority map; i denotes a pixel index.

US Pat. No. 10,460,698

METHOD FOR RENDERING AN ELECTRONIC CONTENT ON A RENDERING DEVICE

ORANGE, Paris (FR)

1. A method for rendering electronic content on a rendering device, the rendering device communicating with a mobile device, the method comprising the following acts performed by the mobile device:acquiring data by the mobile device,
recognition of the data acquired by the mobile device,
obtaining a set of metadata associated to the acquired data, said metadata being able to be rendered,
selection of a rendering device,
retrieval of configuration parameters of the selected rendering device,
based on the configuration parameters of the selected rendering device, determining that the selected rendering device can only render a part of said set of metadata, sorting said metadata associated to the acquired data into first and second sets, the first set comprising any of the metadata that the selected rendering device is able to render, and the second set comprising any of the metadata that the selected rendering device is not able to render,
transmission to the selected rendering device of the electronic content to be rendered, said electronic content comprising, among said metadata, only all or part of the first set of metadata associated to the acquired data, and
rendering acquired data on the mobile device and said all or part of the first set of additional information on the selected rendering device.

US Pat. No. 10,460,697

CIRCUIT DEVICE INCLUDING COMPARATOR CIRCUIT WITH SWITCHING CIRCUIT FOR OFFSET PREVENTION

SEIKO EPSON CORPORATION, ...

1. A circuit device comprising:a comparator circuit that has a first input terminal and a second input terminal, and compares a voltage that is supplied to the first input terminal with a voltage that is supplied to the second input terminal; and
a switching circuit to which a detection voltage that is based on a result of detection from an environment sensor, and a reference voltage, are input,
wherein the switching circuit supplies the detection voltage to the first input terminal of the comparator circuit and the reference voltage to the second input terminal of the comparator circuit during a first period out of a detection period, and supplies the reference voltage to the first input terminal and the detection voltage to the second input terminal during a second period out of the detection period, and
TB>TA is satisfied, where TA denotes a duration of the detection period, and TB denotes a duration of a period from an end of a first detection period, which is the detection period, to a start of a second detection period, which is a detection period that is subsequent to and consecutive to the first detection period.

US Pat. No. 10,460,696

ELECTRONIC DEVICE FOR REPORTING INFORMATION, DISPLAY METHOD THEREFOR, AND RECORDING MEDIUM

CASIO COMPUTER CO., LTD.,...

1. An electronic device, comprising:a display unit; and
a processor connected to the display unit, the processor being configured to:
acquire first location information of a first location located in a first time zone;
acquire second location information of a second location located in a second time zone that differs from said first time zone;
acquire first information related to said first location information;
acquire second information related to said second location information;
generate differential information representing a difference between the first information related to the first location information and the second information related to the second location information;
specify a location on the display unit at which the second information is displayed; and
control the display unit so as to display an object on the display unit that represents said differential information, said object having a continuous shape that is continuous from a location at which the first information is displayed on the display unit to said specified location at which the second information is displayed on the display unit, at least one of attributes of said continuous shape representing said differential information,
wherein the processor controls said display unit so as to display said object in a peripheral portion of a display region of the display unit.

US Pat. No. 10,460,695

ELECTROCHROMIC DISPLAY DEVICE HAVING A PLURALITY OF SUB-FRAMES

ELECTRONICS AND TELECOMMU...

1. An electrochromic display device comprising:a display panel comprising a plurality of pixels configured to display an image on a basis of a unit frame defined as first to third sub-frames;
a timing controller configured to output a data signal and an off signal; and
a data driving circuit configured to provide, to the pixels, a data voltage generated based on the data signal during the second sub-frame and provide, to the pixels, an off voltage generated based on the off signal during the third sub-frame,
wherein each of the pixels comprises an electrochromic element, and
a power supply voltage is delivered to the electrochromic element in response to the data voltage during the second sub-frame, and the power supply voltage provided to the electrochromic element is blocked in response to the off voltage during the third sub-frame.

US Pat. No. 10,460,694

DISPLAY DEVICE

Japan Display Inc., Toky...

1. A display device which comprises a plurality of signal line drivers which drive a display area of a display panel by dividing the display area into a plurality of division display areas, the plurality of signal line drivers comprising:a master signal line driver including a first output path and a first input path, and driving a first area of the plurality of division display areas; and
a slave signal line driver including a second output path coupled to the first input path and a second input path coupled to the first output path, and driving a second area of the plurality of division display areas, wherein
a direct-current voltage generated in the master signal line driver is output from the first output path and supplied to the second input path, and
the direct-current voltage supplied to the second input path is output from the second output path and supplied to the first input path.

US Pat. No. 10,460,693

LIQUID CRYSTAL PANEL AND DISPLAY DRIVING METHOD THEREOF FOR COMPENSATING COLOR CAST TO IMPROVE VIEWING ANGLES

Shenzhen China Star Optoe...

1. A liquid crystal panel comprising N scan lines, M data lines and N×M pixels arranged in an array, N and M being both positive integers;the scan lines extending in a row direction, the data lines extending in a column direction, the scan lines and the data lines crossing each other and insulating from each other, the pixels each being disposed at a cross of corresponding one of the scan lines and corresponding one of the data lines and being connected to the corresponding one of the scan lines and the corresponding one the data lines, respectively,
wherein when the liquid crystal panel is driven to display, n scan lines that are adjacent to each other receive high potential signals simultaneously, and the M data lines receive data signals simultaneously in a duration of the high potential signals; and the n scan lines receive low potential signals simultaneously in a duration of first low potential signals after the duration of the high potential signals, and receive low potential signals having a lowest voltage simultaneously in a duration of second low potential signals after the duration of the first low potential signals, and the M data lines receive common voltage signals simultaneously in the duration of the first low potential signals and the duration of the second low potential signals,
wherein a potential signal of each of the n scan lines is maintained substantially constant during the duration of the high potential signals, the duration of the first low potential signals, and the duration of the second low potential signals, and
wherein 2?n?N, and n is a positive integer.

US Pat. No. 10,460,692

DISPLAY PANEL AND PRE-CHARGE SWITCHING METHOD FOR PIXEL UNITS THEREOF

HKC CORPORATION LIMITED, ...

1. A display panel, comprising:a substrate, comprising a display area and a wiring area around the display area, wherein a plurality of active switches, a plurality of gate lines, and a plurality of source lines are disposed in the display area, and a pixel unit is disposed at an intersection of each gate line and each source line;
a source drive unit, connected to the plurality of source lines;
a gate drive unit, connected to the plurality of gate lines;
a timing controller, connected to the source drive unit and the gate drive unit; and
a pre-charge line, connected between the timing controller and the gate drive unit, wherein the pre-charge line transmits a pre-charge signal output by the timing controller; and
the timing controller calculates a gray-scale eigenvalue by using a first gray-scale parameter corresponding to pixel units in a first row and a second gray-scale parameter corresponding to pixel units in a second row; the timing controller pulls up a potential of the pre-charge signal when determining that the gray-scale eigenvalue is less than a gray-scale threshold; when the pre-charge signal is at a high potential, the gate drive unit prolongs a duration of providing a scanning signal to a gate line in a first row, and provides a scanning signal to a gate line in a second row within a scanning period of providing the scanning signal to the gate line in the first row.

US Pat. No. 10,460,691

DISPLAY DEVICE WITH STABILIZATION

Samsung Display Co., Ltd....

1. A display device configured to display an image during frame intervals, and to display a blank image during a blank interval defined between the frame intervals, the display device comprising:a gate driving circuit comprising a plurality of stages, an ith stage (i is an integer greater than or equal to 2) from among the plurality of stages comprising a clock terminal configured to receive a clock signal,
wherein a clock signal swings between a first clock voltage and a second clock voltage smaller than the first clock voltage during a normal interval corresponding to each of the frame intervals, the clock signal being greater than a stabilization voltage lower than the second clock voltage during the frame intervals, and the clock signal is changed to the stabilization voltage lower than the second clock voltage during a stabilization interval corresponding to the blank interval,
wherein the ith stage comprises:
a first output unit configured to be turned on/off according to a voltage of a Q-node and output a gate signal including a gate-on signal and a gate-off signal from the clock signal to a gate output terminal of the ith stage;
a control unit configured to control the voltage of the Q-node; and
a first pull-down unit configured to provide a first low signal to the gate output terminal after the gate-on signal is outputted from the first output unit, and
wherein the ith stage further comprises a second output unit configured to be turned on/off according to a potential of the Q-node and output a carry signal including a carry-on signal and a carry-off signal from the clock signal to a carry output terminal of the ith stage.

US Pat. No. 10,460,690

LIQUID CRYSTAL DISPLAY DEVICE AND ELECTRONIC DEVICE INCLUDING THE SAME

Semiconductor Energy Labo...

1. A semiconductor device comprising:a first transistor, a second transistor, a third transistor, a fourth transistor, and a fifth transistor,
wherein the first transistor, the second transistor, the third transistor, the fourth transistor, and the fifth transistor have the same conductivity type,
wherein one of a source and a drain of the first transistor and one of a source and a drain of the second transistor are electrically connected to a first clock signal line,
wherein the other of the source and the drain of the first transistor and the other of the source and the drain of the second transistor are electrically connected to a first gate signal line,
wherein one of a source and a drain of the third transistor and one of a source and a drain of the fourth transistor are electrically connected to a second clock signal line,
wherein the other of the source and the drain of the third transistor and the other of the source and the drain of the fourth transistor are electrically connected to a second gate signal line,
wherein one of a source and a drain of the fifth transistor is electrically connected to a gate of the third transistor,
wherein the other of the source and the drain of the fifth transistor is electrically connected to the first gate signal line,
wherein a channel width of the third transistor is larger than a channel width of the fifth transistor, and
wherein a channel width of the fourth transistor is larger than the channel width of the fifth transistor.

US Pat. No. 10,460,689

GATE DRIVING CIRCUIT

SHENZHEN CHINA STAR OPTOE...

1. A gate driving circuit, comprising multi-stages of gate driving units in series connection with one another,wherein each stage of gate driving unit is configured to output a scanning signal through an output end thereof according to a scanning signal output by a previous stage of gate driving unit, a scanning signal output by a next stage of gate driving unit, and a clock signal; and
wherein each stage of gate driving unit comprises:
an input control module, configured to be controlled by the scanning signal output by the previous stage of gate driving unit so as to control an electric potential of a first node;
an output control module, connected to the first node, and configured to control an electric potential of an output end of a present stage of gate driving unit according to the electric potential of the first node;
a pull-down module, connected to the output control module, and configured to pull down the electric potential of the output end of the present stage of gate driving unit according to an electric potential of a second node;
a pull-down maintenance module, connected to the pull-down module, and configured to maintain the electric potential of the second node during a non-scanning period so that the electric potential of the output end of the present stage of gate driving unit is maintained in a negative electric potential; and
a compensation module, connected to the pull-down maintenance module and the first node, and configured to maintain the electric potential of the first node in a negative electric potential during the non-scanning period.

US Pat. No. 10,460,688

LIQUID CRYSTAL DISPLAY PANEL AND DISPLAY DEVICE HAVING LIQUID CRYSTAL DISPLAY PANEL

Wuhan China Star Optoelec...

1. A liquid crystal display panel, wherein the liquid crystal display panel comprises:a plurality of data line pairs, each set of data line pair comprising a first data line and a second data line which are located side by side;
a plurality of scan lines, comprising a first scan line and a second scan line which are perpendicular with the plurality of data line pairs and alternatively arranged;
a pixel unit array, comprising a plurality of pixel units, which are respectively located in regions formed by arrangement of the plurality of data line pairs and the plurality of scan lines, and each row of pixel units being coupled to a first scan line and a second scan line;
wherein a scan drive signal received by the first scan line and the second scan line scan the two rows of pixel units coupled to each other at the same time, and the first scan line and the second scan line are respectively coupled to at least two pixel units in a single row of the pixel unit, and drives the pixel units coupled to each data line in time division to charge the pixel units coupled to the same data line in time division;
wherein the first data line and the second data line transmit data signals with positive polarity or negative polarity to the coupled pixel units, and the polarities of the entire column of the pixel unit array are inverted, and the pixel units are coupled to the first data line or the second data line which can provide corresponding polarity signals according to self polarities to make the first data line or the second data line be coupled to a plurality of pixel units of the same row at the same time
wherein in the pixel unit, the polarities of the pixels of the entire column are reversed in order of positive, negative, negative, positive, negative, positive, positive, negative.

US Pat. No. 10,460,687

DISPLAY PANEL AND GATE DRIVING CIRCUIT THEREOF

Shenzhen China Star Optoe...

1. A gate driving circuit, wherein the gate driving circuit comprises a plurality of stages of gate driving units, and each stage of gate driving unit comprises:a first pulling control circuit, configured for outputting a first pulling control signal at a first node;
a first pulling circuit, coupled to the first node and configured for receiving a first clock signal and generating a gate driving signal according to the first pulling control signal and the first clock signal, and having a gate driving signal output terminal for outputting the gate driving signal;
a second pulling control circuit, configured for receiving a first signal, a second signal, a third signal and a fourth signal, and outputting a second pulling control signal according to the first signal, the second signal, the third signal and the fourth signal;
a second pulling circuit, coupled to the first node and the gate driving signal output terminal and configured for receiving the second pulling control signal and pulling a level at the first node and a level at the gate driving signal output terminal according to the second pulling control signal;
wherein a frequency of the second pulling control signal is lower than a frequency of the first clock signal but higher than a refresh rate of a display panel to which the gate driving circuit is applied, the second pulling control signal is a square wave pulse control signal;
wherein the first signal is a second clock signal, and a ratio of a frequency of the second clock signal to the frequency of the first clock signal is in a range from 2 to 50;
wherein the frequency of the second clock signal is 4 times of the frequency of the first clock signal, the third signal is the second signal of second preceding stage of gate driving unit, and the fourth signal is the second signal of second succeeding stage of gate driving unit.

US Pat. No. 10,460,686

GATE DRIVING DEVICE, DISPLAY DEVICE INCLUDING THE SAME, AND METHOD FOR DRIVING THE DISPLAY DEVICE FOR REDUCING KICKBACK VOLTAGE

SAMSUNG DISPLAY CO., LTD....

1. A gate driving device comprising:a reference voltage generator configured to generate a kickback compensating reference voltage, wherein the kickback compensating reference voltage decreases during one frame section based on a gate initiation signal; and
a gate output voltage generator configured to decrease a kickback compensating voltage of a gate output voltage based on the kickback compensating reference voltage during the one frame section,
wherein the gate output voltage generator comprises:
a gate-on voltage generator configured to generate a gate-on voltage, the gate-on voltage being a fixed voltage;
a switch configured to output one of the kickback compensating reference voltage or the gate-on voltage to an output terminal based on a kickback compensating signal; and
a load changing circuit coupled to the output terminal and configured to adjust a voltage change slew rate of the output terminal by changing a current flowing to a load from the output terminal when the kickback compensating reference voltage is output.

US Pat. No. 10,460,685

METHOD CIRCUIT AND LIQUID CRYSTAL PANEL FOR COMPENSATING GRAY SCALE VOLTAGE

Shenzhen China Star Optoe...

1. A circuit for a liquid crystal panel, wherein the liquid crystal panel comprises: a plurality of gate lines parallel to one another, a plurality of data lines parallel to one another and intersected with the gate lines in a perpendicular and insulated manner, a plurality of thin film transistors located at intersections of the gate lines and the data lines, a plurality of pixel electrodes and a common electrode, the pixel electrodes are coupled to the data lines via the thin film transistors and arranged opposite to the common electrode;the circuit for the liquid crystal panel comprises a driving circuit and a control circuit;
the driving circuit drives the liquid crystal panel;
the control circuit adjusts a common voltage and/or compensates at least one portion of pixel voltages of at least two different display areas in the liquid crystal panel via the driving circuit to ultimately determine the common voltage and the pixel voltages, the pixel voltage is an alternating inversion voltage of positive and negative polarities such that the pixel voltages of the positive and negative polarities of all the pixels of the at least two different display areas in the liquid crystal panel are symmetrical with respect to the common voltage and maximum pixel voltages of the positive polarity of all the pixels of the at least two different display areas are equal;
the driving circuit also outputs the common voltage and the pixel voltages which are ultimately determine;
the driving circuit comprises a gate line driving circuit, a data line driving circuit and a common electrode driving circuit, the gate line driving circuit is coupled to the gate lines, the data line driving circuit is coupled to the data lines, the gate line driving circuit and the data line driving circuit act on the pixel electrodes, the common electrode driving circuit is coupled to the common electrode and the common electrode driving circuit acts on the common electrode;
the circuit for the liquid crystal panel further comprises an image collecting and processing circuit;
the control circuit comprises a first control circuit and the first control circuit is electrically coupled to the image collecting and processing circuit;
the first control circuit constantly adjusts a value of the common voltage and sets the pixel voltage as one of a positive polarity voltage and a negative polarity voltage corresponding to the value of the common voltage;
the image collecting and processing circuit collects two images including the at least two different display areas of the liquid crystal panel, which are respectively marked as a first positive image and a first negative image after the first control circuit adjusts the value of the common voltage each time, the first positive image corresponds to the pixel voltage of the positive polarity voltage and the first negative image corresponds to the pixel voltage of the negative polarity voltage;
the image collecting and processing circuit further calculates a first similarity of a luminance value of the first positive image and a luminance value of the first negative image;
the image collecting and processing circuit further compares a calculation result of the first similarity with a predetermined threshold range;
the calculation result of the first similarity conforms to the predetermined threshold range and the first control circuit stops operation.

US Pat. No. 10,460,683

SEMICONDUCTOR DEVICE, DISPLAY DEVICE, AND ELECTRONIC DEVICE

Semiconductor Energy Labo...

1. A semiconductor device comprising:a decoder circuit;
an amplifier circuit; and
an arithmetic circuit,
wherein the amplifier circuit comprises a first amplifier and a second amplifier,
wherein one of the first amplifier and the second amplifier is configured to inspect an output of the other of the first amplifier and the second amplifier,
wherein the arithmetic circuit is configured to calculate an error of a potential output from the first amplifier or the second amplifier, on the basis of a result of the inspection, and
wherein the decoder circuit is configured to correct a video signal input to the decoder circuit by subtracting the error of the potential from the video signal.

US Pat. No. 10,460,682

METHOD FOR DRIVING DISPLAY PANEL PIXEL WITH LUMINANCE INTERVAL SIGNAL AND DISPLAY DEVICE THEREFOR

HKC CORPORATION LIMITED, ...

1. A method for driving display panel pixel, comprising:dividing a pixel unit of a display panel into a plurality of pixel sets;
acquiring an original driving data for each of the pixel sets, a hue of each of the pixel sets being acquired according to the original driving data;
acquiring a gray scale value lookup table according to a belonging range of the hue,
the original driving data of every blue sub-pixels in the gray scale value lookup table corresponding to a set of target gray scale value pair, each set of the target gray scale value pair comprising a first voltage signal and a second voltage signal unequal to each other, and a front viewing angle mixing luminance of the blue sub-pixels alternately driven by the first voltage signals and the second voltage signals being equivalent to a front viewing angle luminance of the blue sub-pixels driven by the original driving data;
dividing the blue sub-pixels of each pixel set into a plurality sets of blue pixel pairs, each blue pixel pair comprising a first blue sub-pixel and a second blue sub-pixel adjacent to each other, and the first blue sub-pixel of one of the blue pixel pairs of the adjacent blue pixel pairs being arranged adjacent to the second blue sub-pixel in the other one of the blue pixel pairs;
acquiring a first luminance signal according to different weight values from the first voltage signal of the first blue sub-pixel and the first voltage signals of the plurality of adjacent blue sub-pixels, the first blue sub-pixel being driven according to the first luminance signal; and
acquiring a second luminance signal according to different weight values from the second voltage signal of the second blue sub-pixel and the second voltage signals of the plurality of adjacent blue sub-pixels, the second blue sub-pixel being driven according to the second luminance signal.

US Pat. No. 10,460,681

METHOD AND APPARATUS FOR ADJUSTING GRAY-SCALE CHROMATIC ABERRATION FOR DISPLAY PANEL AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A method for adjusting gray-scale chromatic aberration for a display panel, comprising:inputting a data signal of a test picture to sub-pixels of the display panel, for causing the display panel to display the test picture;
collecting optical parameters of respective regions in the test picture;
comparing the optical parameter of each region in the test picture with an optical parameter of a standard picture; and
adjusting the data signal inputted to the sub-pixels such that a difference between the optical parameter of each region in the test picture and the optical parameter of the standard picture falls within a predetermined range,
wherein the optical parameter comprises a color coordinate and its corresponding brightness;
wherein the method further comprises adjusting a gray-scale color coordinate of the test picture in response to a difference between the color coordinate of each region in the test picture and the color coordinate of the standard picture has an absolute value smaller than a first predetermined threshold.

US Pat. No. 10,460,680

FLEXIBLE DISPLAY PANEL AND DISPLAY METHOD THEREOF

Wuhan China Star Optoelec...

1. A driving method of a liquid crystal display panel, wherein the driving method comprises the steps of:normalizing an image to be displayed, which the image corresponding to each backlight partition of the liquid crystal display panel, to obtain characteristic data of the input image;
extending backlight boundary of each backlight partition according to a default condition, and determining a backlight opening coefficient of each backlight partition by data information after the backlight boundary extension;
the backlight opening coefficient of each backlight partition subjected to a fusion process, to obtain a driving current of the liquid crystal display panel;
obtaining characteristic data of output image of each backlight partition of the liquid crystal display panel based on the characteristic data of the input image and the driving current;
displaying an output image in accordance with the characteristic data of the output image by the driving current to drive the liquid crystal display panel.

US Pat. No. 10,460,679

POWER MANAGEMENT FOR MODULATED BACKLIGHTS

Dolby Laboratories Licens...

1. A display, comprising:a premodulator device including a plurality of individually controllable light sources and being configured to produce a first modulated light according to an image to be displayed, each of the individually controllable light sources being associated with at least one of a plurality of regions of the image to be displayed;
a primary modulator device illuminated by the first modulated light and configured to further modulate the first modulated light to produce further modulated light carrying the image to be displayed; and
a controller coupled to the premodulator device and the primary modulator device, the controller being configured
to evaluate image data representative of the image to be displayed to determine power information associated with each of the regions,
to compare the power information to a threshold power value, and
when the power information indicates an exceedance of the threshold power value, to reallocate power within the premodulator to implement a change in brightness of an area of the first modulated light associated with a particular region and to change modulation by the primary modulator device to accommodate the reallocation of power by the premodulator; and wherein
the controller reallocates power by selectively decreasing the brightness of at least one area of the first modulated light and selectively increasing the brightness of another area of the first modulated light; and
an aggregate brightness of the first modulated light is decreased.

US Pat. No. 10,460,678

DISPLAY DEVICE AND METHOD OF DRIVING THE SAME

SAMSUNG DISPLAY CO., LTD....

1. A display device comprising:a display portion including a plurality of pixels;
a light emitting diode array including a plurality of light emitting diodes and configured to emit light toward the display portion;
a monitoring circuit configured to generate a monitoring signal corresponding to a forward voltage of a first light emitting diode of the plurality of light emitting diodes;
a backlight controller configured to control the amount of current flowing to the light emitting diode array; and
a first luminance compensation circuit configured to increase the amount of current flowing to the light emitting diode array in response to the monitoring signal,
wherein the backlight controller comprises:
a first transistor connected between the light emitting diode array and a ground;
a first amplifier including an output terminal connected to a gate electrode of the first transistor;
a second transistor including a gate electrode connected to a first node, and connected between a power voltage and the first amplifier;
a second amplifier including a first input terminal to which a backlight control signal is input; and
a third transistor including a gate electrode connected to an output terminal of the second amplifier, and connected between the first node and the ground.

US Pat. No. 10,460,677

DISPLAY COMPONENTS AND CIRCUIT COMPONENTS OF DISPLAY DEVICES

Wuhan China Star Optoelec...

9. A circuit component of display devices, comprising:a display panel configured to display displaying signals obtained from a host, the display panel further comprising a display driving circuit and a backlight component, the circuit component comprising:
a flexible circuit board, one end of the flexible circuit board being fixed within the assembly area, and the other end of the flexible circuit board connecting to the host to input the display signals;a backlight driving circuit configured within the flexible circuit board to obtain backlight dynamic adjustment signals from the display driving circuit, process the backlight dynamic adjustment signals, and to drive the backlight component of the display panel by the processed backlight dynamic adjustment signals;wherein the flexible circuit board comprises a component carrier portion and a connection portion, one end of the connection portion connects to an assembly area, and the other end of the connection portion connects to a first end of the component carrier portion, and a second end of the component carrier portion connects to a host;
the backlight driving circuit is configured within the component carrier portion;
wherein the component carrier portion is T-shaped.

US Pat. No. 10,460,676

DISPLAY DEVICE

Sharp Kabushiki Kaisha, ...

1. A display device providing color display in a field-sequential mode by dividing externally provided input image data into a plurality of fields for each frame, providing light in a different color for each of the fields, and providing image data corresponding to the provided light, the device comprising:a display panel with a plurality of pixels arranged in a matrix;
backlighting light source that irradiates the display panel with light of a different color for each of the fields, the backlighting light source including a plurality of light sources emitting light of different colors;
a driver circuit configured to write the image data to the pixels of the display panel for each of the fields;
a light source control circuit configured to control the backlighting light source to provide the light of a different color for each of the fields; and
a data generation circuit that controls the driver circuit and the light source control circuit to write image data corresponding to colors of light emitted by the light sources, provided that the frame is divided into more fields than the number of the light sources, at least two of the light sources emit light in a mixed color for at least one of the fields, and the light sources sequentially emit light for the remaining fields, wherein,
the data generation circuit includes a memory that stores reference values to specify an image display area and compare specific values to identify the pixels included in the input image data with the reference values being read from the memory, so that any pixel with the specific value within a range specified by the reference values is considered to be within the image display area in which image display is provided by obtaining a grayscale value of the image data for each of the fields so as to prioritize color breakup reduction, and any pixel with the specific value out of the range specified by the reference values is considered to be within a transparent display area in which a background is displayed by obtaining a grayscale value of the image data for each of the fields so as to prioritize transparency,
the light sources are light sources emitting red, green, or blue light,
the frame includes a white field for which the red light, the green light, and the blue light are provided simultaneously, a red field for which the red light is provided, a green field for which the green light is provided, and a blue field for which the blue light is provided,
the data generation circuit further includes:
an image display data generating circuit that obtains the grayscale value of the image data for the pixels for each of the fields to prioritize the color breakup reduction; and
a transparent display data generating circuit that obtains the grayscale value of the image data for the pixels for each of the fields to prioritize the transparency,
the image display data generating circuit generates image display data representing an image derived from the input image data, on a basis of the input image data using a minimum grayscale value of the image data for the red field, the green field, and the blue field as a grayscale value of the image data for the white field, and new grayscale values of the image data for the red field, the green field, and the blue field obtained by subtracting the grayscale value of the image data for the white field from each of the grayscale values of the image data for the red field, the green field, and the blue field, and
the transparent display data generating circuit generates transparent display data to display the background on the basis of the input image data using the minimum grayscale value of the image data for the red field, the green field, and the blue field as a grayscale value of the image data for the white field, and the grayscale values of the image data for the red field, the green field, and the blue field as new grayscale values of the image data for the red field, the green field, and the blue field.

US Pat. No. 10,460,675

CONFIGURABLE LIGHTING SYSTEM

Eaton Intelligent Power L...

1. A luminaire comprising:a housing comprising at least one outer surface that forms a cavity;
an aperture that traverses the at least one outer surface of the housing;
a substrate disposed within the cavity;
an electrical connector disposed on the substrate; and
a dial electrically coupled to the electrical connector, wherein the dial has a range of positions, wherein each position within the range of positions of the dial corresponds to a discrete correlated color temperature (CCT) output by a plurality of light sources of the luminaire.

US Pat. No. 10,460,674

ELECTRONIC DEVICE AND POWER ADJUSTMENT METHOD THEREOF

Wistron Corporation, New...

1. An electronic device, comprising:at least one data connection port;
a charge controller and at least one charging connection port, the charge controller controlling a charging power of the at least one charging connection port; and
a power controller, directly or indirectly electrically coupled to the at least one data connection port and the charge controller,
wherein the power controller determines that the at least one charging connection port is connected to an external to-be-charged load and determines that one of the at least one data connection port is not connected to an external data load, and assigns a first idle power corresponding to the at least one data connection port not connected to the external data load to the charge controller for use.

US Pat. No. 10,460,673

PIXEL CIRCUIT, METHOD FOR DRIVING THE SAME, AND DISPLAY PANEL

SHANGHAI TIANMA AM-OLED C...

1. A pixel circuit, comprising:a drive transistor;
a drive control module comprising a data writing sub-module and a threshold compensation sub-module;
a light emitting control module;
a node reset module;
a node initialization module; and
a light emitting device;
wherein the drive control module is configured to control the drive transistor to drive the light emitting device to emit light;
wherein the data writing sub-module is configured to provide a first electrode of the drive transistor with a data signal of a data signal terminal under control of a third scan signal terminal;
wherein the threshold compensation sub-module is configured to write the data signal received at the first electrode of the drive transistor, and wherein threshold voltage of the drive transistor into a gate of the drive transistor under control of the third scan signal terminal;
wherein the node reset module is configured to provide the gate of the drive transistor with a signal of a first voltage terminal under control of a first scan signal terminal before the drive control module controls the drive transistor to drive the light emitting device to emit light;
wherein the node initialization module is configured to provide the gate of the drive transistor with a signal of a reference signal terminal under control of a second scan signal terminal after the node reset module provides the gate of the drive transistor with the signal of the first voltage terminal, and before the drive control module controls the drive transistor to drive the light emitting device to emit light, wherein voltage of the reference signal terminal is different from voltage of the first voltage terminal;
wherein the light emitting control module is configured to provide the first electrode of the drive transistor with the signal of the first voltage terminal under control of a first light emitting control terminal when the node reset module is providing the gate of the drive transistor with the signal of the first voltage terminal, and wherein the light emitting control module is configured to provide an anode of the light emitting device with the signal of the first voltage terminal through the drive transistor when the light emitting device is emitting light; and
wherein the light emitting control module is configured to connect a second electrode of the drive transistor with the anode of the light emitting device under control of a second light emitting control terminal.

US Pat. No. 10,460,672

IMAGE DATA PROCESSING APPARATUS THAT OVERDRIVES PIXELS OF A DISPLAY DEVICE TO INCREASE REACTION SPEED OF THE PIXELS

SILICON WORKS CO., LTD., ...

1. An apparatus for processing image data, the apparatus comprising:a RGBX converter configured to convert red-green-blue (RGB) data of an image frame to RGBX data wherein X indicates a component of R, G, and B, or a component corresponding to a combination of at least one of R, G, and B;
a RGBX encoder configured to generate compressed data of the RGBX data converted by the RGBX converter, and to periodically store the compressed data in a memory;
a first RGBX decoder configured to decompress the compressed data to generate RGBX?(n) data;
a second RGBX decoder configured to decompress the compressed data of a previous period stored in the memory, to generate RGBX?(n?1) data; and
an overdriving (OD) calculating unit configured to compare the RGBX?(n) data and the RGBX?(n?1) data to generate OD RGB X data of the RGBX data converted by the RGBX converter;
wherein the RGB data of the image frame is converted to RGBX data only a single time within the apparatus.

US Pat. No. 10,460,671

SCANNING DRIVING CIRCUIT AND DISPLAY APPARATUS

Shenzhen China Star Optoe...

1. A scanning driving circuit, comprising: a first voltage terminal; a second voltage terminal; a scanning signal output terminal for outputting a high level scanning signal or a low level scanning signal;a pull-up circuit for receiving a clock signal of a current stage and controlling the scanning signal output terminal to output of a high level scanning signal according to the clock signal of the current stage;
a transmission circuit, connected to the pull-up circuit for outputting a high level stage transmission signal of a current stage; a pull-up control circuit, connected to the transmission circuit and receiving a stage transmission signal of a previous stage for charging the pull-up control signal point to pull up the potential of the pull-up control signal point to a high level;
a pull-down maintenance circuit connected to the pull-up control circuit, the first voltage terminal and the second voltage terminal and receiving a high voltage direct current voltage, for maintaining the low level of the pull-up control signal point, and the low level of the scanning signal outputted from the scanning signal output terminal;
a bootstrap circuit for raising the potential of the pull-up control signal point;
a pull-down circuit connected to the transmission circuit, the pull-down maintenance circuit, and the first voltage terminal, for receiving a stage transmission signal of a next stage and controlling the scanning signal output terminal to output the low level scanning signal in accordance with the stage transmission signal of the next stage;
wherein the pull-up circuit comprises a first controllable switch, a first terminal of the first controllable switch receiving the clock signal of the current stage, a control terminal of the first controllable switch is connected to the transmission circuit and the pull-down circuit, a second terminal of the first controllable switch is connected to the transmission circuit and the scanning signal output terminal; and
wherein when the scanning driving circuit is not operated, the second voltage terminal is controlled to be at high potential, and when the scanning driving circuit is operated, the second voltage terminal becomes a low potential, and the low potential is the same with the first voltage terminal; and
wherein the pull-down maintenance circuit comprises fourth to ninth controllable switches, a control terminal of the fourth controllable switch is connected to a control terminal of the fifth controllable switch, a first terminal of the fourth controllable switch is connected to the pull-up control circuit, a second terminal of the fourth controllable switch is connected to the first voltage terminal, a first terminal of the fifth controllable switch is connected to the scanning signal output terminal, a second terminal of the fifth controllable switch is connected to the first voltage terminal, a second terminal of the sixth controllable switch is connected to a first terminal of the seventh controllable switch and the control terminal of the fifth controllable switch, a first terminal of the sixth controllable switch is connected to a first terminal of the eighth controllable switch and a control terminal of the eighth controllable switch and to receive the high voltage direct current voltage, a control terminal of the sixth controllable switch is connected to the second terminal of the eighth controllable switch and a first terminal of the ninth controllable switch, a control terminal of the seventh controllable switch is connected to a control terminal of the ninth controllable switch and the pull-up control circuit, a second terminal of the seventh controllable switch and a second terminal of the ninth controllable switch are both connected to the second voltage terminal.

US Pat. No. 10,460,670

DISPLAY DEVICE AND METHOD FOR CONTROLLING THE SAME

JOLED INC., Tokyo (JP)

1. A display device, comprising:a plurality of pixels, each of which includes an electroluminescent (EL) element and a drive transistor that controls a current flowing through the EL element;
a gate driver circuit that applies, to each of the plurality of pixels, a compensation voltage enable pulse for compensating a threshold voltage of the drive transistor, in each of compensation voltage application periods included in a period other than a period in which a video signal voltage is applied; and
a control circuit that controls the gate driver circuit,
wherein the control circuit adjusts a length of, among the compensation voltage application periods, a preceding compensation voltage application period immediately before the video signal voltage is applied,
wherein the control circuit adjusts the length of the preceding compensation voltage application period based on a timing of a vertical synchronization signal,
wherein a compensation voltage is applied to a gate terminal of the drive transistor of each of the plurality of pixels a predetermined number of compensation voltage application periods in a predetermined compensation operation period that causes a gradual reduction of a pixel voltage to approach the threshold voltage of the drive transistor, and
wherein the predetermined number of compensation application voltage periods is in the range of 20-30.

US Pat. No. 10,460,669

SYSTEM AND METHODS FOR THERMAL COMPENSATION IN AMOLED DISPLAYS

Ignis Innovation Inc., W...

1. A semiconductor device, comprising:a plurality of pixels arranged in an array, the plurality of pixels including one or more first pixels, one or more second pixels different from the one or more first pixels, and a pixel different from the one or more first pixels and the one or more second pixels; and
a controller for programming the pixel to control the brightness of the pixel, and for estimating a temperature of the pixel at a first time with use of one or more pixel temperatures determined only for the one or more first pixels, and for estimating a temperature of the pixel at a second time different from the first time with use of one or more pixel temperatures determined only for the one or more second pixels.

US Pat. No. 10,460,668

PIXEL COMPENSATION METHOD, PIXEL COMPENSATION APPARATUS AND DISPLAY APPARATUS

BOE TECHNOLOGY GROUP CO.,...

1. A pixel compensation apparatus of a display panel, comprising a controller configured to:control, in blanking periods of two adjacent display frames, charging of detection lines for various color sub-pixels to be compensated in a (2n?1)th row and a (2n)th row in the display panel respectively and detect voltages on various detection lines after the charging is performed, where n is a positive integer; wherein the charging comprises inputting a data voltage of non-zero grayscale to each color sub-pixel to be compensated in one of the (2n?1)th row and the (2n)th row, and inputting a data voltage of zero grayscale to each color sub-pixel to be compensated in the other of the (2n?1)th row and the (2n)th row;
determine a detected voltage of each color sub-pixel to be compensated in the row to which the non-zero grayscale is input according to the detected voltages on detection lines for color sub-pixels to be compensated in the (2n?1)th row and the (2n)th row and belonging to the same column; and
compensate for each color sub-pixel to be compensated in the row to which the non-zero grayscale is input in a next display frame according to the detected voltage.

US Pat. No. 10,460,667

DRIVING CONTROL SYSTEM FOR DRIVING PIXEL DRIVING CIRCUIT AND DISPLAY APPARATUS THEREOF

Fitipower Integrated Tech...

1. A driving control system for driving pixel driving circuits in a display apparatus, the pixel driving circuit sequentially operating during a detecting time period and a displaying period,each pixel driving circuit comprising: a storage capacitor; a driving transistor; and an organic light emitting diode (OLED), and a node defining between a source electrode of the driving transistor and the OLED, the driving control system comprising: a selecting circuit electrically connected to the pixel driving circuits, and configured to select at least one of the pixel driving circuit; a compensating circuit electrically connected with the selected at least one of the pixel driving circuits through the selecting circuit; and a controller; wherein during the detecting time period, the driving transistor in the selected at least one of the pixel driving circuits becomes saturated, and the compensating circuit detects a detecting current of the node in the selected at least one of the pixel driving circuits and obtains a specified parameter based on the detecting current, the controller adjusts a pre-driving voltage provided to the selected at least one of the pixel driving circuits based on the specified parameter detected by the compensating circuit, wherein the specified parameter is a time parameter; the compensating circuit converts the detecting current flowing through the node into a pulse signal, the pulse signal switches between a first level voltage and a second level voltage in turn; the compensating circuit further calculates a sum time of the pulse signal in the first level voltage as the time parameter, and wherein the selecting circuit sequentially selects one of the pixel driving circuits to electrically connected to the compensating circuit; the compensating circuit operates in a first sub-detecting time period and a second sub-detecting time period; during the first sub-detecting time period, the selected pixel driving circuit is driven by a predetermined voltage, the compensating circuit senses a first detecting current, converts into a first pulse signal, and obtains a first time parameter; during the second sub-detecting time period, the selected pixel driving circuit is driven by a pre-driving voltage, the compensating circuit senses a second detecting current, converts a second pulse signal, and obtains into a second time parameter; the controller compares a specified value with a difference between the first time parameter and the second time parameter; when the difference is less than the specified value, the controller increases the pre-driving voltage; when the difference is larger than the specified value, the controller decreases the pre-driving voltage; when the difference is equal to the specified value, the controller stores the pre-driving voltage as the driving voltage of the selected pixel driving circuit.

US Pat. No. 10,460,666

ORGANIC LIGHT-EMITTING DIODE DISPLAY DEVICE AND METHOD OF DRIVING THE SAME

LG DISPLAY CO., LTD., Se...

1. An organic light-emitting diode (OLED) display device, comprising:a pixel including:
a driving thin film transistor (TFT) configured to drive an OLED element;
a first switching TFT configured to connect a data line to a gate electrode of the driving TFT by control of a first gate line;
a second switching TFT configured to connect a reference line to a source electrode of the driving TFT by control of a second gate line; and
a capacitor connected between the gate electrode of the driving TFT and the source electrode of the driving TFT; and
a data driver including:
a first amplifier configured to drive the data line with a reference voltage (Vref) or a data voltage (Vdata);
a second amplifier configured to drive the reference line with an initialization voltage; and
a third amplifier configured to sense a voltage of the reference line, and supply a reference sensing voltage to the second amplifier, wherein the voltage of the reference line is based on a threshold voltage (Vth) of the driving TFT.

US Pat. No. 10,460,665

OLED PIXEL DRIVING CIRCUIT AND DRIVING METHOD THEREOF

SHENZHEN CHINA STAR OPTOE...

1. An OLED pixel driving circuit, comprising:a first thin film transistor (TFT), having a gate electrode thereof connected to a second node, and having a source electrode and a drain electrode thereof connected to a third node and a fourth node respectively;
a second TFT, having a gate electrode thereof receiving a first signal, and having a source electrode and a drain electrode thereof connected to the second node and the fourth node respectively;
a third TFT, having a gate electrode thereof receiving a second signal, and having a source electrode and a drain electrode thereof connected to a first node and the second node respectively;
a fourth TFT, having a gate electrode receiving a third signal, and having a source electrode and a drain electrode thereof connected to the fourth node and an anode of an OLED respectively, and the OLED having a cathode connected to a low voltage power source; and
a capacitor, having two ends thereof connected to the first node and the second node respectively;
wherein the third node is connected to a high voltage power source;
wherein the first node is connected to a voltage input end for inputting a data voltage or a reference voltage;
wherein the first TFT, the second TFT, the third TFT, and the fourth TFT are P-type transistors;
wherein a timing arrangement of the first signal, the second signal, and the third signal includes a data voltage storing stage, a threshold voltage compensation stage and an illumination stage, the data voltage storing stage is immediately followed by the threshold voltage compensation stage, and the threshold voltage compensation stage is immediately followed by the illumination stage, the voltage input end inputs the data voltage during the data voltage storing stage and the threshold voltage compensation stage, the voltage input end inputs the reference voltage during the illumination stage, and the data voltage is used to determine a current flow through the OLED.

US Pat. No. 10,460,664

PIXEL COMPENSATION CIRCUIT, SCANNING DRIVING CIRCUIT AND DISPLAY DEVICE

Shenzhen China Star Techn...

1. A pixel compensation circuit, wherein the pixel compensation circuit comprises:a first controllable switch, the first controllable switch comprises a control terminal, a first terminal and a second terminal, the control terminal of the first controllable switch is connected with a scanning line, the first terminal of the first controllable switch is connected with a reference voltage terminal;
a second controllable switch, the second controllable switch comprises a control terminal, a first terminal and a second terminal, the control terminal of the second controllable switch is connected with a light-emitting control terminal, the first terminal of the second controllable switch is connected with the second terminal of the first controllable switch;
a third controllable switch, the third controllable switch comprises a control terminal, a first terminal and a second terminal, the control terminal of the third controllable switch is connected with the scanning line, the first terminal of the third controllable switch is connected with a data cable, the second terminal of the third controllable switch is connected with the second terminal of the second controllable switch;
a driving switch, the driving switch comprises a control terminal, a first terminal and a second terminal, the control terminal of the driving switch is connected with the second terminal of the second controllable switch and the second terminal of the third controllable switch;
an organic light-emitting diode, the organic light-emitting diode comprises an anode and a cathode, the anode of the organic light-emitting diode is connected with the second terminal of the driving switch, the cathode of the organic light-emitting diode is connected with a ground;
a fourth controllable switch, the fourth controllable switch comprises a control terminal, a first terminal and a second terminal, the control terminal of the fourth controllable switch is connected with the light-emitting control terminal, the first terminal of the fourth controllable switch is connected with a first voltage terminal, the second terminal of the fourth controllable switch is connected with the first terminal of the driving switch; and
a memory capacitor, the memory capacitor comprises a first terminal and a second terminal, the first terminal of the memory capacitor is connected with the second terminal of the first controllable switch and the first terminal of the second controllable switch, the second terminal of the memory capacitor is connected with the second terminal of the fourth controllable switch and the first terminal of the driving switch;
wherein the pixel compensation circuit further comprises a fifth controllable switch, the fifth controllable switch comprises a control terminal, a first terminal and a second terminal, the control terminal of the fifth controllable switch is connected with a reset signal terminal, the first terminal of the fifth controllable switch is connected with the second terminal of the driving switch and the anode of the organic light-emitting diode, the second terminal of the fifth controllable switch is connected with a second voltage terminal;
wherein the driving switch, the first controllable switch to the fifth controllable switch are PMOS thin-film transistors, the control terminals, the first terminals and the second terminals of the driving switch, the first controllable switch to the fifth controllable switch are respectively corresponding to a gate electrode, a drain electrode and a source electrode of the thin-film transistor; and
wherein a low level duration of a reset signal outputted from the reset signal terminal is less than a low level duration of a scan signal outputted from the scanning line.

US Pat. No. 10,460,663

ARCHITECTURE FOR VERY HIGH RESOLUTION AMOLED DISPLAY BACKPLANE

Universal Display Corpora...

1. A display comprising:a frontplane comprising OLED pixels, each having a plurality of subpixels;
a first power line configured to be energized periodically and connected to a first set of OLED subpixels;
a second power line configured to be energized periodically when the first power line is not energized, and connected to a second set of OLED subpixels; and
a backplane comprising a driver circuit connected to at least one subpixel of the first set of OLED subpixels and at least one subpixel of the second set of OLED subpixels.

US Pat. No. 10,460,662

ELECTROLUMINESCENT DISPLAY AND METHOD OF SENSING ELECTRICAL CHARACTERISTICS OF ELECTROLUMINESCENT DISPLAY

LG Display Co., Ltd., Se...

1. An electroluminescent display comprising:a display panel including a plurality of pixels, a plurality of gate lines, and a plurality of data lines; and
a driver integrated circuit connected to the data line through a channel terminal,
wherein the driver integrated circuit includes:
a data voltage generator configured to generate a data voltage to be supplied to the pixel;
a first switch connected between the channel terminal and the data voltage generator;
a sensor configured to sense electrical characteristics of the pixel; and
a second switch connected between the channel terminal and the sensor,
wherein each pixel includes:
a driving thin film transistor (TFT) including a control electrode connected to a first node, a first electrode connected to a high potential driving power, and a second electrode connected to a second node;
an organic light emitting diode (OLED) connected between the second node and a low potential driving power;
a first switching TFT including a control electrode connected to a first gate line supplied with a first gate signal, a first electrode connected to the data line, and a second electrode connected to the first node;
a second switching TFT including a control electrode connected to a second gate line supplied with a second gate signal, a first electrode connected to the data line, and a second electrode connected to the second node; and
a storage capacitor connected between the high potential driving power and the first node,
wherein during a degradation tracking period following a first programming period, the first and second switches are turned off, and the first and second switching TFTs are turned on.

US Pat. No. 10,460,661

DISPLAY WITH LIGHT-EMITTING DIODES

Apple Inc., Cupertino, C...

1. A pixel circuit comprising:a positive power supply terminal;
a ground power supply terminal;
a light-emitting diode (LED) that is connected between the positive power supply terminal and the ground power supply terminal;
a drive transistor that is connected in series with the light-emitting diode;
an emission transistor that is connected in series with the drive transistor and the light-emitting diode, wherein the emission transistor is interposed between the light-emitting diode and the drive transistor; and
a semiconducting-oxide switching transistor that is coupled to a gate of the drive transistor.

US Pat. No. 10,460,660

AMOLED DISPLAYS WITH MULTIPLE READOUT CIRCUITS

Ingis Innovation Inc., W...

1. A system for determining the operational voltage VOLED of a light-emitting device in a pixel in an array of pixels in a display, the pixel including a storage capacitor coupled to a drive transistor for supplying current to said light-emitting device as a function of a programming of the storage capacitor, the system comprising:a controller adapted to:
vary a first programming of the storage capacitor and measure a first current supplied to said light-emitting device via said drive transistor, until reaching a final first programming of the storage capacitor when the first current equals a predetermined current, wherein one of the first current and the predetermined current is a function of the operational voltage VOLED of said light-emitting device; and
extract the value of the operational voltage VOLED of said light-emitting device with use of the final first programming of the storage capacitor.

US Pat. No. 10,460,659

PIXEL UNIT STRUCTURE OF ORGANIC LIGHT EMITTING DIODE DISPLAY PANEL AND DRIVING MECHANISM THEREOF

HON HAI PRECISION INDUSTR...

1. A pixel unit structure of an organic light emitting diode display panel, the pixel unit structure comprising:a switch transistor configured to receive a scan signal from a scan driver and receive a data signal from a data driver;
a storage capacitor comprising a first connecting terminal and a second connecting terminal, the switch transistor electrically coupled to the first connecting terminal, the storage capacitor configured to receive the data signal from the switch transistor and receive a discharging reference voltage;
a driving transistor electrically coupled to the second connecting terminal, and configured to receive a driving voltage from a driving voltage supply driver and output a driving current for driving the organic light emitting diode to emit light;
a first control circuit electrically coupled to the second connecting terminal and the driving transistor, the first control circuit configured to receive the scan signal and a first control signal and to relay the driving current from the driving transistor to the organic light emitting diode; and
a second control circuit electrically coupled to the first connecting terminal and the second connecting terminal, the second control circuit configured to receive a second control signal from a second control signal generating driver, to receive a first reference voltage from a first reference voltage supply driver, and to receive a second reference voltage from a second reference voltage supply driver, the second control circuit configured to convert the first reference voltage into the discharging reference voltage, to relay the discharging reference voltage to the storage capacitor, and to provide a discharge path for the storage capacitor; and
an organic light emitting diode electrically coupled to the first control circuit and configured to emit light according to the data signal;
wherein the organic light emitting diode is controlled by the driving transistor and the first control circuit to emit light; and
wherein the second reference voltage is less than the discharging reference voltage;
wherein the scan signal, the first control signal, the second control signal, the discharging reference voltage, and the second reference voltage control the pixel unit to operate in a plurality of time events repeating in sequence, each time event corresponding to a change in a state of the pixel unit being controlled by the scan signal, the first control signal, the second control signal, the discharging reference voltage, and the second reference voltage;
wherein the organic light emitting diode comprises an anode terminal electrically coupled to the first control circuit and the driving transistor, and further comprises a cathode terminal electrically coupled to ground;
a gate electrode of the switch transistor is electrically coupled to a scan line to receive the scan signal from the scan driver;
a source electrode of the switch transistor is electrically coupled to a data line to receive the data signal from the data driver;
a drain electrode of the switch transistor is electrically coupled to the storage capacitor to relay the data signal to the storage capacitor;
the first connecting terminal is electrically coupled to the drain electrode of the switch transistor to receive the data signal, and electrically coupled to the second control circuit to receive the discharging reference voltage;
the second connecting terminal is electrically coupled to the driving transistor and the first control circuit;
a gate electrode of the driving transistor is electrically coupled to the second connecting terminal of the storage capacitor;
a source electrode of the driving transistor is electrically coupled to a driving voltage line to receive the driving voltage from the driving voltage supply driver;
a drain electrode of the driving transistor is electrically coupled to the first control circuit; and
wherein the data signal and the discharging reference voltage control the driving transistor to be in a conducting state, and the driving transistor in the conducting state is controlled by the driving voltage to output the driving current;
wherein the first control circuit comprises a first control transistor and a second control transistor;
a gate electrode of the first control transistor is electrically coupled to the scan line to receive the scan signal from the scan driver;
a source electrode of the first control transistor is electrically coupled to the second connecting terminal;
a drain electrode of the first control transistor is electrically coupled to the drain electrode of the driving transistor;
a gate electrode of the second control transistor is electrically coupled to a first control signal line to receive the first control signal from the first control signal generating driver;
a source electrode of the second control transistor is electrically coupled to the drain electrode of the driving transistor; and
a drain electrode of the second control transistor is electrically coupled to the organic light emitting diode;
wherein the second control circuit comprises a reference resistor and a third control transistor;
a first end of the reference resistor is electrically coupled to a first reference voltage line to receive the first reference voltage from the first reference voltage supply driver;
a second end of the reference resistor is electrically coupled to the first connecting terminal;
the reference resistor converts the first reference voltage into the discharging reference voltage, and relays the discharging reference voltage to the first connecting terminal;
a resistance of the reference resistor is greater than a resistance of the switch transistor for switching from a non-conducting state to a conducting state;
a gate electrode of the third control transistor is electrically coupled to a second control signal line to receive the second control signal from the second control signal generating driver;
a source electrode of the third control transistor is electrically coupled to a second reference voltage line to receive the second reference voltage from the second reference voltage supply driver;
a drain electrode of the third control transistor is electrically coupled to the second connecting terminal; and
electric charge of the storage capacitor is discharged through a conduction path formed by the first connecting terminal, the second connecting terminal, and the third control transistor, the second connecting terminal is between the first connecting terminal and the third control transistor.

US Pat. No. 10,460,658

ORGANIC LIGHT-EMITTING DISPLAY PANEL AND DRIVING METHOD THEREOF, AND ORGANIC LIGHT-EMITTING DISPLAY DEVICE

SHANGHAI TIANMA AM-OLED C...

1. An organic light-emitting display panel, comprising:a pixel matrix including a plurality of pixel driving circuits, wherein the plurality of pixel driving circuits includes a first pixel driving circuit, and a second pixel driving circuit disposed adjacent to the first pixel driving circuit along a row direction of the pixel matrix;a plurality of reference voltage signal lines for providing a reference voltage signal; a plurality of data lines; a plurality of light-emitting signal lines; anda plurality of scanning signal lines including a first and a second scanning signal line, wherein a pixel driving circuit of the plurality of pixel driving circuits includes a driving transistor and is connected to a reference voltage signal line, a first transistor, a second transistor, a third transistor, a first capacitor, a data line, a light-emitting signal line, and a scanning signal line,
the first pixel driving circuit is connected to the first scanning signal line, and the second pixel driving circuit is connected to the second scanning signal line,
a gate electrode of the first transistor is connected to the light-emitting signal line, a first electrode of the second transistor is connected to the reference voltage signal line, a second electrode of the second transistor is connected to a gate electrode of the driving transistor,
a first electrode of the third transistor is connected to the data line, and a second electrode of the third transistor is connected to a first electrode of the driving transistor,
a gate electrode of the second transistor and a gate electrode of the third transistor are connected to a same scanning signal line,
two plates of the first capacitor are connected to the gate electrode and the first electrode of the driving transistor, respectively,
an anode of the organic light-emitting diode is connected to the first electrode of the driving transistor, and a cathode of the organic light-emitting diode is connected to a voltage signal line, and
the first and the second pixel driving circuits share a same data line that is configured to time-sharingly provide an initialization signal to the first and the second pixel driving circuits, time-sharingly detect threshold voltages of driving transistors in the first and the second pixel driving circuits, and time-sharingly provide a compensated data signal to the first and the second pixel driving circuits, wherein
the pixel driving circuit further includes the organic light-emitting diode and a light-emitting control module;
in the pixel driving circuit, the light-emitting control module is configured to charge the driving transistor, and the driving transistor is configured to supply a light-emitting current to the organic light-emitting diode: and
the first pixel driving circuit and the second pixel driving circuit share a same light-emitting control module;
a first voltage signal line, wherein:
the light-emitting control module further includes the first transistor, a first electrode of the first transistor is connected to the first voltage signal line, and a second electrode of the first transistor is connected to a second electrode of the driving transistor; wherein
in the same light-emitting control module shared by the first and the second pixel driving circuits, the second electrode of the first transistor is connected to a second electrode of a driving transistor in the first pixel driving circuit and a second electrode of a driving transistor in the second pixel driving circuit.

US Pat. No. 10,460,657

EL DISPLAY DEVICE AND METHOD FOR DRIVING EL DISPLAY DEVICE

JOLED INC., Tokyo (JP)

1. An electroluminescent (EL) display device comprising:a display screen including a plurality of pixels arranged in rows and columns;
a first gate signal line and a second gate signal line which are disposed for each of the rows of the plurality of pixels;
a gate driver circuit which outputs a first control voltage to the first gate signal line and a second control voltage to the second gate signal line;
a current generating circuit which supplies a current to the plurality of pixels of the display screen;
a current amount obtaining circuit which obtains a magnitude of a current flowing through the display screen; and
a control voltage generating circuit which generates the first control voltage output by the gate driver circuit to the first gate signal line,
wherein each of the plurality of pixels includes:
an EL element;
a driving transistor which supplies a driving current to the EL element;
a first switching transistor disposed in a path of the driving current, the first switching transistor having a voltage applied across a channel and adjusted based on the first control voltage supplied from the first gate signal line; and
a second switching transistor which switches between a conducting state and a non-conducting state based on the second control voltage supplied from the second gate signal line, the second switching transistor applying a video signal to the driving transistor,
wherein the current amount obtaining circuit obtains the magnitude of the current flowing through the display screen by performing an operation on video data input to the display screen, the operation being performed on the video data before the video data is input to the display screen,
wherein, when the current amount obtaining circuit detects the magnitude of the current increases, the control voltage generating circuit decreases a magnitude of the first control voltage, which is output by the gate driver circuit to the first gate signal line, in order to increase the voltage applied across the channel of the first switching transistor to thereby decrease current flowing through the EL element and lower a peak luminance of light emission, and
wherein, when the current amount obtaining circuit detects the magnitude of the current decreases, the control voltage generating circuit increases the magnitude of the first control voltage, which is output by the gate driver circuit to the first gate signal line, in order to decrease the voltage applied across the channel of the first switching transistor to thereby increase the current flowing through the EL element and increase the peak luminance of light emission.

US Pat. No. 10,460,656

DISPLAY PANEL AND DISPLAY DEVICE

SHANGHAI TIANMA AM-OLED C...

1. A display panel, comprising:a first area and a second area, wherein the first area comprises a middle area, a first subarea and a second subarea, the first subarea and the second subarea are separated by the middle area;
the first subarea comprises at least two pixels, one or more first driving signal lines extending in a row direction of the pixels and a first driving circuit; wherein one end of at least one of the first driving signal lines is electrically connected to the first driving circuit and the other end of the first driving signal line extends to an edge of the first subarea close to the middle area; and the first driving circuit is configured to drive the first driving signal lines located in the first subarea;
the second subarea comprises at least two pixels, one or more second driving signal lines extending in the row direction of the pixels and a second driving circuit; wherein one end of at least one of the second driving signal lines is electrically connected to the second driving circuit and the other end of the second driving signal line extends to an edge of the second subarea close to the middle area; and the second driving circuit is configured to drive the second driving signal lines located in the second subarea;
wherein the first driving circuit comprises at least two cascaded first shift register units, wherein each of the first shift register units is respectively electrically connected with a first clock signal line, a first reference voltage signal line and at least one first driving signal line correspondingly, and an input signal terminal of a first-stage first shift register unit is connected to a first initial signal terminal, and an input signal terminal of each of other stages of first shift register units is connected to a driving signal output terminal of its adjacent previous stage of first shift register unit; and
the second driving circuit comprise at least two cascaded second shift register units, wherein each of the second shift register units is respectively electrically connected with a second clock signal line, a second reference voltage signal line and at least one second driving signal line correspondingly, and an input signal terminal of a first-stage second shift register unit is connected to a second initial signal terminal, and an input signal terminal of each of other stages of second shift register units is respectively connected to a driving signal output terminal of its adjacent previous stage of second shift register unit;
wherein the first subarea further comprises at least two first connecting lines insulated from each other; or the second subarea further comprises at least two second connecting lines insulated from each other;
in the first subarea, one end of each of at least two first driving signal lines is correspondingly electrically connected to a same first shift register unit, and the other ends of the at least two first driving signal lines are electrically connected via one first connecting line;
in the second subarea, one end of each of at least two second driving signal lines is correspondingly electrically connected to a same second shift register unit, and the other ends of the at least two second driving signal lines are electrically connected via one second connecting line.

US Pat. No. 10,460,655

GAMMA TUNING METHOD AND GAMMA TUNING DEVICE

BOE TECHNOLOGY GROUP CO.,...

19. A gamma tuning method, comprising:collecting characteristic data of a driver IC of a to-be-debugged module;
creating a standard gamma curve in accordance with the collected characteristic data of the driver IC of the to-be-debugged module;
comparing grayscale binding points of the to-be-debugged module with the standard gamma curve;
determining a to-be-tuned grayscale binding point from the grayscale binding points of the to-be-debugged module in accordance with a comparison result between the grayscale binding points of the to-be-debugged module and the standard gamma curve; and
tuning a grayscale brightness value of the to-be-tuned grayscale binding point in accordance with a target brightness value of the grayscale binding point on the standard gamma curve.

US Pat. No. 10,460,654

SEMICONDUCTOR DEVICE AND DISPLAY APPARATUS

JOLED INC., Tokyo (JP)

1. A semiconductor device which controls display of a display panel, the semiconductor device comprising:a receiving circuit which receives a plurality of communication frames,
each of the plurality of communication frames
being transmitted with a first period or a second period different from the first period, and
including a synchronization code and data;
a logic circuit configured to operate in two operation states, the two operation states including a first operation state and a second operation state,
in the first operation state, one or more communication frames of the first period received by the receiving circuit are each processed as data other than a digital video signal, wherein the data other than the video signal include control data from the semiconductor device and dummy data attached to a payload of a respective communication frame of the one or more communication frames, and
in the second operation state, one or more communication frames of the second period received by the receiving circuit are each processed as the digital video signal;
a detecting circuit which detects the synchronization code from each of the plurality of communication frames received by the receiving circuit;
a measuring circuit which measures a period of the synchronization code detected in each of the plurality of communication frames, the period of the synchronization code either corresponding to the first period or the second period; and
a determining circuit which determines whether the period of the synchronization code measured corresponds to the first period or the second period, wherein
the logic circuit transitions to the first operation state or the second operation state based on whether the period of the synchronization code measured corresponds to the first period or the second period,
wherein the receiving circuit receives at least one frame in a previous operation state even after an operation state has been changed to a new operation state at the receiving circuit.

US Pat. No. 10,460,653

SUBPIXEL WEAR COMPENSATION FOR GRAPHICAL DISPLAYS

MICROSOFT TECHNOLOGY LICE...

1. A method of compensating for subpixel wear in a graphical display device having a plurality of color-specific subpixels spatially distributed across a display region of the graphical display device, the method comprising:for each color-specific subpixel of a subset of the plurality of color-specific subpixels in which an input display value is generated for each color-specific subpixel of the subset by a host computing device connected to the graphical display device:
sampling one or more display signals directed to the color-specific subpixel to obtain a time-series of sampled values;
storing, in non-volatile storage, compensation data for the color-specific subpixel derived from the time-series of sampled values;
receiving the input display value generated by the host computing device:
applying the compensation data to the input display value to obtain a compensated display value;
driving the color-specific subpixel based on the compensation data, including driving the color-specific subpixel with a compensated display signal based on the compensated display value.

US Pat. No. 10,460,652

SCAN DRIVER CIRCUIT AND LIQUID CRYSTAL DISPLAY DEVICE HAVING THE CIRCUIT

Wuhan China Star Optoelec...

1. A scanning driving circuit, the scanning driving circuit comprising a plurality of cascaded scanning driving unit, each scanning driving unit comprising:a forward and reverse scanning circuit for receiving a previous level scanning signal and a first clock signal and outputting a first control signal to control the scanning driving circuit performing forward scanning, or for receiving a next level scanning signal and a second clock signal and outputting a second control signal to control the scanning driving circuit performing reverse scanning;
an input circuit connected to the forward and reverse scanning circuit, for receiving a third clock signal and receiving the first and the second control signal from the forward and reverse scanning circuit, and according to the third clock signal, the first and the second control signal to perform charging to the pull-up control signal point and the pull-down control signal point; and
an output circuit connected to the input circuit for performing a process to a received third or the fourth control signal and a data received from the input circuit, generating a scanning driving signal with two-valued high electrical level and outputting to the current level scanning line to drive a pixel unit;
wherein the third control signal comprises a fourth clock signal, the fourth control signal comprises the fourth clock signal;
the forward and reverse scanning circuit comprises a first controllable switch and a second controllable switch, the control terminal of the first controllable switch receives the first clock signal, a first terminal of the controllable switch receives the previous level scanning signal, a second terminal of the first controllable switch is connected to the first terminal of the second controllable switch and the input circuit, a control terminal of the second controllable switch receives the second clock signal, a second terminal of the second controllable switch receives the next level scanning signal;
the input circuit comprises a third to seventh controllable switches, a first capacitor and a second capacitor, a control terminal of the third controllable switch is connected to turn-on voltage terminal signal, a first terminal of the third controllable switch is connected to a control terminal of the fourth controllable switch, the second terminal of the first controllable switch and the first terminal of the second controllable switch, a second terminal of the third controllable switch is connected to a first terminal of the fifth controllable switch and the output circuit, a second terminal of the fifth controllable switch is connected to a second terminal of the fourth controllable switch, a second terminal of the sixth controllable switch and a second terminal of the seventh controllable switch receive the turn-off voltage terminal signal, a control terminal of the fifth controllable switch is connected to a first terminal of the fourth controllable switch and a control terminal of the sixth controllable switch, a first terminal of the sixth controllable switch is connected to a first terminal of the seventh controllable switch and the output circuit, a control terminal of the seventh controllable switch receives the third clock signal, a first terminal of the first capacitor is connected to the control terminal of the fifth controllable switch, a second terminal of the first capacitor is connected to the output circuit, the second capacitor is connected between the control terminal and the second terminal of the sixth controllable switch;
the output circuit comprises eighth-twelfth controllable switches and a third capacitor, a control terminal of the eighth controllable switch is connected to the second terminal of the third controllable switch, the first terminal of the fifth controllable switch and a control terminal of the twelfth controllable switch, a first terminal of the eighth controllable switch is connected to a second terminal of the ninth controllable switch, a second terminal of the eighth controllable switch is connected to the first terminal of the sixth and seventh controllable switches, a second terminal of the twelfth controllable switch and the current level scanning line, a control terminal of the ninth controllable switch receives the reset signal, a first terminal of the ninth controllable switch is connected to a control and a first terminals of the tenth controllable switch, a first terminal of the eleventh controllable switch and a second terminal of the first capacitor receive the fourth clock signal, a second terminal of the tenth controllable switch is connected to the control terminal of the eleventh controllable switch, a second terminal of the eleventh controllable switch is connected to a first terminal of the twelfth controllable switch, the third capacitor is connected between the control and the second terminals of the eighth controllable switch.

US Pat. No. 10,460,651

METHOD FOR DRIVING DISPLAY

SUNDIODE KOREA, (KR)

1. A method of driving a display having a light emitting diode (LED), comprising:applying a driving pulse to each of pixels using a driving circuit through a pulse width modulation method to control times for illuminating lights of primary colors having red, green, and blue of each pixel,
wherein the light emitting diode comprises a multi junction light emitting diode, in which a plurality of layers configured to illuminate different colors are combined, and
wherein the multi junction light emitting diode has a first n-type semiconductor layer formed on a substrate, a first light emitting layer formed on the first n-type semiconductor layer for generating light of a first color, a p-type semiconductor layer formed on the first light emitting layer, a second light emitting layer formed on the p-type semiconductor layer for generating light of a second color different from the first color, and a second n-type semiconductor layer formed on the second light emitting layer, and
wherein a plurality of levels correspond to a plurality of turn-on durations of each pixel, which correspond to an amount of light emission defined in one refresh cycle for light generation.

US Pat. No. 10,460,650

DISPLAY DEVICE, DRIVING METHOD THEREOF, AND NON-TRANSITORY COMPUTER READABLE RECORDING MEDIUM

SAMSUNG ELECTRONICS CO., ...

1. A display device for displaying an image frame during a scan period, the display device comprising:a display comprising a plurality of light-emitting diode (LED) lines;
a scan driver; and
a processor configured to:
based on the image frame being received, control the scan driver to supply a power to the plurality of LED lines during a first sub-period among a plurality of sub-periods into which the scan period is divided, and
control the scan driver to firstly supply, during a second sub-period among the plurality of sub-periods, the power to a LED line that is different than a LED line to which the power is firstly supplied during the first sub-period or a LED line to which the power is lastly supplied during the first sub-period, from among the plurality of LED lines,
wherein the second sub-period is next to the first sub-period among the plurality of sub-periods.

US Pat. No. 10,460,649

AUTOMATICALLY SELECTING A SET OF PARAMETER VALUES THAT PROVIDE A HIGHER LINK SCORE

Dell Products L.P., Roun...

1. A method comprising:selecting, by a display controller of a display device, a first set of parameter values from multiple sets of parameter values;
configuring, by the display controller, a video input of the display device based at least in part on the first set of parameter values;
receiving, by the display controller, a request to initiate link training from a video source that is connected to the video input;
initiating, by the display controller, the link training;
generating, by the display controller, a current link score after the link training is successfully completed, wherein the link score comprises a sixteen-bit value that includes one or more error flags and one or more quality measurements ordered from a most significant bit (MSB) to a least significant bit (LSB) in order of significance;
determining, by the display controller, that the current link score is greater than a stored link score;
setting a value of the stored link score to be the current link score;
storing the first set of parameter values to create a stored set of parameter values;
determining, by the display controller, that each set of parameter values from the multiple sets of parameter values has been selected; and
configuring, by the display controller, the video input of the display device based at least in part on the stored set of parameter values.

US Pat. No. 10,460,648

DISPLAY PANEL DRIVEN IN A COLUMN INVERSION AND DOT INVERSION AND METHOD FOR CONTROLLING THE SAME

AU OPTRONICS CORPORATION,...

1. A method for controlling a display panel, comprising:providing a display panel, wherein the display panel comprises a plurality of pixels arranged into a plurality of columns and rows and a plurality of data lines, one of the data lines is coupled to pixels arranged in odd number rows of one of two columns adjacent to the one of the data lines, and the one of the data lines is coupled to pixels arranged in even number rows of the other one of the two columns adjacent to the one of the data lines;
receiving data signals in a driving manner of column inversion by the data lines during a display period; and
receiving the data signals in a driving manner of N-dot inversion by the data lines during a blanking period;
wherein a flicker value of the display panel ranges from ?52.1 dB to ?53.7 dB.

US Pat. No. 10,460,647

DISPLAY DEVICE AND ELECTRONIC DEVICE

Semiconductor Energy Labo...

17. A display device comprising:a pixel circuit; and
a buffer circuit comprising a first transistor and a second transistor,
wherein the second transistor overlaps with the first transistor,
wherein a source of the first transistor is electrically connected to a source of the second transistor,
wherein a drain of the first transistor is electrically connected to a drain of the second transistor,
wherein a gate of the first transistor is electrically connected to a gate of the second transistor, and
wherein the sources of the first transistor and the second transistor or the drains of the first transistor and the second transistor are electrically connected to the pixel circuit.

US Pat. No. 10,460,646

DISPLAY SYSTEM, DISPLAY DEVICE, ELECTRONIC APPARATUS, AND IMAGE SIGNAL TRANSMISSION METHOD FOR DISPLAYING AN ORIGINAL IMAGE BASED ON COMBINING DIVIDED IMAGE SIGNALS

NEC DISPLAY SOLUTIONS, LT...

16. An image signal transmission method that is carried out in a display system that includes a display device and an electronic apparatus that is electrically connected by a connector to said display device, said method comprising:said electronic apparatus receiving or generating an original image signal that indicates an original image that is to be displayed and supplying a plurality of divided image signals that each indicate a respective image of a plurality of partial images obtained by dividing said original image; and
said display device displaying said original image on a basis of a combined image signal realized by combining said plurality of divided image signals that are supplied from said electronic apparatus,
wherein said electronic apparatus supplies a first divided image signal that indicates a first partial image of two partial images obtained by dividing said original image either vertically or horizontally, and a second divided image signal that indicates a second partial image of the two partial images,
wherein said display device combines said first and second divided image signals to supply a combined image signal that indicates said original image,
wherein said display device comprises:
a first memory into which is written first data that indicates said first partial image that is indicated by said first divided image signal;
a second memory into which is written second data that indicates said second partial image that is indicated by said second divided image signal;
a first memory input circuit that reads said first data from said first memory;
a second memory input circuit that reads said second data from said second memory, wherein said first and second memory input circuits use a same clock signal to perform reading of said first and second data from said first and second memories;
a first signal receiver circuit that receives said first divided image signal from said electronic apparatus and supplies as output each of said first data, a first clock signal, and a first Data Enable signal;
a second signal receiver circuit that receives said second divided image signal from said electronic apparatus and supplies as output each of said second data, a second clock signal of a same frequency as said first clock signal, and a second Data Enable signal;
a first memory input circuit that, at a write timing indicated by said first Data Enable signal, writes said first data to said first memory in synchronization with said first clock signal;
a second memory input circuit that, at a write timing indicated by said second Data Enable signal, writes said second data to said second memory in synchronization with said second clock signal; and
a clock generation circuit that supplies a third clock signal of a same frequency as said first or second clock signal, and
wherein each of said first and second memory input circuits uses, of said first and said second Data Enable signals, the Data Enable signal having the later timing or a Data Enable signal having a later timing than both said first and second Data Enable signal to read data on the basis of said third clock signal from, of said first and second memories, a corresponding memory at a read timing that is indicated by the Data Enable signal.

US Pat. No. 10,460,645

POWER SUPPLYING SYSTEM AND POWER MODULE

SAMSUNG ELECTRONICS CO., ...

1. A signal processing system comprising:a sub apparatus; and
a main apparatus configured to supply power to a display apparatus and the sub apparatus,
wherein the sub apparatus is configured to supply power to an external apparatus based on information being received from the external apparatus, supply power transformed into a voltage corresponding to the information to the external apparatus,
wherein the sub apparatus is configured to transmit an image signal, received from the external apparatus, to the main apparatus, and
wherein the main apparatus is configured to decode the image signal and transmit the decoded image signal to the display apparatus.

US Pat. No. 10,460,644

DRIVING SYSTEMS OF DISPLAY PANELS

Wuhan China Star Optoelec...

4. A driving system of display panels, comprising:a main board and a display panel, the main board being configured with a driving chip, and the driving chip electrically connecting to the display panel via a flexible circuit board to drive the display panel to display;
wherein the display panel comprises a display area and a non-display area configured below the display area, the non-display area comprises a lead unit, a splitter unit, a testing unit, and a fan-out unit arranged in sequence;
wherein sub-pixels in the display area electrically connect to the lead unit, the lead unit electrically connects to the splitter unit, the splitter unit and the testing unit electrically connect to the fan-out unit respectively, and the fan-out unit electrically connects to the driving chip.

US Pat. No. 10,460,643

METHOD, DEVICE AND NON-TRANSITORY COMPUTER-READABLE STORAGE MEDIUM FOR CONTROLLING FRAME RATE OF MOBILE TERMINAL

GUANGDONG OPPO MOBILE TEL...

1. A method for controlling a frame rate of a mobile terminal, comprising:obtaining a rendering frame rate of a target object in a current running scene, the target object including a target application or a target layer and the rendering frame rate being a number of times image rendering is performed per unit of time;
setting the rendering frame rate of the target object as a composition frame rate in the current running scene, the composition frame rate being a number of frames of images to be displayed composed per unit of time; and
composing rendered images in the current running scene at the composition frame rate into a composed image, and displaying the composed image;
wherein composing the rendered images in the current running scene at the composition frame rate into the composed image comprises:
when a plurality of applications are running in the current running scene, composing, according to the rendering frame rate of the target application, images rendered by the plurality of applications into the composed image; or
when one application is running in the current running scene, composing, according to the rendering frame rate of the target layer, images rendered by the application into the composed image.

US Pat. No. 10,460,642

NOISE REDUCTION IN LED SENSING CIRCUIT FOR ELECTRONIC DISPLAY

Apple Inc., Cupertino, C...

1. A display device, comprising:a pixel configured to display image data; and
a circuit comprising:
a comparator component configured to change states when an input voltage crosses a threshold voltage;
a current source configured to provide a current to the comparator component;
a capacitor configured to couple across the comparator component, wherein the capacitor is configured to provide the input voltage to the comparator component when receiving the current; and
a controller configured to:
open a switch configured to couple the current source to the comparator component when the comparator component changes states;
acquire a plurality of samples of a voltage output by the comparator component after the comparator component changes states;
determine an average value associated with the plurality of samples; and
calibrate the pixel based on the average value.

US Pat. No. 10,460,641

IMAGE PROCESSING CIRCUIT AND DISPLAY DEVICE USING THE HISTOGRAM ANALYZER TO PERFORM A DIFFERENTIAL SHIFT AND EXTENSION SHIFT OF IMAGE DATA GRAY LEVEL TO ADJUST GRAY LEVEL RESPECT TO THE BRIGHTNESS IMAGE LEVEL

LG DISPLAY CO., LTD., Se...

7. A display device comprising:a display panel for displaying an image using a light generated from a light emitting device; and
an image processing circuit that processes image data to be displayed the display panel,
wherein the image processing circuit comprises:
a perceived brightness calculator that calculates a perceived brightness picture level indicating a level of perceived brightness of an input image of a single frame;
a differential extension unit that extends gray levels of the input image to higher gray levels by applying a differential gain to each gray level of the input image based on the perceived brightness picture level and outputs a modified image data having a histogram extended to the higher gray levels to display an image; and
an overdriver that overdrives the light emitting device disposed in a region for implementation of high gray levels higher than or equal to a threshold gray level in the gray levels of the input image extended to the higher gray levels,
wherein the light emitting device comprises a plurality of light sources contained in a plurality of light source blocks disposed on a rear surface of a liquid display panel employed as the display panel,
wherein, when the input image of the single frame contains image data of the high gray levels higher than or equal to the threshold gray level, the overdriver generates a control signal to turn on a larger number of light sources or turn on the light sources for a longer duration than inverse case, and
wherein the overdriver applies a typical gamma curve for implementation of first peak luminance to low/middle gray levels higher than or equal to a threshold gray level in the image extended to the higher gray levels, and applies a gamma curve increasing linearly from luminance of the threshold gray level to second peak luminance higher than the first peak luminance to the high gray levels to modulate data.

US Pat. No. 10,460,640

DISPLAY APPARATUS AND METHOD OF OPERATING THE SAME

SAMSUNG DISPLAY CO., LTD....

1. A display apparatus comprising:a timing controller configured to generate first output image data based on first input image data and a first gamma lookup table, and configured to generate second output image data based on second input image data and a second gamma lookup table; and
a display panel configured to operate based on the first output image data during a first duration, and configured to operate based on the second output image data during a second duration subsequent to the first duration,
wherein the first and second gamma lookup tables correspond to a same region of the display panel, and the first and second gamma lookup tables differing to cause luminance of an image based on the first gamma lookup table to differ from luminance of an image based on the second gamma lookup table and to cause a residual direct current (DC) voltage in the display panel to decrease prior to saturation of the residual DC voltage.

US Pat. No. 10,460,639

LUMINANCE COMPENSATION SYSTEM AND LUMINANCE COMPENSATION METHOD THEREOF

LG Display Co., Ltd., Se...

1. A luminance compensation system of a display device, comprising:a display panel including a plurality of pixels, each of the plurality of pixels including a driving thin film transistor (TFT) configured to generate a driving current based on a gate-source voltage and an organic light emitting diode (OLED) configured to emit light based on the driving current;
a luminance meter configured to measure luminance of the display panel at a plurality of positions while a plurality of modeling voltage patterns are applied to the display panel, and to obtain, for each of the plurality of positions, a plurality of measured values;
a first modeling circuit configured to model the plurality of measured values and to derive a first luminance characteristic approximate equation including at least one compensation parameter for an entire grayscale for each of the plurality of positions; and
a second modeling circuit configured to:
determine a luminance error between the measured values and approximate luminance values of the first luminance characteristic approximate equation at low grayscale sampling voltages of a low grayscale section,
calculate an offset correction parameter by multiplying the determined luminance error by a low grayscale correction gain, and
apply the offset correction parameter to the first luminance characteristic approximate equation to derive a second luminance characteristic approximate equation in which a low grayscale offset is corrected.

US Pat. No. 10,460,638

INTERMITTENT DISPLAY ISSUE MONITORING SYSTEM

HONEYWELL INTERNATIONAL I...

1. A system to detect intermittent failures of a display system comprising a display and a display processing system, comprising:a sensor system configured to capture a light level of the display, the sensor system comprising:
a light sensor configured to output a voltage representative of the light level received by the light sensor;
a filter coupled to an output of the light sensor, the filter configured to filter the output voltage at a frequency corresponding to a flicker of a light bulb;
a programmable gain amplifier coupled to an output of the filter, the programmable gain amplifier configured to amplify the filtered output voltage and transmit the filtered output voltage to the processor; and
an offset adjustment circuit coupled between the programmable gain amplifier and the processor, the offset adjustment circuit configured adjust a gain of the programmable gain amplifier to center the amplified filtered output voltage around an input voltage range of the processor; and
a processor communicatively coupled to the sensor system and the display processing system, the processor configured to:
transmit instructions to generate a static image for a predetermined amount of time to the display processing system, the instructions causing the display processing system to generate the static image on the display for the predetermined amount of time;
determine, when the display is displaying the static image, a baseline light level of the display based upon data received from the sensor system;
validate an existence of an intermittent display error when the light level of the display is greater than the baseline light level by a first predetermined amount or when the light level of the display is less than the baseline light level by a second predetermined amount at least once over the predetermined amount of time;
determine, when the existence of the intermittent display error is validated, a recurrence rate based upon instances when the light level of the display is greater than the baseline light level by the first predetermined amount or when the light level of the display is less than the baseline light level by the second predetermined amount and the predetermined amount of time; and
associate, when the existence of the intermittent display error is validated, an error type with each instance that the light level of the display is greater than the baseline light level by the first predetermined amount or when the light level of the display is less than the baseline light level by the second predetermined amount.

US Pat. No. 10,460,637

IMAGE PROJECTION APPARATUS

CANON KABUSHIKI KAISHA, ...

1. An image projection apparatus comprising:a light modulation element; and
a pixel shift unit configured to shift an optical path of light from a pixel in the light modulation element and to shift a position on a projection surface of a projection pixel formed on the projection surface by a projection optical system with the light,
wherein the pixel shift unit includes:
an optical element configured to shift the optical path in one direction among directions orthogonal to an optical axis from the light modulation element to the projection optical system; and
a rotating unit configured to rotate the optical element around an axis that is parallel to an optical axis direction, so as to change a shift direction of the optical path by the optical element.

US Pat. No. 10,460,636

CONTROL OF SELECTIVE ACTUATION OF A LIGHT FILTER ARRAY

Nokia Technologies Oy, E...

1. A method comprising:in a standard display mode, causing display of a graphical element at a position on a see through display that comprises a light projection display that overlays a light filtration array such that the light projection display projects the graphical element at the position on the see through display and the light filtration array filters at least a portion of ambient light at the position on the see through display;
transitioning from the standard display mode to a low power display mode that configures the see through display to consume less power than the see through display consumes in the standard display mode;
causing termination of display of the graphical element on the see through display based, at least in part, on the low power display mode;
determining that an event has occurred, wherein the event is unrelated to a view of a viewer of the see through display;
generating a notification that signifies the event;
causing actuation of the light filtration array such that a plurality of light filtration cells of the light filtration array are selectively actuated in a pattern that depicts the notification based, at least in part, on the low power display mode.

US Pat. No. 10,460,635

DEPLOYABLE TAPE ESTABLISHING VISIBILITY IN FIELD ENVIRONMENTS

1. A portable signaling assembly comprising:a composite strip with a broad and flat profile, said composite strip comprising:
an elongate reflective strip formed of a metalized film having a first planar surface and a second planar surface opposed the first planar surface, said elongate strip having a first end configured with a first attachment mechanism and a second end opposite the first end configured with a second attachment mechanism;
a first attachment point configured in the first end;
a second attachment point configured in the second end; and
an elongate reinforcing strip longitudinally affixed to the elongate reflective strip configured so as to reinforce the elongate reflective strip against longitudinal loads;
a first swivel member attached to the first attachment point;
a second swivel member attached to the second attachment point;
a first stretchable member attached to the first swivel member; and
a second stretchable member attached to the second swivel member;
wherein the portable signaling assembly is configured so that when the composite strip is held taut in air by the first and second stretchable members the composite strip freely twists and rotates along a line formed between the first and second attachment points when a breeze contacts the broad and flat profile to create a visual signaling display as a result of twisting and rotation of the elongated reflective strip in which the elongated reflected strip is twisted at least once through one hundred and eighty degrees so that the first planar surface and the second planar surface are visible from a single vantage point.

US Pat. No. 10,460,634

LED LIGHT ASSEMBLY WITH TRANSPARENT SUBSTRATE HAVING ARRAY OF LENSES FOR PROJECTING LIGHT TO ILLUMINATE AN AREA

Ultravision Technologies,...

1. A light assembly comprising:a thermally conductive support structure with an attachment point for securing the support structure to a supporting element;
a heat sink;
a substantially planar circuit board attached to the support structure;
a plurality of LEDs attached to the circuit board to form an array, the LEDs being thermally coupled to the heat sink; and
a single transparent substrate overlying all LEDs attached to the circuit board and including a corresponding plurality of optical elements;
wherein each optical element includes a first portion configured to direct light from the corresponding LED away from the circuit board in a first direction, a second portion configured to direct light from the corresponding LED away from the circuit board in a second direction, and a third portion configured to direct light from the corresponding LED away from the circuit board in a third direction so that the light is directed asymmetrically so as to illuminate a substantially rectangular area that is off-center relative to the light assembly.

US Pat. No. 10,460,633

PIXEL ARRAY, DISPLAY SUBSTRATE AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

3. A pixel array, comprising a plurality of pixel units, wherein each pixel unit comprises a plurality of windmill-shaped sub-pixels,each windmill-shaped sub-pixel is configured to display one primary color,
each windmill-shaped sub-pixel comprises a plurality of separated parts which are disposed around a center position of this windmill-shaped sub-pixel, and the plurality of separated parts are disposed apart from each other,
between two adjacent separated parts of each windmill-shaped sub-pixel, a separated part of an adjacent windmill-shaped sub-pixel is disposed, the pixel array, further comprises:
a plurality of switching components, and a plurality of gate lines and a plurality of data lines,
the plurality of gate lines and the plurality of data lines are intersected with each other and are electrically connected with the plurality of switching components respectively,
each windmill-shaped sub-pixel comprises a corresponding switching component to collectively control a state of working of the plurality of separated parts of this windmill-shaped sub-pixel.

US Pat. No. 10,460,632

SYSTEMS AND METHODS FOR AUTOMATIC PHYSICAL OBJECT STATUS MARKING

Walmart Apollo, LLC, Ben...

1. An automatic physical object status marking system using electronic labels, the system comprising:a plurality of electronic labels, each electronic label configured to be affixed to a corresponding one of a plurality of physical objects disposed in a first location of a facility, at least one electronic label including a display, a RFID tag encoded with a first identifier, and an image capturing device affixed to the at least one electronic label, the at least one electronic label configured to:
capture, via the image capturing device, an image of one or more attributes associated with a first one of the physical object;
transmit the one or more attributes to a first computing system; and
display a machine-readable element encoded with a second identifier on the display based on the image, the first identifier is associated with the at least one electronic label and the second identifier is associated with a first one of the physical objects on which the at least one electronic label is affixed;
the first computing system including a database and being in selective communication with the at least one electronic label, the first computing system configured to:
receive instructions to modify a status associated with the at least one physical object;
query the database to retrieve the second identifier associated with the first one of the physical objects and the first identifier associated with the at least one electronic label; and
control the display of the at least one electronic label to display a first indicator associated with the status;
at least one RFID reader disposed with respect to a second computing system, the second computing system configured to:
detect the RFID tag of the at least one electronic label affixed to the first one of the physical objects in response to the RFID tag being within range of the RFID reader; and
transmit the first identifier encoded in the RFID tag to the second computing system, and
wherein the second computing system is disposed at a second location in the facility and is operatively coupled to an optical scanner, the first computing system, and the at least one RFID reader, and
wherein the second computing system is prevented from scanning the machine-readable element associated with the physical object in response to receiving the first identifier from the RFID reader.

US Pat. No. 10,460,631

PRIVACY LABEL

1. A privacy label comprising:a liner sheet, said liner sheet comprising a first surface and a second surface opposite said first surface;
a label sheet, said label sheet comprising a top surface, an underside surface opposite said top surface, and one or more edges defining a boundary of said label sheet, said top surface adapted for printing indicia thereon, said label sheet comprising a line of weakness defining a first segment and a second segment in said label sheet, said first segment and said second segment together defining an area for printing said indicia thereon, said first segment being, separable from said second segment along said line of weakness, said underside surface of said, label sheet comprising a first adhesive, wherein a portion of said underside surface of said label sheet is releasably bonded to said first surface of said liner sheet;
an intermediate sheet between said liner sheet and said label sheet, said intermediate sheet being smaller in size than both said liner sheet and said label sheet, said intermediate sheet comprising an upper surface and a lower surface opposite said upper surface, said lower surface of said intermediate sheet comprising a second adhesive, wherein said upper surface of said intermediate sheet is releasably bonded to said underside surface of said label sheet in a position underlying at least all of said second segment of said label sheet, and wherein said lower surface of said intermediate sheet is releasably bonded to said first surface of said liner sheet, wherein said label sheet and said intermediate sheet may be simultaneously separated from said liner sheet, with said intermediate sheet remaining adhered to said underside surface of said second segment of said label sheet and said first adhesive and said second adhesive being exposed;
wherein when said label sheet and said intermediate sheet together are separated from said liner sheet and adhered to a surface of an object, said lower surface of said intermediate sheet and said underside surface of said first segment of said label sheet are permanently adhered to said surface of said object, and said underside surface of said second segment of said label sheet is removable from said intermediate sheet.

US Pat. No. 10,460,630

BABY BOTTLE-ADAPTABLE REUSABLE LABEL

1. A baby bottle-adaptable reusable label, the label comprising:a resilient sleeve comprising a resilient material,
the sleeve being defined by an inner wall and an outer wall, the outer wall being oppositely disposed to the inner wall,
the outer wall operable to enable marking and erasing of a removable identifying indicia, the outer wall comprising a pre-printed permanent identifying indicia,
the sleeve further being defined by a pair of peripheral edges running around the walls, the peripheral edges forming four notches, wherein each of the peripheral edges has a thickness;
wherein each of the at least one notch has an inwardly-extended gripping surface for allowing the thumbs to rest thereon; and
wherein each of the notches has a square shape, and each of the notches is arranged on an opposite side of the sleeve.

US Pat. No. 10,460,629

PERPETUAL MONTH DISPLAY CALENDAR

1. A perpetual month display calendar consisting of:a month/day display loop, comprising 12 horizontal pieces shaped as rectangular prisms, characterized in that they contain 2 vertical holes that bear 2 vertical elastic bands that bind the pieces together forming a flexible and expandable loop; and that the pieces display, on the upper front area, the name of a month, and on the front lower area, the days of the week initials horizontally aligned and equidistant from each other;
a date display loop, into which said month/day display loop is inserted, comprising a plurality of vertical pieces characterized in that they are shaped as rectangular prisms; that consist of 9 large pieces that display 5 cells on the front side, 5 medium pieces that display 4 cells on the front side, and 5 small pieces that display 1 cell on the front side and are blank on the back side; that said large and medium pieces contain 2 horizontal holes that bear 2 horizontal elastic bands that bind them together; and that the small pieces are attached to the medium pieces on the top or bottom, using a means that allows the small pieces to rotate freely, in order to hide or expose the numbers displayed on them; that each display loop piece contains cells that either display a number or are blank; that one large piece is left blank and is positioned opposed to the medium piece displaying the first date of the month; that when the date display loop is flattened, the arrangement of the 7 front pieces displays a layout of numbers arranged in a 7×5 grid (7 columns by 5 rows), which are horizontally sequenced until the seventh column, resuming the sequence on the first column of the next row; and that said arrangement can be configured to form the 7 possible month layouts by shifting the pieces horizontally, namely, having the first date of the month matching any of the 7 days of the week;
and a back cover, attached to the other assembled components, comprising 2 upper hooks that are inserted in the 2 vertical holes that bear the vertical elastic bands of the month/day display loop, and a front panel that can perform one or more of the following functions: a blank flat surface, a marketing display for business-related imagery and/or text, a photo frame, a chalkboard, and/or a corkboard.

US Pat. No. 10,460,628

TILE MAP SERVICE DEVICE AND METHOD

Electronics and Telecommu...

1. A tile map service (TMS) device, comprising:a data storage that stores map layers that have different map types, map data of an image tile form having a level of detail (LOD) structure of each of the map layers, and a tile map in which image tile maps of a plurality of map layers are merged; and
a processor that:
receives map request information including two or more map types, an LOD level, and arbitrary map coordinates from a client,
checks whether a previously merged tile map is present in the cache of the data storage using the map types, the LOD level, and the map coordinates included in the map request information by searching a cache structure of the storage,
generates a new tile map based on the map request information in which the image tile maps of the plurality of map layers are merged when the result of the checking is that the tile map corresponding to the map request information is not present,
caches the generated new tile map in the data storage corresponding to the LOD level, the merged map type, and the map coordinates, and
provides a tile map corresponding to the map request information to the client,
wherein each of the map layers have the same map tile coordinates.

US Pat. No. 10,460,627

NON-CONSUMABLE RESPIRATOR TRAINING FILTER

The United States of Amer...

1. A training filter, comprising:an upper shell having a central hole;
a lower shell adjoined to said upper shell; and
a plug positioned in said substantially central hole and extending through said lower shell, wherein said plug comprises:
a top wall having a plurality of apertures;
a valve adjacent to said top wall and said plurality of apertures;
said plug defining a hollow breathing resistance core adjacent to said valve;
an angled sidewall flanking said breathing resistance core adjacent said top wall; and
a connection mechanism connected to said plug opposite the top wall.

US Pat. No. 10,460,626

AQUEOUS GEL COMPOSITION FOR BODY ORGAN MODEL, AND BODY ORGAN MODEL

FUJIFILM Corporation, Mi...

1. An aqueous gel composition for a body organ model,wherein brittleness and tenderness measured through a multiple integration bite method are respectively within ranges of 1.10 to 1.70 and 2.94 MPa to 4.90 MPa,
wherein the aqueous gel composition for a body organ model comprises polyvinyl alcohol and gelatin, and
wherein the mass ratio (polyvinyl alcohol/gelatin) is 90/10 to 60/40.

US Pat. No. 10,460,625

SYSTEM AND METHOD FOR IMPROVED MEDICAL SIMULATOR

The General Hospital Corp...

1. A medical simulation system, comprising:a human manikin;
at least one hardware module in the human manikin, the at least one hardware module including identification information and providing incremental functionality to the human manikin;
an interface processor configured to receive the identification information from the at least one hardware module;
a computational device that is at least one of in communication with and included in the interface processor to receive the identification information, the computational device configured to access a memory having stored thereon an arbitrator function;
a communication bus and a power source coupled to the human manikin, the communication bus configured to provide communication between the at least one hardware module and the interface processor, and the power source configured to power the at least one hardware module when power is required by the at least one hardware module; and
wherein when the arbitrator function is executed by the computational device, a compatibility status of the at least one hardware module with at least one of the human manikin and, the arbitrator function configured to:
verify the power source is capable of powering the at least one hardware module;
identify the compatibility status of the at least one hardware module;
identify the incremental functionality available to the medical simulation system based on the compatibility status; and
wherein the computational device generates an alert when the power source is not capable of powering the at least one module.

US Pat. No. 10,460,624

SYSTEM AND METHOD FOR PRINTING EDIBLE MEDICAMENT DOSAGE CONTAINERS HAVING IDENTIFYING INDICIA AT DISPENSING SITES

Xerox Corporation, Norwa...

1. A method for producing medicament containers at a dispensing site comprising:using a computer and interface to select single dose medicament container configuration data from a database for a single dose medicament container that corresponds to a medicament to be dispensed, the single dose medicament container configuration data corresponding to a single dose medicament container for the medicament without the medicament;
entering with the computer and interface data corresponding to a number of the single dose medicament containers to make and at least one time for taking single doses of the medicament;
sending the single dose medicament container configuration data and the entered data to a three-dimensional (3D) object printer; and
operating the 3D object printer with reference to the single dose medicament container configuration data and the entered data to form with edible material only the entered number of single dose medicament containers without the medicament in any of the single dose medicament containers and forming at least one of the single dose medicament containers with indicia indicating one time in the at least one time for taking a single dose of the medicament to be placed in the at least one single dose medicament container.

US Pat. No. 10,460,623

TOOL SIMULATION SYSTEM, SIMULATION WORKPIECE, AND METHOD OF OPERATION

1. A simulator system for use in simulating fabrication or construction, comprising:a simulation tool comprising a magnet mounted in fixed relation to a working end of the simulation tool;
a simulation workpiece comprising a substrate having a visible alignment indicator provided thereon, and at least one tool path indicator; and
a sensor device, comprising:
a visible alignment indicator on an exterior of the sensor device;
at least one magnetic sensor, memory, and a microprocessor in communication with the at least one magnetic sensor and the memory, configured to detect a magnetic field from the simulation tool and to determine a path travelled by the simulation tool with respect to the sensor device, while the visible alignment indicator of the sensor device is maintained in physical alignment with the visible alignment indicator of the simulation workpiece.

US Pat. No. 10,460,622

ASSISTED PROGRAMMING USING AN INTERCONNECTABLE BLOCK SYSTEM

1. An interconnectable block based system comprising:a plurality of interconnectable blocks; and
a processing unit, coupled to the plurality of interconnectable blocks, configured to:
determine a programming language construct, or a portion thereof, based on a sequence in which the plurality of interconnectable blocks are connected to each other,
execute the programming language construct, or the portion thereof, to generate an output, and
transmit the output to an output device, wherein the output device is at least an electroacoustic transducer device or an electroluminescent device, wherein the output device is coupled to the interconnectable block based system;
wherein at least one interconnectable block has at least one pinhole that can accommodate another electroluminescent device to indicate a particular state of the at least one interconnectable block.

US Pat. No. 10,460,621

ADVANCED DEVICE FOR WELDING TRAINING, BASED ON AUGMENTED REALITY SIMULATION, WHICH CAN BE UPDATED REMOTELY

Seabery Soluciones, S.L.,...

7. An apparatus, comprising:a welding mask including a set of confocal cameras operably coupled to video glasses, the video glasses configured to display, to a wearer of the welding mask during use, a three-dimensional mixed-reality setting including real images captured by the set of confocal cameras and at least one virtual element, the set of confocal cameras configured to recognize:
a first marker having a first predetermined pattern disposed on a removable tip of a welding torch, the removable tip replaceable with each tip from a set of further tips each having an associated pattern different from the first predetermined pattern; and
a second marker having a second predetermined pattern associated with a workpiece, and the welding mask configured to permit interaction between the welding torch, the workpiece and the at least one virtual element within the three-dimensional mixed-reality setting in response to the first predetermined pattern and the second predetermined pattern being recognized.

US Pat. No. 10,460,620

DEVICE FOR LINKING BODILY MOVEMENT TO LEARNING BEHAVIOUR AND METHOD WHEREBY SUCH A DEVICE IS APPLIED

I3-TECHNOLOGIES, NAAMLOZE...

1. A method for linking seat movement to learning behavior, the method comprising:providing an arrangement of a plurality of objects that are cube-shaped seating units in an arbitrary pattern around the central teaching module that is wirelessly connected to a digital module in each cube-shaped seating unit, the digital module being configured to detect movements of the respective cube-shaped seating unit caused by the pupils to answer questions or assignments;
transmitting, by the digital module in the respective cube-shaped seating unit, the position or the movement of the respective cube-shaped seating unit wirelessly to the central teaching module when the pupils give an answer to an assignment by moving the respective cube-shaped seating unit; and
sending an individual wireless signal by the central teaching module to each cube-shaped seating unit related to the movement that is made with the respective cube-shaped seating unit, the individual wireless signal including an identification of the cube-shaped seating unit for which the individual wireless signal is intended, evaluating an individually-provided answer from the cube-shaped seating unit to which the individual wireless signal is sent as to whether the answer was right or wrong or providing another evaluation of the answer, and providing an individual light signal on each cube-shaped seating unit from which the pupil can read at the respective cube-shaped seating unit whether the answer was right or wrong, or an indication of the other evaluation of the answer,
wherein each of the cube-shaped seating units is equipped with one or more of movement detectors and orientation detectors that are connected to the digital module of the respective cube-shaped seating unit to detect the movement and the position of the respective cube-shaped seating unit, and
the method further comprises transmitting, by the movement detectors and the orientation detectors, the movements and the positions caused by the pupil to answer questions or assignments to the digital module of the respective cube-shaped seating unit.

US Pat. No. 10,460,619

METHOD AND SYSTEM OF CUSTOMIZING SCRIPTURE STUDY

1. A method of customizing scripture study via a graphical user interface comprising:providing a graphical user interface having at least two distinct areas comprising an interactive area and a display area, wherein the interactive area comprises text entry, selectable passages, and links to study resources;
saving and outputting information after implementing the following steps:
(a) specifying a range of scripture which includes:
(i) selecting a plurality of passages varying from a small assortment of passages to a complete canon of scripture;
(ii) selecting a passage format of verse, chapter, or book;
(b) randomly generating by a computer processor a study passage which includes;
(i) assigning a reference number to each passage;
(ii) using dice to randomly generate a reference number;
(iii) matching dice reference number using a reference table;
(c) said computer processor optimizes the study of the random study passage by linking to various resources such as a commentary, lexicon, study guide, timeline, concordance, original language helps, maps, and a memorization tool;
(d) storing in a database said study passage including said reference table with said matched dice reference number;
(e) transmitting over a network a study report including said reference table with said matched dice reference number.

US Pat. No. 10,460,618

SCORING RULE APPLICATION TARGET SPECIFICATION METHOD, CORRECT/INCORRECT DETERMINATION RULE SETTING METHOD, APPLICATION TARGET SPECIFYING DEVICE, CORRECT/INCORRECT DETERMINATION RULE SETTING DEVICE, AND COMPUTER-READABLE RECORDING MEDIUM

FUJITSU LIMITED, Kawasak...

1. A non-transitory computer-readable recording medium storing a scoring rule application target specification program that causes a computer to execute a process comprising:first receiving a first image from a scanner which retrieves a surface of a print medium with no answer;
second receiving specification of one or more first answer areas to input a period and a comma in the first image;
third receiving specification of one or more first question areas in the first image;
specifying coordinates of the first question areas;
specifying one or more second answer areas included in a second question area wherein the first answer areas include the second answer areas and the first question areas include the second question area;
fourth receiving the period and the comma corresponding to the second answer areas respectively, from an input device;
storing question numbers, the second question area, the second answer areas and the period and the comma in an answer table respectively;
fifth receiving a second image from the scanner which retrieves a surface of a second print medium having a period and a comma;
identifying the period and the comma included in areas corresponding to the second answer areas in the second image; and
determining whether the period or the comma in the second image are corresponding to the period or the comma in the answer table respectively.

US Pat. No. 10,460,617

TESTING SYSTEM

SHL Group Ltd, Thames Di...

1. One or more devices for constructing a test for assessing psychological traits of a subject by means of a forced-choice assessment test, the one or more devices comprising:an assessment server, adapted to interact with the subject to be tested over a computer network;
wherein the assessment server comprises one or more computers and one or more computer-readable media storing instructions that are executable by the one or more computers, wherein the one or more computers and one or more computer-readable media implement:
a test construction engine for constructing a test, the test comprising a plurality of item blocks, wherein each item block comprises a plurality of items, each item relating to a psychological trait, and at least two of the items in an item block relating to different psychological traits, to which the subject is required to respond by at least partially ranking items from the item block, comprising:
an interface that provides access to a database, the database adapted to store information pertaining to a plurality of scales, each scale being related to a psychological trait of the subject to be assessed, and a plurality of items, each item being associated with at least one scale and representing a stimulus to which the subject may respond;
a test generator module adapted to generate a plurality of item blocks from items obtained from the database;
a test configurator module for receiving a request for an item block; and
a selector adapted to select, from among multiple item blocks, an item block to include in the test, the selector adapted to select the item block in dependence on the request and an information optimization index, wherein the selector is adapted to determine the information optimization index for each item block from a potential information gain from the subject being required to respond to the item block;
a test administrator module for applying the test to the subject via a user terminal for displaying the test to the subject and receiving a response from the subject; and
a scoring engine for scoring the subject response to each item block of the test and assessing a psychological trait of the subject based on the subject item block response score; and
wherein the item block response score of the subject for a first item block is used to determine a second item block.

US Pat. No. 10,460,616

METHOD AND SYSTEM FOR ACTIVE LEARNING

Active Learning Solutions...

1. A system for conducting interactive learning session in a classroom or presentation in a presentation hall, comprising:a first network infrastructure;
a first processing server connected to the first network infrastructure and configured to serve multimedia lecture or presentation material content data and exchange data from one or more mobile computing devices connected to the first network infrastructure;
the one or more mobile computing devices, each having a computer processor configured for receiving and displaying the multimedia lecture or presentation material content data, facilitating user input, and receiving the input data;
wherein each computer processor of the at least one mobile computing device adapted to be used by a lecturer or presenter is configured to provide a user interface to be used by lecturer or presenter;
and each computer processor of the two or more mobile computing devices adapted to be used by students or audience is configured to provide a user interface to be used by students or audience;
wherein the first processing server and the one or more mobile computing devices are interconnected via the first network infrastructure;
wherein the mobile computing device adapted to be used by the lecturer or presenter is further configured to control and monitor display, sound volume, power on/off, sleep mode on/off, interactive multimedia contents playback, access authorization to data in the first processing server, network resource access, network connectivity, volume, storage capacity, battery level, and general device conditions of each of the one or more mobile computing devices adapted to be used by students or audience;
wherein the mobile computing device adapted to be used by the lecturer or presenter is further configured to control and monitor the first network infrastructure, adjusting and segmenting connectivity coverage area of the first network infrastructure, enabling and disabling network connections and networked resource accesses of each of the one or more mobile computing devices adapted to be used by students or audience;
wherein the one or more mobile computing devices adapted to be used by students or audience being divided into two or more logical sub-groups of one or more mobile computing devices adapted to be used by students or audience according to user input received by the mobile computing device adapted to be used by the lecturer or presenter;
wherein the mobile computing device adapted to be used by the lecturer or presenter is further configured to control real-time delivery of one or more different parts of the multimedia lecture or presentation material content data to each of the one or more mobile computing devices adapted to be used by students or audience, and to control which one or more parts of the multimedia lecture or presentation material content data being delivered to each of the logical sub-groups;
wherein the one or more different parts of the multimedia lecture or presentation material content data are delivered to the one or more mobile computing devices simultaneously, enabling a real-time synchronized interactive lecture or presentation experience among the students or audience in the classroom or presentation hall;
wherein the multimedia lecture or presentation material content data is divided into the one or more different parts according to a pre-configured setting or user input received by the mobile computing device adapted to be used by the lecturer or presenter; and
wherein each of the one or more mobile computing devices is further configured in to synchronize playback of content data and user interface action with the other one or more mobile computing devices such that when one of the mobile computing devices is interrupted in the playback of content data or user interface action, playback of content data or user interface action in the other mobile computing devices is stopped until the interruption is resolved.