US Pat. No. 10,141,094

MOUNTING ARRANGEMENT FOR INDUCTIVE OUTLET

POWERMAT TECHNOLOGIES LTD...

1. A mounting arrangement for securing a wireless power outlet having a primary inductive coil and components to an underside of a surface, the mounting arrangement comprising:an electronics housing configured for containing the components therein;
a closed coil basin containing therein the primary inductive coil configured to be spaced apart from said electronics housing;
a lid configured to cover the coil basin; and
a heat sink that is thermally connected to the primary inductive coil by a flexible thermal conductor and is configured to expel thermal energy,
wherein the coil basin is spaced apart into an aperture formed within the surface, and
wherein said heat sink comprises a base and a heat rejector thermally connected thereto by said flexible thermal conductor.

US Pat. No. 10,141,093

REACTOR

AUTONETWORKS TECHNOLOGIES...

1. A reactor comprising:a coil made of a wound coil wire;
a magnetic core on which the coil is arranged, and that forms a closed magnetic path, wherein the magnetic core has an inner core section that is arranged on an inside of the coil; and
a heat dissipating sheet that is interposed at least partially between an inner circumferential surface of the coil and an outer circumferential surface of the inner core section that is opposite to the inner circumferential surface of the coil, wherein:
the heat dissipating sheet is in contact with the coil and the inner core section and the heat dissipating sheet is only at a lower surface of the inner core section, and
the inner core section includes a middle body section forming the magnetic path, and a middle resin molded section that covers at least a part of an outer circumferential surface of the middle body section.

US Pat. No. 10,141,092

POCKET HOLSTER

1. A system for carrying a device, comprising:at least one first ferromagnetic area disposed on at least one surface of the device;
at least one second ferromagnetic area configured to interact with the at least one first ferromagnetic area, the at least one second ferromagnetic area including at least:
a first raised area;
a second recessed area; and
a third raised area, wherein the first and third raised areas are substantially co-planar; and
at least one magnet configured to be removably received by the at least one second ferromagnetic area, the at least one magnet configured to fit within the second recessed area.

US Pat. No. 10,141,091

MAGNETOPLUMBITE-TYPE FERRITE MAGNETIC MATERIAL AND SEGMENT-TYPE PERMANENT MAGNET DERIVED THEREFROM

UNION MATERIALS CORPORATI...

1. A ferrite magnetic material comprising a primary phase of a hexagonal magnetoplumbite ferrite, the primary phase having a composition represented by formula (I):Ca(1-x-y-z)SrxBayAzFe(2n-m1-m2)Mm1M?m2O19  (I)wherein,A is bismuth (Bi) and at least one element selected from the group consisting of La, Nd, Pr, and Sm, with La being essentially contained in A;
M is at least one element selected from the group consisting of Co, Mn, Ni, and Zn, with Co being essentially contained in M;
M? is Cr;
0.02?x?0.3;
0.02?y?0.09;
0.35?z?0.5;
0.2?m1?0.4;
0.02?m2?0.07;
9.0?2n?11.0,wherein the values of x, y and m2 satisfy the conditions of 0.1?x+y<0.3, and 0.04?y+m2?0.16, and wherein the values of x, y, z, m1 and m2 satisfy the conditions of 0.09?y/(x+y)?0.5, 0.3?(x+y)/(m1+m2)?0.8, and 1.4?(1?z)/(m1+m2)?1.6.

US Pat. No. 10,141,090

RESIN COMPOSITION, PASTE FOR FORMING A VARISTOR ELEMENT, AND VARISTOR ELEMENT

NAMICS CORPORATION, Niig...

1. A resin composition comprising:(A) an epoxy resin;
(B) a curing agent; and
(C) carbon nanotubes,
wherein the carbon nanotubes contain therein semiconducting single-walled carbon nanotubes in an amount of 70% by weight or more.

US Pat. No. 10,141,088

RESISTOR

PANASONIC INTELLECTUAL PR...

1. A resistor comprising:a resistive element made of metal and having an upper surface, a lower surface, a first edge surface connected to the upper surface and the lower surface, and a second edge surface connected to the upper surface and the lower surface;
a first resin substrate provided on the upper surface of the resistive element, the first resin substrate having a high thermal conductivity;
a first heat radiator plate made of metal provided on an upper surface of the first resin substrate;
a second heat radiator plate made of metal provided on the upper surface of the first resin substrate such that the second heat radiator plate is separated from the first heat radiator plate via a first gap;
a first edge-surface electrode provided on the first edge surface of the resistive element, the first edge-surface electrode being connected to the first heat radiator plate;
a second edge-surface electrode provided on the second edge surface of the resistive element, the second edge-surface electrode being connected to the second heat radiator plate;
a second resin substrate provided on an upper surface of the first heat radiator plate and an upper surface of the second heat radiator plate;
a third heat radiator plate made of metal provided on an upper surface of the second resin substrate, the third heat radiator plate being connected to the first edge-surface electrode; and
a fourth heat radiator plate made of metal provided on the upper surface of the second resin substrate such that the fourth heat radiator plate is separated from the third heat radiator plate via a second gap and is connected to the second edge-surface electrode,
wherein the first gap and the second gap are disposed at positions different from each other viewing from above.

US Pat. No. 10,141,087

WIRING HARNESS PRODUCTION MOUNTING

LASELEC, Toulouse (FR)

1. A system for the production of wire harnesses, comprising:at least one cable routing element (200, 21);
at least one display screen (101) for displaying data for assisting with the production of wire harnesses;
at least one attachment surface (103, 400) associated with said at least one display screen, said at least one attachment surface being configured to receive said at least one cable routing element (200, 21); and
a processing unit configured to implement a method for assisting with the production of wire harnesses, the processing unit operatively connected to the at least one display screen (101) and configured to provide the data for assisting with the production of the wire harnesses,
wherein said at least one cable routing element comprises an attachment suction cup that attaches said at least one cable routing element to said at least one attachment surface (103, 400) associated with said at least one display screen.

US Pat. No. 10,141,086

CABLE FOR HIGH SPEED DATA COMMUNICATIONS

Lenovo Enterprise Solutio...

1. A method of manufacturing a cable for high speed data communications, the method comprising:providing a first inner conductor enclosed by a first dielectric layer and a second inner conductor enclosed by a second dielectric layer, the first inner conductor substantially parallel to the second inner conductor and to a longitudinal axis; and
wrapping a conductive shield around the first and second inner conductors, including overlapping the conductive shield along and only about the longitudinal axis, wherein the overlap is aligned with a low current plane, the low current plane substantially parallel to the first and second inner conductors, substantially equidistant from the first and second inner conductors, and substantially orthogonal to a plane including the first and second inner conductors, wherein for the length of the shield, within every plane that is perpendicular to the longitudinal axis of the overlap, the longitudinal axis of the first inner conductor, and the longitudinal axis of the second inner conductor: the center of the overlap is equidistance to the center of first inner conductor and the center of the second inner conductor, thereby tuning a stopband with the overlap to filter frequencies at a desired center frequency,
wherein:
the first and second inner conductors are substantially the same length;
providing the first and second inner conductors further comprises aligning corresponding ends of the first and second inner conductors; and
wrapping a conductive shield further comprises wrapping a plurality of conductive shields around the first and second inner conductors, including overlapping each of the conductive shields along and about the longitudinal axis, wherein the overlap of the conductive shields is aligned with the low current plane and wherein the conductive shields are wrapped along the first and second inner conductors iteratively beginning at one end of the first and second inner conductors and ending at the other end of the first and second inner conductors, andwherein the overlap produces a stopband filter that filters frequencies in a stopband, the stopband including frequencies greater than frequencies of signals to be transmitted along the first and second inner conductors and including frequencies greater than frequencies in the range of 5-10 gigahertz.

US Pat. No. 10,141,085

CONDUCTOR JOINT AND CONDUCTOR JOINT COMPONENT

1. A system comprising: a fiber-structured heating element; a copper conductor; and a conductor joint therebetween, wherein dimensions of the fiber-structured heating element being length (L)>>width (W)>>thickness (T), and which heating element comprises carbon fiber strands, wherein the copper conductor is transversely disposed relative to a longitudinal direction (L) of the heating element to form a layered structure in a thickness direction (T), on both opposing sides of the heating element, the copper conductor comprising copper strands separable from each other, wherein the copper strands of the copper conductor, a number and a diameter of which are configured to transfer electric power of more than ten kW, are quantitatively evenly distributed on both opposing sides and corresponding surfaces of the heating element, having a material including carbon fiber strands of the heating element in between, so that on each of said both opposing sides the strands distributed thereto extend along and cover the width (W) of the heating element, the strands on each side of said both opposing sides being further disposed in a planar manner in such a way that the strands lie in one plane, adjacent to each other, and the ends of the strands further extend on each of said both opposing sides, in a width direction (W) of the heating element, beyond the heating element, wherein portions of the ends of the strands extending beyond the heating element overlap each other, and an electric joint is formed between lateral faces of these portions of overlapping strands.

US Pat. No. 10,141,084

ELECTRONIC DEVICE

Cheil Industries, Inc., ...

1. An electronic device, comprising:an anisotropic conductive film, the anisotropic conductive film including an insulating layer and a conductive layer laminated on the insulating layer, the conductive layer containing insulating particles and conductive particles, wherein,
the lowest melt viscosity of the insulating layer is in the range of about 2,000 Pa·s to about 10,000 Pa·s and the lowest melt viscosity of the conductive layer is in the range of about 5,000 to about 50,000 Pa·s, provided that the lowest melt viscosity of the conductive layer is at least about 3,000 Pa·s greater than that of the insulating layer,
the insulating layer is from greater than 1 to about 4 times thicker than the conductive layer,
the insulating layer is formed from a first composition that comprises a first polymer resin, a first radically polymerizable material, and a first radical initiator, wherein the first polymer resin includes one or more of an olefinic resin, a butadiene resin, an acrylonitrile-butadiene copolymer, a carboxyl-terminated acrylonitrile-butadiene copolymer, a polyimide resin, a polyamide resin, a polyester resin, a polyvinyl butyral resin, an ethylene-vinyl acetate copolymer, a styrene-butylene-styrene (SBS) resin, a styrene-ethylene-butylene-styrene (SEBS) resin, an acrylonitrile-butadiene rubbers (NBRs), a urethane resin, a (meth)acrylic resin, or a phenoxy resin, and the first radically polymerizable material includes a first epoxy (meth)acrylate oligomer, the first epoxy (meth)acrylate oligomer being present in an amount of 20 to 40 wt %, based on a total weight of the first composition,
the conductive layer is formed from a second composition that comprises a second polymer resin, a second radically polymerizable material, and a second radical initiator, wherein the second polymer resin includes one or more of an olefinic resin, a butadiene resin, an acrylonitrile-butadiene copolymer, a carboxyl-terminated acrylonitrile-butadiene copolymer, a polyimide resin, a polyamide resin, a polyester resin, a polyvinyl butyral resin, an ethylene-vinyl acetate copolymer, a styrene-butylene-styrene (SBS) resin, a styrene-ethylene-butylene-styrene (SEBS) resin, an acrylonitrile-butadiene rubbers (NBRs), a urethane resin, a (meth)acrylic resin, or a phenoxy resin, and the second radically polymerizable material includes a second epoxy (meth)acrylate oligomer, the second epoxy (meth)acrylate oligomer being present in an amount of 20 to 30 wt %, based on a total weight of the second composition,
a size of the conductive particles is in the range of about 1 to about 30 ?m, the conductive particles being present in an amount of about 1 to about 30% by weight, based on the total weight of the second composition,
a size of the insulating particles is in the range of about 0.1 to about 20 ?m, the insulating particles being present in an amount of about 2 to about 20% by weight, based on the total weight of the second composition.

US Pat. No. 10,141,083

TRANSPARENT CONDUCTIVE FILM COMPOSITE AND TRANSPARENT CONDUCTIVE FILM

INDUSTRIAL TECHNOLOGY RES...

1. A transparent conductive film, consisting of:(a) a metallic material; and
(b) a dispersant,
wherein a weight ratio of the metallic material to the dispersant ranges from 0.14:1 to 20:1,
wherein the metallic material (a) comprises:
(a1) 84-99.99 wt % of metal nanowires; and
(a2) 0.01-16 wt % of micron metal flakes,
wherein a sheet resistance of the transparent conductive film is 10052/or less, and a transparency of the transparent conductive film is 95% or greater.

US Pat. No. 10,141,082

OXIDATION RESISTANT COPPER NANOPARTICLES AND METHOD FOR PRODUCING SAME

KOREA INSTITUTE OF SCIENC...

1. A method for producing copper nanoparticles, comprising the steps of:preparing a first solution by stirring together a solvent, a polymer, and an organic acid, wherein the polymer is selected from the group consisting of polyacetylene, polyaniline, polypyrrole, polythiophene, poly(3,4-ethylenedioxythiophene) and a combination thereof,
wherein the organic acid is selected from the group consisting of erythorbic acid, glucuronolactone, triformin (2,3-diformyloxypropyl formate) and a combination thereof;
producing a second solution by mixing the first solution, a copper precursor, and a first reducing agent;
producing a third solution by mixing a second reducing agent with the second solution for 30 minutes to 5 hours; and
separating and collecting copper nanoparticles from the third solution.

US Pat. No. 10,141,081

PHASE CONTRAST X-RAY IMAGING DEVICE AND PHASE GRATING THEREFOR

Siemens Healthcare GmbH, ...

1. A phase grating for a phase contrast X-ray imaging, the phase grating comprising:a transverse surface to be aligned substantially transversely with respect to a radiation incidence direction, said transverse surface being spanned by an x-axis and a y-axis perpendicular to said x-axis;
a multiplicity of grating webs composed of a basic material and alternately arranged with optically denser interspaces, said grating webs dividing said transverse surface into grating strips that are in each case elongated in a y-direction of said y-axis and that are lined up parallel alongside one another in an x-direction of said x-axis;
at least one of said grating webs extending within said transverse surface across a plurality of said grating strips; and
the phase grating, at each said grating strip along a z-axis that extends perpendicularly to said transverse surface, having a homogeneous total thickness of said basic material that differs between mutually adjacent said grating strips.

US Pat. No. 10,141,080

INSOLUBLE CESIUM GLASS

QSA GLOBAL, INC., Burlin...

1. A cesium-137 gamma radiation source consisting of a mixed metal oxide of cesium-137 and a metal chosen from the group consisting of niobium, tantalum, vanadium and mixtures thereof, in which an insoluble radioactive product is formed, as a mixture, solid solution or ternary compound, by a process of reacting at least one dissolved compound of the at least one metal with a soluble cesium-137 compound followed by forming a solid radioactive component of a gamma radiation source.

US Pat. No. 10,141,079

TARGETRY COUPLED SEPARATIONS

TerraPower, LLC, Bellevu...

1. A method for manufacturing 99Mo radioisotope, the method comprising:providing a source containing a first mass of uranium particles, the uranium particles having an average particle size of from 10% to 200% of a recoil distance of 99Mo in the uranium particles;
enclosing the source in a neutronically-translucent container;
exposing the source to neutrons, thereby reducing the first mass of uranium particles in the source to a second mass of uranium particles less than the first mass and creating at least some atoms of the 99Mo radioisotope;
removing, after exposing the source to neutrons, at least some of the atoms of the 99Mo radioisotope from the source without removing uranium particles from the source;
wherein the removing operation further comprises:
passing an extraction material selected to dissolve the 99Mo radioisotope through the container, thereby contacting the uranium particles with the extraction material; and
wherein the extraction material is supercritical carbon dioxide containing a ligand that dissolves the 99Mo radioisotope and does not dissolve the uranium.

US Pat. No. 10,141,078

LIQUID FUEL NUCLEAR FISSION REACTOR FUEL PIN

TerraPower, LLC, Bellevu...

1. A nuclear fission fuel pin comprising:cladding defining an elongated enclosure, the enclosure having a fission region and a fertile blanket region;
a solution of a first fissile nuclear fission fuel material dissolved in neutronically translucent liquid carrier material, the solution being distributed into the elongated enclosure including into the fission region and into the fertile blanket region; and
a solid phase, undissolved fertile nuclear fission fuel material, in foam form, disposed in the fertile blanket region of the elongated enclosure and in direct physical contact with the solution in the elongated enclosure, the fertile nuclear fission fuel material being transmutable into a second fissile nuclear fission fuel material directly diffusible into the solution.

US Pat. No. 10,141,077

SYSTEM AND METHOD FOR CHARACTERIZATION OF ELECTRICAL PROPERTIES OF THE HEART FROM MEDICAL IMAGES AND BODY SURFACE POTENTIALS

Siemens Healthcare GmbH, ...

1. A method for estimating patient-specific cardiac electrical properties from medical image data and non-invasive electrocardiography measurements of a patient, comprising:generating a patient-specific anatomical heart model and a patient-specific anatomical torso model from medical image data of a patient and an electrical coupling model between the patient-specific anatomical heart model and the patient-specific anatomical torso model;
generating a mechanical activation time map of the heart from a dynamic cardiac image sequence of the patient;
identifying a line of block from the mechanical activation time map; and
estimating spatially varying patient-specific cardiac electrical parameters for the patient by:
simulating cardiac electrophysiology over time at a plurality of nodes in the patient-specific anatomical heart model using a computational cardiac electrophysiology model, and
adjusting at least one cardiac electrical parameter of the computational cardiac electrophysiology model based on the mechanical activation time map, the non-invasive electrocardiography measurements of the patient, the simulated cardiac electrophysiology, and the line of block identified from the mechanical activation time map.

US Pat. No. 10,141,076

PROGRAMMING AND VIRTUAL REALITY REPRESENTATION OF STIMULATION PARAMETER GROUPS

Nuvectra Corporation, Pl...

1. A medical system, comprising:one or more implantable medical devices configured to deliver a medical therapy to a patient; and
a portable electronic device on which a touch-sensitive user interface is implemented, wherein the user interface is configured to provide a visual representation of the medical therapy through a hierarchy that includes:
a lower level representation of the medical therapy that corresponds to a stimulation program, wherein the stimulation program can run on the one or more implantable medical devices to cause the one or more implantable medical devices to stimulate a body tissue of the patient as part of the medical therapy, and wherein the stimulation program includes a plurality of configurable stimulation parameters;
a middle level representation of the medical therapy that is at least one hierarchical level above the lower level representation of the medical therapy, wherein the middle level representation of the medical therapy corresponds to a stimulation program-set that includes a plurality of different stimulation programs; and
an upper level representation of the medical therapy that is at least one hierarchical level above the middle level representation of the medical therapy, wherein the upper level representation of the medical therapy corresponds to a scrollable collection of stimulation program-sets, wherein the stimulation program-sets are represented by a plurality of digital cards, respectively;
wherein the portable electronic device provide visual representation and tracking of the medical therapy at least in part via the hierarchy.

US Pat. No. 10,141,075

PREDICTING AND MITIGATING RISK OF ECTASIA AND OPTIMIZING THERAPEUTIC OUTCOMES

THE CLEVELAND CLINIC FOUN...

1. A system for evaluating an eye of a patient, comprising:a modeling component configured to determine a representation of at least the cornea of the eye from a three-dimensional structural image of the eye and at least one biomechanical property of the eye;
a feature extractor configured to extract a plurality of features from the model of at least the cornea of the eye;
a user interface configured to accept input from a clinician defining an objective function as a function of at least one parameter for the eye after the therapeutic procedure;
an ectasia evaluation component configured to calculate at least one parameter associated with the risk of ectasia in the eye from the extracted plurality of features and the objective function, the calculated at least one parameter including a variable in a therapeutic procedure representing a surgical parameter that can be varied by a clinician in the therapeutic procedure; and
a system output configured to provide the calculated at least one parameter to one of a treatment system and a user.

US Pat. No. 10,141,074

VASCULAR FLOW ASSESSMENT

Cath Works Ltd., (IL)

1. A vascular assessment apparatus comprising:a processor communicatively coupled to a medical imaging device; and
a memory storing non-transitory computer-readable instructions, which when executed, cause the processor to:
receive a set of medical images of a coronary vessel tree of a subject from the medical imaging device, wherein a first of the medical images of the set was acquired from a first viewing angle, and a second of the images of the set was acquired from a second viewing angle;
perform image analysis to identify vascular features within and corresponding among the set of medical images;
combine geometrical information for the corresponding vascular features to produce a stenotic model of the coronary vessel tree, the stenotic model having measurements of the coronary vessel tree at locations along vessels of the coronary vessel tree;
determine a flow characteristic from the stenotic model;
calculate a first index indicative of vascular function, based, at least in part, on the flow characteristic from the stenotic model;
receive another medical image of the coronary vessel tree of the subject;
analyze the other medical image to identify vascular features within the other medical image that correspond to vascular features that are represented in the stenotic model or provided in at least some of the medical images from the set;
modify the geometrical information for the corresponding vascular features in the stenotic model to create an updated stenotic model from at least some of the identified vascular features within the other medical image;
determine a modified flow characteristic from the updated stenotic model; and
calculate a second index indicative of vascular function, based, at least in part, on the modified flow characteristic in the updated stenotic model.

US Pat. No. 10,141,073

SYSTEMS AND METHODS FOR CONTROLLING ACQUISITION OF SENSOR INFORMATION

Elwha LLC, Bellevue, WA ...

1. A system, comprising:a network of remote non-contact physiological sensors separately deployed throughout a room, the remote non-contact physiological sensors including at least one microphone and at least one image-capture device configured to measure a physiological parameter of an individual;
a motion sensor configured to measure movement of the individual relative to the network of remote non-contact physiological sensors;
a light sensor configured to measure lighting in the room;
a computing device operably connected to the network of remote non-contact physiological sensors, the motion sensor, and the light sensor, the computing device including a processor programmed to
query the motion sensor to initiate measurement of movement of the individual relative to the network of remote non-contact physiological sensors;
query the light sensor to initiate measurement of lighting in the room;
receive a set of motion sensor values from the motion sensor, the set of motion sensor values representative of the movement of the individual relative to the network of remote non-contact physiological sensors;
receive a set of light sensor values from the light sensor, the set of light sensor values representative of the lighting in the room;
query at least one of the remote non-contact physiological sensors to remotely measure the physiological parameter of the individual to acquire a set of physiological sensor values if the set of motion sensor values and the set of light sensor values meets or exceeds a threshold value; and
re-query at least one of the motion sensor or the light sensor if the set of motion sensor values or the set of light sensor values fails to meet or exceed the threshold value.

US Pat. No. 10,141,072

EFFICIENT ENCODER BASED ON MODIFIED RU ALGORITHM

SK Hynix Inc., Gyeonggi-...

1. A memory system, comprising:a memory device; and
a controller coupled with the memory device, wherein the memory device includes a memory component, and the controller is configured to:
receive information data from the memory component;
perform a first stage of encoding using a sparse circulant calculation circuit to generate first stage data;
perform a second stage of encoding to generate first portion parity information and second portion parity information;
wherein the second portion parity information is generated based at least in part on the first portion parity information and the first stage data, and wherein the second portion parity information is generated by an XOR calculation of the first portion parity information and the first stage data;
output the second portion parity information; and
generate information including the second portion parity information, which contributes to improving the speed of the memory device.

US Pat. No. 10,141,071

PREDICTIVE COUNT FAIL BYTE (CFBYTE) FOR NON-VOLATILE MEMORY

Intel Corporation, Santa...

1. An apparatus comprising:logic circuitry, coupled to non-volatile memory of a solid state drive (SSD), the logic circuitry to determine a number of memory cells of the non-volatile memory that are allowed to fail program verification in a current program loop,
wherein the logic circuitry is to determine the number of memory cells based at least on information from a previous program loop, wherein the information from the previous program loop includes a number of bytes below a program verify voltage for a level N of a multi-level programming of the non-volatile memory, wherein the previous program loop is to be executed prior to the current program loop, wherein the logic circuitry is to cause inhibition of one or more program verification pulses to be issued in the current program loop and any subsequent program loop based on a determination that the number of memory cells of the non-volatile memory has reached a threshold value, wherein the threshold value is lower than an Error Correction Code (ECC) limit of the non-volatile memory.

US Pat. No. 10,141,070

SEMICONDUCTOR DEVICE

SK hynix Inc., Icheon-si...

1. A sense-amplifier test device comprising:a drive signal generator configured to generate a test voltage applying signal for supplying a ground voltage to a pull-up power-supply line of a sense-amplifier driver, based on a test mode signal; and
wherein the sense-amplifier driver is configured to supply the ground voltage to the pull-up power-supply line, based on the test voltage applying signal.

US Pat. No. 10,141,069

NEURAL NETWORK AND ELECTRONIC DEVICE INCLUDING ARTIFICIAL NEURAL ARRAY

Semiconductor Energy Labo...

1. An electronic device comprising:a first circuit comprising a first transistor, a second transistor, and a capacitor;
a second circuit comprising a third transistor; and
first to sixth wirings,
wherein:
a gate of the first transistor is electrically connected to the first wiring,
a first terminal of the first transistor is electrically connected to the second wiring,
a second terminal of the first transistor is electrically connected to a gate of the second transistor,
a first terminal of the capacitor is electrically connected to the third wiring,
a second terminal of the capacitor is electrically connected to the gate of the second transistor,
a first terminal of the second transistor is electrically connected to the fourth wiring,
a gate of the third transistor is electrically connected to the third wiring,
a first terminal of the third transistor is electrically connected to the fifth wiring,
a second terminal of the second transistor is electrically connected to the sixth wiring, and
a second terminal of the third transistor is electrically connected to the sixth wiring.

US Pat. No. 10,141,068

MAGNETIC ELEMENT, SKYRMION MEMORY, SKYRMION MEMORY-DEVICE, SOLID-STATE ELECTRONIC DEVICE, DATA-STORAGE DEVICE, DATA PROCESSING AND COMMUNICATION DEVICE

RIKEN, Saitama (JP)

1. A magnetic element capable of generating and erasing a skyrmion, comprising:a magnet shaped as a thin layer and including a structure surrounded by a nonmagnetic material;
a current path provided at least partially enclosing an end region including an end portion of the magnet, the current path being provided on one surface of the magnet; and
a skyrmion sensor that detects the generation and erasing of the skyrmion, wherein
with Wm being a width of the magnet and hm being a height of the magnet, a size of the magnet, with the skyrmion of a diameter ? being generated, is such that 2?>Wm>?/2 and 2?>hm>?/2.

US Pat. No. 10,141,067

MAGNETIC MEMORY DEVICE

Toshiba Memory Corporatio...

1. A magnetic memory device, comprising:a magnetic body, the magnetic body including
a first extending region, a first length of the first extending region along a first direction being longer than a second length of the first extending region along a second direction crossing the first direction, the first extending region including a first end portion extending in the first direction and a second end portion extending in the first direction and separated from the first end portion in the second direction,
a second extending region, a third length of the second extending region along the first direction being longer than a fourth length of the second extending region along a third direction crossing the first direction, the second extending region including a third end portion extending in the first direction and a fourth end portion extending in the first direction and separated from the third end portion in the third direction, and
a first connecting region provided between the first end portion and the third end portion, a length of the first connection region along the first direction being longer than a length of the first connection region along the second direction and longer than a length of the first connection region along the third direction, the first connecting region connecting the first end portion with the third end portion,
a position of the second end portion along a fourth direction being different from a position of the fourth end portion along the fourth direction, the fourth direction being perpendicular to the first direction and the second direction, and
the first extending region including a first magnetic domain and a first other region provided around the first magnetic domain in a first state.

US Pat. No. 10,141,066

MEMORY DEVICE AND OPERATING METHOD THEREOF

SK Hynix Inc., Gyeonggi-...

1. A memory device, comprising:a memory block including a plurality of cell strings;
a peripheral circuit configured to set voltages for a program operation of selected memory cells in the cell strings, and program the selected memory cells by using the set voltages; and
a control circuit configured to control the peripheral circuit for programming the selected memory cells in response to a program command, and to increase a channel voltage of non-selected cell strings including non-selected memory cells while the selected memory cells are programmed.

US Pat. No. 10,141,065

ROW REDUNDANCY WITH DISTRIBUTED SECTORS

Cypress Semiconductor Cor...

1. A semiconductor device comprising:an embedded flash memory comprising a memory bank that includes multiple physical sectors, wherein each physical sector comprises a plurality of erase sectors, and wherein:
multiple portions of an additional erase sector are respectively distributed among the multiple physical sectors; and
the multiple portions of the additional erase sector are configured as a row-redundancy sector for the memory bank.

US Pat. No. 10,141,064

PREVENTION OF NEIGHBORING PLANE DISTURB IN NON-VOLATILE MEMORY

SanDisk Technologies LLC,...

1. An apparatus, comprising:a first group of memory cells connected to a first word line;
a second group of memory cells connected to a second word line, the second word line different than the first word line;
a voltage supply connected to a node to supply a first voltage level to both of the first word line and the second word line;
a control circuit connected to the first and second groups and to the voltage supply, the control circuit configured to perform one or more memory operations concurrently on the first group and the second group such that both the first word line and the second word line concurrently receive the first voltage level from the node; and
a first unidirectional circuit element through which the first word line is directly connected to the node when receiving the first voltage level, the first unidirectional circuit element configured to allow current to flow from the node to the first word line and to prevent current from flowing from the first word line to the second word line; and
a second unidirectional circuit element through which the second word line is directly connected to the node when receiving the first voltage level, the second unidirectional circuit element configured to allow current to flow from the node to the second word line and to prevent current from flowing from the second word line to the first word line.

US Pat. No. 10,141,063

MEMORY CONTROLLER, MEMORY DEVICE AND METHOD OF OPERATING

TAIWAN SEMICONDUCTOR MANU...

1. A device, comprising:a memory cell array having memory cells arranged in rows and columns;
a word line driver configured to be coupled to the memory cells of a memory device via corresponding word lines;
a bit line driver configured to be coupled to the memory cells via corresponding bit lines;
source lines coupled to the memory cells; and
a number of source lines equals a number of rows in the memory cell array;
wherein, in a programming operation,
the bit line driver is configured to supply a selected bit line voltage to a selected bit line among the bit lines and supply an unselected bit line voltage to an unselected bit line among the bit lines, the selected bit line coupled to a memory cell in the memory cells, and selected to be written to among the memory cells, the unselected bit line coupled to a memory cell unselected to be written to among the memory cells,
the word line driver is configured to supply a selected word line voltage to a selected word line among the word lines and supply an unselected word line voltage, different from the selected word line voltage, to an unselected word line among the word lines, the selected word line coupled to the selected memory cell, the unselected word line coupled to the unselected memory cell, wherein
the unselected bit line voltage is equal to or higher than a difference between the unselected word line voltage and a lower threshold voltage of the unselected memory cell.

US Pat. No. 10,141,062

SENSING CIRCUIT WITH SAMPLED REFERENCE CURRENT OR VOLTAGE FOR FLASH MEMORY SYSTEM

SILICON STORAGE TECHNOLOG...

1. A method of operating a non-volatile memory device comprising a sensing circuit coupled to a selected memory cell, the method comprising:closing one or more switches to cause the device to operate in a first mode, wherein during the first mode a reference element draws a current and the current is mirrored by a current mirror to generate a reference current, the current mirror comprising a first transistor and a second transistor; and
opening the one or more switches to cause the device to operate in a second mode, wherein during the second mode the reference element is detached from the second transistor of the current mirror and the second transistor of the current mirror continues providing the reference current and the reference current is compared against a current drawn by a selected memory cell to determine a value stored in the selected memory cell.

US Pat. No. 10,141,061

MEMORY SYSTEM

Toshiba Memory Corporatio...

1. A memory system comprising:a semiconductor memory capable of reading data from memory cells on a page basis; and
a controller which controls the semiconductor memory,
wherein the semiconductor memory is configured to execute a first reading operation, a second reading operation when the first reading operation fails, and a third reading operation when the second reading operation fails,
wherein in the first reading operation, a first voltage is applied to a selected word line of the semiconductor memory,
in the second reading operation, a second voltage and a third voltage are sequentially applied to the selected word line, and the second voltage is different from the first voltage, and
in the third reading operation, a fourth voltage and a fifth voltage are sequentially applied to the selected word line, and the fourth voltage is different from the first voltage, the second voltage, and the third voltage, and
wherein an absolute value of a difference between the second voltage and the fourth voltage is different from an absolute value of a difference between the third voltage and the fifth voltage.

US Pat. No. 10,141,060

MEMORY SYSTEM

Toshiba Memory Corporatio...

1. A memory system comprising:a semiconductor memory including a memory cell; and
a controller configured to control the semiconductor memory and capable of creating second data based on first data read from the memory cell,
wherein upon receiving a physical erase request for the first data held in the memory cell from an external device, the controller transmits one of an erase instruction and a write instruction for the second data to the semiconductor memory.

US Pat. No. 10,141,059

FAILURE DETECTION CIRCUITRY FOR ADDRESS DECODER FOR A DATA STORAGE DEVICE

Taiwan Semiconductor Manu...

1. A data storage device, comprising:a memory array including a plurality of memory cells that are arranged in a plurality of rows and a plurality of columns to form an array, a first group of columns and a second group of columns from among the plurality of columns being logically grouped into a first memory sub-array and a second memory sub-array, respectively, from among a plurality of memory sub-arrays; and
a row decoder configured to:
decode a row address within an address to access a memory cell from among the plurality of memory cells to provide a plurality of wordlines (WLs) corresponding to the row address, a first WL and a second WL from among the plurality of WLs being associated with a first row from among the plurality of rows and corresponding to the first memory sub-array and the second memory sub-array, respectively, and
indicate a failure in the decoding of the row address when the first WL differs from the second WL.

US Pat. No. 10,141,058

MULTI-CHIP NON-VOLATILE SEMICONDUCTOR MEMORY PACKAGE INCLUDING HEATER AND SENSOR ELEMENTS

1. A non-volatile memory system, comprising:a chip package, the chip package comprising
a first non-volatile semiconductor memory device;
a heater element that provides heat to the first non-volatile semiconductor memory device; and
a thermal sensing element, the thermal sensing element has a parameter that changes in response to changes in temperature; and
a heat control circuit coupled to provide a heat drive signal; wherein
the heater element includes a first terminal coupled to receive the heat drive signal, and
the heat control circuit is coupled to receive a heat enable signal and a temperature range lower limit detect signal, the heat control circuit provides a low impedance path between a power supply potential and the first terminal of the heater element in response to the heat enable signal being in an enable logic level and the temperature range lower limit detect signal indicating the temperature of the thermal sensing element is below a temperature range lower value.

US Pat. No. 10,141,057

ERASING METHOD OF SINGLE-GATE NON-VOLATILE MEMORY

Yield Microelectronics Co...

1. An erasing method of a single-gate non-volatile memory, wherein said single-gate non-volatile memory comprises a P-type semiconductor substrate, a transistor and a capacitor structure, wherein said transistor and said capacitor structure disposed in said semiconductor substrate, and wherein said transistor includes a first electrically-conductive gate and multiple first ion-doped regions that are separately disposed at both sides of said first electrically-conductive gate and respectively function as the source and the drain, and wherein said capacitor structure includes a second electrically-conductive gate and a second ion-doped region, wherein said first electrically-conductive gate and said second electrically-conductive gate electrically interconnected to form a single floating gate, and wherein said erasing method is characterized in:respectively applying a substrate voltage Vsub, a source voltage Vs and a drain voltage Vd to said P-type semiconductor substrate, said source and said drain, and not applying a voltage to said first ion-doped regions, wherein said voltages meet the following conditions:
Vd>Vs?Vsub, and
Vsub is grounded.

US Pat. No. 10,141,056

MEMORIES INCLUDING MULTIPLE ARRAYS OF NON-VOLATILE MEMORY CELLS SELECTIVELY CONNECTED TO SENSE CIRCUITRY USING DIFFERENT NUMBERS OF DATA LINES

Micron Technology, Inc., ...

1. A memory, comprising:a first array of non-volatile memory cells;
a second array of non-volatile memory cells;
a first plurality of data lines comprising a first number of data lines, each data line of the first plurality of data lines selectively connected to a respective subset of non-volatile memory cells of the first array of non-volatile memory cells;
a second plurality of data lines comprising a second number of data lines, less than the first number of data lines, each data line of the second plurality of data lines selectively connected to a respective subset of non-volatile memory cells of the second array of non-volatile memory cells; and
sense circuitry selectively connected to the first plurality of data lines and selectively connected to the second plurality of data lines;
wherein the memory is configured, when reading non-volatile memory cells of the second array of non-volatile memory cells, to connect the sense circuitry to each data line of the second plurality of data lines; and
wherein the memory is configured, when reading non-volatile memory cells of the first array of non-volatile memory cells, to connect the sense circuitry to a number of data lines of the first plurality of data lines equal to the second number.

US Pat. No. 10,141,055

METHODS AND APPARATUS FOR PATTERN MATCHING USING REDUNDANT MEMORY ELEMENTS

Micron Technology, Inc., ...

1. A memory, comprising:an array of memory cells comprising a plurality of cell pairs, each cell pair of the plurality of call pairs programmed to store a same bit of data corresponding to a particular bit position of a pattern to be searched in the memory, and
control circuitry configured to apply a same pair of voltages to control gates of each cell pair of the plurality of cell pairs when checking for a match of the stored bit of data of the plurality of cell pairs and data value of the particular bit position of the pattern, wherein voltage levels of the same pair of voltages are responsive to the data value of the particular bit position of the pattern;
wherein the plurality of cell pairs comprises a first cell pair coupled to a first data line, a second cell pair coupled to a second data line, and a third cell pair coupled to a third data line.

US Pat. No. 10,141,054

SEMICONDUCTOR DEVICE, ELECTRONIC COMPONENT, AND ELECTRONIC DEVICE

Semiconductor Energy Labo...

1. A semiconductor device comprising:a first circuit including a flip-flop; and
a second circuit comprising a first transistor, a second transistor, and a third transistor,
wherein:
the first circuit is configured to retain data while a power supply voltage is supplied,
the second circuit is configured to retain the data while the power supply voltage is not supplied,
each of the first transistor and the second transistor comprises a channel formation region including an oxide semiconductor,
the third transistor comprises a channel formation region including silicon,
a gate of the second transistor is electrically connected to one of a source and a drain of the first transistor,
a gate of the third transistor is electrically connected to one of a source and a drain of the second transistor, and
the first circuit is electrically connected to one of a source and a drain of the third transistor and the other of the source and the drain of the first transistor.

US Pat. No. 10,141,053

METHOD FOR DRIVING A SEMICONDUCTOR DEVICE INCLUDING DATA MIGRATION BETWEEN A VOLATILE MEMORY AND A NONVOLATILE MEMORY FOR POWER-SAVING

Semiconductor Energy Labo...

1. A method for driving a semiconductor device including a volatile memory and a nonvolatile memory, the method comprising the steps of:operating the volatile memory with a normal mode;
monitoring access requirements to the volatile memory and detecting an access frequency of the volatile memory;
comparing a used space of the volatile memory and an available space of the nonvolatile memory when the access frequency of the volatile memory is smaller than a first set value;
forwarding data stored in the volatile memory to the nonvolatile memory when the used space of the volatile memory is smaller than the available space of the nonvolatile memory;
changing the volatile memory from the normal mode to a stop mode;
monitoring access requirements to the nonvolatile memory and measuring a data transferring speed of the nonvolatile memory;
returning the volatile memory from the stop mode to the normal mode when the data transferring speed of the nonvolatile memory is higher than a second set value; and
forwarding part of data in the volatile memory to the nonvolatile memory when an available space of the volatile memory is smaller than a third set value,
wherein the third set value is configured to be changed depending on temperature of the volatile memory;
wherein the normal mode is a mode supplying a first power supply voltage to the volatile memory, and
wherein the stop mode is a mode not supplying any power supply voltage to the volatile memory.

US Pat. No. 10,141,052

METHODS, ARTICLES, AND DEVICES FOR PULSE ADJUSTMENT TO PROGRAM A MEMORY CELL

MICRON TECHNOLOGY, INC., ...

1. A method of operating a memory device, comprising:determining a set of pulse parameters for a programming electrical pulse, the set of pulse parameters including a fall time of the programming electrical pulse; and
applying, to a memory cell of a memory array, the programming electrical pulse based at least in part on the fall time of the programming electrical pulse, wherein the programming electrical pulse comprises a voltage pulse.

US Pat. No. 10,141,051

MEMORY DEVICE ARCHITECTURE

MICRON TECHNOLOGY, INC., ...

1. A system, comprising:a memory device comprising:
an array of memory cells occupying a footprint; and
a plurality of word line drivers and digit line drivers in a circuit level positioned below the array of memory cells, wherein the circuit level comprises a plurality of word line driver connection points and digit line driver connection points distributed within the footprint.

US Pat. No. 10,141,050

PAGE WRITES FOR TRIPLE LEVEL CELL FLASH MEMORY

Pure Storage, Inc., Moun...

1. A method for page writes for triple level cell, or higher level cell, flash memory, comprising:receiving data in a storage system, from a client that is agnostic of page write requirements for the triple level cell, or higher level cell, flash memory, wherein the page write requirements specify an amount of data and a sequence of writing data for a set of pages to assure read data coherency for the set of pages;
accumulating the received data, in random-access memory (RAM) in the storage system to satisfy the page write requirements for the triple level cell, or higher level cell, flash memory in the storage system; and
writing at least a portion of the accumulated data in accordance with the page write requirements, from the RAM to the triple level cell, or higher level cell, flash memory in the storage system as an atomic write, wherein the page write requirements for the triple level cell, or higher level cell, flash memory comprise writing a lower page, an upper page and an extra page to assure read coherency of cells, and the writing at least the portion of received data comprises writing the lower page, the upper page and the extra page as the atomic write.

US Pat. No. 10,141,049

NONVOLATILE MEMORY SYSTEM STORING SYSTEM DATA IN MARGINAL WORD LINES

SANDISK TECHNOLOGIES LLC,...

1. A non-volatile storage system, comprising:a first non-volatile memory structure that includes a plurality of word line units that each include one word line and a plurality of non-volatile storage elements, the word line units are arranged in blocks, a block is a unit of erase, the plurality of word line units include a first word line unit in a first block and a second word line unit in the first block; and
one or more control circuits in communication with the first non-volatile memory structure, the one or more control circuits are configured to write host data to the first word line unit, the one or more control circuits are configured to not write host data to the second word line unit, the one or more control circuits are configured to write system data associated with host data to the second word line unit by programming the system data to non-volatile storage elements connected to a word line determined to have failed.

US Pat. No. 10,141,048

STACK CAPACITOR FOR NEURAL NETWORK

International Business Ma...

1. A method of forming a memory cell comprising:providing a first field effect transistor (FET) comprising a first functional gate stack that contacts a portion of a first semiconductor material portion and first source/drain regions located on opposite sides of the first functional gate stack in a first active region of a substrate, a second FET comprising a second functional gate stack that contacts a portion of a second semiconductor material portion and second source/drain regions located on opposite sides of the second functional gate stack in a second active region of the substrate, and a third FET comprising a third functional gate stack that contacts a portion of a third semiconductor material portion and third source/drain regions located on opposite sides of the third functional gate stack in a third active region of the substrate;
forming first source/drain contact structures overlying and contacting the first source/drain regions, a second source/drain contact structure overlying and contacting one of the second source/drain regions, a third source/drain contact structure overlying and contacting one of the third source/drain regions, and a source/drain interconnect structure connecting the other of the second source/drain regions and the other of the third source/drain regions, wherein the first, the second and the third source/drain contact structures and the source/drain interconnect structure are laterally surrounded by an interlevel dielectric (ILD) layer located over the substrate;
forming a capacitor bottom electrode structure overlying and contacting the source/drain interconnect structure and a functional gate of the first functional gate stack, wherein the capacitor bottom electrode structure is laterally surrounded by an insulator layer located over the ILD layer; and
forming a stack capacitor array overlying the capacitor bottom electrode contact structure and comprising:
a plurality of bottom electrodes, with each of the plurality of bottom electrodes having a horizontal portion contacting the capacitor bottom electrode contact structure and vertical portions extending upwards from the horizontal portion,
an anchor structure connecting the vertical portions of the plurality of bottom electrodes together,
a capacitor dielectric present on physically exposed surfaces of the plurality of bottom electrodes and the anchor structure, and
a top electrode present on the capacitor dielectric.

US Pat. No. 10,141,047

STATIC RANDOM ACCESS MEMORY

1. A static random access memory (SRAM) comprising:a plurality of memory cells each having a pair of cross-coupled inverters, a first of the inverters being supplied by first and second power supply rails and a second of the inverters being supplied by third and fourth supply rails, an input of the second inverter being coupled to a first bit line via a first transistor; and
a power supply circuit adapted to apply, during a read phase of one of the memory cells, a first voltage difference across the first and second power supply rails and a second voltage difference across the third and fourth power supply rails of said memory cell, the second voltage difference being greater than the first voltage difference.

US Pat. No. 10,141,046

MEMORY DEVICE COMPRISING AN ELECTRICALLY FLOATING BODY TRANSISTOR

Zeno Semiconductor, Inc.,...

1. A memory cell comprising:an electrically floating body region comprising a first conductivity type selected from p-type conductivity type and n-type conductivity type;
a source line region comprising a second conductivity type selected from said p-type conductivity type and said n-type conductivity type and being different from said first conductivity type, said source line region in physical contact with said electrically floating body region;
a drain region comprising said second conductivity type in physical contact with said electrically floating body region and spaced apart from said source line region;
a first charge injector region, wherein said first charge injector region comprises said second conductivity type and is in physical contact with said electrically floating body region and spaced apart from said source line region and said drain region;
a second charge injector region, wherein said second charge injector region comprises said second conductivity type and is in physical contact with said electrically floating body region and spaced apart from said source line region, said drain region, and said first charge injector region;
a gate positioned in between said source line region and said drain region, the same gate being positioned between said first charge injector region and said second charge injector region; and
wherein said electrically floating body region is configured to have more than one stable state through an application of a bias on said first and second charge injector regions.

US Pat. No. 10,141,045

DUAL RAIL DEVICE WITH POWER DETECTOR FOR CONTROLLING POWER TO FIRST AND SECOND POWER DOMAINS

Taiwan Semiconductor Manu...

1. A dual rail device comprising:a first power domain circuit coupled to a first power supply through a first header control switch;
a second power domain circuit coupled to a second power supply, wherein the first and second power supplies have different steady-state voltage levels and wherein the first power domain circuit is interfaced to the second power domain circuit; and
a power detector circuit for providing a control signal for controlling the first header control switch responsive to detection of a voltage level of the second power supply.

US Pat. No. 10,141,044

MEMORY INTERFACE CIRCUIT HAVING SIGNAL DETECTOR FOR DETECTING CLOCK SIGNAL

MEDIATEK INC., Hsin-Chu ...

1. A memory interface circuit, comprising:a plurality of receivers, for receiving at least a clock signal and a plurality of command signals from a memory controller, respectively; and
a signal detector, for detecting whether the memory interface circuit receives the clock signal or not, without using a clock enable signal from a pin of a memory module, to generate a detection result to enable or disable the plurality of receivers;
wherein the signal detector detects a swing of the clock signal to generate the detection result and when the swing of the clock signal is greater than a first threshold, the signal detector starts to generate the detection result to enable the plurality of receivers; and when the swing of the clock signal is less than a second threshold, the signal detector starts to generate the detection result to disable the plurality of receivers.

US Pat. No. 10,141,043

DRAM AND METHOD FOR MANAGING POWER THEREOF

NANYA TECHNOLOGY CORPORAT...

1. A dynamic random access memory (DRAM), comprising:a plurality of banks, each of the banks including a plurality of subarrays;
a power source; and
a control device configured to derive information on a quantity of operated subarrays among the subarrays, and determine how much electrical energy to provide based on the information,
wherein the power source provides the resultant amount of electrical energy based on the determination from the control device;
wherein the control device determines to provide a first amount of electrical energy when a quantity ratio of the operated subarrays is greater than or equal to a highest endpoint of a ratio range, and provide a second amount of electrical energy less than the first amount of electrical energy when the quantity ratio of the operated subarrays is less than or equal to a lowest endpoint of the ratio range.

US Pat. No. 10,141,042

METHOD AND APPARATUS FOR PRECHARGE AND REFRESH CONTROL

Micron Technology, Inc., ...

1. An apparatus, comprising:a command decoder configured to receive a first command and a second command, and further configured to provide a first control signal and a second control signal responsive to the first command and the second command, respectively;
an address decoder configured to receive at least a portion of address signals and further configured to activate one bank selection signal of a plurality of bank selection signals corresponding to a plurality of banks, responsive to the at least a portion of address signals; and
a plurality of control logic circuits, wherein each control logic circuit of the plurality of control logic circuits is configured to receive the first control signal, the second control signal and a corresponding bank selection signal of the plurality of bank selection signals,
wherein the first command is indicative of performing a first memory operation for a first bank of the plurality of banks identified by the at least a portion of address signals, and the second command is indicative of performing the first memory operation and a second memory operation different from the first memory operation for the first bank of the plurality of banks, and
wherein a control logic circuit of the plurality of control logic circuits corresponding to the first bank is configured to provide a bank row activation signal to the first bank responsive to the bank selection signal corresponding to the first bank and the second control signal in the second memory operation.

US Pat. No. 10,141,041

SYSTEMS AND METHODS FOR MAINTAINING REFRESH OPERATIONS OF MEMORY BANKS USING A SHARED

Micron Technology, Inc., ...

1. A memory device comprising:a plurality of memory banks, wherein each memory bank of the plurality of memory banks comprises a plurality of rows, wherein each row of the plurality of rows comprises a row address;
a counter configured to store and increment a first row address of a first row of a first set of memory banks of the plurality of memory banks to a second row address of a second row of the first set of memory banks in response to a first refresh operation when the memory device is operating in a first mode; and
circuitry configured to block incrementing the second row address to a third row address of a third row of the first set of memory banks when the memory device transitions from the first mode to a second mode and the first refresh operation is not paired with a second refresh operation that is performed when the memory device is operating in the first mode.

US Pat. No. 10,141,040

CELL PERFORMANCE RECOVERY USING CYCLING TECHNIQUES

MICRON TECHNOLOGY, INC., ...

1. A method, comprising:applying a plurality of access pulses to a memory cell in an operation state;
determining a sampling frequency based at least in part on a delay between at least two access pulses of the plurality of access pulses;
monitoring a remnant polarization of the memory cell based at least in part on the sampling frequency, wherein the remnant polarization corresponds to an amount of charge capable of being stored by the memory cell; and
determining a first peak magnitude in the remnant polarization of the memory cell as a function of a number of the applied plurality of access pulses based at least in part on monitoring the remnant polarization of the memory cell.

US Pat. No. 10,141,039

BURST LENGTH DEFINED PAGE SIZE

Everspin Technologies, In...

1. A method comprising:receiving, at a magnetic memory device, a single command, wherein the single command includes a predetermined series of commands from an external source, wherein the predetermined series of commands includes an activate command, the activate command is issued prior to a read or write command, and the read or write command is issued prior to an auto precharge command;
in response to the activate command, opening a page associated with a memory bank;
determining a row address associated with the activate command, the row address indicating the page associated with the memory bank;
determining a burst length associated with the activate command based at least in part on a first mode selector bit included in the activate command, wherein the burst length defines a page size associated with the read or write command;
determining a starting position within the page associated with the memory bank based at least in part on a second mode selector bit included in the activate command, the starting position indicating a first bit to load into a cache;
performing a self-referencing read operation on the defined page size associated with the read or write command;
loading a number of bits starting with the first bit into the cache, the number of bits equal to the burst length; and
in response to the auto precharge command, closing the page associated with the memory bank, and writing the number of bits from the cache back into the memory bank after an expiration of a first number of clock cycles, the first number of clock cycles associated with a number of clock cycles for the external source to access the cache bits.

US Pat. No. 10,141,038

COMPUTER SYSTEM AND MEMORY DEVICE

Toshiba Memory Corporatio...

1. A computer system comprising:a memory device including a memory cell array, the memory device configured to execute first read operation of a first read method and second read operation of a second read method on the memory cell array;
a processor configured to receive a first data from the memory device, the first data read from a selected region in the memory cell array by the first read operation, configured to execute first calculation processing using the first data during the second read operation to the selected region, and configured to acquire a result of the first calculation processing by a first signal based on a comparison result of the first data and a second data, the first signal indicating that the first data is valid, and the second data read from the selected region by the second read operation.

US Pat. No. 10,141,037

MAGNETIC MEMORY DEVICE

Kabushiki Kaisha Toshiba,...

1. A magnetic memory device, comprising:a conductive layer including a first portion, a second portion, and a third portion between the first portion and the second portion;
a first magnetic layer separated from the third portion in a second direction crossing a first direction, the first direction being from the first portion toward the second portion;
a second magnetic layer provided between the third portion and the first magnetic layer, the second magnetic layer being electrically connected with the third portion;
a first nonmagnetic layer provided between the first magnetic layer and the second magnetic layer, the first nonmagnetic layer being curved; and
a controller electrically connected to the first portion and the second portion,
the controller implementing
a first operation of supplying a first current to the conductive layer from the first portion toward the second portion, and
a second operation of supplying a second current to the conductive layer from the second portion toward the first portion.

US Pat. No. 10,141,036

SEMICONDUCTOR MEMORY DEVICE AND READING METHOD THEREOF

Winbond Electronics Corp....

1. A reading method of a semiconductor storage device, comprising steps of:pre-charging a selected bit line; and
reading a voltage or a current of the pre-charged selected bit line through a sense node,
wherein the step of pre-charging the selected bit line comprises steps of:
pre-charging the sense node to a first voltage;
for a bit line node coupled between the sense node and a bit line, pre-charging the bit line node to a first clamp voltage based on the first voltage of the sense node;
pre-charging the bit line node to a second clamp voltage greater than the first clamp voltage after pre-charging the selected bit line by the first clamp voltage; and
pre-charging the sense node to a second voltage greater than the first voltage.

US Pat. No. 10,141,035

MEMORY CELL WITH A READ SELECTION TRANSISTOR AND A PROGRAM SELECTION TRANSISTOR

UNITED MICROELECTRONICS C...

1. A memory cell comprising:a read selection transistor having a first terminal coupled to a bit line, a second terminal, and a control terminal coupled to a read word line;
a program selection transistor having a first terminal directly coupled to the second terminal of the read selection transistor, a second terminal coupled to a high voltage control line, and a control terminal coupled to a program word line; and
an anti-fuse capacitor having a first terminal directly coupled to the second terminal of the read selection transistor, and a second terminal coupled to a low voltage control line.

US Pat. No. 10,141,034

MEMORY APPARATUS WITH NON-VOLATILE TWO-TERMINAL MEMORY AND EXPANDED, HIGH-SPEED BUS

CROSSBAR, INC., Santa Cl...

1. An electronic memory, comprising:a memory cell array comprising multiple banks of non-volatile, two-terminal memory;
a set of mode registers to facilitate programming the electronic memory according to a programmed operation setting of a set of defined operation settings;
logic circuitry configured to implement operations on a subset of the multiple banks of the memory cell array according to the programmed operation setting and in response to a memory command received from a host device;
a bus interface facilitating communication with the host device, further comprising:
a command and address input comprising greater than ten signal pins for receipt of the memory command and of a physical memory address for the memory command, and
a bidirectional data bus for receiving new data to write to the physical memory address in response to the memory operation being a memory write, or for receiving stored data from the physical memory address and outputting the stored data in response to the memory operation being a memory read, the bidirectional data bus comprising greater than eight signal pins; and
a command and address decoder configured to receive greater than twenty bits of command and address information from the memory command, identify from the greater than twenty bits of command and address information a memory operation specified by the memory command, a target bank of the multiple banks of non-volatile, two-terminal memory and the physical memory address within the target bank.

US Pat. No. 10,141,033

MULTIPLE REGISTER MEMORY ACCESS INSTRUCTIONS, PROCESSORS, METHODS, AND SYSTEMS

Intel Corporation, Santa...

1. A system comprising:a system memory; and
a processor coupled to the system memory, the processor comprising:
a cache to store a plurality of cache lines;
a plurality of general purpose registers;
a plurality of 128-bit packed data registers, including a first destination 128-bit packed data register, and a second destination 128-bit packed data register;
an instruction fetch unit to fetch instructions, including a load from memory instruction;
a decode unit to decode the load from memory instruction, the load from memory instruction indicating a starting memory location in a memory, the starting memory location associated with data to be loaded, and the load from memory instruction having a first field to specify the first destination 128-bit packed data register, and having a second field to specify the second destination 128-bit packed data register; and
a memory access unit coupled to the decode unit, and coupled to the plurality of 128-bit packed data registers, the memory access unit to perform a load from memory operation in response to the decoded load from memory instruction, the load from memory operation to:
load a first 128-bit data from the indicated starting memory location, and store the loaded first 128-bit data in the first destination 128-bit packed data register; and
load a second 128-bit data, which is adjacent to the first 128-bit data, and store the loaded second 128-bit data in the second destination 128-bit packed data register.

US Pat. No. 10,141,032

DOUBLE-BARRIER VACUUM SEAL FOR SEALED SYSTEM

Western Digital Technolog...

1. A system assembly comprising:a hermetically-sealed enclosure;
a first sealing member at an interface of the enclosure and an external environment;
a second sealing member spaced from the first sealing member; and
a vacuum source, operating in a space between the first sealing member and the second sealing member, thereby generating a lower pressure in the space than in the enclosure and than in the external environment.

US Pat. No. 10,141,031

STORAGE SYSTEM AIRFLOW IMPEDANCE REGULATOR

LENOVO ENTERPRISE SOLUTIO...

1. A system, comprising:a storage bay having a peripheral sidewall defining an interior dimensioned to receive a data storage device therein,
at least one flap coupled to the peripheral sidewall, the at least one flap being positionable between a retracted position and a deployed position, the at least one flap substantially blocking airflow through the interior of the peripheral sidewall when the at least one flap is in the deployed position, wherein the at least one flap does not significantly block airflow through the interior of the peripheral sidewall when the at least one flap is in the retracted position, wherein the at least one flap resides in the interior of the storage bay when the at least one flap is in the retracted position;
a retention mechanism configured to retain the at least one flap in the retracted position, the retention mechanism being electronically controllable to cause the at least one flap to move toward the deployed position; and
an electronic connector coupled to the retention mechanism and configured to pass control signals to the retention mechanism.

US Pat. No. 10,141,030

UNLOADING MECHANISM ASSEMBLY

Wistron Corporation, New...

1. An unloading mechanism assembly, adapted to unload an optical disk drive from a housing of an electronic device, the unloading mechanism assembly comprising:a guiding component, disposed at a side of the optical disk drive along a first direction and having a first position limiting slot, wherein the first position limiting slot extends along a second direction, and the first direction is perpendicular to the second direction;
a push rod, disposed in parallel with the guiding component along the first direction;
a driving module, coupled between the guiding component and the push rod and comprising a driving rod movably disposed through the first position limiting slot along a third direction respectively perpendicular to the first direction and the second direction, wherein the push rod is adapted to drive the driving module to pivotally rotate with respect to the guiding component, so as to drive the driving rod of the driving module to enter or to exit the first position limiting slot; and
a stroke limiting pedestal, disposed between the guiding component and the driving module, fixed to the housing, and having a first surface and a second surface opposite to each other and a position limiting groove disposed through the first surface and the second surface, wherein the first surface faces toward the guiding component and an opening direction of the position limiting groove is parallel to the third direction.

US Pat. No. 10,141,029

SECURING APPARATUS FOR DATA STORAGE DEVICE

HONG FU JIN PRECISION IND...

7. A securing apparatus, configured to mount a data storage device in an enclosure, comprising:an enclosure configured to receive a data storage device and comprising a panel;
a shielding assembly secured to the panel and comprising a frame and a rotating plate rotatably mounted to the frame;
a sliding pole slidably mounted to the frame and defining a plurality of latching slots; and
a pressing module slidably mounted to the panel;
wherein the frame defines an aperture for the data storage device to pass through; the rotating plate comprises a plurality of first hooks; and the sliding pole is slidable relative to the frame to engage the first hooks in the latching slots, and the rotating plate is secured to the frame and shields the aperture, preventing the data storage device from being taken out of the aperture, the pressing module is slidable relative to the panel to push the sliding pole, and for disengaging first hooks from the latching slots, and the rotating plate is rotatable relative to the frame to open the aperture, the pressing module comprises an operation pole, and the operation pole comprises two sliding posts; the panel defines two sliding slots; the two sliding posts are slidably received in the two sliding slots, the pressing module further comprises a bracket secured to the panel and a sliding member slidably mounted to the bracket, and the operation pole is slidable relative to the frame to slide the sliding member, the bracket defines a plurality of sliding slots, the sliding member comprises two sliding shafts, and the two sliding shafts are slidably inserted in the two sliding slots.

US Pat. No. 10,141,028

SYSTEM AND METHOD FOR PLAY WHILE RECORDING PROCESSING

Intel Corporation, Santa...

1. At least one non-transitory computer-readable storage media comprising instructions stored thereon that, when executed by a system, cause the system to:receive an indication of one of an MP3 file format, a G2 file format, a WAV file format, or an ACWMA file format;
receive an audio file in a first file format;
encode a first portion of the audio file in the one of the MP3 file format, the G2 file format, the WAV file format, or the ACWMA file format based on the indication;
store the encoded first portion of the audio file as a stored first portion within an encoded audio file on a first computer-readable storage medium accessible to the system, the audio file representing media;
encode a second portion of the audio file in the one of the MP3 file format, the G2 file format, the WAV file format, or the ACWMA file format based on the indication;
store the encoded second portion of the audio file as a stored second portion within the encoded audio file on the first computer-readable storage medium accessible to the system, the second portion of the audio file being different than the first portion; and
render the media represented by the encoded second portion of the audio file while the first portion of the audio file is being encoded and stored, wherein the render involves a read of the encoded second portion of the audio file from the encoded audio file on the first computer-readable storage medium.

US Pat. No. 10,141,027

METHOD, STORAGE MEDIUM, AND ELECTRONIC DEVICE FOR PROVIDING PLURALITY OF IMAGES

Samsung Electronics Co., ...

1. A method of providing an image by an electronic device, the method comprising:acquiring a first image using a first camera module or a communication module;
acquiring second image using a second camera module or the communication module;
acquiring sound data;
generating event information related to at least one of the first image, the second image and the sound data; and
generating a multitrack file including the first image, second image, the sound data, and the event information.

US Pat. No. 10,141,026

ACCESS CONTROL FOR HARDWARE RESOURCES

International Business Ma...

1. A method comprising:receiving an access request for a configuration module in a Field Programmable Gate Array (FPGA), the configuration module being operable to configure functionality of the FPGA based on configuration information stored thereon;
determining whether the access request conforms to a specification specifying access control related to the configuration module; and
in response to determining that the access request conforms to the specification, transmitting the access request to the configuration module for access of the configuration information.

US Pat. No. 10,141,024

HIERARCHICAL AND REDUCED INDEX STRUCTURES FOR MULTIMEDIA FILES

DIVX, LLC, San Diego, CA...

1. A method of decoding a media file for playing back by a playback device, comprising:a media file comprising a plurality of groups of frames, wherein each group of frames comprises a set of encoded video frames; and
a hierarchical index comprising a top-level index indexing references to the plurality of group of frames, wherein each reference to a frame in the plurality of frames comprises a seek point referencing a location from which an individual frame of encoded video can be retrieved;
requesting the hierarchical index;
receiving a user request;
selecting a seek point from the hierarchical index based on the user request;
requesting at least one encoded video frame using the selected seek point from the selected subset of seek points by calculating an offset between the selected seek point and the nearest group of frames;
selecting a group of frames from the plurality of groups of frames using the hierarchical index and the calculated offset; and
decoding at least one encoded video frame in the selected group of frames.

US Pat. No. 10,141,023

METHOD AND SYSTEM FOR MULTIMEDIA SUMMARY GENERATION

INDUSTRIAL TECHNOLOGY RES...

1. A method for multimedia summary generation adapted to a multimedia system, wherein the method comprises following steps:capturing a multimedia information from a multimedia source, wherein the multimedia information comprises at least a video clip or a picture;
processing the video clip or the picture of the multimedia information according to a predetermined condition to generate a multimedia summary candidate, wherein the predetermined condition comprises at least a system setting value, an overlapping time, a maximum video clip length, a minimum video clip length, a people capturing ratio or a combination thereof, for determining a start point and an end point of the video clip, wherein the predetermined condition further comprises screening video clips and pictures similar to the video clip and the picture from the multimedia information by using a clustering algorithm to form a multimedia summary candidate group;
generating a multimedia summary list by checking whether a threshold is predetermined;
outputting the multimedia summary candidate to join the multimedia summary list when no threshold is predetermined,
checking whether the multimedia summary candidate meets the predetermined threshold when the threshold is predetermined;
joining the multimedia summary candidate to the multimedia summary list when the multimedia summary candidate meets the predetermined threshold;
ignoring the multimedia summary candidate when the multimedia summary candidate does not meet the predetermined threshold;
combining the multimedia summary candidate in the multimedia summary candidate list to generate a multimedia summary; and
sending message of the video clips and pictures similar to the video clip and the picture from the multimedia information to generate an Internet spread website via the Internet after forming the multimedia summary candidate group,
wherein the predetermined threshold is realizable at least by a number of users selecting the multimedia summary candidate, a ratio of the number of users selecting the multimedia summary candidate or a combination thereof.

US Pat. No. 10,141,022

METHOD AND ELECTRONIC DEVICE FOR GENERATING MULTIPLE POINT OF VIEW VIDEO

HTC Corporation, Taoyuan...

1. A method of generating a multiple point of view (MPOV) video applicable to an electronic device comprising a processor, the method comprising:obtaining, by the electronic device, a plurality of media contents;
identifying, by the processor of the electronic device, from the plurality of media contents, a first media content and a second media content as relevant media contents related to a same event based on each metadata that corresponds to each of the media contents, wherein the metadata comprises a time information, an audio information and a location information;
transmitting, by the electronic device, a set of relevance criteria to other electronic device for identifying, by the other electronic device, a third media content from another media contents captured by an image capturing component of the other electronic device as one of the relevant media contents relating to the same event as the first media content and the second media content;
receiving, by the electronic device, the third media content identified by the other electronic device from the other electronic device for generating the MPOV video; and
generating, by the processor of the electronic, the MPOV video by combining a partial period from each of the first, second and third media contents into one frame as a highlight of the event, and simultaneously displaying the first, second and third media contents in different sections of the frame.

US Pat. No. 10,141,021

DISTINGUISHING HEVC PICTURES FOR TRICK MODE OPERATIONS

CISCO TECHNOLOGY, INC., ...

1. An apparatus comprising:a memory; and
a processor configured to execute instructions stored on the memory, the instructions comprising:
providing a video program in a transport stream, the transport stream including an elementary stream corresponding to a High Efficiency Video Coding (HEVC) bitstream; and
providing a respective tier number to respective ones of a plurality of pictures in the elementary stream, the respective tier number being provided in a transport stream packet that corresponds to a start of the respective ones of the plurality of pictures,
wherein the respective tier number comprises a lowest tier number when the respective ones of the plurality of pictures comprise an Intra Random Access Point (“IRAP”) picture of the HEVC bitstream,
wherein the respective tier number comprises the lowest tier number plus 1 when the respective ones of the plurality of pictures do not comprise an IRAP picture of the HEVC bitstream and have a temporal identifier comprising 0,
wherein reference pictures are extracted from the elementary stream based on the respective tier number to provide a requested trick mode, and
wherein a predetermined tier number is assigned to a highest tier number that is assigned to the reference pictures that are intended to be extracted for trick mode.

US Pat. No. 10,141,020

DISPLAY DEVICE AND DRIVE METHOD FOR SAME

SHARP KABUSHIKI KAISHA, ...

1. A current drive-type display device, comprising:a plurality of pixels arranged two-dimensionally, each including a display element and a drive element provided in series with the display element to control an amount of a current flowing through the display element;
a current measurement circuit configured to measure a current which passes through the drive element and is output to an outside of the pixel, without passing through the display element;
a correction calculation unit configured to correct a video signal based on a current measurement result by the current measurement circuit; and
a drive circuit configured to write a voltage in accordance with a corrected video signal to the pixel, wherein the correction calculation unit includes:
a light emission current efficiency calculation unit configured to obtain a light emission current efficiency of the display element for each pixel based on the current measurement result;
a first correction unit configured to correct the video signal for each pixel in view of characteristics of each pixel, based on the current measurement result and the light emission current efficiency; and
a second correction unit configured to obtain a correction term for each pixel in view of a difference in the light emission current efficiency compared to neighboring pixels, based on a two-dimensional distribution of the light emission current efficiency, and
the correction calculation unit is configured to obtain the corrected video signal based on the video signal corrected by the first correction unit and the correction term obtained by the second correction unit; wherein
the correction calculation unit comprising:
a light emission current efficiency storage unit configured to store for each pixel a light emission current efficiency obtained by the light emission current efficiency calculation unit.

US Pat. No. 10,141,019

OPTICAL DISK DRIVE

Acer Incorporated, New T...

1. An optical disk drive (ODD), comprising:a housing;
a tray, movably disposed at the housing to move into or move out of the housing;
a panel, connected to the tray and located at a side of the housing;
a first linkage, rotatably disposed on the panel and located between the housing and the panel; and
a second linkage, rotatably disposed on the panel and located between the first linkage and the panel,
by rotating the first linkage with respect to the panel in a first rotating direction, the second linkage being pushed by the first linkage and rotating with respect to the panel in a second rotating direction opposite to the first rotating direction so as to actuate the tray to move out of the housing.

US Pat. No. 10,141,018

METHOD AND SYSTEM FOR OPTICAL DATA STORAGE

Shanghai Naguang Informat...

1. A method of recording optically readable data, the method employing a provided recording medium which comprises an optically active material able to induce a change in properties of the medium in the presence of optical radiation having a first characteristic, and wherein the change in properties can be inhibited by optical radiation having a second characteristic, the method comprising: irradiating a region of the recording medium with a first beam of optical radiation having the first characteristic, the beam having a sufficient intensity within a central portion of the irradiated region and being of sufficient duration to cause an optically induced change in properties of the recording medium; and simultaneously irradiating the region of the recording medium with a second beam of optical radiation having the second characteristic, the second beam having a local intensity minimum within the central portion of the irradiated region, and a local intensity maximum in at least one portion of the irradiated region adjacent to the central portion which is sufficient to inhibit the optically induced change in properties of the recording medium.

US Pat. No. 10,141,017

LUBRICANT FOR MAGNETIC RECORDING MEDIUM, AND MAGNETIC RECORDING MEDIUM

Dexerials Corporation, T...

1. A lubricant for a magnetic recording medium, comprising:an ionic liquid including a Bronsted acid and a Bronsted base that is primary amine as constituents of the ionic liquid,
wherein the Bronsted acid includes a fluorine-containing chain,
wherein the Bronsted base includes a fluorine-containing chain that is a perfluoroalkyl chain or a perfluoropolyether chain,
wherein the fluorine-containing chain in the Bronsted acid is a perfluoropolyether chain or the fluorine-containing chain in the Bronsted base is the perfluoropolyether chain, or the fluorine-containing chain in the Bronsted acid is the perfluoropolyether chain and the fluorine-containing chain in the Bronsted base is the perfluoropolyether chain, and
wherein a number average molecular weight of the fluorine-containing chain in the Bronsted acid is 1,500 or less.

US Pat. No. 10,141,016

BALANCED DELAY AND RESOLUTION FOR TIMING BASED SERVO SYSTEMS

INTERNATIONAL BUSINESS MA...

1. A tape drive-implemented method, comprising:determining a number of lateral position estimates to use for calculating a lateral position value;
receiving lateral position estimates from a single servo channel;
calculating the lateral position value by using the number of lateral position estimates; and
using the lateral position value to control a tape head actuator.

US Pat. No. 10,141,014

WRITE HEAD WITH REDUCED TRAILING SHIELD—SIDE SHIELD SPACING

SEAGATE TECHNOLOGY LLC, ...

1. An apparatus comprising:a bearing surface;
a write pole having a front surface that forms a portion of the bearing surface, the front surface having a leading edge and a trailing edge, the write pole further comprising side edges connecting the leading edge to the trailing edge at the bearing surface;
side shields proximate to the side edges of the write pole;
a trailing shield over the write pole and the side shields;
a trailing shield-write pole gap between the trailing edge of the write pole and the trailing shield; and
a trailing shield-side shield gap between the trailing shield and the side shields, the trailing shield-side shield gap being substantially less that the trailing shield-write pole gap,
the trailing shield-side shield gap comprises a single layer comprising a first material,
the trailer shield-write pole gap comprises multiple layers with at least one of the multiple layers comprising the first material, the multiple layers comprising:
a first thin metal layer;
an insulation layer; and
a second thin metal layer.

US Pat. No. 10,141,013

SHINGLED MAGNETIC RECORDING DEVICE CAPABLE OF SETTING TRACK-PITCH AT TARGET TRACK AND TWO ADJACENT TRACKS

Kabushiki Kaisha Toshiba,...

1. A magnetic disk device comprising:a disk;
a head which writes data to the disk; and
a controller which sets a first track pitch between a first track of the disk and a second track away from the first track in a first direction of a radial direction of the disk based on fringing when the second track is written, sets a second track pitch between the first track and a third track away from the first track in a second direction opposite to the first direction based on fringing when the third track is written, calculates a difference between the first track pitch and the second track pitch, sets, when the difference is less than or equal to a reference value, an area to which the first track is written in a first recording area for wiring a track to a position away from an adjacent track, and sets, when the difference is greater than the reference value, the area to which the first track is written in a second recording area for writing a track such that the track partially overlaps an adjacent track.

US Pat. No. 10,141,012

MANUAL TO AUTOMATIC TURNTABLE PLAYER CONVERSION

1. A conversion device for converting a manual record player to an automatic record player, the manual record player having a housing, a turntable, and a tonearm, the tonearm being structured for movement between a rest position and a record ending position adjacent to a central portion of the turntable, the tonearm defining a range of tonearm motion between the rest position and the record ending position, the conversion device comprising:a base unit that is structured to be secured to the housing of the manual record player below a portion of the range of motion of the tonearm, the base unit comprising:
a piston assembly, comprising:
a piston, the piston being movable between a lower position and an upper position, the piston being structured to engage a piston-engaging tonearm element, and to elevate the tonearm, when the piston is in its upper position, the piston being further structured to disengage the piston-engaging tonearm element when in the lower position;
a first motor assembly, the first motor assembly being structured to move the piston between its lower position and its upper position;
a drive assembly having a second motor assembly, the second motor assembly being operatively connected to the piston assembly, the drive assembly being structured to move the piston assembly between a first position and a second position, the first position corresponding to the rest position of the tonearm, the second position corresponding to the record ending position of the tonearm; and
a control system, the control system being structured to selectively raise and lower the piston, and to selectively move the piston assembly towards the first position and the second position;
whereby the tonearm may be moved to a preselected position by moving the piston assembly under the piston-engaging tonearm element, raising the piston, moving the piston generally horizontally until the tonearm is in a preselected position, and lowering the piston.

US Pat. No. 10,141,011

CONVERSATION QUALITY ANALYSIS

Avaya Inc., Basking Ridg...

1. A method of analyzing a conversation between a plurality of participants, comprising:in a processing system coupled to a storage system that stores the conversation:
determining a first speaker from the plurality of participants;
determining a second speaker from the plurality of participants;
determining a first plurality of turns comprising portions of the conversation when the first speaker is speaking;
determining a second plurality of turns comprising portions of the conversation when the second speaker is speaking; and
determining a characterization for quality of the conversation based on gaps between turns of the first plurality of turns and turns of the second plurality of turns and further based on a plurality of hesitations within turns of the first plurality of turns and the second plurality of turns, wherein each hesitation comprises one or more gaps within speech of a turn that is below a threshold amount of time that indicates when one turn ends and a second turn begins.

US Pat. No. 10,141,010

AUTOMATIC CENSORING OF OBJECTIONABLE SONG LYRICS IN AUDIO

Google LLC, Mountain Vie...

1. A method of censoring audio data comprising:receiving audio data comprising a tag and first amplitude data as a function of time, wherein the first amplitude data represents a plurality of spoken words occurring over a duration, as well as non-spoken word sounds overlapping with at least some of the spoken words during the duration;
accessing a database with the tag to obtain a set of lyrics comprising a plurality of words;
comparing the words in the lyrics to a blacklist to identify a subset of blacklisted words;
processing, by a processor, both the set of lyrics and the first amplitude data together to identify a plurality of starting timestamps in the first amplitude data, each of the starting timestamps indicating a time during the duration when one of the subset of blacklisted words begins in the first amplitude data, wherein the processing comprises matching, by the processor, the first amplitude data to training data comprising second amplitude data representing identified spoken phonemes of at least one spoken word sound related to the subset of blacklisted words;
identifying, by the processor, the plurality of starting timestamps based on the matching;
adjusting, by the processor, the first amplitude data by replacing the first amplitude data starting at the starting timestamps of the subset of blacklisted words with other amplitude data to render the audio at the subset of blacklisted words inaudible; and
providing, by the processor, the adjusted first amplitude data for playback of the audio data.

US Pat. No. 10,141,009

SYSTEM AND METHOD FOR CLUSTER-BASED AUDIO EVENT DETECTION

Pindrop Security, Inc., ...

1. A computer-implemented method for audio event detection, comprising:forming clusters of audio frames of an audio signal using K-means and at least one Gaussian mixture model (GMM), wherein each cluster includes audio frames having similar features, and wherein a number k equal to a total number of the clusters of audio frames is equal to 1 plus a ceiling function applied to a quotient obtained by dividing a duration of a recording of the audio signal by an average duration of the clusters of audio frames; and
determining, for at least one of the clusters of audio frames, whether the cluster includes a type of sound data using a supervised classifier.

US Pat. No. 10,141,008

REAL-TIME VOICE MASKING IN A COMPUTER NETWORK

Interviewing.io, Inc., S...

1. A computer system, comprising one or more hardware computer processors programmed, via executable code instructions, to:receive an audio signal representing at least a portion of speech;
split the audio signal into a plurality of overlapping segments;
generate a frequency domain representation of a current signal segment in the plurality of overlapping segments, wherein the frequency domain representation comprises components corresponding to a plurality of frequency bins;
generate, from the frequency domain representation of the current signal segment, a polar representation comprising a magnitude component and a phase component for each of the frequency bins;
generate a refined frequency domain representation of the current signal segment based on a comparison, for each of the frequency bins, between a first phase component from the current signal segment and a second phase component from a prior signal segment;
calculate an initial cepstrum from the refined frequency domain representation;
calculate a spectral envelope from the initial cepstrum using iterative smoothing with a resolution lower than a resolution of the frequency domain representation, wherein the iterative smoothing terminates after a predetermined number of iterations or a predetermined degree of convergence is reached;
calculate an excitation spectrum from the refined frequency domain representation and the spectral envelope;
rescale the spectral envelope based on a formant adjustment parameter to obtain a modified spectral envelope, wherein the spectral envelope is distinct from the current signal segment, the frequency domain representation, and the initial cepstrum;
calculate a modified frequency domain representation by combining the modified spectral envelope and the excitation spectrum;
synthesize a modified signal segment from the modified frequency domain representation; and
transmit the modified signal segment over a computer network.

US Pat. No. 10,141,007

SOUND/VIBRATION SPECTRUM ANALYZING DEVICE AND METHODS OF ACQUIRING AND ANALYZING FREQUENCY INFORMATION

SAMSUNG ELECTRONICS CO., ...

22. A method of analyzing a sound and vibration spectrum using a plurality of resonators having different center frequencies, the method comprising:acquiring a first frequency signal of a first resonance mode of at least some of the plurality of resonators;
acquiring a second frequency signal of a second resonance mode of the at least some of the plurality of resonators; and
analyzing each of the first frequency signal of the first resonance mode and the second frequency signal of the second resonance mode.

US Pat. No. 10,141,006

ARTIFICIAL INTELLIGENCE SYSTEM FOR IMPROVING ACCESSIBILITY OF DIGITIZED SPEECH

AMAZON TECHNOLOGIES, INC....

1. An artificial intelligence system comprising:one or more memories storing computer-executable instructions; and
one or more hardware processors, to execute the computer-executable instructions to:
access webpage data including visual data for rendering visible elements of a webpage and audio data for rendering audible elements that include speech representative of at least a subset of the visible elements of the webpage;
generate text data based on the audio data using a speech-to-text module, the text data including a transcription of the audible elements;
determine, based on the text data, one or more of:
a repeated string in the text data;
a semantic error in the text data;
a total quantity of text, in the text data, that exceeds a threshold total quantity;
a quantity of text, in the text data, that corresponds to a particular visible feature of the webpage, that is less than a threshold minimum value;
a quantity of text, in the text data, that corresponds to the particular visible feature, that is greater than a threshold maximum value; or
a separation between at least a portion of the text data and the particular visible feature that exceeds a threshold separation;
access first user data indicative of first user interactions with a visible element of the webpage;
determine an audible element that corresponds to the visible element;
access second user data indicative of second user interactions with the audible element;
determine one or more differences between the first user data and the second user data, the one or more differences indicating that the first user interactions with the visible element exceed the second user interactions with the audible element; and
based on the text data and the one or more differences, modify the audio data by one or more of:
removing at least a portion of the audible element;
moving the audible element from a first location in the webpage to a second location subsequent to the first location; or
modifying a portion of the audio data that corresponds to the one or more of the repeated text string, the semantic error, the total quantity of text that exceeds the threshold quantity, the quantity of text that is less than the threshold minimum value, the quantity of text that is greater than the threshold maximum value, or the separation.

US Pat. No. 10,141,005

NOISE DETECTION AND REMOVAL SYSTEMS, AND RELATED METHODS

Apple Inc., Cupertino, C...

1. A method for removing an unwanted target signal from an observed signal, the method comprising:assessing each of a plurality of regions of an observed signal to determine whether the respective region includes a component of an unwanted target signal from a probabilistic correlation between a prior event and a presence of the unwanted target signal following the prior event, wherein each region spans a selected number of samples of the observed signal, and the selected number of samples in each region is substantially less than a total number of samples of the observed signal, wherein the unwanted target signal comprises one or more of a stationary signal, a non-stationary signal, and a colored signal;
in response to determining one of the regions contains the component of the unwanted target signal, searching the observed signal within the respective region and over a selected number of samples adjacent the respective region for one or more other components of the unwanted target signal;
identifying a removal region of the observed signal corresponding to each component of the unwanted target signal;
supplanting each component of the observed signal corresponding to each respective removal region with an estimate of a corresponding portion of a desired signal based on the observed signal in a region adjacent the respective removal region to form a corrected signal.

US Pat. No. 10,141,004

HYBRID WAVEFORM-CODED AND PARAMETRIC-CODED SPEECH ENHANCEMENT

Dolby Laboratories Licens...

1. A method, comprising:receiving mixed audio content, in a reference audio channel representation, that are distributed over a plurality of audio channels of the reference audio channel representation, the mixed audio content having a mix of speech content and non-speech audio content;
transforming one or more portions of the mixed audio content that are distributed over two or more non-Mid/Side (non-M/S) channels in the plurality of audio channels of the reference audio channel representation into one or more portions of the transformed mixed audio content in an M/S audio channel representation that are distributed over one or more channels of the M/S audio channel representation, wherein the M/S audio channel representation comprises at least a mid-channel signal and a side-channel signal, wherein the mid-channel signal represents a weighted or non-weighted sum of two channels of the reference audio channel representation, and wherein the side-channel signal represents a weighted or non-weighted difference of two channels of the reference audio channel representation;
determining metadata for speech enhancement of the one or more portions of the transformed mixed audio content in the M/S audio channel representation, wherein a first type of speech enhancement is waveform-encoded speech enhancement of a reduced quality version of the mid-channel signal in the M/S audio channel representation, and a second type of speech enhancement is parametric-encoded speech enhancement of a reconstructed version of the mid-channel signal in the M/S audio channel representation, the metadata including a mid-channel prediction parameter to reconstruct the mid-channel signal, a first gain parameter for waveform-encoded speech enhancement of the mid-channel signal, and a second gain parameter for parametric-encoded speech enhancement of the reconstructed mid-channel signal; and
generating an audio signal that comprises the mixed audio content and the metadata for speech enhancement of the one or more portions of the transformed mixed audio content in the M/S audio channel representation;
wherein the method is performed by one or more computing devices.

US Pat. No. 10,141,003

NOISE LEVEL ESTIMATION

Dolby Laboratories Licens...

1. A method for noise level estimation, comprising:responsive to an increase of a signal level of a noise signal, calculating an impulsive noise probability of the noise signal, the impulsive noise probability indicating a likelihood that the noise signal is an impulsive noise;
determining a variable smoothing factor for noise level estimation based on the impulsive noise probability, the variable smoothing factor being associated with a previous estimated level of the noise signal; and
smoothing the noise signal with the variable smoothing factor so as to determine a current estimated level of the noise signal.

US Pat. No. 10,141,002

COMMUNICATION DEVICES AND METHODS FOR TEMPORAL ANALYSIS OF VOICE CALLS

Plantronics, Inc., Santa...

1. A headset comprising:a communications interface to receive a remote call participant speech from a remote call participant during a voice call;
a microphone arranged to receive a headset wearer speech during the voice call;
a speaker arranged to output the remote call participant speech during the voice call; and
a processor configured to analyze the remote call participant speech to identify a speech characteristic of the remote call participant and determine a headset wearer call performance utilizing the speech characteristic of the remote call participant, the processor further configured to analyze the headset wearer speech to determine the headset wearer call performance by determining a temporal analysis metric of the speech characteristic of the remote call participant relative to the headset wearer speech, and the processor further configured to send an alert message over the communications interface if the headset wearer call performance indicates a problematic voice call.

US Pat. No. 10,141,001

SYSTEMS, METHODS, APPARATUS, AND COMPUTER-READABLE MEDIA FOR ADAPTIVE FORMANT SHARPENING IN LINEAR PREDICTION CODING

QUALCOMM Incorporated, S...

1. An apparatus comprising:an audio coder input configured to receive an audio signal;
a first calculator configured to determine a long-term noise estimate of the audio signal;
a second calculator configured to determine a formant-sharpening factor based on the determined long-term noise estimate;
a filter configured to filter a codebook vector based on the determined formant-sharpening factor to generate a filtered codebook vector, wherein the codebook vector is based on information from the audio signal; and
an audio coder configured to:
generate a formant-sharpened low-band excitation signal based on the filtered codebook vector; and
generate a synthesized audio signal based on the formant-sharpened low-band excitation signal.

US Pat. No. 10,141,000

HIERARCHICAL DECORRELATION OF MULTICHANNEL AUDIO

GOOGLE LLC, Mountain Vie...

1. A method for encoding an audio signal comprised of a plurality of channels, the method comprising:segmenting an audio signal into frames;
transforming each of the frames into a frequency domain representation;
estimating, for each frame, a signal model;
quantizing the signal model for each frame;
performing hierarchical decorrelation using the frequency domain representation and the quantized signal model for each of the frames; and
quantizing an outcome of the hierarchical decorrelation using a quantizer,
wherein performing the hierarchical decorrelation includes:
selecting a set of channels, of the plurality of channels of the audio signal, based on a number of bits saved for audio compression;
performing a unitary transform on the selected set of channels, yielding a set of decorrelated channels; and
combining the set of decorrelated channels with remaining channels of the plurality of channels other than the selected set of channels.

US Pat. No. 10,140,999

METHOD AND APPARATUS FOR TRANSMITTING AND RECEIVING OF THE OBJECT-BASED AUDIO CONTENTS

ELECTRONICS AND TELECOMMU...

1. A method of transmitting object-based audio contents comprising:identifying a plurality of elementary stream related to an object;
packetizing the plurality of elementary stream using a PID (packet identification);
generating an object-based audio contents including the packetized elementary stream,
wherein the object-based audio contents includes the 3D location information of the object represented in the 3D coordinate axis (X, Y, and Z), and a volume of the object,
wherein the object-based audio contents include common information related to the object,
wherein the common information includes at least one of a length of packet, a type of the elementary streams, and time information related to the elementary streams.

US Pat. No. 10,140,997

DECODER AND METHOD FOR DECODING AN AUDIO SIGNAL, ENCODER AND METHOD FOR ENCODING AN AUDIO SIGNAL

Fraunhofer-Gesellschaft z...

1. A decoder for decoding an audio signal, the decoder comprising:a first target spectrum generator for generating a first target spectrum for a first time frame of a subband signal of the audio signal using first correction data;
a first phase corrector for correcting, with a first phase correction algorithm, a phase of the subband signal in the first time frame of the audio signal wherein the correction is performed by reducing, for the first time frame, a difference between a measure of the subband signal in the first time frame of the audio signal and the first target spectrum;
an audio subband signal calculator for calculating the audio subband signal for the first time frame using a corrected phase determined by the first phase corrector for the first time frame;
a second target spectrum generator, wherein the second target spectrum generator is configured for generating a second target spectrum for the second time frame of the subband of the audio signal using second correction data;
a second phase corrector for correcting, with a second phase correction algorithm, a phase of the subband signal in the second time frame of the audio signal, wherein the correction is performed by reducing, for the second time frame, a difference between a measure of the subband signal in the second time frame of the audio signal and the second target spectrum,
wherein the second phase correction algorithm is different from the first phase correction algorithm, and
wherein the audio subband signal calculator is configured for calculating the audio subband signal for the second time frame using a corrected phase determined by the second phase corrector for the second time frame.

US Pat. No. 10,140,996

SIGNALING LAYERS FOR SCALABLE CODING OF HIGHER ORDER AMBISONIC AUDIO DATA

QUALCOMM Incorporated, S...

1. A device configured to decode a bitstream representative of a higher order ambisonic audio signal, the device comprising:a memory configured to store the bitstream; and
one or more processors configured to:
obtain, from the bitstream, an indication of a number of layers specified in the bitstream;
obtain, from the bitstream, an indication of a number of channels specified in the bitstream; and
obtain the layers of the bitstream based on the indication of the number of layers specified in the bitstream and the indication of the number of channels specified in the bitstream.

US Pat. No. 10,140,995

DECODING DEVICE, DECODING METHOD, ENCODING DEVICE, ENCODING METHOD, AND PROGRAM

Sony Corporation, Tokyo ...

1. A decoding device comprising:a decoding unit that decodes audio data included in an encoded bit stream;
a read unit that reads information indicating whether extended information is present in the encoded bit stream from the encoded bit stream and reads the extended information on the basis of the read information; and
a processing unit that processes the decoded audio data on the basis of the extended information,
wherein the extended information includes first information for specifying a downmix coefficient, and further includes second information,
the processing unit downmixes the decoded audio data of a plurality of channels on the basis of the downmix coefficient to provide downmixed audio data, and
the processing unit further downmixes the downmixed audio data on the basis of the second information.

US Pat. No. 10,140,994

FRAME ERROR CONCEALMENT METHOD AND APPARATUS, AND AUDIO DECODING METHOD AND APPARATUS

SAMSUNG ELECTRONICS CO., ...

1. A time domain frame error concealment apparatus comprising:at least one processor configured to:
when a frame is classified as an error frame or a next good frame after the error frame, select one tool from among a plurality of tools including a first tool using phase matching and a second tool using repetition and smoothing, based on a plurality of parameters including stationarity of the frame, where the frame corresponds to a time domain signal generated after time-frequency inverse transform processing; and
perform a corresponding time domain error concealment processing on the frame, based on the selected tool,
wherein the first tool includes a first mode related to a single error frame, a second mode related to a burst error frame, and a third mode related to the next good frame after the error frame,
wherein the second tool includes a first mode related to the error frame, a second mode related to the next good frame after the single error frame, and a third mode related to the next good frame after the burst error frame, and
wherein the processor is configured to select the first tool for either the next good frame after the error frame or the burst error frame, when the first tool is used for the error frame.

US Pat. No. 10,140,993

APPARATUS AND METHOD FOR GENERATING AN ERROR CONCEALMENT SIGNAL USING INDIVIDUAL REPLACEMENT LPC REPRESENTATIONS FOR INDIVIDUAL CODEBOOK INFORMATION

Fraunhofer-Gesellschaft z...

1. An apparatus for generating an error concealment audio signal, comprising:an LPC (linear prediction coding) representation generator for generating a first replacement LPC representation and a different second replacement LPC representation;
an LPC synthesizer for filtering a first codebook information using the first replacement LPC representation to acquire a first replacement audio signal and for filtering a different second codebook information using the second replacement LPC representation to acquire a second replacement audio signal; and
a replacement signal combiner for combining the first replacement audio signal and the second replacement audio signal by summing-up the first replacement audio signal and the second replacement audio signal to acquire the error concealment audio signal,
wherein at least one of the LPC representation generator, the LPC synthesizer, and the replacement signal combiner is implemented, at least in part, by one or more hardware elements of the apparatus.

US Pat. No. 10,140,992

SYSTEM AND METHOD FOR VOICE AUTHENTICATION OVER A COMPUTER NETWORK

NUANCE COMMUNICATIONS, IN...

1. A method comprising:receiving, on a mobile device, a speech sample from a user as part of a request for a restricted-access resource separate from the mobile device; and
when the user has previously established identity with the mobile device:
transmitting the speech sample along with the request to an authentication server which compares the speech sample to a previously established speech profile associated with the user; and
providing access to the restricted-access resource if the speech sample from the user matches the previously established speech profile with a minimum certainty threshold.

US Pat. No. 10,140,991

USING AUDIO CHARACTERISTICS TO IDENTIFY SPEAKERS AND MEDIA ITEMS

Google LLC, Mountain Vie...

1. A method performed by one or more computers, the method comprising:receiving, by the one or more computers, a request from a client device for media content, the request including at least a portion of a first media item or a URL corresponding to the first media item, the first media item including speech of a person;
based on the data indicating the first media item, selecting, by the one or more computers, one or more other media items based on one or more representations of acoustic characteristics of the one or more other media items,
wherein the one or more representations of acoustic characteristics of the one or more other media items comprise, for each of the one or more other media items, a speaker representation that includes (i) an i-vector or d-vector generated from the other media item, or (ii) a hash of an i-vector or d-vector generated from the other media item;
wherein each of the one or more other media items is selected based on a comparison of (i) an i-vector, d-vector or hash determined from speech in the first media item with (ii) the speaker representation for the other media item,
wherein:
each of the selected one or more other media items is different from the first media item;
each of the selected one or more other media items includes speech of the same person whose speech is included in the first media item; and
each of the selected one or more other media items is determined, based on the acoustic characteristics of the media item, to include speech demonstrating speaker characteristics that have at least a threshold level of similarity with speaker characteristics determined from speech in the first media item;
generating, by the one or more computers, data indicating the selected one or more other media items that are each different from the first media item and that each include speech of the same person whose speech is included in the first media item; and
providing, by the one or more computers and to the client device, a response to the request that includes the data indicating the selected one or more other media items that are each different from the first media item and that each include speech of the same person whose speech is included in the first media item.

US Pat. No. 10,140,990

DISPLAY APPARATUS CAPABLE OF RELEASING A VOICE INPUT MODE BY SENSING A SPEECH FINISH AND VOICE CONTROL METHOD THEREOF

SAMSUNG ELECTRONICS CO., ...

1. A display apparatus that performs a search based on a voice of a user in a voice input mode and exits the voice input mode according to a result of the search, the display apparatus comprising:a display;
a voice receiver configured to receive a voice signal in the voice input mode;
a communicator configured to communicate with a server; and
a processor configured to:
based on the voice signal being received by the voice receiver within a standby time period, convert the voice signal into text by using a voice recognition program, transmit the text to the server through the communicator, receive one or more search results relating to the voice signal from the server through the communicator, the one or more search results being obtained by the server based on the text,
based on a single search result being received from the server through the communicator, control the display to display the single search result relating to the voice signal and exit the voice input mode, and
based on a plurality of search results being received from the server through the communicator, control the display to display a list including the search results relating to the voice signal, reset the standby time period, maintain the voice input mode for the reset standby time period and await input of a subsequent voice signal for the reset standby time period in the voice input mode,
wherein the processor is further configured to:
based on receiving the subsequent voice signal to select one of the search results included in the list within the reset standby time period, receive an additional search result relating to the selected search result from the server through the communicator, and
based on a single additional search result being received from the server through the communicator within the reset standby time period, control the display to display the single additional search result and exit the voice input mode without awaiting lapse of the reset standby time period.

US Pat. No. 10,140,989

METHOD AND SYSTEM FOR SPEECH RECOGNITION PROCESSING

Alibaba Group Holding Lim...

1. A speech recognition system, comprising:an instant messaging server (IMS) configured to:
assign a unique identifier to speech information received from a sending end to serve as a speech ID;
send the speech information to a receiving end; and
in response to a determination that a speech recognition request issued from a user of the receiving end corresponding to the speech information is received:
extract the speech ID corresponding to the speech information from the speech recognition request;
look up the speech information; and
deliver a speech recognition command in the speech recognition request and the looked-up speech information to one of a speech recognition module, a speech recognition server, or a speech recognition server cluster;
the one of the speech recognition module, the speech recognition server, or the speech recognition server cluster configured to:
perform speech recognition based on the speech information and the speech recognition command; and
convert the speech information to obtain text information corresponding to the speech information, wherein the IMS obtains the text information from the one of the speech recognition module, the speech recognition server, or the speech recognition server cluster; and
a sending module configured to send the obtained text information back as a speech recognition result to the receiving end, wherein the speech recognition module is set up in the one of the IMS, the speech recognition server, or the speech recognition server cluster, wherein the IMS is further configured to:
store the obtained text information in a cache in correspondence with the speech ID; and
in response to a determination that another speech recognition request for the same speech information is received:
extract a speech ID from the other speech recognition request; and
locate the text information corresponding to the speech ID from the other speech recognition request.

US Pat. No. 10,140,988

SPEECH RECOGNITION

Microsoft Technology Lice...

1. A computer system comprising:an input configured to receive voice input from a user, the voice input having speech intervals separated by non-speech intervals;
a system configured to identify individual words in the voice input during the speech intervals of the voice input, and store the identified individual words in memory;
a speech overload detection module configured to detect a speech overload condition at a time during a speech interval of the voice input, the speech overload condition being based on one or more of a rate at which words are identified during the speech interval, or a state of an artificial intelligence (AI) tree being driven by the voice input; and
a notification module configured to output, in response to the speech overload detection module detecting the speech overload condition, a notification of the speech overload condition.

US Pat. No. 10,140,987

AERIAL DRONE COMPANION DEVICE AND A METHOD OF OPERATING AN AERIAL DRONE COMPANION DEVICE

INTERNATIONAL BUSINESS MA...

1. A method of operating an aerial drone companion device, comprising:detecting a first voice command spoken by a first user by at least one microphone disposed on the aerial drone companion device;
autonomously orientating the aerial drone companion device such that an image capture device disposed on the aerial drone companion device faces the first user in response to detecting the first voice command;
detecting a second voice command spoken by the first user by the at least one microphone while the image capture device faces the first user and while the first user looks at the image capture device;
transmitting the second voice command from the aerial drone companion device to a computer located remotely from the aerial drone companion device;
receiving a task signal indicating a task to be performed, wherein the task signal is generated by the computer based on the second voice command, and the task signal is transmitted by the computer and received by the aerial drone companion device; and
autonomously executing the task by the aerial drone companion device.

US Pat. No. 10,140,986

SPEECH RECOGNITION

Microsoft Technology Lice...

1. A computer system comprising:an input configured to receive voice input from a user;
an Automatic Speech Recognition (ASR) system for identifying individual words in the voice input, wherein the ASR system is configured to generate in memory during at least one speech activity interval in the voice input a word set of one or more words it has identified in the voice input, and update the word set in the memory based on identifying a new word in the voice input to add the new word to the word set;
a lookup module configured to retrieve at least one word from the word set during the speech activity interval in the voice input at a first time whilst the speech activity interval is still ongoing, and perform a lookup whilst the speech activity interval is still ongoing to pre-retrieve information associated with the at least one word, the pre-retrieved information including one or more relevant words that are contextually relevant to and different from the at least one word from the word set; and
a response generation module configured to detect an end of the speech activity interval at a second time that is subsequent to the first time, the word set having been updated by the ASR system at least once between the first time and the second time, and the response generation module further configured to generate a response for output, wherein the response conveys the pre-retrieved information from the lookup module.

US Pat. No. 10,140,985

SERVER FOR PROCESSING SPEECH, CONTROL METHOD THEREOF, IMAGE PROCESSING APPARATUS, AND CONTROL METHOD THEREOF

SAMSUNG ELECTRONICS CO., ...

1. A system comprising:a server; and
at least one image processing apparatus,
wherein the server comprises:
a communicator configured to communicate with the at least one image processing apparatus;
a processor configured to:
based on an input of a speech of a user being received from the at least one image processing apparatus, control the communicator to:
transmit, to the at least one image processing apparatus, a plurality of retrieval results corresponding to the input of the speech of the user,
wherein the at least one image processing apparatus comprises:
a display;
a user interface comprising:
a speech input interface configured to receive the input of a speech of a user; and
a non-speech input interface configured to receive a non-speech user input;
a communicator configured to communicate with the server; and
a processor configured to:
based on the input of the speech being received through the speech input interface,
control the communicator of the at least one image processing apparatus to transmit the input of the speech to the server;
control the display to display the plurality of retrieval results to be selected, based on the plurality of retrieval results corresponding to the input of the speech being received from the server;
based on the non-speech user input being received through the non-speech input interface,
identify whether the non-speech user input is related to the input of the speech of the user;
based on the non-speech user input not being related to the input of the speech of the user, perform an operation corresponding to the non-speech user input, independently of the input of the speech; and
based on the non-speech user input being related to the input of the speech of the user, perform an operation on one of the plurality of retrieval results selected by the non-speech user input, based on a result of processing the input of the speech.

US Pat. No. 10,140,984

METHOD AND APPARATUS FOR PROCESSING VOICE DATA

Baidu Online Network Tech...

1. A method for processing voice data, comprising:receiving voice data sent by a user terminal;
extracting a voiceprint characteristic vector in the voice data;
matching the voiceprint characteristic vector with a registered voiceprint vector prestored by the user, and generating a matching degree between the voiceprint characteristic vector and the registered voiceprint vector;
determining whether the matching degree is greater than or equal to a preset update threshold; and
updating the registered voiceprint vector by using the voiceprint characteristic vector and the voice data in response to determining that the matching degree is greater than or equal to the preset update threshold
the updating the registered voiceprint vector by using the voiceprint characteristic vector and the voice data comprising:
acquiring an amount of registered voice data inputted by the user and each of voiceprint characteristic vectors prestored by the user; and
updating the registered voiceprint vector according to the each of voiceprint characteristic vectors prestored by the user, an amount of voice data prestored by the user, an amount of the registered voice data and the registered voiceprint vector,
the updating the registered voiceprint vector according to the each of voiceprint characteristic vectors prestored by the user, the amount of voice data prestored by the user, the amount of the registered voice data and the registered voiceprint vector comprising:
carrying out a data standardization operation on the each of voiceprint characteristic vectors prestored by the user, and carrying out a summing operation on the vector subject to the data standardization operation to obtain the sum of the voiceprint characteristic vectors prestored by the user;
multiplying the amount of the registered voice data by the registered voiceprint vector to obtain a product of the registered voiceprint vector; and
calculating a vector sum of the sum of the voiceprint characteristic vectors and the product of the registered voiceprint vector, calculating an amount sum of the amount of the voice data prestored by the user and the amount of the registered voice data, and dividing the amount sum by the vector sum to obtain the updated registered voiceprint vector.

US Pat. No. 10,140,983

BUILDING OF N-GRAM LANGUAGE MODEL FOR AUTOMATIC SPEECH RECOGNITION (ASR)

INTERNATIONAL BUSINESS MA...

1. A computer-implemented method for building an n-gram language model for an automatic speech recognition, comprising:reading training text data and additional text data for the n-gram language model from storage, wherein the additional text data comprises a plurality of sentences having at least one target keyword;
building the n-gram language model by a smoothing algorithm having discount parameters for n-gram counts, wherein each discount parameter for each target keyword is tuned using development data which are different from the additional text data so that a predetermined balance between precision and recall is achieved;
decreasing erroneous detection of one or more target keywords by tuning all of the discount parameters to be larger, or increasing n-gram counts of each of a plurality of words erroneously detected as one of the one or more target keywords by tuning each of the discount parameters to be smaller; and
performing spoken term detection based on the n-gram language model built using the development data.

US Pat. No. 10,140,982

METHOD FOR USING PAUSES DETECTED IN SPEECH INPUT TO ASSIST IN INTERPRETING THE INPUT DURING CONVERSATIONAL INTERACTION FOR INFORMATION RETRIEVAL

VEVEO, INC., Andover, MA...

1. A method for using speech disfluencies detected in speech input to assist in interpreting the input, the method comprising:providing access to a set of content items, each of the content items being associated with metadata that describes the corresponding content item;
receiving a speech input from a user, the input intended by the user to identify at least one desired content item;
detecting a speech disfluency in the speech input;
determining a confidence measure of the user in a portion of the speech input following the speech disfluency based on a manner by which the user utters the portion of the speech input following the speech disfluency;
upon a condition in which the confidence measure does not exceed a threshold value:
retrieving from memory preferences of the user for particular content items of the set of content items;
comparing the portion of the speech input to metadata associated with the particular content items of the set of content items;
determining, based on the comparing, whether metadata associated with a content item of the particular content items at least partially matches the portion of the speech input;
in response to determining that metadata associated with the content item of the particular content items at least partially matches the portion of the speech input;
replacing the portion of the speech input with the metadata associated with the content item to generate a query comprising a modified speech input for searching a database associated with the set of content items;
selecting from the database a subset of content items from the set of content items based on comparing the query and metadata associated with the subset of content items;
upon a condition in which the confidence measure exceeds a threshold value, selecting the subset of content items from the set of content items based on comparing the speech input and the metadata associated with the subset of content items; and
presenting the subset of content items to the user.

US Pat. No. 10,140,981

DYNAMIC ARC WEIGHTS IN SPEECH RECOGNITION MODELS

Amazon Technologies, Inc....

1. A system comprising:a computer-readable memory storing executable instructions; and
one or more processors in communication with the computer-readable memory, wherein the one or more processors are programmed by the executable instructions to at least:
obtain audio data, generated by a microphone, regarding an utterance of a user;
obtain context information regarding a context associated with the utterance;
obtain a language model comprising a finite state transducer, wherein the finite state transducer comprises a plurality of states and a plurality of weights, and wherein the plurality of weights comprises:
a first default weight corresponding to a transition from a first state of the plurality of states to a second state of the plurality of states; and
a second default weight corresponding to a transition from the first state to a third state of the plurality of states;
select a replacement weight, from a plurality of predetermined replacement weights that correspond to the transition from the first state to the second state,
wherein the replacement weight is selected from the plurality of predetermined replacement weights based at least partly on the context information,
wherein the context information indicates the utterance is associated with a first context,
wherein the transition from the first state to the second state is a transition to a portion of the finite state transducer comprising a first subset of states trained for recognition of a first plurality of words associated with the first context,
wherein the transition from the first state to the third state is a transition to a portion of the finite state transducer comprising a second subset of states trained for recognition of a second plurality of words associated with a second context different than the first context, and
wherein use of the replacement weight increases a likelihood of the transition from the first state to the second state in comparison with a transition from the first state to the third state;
replace the first default weight in the language model with the replacement weight, wherein a third default weight corresponding to a transition from the second state to a fourth state remains part of the language model during use of the language model with the replacement weight;
generate speech recognition results using the audio data, the language model, and the replacement weight, wherein a quantity of states of the finite state transducer is the same during use of the replacement weight as when using the first default weight; and
present, via a user interface, a response to the utterance, wherein the response is based at least partly on the speech recognition results.

US Pat. No. 10,140,980

COMPLEX LINEAR PROJECTION FOR ACOUSTIC MODELING

Google LCC, Mountain Vie...

1. A computer-implemented method comprising:receiving, by one or more computers, audio data corresponding to an utterance;
generating, by the one or more computers, frequency domain data using the audio data;
processing, by the one or more computers, the frequency domain data using complex linear projection;
providing, by the one or more computers, the processed frequency domain data to a neural network trained as an acoustic model; and
generating, by the one or more computers, a transcription for the utterance that is determined based at least on output that the neural network provides in response to receiving the processed frequency domain data.

US Pat. No. 10,140,978

SELECTING ALTERNATES IN SPEECH RECOGNITION

Google LLC, Mountain Vie...

1. A method comprising:obtaining, by one or more computers, acoustic data for an utterance;
determining, by the one or more computers, speech recognition candidates for the utterance based on the acoustic data;
obtaining, by the one or more computers, a ranking of the speech recognition candidates determined by a speech recognizer;
selecting, by the one or more computers, a transcription for the acoustic data from among the speech recognition candidates;
determining, by the one or more computers, feature scores from the ranking of the speech recognition candidates;
generating, by the one or more computers, a classifier output for each of at least some of the speech recognition candidates, wherein each of the classifier outputs is an output that a trained machine learning classifier provided in response to receiving at least one of the feature scores as input;
selecting, by the one or more computers, a subset of the speech recognition candidates based on the classifier outputs of the trained machine learning classifier; and
providing, by the one or more computers and for display at a client device, data indicating (i) the transcription for the utterance and (ii) the subset of the speech recognition candidates as a set of alternative transcriptions for the utterance, wherein the one or more computers are configured to provide different quantities of alternative transcriptions for different utterances.

US Pat. No. 10,140,977

GENERATING ADDITIONAL TRAINING DATA FOR A NATURAL LANGUAGE UNDERSTANDING ENGINE

botbotbotbot Inc., Palo ...

1. A system comprising one or more computers and one or more storage devices storing instructions that when executed by the one or more computers cause the one or more computers to perform operations comprising:obtaining, during operation of a computer-implemented dialogue system comprising a natural language understanding engine, data identifying (i) a first input conversational turn that was provided as input to the natural language understanding engine during a dialogue between a user and the computer-implemented dialogue system and (ii) a first annotation of the first input conversational turn generated by the natural language understanding engine, wherein the natural language understanding engine has been trained on a first set of training data comprising a plurality of training conversational turns;
determining that the first annotation accurately characterized the first input conversational turn;
determining, based on the training conversational turns in the first set of training data, that the natural language understanding engine is likely to generate inaccurate annotations of other conversational turns that are similar to the first input conversational turn;
in response to determining that (i) the first annotation accurately characterized the first input conversational turn but (ii) the natural language understanding engine is likely to generate inaccurate annotations of other conversational turns that are similar to the first input conversational turn:
obtaining one or more first paraphrases of the first input conversational turn; and
generating, for each of the one or more first paraphrases, a respective first training example that identifies the first annotation as the correct annotation for the first paraphrase; and
training the natural language understanding engine on at least the first training examples.

US Pat. No. 10,140,976

DISCRIMINATIVE TRAINING OF AUTOMATIC SPEECH RECOGNITION MODELS WITH NATURAL LANGUAGE PROCESSING DICTIONARY FOR SPOKEN LANGUAGE PROCESSING

INTERNATIONAL BUSINESS MA...

1. A method for language processing, comprising:training one or more automatic speech recognition models using an automatic speech recognition dictionary and speech recognition training data;
determining a set of N automatic speech recognition hypotheses that characterize a spoken input, based on the one or more automatic speech recognition models, using a processor;
selecting a hypothesis from the set of N automatic speech recognition hypotheses using a discriminative language model and a first natural language processing dictionary that excludes words having little discriminatory value according to an error rate of only words other than words having little likely effect on the natural language outcome in each hypothesis; and
performing natural language processing on the selected hypothesis using a second natural language processing dictionary that is different from the automatic speech recognition dictionary and the first natural language processing dictionary.

US Pat. No. 10,140,975

SPEECH ENDPOINTING BASED ON WORD COMPARISONS

Google LLC, Mountain Vie...

1. A computer-implemented method comprising:receiving, from a given user and by a microphone of a mobile device that includes (i) the microphone, (ii) an automated speech recognition system, and (iii) an end of utterance detector that is configured to identify an endpoint of an utterance spoken by a user in response to determining that a speaker has stopped speaking for a fixed duration, a first utterance;
determining, by the end of utterance detector, that the given user has stopped speaking for the fixed duration after the first utterance;
generating, by the automated speech recognition system, a first transcription of the first utterance;
based on the first transcription of the first utterance, maintaining the microphone in an active state without endpointing the first utterance;
after the given user has stopped speaking for at least the fixed duration after the first utterance, receiving, by the microphone and from the given user, a second utterance;
generating, by the automated speech recognition system, a second transcription of the second utterance;
based on both the first transcription and the second transcription, deactivating the microphone and endpointing the second utterance;
in response to endpointing the second utterance, submitting, by the mobile device, a single search query that includes both the first transcription and the second transcription;
receiving, by the mobile device, search results in response to the single search query that includes both the first transcription and the second transcription; and
providing, for output by the mobile device, the search results.

US Pat. No. 10,140,974

METHOD AND APPARATUS FOR SPEECH RECOGNITION

Samsung Electronics Co., ...

1. A speech recognition method, comprising:generating, by a processor, a word sequence based on a phoneme sequence generated from a speech signal;
generating, by the processor, a syllable sequence based on the phoneme sequence, in response to a word element among words included in the word sequence having a lower recognition rate than a threshold value; and
determining, by the processor, a text corresponding to a recognition result of the speech signal based on the word sequence and the syllable sequence,
wherein the syllable sequence corresponds to the word element,
wherein the generating of the syllable sequence comprises generating the syllable sequence by decoding a portion corresponding to the word element, among phonemes included in the phoneme sequence, and
wherein the word sequence is generated by decoding the phoneme sequence and corresponds to at least the text corresponding to the recognition result of the speech signal.

US Pat. No. 10,140,973

TEXT-TO-SPEECH PROCESSING USING PREVIOUSLY SPEECH PROCESSED DATA

Amazon Technologies, Inc....

18. A system, comprising:at least one processor; and
at least one memory including instructions that, when executed by the at least one processor, cause the system to:
receive input audio data corresponding to at least one utterance associated with user profile data;
perform automatic speech recognition processing on the input audio data to create first text data;
associate the first text data with the user profile data and at least a portion of the input audio data;
receive second text data representing at least a first word;
determine the second text data is associated with the user profile data;
determine the first word does not correspond to the first text data;
perform natural language understanding processing on the second text data;
determine a second word having a similar meaning as the first word;
determine the second word corresponds to the first text data;
send, to a first device, first data representing the second word;
receive, from the first device, an indication representing the second word is to be used;
generate output audio data using the second word; and
send the output audio data to a second device.

US Pat. No. 10,140,972

TEXT TO SPEECH PROCESSING SYSTEM AND METHOD, AND AN ACOUSTIC MODEL TRAINING SYSTEM AND METHOD

Kabushiki Kaisha Toshiba,...

3. A text to speech method, the method comprising:receiving input text;
dividing said inputted text into a sequence of acoustic units;
converting said sequence of acoustic units to a sequence of speech vectors using an acoustic model, wherein said acoustic model comprises a set of speaker parameters and a set of speaker clusters relating to speaker voice and a set of expression parameters and a set of expression clusters relating to expression, and wherein the sets of speaker and expression parameters and the sets of speaker and expression clusters do not overlap; and
outputting said sequence of speech vectors as audio,
the method further comprising determining at least some of said parameters relating to expression by:
extracting expressive features from said input text to form an expressive linguistic feature vector constructed in a first space; and
mapping said expressive linguistic feature vector to an expressive synthesis feature vector which is constructed in a second space,
wherein said text to speech method includes training said acoustic model using a method comprising:
receiving speech data, said speech data further comprising speech data from one or more speakers speaking with neutral speech,
said speech data comprising data corresponding to different values of a first speech factor, wherein the first speech factor is speaker and speech data corresponding to different values of a second speech factor, wherein the second speech factor is expression,
and wherein said speech data is unlabeled, such that for a given item of speech data, the value of said first speech factor is unknown;
clustering said speech data according to the value of said first speech factor into a first set of clusters and clustering said speech data according to the value of said second speech factor into a second set of clusters; and
estimating a first set and a second set of parameters to enable the acoustic model to accommodate speech for the different values of the first speech factor and the second speech factor respectively,
wherein said clustering and the parameter estimation are jointly performed according to a common maximum likelihood criterion which is common to both parameter estimation and said clustering.

US Pat. No. 10,140,971

ON-SITE SPEAKER DEVICE, ON-SITE SPEECH BROADCASTING SYSTEM AND METHOD THEREOF

SCHNEIDER ELECTRIC INDUST...

1. A method of on-site speech broadcasting, comprising:receiving a text signal, wherein the text signal is automatically generated by an on-site text-generating device in response to a parameter in an industrial environment sensed by an on-site sensor of the on-site text-generating device reaching a predetermined value;
converting the text signal to a speech signal by an on-site speech converting module disposed within an on-site speaker device separated from the on-site text-generating device; and
playing the converted speech signal by using a speaker of the on-site speaker device to broadcast an alarm in the industrial environment,
wherein the text signal is generated by automatically selecting the text signal from a plurality of text signals preset by an on-site user to correspond to the parameter reaching the predetermined value,
wherein the on-site text-generating device further includes a human machine interface for automatically selecting a text from a plurality of texts without input of the on-site user, and a transmitting interface for transmitting the text signal,
wherein the human machine interface comprises a processor for determining an event indicating a certain device in the industrial environment is abnormal based on the parameter sensed by the on-site sensor, and
wherein the text of the plurality of texts corresponds to the event.

US Pat. No. 10,140,970

ENGINE SOUND PRODUCTION SYSTEMS AND METHODS

GM GLOBAL TECHNOLOGY OPER...

1. An audio system of a vehicle, comprising:a detection module configured to detect an occurrence of a sound when a pressure measured by an exhaust pressure sensor in an exhaust system is greater than a predetermined pressure;
a sound control module configured to, in response to the detection of the sound, increase a magnitude of a predetermined sound to be output within a passenger cabin of the vehicle; and
an audio driver module configured to apply power to a speaker of the passenger cabin of the vehicle based on the predetermined sound.

US Pat. No. 10,140,969

MICROPHONE ARRAY DEVICE

FUJITSU LIMITED, Kawasak...

1. A microphone array device comprising:a memory, and
a processor coupled to the memory and configured to execute a process, the process comprising:
obtaining a first sound signal that is input from a first microphone;
obtaining a second sound signal that is input from a second microphone different from the first microphone;
generating first spectra obtained by converting the first sound signal into frequency components;
generating second spectra obtained by converting the second sound signal into the frequency components;
calculating phase spectrum differences between the first spectra and the second spectra for each of the frequency components based on the first spectra and the second spectra;
obtaining an evaluation parameter to evaluate an influence of a non-target sound on a target sound based on a spectrum, whose direction indicated by the phase spectrum difference for the each of the frequency components is included in a predetermined suppression range, among the first spectra;
controlling the predetermined suppression range based on the evaluation parameter; and
suppressing the non-target sound included in the first spectra based on the predetermined suppression range controlled based on the evaluation parameter.

US Pat. No. 10,140,968

ACOUSTIC ABSORPTION AND METHODS OF MANUFACTURE

Ashmere Holdings Pty Ltd,...

1. A method of providing a micro-perforated panel absorber comprising:providing a primary cellular core having a number of primary cells;
providing secondary cells in a number of recesses, the secondary cells being of reduced depth in comparison to the primary cells; the primary cells providing for absorption of relatively low frequencies; and the secondary cells of reduced depth providing for absorption of relatively high frequencies; and
crushing one or more portions of the primary cellular core to provide the number of recesses, wherein the crushing of the primary cellular core and providing the secondary cells is performed using a secondary reduced depth cellular core having a higher compression strength than the primary cellular core that is crushed.

US Pat. No. 10,140,967

MUSICAL INSTRUMENT WITH INTELLIGENT INTERFACE

Magic Instruments, Inc., ...

1. A device for playing music with a configurable playing interface, comprising:a housing,
a plurality of chord selectors displaced on the housing;
an actuator displaced on the housing;
an antenna and circuitry for communication with a remote device, the antenna in communication with the circuitry for communication with the remote device, the circuitry for communication with the remote device displaced within the housing;
logic connected to the plurality of chord selectors and the actuator that maps note data to the plurality of chord selectors, the note data mapped to the plurality of chord selectors based on a key and scale selection associated with the device,
the logic outputting note data in response to a first input received to a selected chord selector of the plurality of chord selectors and a second input to the actuator, the note data output to audio processing circuitry that creates audio based on the note data, the circuitry for communication with the remote device communicating at least one of the note data and the audio to the remote device; and
logic for automatically mapping note data to each chord selector based on the selected scale and the selected key.

US Pat. No. 10,140,966

LOCATION-AWARE MUSICAL INSTRUMENT

1. A method comprising:receiving, from each of a plurality of moveable nodes, the position of the moveable node within a coordinate space, wherein the moveable nodes comprise objects that can be physically moved by a person;
generating a graph of the moveable nodes based on the received positions;
generating an audio-visual composition based on a sweep of the graph over time; and
outputting the audio-visual composition.

US Pat. No. 10,140,965

AUTOMATED MUSICAL PERFORMANCE SYSTEM AND METHOD

YAMAHA CORPORATION, Shiz...

1. A performance system comprising:a performance controller configured to cause a performance device to carry out an automatic performance of a musical piece; and
a notification controller configured to cause a notification device to carry out an operation to visually notify a performer of an actual performance of the musical piece of the progress of the automatic performance,
the notification controller being configured to cause the notification device to carry out a normal operation to visually notify the performer of continuous change of a normal body movement of a virtual performer of the performance device for carrying out the automatic performance of the musical piece,
the notification controller being further configured to cause the notification device to carry out an instruction operation, before notifying the performer of the continuous change of the normal body movement, to visually notify the performer of a special body movement of the virtual performer, the special body movement being visually distinguished from the normal body movement.

US Pat. No. 10,140,964

GUITAR TREMOLO BRIDGE

1. A tremolo bridge for mounting to a guitar body, comprising:a block;
a base plate coupled to the block, wherein the base plate includes a pivot point for the base plate to move about an arc;
a body plate adapted to affix to the guitar body;
a locking mechanism coupled between the base plate and body plate; and
a tremolo arm coupled to the base plate for moving the base plate within the arc, wherein the tremolo arm is further coupled to the locking mechanism which is capable of locking and maintaining the base plate at all positions within the arc.

US Pat. No. 10,140,963

MUSICAL STRING

THOMASTIK-INFELD GESELLSC...

1. A musical string, comprising:at least one load-bearing string core, said string core having plastic threads, said plastic threads including a first group of first plastic threads and a second group of second plastic threads, wherein the first plastic threads differ from the second plastic threads with respect to a predeterminable physical material property,
wherein the physical material property is an E-modulus, wherein the first plastic threads have an E-modulus within a first E-modulus range, and wherein the second plastic threads have an E-modulus within a second E-modulus range.

US Pat. No. 10,140,962

DISPLAY UNIT, DISPLAY PANEL AND DRIVING METHOD THEREOF, AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A display unit, comprising: a full color display subunit capable of displaying full color, and at least one black and white display subunit capable of displaying black and white;wherein the full color display subunit and the at least one black and white display subunit are configured such that;
in a case where a display panel to which the display unit belongs is to display a frame of an image, including both a color graph and a black and white graph, and the display unit is not located at a boundary between the color graph and the black and white graph, the full color display subunit and all the black and white display subunit(s) in the display unit display one pixel together; and
in a case where a display panel to which the display unit belongs is to display a frame of an image, including both a color graph and a black and white graph, and the display unit is located at the boundary between the color graph and the black and white graph, the full color display subunit in the display unit displays one full-color pixel, and concurrently each black and white display subunit in the display unit forms one black and white pixel and performs display independently from the full-color pixel.

US Pat. No. 10,140,961

SYSTEMS AND METHODS FOR CONTROLLING A DISPLAY SCREEN OF A PORTABLE COMPUTING DEVICE

VONAGE BUSINESS INC., At...

1. A method of controlling the orientation of images on a display screen of a portable computing device that is configured to display images in different orientations on the display screen when the portable computing device is positioned in corresponding different orientations, comprising:determining a duration of a switching time period that elapses between a first point in time at which the portable computing device changes from a first orientation to a second orientation, and a second point in time at which the portable computing device changes from the second orientation back to the first orientation, wherein the portable computing device is determined to have changed from the first orientation to the second orientation when an angle between the vertical direction and a central longitudinal axis of the portable computing device exceeds a reference angle and wherein the portable computing device is determined to have changed from the second orientation back to the first orientation when an angle between the vertical direction and the central longitudinal axis of the portable computing device becomes less than the reference angle; and
setting the reference angle to a first value when the determined duration of the switching time period is greater than or equal to a threshold duration and setting the value of the reference angle to a second value that is different from the first value when the determined duration of the switching time period is less than the threshold duration, wherein a subsequent determination of when the portable computing device changes between the first and second orientations will be based on the set reference angle.

US Pat. No. 10,140,960

AUTOMATIC ADJUSTABLE DISPLAY SYSTEM AND ADJUSTING METHOD AND ADJUSTING DEVICE THEREOF

BOE TECHNOLOGY GROUP CO.,...

1. An automatic adjustable display system, comprising a display unit, an image acquiring unit, a control unit and an implementing unit, wherein:the image acquiring unit is configured to acquire a user image of a user in real time and to send the user image to the control unit;
the control unit comprises:
memory;
one or more processors; and
one or more modules stored in the memory and configured for execution by the one or more processors, the one or more modules comprising instructions that are executable to receive and analyze the user image to determine user state information, and to generate a first adjusting instruction for adjusting a distance between the display unit and the user and send the first adjusting instruction to the implementing unit when the user state information meets a first preset condition; and
the implementing unit is configured to receive the first adjusting instruction sent by the control unit and adjust the distance between the user and the display unit according to the first adjusting instruction,
wherein the user state information includes a ratio between a width of the user's head and a width of the user's shoulder in the user image,
wherein the one or more modules comprise instructions that are executable to analyze the user images to determine the ratio between the width of the user's head and the width of the user's shoulder, and to send a warning instruction for warning the user to maintain a proper seated gesture to the implementing unit, when the ratio between the width of the user's head and the width of the user's shoulder in each of the plurality of successive user images falls outside a third predetermined range.

US Pat. No. 10,140,959

MOBILE TERMINAL AND METHOD OF CONTROLLING THE SAME

LG ELECTRONICS INC., Seo...

1. A mobile terminal comprising:a display; and
a controller configured to:
cause the display to display a home screen page comprising a plurality of graphic objects;
set a specific region of the home screen page based on a first touch input received on the home screen page, the first touch input received while the plurality of graphic objects are displayed on the home screen page;
cause the display to display a guide image indicating the specific region when the specific region is set, the guide image displayed on the home screen page comprising the plurality of graphic objects;
detect a graphic object displayed in the specific region or overlapping the specific region when the specific region is set, wherein a visual effect is applied to the detected graphic object such that the detected graphic object is visually distinguished from other graphic objects of the plurality of graphic objects;
cause the display to display a plurality of images indicating expected output regions where the detected graphic object is to be displayed while the graphic object and the guide image are displayed on the home screen page, wherein the plurality of images are displayed outside of the specific region;
cause the display to display the detected graphic object at a first region of the home screen page corresponding to a first image of the plurality of images in response to a second touch input received at the first image, the second touch input received while the graphic object and the plurality of images are displayed on the home screen page; and
cause the display to stop displaying the plurality of images when the graphic object is displayed at the first region of the home screen page,
wherein the first image is replaced by the graphic object when the graphic object is displayed at the first region of the home screen page such that the graphic object is no longer displayed in the specific region or overlapping the specific region.

US Pat. No. 10,140,957

CONTROLLING CONTENT OUTPUT FEATURES TO OPTIMIZE CONTENT CONSUMPTION

Amazon Technologies, Inc....

1. A computing device comprising:a display device;
one or more processors;
memory; and
one or more computer-executable instructions stored in the memory and executable by the one or more processors to perform operations comprising:
receiving input to initiate a procedure to determine values of content output features to increase a reading speed of an individual;
displaying first text content on the display device according to a first set of content output features, the first set of content output features including at least a first font size;
determining a first amount of time elapsed for the individual to read the first text content;
determining a first reading speed for the individual based at least partly on a first number of words included in the first text content and the first amount of time;
displaying second text content on the display device according to a second set of content output features, the second set of content output features including at least a second font size that is different from the first font size;
determining a second amount of time elapsed for the individual to read the second text content;
determining a second reading speed for the individual based at least partly on a second number of words included in the second text content and the second amount of time;
determining that the second reading speed is faster than the first reading speed; and
displaying additional text content on the display device according to the second set of content output features.

US Pat. No. 10,140,956

DISPLAY CONTROL APPARATUS

DENSO CORPORATION, Kariy...

1. A display control apparatus performing a predetermined comparison operation on display images to automatically assign the display images to a plurality of areas configured as display regions on a screen of a display mounted to a vehicle, the display control apparatus comprising:a processor, the processor is configured to
store, by an area relationship information storage, area relationship information for each of the areas, wherein the area relationship information for each area has information on another area that is closely related to the each area;
store, by a display image relationship information storage, image relationship information for each of the display images, wherein the image relationship information for each display image has information on another display image that is closely related to the each display image;
determine, by an image determination portion, that, of two display images related to each other, one of the two display images belongs to a first image group and the other belongs to a second image group different from the first image group; and
assign, by a display image assignment portion, the display image determined as belonging to the first image group to an area by performing the predetermined comparison operation,
and then superimpose, by the display image assignment portion, the display image determined as belonging to the second image group on the display image determined as belonging to the first image group by assigning the display image determined as belonging to the second image group to an area that is superimposed on the area to which the display image determined as belonging to the first image group is assigned, based on the area to which the display image determined as belonging to the first image group is assigned, and based on the information stored in the area relationship information storage, wherein:
the image relationship information is link information that links the closely-related display images and that is defined independently of the areas;
the area relationship information is link information that links the closely-related areas and that is defined independently of the display images;
the areas linked by the area relationship information for a first area is the first area and a second area superimposed on the first area;
the areas not linked by the area relationship information for the first area include the first area and a third area separated from the first area; and
the image relationship information further stores ruling-set numbers for determining that, of two display images closely related to each other in the image relationship information, a first display image belongs to the first image group and the second display image belongs to the second image group different from the first image group; and
when the image determination portion determines based on the image relationship information and the ruling-set numbers that the first and second display images are closely related to each other and belong to the first and second image groups respectively, the display image assignment portion is further configured to
assign the first display image to the first area by performing the predetermined comparison operation,
and then superimpose the second display image on the first display image by assigning the second display image not to the third area separated from the first area but to the second area superimposed on the first area based on the area relationship information and based on the first area to which the first display image is assigned.

US Pat. No. 10,140,955

DISPLAY LATENCY CALIBRATION FOR ORGANIC LIGHT EMITTING DIODE (OLED) DISPLAY

Facebook Technologies, LL...

1. A system comprising:an organic light emitting diode (OLED) display having a plurality of illumination elements organized in a two-dimensional array;
one or more photodiodes coupled to at least a portion of the illumination elements, the one or more photodiodes configured to
measure, for each illumination element in at least the portion of the illumination elements, a latency for that illumination element to illuminate image light of each of a plurality of brightness levels, and
measure, for each illumination element in at least the portion of the illumination elements, a time rise to reach each of the plurality of brightness levels;
a controller coupled to the one or more photodiodes, the controller configured to:
obtain, for each illumination element in at least the portion of the illumination elements, information about brightness levels associated with image light emitted from that illumination element for at least two consecutive video frames, and
determine, for each illumination element in at least the portion of the illumination elements, a driving signal based on the measured latency, the measured time rise and the information about brightness levels; and
a driver circuit coupled to the controller, the driver circuit configured to apply the determined driving signal to that illumination element.

US Pat. No. 10,140,954

METHOD FOR DETERMINING RESIDUAL IMAGE LEVEL OF DISPLAY DEVICE AND DETECTION DEVICE

BOE Technology Group Co.,...

1. A residual image level determining method of a display device, comprising:lighting the display device based on a setting image type, and setting a plurality of detection positions on the display device based on the setting image type;
converting a display image on the display device into a grayscale image with a grayscale of a setting level;
detecting an actual brightness value of each detection position within a setting time after converting the display image into the grayscale image with the grayscale of the setting level;
for each detection position, acquiring a brightness variation index of the detection position based on the detected actual brightness value and a corresponding predetermined relationship between the actual brightness value and a theoretical brightness value of the grayscale of the setting level; and
acquiring a residual image level of the display device in the grayscale of the setting level based on the acquired brightness variation index and a corresponding predetermined relationship between brightness variation indexes and residual image levels,
wherein the theoretical brightness value in the grayscale of the setting level is acquired by:
lighting the display device based on grayscales of a plurality of levels, acquiring brightness values corresponding to a grayscale of each level, obtaining a Gamma curve between grayscale levels and corresponding brightness values by calculation based on the acquired grayscale of each level and a corresponding brightness value, and acquiring the theoretical brightness value corresponding to the grayscale of the setting level based on the obtained Gamma curve.

US Pat. No. 10,140,953

AMBIENT-LIGHT-CORRECTED DISPLAY MANAGEMENT FOR HIGH DYNAMIC RANGE IMAGES

Dolby Laboratories Licens...

1. A method for adaptive display management with a computer, the method comprising:receiving one or more viewing environment parameters;
receiving an effective luminance range for a target display;
receiving an input image comprising pixel values;
generating a tone-mapped image by mapping with the computer intensity pixel values of the input image pixel values to intensity pixel values in the tone-mapped image, wherein generating the tone-mapped image is based on an original perceptually quantized (PQ) luminance mapping function and the effective luminance range of the display;
generating a corrected PQ (PQ?) luminance mapping function based on the one or more viewing environment parameters;
generating a PQ-to-PQ? mapping wherein a first codeword in the original PQ luminance mapping function is mapped to a second codeword in the corrected (PQ?) luminance mapping function according to the effective luminance range of the target display;
generating an adjusted tone-mapped image by mapping intensity values in the tone-mapped image to intensity values in the adjusted tone-mapped image, wherein generating the adjusted tone-mapped image is based on the PQ-to-PQ? mapping.

US Pat. No. 10,140,952

CONTROL OF SPECTRAL RANGE INTENSITY IN MEDIA DEVICES

AMAZON TECHNOLOGIES, INC....

1. A device, comprising:a display; and
at least one controller to:
cause presentation of content on the display in a first output mode using a first pattern profile for light intensity across a spectral range;
send one or more of usage data, derived from detected interaction by a user with the content presented on the display, or account data, to at least one remote device;
receive, from the at least one remote device, a second pattern profile for light intensity across the spectral range of a second output mode, and a spectral transition sequence describing a transition of light intensity of a first portion of the spectral range of the first pattern profile in the first output mode to a second pattern profile of light intensity of the first portion of the spectral range in the second output mode; and
responsive to receiving the second pattern profile for light intensity and the spectral transition sequence, cause the display to transition from the first pattern profile to the second pattern profile according to the spectral transition sequence, wherein:
the first pattern profile of the first output mode is associated with a first amount of light emitted across the first portion of the spectral range and a second amount of light emitted across a second portion of the spectral range, and
the second pattern profile of the second output mode is associated with a third amount of light emitted across the first portion of the spectral range and the second amount of light emitted across the second portion of the spectral range, the third amount differing from the first amount.

US Pat. No. 10,140,951

USER INTERFACE DISPLAY COMPOSITION WITH DEVICE SENSOR/STATE BASED GRAPHICAL EFFECTS

Futurewei Technologies, I...

1. A method comprising:receiving sensor data from a light sensor;
obtaining image data from a graphical effects shader based on the sensor data;
blending the image data with a plurality of application surfaces to create a blended image;
blending the blended image with a color image to create a color-tinted blended image in response to a change in ambient light sensed by the light sensor; and
transmitting the color-tinted blended image to a display.

US Pat. No. 10,140,950

DISPLAY DEVICE DRIVING METHOD AND VIDEO DISPLAY APPARATUS

JOLED INC., Tokyo (JP)

1. A display device driving method for driving a display device, the display device driving method comprising:receiving a training signal, for inquiring whether the display device is ready to accept a video signal representing a moving image, that is transmitted from an external signal source;
after receiving the training signal, transmitting a lock signal, indicating that the display device is ready to accept the video signal, to the external signal source at a timing based on an internal synchronization signal of the display device;
after transmitting the lock signal, receiving the video signal that is transmitted from the external signal source and is synchronous with an external synchronization signal; and
displaying a video by using the video signal received from the external signal source,
wherein in the receiving of the video signal, the external synchronization signal is further received, and
the timing is a timing at which the external synchronization signal is received within an effective window period of the internal synchronization signal in the receiving of the video signal, the effective window period being a period in which a received signal is enabled.

US Pat. No. 10,140,949

DISPLAY APPARATUS

SAMSUNG DISPLAY CO., LTD....

1. A display apparatus comprising:a printed circuit board including:
a base circuit board;
a transmission control unit which outputs input image data,
a wireless data generating unit which converts the input image data to a data transmission signal,
a wireless transmission pad unit which wirelessly transmits the data transmission signal as wireless data and is disposed on a bottom surface of the base circuit board; and
a circuit device disposed on a top surface of the based circuit board;
and
a display panel including:
a panel substrate;
a wireless reception pad unit which is coupled to the wireless transmission pad unit, and wirelessly receives the wireless data to output a data reception signal,
a wireless data restoring unit which converts the data reception signal to restored image data; and,
a data driver disposed on a top surface of the panel substrate and converts the restored image data to a data voltage,
wherein the data driver is inserted into an opening defined at the printed circuit board.

US Pat. No. 10,140,948

METHOD FOR ADJUSTING DRIVING VOLTAGE, RELATED ADJUSTING DEVICE AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A method for adjusting a gate driving voltage for a gate driving circuit, output terminals of the gate driving circuit being connected with gate lines, input terminals of the gate driving circuit being connected with a propel link gate (PLG) wiring, comprising:determining an equivalent resistance between an electrical connection point and an input terminal of the PLG wiring along the PLG wiring, wherein:
the electrical connection point connects an input terminal of the gate driving circuit with the input terminal of the PLG wiring, and
the equivalent resistance of the electrical connection point corresponds to a distance from the electrical connection point to the input terminal of the PLG wiring;
obtaining a voltage-drop value at the electrical connection point based on the equivalent resistance; and
compensating the gate driving voltage on the input terminal of the gate driving circuit based on the voltage-drop value.

US Pat. No. 10,140,947

FLEXIBLE DISPLAY SCREEN, DISPLAY DEVICE, AND DISPLAY METHOD APPLIED TO FLEXIBLE DISPLAY SCREEN

BOE Technology Group Co.,...

1. A flexible display screen (100) having an extending mode and a retracting mode, wherein in the extending mode, the entire flexible display screen is used for displaying, and in the retracting mode, at least a portion (105) of the flexible display screen is curled and an uncurled portion of the flexible display screen is used for displaying, wherein the flexible display screen adopts a GOA driving circuit to perform a partitioned display driving,wherein the flexible display screen (100) comprises a main display portion (110) and an addition display portion (115), the additional display portion having a free end capable of being curled, and wherein the additional display portion includes a first additional display portion (115a) and a second additional display portion (115b), the second additional display portion being curled and retracted in the retracting mode, and
wherein in the extending mode, a first switching transistor is controlled to be turned on and a second switching transistor is controlled to be turned off, a display driving control signal is inputted to the entire flexible display screen, and in the retracting mode, the first switching transistor is turned off and the second switching transistor is turned on, inputting of the display driving control signal to the second additional display portion of the flexible display screen is stopped.

US Pat. No. 10,140,946

DISPLAY ASSEMBLY WITH MULTIPLE FLAT LENSES WITH OPTICAL ADHESIVES TO GENERATE A NON-LINEAR SURFACE

Visteon Global Technologi...

1. A display assembly, comprising:a first lens connected to a first display driver, the first lens having a first edge and a second edge;
a second lens connected to a second display driver, the second lens having a first edge and a second edge, the second lens forming an angle with the first lens by directly abutting the second edge of the first lens and the first edge of the second lens; and
an adhesive layer applied to the first lens and the second lens,
the adhesive layer forming a non-linear surface,
the non-linear surface beginning at the first edge of the first lens and ending at the second edge of the second lens, and
the non-linear surface being only disposed on a visible portion of the first and second lenses,
wherein the adhesive layer forms a partial cylindrical-shaped object, and
wherein a circular surface of the partial cylindrical-shaped object is formed by an outwardly curved surface forming from the first edge of the first lens to the second edge of the second lens.

US Pat. No. 10,140,945

LUMINANCE SUPPRESSION POWER CONSERVATION

Samsung Electronics Co., ...

1. A method for reducing power consumed by an electronics device that includes a display device, the method comprising:increasing a size of a graphics item to create a larger graphics item;
in response to increasing the size of the graphics item, altering, if a portion of the graphics item includes a color that increases a brightness, video information for at least a portion of the larger graphics item to produce an altered larger graphics item with a reduced luminance; and
displaying the larger graphics item based on the altered video information without altering video information of other graphics items displayed on the display device,
wherein the display device consumes less power when displaying the larger graphics item based on the altered video information than would be consumed for the larger graphics item without the video information alteration.

US Pat. No. 10,140,944

DISPLAY DEVICE COMPENSATING CLOCK SIGNAL WITH TEMPERATURE

SAMSUNG DISPLAY CO., LTD....

1. A display device comprising:a display panel comprising a gate line and a date line;
a gate driver comprising a plurality of stages, at least one of the stages receiving a clock signal and providing a gate signal to the gate line, the clock signal comprising a first clock signal having a first pulse amplitude;
a data driver configured to provide a data signal to the data line; and
a pulse compensator configured to output a second clock signal having a second pulse amplitude higher than the first pulse amplitude to the stage when a peripheral temperature is lower than a reference temperature,
wherein the pulse compensator outputs a third clock signal having a third pulse amplitude lower than the first pulse amplitude when the peripheral temperature is higher than the reference temperature,
wherein the pulse compensator comprises:
a first voltage generator configured to output a gate-on voltage having an increased voltage level when the peripheral temperature is lower than the reference temperature;
a second voltage generator configured to output a gate-off voltage having a reduced voltage level when the peripheral temperature is lower than the reference temperature; and
a switching circuit switching between the gate-on voltage and the gate-off voltage to output the second clock signal or the third clock signal to the stage.

US Pat. No. 10,140,942

SEMICONDUCTOR DEVICE

Semiconductor Energy Labo...

1. A display device comprising:a first gate driver circuit;
a second gate driver circuit; and
a pixel portion between the first gate driver circuit and the second gate driver circuit,
wherein the first gate driver circuit comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor and a sixth transistor,
wherein the second gate driver circuit comprises a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor, an eleventh transistor and a twelfth transistor,
wherein one of a source and a drain of the first transistor is electrically connected to one end of a gate signal line,
wherein one of a source and a drain of the second transistor is electrically connected to the one end of the gate signal line,
wherein one of a source and a drain of the third transistor is electrically connected to a gate of the first transistor,
wherein one of a source and a drain of the fourth transistor is electrically connected to a gate of the second transistor,
wherein the other of the source and the drain of the fourth transistor is electrically connected to a gate of the fourth transistor,
wherein one of a source and a drain of the fifth transistor is electrically connected to the gate of the second transistor,
wherein a gate of the fifth transistor is electrically connected to the gate of the first transistor,
wherein one of a source and a drain of the sixth transistor is electrically connected to the gate of the first transistor,
wherein the other of the source and the drain of the second transistor is electrically connected to the other of the source and the drain of the fifth transistor,
wherein one of a source and a drain of the seventh transistor is electrically connected to the other end of the gate signal line,
wherein one of a source and a drain of the eighth transistor is electrically connected to the other end of the gate signal line,
wherein one of a source and a drain of the ninth transistor is electrically connected to a gate of the seventh transistor,
wherein one of a source and a drain of the tenth transistor is electrically connected to the gate of the eighth transistor,
wherein the other of the source and the drain of the tenth transistor is electrically connected to a gate of the tenth transistor,
wherein one of a source and a drain of the eleventh transistor is electrically connected to the gate of the eighth transistor,
wherein a gate of the eleventh transistor is electrically connected to the gate of the seventh transistor,
wherein one of a source and a drain of the twelfth transistor is electrically connected to the gate of the seventh transistor,
wherein the other of the source and the drain of the eighth transistor is electrically connected to the other of the source and the drain of the eleventh transistor,
wherein a clock signal is input to the other of the source and the drain of the first transistor,
wherein a start signal is input to a gate of the third transistor,
wherein a first potential is input to the other of the source and the drain of the fourth transistor during a frame period,
wherein a second potential is input to the other of the source and the drain of the fourth transistor during another frame period, and
wherein the second potential is higher than the first potential.

US Pat. No. 10,140,941

METHOD AND APPARATUS FOR ADJUSTING A SCREEN REFRESH FREQUENCY AND DISPLAY

BOE TECHNOLOGY GROUP CO.,...

1. A method for adjusting screen refresh frequency, comprising:acquiring and storing a current frame of picture signal;
calculating a similarity value between the current frame of picture signal and a previous frame of picture signal; and
acquiring a screen refresh frequency for the current frame of picture signal based on the similarity value according to a preset relationship between similarity values and screen refresh frequencies, so as to realize adjustment of the screen refresh frequency;
wherein the preset relationship between similarity values and screen refresh frequencies is acquired by a following equation
f=?a*S+b,
wherein f is the screen refresh frequency, S is the similarity value, a is a maximum screen refresh frequency minus a minimum screen refresh frequency, and b is the maximum screen refresh frequency.

US Pat. No. 10,140,940

DISPLAY DEVICE

Japan Display Inc., Mina...

1. A display device having a display area wherein pixels are arranged in a matrix pattern, each of the pixels comprising:a display element;
a capacitive element series circuit connected in parallel with the display element, and comprising at least a first capacitive element and a second capacitive element; and
a boost circuit making an electric potential of the capacitive element series circuit increase to obtain a boosted electric potential, and applying the boosted electric potential to the display element,
the boost circuit having a plurality of switches, each controlled in respect of opening and closing by a gate signal during one pulse period of an input source signal, at least one of the switches opening in a first half of the pulse period and closing in a second half of the pulse period, whereas the rest of the switches closing in the first half of the pulse period and opening in the second half of the pulse period.

US Pat. No. 10,140,939

DATA CONVERSION METHOD AND DISPLAY DEVICE USING THE SAME

Sitronix Technology Corp....

1. A data conversion method for converting display data of a display device, the data conversion method comprising:detecting an ambient temperature of the display device;
receiving a specific display data to be displayed by the display device, a previous display data in N row before the specific display data, and a next display data in N row after the specific display data;
converting the specific display data into a display output data according to the previous display data, the next display data and the ambient temperature; and
outputting the display output data to perform displaying;
wherein the step of converting the specific display data into the display output data according to the previous display data, the next display data and the ambient temperature comprises:
obtaining a lookup table corresponding to the ambient temperature; and
obtaining the display output data from the lookup table according to a first data change amount between the previous display data and the specific display data and a second data change amount between the specific display data and the next display data;
wherein the display output data is same as the specific display data or the display output data is nearer to the next display data in comparison with the specific display data when the first data change amount is smaller than a data change threshold corresponding to the ambient temperature and the second data change amount is greater than the data change threshold.

US Pat. No. 10,140,938

GIP TYPE LIQUID CRYSTAL DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A Gate-In-Panel (GIP) type of liquid crystal display device, comprising a display unit, a clock generator and a gate driving unit, wherein the gate driving unit is connected with the display unit and the clock generator respectively;the display unit comprises a plurality of pixel units for image display and a plurality of rows of gate lines, every two rows of the gate lines constitute a gate line group and have a row of pixel units disposed therebetween, an odd numbered row of the gate line is connected with pixel units in an adjacent row and odd numbered columns, and an even numbered row of the gate line is connected with pixel units in an adjacent row and even columns;
the gate driving unit comprises a first driver and a second driver, the first driver is used to provide driving signals to odd numbered rows of the gate lines and the second driver is used to provide driving signals to even numbered rows of the gate lines;
the clock generator is used to provide K scan clock signals to the first driver and K scan clock signals to the second driver respectively according to a scan sequence to make the first/second driver provide driving signals to odd/even numbered rows of the gate lines;
scan sequences of odd numbered frames and even numbered frames are different, the scan sequence comprises a first scan sequence and a second scan sequence corresponding to the odd/even numbered frames or the even/odd numbered frames; in the first scan sequence, the phase of the scan clock signals to scan the (2N)th row of the gate line lags behind that of the scan clock signals to scan the (2N?1)th row of the gate line by ½K of a cycle; in the second scan sequence, the phase of the scan clock signals to scan the (2N?1)th row of the gate line lags behind that of the scan clock signals to scan the (2N)th row of the gate line by ½K of a cycle, where N is a natural number, K=2m, and m is a natural number.

US Pat. No. 10,140,937

DISPLAY PANEL, LIQUID CRYSTAL DISPLAY AND DRIVING METHOD THEREFOR

BOE TECHNOLOGY GROUP CO.,...

1. A display panel, comprising a plurality of pixels arranged in a matrix, data lines electrically connected with columns of pixels respectively, and gate lines electrically connected with rows of pixels respectively, wherein:each row of pixels comprises a plurality of primary color pixels and a plurality of white pixels arranged alternately, and each column of pixels comprises a plurality of primary color pixels and a plurality of white pixels arranged alternately;
a color of each primary color pixel is one of a first color, a second color and a third color which are different from a white color;
in each row of pixels, all the primary color pixels are electrically connected with one same gate line, all the white pixels are electrically connected with one same gate line, and the primary color pixels and the white pixels are electrically connected with different gate lines; and
the primary color pixels and the white pixels are arranged such that:
colors of the primary color pixels in each odd-numbered row of pixels are the third color, colors of the primary color pixels in each even-numbered row of pixels are arranged with the first color and the second color alternating with each other, and in any two adjacent even-numbered rows of pixels, colors of two primary color pixels located in one same column are different from each other; or
colors of the primary color pixels in each even-numbered row of pixels are the third color, colors of the primary color pixels in each odd-numbered row of pixels are arranged with the first color and the second color alternating with each other, and in any two adjacent odd-numbered rows of pixels, colors of two primary color pixels located in one same column are different from each other.

US Pat. No. 10,140,936

DRIVING METHOD FOR IMAGE DISPLAY APPARATUS

JAPAN DISPLAY INC., Toky...

1. A driving method for an image display apparatus which includes(A) an image display panel including a plurality of pixels arrayed in a two-dimensional matrix and each comprised of a first subpixel for displaying a first primary color, a second subpixel for displaying a second primary color, a third subpixel for displaying a third primary color and a fourth subpixel for displaying a fourth color; and
(B) a signal processing section, the signal processing section being capable of, for each pixel, (a) calculating a first subpixel output signal based at least on a first subpixel input signal and an expansion coefficient (?0) and outputting the calculated first subpixel output signal to the first subpixel, (b) calculating a second subpixel output signal based at least on a second subpixel input signal and the expansion coefficient (?0) and outputting the calculated second subpixel output signal to the second subpixel, (c) calculating a third subpixel output signal based at least on a third subpixel input signal and the expansion coefficient (?0) and outputting the calculated third subpixel output signal to the third subpixel, and (d) calculating a fourth subpixel output signal based on the first subpixel input signal, second subpixel input signal and third subpixel input signal and outputting the calculated fourth subpixel output signal to the fourth subpixel,
the driving method comprising:
a step, carried out by the signal processing section, of setting the expansion coefficient (?0) to a value equal to or lower than a predetermined value when a ratio to all pixels of those pixels with regard to which a hue (H) and a saturation (S) in an HSV (Hue, Saturation and Value) color space where a color defined by (R, G, B) is displayed by each pixel respectively satisfy
40?H?65 and
0.5?S?1.0exceeds a predetermined value (??0),(a) the hue (H) being given, when R exhibits a maximum value, by
H=60(G?B)/(Max?Min),
when G exhibits a maximum value, by
H=60(B?R)/(Max?Min)+120,
and, when B exhibits a maximum value by
H=60(R?G)/(Max?Min)+240, and
(b) the saturation (S) being given by
S=(Max?Min)/Max,
where Max is a maximum value among the three subpixel input signal values of the first subpixel input signal value, second subpixel input signal value and third subpixel input signal value to an individual pixel, and Min is a minimum value among the three subpixel input signal values of the first subpixel input signal value, second subpixel input signal value and third subpixel input signal value to the individual pixel.

US Pat. No. 10,140,935

DISPLAY APPARATUS DRIVEN IN AN INVERSION DRIVING MANNER AND METHOD OF PROCESSING DATA THEREOF

Samsung Display Co., Ltd....

1. A display apparatus comprising:a liquid crystal panel comprising a plurality of gate lines extending in a first direction, a plurality of data lines extending in a second direction crossing the first direction, and a plurality of pixels connected to the gate lines and the data lines;
a gate driver applying gate signals to the gate lines;
a data driver applying data voltages to the data lines; and
a timing controller receiving a control signal and image data to apply a gate control signal to the gate driver and to apply a data control signal to the data driver,
wherein the pixels comprise pixels arranged in a h-th (h is a natural number) row and pixels arranged in a (h+1)th row, which are adjacent to each other in the second direction such that a (k+1)th (k is a natural number) of the gate lines is disposed between the pixels arranged in the h-th row and the pixels arranged in the (h+1)th row, first pixels displaying a first color and-connected to the (k+1)th gate line among the pixels arranged in the h-th row, and second pixels displaying the first color and-connected to the (k+1)th gate line among the pixels arranged in the (h+1)th row, are spaced apart from each other in the first direction and receive data voltages having different polarities, the image data comprise first pixel data displayed in at least a portion of the first pixels and second pixel data displayed in at least a portion of the second pixels, and when a boundary of a pattern extending in the first direction is disposed between the first and second pixels and the first pixel data have a first grayscale value and the second pixel data have a second grayscale value different from the first grayscale value, the timing controller modulates the first pixel data to be provided to the first pixels to have a grayscale value between the first and second grayscale values and modulates the second pixel data to be provided to the second pixels to have a grayscale value between the first and second grayscale values.

US Pat. No. 10,140,934

PIXEL UNIT, DISPLAY DEVICE AND DRIVING METHOD THEREOF

BOE TECHNOLOGY GROUP CO.,...

1. A pixel unit, comprising at least four sub-pixels,wherein three sub-pixels are polygonal, while the other at least one sub-pixel is disposed in a gap surrounded by the three polygonal sub-pixels;
wherein each of the three polygonal sub-pixels comprises a pixel electrode, and the pixel electrodes of the three polygonal sub-pixels jointly drive the sub-pixel located in the gap such that a change of a voltage of any one of the pixel electrodes of any one of the three polygonal sub-pixels will result in a change of the deflection degree of liquid crystal molecules in a region corresponding to the any one of the pixel electrodes, and further a change of a luminance value of the any one of the polygonal sub-pixels, and at the same time, a change of a luminance value of the other at least one sub-pixel disposed in the gap, whereby the luminance value of the other at least one sub-pixel disposed in the gap changes together with luminance values of the surrounding three polygonal sub-pixels.

US Pat. No. 10,140,933

DISPLAY APPARATUS AND METHOD FOR DRIVING DISPLAY APPARATUS

Japan Display Inc., Toky...

1. A display apparatus comprising:a plurality of light sources aligned in at least one direction;
a display device that has a display area provided with a plurality of pixels, the display device being irradiated with light from the light sources to output an image; and
a controller that controls an operation of the light sources in accordance with a display output content of the display device,
wherein the display area includes a plurality of partial areas, the partial areas corresponding to the light sources on a one-to-one basis,
wherein each of the partial areas includes a first area and a second area, the first area being irradiated with light from a first light source that corresponds thereto, and the second area being irradiated with light from the first light source that corresponds to the first area and a second light source adjacent to the first light source,
wherein the controller controls an operation of the first light source based on whether the first area requires the light from the first light source and whether the second area obtains light required for display output by receiving the light from the second light source,
wherein the controller controls an operation of the second light source based on a result of comparison between luminance of light required for the second area and a predetermined threshold, and
wherein, when Expression (1)
L2_lq?T1  (1)
is satisfied, the controller turns on the second light source such that the second light source provides luminance calculated by Expression (2)
BL1=L1_cq×(L2_lq/T1)  (2)
where L2_lq is the luminance of light required for the second area, L1_cq is luminance of light required for the first area corresponding to the second light source, T1 is a first threshold obtained by multiplying L1_cq by a first coefficient of 0 to 1, and BL1 is luminance of the first area obtained by turning on the second light source.

US Pat. No. 10,140,932

SIMULTANEOUS WIDE LIGHTING DISTRIBUTION AND DISPLAY

ABL IP Holding LLC, Cony...

1. A luminaire comprising:a general illumination device for illumination of a space, including:
an array of illumination light source emitters controllable to emit illumination lighting for the space;
an image display device configured to display an image, including:
a pixel matrix including an array of pixel light emitters, each pixel light emitter being controllable to emit light for a respective pixel of the displayed image;
gaps between pixel light emitters of the pixel matrix;
a light waveguide grid including an array of waveguides coupling a respective illumination light source emitter of the general illumination device with at least one respective gap between pixel light emitters of the image display device, each waveguide having a housing including:
an input interface optically coupled to the respective illumination light source emitter to steer illumination lighting from the illumination light source emitter;
an output interface opposing the input interface and optically coupled to the at least one respective gap; and
at least one reflective wall having an internal reflective surface encompassing and extending from the input interface and the output interface;
wherein each waveguide housing is hollow and each waveguide housing further comprises:
a curved optical element positioned over the illumination light source emitter and optically coupled to the input interface of the waveguide and the illumination light source emitter to steer the illumination lighting from the illumination light source emitter through the waveguide; and
the curved optical element includes a transparent convex dome surface of the input interface that is integral with the waveguide housing, curves inwards towards the output interface, and is positioned adjacent to the illumination light source emitter.

US Pat. No. 10,140,931

SHADOW MASK ASSEMBLIES AND REUSING METHODS OF SHADOW MASK ASSEMBLIES THEREOF

Shenzhen China Star Optoe...

1. A backlight control circuit for adjusting the current of an LED module of an electronic device, the LED module comprises a positive terminal, a ground terminal, and at least one LED lamp and a detection resistor connected between the positive terminal and the ground terminal, wherein, the backlight control circuit comprises:a driving chip comprising a feedback terminal, a reference voltage terminal and an output terminal, the reference voltage terminal is connected with a reference voltage;
a feedback voltage regulating unit connected between the feedback terminal of the driving chip and a remote terminal of the detection resistor for adjusting the detection voltage of the remote terminal of the detection resistor to the feedback terminal voltage of the feedback terminal; and
a power supply regulating unit connected between the power supply circuit of the electronic device and the positive terminal of the LED module and connected with the output terminal of the driving chip for adjusting the power supply circuit to output to a supply voltage of the LED module in response to the control of the driving chip;
wherein the feedback voltage adjustment unit is also connected to a 2D/3D signal terminal for receiving a two-dimensional signal or a three-dimensional signal generated by the 2D/3D signal terminal, wherein the 2D/3D signal terminal generates a two-dimensional signal when the electronic device is in the two-dimensional mode and generates a three-dimensional signal when the electronic device is in the three-dimensional mode; when the three-dimensional signal is received, the feedback voltage regulating unit controls the lowering of the feedback voltage of the detection voltage to the feedback terminal so that the feedback terminal voltage is smaller than the reference voltage, the driving chip controls the power supply adjusting unit to increase the supply voltage to the LED module when the feedback terminal voltage is less than the reference voltage to increase the current flowing through the LED lamp of the LED module.

US Pat. No. 10,140,930

SIGNAL GENERATING UNIT, SHIFT REGISTER, DISPLAY DEVICE AND SIGNAL GENERATING METHOD

BOE Technology Group Co.,...

1. A signal generating unit, comprising:a first output transistor disposed between an output node and a first power node, the first power node configured for receiving a high-level power supply signal, a gate electrode of the first output transistor coupled to a first node;
a second output transistor disposed between the output node and a second power node, the second power node configured for receiving a low-level power supply signal, a gate electrode of the second output transistor coupled to a second node;
a first-node potential control module, coupled to the first node and configured to output a start signal to the first node;
a second-node potential control module coupled to the second node, the second-node potential control module including a switching-off control unit configured to switch off the second output transistor when the first output transistor is switched on; and
a first capacitor structure connected with the gate electrode of the first output transistor, and configured to be charged when the first-node potential control module outputs a single-pulse-width level signal for controlling the first output transistor to be switched on, and to maintain the gate electrode of the first output transistor in an on state during a subsequent time period having one pulse width, wherein:
the switching-off control unit includes a second potential control transistor, a gate electrode of the second potential control transistor is coupled to the first node, a first electrode of the second potential control transistor is directly connected with the first power node to receive the high-level power supply signal, and a second electrode of the second potential control transistor is coupled to the second node to be connected with the gate electrode of the second output transistor.

US Pat. No. 10,140,929

CURRENT SENSOR AND ORGANIC LIGHT EMITTING DISPLAY DEVICE INCLUDING THE SAME

Samsung Display Co., Ltd....

1. An organic light emitting display device comprising:a display panel comprising:
pixels;
power supply lines configured to transfer power to the pixels;
data lines configured to transfer data voltages to the pixels; and
scan lines configured to transfer scan signals to the pixels;
a display panel driver configured to drive the display panel by generating and providing the data voltages to the data lines, and by generating and providing the scan signals to the scan lines;
a power supply configured to generate and supply the power to the power supply lines; and
a current sensor configured to measure a current level of the power, the current sensor comprising:
a first resistor between a first node and a second node;
a first voltage limiting device between the first node and the second node;
a second resistor between the second node and a third node; and
a selector configured to output one of either a first value corresponding to a voltage across the first resistor or a second value corresponding to a voltage across the second resistor,
wherein a resistance level of the first resistor is greater than a resistance level of the second resistor, and
wherein a current flowing from the third node to the first node is configured to be measured based on the voltage across the first resistor or the voltage across the second resistor.

US Pat. No. 10,140,928

PIXEL DRIVING CIRCUIT, DRIVING METHOD, ARRAY SUBSTRATE AND DISPLAY APPARATUS

BOE Technology Group Co.,...

1. A pixel driving circuit, comprising: a data line, a gate line, a first power line, a second power line, a reference signal line, a light emitting device, a driving transistor, a storage capacitor, a reset subcircuit, a data writing subcircuit, a compensation subcircuit and a light emitting control subcircuit, wherein:the data line is configured to provide a data voltage;
the gate line is configured to provide a scanning voltage;
the first power line is configured to provide a first power voltage, the second power line is configured to provide a second power voltage, and the reference signal line is configured to provide a reference voltage;
the reset subcircuit is connected with two terminals of the storage capacitor, and also with the first power line, and the reset subcircuit is configured to reset a voltage across the two terminals of the storage capacitor to a predetermined signal voltage;
the data writing subcircuit is connected with the gate line, the data line and a second terminal of the storage capacitor, and the data writing subcircuit is configured to write information comprising the data voltage to the second terminal of the storage capacitor,
the compensation subcircuit is connected with a first terminal of the storage capacitor and the driving transistor, and the compensation subcircuit is configured to write information comprising a threshold voltage of the driving transistor and the first power voltage to the first terminal of the storage capacitor;
the light emitting control subcircuit is connected with the reference signal line, the second terminal of the storage capacitor, the driving transistor and the light emitting device, and the light emitting control subcircuit is configured to write the reference voltage to the second terminal of the storage capacitor;
the first terminal of the storage capacitor is connected with a gate of the driving transistor, and the storage capacitor is configured to transfer information comprising the data voltage to the gate of the driving transistor; and
the driving transistor is connected with the first power line, the light emitting device is connected with the second power line, and the driving transistor is configured to drive the light emitting device to emit light, wherein the reset subcircuit comprises a reset control line, a reset signal line, a first transistor and a second transistor, a gate of the first transistor and a gate of the second transistor are both connected with the reset control line, a source of the first transistor is connected with the reset signal line, a drain of the first transistor is connected with the first terminal of the storage capacitor, a source of the second transistor is connected with the first power line, a drain of the second transistor is connected with the second terminal of the storage capacitor, and the first transistor and the second transistor are respectively configured to write the voltage of the reset signal line to the first terminal of the storage capacitor and to write the first power voltage to the second terminal of the storage capacitor both under control of the reset control line, wherein the reset signal line, the first power line and the reference signal line are three different signal lines, and the voltage of the reset signal line is a low voltage and is different from the first power voltage of the first power line and is different from the reference voltage of the reference signal line.

US Pat. No. 10,140,927

GRAY SCALE GENERATOR AND DRIVING CIRCUIT USING THE SAME

MY-SEMI INC., Hsinchu Co...

1. A driving circuit, used for driving a light emitting unit, comprising:a gray scale generation circuit, including:
a shift register unit, receiving a luminance-related data, wherein the shift register unit is a k-bit shift register unit and k is a positive integer greater than 1; and
a data storage unit, having a plurality of parallel input ends and a serial output end, the data storage unit receiving a plurality of bits of the luminance-related data via its parallel input ends from the shift register unit and serially outputting the bits to generate a serial signal, and the data storage unit generating a gray-scale control signal according to the serial signal, wherein the data storage unit determines time points for outputting different bits of the serial signal according to a serial-out control signal; and
a driving unit, coupled to the gray scale generation circuit, adjusting a light-emitting time of the light emitting unit according to the gray-scale control signal received from the gray scale generation circuit.

US Pat. No. 10,140,926

DISPLAY DEVICE AND ELECTRONIC DEVICE HAVING THE SAME

Samsung Display Co., Ltd....

1. A display device comprising:a pixel unit including a plurality of pixels; and
a driving unit formed on a non-display area adjacent to the pixel unit, the driving unit configured to drive the pixels, wherein the driving unit includes:
an emission driver coupled to a first clock line and a second clock line and configured to receive therefrom a first clock signal and a second clock signal, respectively, and to generate an emission control signal provided to the pixels based on the first clock signal and the second clock signal; and
a scan driver coupled to the emission driver through a first coupling line and a second coupling line, the scan driver configured to receive the first clock signal and the second clock signal from the emission driver and to generate a scan signal provided to the pixels based on the first clock signal and the second clock signal.

US Pat. No. 10,140,925

PIXEL CIRCUITS FOR AMOLED DISPLAYS

Ignis Innovation Inc., W...

1. A display system comprising:a reference voltage source;
a supply voltage source; and
a plurality of pixels arranged in an array, each pixel comprising a pixel circuit including:
a light-emitting device,
a drive transistor for driving current through the light emitting device according to a driving voltage across the drive transistor during an emission cycle, said drive transistor having a gate, a source, a drain and a threshold voltage,
a storage capacitor coupled to said drive transistor for storing said driving voltage, and
a reference voltage transistor coupled to the reference voltage source for coupling the drive transistor to the reference voltage source during a first operation cycle for charging a node common to said storage capacitor and said light-emitting device to the reference voltage, said reference voltage having a magnitude that turns off said light-emitting device, the reference voltage transistor for isolating the drive transistor from the reference voltage source during a second operation cycle subsequent to the first operation cycle for allowing said drive transistor to transfer to said node, a voltage that is a function of the threshold voltage and mobility of said drive transistor.

US Pat. No. 10,140,924

DISPLAY DEVICE, METHOD FOR DRIVING DISPLAY DEVICE, AND ELECTRONIC DEVICE

Sony Corporation, Tokyo ...

1. A display device comprising:a pixel array unit including pixel circuits disposed in a matrix form, at least one of the pixel circuits including a light emission unit, a write transistor that writes a signal voltage of a video signal, a retention capacitor that retains the signal voltage written by the write transistor, a drive transistor that drives the light emission unit according to the signal voltage retained by the retention capacitor, and an auxiliary capacitor with a first terminal connected to a source electrode of the drive transistor, the pixel circuit being configured to execute a threshold value correction process that changes a source voltage of the drive transistor such that the source voltage becomes a difference between a threshold value voltage of the drive transistor and an initialization voltage of a gate electrode of the drive transistor; and
control circuitry that provides a potential change to the source electrode of the drive transistor by coupling through the auxiliary capacitor to set an operation point of the drive transistor as a cut-off region after the threshold value correction process,
wherein a write scanning signal enters an active state a first time during the threshold value correction process and a second time during the writing of the signal voltage, and
wherein when the write scanning signal enters the active state the first time and the second time, the respective pulse widths are the same.

US Pat. No. 10,140,923

PIXEL DRIVING SYSTEM OF AMOLED HAVING INITIALIZATION SIGNAL OF ALTERNATING HIGH AND LOW LEVELS AND METHOD FOR DRIVING PIXEL OF AMOLED HAVING INITIALIZATION SIGNAL OF ALTERNATING HIGH AND LOW LEVELS

SHENZHEN CHINA STAR OPTOE...

1. A pixel driving system of an organic light emitting display (AMOLED), comprising: a pixel driving circuit and an initialization voltage supply module electrically connected to the pixel driving circuit;the pixel driving circuit comprising: a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, a capacitor, and an organic light emitting diode;
a gate of the first thin film transistor receives a first scanning signal, a source receives a data signal, a drain is electrically connected to the first node;
a gate of the second thin film transistor is electrically connected to the first node, a drain receives a power supply voltage, a source is electrically connected to a second node;
a gate of the third thin film transistor receives a second scanning signal, a source is electrically connected to the first node, a drain is electrically connected to the third node;
a gate of the fourth thin film transistor receives the second scanning signal, a source is electrically connected to the third node, a drain is electrically connected to the second node;
one end of the capacitor is electrically connected to the first node and the other end is electrically connected to the second node;
an anode of the organic light emitting diode is electrically connected to the second node and the cathode is grounded; and
the initialization voltage supply module is electrically connected to the third node, and provides an initialization signal having a high and low alternating level to the third node in time order, the high level of the initialization signal is equal to the level of the first node when the organic light emitting diode emits light or the level of the second node when the organic light emitting diode emits light or greater than the level of the first node when the organic light emitting diode emits light;
wherein the initialization voltage supply module comprises: a multiplexer, an initialization high voltage generation module, and an initialization low voltage generation module; and
input terminals of the multiplexer are respectively electrically connected to the initialization high voltage generation module and the initialization low voltage generation module; an output terminal is electrically connected to the third node, control terminals receive the first strobe signal and a second gating signal; and
further comprising: a control signal generation module, a first scanning signal output processing module electrically connected to the control signal generation module, and a data signal output processing module electrically connected to the control signal generation module;
the control signal generation module outputs the enable signal of the first scanning signal and the driving signal of the data signal, respectively to the first scanning signal output processing module and the data signal output processing module to control the first scanning signal output processing module and the data signal output processing module output the first scanning signal and the data signal, respectively;
the first strobe signal is the enable signal of the first scanning signal, the second strobe signal is the driving signal of the data signal;
when the enable signal of the first scanning signal is at high level, the first scanning signal is at low level, when the enable signal of the first scanning signal is at low level, the first scanning signal is at high level; and
when the driving signal of the data signal is at low level, the data signal is at low level, and when the driving signal of the data signal is at high level, the data signal is at high level; when the enable signal of the first scanning signal and the driving signal of the data signal are both at high level, the initialization signal is at high level, and the initialization signal is all at low level in the rest of the time.

US Pat. No. 10,140,922

PIXEL DRIVING CIRCUIT AND DRIVING METHOD THEREOF AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A pixel driving circuit, comprising an input module, a compensation module, a drive module, a light emitting module and a control signal input module;the input module is connected to a first gate signal terminal and a data voltage terminal and the compensation module, and configured to transmit a signal of the data voltage terminal to the compensation module under control of the first gate signal terminal;
the compensation module is connected to a threshold voltage control terminal and the drive module, and configured to compensate for a threshold voltage of the drive module under control of the input module and the threshold voltage control terminal;
the light emitting module is connected to a first voltage terminal and the drive module;
the drive module is connected to a first control signal terminal, and configured to drive the light emitting module to emit light under control of the first control signal terminal;
the control signal input module is connected to the first control signal terminal, a second control signal terminal, a third control signal terminal, a second voltage terminal and a third voltage terminal, and configured to transmit a signal of the second voltage terminal or the third voltage terminal to the first control signal terminal under control of the second control signal terminal and the third control signal terminal.

US Pat. No. 10,140,921

EM SIGNAL CONTROL CIRCUIT, EM SIGNAL CONTROL METHOD AND ORGANIC LIGHT EMITTING DISPLAY DEVICE

LG DISPLAY CO., LTD., Se...

10. An organic light emitting display device comprising:a panel including a plurality of pixels;
a plurality of shift registers configured to provide scan signals to the respective pixels; and
an emission (EM) signal control circuit coupled to the plurality of shift registers and configured to provide EM signals to the respective pixels,
wherein the EM signal control circuit includes:
a first transistor, wherein a drain electrode of the first transistor is coupled to a first emission power source, a gate electrode of the first transistor is coupled to a QB node, and the first transistor is configured to output a voltage of the first emission power source to an output node coupled to a source electrode thereof in response to a set signal;
a second transistor, wherein a source electrode of the second transistor is coupled to a second emission power source, a gate electrode of the second transistor is coupled to a Q node, and the second transistor is configured to output a voltage of the second emission power source to the output node coupled to a drain electrode thereof in response to a reset signal;
a third transistor, wherein a source electrode of the third transistor is coupled to a second gate power source, a drain electrode of the third transistor is coupled to the QB node, and the third transistor is configured to transfer a voltage of the second gate power source to the QB node in response to the set signal;
a fourth transistor, wherein a drain electrode of the fourth transistor is coupled to a first gate power source, a source electrode of the fourth transistor coupled to the QB node, a gate electrode of the fourth transistor is coupled to the Q node, and the fourth transistor is configured to transfer a voltage of the first gate power source to the QB node in response to the reset signal;
a first capacitor coupled between the QB node and the drain electrode of the first transistor;
a fifth transistor, wherein a source electrode of the fifth transistor is coupled to the second gate power source, a drain electrode of the fifth transistor is coupled to the Q node, and the fifth transistor is configured to transfer the voltage of the second gate power source to the Q node in response to the reset signal; and
a sixth transistor, wherein a source electrode of the sixth transistor is coupled between the drain electrode of the fifth transistor and the Q node, a drain electrode of the sixth transistor is coupled to the first gate power source, and a gate electrode of the sixth transistor is coupled between the QB node and the drain electrode of the third transistor.

US Pat. No. 10,140,920

PIXEL DRIVING CIRCUIT, DISPLAY DEVICE AND PIXEL DRIVING METHOD

BOE TECHNOLOGY GROUP CO.,...

1. A method of driving a pixel driving circuit, the pixel driving circuit comprising a driving transistor, a storage capacitor, a light-emitting device, a first switch transistor, a second switch transistor, a third switch transistor, a fourth switch transistor and a fifth switch transistor, whereina control electrode of the first switch transistor is connected with a second scanning line, a first electrode of the first switch transistor is connected with a first power supply terminal, and a second electrode of the first switch transistor is connected with a first terminal of the storage capacitor;
a control electrode of the second switch transistor is connected with a third scanning line, a first electrode of the second switch transistor is connected with the first power supply terminal, and a second electrode of the second switch transistor is connected with a first electrode of the driving transistor and a first electrode of the third switch transistor;
a control electrode of the third switch transistor is connected with a first scanning line, the first electrode of the third switch transistor is connected with the first electrode of the driving transistor, and a second electrode of the third switch transistor is connected with a control electrode of the driving transistor and a second terminal of the storage capacitor;
a control electrode of the fourth switch transistor is connected with the first scanning line, a first electrode of the fourth switch transistor is connected with a data line, and a second electrode of the fourth switch transistor is connected with the first terminal of the storage capacitor;
a control electrode of the fifth switch transistor is connected with a fourth scanning line, a first electrode of the fifth switch transistor is connected with a second electrode of the driving transistor, and a second electrode of the fifth switch transistor is connected with a first terminal of the light-emitting device;
the second terminal of the storage capacitor is connected with the control electrode of the driving transistor, and a second terminal of the light-emitting device is connected with a second power supply terminal; and
the first power supply terminal is used to provide a working voltage, and the second power supply terminal is used to provide a reference voltage,
the method comprising:
performing a data write phase in which the first switch transistor and the fifth switch transistor are turned off, the second switch transistor, the third switch transistor and the fourth switch transistor are turned on, a data voltage on the data line is written to the first terminal of the storage capacitor through the fourth switch transistor, and the working voltage provided by the first power supply terminal is written to the second terminal of the storage capacitor through the second switch transistor and the third switch transistor,
performing a compensation write phase in which the first switch transistor and the second switch transistor are turned off, the third switch transistor, the fourth switch transistor and the fifth switch transistor are turned on, and the driving transistor discharges to write a compensation voltage including a threshold voltage of the driving transistor to the second terminal of the storage capacitor; and
performing a display phase in which the third switch transistor and the fourth switch transistor are turned off, the first switch transistor, the second switch transistor and the fifth switch transistor are turned on, the working voltage provided by the first power supply terminal is written to the first terminal of the storage capacitor through the first switch transistor, a control voltage is output from the second terminal of the storage capacitor to the driving transistor, and the driving transistor generates a driving current under control of the control voltage to drive the light-emitting device to emit light.

US Pat. No. 10,140,919

PIXEL CIRCUIT AND DRIVING METHOD THEREOF

TIANMA JAPAN, LTD., Kawa...

5. A pixel circuit, comprising:a light emitting element;
a driving transistor which supplies an electric current to the light emitting element according to a voltage applied to a gate terminal of the driving transistor;
a capacitor part which holds an emitting voltage containing a threshold voltage of the driving transistor and a data voltage; and
a switch part which holds the emitting voltage in the capacitor part, and applies the emitting voltage which is held by the capacitor part to the gate terminal of the driving transistor, wherein
the switch part applies a prescribed voltage to the gate terminal of the driving transistor, and the driving transistor supplies an electric current corresponding to the prescribed voltage which is applied by the switch part, before making the capacitor part hold the emitting voltage,
the switch part further comprises a current detour transistor which makes the electric current supplied from the driving transistor detour without flowing through the light entitling element before making the capacitor part hold the emitting voltage, and
the electric current supplied from the driving transistor corresponds to the prescribed voltage,
the driving transistor comprises the gate terminal, a source terminal, and a drain terminal, and supplies an electric current according to a voltage applied between the gate terminal and the source terminal to the light emitting element that is connected in series to the drain terminal and the source terminal,
the switch part comprises:
a data voltage transistor which inputs the data voltage from a data supply line, a reference voltage transistor which inputs a reference voltage from a reference voltage line,
a gate voltage transistor which applies the voltage held to the capacitor part between the gate terminal and the source terminal, and
a power switching transistor which function as a switch of an electric current flown to the drain terminal and the source terminal from a power supply voltage line,
the switch part applies the constant voltage between the gate terminal and the source terminal by turning on the data voltage transistor, the reference voltage transistor, the gate voltage transistor, and the power switching transistor,
the switch part makes the capacitor part hold the voltage containing the threshold voltage and the data voltage by turning on the data voltage transistor and the reference voltage transistor and turning off the gate voltage transistor and the power switching transistor, and
the switch part applies the voltage held to the capacitor part between the gate terminal and the source terminal by turning off the data voltage transistor and the reference voltage transistor and turning on the gate voltage transistor and the power switching transistor, wherein
a second terminal of the capacitor part is connected to the source terminal of the driving transistor;
the reference voltage transistor connects the reference voltage line and a first terminal of the capacitor part;
the data voltage transistor connects the data supply line and the gate terminal of the driving transistor;
the gate voltage transistor connects the gate terminal of the driving transistor and the first terminal of the capacitor part;
the power switching transistor connects the power supply line and the source terminal of the driving transistor;
the drain terminal of the driving transistor is connected to a first terminal of the light emitting element;
the current detour transistor connects the first terminal of the light emitting element and a fourth power supply line; and
a second terminal of the light emitting element is connected to a second power supply line.

US Pat. No. 10,140,918

ACTIVELY DRIVEN ORGANIC LIGHT-EMITTING DISPLAY APPARATUS

BOE TECHNOLOGY GROUP CO.,...

1. An actively driven organic light-emitting display apparatus, comprising a plurality of pixels arranged in a matrix and a drive device for driving the plurality of pixels to display; the drive device comprises at least one drive circuit corresponding to one column of pixels, each of the pixels including a light emitting device, a light emitting device drive unit, a first switch unit and a second switch unit; each of the drive circuit including a current control unit, wherein for any pixel in any one column of pixels and its corresponding drive circuit,the light emitting device drive unit is configured to drive the light emitting device to emit light;
the current control unit comprises a resistor and an operational amplifier, one terminal of the operational amplifier is coupled to data signal and the other terminal of the operation amplifier is coupled to one terminal of the resistor; the light emitting device, the light emitting device drive unit, the first switch unit, the second switch unit, the current control unit and the resistor constitute a feedback loop so that a control signal provided from the current control unit based on the data signal and a signal provide by the feedback loop is automatically determined by a resistance value of the resistor, an input data signal voltage and a supply voltage,
wherein the light emitting device drive unit comprise a drive transistor and a capacitor, and the drive transistor is an N-type thin film transistor;
when the light emitting device is connected between the power supply and the light emitting device unit, and the resistor is connected between the ground node and the feedback terminal of the current control unit, the capacitor is connected between a gate and a source of the drive transistor, a drain of the drive transistor is connected to the light emitting device, and the source of the drive transistor is connected to the second switch unit;
when the light emitting device is connected between the ground node and the light emitting device drive unit, and the resistor is connected between the power supply and the feedback terminal of the current control unit, the capacitor is connected between the gate and the source of the drive transistor, the source of the drive transistor is connected to the light emitting device, and the drain of the drive transistor is connected to the second switch unit.

US Pat. No. 10,140,917

POWER SUPPLY CIRCUIT, DRIVING METHOD FOR THE SAME AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A power supply circuit, comprising:a first control sub-circuit connected to a first voltage level terminal, a first scan signal terminal, and a first node, and configured to control the first voltage level terminal to be connected to the first node under control of a voltage at the first scan signal terminal;
a second control sub-circuit connected to a second voltage level terminal, a second scan signal terminal, and a second node, and configured to control the second voltage level terminal to be connected to the second node under control of a voltage at the second scan signal terminal;
a voltage converting sub-circuit connected to the first node and the second node, and configured to adjust a voltage at the first node and a voltage at the second node under control of the first control sub-circuit and the second control sub-circuit;
a first output sub-circuit connected to a third scan signal terminal, a first output terminal, and the first node, and configured to output the voltage at the first node to the first output terminal under control of a voltage at the third scan signal terminal; and
a second output sub-circuit connected to a fourth scan signal terminal, a second output terminal and the second node, and configured to output the voltage at the second node to the second output terminal, under control of voltage at the fourth scan signal terminal.

US Pat. No. 10,140,916

CHARGE PUMP AND OPERATING METHOD THEREOF

DAZZO TECHNOLOGY CORPORAT...

1. A charge pump, coupled to a loading capacitor, receiving an input voltage and providing an output voltage to the loading capacitor, the charge pump comprising:three capacitors comprising a first capacitor, a second capacitor and a third capacitor; and
ten switches comprising a first switch, a second switch, a third switch, a fourth switch, a fifth switch, a sixth switch, a seventh switch, an eighth switch, a ninth switch and a tenth switch;
wherein the first switch and the second switch are coupled in series between the input voltage and a ground terminal; one terminal of the first capacitor is coupled between the first switch and the second switch and another terminal of the first capacitor is coupled to the third switch; the third switch is coupled between the first capacitor and the fifth switch; one terminal of the second capacitor is coupled to a first node between the first capacitor and the third switch and another terminal of the second capacitor is coupled to a second node between the third switch and the fifth switch; the fourth switch is coupled between the second node and the loading capacitor; the loading capacitor is coupled between the fourth switch and the ground terminal; the fifth switch is coupled between the third switch and the third capacitor; one terminal of the sixth switch is coupled to the first node and another terminal of the sixth switch is coupled to a third node between the fifth switch and the third capacitor; the seventh switch is coupled between the third node and the ground terminal; the third capacitor is coupled between the fifth switch and the tenth switch; one terminal of the eighth switch is coupled to the ground terminal and another terminal of the eighth switch is coupled to a fourth node between the third capacitor and the tenth switch; the ninth switch is coupled between the fourth node and the first node; one terminal of the tenth switch is coupled to the fourth node and the another terminal of the tenth switch is coupled to a fifth node between the fourth switch and the loading capacitor.

US Pat. No. 10,140,915

DISPLAY DEVICE, DISPLAY SYSTEM AND DISPLAY METHOD

BOE TECHNOLOGY GROUP CO.,...

1. A display device, comprising a driver circuit, a display panel, and an interference unit arranged at a display side of the display panel, the interference unit comprising a front light source, whereinthe driver circuit is configured to drive the display panel to display an image, and a time period for each frame of the image comprises a display period and an interference period;
during the display period, the front light source is turned off to be in a transparent state so as to enable light beams from the display panel to pass through the interference unit; and
during the interference period, the front light source is turned on to emit light and to be in an interference state so as to interfere with the light beams from the display panel.

US Pat. No. 10,140,914

ORGANIC LIGHT-EMITTING DIODE (OLED) DISPLAY APPARATUS FOR MINIMIZING AN OUTGAS GENERATED DURING A PROCESS OF LASER REPAIRING

LG DISPLAY CO., LTD., Se...

1. An organic light-emitting diode (OLED) display apparatus for minimizing an outgas generated during a process of laser repairing comprising:a substrate having a plurality of pixels, all of the plurality of pixels including a driving element and an organic light-emitting element;
a plurality of wiring electrodes extended from a source electrode or a drain electrode of the driving element in all of the plurality of pixels; and
an organic insulating layer on the driving element in all of the plurality of pixels, the organic insulating layer having a first repair opening on the wiring electrode in all of the plurality of pixels,
wherein at least one of the wiring electrodes corresponding to the first repair opening does not have opening area.

US Pat. No. 10,140,913

SHIFT REGISTER UNIT, GATE DRIVE CIRCUIT AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A shift register unit, comprising:a gate drive signal output terminal, a first clock signal input terminal, a second clock signal input terminal, a low level input terminal, a pull-up control unit, a pull-down unit, a pull-down node control unit and a pull-down control node control unit;
a pull-up node disposed between the pull-up control unit and the pull-down node control unit;
a pull-down node disposed between the pull-down unit and the pull-down node control unit; and
a pull-down control node disposed between the pull-down control node control unit and the pull-down node control unit,
wherein the pull-up control unit is connected to the gate drive signal output terminal and the pull-up node, and in an input phase and output phase of a display period, the pull-up control unit pulls a potential of the pull-up node up to a high level, and in the output phase of the display period, the pull-up control unit controls the gate drive signal output terminal to output a high level,
the pull-down unit is connected to the pull-down node and the gate drive signal output terminal, and in a pull-down holding phase of the display period, the pull-down unit controls the gate drive signal output terminal to output a low level under the control of the pull-down node,
the pull-down node control unit is connected to the first clock signal input terminal, the pull-up node, the pull-down node, the pull-down control node and the low-level input terminal, and in the input phase and output phase of the display period, the pull-down node control unit controls the pull-down node to be connected to the low-level input terminal under the control of the pull-up node, and in the pull-down holding phase of the display period, the pull-down node control unit controls the pull-down node to be connected to the first clock signal input terminal under the control of the pull-down control node, and
the pull-down control node control unit is connected to the first clock signal input terminal, the second clock signal input terminal, the low level input terminal and the pull-down control node, and in the pull-down holding phase of the display period, a first clock signal input through the first clock signal input terminal and a second clock signal input through the second clock signal input terminal have opposite phases, under the condition the first clock signal has a high level, the pull-down control node control unit controls the pull-down control node to be connected to the first clock signal input terminal, and under the condition the second clock signal has a high level, the pull-down control node control unit controls the pull-down control node to be connected to the low level input terminal.