US Pat. No. 10,971,229

METHOD, SYSTEM AND DEVICE FOR INTEGRATION OF VOLATILE AND NON-VOLATILE MEMORY BITCELLS

Arm Limited, Cambridge (...

1. A bitcell circuit, comprising:one or more volatile memory elements collectively comprising a first node; and
one or more non-volatile magnetic memory elements electrically coupled to the first node of the one or more volatile memory elements, wherein the one or more volatile memory elements and the one or more non-volatile magnetic memory elements are individually accessible, wherein the one or more volatile memory elements are accessible via a bitline responsive to a signal on a first wordline and wherein the one or more non-volatile magnetic memory elements are accessible via a second wordline, and wherein one or more signals and/or states stored at the one or more volatile memory elements are maintained if the one or more non-volatile magnetic memory elements are accessed, wherein a first non-volatile magnetic memory element of the one or more non-volatile magnetic memory elements comprises a spin-orbit-torque (SOT) metal layer electrically couples between a first terminal and a second terminal, and further comprises a magnetic tunnel junction (MJT) component electrically coupled between a third terminal and the SOT metal layer.

US Pat. No. 10,971,228

ADAPTIVE APPLICATION OF VOLTAGE PULSES TO STABILIZE MEMORY CELL VOLTAGE LEVELS

Micron Technology, Inc., ...

1. A method comprising:receiving a request to perform a seasoning operation on memory cells of a memory device;
responsive to receiving the request, applying, by a processing device, a set of voltage pulses to the memory cells of the memory device, a voltage pulse of the set of the voltage pulses placing the memory cells of the memory device at a voltage level associated with a defined voltage state;
determining a set of bit error rates associated with the memory cells of the memory device at the voltage level in view of a data mapping pattern for the memory cells of the memory device, wherein the data mapping pattern assigns a voltage level associated with a reset state to at least a portion of the memory cells of the memory device;
determining whether the set of bit error rates satisfies a threshold condition; and
responsive to determining that the set of bit error rates does not satisfy the threshold condition, applying another set of the voltage pulses to the memory cells of the memory device.

US Pat. No. 10,971,227

PRESERVATION CIRCUIT AND METHODS TO MAINTAIN VALUES REPRESENTING DATA IN ONE OR MORE LAYERS OF MEMORY

Unity Semiconductor Corpo...

1. A memory module comprising:an internal memory device comprising memory cells to store data, a trigger circuit to detect a triggering event, and a preservation circuit;
an internal power supply coupled to the internal memory device, the internal power supply comprising an antenna to receive radio frequency (RF) signals, an RF to direct current (DC) converter to convert the RF signals to DC power, and a battery to store the DC power; and
a memory controller coupled to the internal memory device and to the internal power supply, the memory controller comprising a power management circuit to disconnect the internal memory device from the internal power supply in response to a loss of power received by the memory module from a host system and to supply the DC power from the battery to the preservation circuit in response to the triggering event, the preservation circuit to perform preservation operations on the memory cells.

US Pat. No. 10,971,226

HYPER-DIMENSIONAL COMPUTING DEVICE

International Business Ma...

1. A device for hyper-dimensional computing, the device comprising:a resistive memory device for storing elements of hyper-dimensional vectors as conductive statuses in components of the resistive memory device,
wherein the resistive memory device comprises a first crossbar array of the components, wherein the components are memristive 2D components addressable by word-lines and bit-lines, and
a peripheral circuit, having an output portion, and being connected to the word-lines and bit-lines and adapted for encoding operations by activating the word-lines and bit-lines sequentially in a predefined manner, the peripheral circuit being further adapted to selectively activate word-lines of hyper-dimensional vectors in the crossbar array, wherein the selected hyper-dimensional vectors are to be bound together, and to determine an Ngram hyper-dimensional vector by a binding operation using the output portion of the peripheral circuit.

US Pat. No. 10,971,225

RESISTIVE RANDOM ACCESS MEMORY DEVICE WITH THREE-DIMENSIONAL CROSS-POINT STRUCTURE AND METHOD OF OPERATING THE SAME

TOSHIBA MEMORY CORPORATIO...

1. A memory device, comprising:a substrate;
a first wiring provided above the substrate and extending in a first direction parallel to the substrate;
a second wiring provided above the first wiring and extending in a second direction crossing the first direction, the second direction being parallel to the substrate;
a third wiring being adjacent to the second wiring in a third direction, the third wiring extending in the second direction, the third direction perpendicular to the first direction and the second direction;
a fourth wiring provided above the third wiring and extending in the first direction, the third wiring being provided between the second wiring and the fourth wiring;
a fifth wiring extending in the second direction, the fourth wiring being provided between the third wiring and the fifth wiring;
a sixth wiring being adjacent to the fifth wiring in the third direction;
a first variable resistance member connected between the first wiring and the second wiring;
a second variable resistance member connected between the third wiring and the fourth wiring; and
a third variable resistance member connected between the fourth wiring and the fifth wiring.

US Pat. No. 10,971,224

HIGH VOLTAGE SWITCHING CIRCUITRY FOR A CROSS-POINT ARRAY

Unity Semiconductor Corpo...

1. A decoder circuit comprising:a predecoder comprising:
predecode logic configured to receive at least a portion of a memory address and generate one or more predecoded signals corresponding to one or more address bits of the at least the portion of the memory address; and
a level shifter circuit comprising a negative voltage level shifter, a positive voltage level shifter, and a driver, the level shifter circuit configured to generate a voltage signal on a conductive array line of a plurality of conductive array lines used to access a memory cell in a memory array, wherein the driver to set a value of the voltage signal using at least one of the negative voltage level shifter or the positive voltage level shifter based on the one or more predecoded signals.

US Pat. No. 10,971,223

PHASE CHANGE MEMORY OPERATION METHOD AND CIRCUIT

TAIWAN SEMICONDUCTOR MANU...

1. A method of altering a conductance of a phase-change memory (PCM) device, the method comprising:applying a pulse sequence to the PCM device, each pulse of the pulse sequence comprising a pulse number, an amplitude, a leading edge, a pulse width, and a trailing edge, the trailing edge having a duration longer than a duration of the leading edge; and
in response to the applying the pulse sequence, altering a conductance level of the PCM device,
wherein the applying the pulse sequence comprises increasing the pulse number while increasing at least one of the amplitude, the pulse width, or the trailing edge duration.

US Pat. No. 10,971,222

DYNAMIC BIT-SCAN TECHNIQUES FOR MEMORY DEVICE PROGRAMMING

SanDisk Technologies LLC,...

1. An apparatus comprising:a plurality of memory cells;
a programming circuit configured to apply a plurality of programming pulses to the memory cells; and
a scanning circuit configured to repeatedly switch between:
performing an n-state bitscan after each of multiple programming pulses until first predetermined criteria are satisfied; and
performing an m-state bitscan after each of multiple programming pulses until second predetermined criteria are satisfied, where m>n, and n>0.

US Pat. No. 10,971,221

STORAGE DEVICE AND METHODS WITH FAULT TOLERANCE CAPABILITY FOR NEURAL NETWORKS

SHANGHAI CAMBRICON INFORM...

1. A method for storing data, comprising:storing, by a first storage unit of a storage device, one or more first bits of neural network data,
wherein the neural network data includes floating point type data and fixed point type data, and
wherein the first bits include one or more sign bits of the floating point type data and the fixed point type data; and
storing, by a second storage unit of the storage device, one or more second bits of the neural network data;
receiving, by the storage device, an input instruction and a computational parameter, wherein the computational parameter is a neural network parameter;
storing, by the storage device, the input instruction and the first bits of the computational parameter in the first storage unit;
storing, by the storage device, the second bits of the computational parameter in the second storage unit;
receiving, by an instruction control unit, the input instruction;
decoding, by the instruction control unit, the input instruction;
generating, by the instruction control unit, control information;
receiving, by the computation unit, an input neuron and a weight stored in the storage device, wherein the computation unit is a neural network processor;
completing, by the computation unit, neural network operation according to the control information to obtain an output neuron;
transferring, by the computation unit, the output neuron to the storage device;
receiving, by the computation unit, the first bits and the second bits of the input neuron, and the first bits and the second bits of the weight; and
splicing, by the computation unit, the complete input neuron and weight for computation.

US Pat. No. 10,971,220

WRITE ASSIST FOR A MEMORY DEVICE AND METHODS OF FORMING THE SAME

Taiwan Semiconductor Manu...

1. A semiconductor memory device, comprising:an array of memory cells arranged in a column; and
a write assist circuit within the column of the array of memory cells,
the array of memory cells and the write assist circuit having a common semiconductor layout, wherein the common semiconductor layout includes a repeating pattern of gate regions and active regions every two rows in a vertical direction and every two columns in a horizontal direction, wherein the write assist circuit utilizes a layout footprint of the common semiconductor layout that is equivalent to a footprint for three adjacent memory cells within the column.

US Pat. No. 10,971,219

SEMICONDUCTOR DEVICE

RENESAS ELECTRONICS CORPO...

1. A semiconductor device comprising:a memory circuit including a memory cell comprised of a Silicon on Thin Buried Oxide (SOTB) transistor; and
a mode designation circuit switching an operation mode of the memory circuit between a first mode and a second mode,
wherein the memory circuit includes:
a substrate bias generation circuit supplying a substrate bias voltage to the SOTB transistor in the first mode, wherein the substrate bias generation circuit does not supply the substrate bias voltage to the SOTB transistor in the second mode; and
a timing signal generation circuit generating a timing signal used for a reading operation or a writing operation of the memory circuit, wherein the timing signal generation circuit generates a first timing signal using a first delay stage in the first mode and a second timing signal using a second delay stage in the second mode, and wherein the timing signal generation circuit includes a selector circuit for switching an output of the first timing signal and the second timing signal such that the first timing signal from the first delay stage is output in the first mode and the second timing signal from the second delay stage is output in the second mode.

US Pat. No. 10,971,218

METHOD AND APPARATUS FOR MEMORY NOISE-FREE WAKE-UP PROTOCOL FROM POWER-DOWN

Synopsys, Inc., Mountain...

1. A memory device having a wake-up protocol comprising:a plurality of bitcells having corresponding bitline pairs coupled to the plurality of bitcells;
a first transistor coupled between a voltage core supply and the plurality of bitcells configured to supply a core voltage to the plurality of bitcells, the first transistor configured to receive a second wake signal to charge the plurality of bitcells to the core voltage; and
a second transistor having a drain coupled to the plurality of bitcells, a source coupled to a gate of the first transistor, and a gate configured to receive a first wake signal to enable precharge of the plurality of bitcells, wherein a delay is introduced between application of the first wake signal and the second wake signal.

US Pat. No. 10,971,217

SRAM CELL FOR INTERLEAVED WORDLINE SCHEME

Taiwan Semiconductor Manu...

1. A static random access memory (SRAM) cell laid out on a semiconductor substrate according to an SRAM cell layout, the SRAM cell layout comprising:upper and lower cell edges and left and right cell edges corresponding to an outer perimeter of the SRAM cell on the semiconductor substrate;
a first wordline and a second wordline each extending generally in parallel with the upper and lower cell edges and each extending between the left and right cell edges of the SRAM cell;
a first local interconnect line extending in parallel with the first wordline and the second wordline and spaced between nearest neighboring sidewalls of the first wordline and the second wordline; and
a first wide or elongated contact extending laterally and continuously from beneath an upper surface of the first wordline to over an upper surface of the first local interconnect line and being coupled to the first local interconnect line.

US Pat. No. 10,971,216

SRAM CONFIGURATION CELL FOR LOW-POWER FIELD PROGRAMMABLE GATE ARRAYS

Microsemi SoC Corp., Cha...

1. A static random-access memory configuration cell for an integrated circuit device that includes an input-output (I/O) FinFET transistor and a core logic FinFET transistor, the static random-access memory configuration cell comprising:first and second power supply nodes;
first and second complementary output nodes;
first and second complementary bit lines associated with the memory cell;
a word line associated with the memory cell;
a first pair of series-connected p-channel hybrid FinFET transistors connected between the first complementary output node and the first power supply node, wherein gates of the first pair of series-connected p-channel hybrid FinFET transistors are connected to the second complementary output node;
a first pair of series-connected n-channel hybrid FinFET transistors connected between the first complementary output node and the second power supply node, wherein gates of the first pair of series-connected n-channel hybrid FinFET transistors are connected to the second complementary output node;
a second pair of series-connected p-channel hybrid FinFET transistors connected between the first power supply node and the second complementary output node, wherein gates of the second pair of series-connected p-channel hybrid FinFET transistors are connected to the first complementary output node; and
a second pair of series-connected n-channel hybrid FinFET transistors connected between the second power supply node and the second complementary output node, wherein gates of the second pair of series-connected n-channel hybrid FinFET transistors are connected to the first complementary output node; and
wherein the first pair of series-connected p-channel hybrid FinFET transistors, the first pair of series-connected n-channel hybrid FinFET transistors, the second pair of series-connected p-channel hybrid FinFET transistors and the second pair of series-connected n-channel hybrid FinFET transistors, have channels including channel implant doses in the entire channel that are higher than implant doses of the core logic FinFET transistor, have channel geometries that are approximately the same as a channel geometry of the core logic FinFET transistor, and include gate oxide layers having a uniform thickness across the entire channel that are approximately the same thicknesses as a gate oxide layer of the I/O FinFET transistor.

US Pat. No. 10,971,215

DYNAMICALLY ADJUST DATA TRANSFER SPEED FOR NON-VOLATILE MEMORY DIE INTERFACES

Western Digital Technolog...

1. A circuit, comprising:an initialization circuit configured to load multi-level cell settings to configure a memory interface for transfer of data for storage cells configured to store more than one bit per storage cell;
a control circuit configured to receive a first read command that references storage cells of a memory die, the storage cells storing a single bit per storage cell;
a switch circuit configured to switch settings for the memory interface from the multi-level cell settings to single level cell settings, in response to receiving the first read command; and
a read-write circuit configured to read data for the first read command from the memory die using the single level cell settings.

US Pat. No. 10,971,214

APPARATUSES AND METHODS TO PERFORM LOGICAL OPERATIONS USING SENSING CIRCUITRY

Micron Technology, Inc., ...

1. An apparatus, comprising:sensing circuitry including a sense amplifier and a compute component; and
selection logic circuitry coupled to the sense amplifier via a plurality of pairs of logical operation transistors and coupled to the compute component via a set of selection logic transistor pairs, wherein the plurality of pairs of logical operation transistors comprises two sets of transistor pairs coupled to a first transistor pair of the selection logic transistor pairs and two sets of transistor pairs coupled to a second transistor pair of the selection logic transistor pairs.

US Pat. No. 10,971,213

DATA SENSING DEVICE AND DATA SENSING METHOD THEREOF

MACRONIX INTERNATIONAL CO...

1. A data sensing device, coupled to a memory array, and comprising:a current adjuster, corresponds to a memory string of a memory array, generating a shift current according to an amount of a plurality of input signals of the memory string compared to a predefined reference value, and adjusting a read-out current of the memory string according to the shift current to generate an adjusted read-out current; and
a sensing amplifier, coupled to the current adjuster, receiving the adjusted read-out current and a plurality of reference currents, and comparing the adjusted read-out current and the plurality of reference currents to generate a read-out data.

US Pat. No. 10,971,212

MEMORY CHIP AND CONTROL METHOD THEREOF

WINBOND ELECTRONICS CORP....

1. A memory chip, comprising:at least one memory bank comprising:
a first sub-bank comprising a first memory cell coupled to a first word line and a first access line, wherein the first memory cell outputs data to the first access line via a first path; and
a second sub-bank comprising a second memory cell coupled to a second word line and the first access line, wherein the second memory cell outputs data to the first access line via a second path;
an address decoder circuit decoding an external address to generate a row address and a column address; and
a control circuit controlling the first path and the second path according to the row address and the column address,
wherein in response to the row address indicating the first word line and the column address indicating the first access line, the control circuit turns on the first path and turns off the second path and provides an access signal to the first word line and provides a refresh signal to the second word line.

US Pat. No. 10,971,211

SEMICONDUCTOR DEVICES FOR RECOGNIZING A PHASE OF A DIVISION CLOCK SIGNAL

SK hynix Inc., Icheon-si...

1. A semiconductor device comprising:a phase difference detection circuit configured to generate a first phase difference detection signal and a second phase difference detection signal by comparing a phase of a phase detection clock signal, generated from a command/address signal in synchronization with a clock signal, with phases of a division clock signal and an internal division clock signal that are generated by dividing a frequency of a data clock signal according to an operation mode; and
an internal circuit configured to recognize the phases of the division clock signal and the internal division clock signal according to a logic level combination of the first and second phase difference detection signals.

US Pat. No. 10,971,210

NONVOLATILE MEMORY DEVICE AND OPERATING METHOD OF THE SAME

SAMSUNG ELECTRONICS CO., ...

1. A nonvolatile memory device comprising:a memory cell region including a first metal pad; and
a peripheral circuit region including a second metal pad and vertically connected to the memory cell region by the first metal pad and the second metal pad,
wherein the memory cell region includes:
a first memory stack comprising a plurality of first memory cells vertically stacked on each other; and
a second memory stack comprising a plurality of second memory cells vertically stacked on each other,
wherein the second memory stack is vertically stacked on the first memory stack,
wherein the peripheral circuit region includes a control logic configured to set a voltage level of a second voltage applied for a second memory operation to a second memory cell of the plurality of second memory cells in the second memory stack based on a first voltage applied to a first memory cell of the plurality of first memory cells in the first memory stack in a first memory operation, and
wherein cell characteristics of the first memory cell are determined using the first voltage.

US Pat. No. 10,971,209

VHSA-VDDSA GENERATOR MERGING SCHEME

SanDisk Technologies LLC,...

1. A memory device comprising:a memory array; and
physical block circuitry, comprising a first lateral network arrangement and a second lateral network arrangement, each comprising:
a generator configured to output a sense amplifier voltage VHSA and a data latch voltage VDDSA in each of a first mode and a second mode;
wherein, in the first mode, the generator receives VHSA as a feedback signal and in the second mode, the generator receives VDDSA as a feedback signal.

US Pat. No. 10,971,208

SEMICONDUCTOR DEVICE HAVING INTERCONNECTION IN PACKAGE AND METHOD FOR MANUFACTURING THE SAME

SAMSUNG ELECTRONICS CO., ...

1. A dynamic random access memory (DRAM) package for communicating with an external device through a first channel and a second channel, the DRAM package comprising:a package substrate;
a first pad part including first through sixth channel address pads of the first channel respectively receiving first through sixth address signals of the first channel, the first pad part being disposed at a first edge of the package substrate;
a second pad part including first through sixth channel address pads of the second channel respectively receiving first through sixth address signals of the second channel, the second pad part being disposed at a second edge of the package substrate, the second edge being opposite to the first edge;
a first DRAM die disposed on the package substrate, the first DRAM die including first through sixth die address pads of the first channel respectively connected to the first through sixth channel address pads of the first channel;
a second DRAM die identical to the first DRAM die in physical size and storage capacity and rotated by one hundred eighty degrees relative to the first DRAM die, the second DRAM die including first through sixth die address pads of the second channel respectively connected to the sixth through first channel address pads of the second channel; and
an interconnection circuit configured to electrically connect the first and second DRAM dies, the interconnection circuit including at least one wire bonding through which an impedance calibration signal is transmitted from the first DRAM die to the second DRAM die,
wherein the first through sixth channel address pads of the first channel and the first through sixth channel address pads of the second channel are substantially line-symmetrical with respect to a center line of the DRAM package, the center line of the DRAM package is between the first edge and the second edge,
wherein the first and second DRAM dies are packaged together in the DRAM package,
wherein the second DRAM die further includes a swapping circuit configured to receive the first through sixth address signals of the second channel through the sixth through first die address pads of the second channel and the first through sixth channel address pads of the second channel, and exchange the first through sixth address signals of the second channel in response to a swapping signal, and
wherein the impedance calibration signal is generated by the first DRAM die and is based on information received from the first pad part.

US Pat. No. 10,971,207

SEMICONDUCTOR MEMORY DEVICE

SK hynix Inc., Gyeonggi-...

1. A semiconductor memory device comprising:a count circuit suitable for counting a first clock signal which continuously toggles in each burst refresh cycle, and generating a count code signal, based on a burst refresh command signal;
a cycle guide circuit suitable for generating a second clock signal which toggles once in each burst refresh cycle, based on the burst refresh command signal and a precharge signal;
a randomization circuit suitable for generating a random code signal corresponding to a random value in each burst refresh cycle, based on the second clock signal; and
a control circuit suitable for generating a latch control signal for latching a target address in each burst refresh cycle, based on the count code signal and the random code signal,
wherein the randomization circuit comprises:
a clock signal generation unit suitable for generating a third clock signal;
a random value generation unit suitable for generating a code signal corresponding to the random value at least once in each burst refresh cycle, based on the third clock signal; and
a latch unit suitable for latching the code signal as the random code signal in each burst refresh cycle, based on the second clock signal.

US Pat. No. 10,971,206

SEMICONDUCTOR MEMORY DEVICE

SK hynix Inc., Gyeonggi-...

1. A semiconductor memory device comprising:a first count circuit suitable for counting a first clock signal which continuously toggles in each burst refresh cycle, and generating a first count code signal, based on a burst refresh command signal;
a cycle guide circuit suitable for generating a second clock signal which toggles once in each burst refresh cycle, based on the burst refresh command signal and a precharge signal;
a second count circuit suitable for counting the second clock signal and generating a second count code signal; and
a control circuit suitable for generating a latch control signal for latching a target address in each burst refresh cycle, based on the first count code signal and the second count code signal,
wherein the control circuit comprises:
a comparison unit suitable for generating a comparison signal corresponding to a result of comparing a first count value corresponding to the first count code signal and a second count value corresponding to the second count code signal;
a limiting unit suitable for generating a limit signal which is activated for a limit period, based on the comparison signal and the burst refresh command signal; and
an output unit suitable for outputting the latch control signal which toggles for the limit period, based on the limit signal and the first clock signal.

US Pat. No. 10,971,205

APPARATUSES AND METHODS INCLUDING FERROELECTRIC MEMORY AND FOR ACCESSING FERROELECTRIC MEMORY

Micron Technology, Inc., ...

1. A method, comprising:increasing a voltage of a first cell plate of a capacitor to change a voltage of a second cell plate of the capacitor, a second digit line, and a second sense node;
deactivating an isolation switch coupled between the second digit line and the second sense node;
decreasing the voltage of the second cell plate and the second digit line to change the voltage of the first cell plate, a first digit line, and a first sense node;
driving the first sense node to a first voltage and driving the second sense node to a second voltage responsive to the voltage of the first sense node being greater than the voltage of the second sense node; and
driving the first sense node to the second voltage and driving the second sense node to the first voltage responsive to the voltage of the first sense node being less than the voltage of the second sense node.

US Pat. No. 10,971,204

THREE-DIMENSIONAL NON-VOLATILE FERROELECTRIC MEMORY

FUDAN UNIVERSITY, Shangh...

1. A three-dimensional non-volatile ferroelectric memory, comprising a ferroelectric memory array structure, wherein the ferroelectric memory array structure comprises multiple layers of ferroelectric memory cell array disposed in a stacked way, and each layer of the ferroelectric memory cell array comprises ferroelectric memory cells arranged in rows and columns;wherein word lines and bit lines which are substantially orthogonal to each other are oppositely disposed on two sides of the corresponding ferroelectric memory cell respectively, and a reference ferroelectric body is disposed adjacent to the corresponding ferroelectric memory cell; and
a polarization direction of an electric domain in the ferroelectric memory cell is not perpendicular to an electric field direction of a write voltage signal applied to the word line and the bit line; and when the write voltage signal is applied between the word line and the bit line, the electric domain in the ferroelectric memory cell can be reversed and a domain wall conductive passage can be established between the ferroelectric memory cell and the reference ferroelectric body adjacent thereto, wherein the word line and bit line on the two sides of the ferroelectric memory cell can be electrically connected by the domain wall conductive passage.

US Pat. No. 10,971,203

WEAR LEVELING FOR RANDOM ACCESS AND FERROELECTRIC MEMORY

Micron Technology, Inc., ...

1. A memory device, comprising:an array comprising a set of tiles of memory cells;
a set of sensing components and a set of latches in electronic communication with the array, each tile of the set of tiles of memory cells associated with the set of sensing components and the set of latches;
an error correction circuit in electronic communication with one or more of the array, the set of sensing components, or the set of latches; and
a controller in electronic communication with one or more of the array, the set of sensing components, or the error correction circuit, the controller operable to:
cause the error correction circuit to transmit a set of data to the set of latches;
cause the set of data to be stored in the tile of the array;
divide the set of data into a quantity of subsets of data; and
forward each subset of the quantity of subsets of data through the error correction circuit sequentially to a corresponding latch of the set of latches.

US Pat. No. 10,971,202

LOW LATENCY DATA TRANSFER

SanDisk Technologies LLC,...

1. An apparatus, comprising:a plurality of memory cells arranged in NAND strings in a block, the block divided into M divisions arranged in a division sequence, each division divided into columns arranged in a column sequence, and each column comprising contiguous NAND strings;
data transfer latches connected to the NAND strings and configured to store data from the columns of each division;
a first bus connected to the data transfer latches; and
a data pipeline connected to the first bus, the first bus is configured to transfer data from the data transfer latches to the data pipeline in a first data transfer, the first data transfer comprises data of an n+1st column in the column sequence of m initial divisions in the division sequence, and data of an nth column in the column sequence of M?m remaining divisions in the division sequence which follow the m initial divisions, where n?1, m?1 and M?2.

US Pat. No. 10,971,201

ON-DIE TERMINATION OF ADDRESS AND COMMAND SIGNALS

RAMBUS INC., San Jose, C...

1. A method of operating a memory controller to control one or more memory devices via a command/address (CA) bus, wherein each of the memory devices has a chip select input connected to a respective signal line of the CA bus;the method comprising:
sending, to respective inputs of the one or more memory devices, command/address (CA) signals, including a chip select signal to each respective chip select input of the memory devices; and
sending to each respective memory device of the memory devices:
register values, for storage in a plurality of registers, wherein the register values represent one or more impedance values of on-die termination (ODT) impedances to apply to the respective inputs of the respective memory device that receive the CA signals, and one or more register values to selectively enable application of a chip select ODT impedance to each respective chip select input.

US Pat. No. 10,971,200

SEMICONDUCTOR CIRCUIT AND OPERATING METHOD FOR THE SAME

MACRONIX INTERNATIONAL CO...

1. A semiconductor circuit, comprising:a main memory array;
a reference memory array;
a memory device for storing a first memory state signal S1 obtained by operating the reference memory array during a first timing; and
a processing circuit for reading a second memory state signal S2 of a second timing after the first timing of the reference memory array, and for calculating an un-compensated output data signal OD relative with an input data signal ID and a another second memory state signal S2 of a second timing of the main memory array, wherein the processing circuit is used to calculate a difference between the first memory state signal S1 and the second memory state signal S2 so as to obtain a state difference signal SD, wherein the processing circuit is used to calculate the state difference signal SD and the un-compensated output data signal OD so as to obtain a compensated output data signal OD?, the memory device is electrically coupled with the processing circuit.

US Pat. No. 10,971,199

MICROCONTROLLER FOR NON-VOLATILE MEMORY WITH COMBINATIONAL LOGIC

SANDISK TECHNOLOGIES LLC,...

1. A non-volatile storage apparatus, comprising:a non-volatile memory structure; and
a control circuit connected to the non-volatile memory structure, the control circuit is configured to control the non-volatile memory structure to perform memory operations by generating and applying a set of control signals to operate the non-volatile memory structure, the control circuit comprises:
a first combinational logic circuit configured to receive an input and calculate a first version of a parameter based on the input,
a first programmable processor configured to receive the input and configurable to calculate a second version of the parameter based on the input, the first version of the parameter is different than the second version of the parameter,
a switching circuit connected to the first programmable processor and the first combinational logic circuit, the switching circuit is configured to receive the first version of the parameter from the first combinational logic circuit and the second version of the parameter from the first programmable processor and selectively create an output parameter based on either the first version of the parameter or the second version of the parameter, and
a second programmable processor connected to the switching circuit, the second programmable processor is configured to receive the output parameter from the switching circuit and use the output parameter to determine a first control signal of the set of control signals.

US Pat. No. 10,971,198

SEMICONDUCTOR SYSTEM AND METHOD OF OPERATING THE SAME

SK hynix Inc., Icheon-si...

1. A semiconductor system comprising:a first semiconductor device configured to:
compare an original signal with a receiving signal to generate a driving force control signal; and
drive the original signal using a driving force in accordance with the driving force control signal to output an external transmission signal; and
a second semiconductor device configured to:
receive the external transmission signal to generate a positive signal and a negative signal;
generate a restoration signal based on the positive signal and the negative signal; and
output the restoration signal as the external transmission signal to the first semiconductor device.

US Pat. No. 10,971,197

CONTROL CIRCUIT, SEMICONDUCTOR MEMORY DEVICE, INFORMATION PROCESSING DEVICE, AND CONTROL METHOD

SONY SEMICONDUCTOR SOLUTI...

1. A device, comprising:a control circuit configured to:
control connection of a first reference element to a sense amplifier, wherein the first reference element is in a first resistance state;
control disconnection of a second reference element from the sense amplifier, wherein
the second reference element is in a second resistance state, and
the second reference element is different from the first reference element;
control the first reference element to generate a reference potential based on the connection of the first reference element to the sense amplifier, wherein the sense amplifier reads data from a memory cell based on the reference potential; and
control execution of a write process on the second reference element based on the disconnection of the second reference element from the sense amplifier.

US Pat. No. 10,971,196

SINGLE-ENDED SENSE AMPLIFIER

NATIONAL CHUNG CHENG UNIV...

1. A single-ended sense amplifier sequentially performing a first operation phase, a second operation phase, and a third operation phase and comprising:a virtual-supply-voltage-adapted inverter circuit, coupled to a data line of a memory array, having a first virtual-supply node and a second virtual-supply node, receiving a data signal input from the data line of the memory array and a sensing-operation-enabling signal input, and generating a pre-amplified signal output;
a virtual-supply-voltage-adapted voltage-level converter, coupled to the virtual-supply-voltage-adapted inverter circuit, having a third virtual-supply node, receiving the pre-amplified signal output of the virtual-supply-voltage-adapted inverter circuit, a pre-charging control signal input being the same as a control signal input of a pre-charging data-line load of the memory array, and the sensing-operation-enabling signal input, and generating a final amplified signal output; and
a virtual-supply-voltage-adaption circuit receiving the sensing-operation-enabling signal input to link or to dis-link the first virtual-supply node of the virtual-supply-voltage-adapted inverter circuit and the third virtual-supply node of the virtual-supply-voltage-adapted voltage-level converter,
wherein in the first operation phase, the pre-charging control signal input is asserted, the sensing-operation-enabling signal input is dis-asserted, the virtual-supply-voltage-adapted inverter circuit pre-charges its own the first virtual-supply node to a system supply voltage, the virtual-supply-voltage-adaption circuit is turned off to dis-link the first virtual-supply node of the virtual-supply-voltage-adapted inverter circuit and the third virtual-supply node of the virtual-supply-voltage-adapted voltage-level converter, and the virtual-supply-voltage-adapted voltage-level converter pre-charges its own the third virtual-supply node to the system supply voltage,
wherein in the second operation phase, the pre-charging control signal input is dis-asserted, the sensing-operation-enabling signal input is asserted, the virtual-supply-voltage-adapted inverter circuit adapts its own virtual-supply-node voltage in accordance with the data signal input being subject a leakage current of the data line, the virtual-supply-voltage-adaption circuit is turned off to dis-link the first virtual-supply node of the virtual-supply-voltage-adapted inverter circuit and the third virtual-supply node of the virtual-supply-voltage-adapted voltage-level converter, and the virtual-supply-voltage-adapted voltage-level converter keeps its own virtual-supply-node voltage at the system supply voltage,
wherein in the third operation phase, the pre-charging control signal input is dis-asserted, the sensing-operation-enabling signal input is asserted, the virtual-supply-voltage-adapted inverter circuit senses and pre-amplifies the data signal input in accordance with data stored in an accessed memory bit-cell of the memory array to generate the pre-amplified signal output, the virtual-supply-voltage-adaption circuit is turned on to link the first virtual-supply node of the virtual-supply-voltage-adapted inverter circuit and the third virtual-supply node of the virtual-supply-voltage-adapted voltage-level converter, and the virtual-supply-voltage-adapted voltage-level converter adapts its own virtual-supply-node voltage in accordance with the data signal input and the data stored in the accessed memory bit-cell and senses and amplifies the pre-amplified signal output from the virtual-supply-voltage-adapted inverter circuit to generate the final amplified signal output.

US Pat. No. 10,971,195

CAVITY SEAL AND MOISTURE CONTROL

Seagate Technology LLC, ...

1. An apparatus comprising:a chamber;
a desiccant material contained within the chamber;
a gas channel extending from a first end adjacent the chamber to a second end;
at the first end of the gas channel, a first membrane configured and arranged to facilitate permeation of moisture-laden gas to and from the chamber;
at the second end of the gas channel, a second membrane configured and arranged to facilitate permeation of moisture-laden gas into and out of the gas channel for controlling humidity within an enclosure environment; and
a seal configured and arranged with the first and second membranes to:
in a first state, provide a seal in the gas channel that prevents the permeation of gas between the chamber and the enclosure environment, and
in a second state in which the seal is punctured, permit the permeation of gas between the chamber and the enclosure environment, via the respective first and second membranes.

US Pat. No. 10,971,194

DATA STORAGE LIBRARY WITH MEDIA ACCLIMATION DEVICE AND METHODS OF ACCLIMATING DATA STORAGE MEDIA

International Business Ma...

1. A data storage library for the handling of a plurality of data storage cartridges, the data storage library comprising:at least one library frame enclosure, the at least one library frame enclosure configured to receive one or more data storage cartridges;
at least one environmental conditioning unit for conditioning the internal environment conditions within the interior of the at least one library frame enclosure to be different than the environmental conditions exterior of the at least one library frame enclosure; and
at least one media acclimation device having an interior comprising one or more storage locations to receive the one or more data storage cartridges therein, and further wherein the at least one media acclimation device is configured to gradually acclimate the one or more storage locations from one or more external environmental conditions to one or more internal environmental conditions,
wherein the data storage library is configured to:
determine if the at least one environmental condition within the interior of the at least one media acclimation device meets a predetermined threshold; and
remove the data storage cartridge from the at least one media acclimation device in response to the at least one condition within the interior of the at least one media acclimation device meeting the predetermined threshold.

US Pat. No. 10,971,193

BASE UNIT AND OPTICAL DISK DEVICE

SONY SEMICONDUCTOR SOLUTI...

1. A base unit, comprising:a base unit chassis that supports a spindle motor;
a heat dissipation member configured to dissipate heat generated from a stator core of the spindle motor to a non-disk mounting side of the base unit chassis, wherein
the heat dissipation member is on a lower surface of the base unit chassis,
the heat dissipation member is in contact with the stator core of the spindle motor to dissipate the heat of the stator core to the lower surface of the base unit chassis, and
the lower surface of the base unit chassis is the non-disk mounting side of the base unit chassis; and
a bearing housing configured to suppress transfer of the generated heat from the stator core to a bearing of the spindle motor, wherein the bearing housing is between the bearing of the spindle motor and the stator core of the spindle motor.

US Pat. No. 10,971,192

METHODS AND SYSTEMS FOR DETECTION OF ANOMALOUS MOTION IN A VIDEO STREAM AND FOR CREATING A VIDEO SUMMARY

Genetec Inc.

1. A computer-implemented method, comprising:obtaining motion indicators for a plurality of samples of a video stream;
obtaining an anomaly state for a given time window of a plurality of time windows of the video stream, each of the time windows spanning a subset of the samples, by:
obtaining estimated statistical parameters for the given time window based on measured statistical parameters characterizing the motion indicators for the samples in at least one time window of the video stream that precedes the given time window; and
determining the anomaly state for the given time window based on the plurality of motion indicators obtained for the samples in the given time window and the estimated statistical parameters; and
processing the video stream based on the anomaly state for various ones of the time windows.

US Pat. No. 10,971,191

COORDINATED AUDIOVISUAL MONTAGE FROM SELECTED CROWD-SOURCED CONTENT WITH ALIGNMENT TO AUDIO BASELINE

1. A method comprising:capturing vocal audio and performance synchronized video using a karaoke application executable on a portable computing device;
retrieving computer readable encodings of audiovisual clips, wherein at least some of the retrieved audiovisual clips constitute a crowd-sourced candidate set and are sourced from one or more social media content repositories, and wherein at least one of the retrieved audiovisual clips includes audiovisual content captured in a karaoke vocal capture session using the karaoke application;
computationally evaluating correspondence of audio content of individual ones of the retrieved audiovisual clips with an audio baseline, the correspondence evaluation identifying a subset of the retrieved audiovisual clips for which the audio content thereof matches at least a portion of the audio baseline;
for the retrieved audiovisual clips of the identified subset, computationally determining a temporal alignment with the audio baseline and, based on the determined temporal alignments, assigning individual ones of the retrieved audiovisual clips to positions along a timeline of the audio baseline, wherein at least some of the determined temporal alignments are based on visual features computationally extracted from, and temporally localizable in, video content of respective ones of the retrieved audiovisual clips to align with a computationally determined beat of the audio baseline, wherein at least one of the retrieved audiovisual clips has multiple determined temporal alignments, and wherein a tag associated with the retrieved audiovisual clips includes an alphanumeric hashtag; and
rendering video content of the temporally-aligned audiovisual clips together with the audio baseline to produce a coordinated audiovisual work.

US Pat. No. 10,971,190

SYNTHESIZING A PRESENTATION FROM MULTIPLE MEDIA CLIPS

Gracenote, Inc., Emeryvi...

1. A system comprising:a processor-implemented media ingestion module configured to access a plurality of media clips including a first video clip and a second video clip;
a media analysis module configured to:
match a first fingerprint of at least a part of the first video clip with a second fingerprint of at least a part of the second video clip;
match a first event location of at least a part of the first video clip with a second event location of at least a part of the second video clip; and
determine an overlap of the first video clip with the second video clip based at least in part on the match of the first fingerprint of at least the part of the first video clip with the second fingerprint of at least the part of the second video clip and the match of the first event location of at least the part of the first video clip with the second event location of at least the part of the second video clip; and
a content creation module configured to:
merge the first video clip and the second video clip into a group of overlapping video clips based on the overlap of the first video clip with the second video clip; and
synthesize the group of overlapping video clips into a video presentation.

US Pat. No. 10,971,189

SPECIAL EFFECT SYNCHRONIZATION METHOD AND APPARATUS, AND MOBILE TERMINAL

BEJING DAJIA INTERNET INF...

1. A special effect synchronization method, comprising:in response to receiving a confirmation operation from a user for selecting music for a specified video file, downloading a music file selected by the user and a rhythm information file corresponding to the music file from a server, wherein the rhythm information file comprises timestamps corresponding to rhythm points of the music file;
in response to playing the specified video file, playing the music file and adding a special effect in the specified video file based on the rhythm information file;
in response to a determination that playback of the specified video file has ended, generating a synthesized file by synthesizing the specified video file, the music file, and the special effect; and
storing the synthesized file.

US Pat. No. 10,971,188

APPARATUS AND METHOD FOR EDITING CONTENT

Samsung Electronics Co., ...

1. A method of an electronic device for creating a cartoon strip image, the method comprising:acquiring moving image content via a camera of the electronic device;
storing the moving image content in a memory of the electronic device;
identifying a plurality of still images from the moving image content, based at least on analyzing features related to eyes of a subject appearing in the moving image content, the analyzing comprising determining whether the eyes of the subject are open;
generating a cartoon strip using the identified still images;
identifying a speech balloon and text to be included in the speech balloon, wherein the identifying of the speech balloon comprises selecting a speech balloon shape from among a plurality of speech balloon shapes pre-stored in the memory of the electronic device;
inserting the text into the speech balloon having the selected speech balloon shape;
combining the cartoon strip and the speech balloon with the inserted text to create a cartoon strip image; and
storing the cartoon strip image in the memory of the electronic device,
wherein the method further comprises identifying a facial expression of the subject appearing in the moving image content, and
wherein the selecting of the speech balloon shape comprises selecting the speech balloon shape corresponding to the identified facial expression of the subject from among the pre-stored plurality of speech balloon shapes.

US Pat. No. 10,971,187

CONSTANT-DENSITY WRITING FOR MAGNETIC STORAGE MEDIA

Marvell Asia PTE, Ltd., ...

1. A method for constant-density writing to magnetic storage media, the method comprising:accepting write data from a host, the write data having an initial bit period associated with a period of a clock signal, the period of the clock signal being fixed according to an angular velocity of a disk of the magnetic storage media;
determining respective bit periods for ones of multiple concentric tracks of a disk of magnetic storage media, each bit period of the respective bit periods associated with a particular concentric track of the multiple concentric tracks, the respective bit periods representing periods of time that vary based on respective radiuses of the multiple concentric tracks; the respective bit periods being configured to maintain a particular bit density across the multiple concentric tracks;
selecting, for the write data, a concentric track from among the multiple concentric tracks, the concentric track being associated with a bit period of the respective bit periods;
prior to writing along the concentric track, generating phase-delayed write data by delaying transitions between bits of the write data according to the bit period associated with the concentric track, the delaying of the transitions being effective to cause bits of the phase-delayed write data to have the bit period associated with the concentric track, the bit period associated with the concentric track being different than the initial bit period associated with the clock signal; and
writing the bits of the phase-delayed write data along the concentric track such that the concentric track has the particular bit density.

US Pat. No. 10,971,186

CARTRIDGE MEMORY, RECORDING MEDIUM CARTRIDGE, AND METHOD OF PRODUCING THE SAME

Sony Corporation, Tokyo ...

1. A cartridge memory for a recording medium cartridge, comprising:a memory unit that has a memory capacity capable of storing management information relating to a second information recording medium configured to be capable of recording information with a second data track number larger than a first data track number; and
a capacity setting unit configured to be capable of setting, to the memory unit, a data storage area limited to a first capacity capable of storing management information relating to a first information recording medium configured to be capable of recording information with the first data track number.

US Pat. No. 10,971,185

MANAGEMENT OF MEDIA CONTENT PLAYBACK

Sonos, Inc., Santa Barba...

1. A method to be performed by a computing system, the method comprising:receiving, via a network interface, an instruction to queue a container of first audio tracks into a queue for playback by a playback device of a media playback system, wherein the container of first audio tracks consists of: (a) an album, (b) a playlist, or (c) an internet radio station, and wherein the queue comprises one or more second audio tracks that were added to the queue individually;
while the playback device is playing back the queue via one or more speakers and before each first audio track of the container is played back, determining whether the respective first audio track is associated with a negative preference;
when the respective first audio track is associated with the negative preference, advancing playback over the respective first audio track to a next audio track within the queue; and
when a given audio track in the queue was individually added to the queue, playing back the given audio track regardless of whether any negative preference is associated with the given audio track.

US Pat. No. 10,971,184

DUAL DRIVE TAPE EMBEDDED SYSTEM

Western Digital Technolog...

1. A storage system comprising:a first tape storage device comprising:
a first enclosure;
a first head assembly;
a first actuator for actuating the first head assembly over tape media; and
a first connector formed on a first back surface of the first enclosure, the first connector electrically coupled to at least one component of the first tape storage device;
a second tape storage device comprising:
a second enclosure;
a second head assembly;
a second actuator for actuating the second head assembly over tape media; and
a second connector formed on a second back surface of the second enclosure, the second connector electrically coupled to at least one component of the second tape storage device; and
a printed circuit board assembly (PCBA) comprising:
a first side having a first mating connector configured to connect to the first connector for the first tape storage device;
a second side opposite the first side, the second side having a second mating connector configured to connect to the second connector for the second tape storage device; and
a controller configured to control activation of the first actuator of the first tape storage device and the second actuator of the second tape storage device;
wherein the first tape storage device is coupled back-to-back with the second tape storage device, with the PCBA between first tape storage device and the second tape storage device.

US Pat. No. 10,971,183

DIELECTRIC LAYER, OPTICAL RECORDING MEDIUM, SPUTTERING TARGET AND OXIDE

Kobe Steel, Ltd., Kobe (...

1. A dielectric layer for directly overlaying on a recording layer for recording carried out by irradiation with light,wherein
the dielectric layer is formed from an oxide consisting of a Sn element and at least one element selected from the group consisting of a Zn element, a Zr element, a Si element and a Ga element, and
the dielectric layer satisfies the following conditions (1) to (7), wherein a content of the Sn element is a mol %, a content of the Zn element is b mol %, a content of the Zr element is c mol %, a content of the Si element is d mol %, and a content of the Ga element is e mol %, with respect to a total of elements other than oxygen in the oxide:
0?b/(a+b)?0.6  (1),
0?(c+d)/(a+b+c+d+e)?0.5  (2),
0?b?50  (3),
0?c?40  (4),
0?d?45  (5),
0?e?40  (6), and
20?b+c+d+e?80  (7).

US Pat. No. 10,971,181

SPUTTERING TARGET FOR MAGNETIC RECORDING MEDIA

TANAKA KIKINZOKU KOGYO K....

1. A sputtering target for magnetic recording media comprising metallic Pt and an oxide, with the balance being metallic Co and inevitable impurities, whereinthe metallic Co is contained in a range of 70 at % or more and 90 at % or less and the metallic Pt is contained in a range of 10 at % or more and 30 at % or less relative to a total of metallic components in the sputtering target for magnetic recording media,
the oxide is contained in a range of 26 vol % or more and 40 vol % or less relative to a total volume of the sputtering target for magnetic recording media, and
the oxide is composed of B2O3 and one or more high-melting-point oxides having a melting point of 1470° C. or higher and 2800° C. or lower.

US Pat. No. 10,971,180

METHODS OF FORMING NEAR FIELD TRANSDUCERS AND NEAR FIELD TRANSDUCERS FORMED THEREBY

Seagate Technology LLC, ...

1. A method of forming a near field transducer (NFT), the method comprising the steps of:depositing a primary material;
implanting a secondary element into the primary material, wherein both the primary material and the secondary element are chosen such that the primary material is densified via implantation of the secondary element; and
depositing a second portion of the primary material onto the densified primary material,
wherein the primary material and the secondary element are the same and are selected from gold, copper, rhodium, and aluminum.

US Pat. No. 10,971,179

COMPACT MODE CONVERTER HAVING FIRST AND SECOND STRAIGHT PORTIONS FOR A HEAT-ASSISTED MAGNETIC RECORDING DEVICE

Seagate Technology LLC, ...

1. A write head comprising:an input coupler configured to receive light excited by a light source;
a waveguide core configured to receive light from the input coupler at a fundamental transverse electric (TE00) mode, the waveguide core comprising:
a first straight portion;
a mode converter portion comprising a branched portion extending from the first straight portion, the mode converter portion configured to convert the light to a higher-order (TE10) mode, the mode converter portion spaced apart from the input coupler, the branched portion separated from at least a part of the first straight portion by a gap having a substantially constant cross-sectional width along an entire length of the gap; and
a second straight portion between the mode converter portion and a media-facing surface; and
a near-field transducer at the media-facing surface, the near-field transducer receiving the light at the TE10 mode from the waveguide and directing surface plasmons to a recording medium in response thereto.

US Pat. No. 10,971,178

VERTICALLY TRANSLATING LOAD/UNLOAD RAMP MECHANISM FOR COLD STORAGE DATA STORAGE DEVICE

Western Digital Technolog...

1. A method for vertically translating a load/unload (LUL) ramp mechanism in a hard disk drive (HDD) to provide access to each of a plurality of recording disks, the method comprising:driving a stepper motor to rotate a lead screw coupled to the stepper motor; and
allowing a LUL ramp mechanism that is coupled with the lead screw to translate vertically in response to rotating the lead screw, wherein allowing the LUL ramp mechanism to translate comprises: providing one or more guide rails configured to interface with a respective corresponding interface of the LUL ramp mechanism; providing a first interface constituent to a latch link component of the LUL ramp mechanism, wherein the first interface is positioned around a first guide rail of the one or more guide rails.

US Pat. No. 10,971,177

HEAT-ASSISTED MAGNETIC RECORDING DEVICE WITH MULTIPLE WRITERS THAT WRITE TO THE SAME DISK SURFACE AT DIFFERENT TIME PERIODS

Seagate Technology LLC, ...

1. A method, comprising:writing to a surface of a magnetic disk using a first heat-assisted magnetic recording (HAMR) writer during an initial time period, a second HAMR writer configured to write to the surface but not during the initial time period, the initial time period extending from a first time when the disk drive is first used to a second time when a near-field transducer of the first HAMR writer reaches a first wear threshold; and
during a subsequent time period after the initial time period, writing to the surface of the disk using the second HAMR writer and not the first HAMR writer.

US Pat. No. 10,971,176

TUNNEL MAGNETORESISTIVE SENSOR WITH ADJACENT GAP HAVING CHROMIUM ALLOY SEED LAYER AND REFRACTORY MATERIAL LAYER

International Business Ma...

1. An apparatus, comprising:a sensor having an active tunnel magnetoresistive region, magnetic shields flanking the active tunnel magnetoresistive region, and gaps between the active tunnel magnetoresistive region and the magnetic shields,
wherein the active tunnel magnetoresistive region includes a free layer, a tunnel barrier layer and a reference layer,
wherein at least one of the gaps includes a first seed layer of a chromium alloy and an electrically conductive layer having a first refractory material formed on the first seed layer; and
a layer of a second refractory material above an upper one of the magnetic shields and/or below a lower one of the magnetic shields formed on a second seed layer of a chromium alloy.

US Pat. No. 10,971,175

STORAGE ELEMENT

Sony Corporation, Tokyo ...

1. A storage element comprising:a layer structure including
a first layer having a first magnetization state;
a second layer having a second magnetization state; and
a third layer provided between the first layer and the second layer,
wherein the second layer includes at least a first magnetic layer, a second magnetic layer, and a non-magnetic layer, and the non-magnetic layer is provided between the first magnetic layer and the second magnetic layer,
wherein the first magnetic layer contacts the third layer, and
wherein the first layer contacts the third layer and has a magnetization substantially perpendicular to a surface of the first layer.

US Pat. No. 10,971,174

INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND NON-TRANSITORY COMPUTER READABLE RECORDING MEDIUM

OLYMPUS CORPORATION, Tok...

19. An information processing method, comprising:displaying a correction image in which a coordinate position of each of a plurality of observation points is set;
generating gaze data by continuously detecting a gaze of a user;
generating voice data associated with a time axis identical to that of the gaze data by receiving input of a voice of the user;
analyzing an attention period in which an attention degree of the gaze of the user with respect to each of the plurality of observation points is greater than or equal to a predetermined value, on the basis of the generated gaze data;
setting a time when the voice is pronounced with respect to the voice data as an important voice period, on the basis of correction voice data recorded in a first memory that records the correction voice data in which a voice to be pronounced at each of the plurality of observation points of the correction image is set; and
generating a time lag between the attention period and the important voice period as calibration data of the user to be recorded in a second memory.

US Pat. No. 10,971,173

SIGNAL PROCESSING COORDINATION AMONG DIGITAL VOICE ASSISTANT COMPUTING DEVICES

GOOGLE LLC, Mountain Vie...

1. A system to coordinate signal processing among computing devices in a voice-driven computing environment, comprising:a data processing system comprising one or more processors and memory to execute an orchestrator component and a direct action application programming interface (“API”);
a digital assistant computing device operational to control a plurality of network connected devices;
the digital assistant computing device to detect, via a sensor, an input audio signal;
a signal quality checker of the digital assistant computing device to determine that the input audio signal detected by the sensor of the digital assistant computing device satisfies a signal processing threshold, generate data packets based on the input audio signal, and transmit the data packets to the data processing system;
the orchestrator component of the data processing system to:
receive, from the digital assistant computing device, the data packets generated based on the input audio signal;
identify a characteristic of the input audio signal based on an amplitude of the input audio signal;
determine, based on the characteristic of the input audio signal based on the amplitude of the input audio signal, a distance threshold between the digital assistant computing device and the plurality of network connected devices to use to select at least one of the plurality of network connected devices, and a number of network connected devices to select;
select, based on the number of network connected devices to select and a distance between the plurality of network connected devices and the digital assistant computing device less than or equal to the distance threshold selected based on the characteristic of the input audio signal based on the amplitude of the input audio signal, one or more network connected devices from the plurality of network connected devices to which to transmit an action data structure generated responsive to the input audio signal for execution by the selected network connected device;
the direct action API to:
receive an indication of the one or more network connected devices selected by the orchestrator component based on the number of network connected devices and the distance threshold determined from the characteristic of the input audio signal based on the amplitude of the input audio signal;
generate, for the one or more network connected devices, the action data structure based on the data packets generated by the digital assistant computing device; and
transmit the action data structure to the one or more network connected devices to control the one or more network connected devices and cause execution of the action data structure by the one or more network connected devices.

US Pat. No. 10,971,172

AUDIO STEM IDENTIFICATION SYSTEMS AND METHODS

Spotify AB, Stockholm (S...

1. A method of identifying at least one audio content item among a plurality of target audio content items, comprising:determining a target acoustic feature vector of each of the plurality of target audio content items in a first vector space;
mapping each target acoustic feature vector from the first vector space to a second vector space, wherein the second vector space has a lower dimension than the first vector space;
determining a query acoustic feature vector of a query audio content item in the second vector space;
comparing the query acoustic feature vector and the plurality of target acoustic feature vectors in the second vector space;
identifying, based on the comparison, at least one audio content item in the plurality of target audio content items that is related to the query audio content item; and
wherein each audio content item comprises a subset of a plurality of music stems comprised in a music track.

US Pat. No. 10,971,171

SMARTPHONE-BASED METHODS AND SYSTEMS

Digimarc Corporation, Be...

1. A method comprising the acts:receiving audio content using a microphone of a user's portable device;
receiving image content using a camera of said device;
recognition-processing both the received audio and image content without a user being required to operate a user interface control to switch between an audio recognition mode and an image recognition mode;
presenting a first user interface that presents identification data for both recognized audio and image content in a common screen display area in a single listing, ordered by time of recognition, wherein identification data for recognized audio content is intermixed with identification data for recognized image content in dependence on respective times such content was recognized;
responsive to recognition of an item of audio content, displaying a first visual indicia related thereto in said common screen display area, the first indicia being selectable by the user to launch an online payoff related to the recognized audio content, said recognizing being performed by a hardware processor configured to perform such act; and
responsive to recognition of an item of image content, displaying a second visual indicia related thereto in said common screen display area, the second indicia being selectable by the user to launch an online payoff related to the recognized image content;
wherein the first user interface simultaneously displays notifications about both image content and audio content recognized by the portable device;
the method further including: making an inference, based on context data, including data from an orientation and/or motion sensor, and not based on an express audio/visual mode switching instruction received through a graphical user interface, that the user wishes to no longer discover audio content but instead wishes to discover image content exclusively, and as a consequence of such inference switching to a second user interface adapted to discovery of image rather than audio content, receiving other image content, and in response to recognition of the other image content launching an online payoff related to the recognized other image content without waiting for user action, wherein said inference based on said context data causes the device to switch from the first user interface, which requires user action to launch online payoffs for recognized image content, to the second user interface, which launches online payoffs for recognized image content without waiting for user action; said first and second user interfaces both comprising a stack of tiles that grow with recognition of additional items of content, said growing stack of tiles being software-pushed down off-screen as necessary to preserve a viewfinder window enabling the user to aim the device to frame an intended object for visual discovery.

US Pat. No. 10,971,170

SYNTHESIZING SPEECH FROM TEXT USING NEURAL NETWORKS

Google LLC, Mountain Vie...

1. A method for generating, from an input character sequence, an output sequence of audio data representing the input character sequence, wherein the output sequence of audio data comprises a respective audio output sample for each of a plurality of time steps, and wherein the method comprises, for each of the plurality of time steps:generating a mel-frequency spectrogram for the time step by processing a representation of a respective portion of the input character sequence using a decoder neural network, wherein the decoder neural network is an autoregressive neural network comprising an LSTM subnetwork, a linear transform, and a convolutional subnetwork;
generating a probability distribution over a plurality of possible audio output samples for the time step by processing the mel-frequency spectrogram for the time step using a vocoder neural network; and
selecting the audio output sample for the time step from the plurality of possible audio output samples in accordance with the probability distribution.

US Pat. No. 10,971,169

SOUND SIGNAL PROCESSING DEVICE

Audio-Technica Corporatio...

1. A sound signal processing device comprising:an input part to which a signal from a microphone is input;
an input signal determination part that determines whether an input signal from the input part is present;
a noise detection part that detects noise included in the input signal from the input part;
an output part that outputs the input signal as an output signal;
an output switching part that performs switching between an output state in which the output part outputs the output signal and a non-output state in which the output part does not output the output signal; and
a control part that controls the switching performed by the output switching part, wherein
a control of the switching by the control part includes; a first control that controls the switching based on a determination result from the input signal determination part and a detection result from the noise detection part; and a second control that controls the switching based on the determination result from the input signal determination part, and
one of the first control and the second control is selected based on a state of the output switching part.

US Pat. No. 10,971,168

DYNAMIC COMMUNICATION SESSION FILTERING

International Business Ma...

1. A computer-implemented method comprising:detecting, by a processor, spoken content from a first user and a second user of a plurality of users within a communication session over a network;
extracting, by the processor, speech features from the detected spoken content;
identifying, by the processor, the first user and the second user based on the extracted speech features;
filtering, by the processor, the spoken content of the first user and second user according to preferences determined from profiles of the plurality of users;
transmitting, by the processor, the filtered spoken content of the first user and the second user to the plurality of users in a preferred format based on the preferences from the profiles;
detecting, by the processor, a disturbance from one or more communication devices used during the communication session, wherein the disturbance is an intermittent video signal that produces low video signal data;
comparing, by the processor, data generated from the disturbance to a minimum video signal data threshold;
determining, by the processor and in response to the disturbance meeting the data threshold, patterns of historical filtering selections in response to a similar disturbance; and
modifying, by the processor and in response to the disturbance matching the similar disturbance, the filtering of the communication session according to the historical filtering selections, wherein the historical filtering selection is transcribing the spoken content coming from the one or more communication devices as captions in conjunction with the video signal.

US Pat. No. 10,971,167

PERSONAL AUDIO ASSISTANT DEVICE AND METHOD

Staton Techiya, LLC, Lig...

1. A personal audio assistant, comprising:a first microphone for capturing audio;
a logic circuit coupled to the first microphone for analyzing the captured audio;
a communication module coupled to the logic circuit; and
a user interaction element, wherein the user interaction element is configured to control invoking an operation of an electronic device communicatively coupled to the personal audio assistant in response to instructions received based on a remote analysis performed by a remote server of voice commands captured in the captured audio,
wherein the user interaction element, upon activation, is configured to transmit a command to the logic circuit to cause the logic circuit to deliver audio content to a receiver of the personal audio assistant based on a registration parameter read by the logic circuit, wherein the registration parameter is obtained during a registration process,
wherein a first auditory warning is emitted by the personal audio assistant when a counter value specified by the registration parameter is greater than or equal to an allowed number of times that the audio content can be played,
wherein a second auditory warning is emitted by the personal audio assistant and includes a notification indicating when a plurality of compatible transmissions associated with the audio content become available, wherein the second auditory warning is emitted after scanning for the available plurality of compatible transmissions provided by other compliant devices as the other compliant devices come within range of the personal audio assistant,
wherein sharing of the available plurality of compatible transmissions associated with the audio content between the other compliant devices and the personal audio assistant IS facilitated based on switching occurring between the other compliant devices and the personal audio assistant;
wherein, during the registration process, a head-related transfer function acquisition process is utilized to enable a user to select an optimal audio listening experience associated with the audio content from a number of candidate audio listening experiences based on a spatial quality perceived in an auditory test signal processed via the head-related transfer function acquisition process,
and wherein the user interaction element is configured to perform at least one among:
invoking execution of a commercial transaction;
scanning Bluetooth enabled audio playback
systems; invoking access to information on a
network; invoking delivery of the audio content;
invoking delivery of text to speech; invoking
delivery of speech to speech; invoking
speech to text processing of email; invoking
delivery of marketing messages;
invoking delivery of text to speech of stock market information;
invoking delivery of time and date information;
invoking delivery of calendaring information;
invoking delivery of medication reminders; or
invoking access to location information using a GPS system.

US Pat. No. 10,971,166

LOW LATENCY AUDIO DISTRIBUTION

BOSE CORPORATION, Framin...

1. A method comprising:receiving data in a first series of blocks each having a first number of audio samples;
repackaging the data into a second series of blocks each having a second number of audio samples, wherein the second number of audio samples is a non-integer fraction of the first number of audio samples;
transmitting the second series of blocks over a series of fixed duration time intervals, wherein at least one block of the second series of blocks is transmitted prior to a portion of the first number of audio samples being repackaged into the second series of blocks; and
adjusting a payload size of a first time interval relative to a payload size of a second time interval to reduce jitter in the transmission of the second series of blocks, the first and second time intervals being sequenced consecutively in the series of fixed duration time intervals.

US Pat. No. 10,971,165

METHOD AND APPARATUS FOR SINUSOIDAL ENCODING AND DECODING

Huawei Technologies Co., ...

1. An audio signal encoding method for stereo or multichannel encoding performed by an encoder, the method comprising:collecting audio signal samples;
determining sinusoidal components in multiple frames of the audio signal samples;
estimating amplitudes and frequencies of the sinusoidal components for each of the multiple frames; and
merging pairs of amplitudes and frequencies into sinusoidal trajectories of channels,
wherein the sinusoidal trajectories of channels are grouped to obtain at least two groups, and
wherein the presence of sinusoidal trajectories in channels of each group is signaled in a header of a bitstream.

US Pat. No. 10,971,164

MODEL BASED PREDICTION IN A CRITICALLY SAMPLED FILTERBANK

Dolby International AB, ...

1. A method, performed by an audio signal processing device, for determining an estimate of a sample of a subband signal from two or more previous samples of the subband signal, wherein the subband signal corresponds to a subband having an index p of a plurality of subbands of a subband-domain representation of an audio signal, the method comprisingdetermining signal model data comprising a model parameter;
determining a first prediction coefficient to be applied to a first previous sample of the subband signal; wherein the first prediction coefficient is determined in response to the model parameter using a first lookup table and/or a first analytical function;
determining a second prediction coefficient to be applied to a second previous sample of the subband signal; wherein a time slot of the second previous sample immediately precedes a time slot of the first previous sample; wherein the second prediction coefficient is determined in response to the model parameter using a second lookup table and/or a second analytical function; and
determining the estimate of the sample by applying the first prediction coefficient to the first previous sample and by applying the second prediction coefficient to the second previous sample;
wherein the absolute value of the first prediction coefficient is independent of the subband index p, and the method is implemented, at least in part, by one or more processors of the audio signal processing device.

US Pat. No. 10,971,163

RECONSTRUCTION OF AUDIO SCENES FROM A DOWNMIX

Dolby International AB, ...

1. A method for reconstructing a time frame of an audio scene with at least a plurality of N audio signals from a bitstream, the method comprising:extracting, from the bitstream, for each of the N audio signals, positional metadata associated with each audio signal, wherein N>1;
decoding a downmix signal from the bitstream, the downmix signal comprising M downmix channels, wherein M>1 and each downmix channel is associated with a spatial locator of a plurality of spatial locators; and
reconstructing at least one of the N audio signals as an inner product of a plurality of correlation coefficients and the downmix signal, wherein the plurality of correlation coefficients is computed based on the positional metadata for the N audio signals and the plurality of spatial locators of the M downmix channels.

US Pat. No. 10,971,162

METHOD AND DEVICE FOR DECODING SIGNAL

HUAWEI TECHNOLOGIES CO., ...

1. A method for decoding an audio signal, comprising:obtaining, by a decoder, an average quantity of allocated bits per spectral coefficient of a sub-band of a current frame of the audio signal, wherein the sub-band includes a plurality of spectral coefficients;
obtaining, by the decoder, a noise filling gain for the sub-band when the average quantity of allocated bits per spectral coefficient is less than a classification threshold;
reconstructing, by the decoder and according to the noise filling gain, at least some of the plurality of spectral coefficients to generate reconstructed spectral coefficients;
obtaining, by the decoder, a frequency domain signal according to the reconstructed spectral coefficients; and
generating a time domain signal based on the frequency domain signal.

US Pat. No. 10,971,161

TECHNIQUES FOR LOSS MITIGATION OF AUDIO STREAMS

Amazon Technologies, Inc....

1. A computer-implemented method, comprising:obtaining access to a real-time audio source;
determining a sampling rate for encoding the audio source;
sampling the audio source according to the sampling rate to identify a plurality of samples of the audio source;
encoding the plurality of samples to generate a first audio output stream;
encoding each sample of the plurality of samples to collectively generate a second audio output stream, wherein the fidelity of the second audio output stream is less than the fidelity of the first audio output stream; and
concurrently transmitting both the first audio output stream and the second audio output stream to a computing entity over a network according to a protocol wherein the computing entity, based on detecting loss of a portion of the first audio output stream, is able to utilize one or more samples of the second audio output stream in place of the portion of the first audio output stream.

US Pat. No. 10,971,160

METHODS AND SYSTEMS FOR DETERMINING A WAKE WORD

Comcast Cable Communicati...

1. A method comprising:determining, by a user device, that audio content comprises one or more words;
determining, based on one or more voice characteristics associated with the audio content, that the audio content is associated with an authorized user;
determining, based on the audio content being associated with the authorized user, to use a low wake word threshold;
determining, based on the low wake word threshold, that at least a portion of the one or more words correspond to a wake word or phrase; and
executing, based on determining that the at least the portion of the one or more words correspond to the wake word or phrase, one or more operational commands associated with the audio content.

US Pat. No. 10,971,159

CROSS ACCOUNT ACCESS FOR A VIRTUAL PERSONAL ASSISTANT VIA VOICE PRINTING

salesforce.com, inc., Sa...

1. A method for accessing a virtual personal assistant, comprising:establishing a trust relationship between a primary smart speaker device that allows a user to access the virtual personal assistant with voice commands and a secondary smart speaker device that is separate from the primary smart device, where the trust relationship is established by,
generating a request at the secondary smart speaker device to allow the secondary smart speaker device to access the virtual personal assistant, where the request includes voice print authentication information from the user, and
validating the request at the primary smart speaker device to confirm the authenticity of the request;
receiving a voice input from the user at the secondary smart speaker device, where the voice input is a request for accessing the virtual personal assistant;
verifying the identity of the user using voice print identification with the secondary smart speaker device; and
granting access for the user to the virtual personal assistant using the secondary smart speaker device, where access to the virtual personal assistant using the secondary smart speaker device is limited based on the degree of certainty of the identity of the user and based on a limit on e-commerce purchase amounts.

US Pat. No. 10,971,158

DESIGNATING ASSISTANTS IN MULTI-ASSISTANT ENVIRONMENT BASED ON IDENTIFIED WAKE WORD RECEIVED FROM A USER

Facebook, Inc., Menlo Pa...

1. A method for invoking an assistant of a plurality of assistants on a client device, the method comprising:capturing, by an audio capture device of the client device, a wake word associated with a service request;
sending, by a central authority of the client device, the received wake word to each of a plurality of wake word engines in parallel, each wake word engine associated with a particular wake word and an assistant of the plurality of assistants;
receiving, by the central authority, a signal from a selected wake word engine, the selected wake word engine associated with the received wake word, the signal indicating that an assistant associated with the selected wake word engine has been selected by the user;
responsive to receiving the signal from the selected wake word engine, transmitting, by the central authority, a signal that blocks a remainder of the plurality of wake word engines other than the selected wake word engine from receiving one or more additional wake words;
sending the service request from the central authority to the assistant associated with the selected wake word engine;
transmitting, by the central authority, a signal that unblocks each of the remainder of the plurality of wake word engines from receiving the one or more additional wake words in response to determining the selected wake word engine has received the service request;
identifying the user of the client device;
predicting, by the central authority, an assistant of the plurality of assistants that the identified user will most likely request for services, the predicting based on a historical interaction;
initializing, by the central authority, the predicted assistant, the initializing comprising sending a predicted wake word to a wake word engine associated with the predicted assistant;
transmitting, by the central authority, a signal that blocks a remainder of the plurality of wake word engines from receiving one or more additional wake words;
comparing, by the central authority, the received wake word to the predicted wake word, the comparing comprising analyzing the received wake word to identify a match between the received wake word and the predicted wake word; and
responsive to identifying a match between the received wake word and the predicted wake word:
sending, by the central authority, the service request to the predicted assistant.

US Pat. No. 10,971,157

METHODS AND APPARATUS FOR HYBRID SPEECH RECOGNITION PROCESSING

Nuance Communications, In...

12. A method for use in a hybrid speech processing system comprising a mobile electronic device and a network-connected server remotely located from the mobile electronic device, the method comprising:processing, by an embedded speech recognizer on the mobile electronic device and configured to perform speech recognition in a first language, at least a portion of input audio to produce recognized text;
determining, by a controller, whether to send information from the mobile electronic device to the server for speech processing, wherein the information includes the at least a portion of the input audio and/or at least a portion of the recognized text, wherein:
the determination of whether to send the information to the server for speech processing is based, at least in part, on a semantic category associated with the recognized text or on an analysis of the recognized text, the analysis of the recognized text comprising:
detecting at least one language that the speech may include based at least in part on the analysis of the recognized text,
determining whether the detected at least one language includes a second language different from the first language for which the embedded speech recognizer is configured to perform speech recognition, and
in response to determining that the detected at least one language includes the second language different from the first language for which the embedded speech recognizer is configured to perform speech recognition, determining to send at least a portion of the speech to the server; and
sending the information from the mobile electronic device to the server in response to determining that the information should be sent to the server.

US Pat. No. 10,971,156

METHOD, INTERACTION DEVICE, SERVER, AND SYSTEM FOR SPEECH RECOGNITION

Huawei Teciinologies Co.,...

1. A speech recognition method performed by a processor, the method comprising:parsing one or more first texts to obtain first target semantics, wherein the one or more first texts is or are obtained through conversion from a first speech signal;
determining, according to the obtained first target semantics, a third-party application object associated with the first target semantics, wherein a third-party application that is associated with the third-party application object is a program that is not authorized to start by speech in a device from its original producer; and
acquiring, from a third-party application registry, the third-party application, and starting the third-party application.

US Pat. No. 10,971,155

AIRCRAFT SYSTEMS AND METHODS FOR MONITORING ONBOARD COMMUNICATIONS

HONEYWELL INTERNATIONAL I...

1. A method of monitoring operation of an aircraft, the method comprising:monitoring, by a processing system onboard the aircraft, an onboard avionics system to detect a change to a functionality of the onboard avionics system from an initial state to a destination state of the onboard avionics system; and
in response to detecting the change to the functionality of the onboard avionics system from the initial state to the destination state:
identifying, by the processing system, a first aircraft operator as a source initiating the change to the functionality of the onboard avionics system;
identifying, by the processing system, a current flight phase of the aircraft;
determining, by the processing system, first required content for an expected callout by the first aircraft operator to the change to the functionality of the onboard avionics system based at least in part on the change from the initial state to the destination state, a designation or role associated with the first aircraft operator initiating the change, and one or more callout rules associated with the current phase of flight and the onboard avionics system, wherein the required content for the expected callout is prescribed by the one or more callout rules for the combination of the change to the functionality and the source of the change;
monitoring, by the processing system, an audio input device coupled to the processing system for the expected callout from the first aircraft operator;
verifying content of at least some of an audio input received via the audio input device matches the required content for the expected callout within a threshold period of time after the functional change associated with the destination state, wherein the threshold period varies based on a significance of the functional change, the onboard avionics system being changed, and the source of the functional change;
generating, by the processing system at an output device coupled to the processing system, a user notification including the first required content in response to an absence of the expected callout from the first aircraft operator when the content of at least some of the audio input fails to match the required content for the expected callout within the threshold period of time after the functional change;
determining, by the processing system, second required content for an expected acknowledgement by a second aircraft operator to the change to the functionality of the onboard avionics system;
monitoring, by the processing system, a second audio input device coupled to the processing system for the expected acknowledgement from the second aircraft operator; and
generating, by the processing system, a second user notification including the second required content in response to an absence of the expected acknowledgement from the second aircraft operator.

US Pat. No. 10,971,154

APPLICATION PROCESSOR INCLUDING LOW POWER VOICE TRIGGER SYSTEM WITH DIRECT PATH FOR BARGE-IN, ELECTRONIC DEVICE INCLUDING THE SAME AND METHOD OF OPERATING THE SAME

SAMSUNG ELECTRONICS CO., ...

1. An application processor comprising:a system bus;
a host processor electrically connected to the system bus;
a voice trigger system electrically connected to the system bus, the voice trigger system configured to perform a voice trigger operation and to issue a trigger event;
an audio subsystem electrically connected to the system bus, the audio subsystem configured to replay an audio output stream through an audio interface; and
a direct bus electrically connecting the voice trigger system to the audio subsystem, the direct bus configured to provide a communication path between the voice trigger system and the audio subsystem during a barge-in condition in which the voice trigger operation and the replay of the audio output stream are performed together,
wherein, while the replay of the audio output stream is performed through the audio interface during the barge-in condition, the application processor is configured to generate compensated trigger data by performing an echo cancellation with respect to microphone data received from a microphone, and the voice trigger system is configured to perform the voice trigger operation based on the compensated trigger data,
wherein the voice trigger system is configured to transfer sample data of a trigger interface audio input signal to the audio subsystem,
wherein the audio subsystem is further configured to:
perform the echo cancellation with respect to the sample data based on the audio output stream to generate compensated sample data, and
transfer the compensated sample data to the voice trigger system,
wherein the voice trigger system is configured to perform the voice trigger operation based on the compensated sample data, and
wherein the compensated sample data is the compensated trigger data.

US Pat. No. 10,971,153

TRANSCRIPTION GENERATION FROM MULTIPLE SPEECH RECOGNITION SYSTEMS

Sorenson IP Holdings, LLC...

1. A method comprising:obtaining first audio data originating at a first device during a communication session between the first device and a second device;
obtaining a first text string that is a transcription of the first audio data, the first text string generated by a first automatic speech recognition system using a first speech recognition model;
obtaining a second text string that is a transcription of second audio data, the second audio data including a revoicing of the first audio data and the second text string generated by a second automatic speech recognition system using a second speech recognition model;
before any part of the first text string and any part of the second text string is provided to the second device, generating an output text string from the first text string and the second text string, the output text string includes one or more first words from the first text string and one or more second words from the second text string such that the output text string does not include an entirety of the first text string or an entirety of the second text string; and
providing the output text string, without providing the first text string and the second text string, to the second device for presentation during the communication session.

US Pat. No. 10,971,152

IMAGING CONTROL METHOD AND APPARATUS, CONTROL DEVICE, AND IMAGING DEVICE

SZ DJI Technology Co., Lt...

1. An imaging control method comprising:acquiring a device identifier identifying an imaging device;
acquiring voice information and performing content identification on the voice information to determine content data of the voice information;
performing information comparison on the content data of the voice information based on the device identifier;
analyzing the voice information to identify control information, in response to a determination that the content data of the voice information includes at least one keyword or key phrase that matches the device identifier;
generating a control command based on the control information; and
transmitting the control command to the imaging device to control the imaging device to capture an image.

US Pat. No. 10,971,151

SYSTEMS, METHODS, AND STORAGE MEDIA FOR PERFORMING ACTIONS IN RESPONSE TO A DETERMINED SPOKEN COMMAND OF A USER

Suki AI, Inc., Redwood C...

10. A method for performing actions in response to a determined spoken command of a user, the method comprising:outputting audio information representing sounds within audible range of a mobile client computing platform in an ongoing manner;
sending and receiving information wirelessly through a network;
causing the audio information to be wirelessly transmitted over a network via the wireless transmitter;
receiving the audio information transmitted from the mobile client computing platform;
performing speech recognition on the audio information to identify any spoken instances of a predetermined keyword present in the sounds represented by the audio information;
responsive to identification of a spoken instance of the predetermined keyword present in the sounds represented by the audio information, identifying a spoken command in speech temporally adjacent to the spoken instance of the predetermined keyword that is present in the sounds represented by the audio information; and
effectuating transmission of instructions corresponding to the spoken command to the wireless transmitter of the mobile client computing platform to cause the mobile client computing platform to execute the spoken command.

US Pat. No. 10,971,150

SPEECH INPUT DEVICE AND REMOTE INTERACTION SYSTEM

SHARP KABUSHIKI KAISHA, ...

1. A speech input device comprising:a speech input transducer that inputs first speech;
a first communicator that is provided with at least one of a local area network (LAN) board and a wireless LAN board, that controls data communication with an external device, and that transmits first speech data corresponding to the first speech to the external device, the first speech data being digital data;
a second communicator that is provided with at least one of a Universal Serial Bus (USB) interface and a wireless communication module conforming to a short-range wireless communication standard, that controls data communication with a speech transmission-reception device, and that receives second speech data from the speech transmission-reception device, the second speech data being digital data;
a speech output transducer that outputs second speech corresponding to the second speech data; and
a controller that includes a processor and that generates the first speech data from the first speech and generates the second speech from the second speech data, wherein
the controller determines whether or not the second speech data indicates an activation command, and
in a case of determining that the second speech data indicates the activation command, the controller prohibits a transmission of the first speech data to the external device for a predetermined period.

US Pat. No. 10,971,149

VOICE INTERACTION SYSTEM FOR INTERACTION WITH A USER BY VOICE, VOICE INTERACTION METHOD, AND PROGRAM

TOYOTA JIDOSHA KABUSHIKI ...

1. A voice interaction system configured to have a conversation with a user by using a voice, comprising:hardware, including at least one memory configured to store a computer program and at least one processor configured to execute the computer program;
a speech acquisition unit, implemented by the hardware, configured to acquire user speech, the user speech being speech given by the user;
a feature extraction unit configured to extract a feature of the acquired user speech;
a response determination unit, implemented by the hardware, configured to determine a response corresponding to the extracted feature using any one of a plurality of learning models generated in advance by machine learning;
a response execution unit configured to perform control in order to execute the determined response;
a response error determination unit, implemented by the hardware, configured to determine whether the executed response is an error according to a timing of the executed response to the user speech or a timing of the user speech for the executed response; and
a learning model selection unit, implemented by the hardware, configured to select the learning model from the plurality of learning models according to a result of the determination by the response error determination unit, wherein
when the response has been determined to be the error more than or equal to a predetermined plurality of times within a predetermined first period, the learning model selection unit selects the learning model having a high probability of not selecting the response determined to be the error when the feature, corresponding to the response determined to be the error, has been input, and
the response determination unit determines the response using the learning model selected by the learning model selection unit.

US Pat. No. 10,971,148

INFORMATION PROVIDING DEVICE, INFORMATION PROVIDING METHOD, AND RECORDING MEDIUM FOR PRESENTING WORDS EXTRACTED FROM DIFFERENT WORD GROUPS

Honda Motor Co., Ltd., T...

1. An information providing device presenting a first word extracted from a first word group and a second word extracted from a second word group, the information providing device comprising a computer system configured to:store the first word group;
store the second word group;
extract a word from the second word group as the second word;
collect a voice signal;
perform voice recognition on the collected voice signal;
store a word group of a discussion theme in the first word group;
store a word group corresponding to the first word in the second word group;
store a new word in the second word group based on a result of voice recognition of content spoken by a speaker at a meeting at which the first word and the second word are presented;
extract a word of an utterance of the speaker reached as a conclusion of the meeting from minutes of the meeting at which the first word and the second word are presented using data mining; and
store the extracted word reached as the conclusion of the meeting in the second word group.

US Pat. No. 10,971,147

COGNITIVE INTERVENTION FOR VOICE RECOGNITION FAILURE

International Business Ma...

1. A method implemented by at least one hardware processor for multi-modal re-routing of a failed voice recognition based on projected best channel, the method comprising:prompting a user for information corresponding to a field of a form;
generating speech data by at least one input device, the speech data generated by capturing a spoken response of the user to the prompt;
attempting to convert the speech data to text;
determining that the attempted conversion has failed, and identifying the speech data as failed;
determining a reason for the failed speech data;
identifying, based on the determined reason for the failed speech data, an alternate channel as a projected best channel for receiving the information corresponding to the field of the form;
transmitting a message to the user prompting the user to input information corresponding to the failed speech data using the identified alternate channel;
receiving from the user the information corresponding to the field of the form from the identified alternate channel; and
injecting the received information into the field of the form; and
wherein the identifying an alternate channel as a projected best channel includes using a cognitive rules search engine to evaluate the failed speech data, based on a multitude of available alternate channels, the field of the form, user history data, and a confidence level of each of the available alternate channels, to identify one of the available alternate channels as the projected best channel for receiving the information corresponding to the field of the form.

US Pat. No. 10,971,146

SPEECH INTERACTION DEVICE

Toyota Jidosha Kabushiki ...

1. A speech interaction device comprising:an ascertaining section that ascertains a direction of a speech utterer by audio emitted by the speech utterer; and
a control section that gathers information regarding an easy-to-hear frequency band for the speech utterer and controls directionality of audio output through a speaker of a plurality of speakers when outputting audio toward the speech utterer, such that directionality of audio in the direction ascertained by the ascertaining section is higher than directionality of audio in other directions and that a predetermined standard sound quality according to the speech utterer is modulated such that audio strength within the easy-to-hear frequency band is greater than audio strength within the easy-to-hear frequency band in audio having the predetermined standard sound quality.

US Pat. No. 10,971,145

SPEECH INTERACTION FEEDBACK METHOD FOR SMART TV, SYSTEM AND COMPUTER READABLE MEDIUM

BAIDU ONLINE NETWORK TECH...

1. A speech interaction feedback method for smart TV, wherein the method comprises:collecting audio stream of a speech query sent by a user and information of elements displayed on a current interface of the smart TV, wherein the elements are all elements explicitly displayed on the current interface corresponding to executable operations, and the information of the elements comprises a position, displayed words and hierarchical structure information of each element in the current interface;
sending the audio stream and the information of elements displayed on the current interface to a cloud server;
receiving, from the cloud server, an information response message carrying a target element, which is determined by the cloud server according to the audio stream and the information of elements displayed on the current interface; wherein the target element is an element in the current interface hit by an intention of the speech query corresponding to the audio stream; and
according to information of the target element in the response message, performing a preset effect display for the corresponding target element on the current interface, as an interaction feedback for the speech query.

US Pat. No. 10,971,144

COMMUNICATING CONTEXT TO A DEVICE USING AN IMPERCEPTIBLE AUDIO IDENTIFIER

Amazon Technologies, Inc....

1. A computer-implemented method for using imperceptible context identifiers comprising:receiving a first signal, at a service associated with a smart speaker, indicative of an inaudible audio trigger being presented in response to detection of a representation of an item in media content presented by a media presentation device;
receiving a second signal, from the smart speaker, indicative of an audible audio segment presented by the media presentation device;
determining that the audible audio segment corresponds to the item;
receiving a third signal, from the smart speaker, indicative of an interaction request, wherein the smart speaker withholds transmission of the second signal until after receipt of the interaction request, the interaction request provided by a user;
determining a response to the interaction request, based at least upon the item represented in the media content, the response to the interaction request being contextually based responsive to a format of the interaction request; and
transmitting instructions, to the smart speaker, to play the response.

US Pat. No. 10,971,143

INPUT DEVICE, ELECTRONIC DEVICE, SYSTEM COMPRISING THE SAME AND CONTROL METHOD THEREOF

SAMSUNG ELECTRONICS CO., ...

1. An input device, comprising:a sensor;
a microphone;
a communicator; and
a processor configured to:
based on an operation of a user having a value sensed through the sensor, transmit utterance intention sensing information to an electronic device,
based on receiving a command to initiate a speech recognition and feedback information from the electronic device subsequent to the electronic device determining the utterance intention sensing information transmitted to the electronic device indicates intention of the user to activate the microphone according to an utterance of the user and identifying that the feedback information indicates that the electronic device is in a state in which the speech recognition is available, activate the microphone,
provide a feedback corresponding to the state of the electronic device based on the feedback information,
wherein the processor is further configured to:
provide a feedback that is of a different type based on the feedback information received from the electronic device, whereby the feedback of the different type respectively indicates whether the state is in which the speech recognition is available, a state in which the utterance of the user is maintained, and a state in which the speech recognition is unavailable, and
transmit a voice signal received via the microphone to the electronic device.

US Pat. No. 10,971,142

SYSTEMS AND METHODS FOR ROBUST SPEECH RECOGNITION USING GENERATIVE ADVERSARIAL NETWORKS

Baidu USA LLC, Sunnyvale...

1. A computer-implemented method for training a sequence-to-sequence (seq-to-seq) model using a generative adversarial network (GAN), the method comprising:receiving, at an encoder of the seq-to-seq model, a batch of labeled audio data, the labeled audio data associated with corresponding ground-truth transcription sequence;
receiving, at the encoder, a batch of unlabeled audio data;
generating, by the encoder, a first batch of embeddings corresponding to the labeled audio data;
generating, by using the encoder as a generator of the GAN, a second batch of embeddings corresponding to the unlabeled audio data;
generating, by a decoder of the seq-to-seq model, a predicted transcription sequence from the first batch of embeddings;
determining cross-entropy (CE) loss based on the predicted transcription sequence and the ground-truth transcription sequence;
determining, at a discriminator, discriminator loss based on the first batch of embeddings and the second batch of embeddings; and
training the seq-to-seq model end-to-end using both the CE loss and the discriminator loss to update seq-to-seq model weights and discriminator weights for enhanced robustness of the seq-to-seq model in automatic speech recognition.

US Pat. No. 10,971,141

SESSION INFORMATION PROCESSING METHOD AND DEVICE AND STORAGE MEDIUM

TENCENT TECHNOLOGY (SHENZ...

1. A session information processing method performed at a computing device having one or more processors and memory storing programs to be executed by the one or more processors, the method comprising:extracting a to-be-analyzed sentence and a preset quantity of preceding sentences of the to-be-analyzed sentence from a session;
performing word segmentation on the to-be-analyzed sentence and the preset quantity of preceding sentences, to obtain a first feature set comprising a plurality of first features;
extracting a second feature set comprising one or more second features from a first word set corresponding to the to-be-analyzed sentence and a second word set corresponding to the preset quantity of preceding sentences, one second feature comprising a phrase or sentence comprising a first word and a second word, the first word being one or more words in the first word set, and the second word being one or more words in the second word set; and
determining, according to the first feature set and the second feature set, a sentence category to which the to-be-analyzed sentence belongs, the sentence category comprising a first category indicating that a sentence is complete, and semantics is unambiguous and a second category indicating that a sentences is incomplete, or semantics is ambiguous.

US Pat. No. 10,971,140

SPEECH RECOGNITION CIRCUIT USING PARALLEL PROCESSORS

Zentian Limited, Cambrid...

1. A speech recognition circuit comprising:one or more clusters of processors, each of the one or more clusters of processors comprising:
a plurality of processors; and
an acoustic model memory storing acoustic model data, wherein each of the plurality of processors is configured to compute a probability using the acoustic model data in the acoustic model memory, wherein:
the speech recognition circuit is configured to generate an initial score for an audio sample; and
the initial score is used to determine whether to continue processing to determine a final score via processing a larger amount of model data than that was processed to generate the initial score.

US Pat. No. 10,971,139

VOICE CONTROL OF A MEDIA PLAYBACK SYSTEM

Sonos, Inc., Santa Barba...

1. A system comprising:at least one processor;
at least one non-transitory computer-readable medium; and
program instructions stored on the at least one non-transitory computer-readable medium that are executable by the at least one processor such that the system is configured to:
cause a first playback device in a first playback zone to operate in a given playback state comprising play back of one or more media items identified in a playback queue associated with the first playback zone;
while the first playback device is operating in the given playback state:
receive data corresponding to a detected voice input, wherein the data comprises an indication within the voice input of (i) a command word and (ii) one or more zone variable instances; and
determine, based on the command word and the one or more zone variable instances, an intent to transfer the given playback state to a second playback zone; and
after determining the intent to transfer the given playback state to the second playback zone, transfer the given playback state to the second playback zone, thereby causing a second playback device in the second playback zone to play back the one or more media items identified in the playback queue.

US Pat. No. 10,971,138

BREAK STATE DETECTION FOR REDUCED CAPABILITY DEVICES

Sinclair Broadcast Group,...

1. A method for playing secondary content during a break of unknown duration after playing primary content, the method comprising:playing primary content until a start of the break of unknown duration;
playing secondary content during the break of unknown duration;
second detecting, via out-of-band signaling, when the playing of the secondary content is complete;
first detecting, via out-of-band signaling, when more primary content becomes available for playing; and
playing (i) more secondary content upon the second detection being detected before the first detection and (ii) the more primary content upon the second detection being detected after the first detection.

US Pat. No. 10,971,136

METHOD AND APPARATUS FOR RANKING RESPONSES OF DIALOG MODEL, AND NON-TRANSITORY COMPUTER-READABLE RECORDING MEDIUM

Ricoh Company, Ltd., Tok...

1. A method for ranking responses of a dialog model, the dialog model being trained based on a sample data set, the method comprising:obtaining, from the sample data set, at least one similar dialog whose content is semantically similar to content of a target dialog;
obtaining a probability of at least one target response generated by the dialog model when inputting the target dialog, and obtaining a probability of a target response generated by the dialog model when inputting the similar dialog;
statistically analyzing, based on the probabilities of the respective generated target responses, scores of the target responses, the scores of the target responses being positively correlated with the probabilities of the target responses,
wherein the probabilities of the respective generated target responses ri are calculated as
Proba(ri|Ps)=M(ri|Ps),wherein the ri is each target response in a response set including the at least one target response and the Ps is a sentence to be input into a dialog model M,wherein the scores are calculated using the following formula:

wherein, the n represents the number of dialog contents in set SP?Pq, and parameter ?i represents a weight of each pi in the score; and
ranking the target responses in a descending order of the scores, and
wherein the method further comprising:
training the dialog model using the sample data set based on a sequence-to-sequence model, before obtaining the at least one similar dialog whose content is semantically similar to the content of the target dialog from the sample data set.

US Pat. No. 10,971,135

SYSTEM AND METHOD FOR CROWD-SOURCED DATA LABELING

1. A method comprising:receiving a respective transcription of input speech from a respective human crowd worker of a plurality of human crowd workers;
receiving an automatic speech recognition transcription, by an automatic speech recognition engine, of the input speech;
determining a number of matches that exist between the respective transcription of the plurality of human crowd workers and the automatic speech recognition transcription;
comparing the number of matches to an accuracy threshold, wherein the accuracy threshold requires a predetermined number of matches, and wherein the accuracy threshold is further based on at least one of: a respective location of the plurality of human crowd workers or a respective identity of the plurality of human crowd workers; and
when the determined number of matches is greater than or equal to the predetermined number of matches required by the accuracy threshold,
generating, based on the respective transcription of the plurality of human crowd workers and the automatic speech recognition transcription, an output to the input speech; and
training the automatic speech recognition engine based on the output.

US Pat. No. 10,971,134

COGNITIVE MODIFICATION OF SPEECH FOR TEXT-TO-SPEECH

INTERNATIONAL BUSINESS MA...

1. A computer-implemented method comprising:receiving, by a computing device, an input phrase from a text generator;
determining, by the computing device, a complexity level for an audience;
generating, by the computing device, a plurality of target phrases including a modification of the input phrase, wherein the generating comprises utilizing a Hidden Markov Model (HMM) to predict a most likely next sequence of words from within the input phrase;
generating, by the computing device, respective readability scores for each of the plurality of target phrases;
mapping, by the computing device, the plurality of the target phrases to the target audience complexity level to select a particular target phrase of the plurality of the target phrases; and
outputting, by the computing device, the selected particular target phrase to a text-to-speech (T2S) component to cause the T2S component to output the selected particular target phrase as audible speech.

US Pat. No. 10,971,133

VOICE SYNTHESIS METHOD, DEVICE AND APPARATUS, AS WELL AS NON-VOLATILE STORAGE MEDIUM

Baidu Online Network Tech...

1. A voice synthesis method, comprising:for each sound model of a plurality of sound models, performing a first matching operation on a user attribute and a sound model attribute of the sound model to obtain a first matching degree for the sound model attribute, and determining a sound model with a sound model attribute having the highest first matching degree as a recommended sound model;
for each content of a plurality of contents, performing a second matching operation on a sound model attribute of the recommended sound model and a content attribute of the content to obtain a second matching degree for the content attribute, and determining a content with a content attribute having the highest second matching degree as a recommended content; and
performing a voice synthesis on the recommended content by using the recommended sound model, to obtain a synthesized voice file.

US Pat. No. 10,971,132

MULTIMEDIA PROCESSING METHOD AND ELECTRONIC SYSTEM

ACER INCORPORATED, New T...

1. An electronic system, comprising:a host, comprising:
an audio processing module for acquiring audio data corresponding to a first language from audio streams processed by an application program executed on the host, wherein the application program executed on the host comprises a specific game software;
a relay processing module, for receiving the audio data corresponding to the first language from the audio processing module;
a smart interpreter engine for receiving the audio data corresponding to the first language from the relay processing module and converting the audio data corresponding to the first language into text data corresponding to a second language according to the game software executed on the host, wherein the smart interpreter engine transmits the text data corresponding to the second language to the relay processing module; and
a driver for converting the audio data corresponding to the first language into an analog speech signal corresponding to the first language;
an audio output device for playing the analog speech signal corresponding to the first language; and
a display for receiving the text data corresponding to the second language from the relay processing module and displaying the text data corresponding to the second language.

US Pat. No. 10,971,131

METHOD AND APPARATUS FOR GENERATING SPEECH SYNTHESIS MODEL

BAIDU ONLINE NETWORK TECH...

1. A method for generating a speech synthesis model, comprising:acquiring a plurality of types of training samples, each sample of one of the plurality of types including a text of said type and a speech of said text, the speech having a style of speech corresponding to said type and being read by an announcer corresponding to said type, wherein the plurality of types, styles of speeches and announcers are in one-to-one correspondence; and
training a neural network using the plurality of types of training samples and an annotation of the style of speech in the each of the plurality of types of training samples to obtain the speech synthesis model, the speech synthesis model being used to synthesize speeches having a plurality of styles of speeches of an announcer corresponding to each of the plurality of types,
wherein the training the neural network using the plurality of types of training samples and an annotation of the style of speech in the each of the plurality of types of training samples to obtain the speech synthesis model comprises:
combining a style vector corresponding to the style of the speech in the each of the plurality of types of training samples and an output vector of the selected layer in the neural network to form an input vector of the upper layer of the selected layer in the neural network, wherein the style vector corresponding to the style of speech in the each of the plurality of types of training samples includes respective components corresponding to styles of speech in the training samples, with a numerical value of a component corresponding to the style of speech in the training sample being 1 and numerical values of components of other styles of speech being 0.

US Pat. No. 10,971,130

SOUND LEVEL REDUCTION AND AMPLIFICATION

Facebook Technologies, LL...

1. A method comprising, by a first audio assembly:receiving an audio signal from a second audio assembly via a wireless connection with the second audio assembly, the audio signal describing a sound made by a user of the second audio assembly, wherein the audio signal arrives at the first audio assembly prior to the sound;
determining an audio filter to selectively adjust an amplitude of the sound;
applying the audio filter to the audio signal to generate audio content;
presenting, via a speaker assembly of the first audio assembly, the audio content to a user of the first audio assembly such that the presented audio content combines with the sound to selectively adjust the amplitude of the sound;
determining, using one or more sensors, a change in at least one of a location of the first audio assembly or a location of the second audio assembly; and
adjusting the audio filter based on the change.

US Pat. No. 10,971,129

SOUNDPROOF STRUCTURE, LOUVER, AND SOUNDPROOF WALL

FUJIFILM Corporation, To...

1. A soundproof structure, comprising:at least one soundproof cell comprising a frame having a hole portion and a film fixed to the frame so as to cover the hole portion,
wherein the soundproof cell is disposed in an opening member having an opening in a state in which a film surface of the film is inclined with respect to an opening cross section of the opening member and a region serving as a ventilation hole, through which the gas passes, is provided in the opening member,
wherein no weight is fixed to the film of the soundproof structure.

US Pat. No. 10,971,128

ACOUSTIC LINER AND METHODS OF CONSTRUCTING AN ACOUSTIC LINER

MRA SYSTEMS, LLC, Wilmin...

1. An acoustic liner, comprising:a support layer that includes a set of partitioned cavities with open faces;
a facing sheet operably coupled to the support layer such that the facing sheet overlies and closes the open faces, a surface of the facing sheet includes at least one of a partial perforation, a recess, and a channel, each of which extends less than all the way through the facing sheet; and
a set of perforations included in the facing sheet, and in fluid communication with cavities included in the set of cavities to form a set of acoustic resonators and where the set of perforations are formed via grit blasting and range in diameter from 0.026 inches to 0.0299 inches, each of the set of perforations being arranged on the facing sheet separately from the at least one partial perforation, recess, and channel.

US Pat. No. 10,971,127

ENCLOSURE FOR A GAS TURBINE ENGINE

General Electric Company,...

1. An enclosure for containing at least a portion of a gas turbine engine, the enclosure comprising:at least one wall defining at least a portion of an interior volume of the enclosure, the wall of the enclosure comprising:
a first insulation panel;
a sound absorption member positioned outwardly of the first insulation panel with respect to the interior volume;
an acoustic barrier positioned adjacent to and outwardly of the sound absorption member with respect to the interior volume;
an outer shell positioned outwardly of the acoustic barrier with respect to the interior volume, wherein the outer shell is formed as a monolithic unitary composite component from a composite material, the outer shell coupling the at least one wall.

US Pat. No. 10,971,126

VIBRATION DAMPER

Wilson Audio Specialties,...

1. A system for damping vibrations comprising:a housing comprised of a lower housing and an upper housing;
a base pad attached to a bottom side of the lower housing;
an elastomeric material in connection with a top side of the lower housing;
an absorptive material in connection with the elastomeric material, the elastomeric material supporting the absorptive material;
the upper housing surrounding the absorptive material; and
a top pad attached to a top side of the absorptive material, the top pad for engaging a piece of equipment that is sensitive to vibrations, the absorptive material deformable under an applied weight of the piece of equipment that is sensitive to vibrations.

US Pat. No. 10,971,125

MUSIC SYNTHESIS METHOD, SYSTEM, TERMINAL AND COMPUTER-READABLE STORAGE MEDIUM

Baidu Online Network Tech...

1. A music synthesis method, comprising:receiving a track selected by a user;
obtaining a text;
receiving speech data recorded by the user on the basis of the text; and
forming a music file in accordance with the selected track and the speech data,
wherein the forming a music file in accordance with the text and the speech data comprises:
dividing the speech data into a plurality of speech segments according to an acoustic feature of each word in the text; and
matching the plurality of speech segments to the track, and adjusting the plurality of speech segments to form the music file in accordance with a tune and a rhythm of the track.

US Pat. No. 10,971,124

PEDAL DEVICE OF ELECTRONIC KEYBOARD INSTRUMENT

Roland Corporation, Shiz...

1. A pedal device, being a pedal device of electronic keyboard instrument and comprising:a chassis;
a pedal rotatably supported by the chassis and rotated in a first direction by stepping operations;
a first urging unit configured to apply, to the pedal, an urging force to rotate the pedal toward a second direction opposite to the first direction corresponding to a stepping amount of the pedal; and
a damper which is configured to apply a resistance force against a rotation of the pedal to the pedal during the rotation of the pedal toward at least one of the first direction or the second direction,
the damper comprises a body portion fixed to the chassis, and a displacement portion protruding at one end surface in an axial direction of the body portion,
the body portion of the damper is configured to apply a resistance force against a relative displacement of the displacement portion to the displacement portion during the relative displacement of the displacement portion with respect to the body portion.

US Pat. No. 10,971,123

MUSIC COMPOSITION TOOLS ON A SINGLE PANE-OF-GLASS

Vertical Craft, LLC, Apo...

1. A system, comprising:a processor; and
a memory including instructions that, when executed, cause the processor to:
display a text box, an interactive portion, and a user input portion simultaneously on a single device display screen, wherein the interactive portion is configured to play an audio file and generate a recording of ambient sound in response to user input on the interactive portion, wherein the text box is configured to display a set of lyrics, and wherein the user input portion is configured to modify text in the text box in response to user input on the user input portion; and
save user input text and the recording with the audio file to a folder within the memory.

US Pat. No. 10,971,122

APPARATUS, METHOD, AND COMPUTER-READABLE MEDIUM FOR GENERATING MUSICAL PIECES

MIXED IN KEY LLC, Miami,...

1. An apparatus that generates a musical piece, the apparatus comprising:processing circuitry configured to
determine a chord progression sequence of a first plugin operating within a digital audio work session based on a chord selection that includes a musical key and a scale selection, the chord progression sequence of the first plugin including a selection of related chords within the selected key and scale,
in response to a detected chord selection change, modify the chord progression sequence of the first plugin to include a chord progression corresponding to the chord selection change,
set the chord progression sequence of the first plugin as a master sequence of the first plugin,
in response to detecting a second progression sequence of a second plugin operating within the digital audio work session, transmit an identifier to the second progression sequence of the second plugin, the identifier setting the second progression sequence of the second plugin as a slave sequence of the second plugin, and establishing a communication link between the master sequence of the first plugin and the slave sequence of the second plugin to synchronize the slave sequence of the second plugin and the master sequence of the first plugin, wherein changes made in the master sequence of the first plugin are automatically effectuated in the slave sequence of the second plugin, wherein
the processing circuitry is further configured to determine a relationship between an element of the master sequence of the first plugin and an element of the slave sequence of the second plugin, the relationship indicating a level of harmony between the element of the master sequence of the first plugin and the element of the slave sequence of the second plugin.

US Pat. No. 10,971,121

SYSTEMS AND METHODS FOR TRANSFORMING DIGITAL AUDIO CONTENT INTO VISUAL TOPIC-BASED SEGMENTS

Tree Goat Media, Inc., N...

1. A method for packaging audio content by an audio content system to facilitate searching and sharing of said audio content comprising:(a) providing an audio track and storing the audio track in a data storage;
(b) providing a plurality of visual assets and storing the plurality of visual assets in the data storage, wherein the audio track and the plurality of visual assets are not relationally associated with each other when stored;
(c) with a segmentation module, dividing an audio signal of the audio track into a plurality of audio segments;
(d) generating an indexed audio segment by associating at least one of the audio segments with at least one textual element; and,
(e) pairing at least one visual asset of the plurality of visual assets to the indexed audio segment by:
(i) determining a proposed set of visual assets of the plurality of visual assets by performing an automated analysis of the indexed audio segment;
(ii) displaying the proposed set of visual assets to a user;
(iii) receiving a user Input that identifies a subset of the proposed set of visual assets from the user; and,
(iv) determining the at least one visual asset based on the proposed set of visual assets and the user input.

US Pat. No. 10,971,120

STRAP PIN FITTING

GOTOH GUT CO., LTD., Ise...

1. A strap pin fitting for detachably attaching a belt-shaped strap to a strap pin installed to a musical instrument,wherein the strap pin fitting is provided separately from the strap and the musical instrument,
the strap pin fitting comprising:
a base plate;
a strap retaining portion arranged on the base plate and configured to retain an attaching hole with which the strap pin is engageable, the attaching hole being provided to each end of the strap;
a through-hole formed in the base plate and configured to allow insertion of the strap pin; and
a presser plate attached to the base plate and configured to be movable between an open position where the through-hole is opened so as to allow insertion of the strap pin into the through-hole and a closed position where a part of the through-hole is closed so as to prevent detachment of the strap pin from the through-hole.

US Pat. No. 10,971,119

DOUBLE-LAYER DUMB DRUM WITH SAND BELT ADJUSTING FUNCTION

ZHANGZHOU HANQI MUSICAL I...

1. A double-layer dumb drum with a sand belt adjusting function, comprising an upper-layer elastic body, a strike edge, an upper bottom plate, a sand belt adjusting device, an internal resonance chamber, an external resonance chamber, a lower-layer elastic body, and a lower bottom plate, characterized in that the upper-layer elastic body is fixed to the top of the upper bottom plate, the strike edge is fixed to the top of the upper bottom plate and surrounds the upper-layer elastic body and protrudes from an upper elastic surface; the internal resonance chamber and the external resonance chamber are disposed under the upper bottom plate, and the sand belt adjusting device are installed in the internal resonance chamber, and the bottom of the internal resonance chamber is sealed by the external resonance chamber; the lower-layer elastic body is fixed and coupled to the top of the lower bottom plate; the bottom of the external resonance chamber has a plurality of contact points, and the external resonance chamber abuts the bottom of the lower-layer elastic body through the contact points; and the upper bottom plate and the lower bottom plate are coupled and fixed by a plurality of connecting screws;the sand belt adjusting device comprises a plurality of steel balls, a T-shaped adjusting rod, an adjustment seat, an adjusting knob, and a spring, and the steel balls are disposed in the internal resonance chamber; the latitudinal rod at an end of the T-shaped adjusting rod separates the steel balls from an inner wall on a side of the rectangular resonance chamber; the longitudinal rod of the T-shaped adjusting rod is placed into a slot communicating to the resonance chamber; the tail of the longitudinal rod is coupled to the adjusting knob; the T-shaped adjusting rod is detachably coupled to the upper bottom plate through the adjustment seat; the steel balls are distributed on both sides of the longitudinal rod of the T-shaped adjusting rod; and a spring is fixed and coupled between the latitudinal rod at the end of the T-shaped adjusting rod and an inner wall of the rectangular resonance chamber.

US Pat. No. 10,971,118

GUITAR

TAYLOR-LISTUG, INC., El ...

1. A guitar, the guitar comprising:a body, the body having a bottom and sides;
a top, an outer perimeter of the top attached to an upper rim of the sides; and
a neck extending from the body;
wherein an upper surface of the top is in tension due to bending of the top into a substantially domed shape and wherein a thickness of the top is thinner in an area of the outer perimeter than a central portion, thereby reducing the tension in the upper surface of the top in the area of the outer perimeter.

US Pat. No. 10,971,117

DEVICE AND METHOD FOR DAMPING OF ALIQUOT TONES

Antun Merkoci and Ales Br...

1. An aliquot tones damping device (1) for use in pianos or upright pianos with strings (6) mounted between two fastening points (7) said device comprising at least one pressing element (8) having a pressing material (2) fastened thereon, at least one movable element (3), at least one return element (10), a linkage (5), and an actuator (4), for actuating the movable element (3) via the linkage (5), characterized in that said at least one pressing element (8) is shaped as an elongated body extending at least over a group of strings (6) and transversely to said group of strings (6), and positioned above said group of strings (6), wherein by actuating the movable element (3), the pressing element (8) guided by guides (9) is moved in a direction toward said group of strings (6) and a pressure of the pressing material (2) against said group of strings (6) exerted at the beginning or at the end of the active parts of said group of strings (6) at an initial or at a final fastening point (7), thus dampening the aliquot tones of said group of strings (6), and by the movement of the movable element (3) the return element (10) is simultaneously actuated, and wherein, once the actuation is over, by the return element (10), the movable element (3) and hence the pressing element (8) is returned to its initial position.

US Pat. No. 10,971,116

DISPLAY DEVICE, CONTROL METHOD FOR PLACEMENT OF A VIRTUAL IMAGE ON A PROJECTION SURFACE OF A VEHICLE, AND STORAGE MEDIUM

HONDA MOTOR CO., LTD., T...

1. A display device comprising:a light projection device which has a projection surface and projects light including an image, wherein the projection surface is a two-dimensional projection surface;
an optical mechanism which is provided on a path of the light and is capable of adjusting a distance from a predetermined position to a position where the light is formed as a virtual image;
a concave mirror which reflects light having passed through the optical mechanism toward a reflector;
a concave mirror actuator which adjusts a reflection angle of the concave mirror;
a control device which controls the light projection device and the concave mirror actuator; and
an operator which receives an adjustment operation for the angle formed by the horizontal surface and the segment from an occupant of the vehicle,
wherein the control device adjusts a projection position on the projection surface of the light projected from the light projection device having an angle formed by a horizontal surface passing through a predetermined position on an image formed by the concave mirror and a segment from the predetermined position to a position where the light is formed as a virtual image so as to curb fluctuation occurring due to movement of a vehicle,
wherein the control device adjusts the angle by driving the concave mirror actuator on the basis of the adjustment operation in a case where the adjustment operation for the angle is received by the operator, and adjusts the projection position on the projection surface of the light projected from the light projection device in a case where fluctuation in the angle occurring due to movement of the vehicle is curbed,
wherein the control device adjusts the projection position on the projection surface of the light projected from the light projection device in a case where driving of the concave mirror due to the driving of the concave mirror actuator based on the received adjustment operation has reached a limit, thereby adjusting the angle formed by the horizontal surface and the segment.

US Pat. No. 10,971,115

FOVEATED RENDERING SYSTEM AND METHOD

Sony Interactive Entertai...

1. A foveated rendering system for modifying content to be displayed, the system comprising:a user profile obtaining unit operable to obtain a user profile, comprising user profile information about head motion and eye motion for a user;
a foveated rendering unit operable to apply a foveated rendering process to the content to be displayed; and
a user profile analysis unit operable to determine characteristics of one or more groups of users in dependence upon the obtained user profiles,
wherein the foveated rendering process is dependent on the user profile information obtained from the user profile, and
wherein at least one of:
(i) the user profile analysis unit is operable to identify characteristics that correspond to an above-threshold number of users representing the group of all users, and
(ii) the user profile analysis unit is operable to identify one or more groups of users according to shared characteristics between user profiles, and the foveated rendering unit is operable to apply the foveated rendering process to the content to be displayed in dependence upon the characteristics determined by the user profile analysis unit so as to generate a processed content to be displayed for each group.

US Pat. No. 10,971,114

DYNAMIC RESOLUTION SCALING

Dell Products L.P., Roun...

1. A method for dynamic resolution scaling, comprising:detecting a change in a resolution for a display of an information handling system from a first resolution to a second resolution;
determining an aspect ratio of each of a plurality of elements of a graphical user interface to generate a plurality of aspect ratios associated with the plurality of elements of the graphical user interface;
generating an aspect ratio pixel matrix that indicates the plurality of aspect ratios associated with the plurality of elements of the graphical user interface;
after determining the aspect ratio of each of the plurality of elements of the graphical user interface and the aspect ratio pixel matrix, scaling a resolution of each of the plurality of elements of the graphical user interface based, at least in part, on the second resolution and the aspect ratio pixel matrix while maintaining the aspect ratio of each of the plurality of elements of the graphical user interface; and
displaying the graphical user interface including the scaled plurality of elements at the second resolution.

US Pat. No. 10,971,113

DISPLAY SYSTEM, ELECTRONIC DEVICE, AND DISPLAY METHOD

SEIKO EPSON CORPORATION, ...

1. A display system comprising:an electronic device that generates an image and that includes a first display unit displaying a first area of the image; and
a head mounted type display device connected to the electronic device, wherein
the electronic device includes
an output unit configured to output an image,
the head mounted type display device includes
an acquisition unit configured to acquire the image output by the electronic device,
a second display unit configured to superimpose a second area of the image on an outside scene visually recognized in a state where the head mounted type display device is worn, and to display the second area of the image, and
a display controller configured to:
dispose the image in a virtual display area in correspondence to a position of the electronic device such that the image is aligned with the position of the electronic device,
cause the second display unit to display the second area of the image acquired by the acquisition unit such that:
when the electronic device is in the outside scene, the second area of the image includes the first area of the image, and
when the electronic device is not in the outside scene, the second area of the image does not include the first area of the image,
when the electronic device is in the outside scene, execute a masking processing to the first area of the image in the second area of the image, the masking processing including changing color data of pixels to a dark color or a black color, and
cause the second display unit to display the second area of the image including the first area of the image on which the masking processing has been executed.

US Pat. No. 10,971,112

DYNAMICALLY-THEMED DISPLAY UTILIZING PHYSICAL AMBIENT CONDITIONS

SAP SE, Walldorf (DE)

1. A method, comprising;generating a background for a graphical user interface (GUI);
partitioning the background into partitioned areas;
drawing a polygonal shape in each of the partitioned areas, wherein each polygonal shape includes one or more control points;
animating movement of each polygonal shape by varying a position of the one or more control points; and
moving the position of the one or more control points in response to a user interaction with an application tile overlaid on the background of the GUI.

US Pat. No. 10,971,111

PROVIDING A REPRESENTATION FOR A DEVICE CONNECTED TO A DISPLAY DEVICE

Roku, Inc., San Jose, CA...

1. An apparatus, comprising:a memory; and
at least one processor coupled to the memory and configured to:
receive, from a first display device for a first multimedia device, a first device fingerprint information and a corresponding first device class representation information,
receive, from a second display device for a second multimedia device, a second device fingerprint information and a corresponding second device class representation information,
store the first and the second device fingerprint information and the first and the second device class representation information as a crowd sourced representation information in a device representation database,
determine that a third multimedia device with a corresponding third device fingerprint information is a known multimedia device based at least on a comparison of the third device fingerprint information with the crowd sourced representation information, and
transmit, to a third display device, a third device class representation information that corresponds to the third device fingerprint information based at least on the determination that the third multimedia device operatively coupled to the third display device is the known multimedia device.

US Pat. No. 10,971,110

CIRCUIT AND METHOD FOR USE IN A FIRST DISPLAY DEVICE TO FACILITATE COMMUNICATION WITH A SECOND DISPLAY DEVICE, AND DISPLAY COMMUNICATION SYSTEM

NOVATEK MICROELECTRONICS ...

1. A circuit for use in a first display device to facilitate communication with a second display device, the first display device and the second display device each including a corresponding connector compliant with a digital display interface standard, the circuit comprising:a digital display interface circuit for transmission or receiving of video data according to the digital display interface standard, the digital display interface circuit for being connected to the connector of the first display device; and
a control unit being configured to transmit at least one first communication signal through at least one first pin of the connector of the first display device to communicate with the second display device through a cable compliant with the digital display interface standard to be connected between the connectors of the first display device and the second display device, wherein the at least one first communication signal is non-standard with respect to the digital display interface standard, and the control unit is a microcontroller-based or processing-unit-based circuit.

US Pat. No. 10,971,109

IMAGE PROCESSING METHOD, APPARATUS, DEVICE, AND VIDEO IMAGE TRANSMISSION SYSTEM

SZ DJI TECHNOLOGY CO., LT...

1. An image processing method comprising:obtaining a first YUV image captured by an on-board camera operating in a log mode;
converting the first YUV image to a second YUV image, the second YUV image having a same image format as an image captured by the on-board camera operating in a normal mode, wherein converting the first YUV image to the second YUV image includes:
converting the first YUV image to a first RGB image based on a log mode;
performing an electro-optical conversion based on the log mode on the first RGB image to obtain a linear RGB image based on the log mode;
performing a color-space conversion on the linear RGB image based on the log mode to obtain a linear RGB image based on the normal mode;
performing an opto-electronic conversion based on the normal mode on the linear RGB image based on the normal mode to obtain a second RGB image based on the normal mode; and
converting the second RGB image to the second YUV image based on the normal mode; and
transmitting the second YUV image.

US Pat. No. 10,971,108

IMAGE DISPLAY METHOD AND APPARATUS, ELECTRONIC DEVICE, VR DEVICE, AND NON-TRANSITORY COMPUTER READABLE STORAGE MEDIUM

Beijing BOE Optoelectroni...

1. An image display method applied to a Virtual Reality (VR) device, comprising:determining an activity state of the VR device according to measurement data of a sensor within the VR device;
determining a processing mode of a current frame image to be displayed according to the activity state, wherein the processing mode is one of a flicker suppression process and a forwarding process; and
processing the current frame image to be displayed according to the processing mode to obtain a current frame image for a display in the VR device, and sending the current frame image for the display to the display,
wherein the activity state includes at least a still state and a moving state; and determining the processing mode of the current frame image to be displayed according to the activity state comprises:
determining that the processing mode of the current frame image to be displayed is the flicker suppression process if the activity state is the still state; and,
determining that the processing mode of the current frame image to be displayed is the forwarding process if the activity state is the moving state, and
wherein, if the processing mode is the flicker suppression process, processing the current frame image to be displayed according to the processing mode comprises:
determining whether the current frame image to be displayed is a first frame image in the still state;
if the current frame image to be displayed is the first frame image, storing the first frame image into a first storage area and an (N+1)th storage area, respectively; and if the current frame image to be displayed is not the first frame image, sequentially storing images in the first storage area through an (N?1)th storage area into a second storage area through an Nth storage area and storing the current frame image to be displayed in the first storage area; wherein N is a positive integer greater than or equal to 2; and
invoking a data conversion algorithm to process the image in the first storage area based on the image in the first storage area through the image in the Nth storage area, and storing the processed image in the (N+1)th storage area,
wherein the first storage area through the (N+1)th storage area are areas divided in advance in a buffer of the VR device; and the image in the (N+1)th storage area is the current frame image for the display.

US Pat. No. 10,971,107

DISPLAY DEVICE

INNOLUX CORPORATION, Mia...

1. A display device, comprising:a non-display area;
a display area next to the non-display area and comprising:
a first scan line extending along a first direction;
a first data line extending along a second direction;
a first pixel coupled to the first scan line and the first data line and comprising a first light-transmitting area;
a second scan line extending along the first direction;
a second data line extending along the second direction;
a second pixel coupled to the second scan line and the second data line and comprising a second light-transmitting area, wherein a total area of the second light-transmitting area is different from a total area of the first light-transmitting area;
a first color filter overlapping the first pixel and comprising a first color area, wherein when first light passes through the first light-transmitting area and the first color area, a color of the first light is a first color;
a second color filter overlapping the second pixel and comprising a second color area, wherein when second light passes through the second light-transmitting area and the second color area, a color of the second light is a second color, and wherein the second color is the same as the first color;
a third data line extending along the second direction; and
a fourth data line extending along the second direction,
wherein a first pitch between the first light-transmitting area and the second light-transmitting area is different than a second pitch between the first color area and the second color area,
wherein the first data line, the second data line, the third data line, and the fourth data line are successively arranged along the first direction,
wherein a distance between the first data line and the second data line is less than a distance between the second data line and the third data line, and the distance between the second data line and the third data line is less than a distance between the third data line and the fourth data line.

US Pat. No. 10,971,106

LIQUID CRYSTAL OPTICAL MODULATION DEVICE AND LIQUID CRYSTAL OPTICAL MODULATION METHOD

TOPPAN PRINTING CO., LTD....

1. A liquid crystal optical modulation device which performs light control drive for a liquid crystal panel, the device comprising:a switching circuit that limits a power supply voltage, which is applied to the liquid crystal panel from a commercial AC source; and
a control system that controls a voltage applied to the liquid crystal panel through the switching circuit in accordance with a phase of the power supply voltage of the commercial AC source,
wherein the switching circuit perform opposite phase control by a switching element of the switching circuit.

US Pat. No. 10,971,105

PIXEL DRIVING CIRCUIT, DRIVING METHOD AND DISPLAY DEVICE

HKC Corporation Limited, ...

1. A pixel driving circuit, comprising:a pixel array comprising a plurality of pixel units, wherein each of the pixel units has four sub-pixels with different colors, and all of the sub-pixels are arranged in a dot inversion arrangement, and positive and negative polarities of the sub-pixels are alternately disposed; and
data lines and scan lines orthogonally disposed to define the pixel array, wherein two of the scan lines are provided for each of columns of the pixel units, and two of the data lines are provided for each of rows of the pixel units;
wherein each of the data lines is connected to closest two of the sub-pixels having a same polarity when passing through one of the columns of the pixel units, all the sub-pixels connected to the same data line in a row direction have the same polarity, and the sub-pixels connected to the adjacent data lines have reverse polarities;
wherein the columns of the pixel units are divided into odd-numbered columns of pixel units and even-numbered columns of pixel units, and the four sub-pixels in the odd-numbered columns of pixel units and the four sub-pixels in the even-numbered columns of pixel units have the same arrangement order being a first order, in which a first sub-pixel, a second sub-pixel, a third sub-pixel and a fourth sub-pixel of the four sub-pixels are arranged in order,
wherein the four sub-pixels in the odd-numbered columns of pixel units are arranged in a first order, and the four sub-pixels in the even-numbered columns of pixel units are arranged in a second order, in which a third sub-pixel, a fourth sub-pixel, a first sub-pixel and a second sub-pixel of the four sub-pixels are arranged in order.

US Pat. No. 10,971,104

SHIFT REGISTER AND METHOD FOR DRIVING THE SAME, GATE DRIVING CIRCUIT, AND DISPLAY DEVICE

HEFEI XINSHENG OPTOELECTR...

1. A shift register, comprising:an output sub-circuit coupled to a pull-up node, a clock signal terminal and a signal output terminal, wherein the output sub-circuit is configured to transmit a voltage of the clock signal terminal to the signal output terminal under control of a voltage of the pull-up node; and
a compensation sub-circuit coupled to the pull-up node, the clock signal terminal and the signal output terminal, wherein the compensation sub-circuit is configured to transmit a voltage of the signal output terminal to the pull-up node under control of the voltage of the pull-up node and the voltage of the clock signal terminal.

US Pat. No. 10,971,103

DRIVER CIRCUIT, DISPLAY DEVICE, AND ELECTRONIC DEVICE

Semiconductor Energy Labo...

2. A semiconductor device comprising:first to eleventh transistor,
wherein one of a source and a drain of the first transistor is electrically connected to a first wiring,
wherein one of a source and a drain of the second transistor is electrically connected to a second wiring,
wherein a gate of the first transistor and a gate of the second transistor are electrically connected to a first signal line,
wherein one of a source and a drain of the third transistor is electrically connected to a second signal line,
wherein the other of the source and the drain of the third transistor is electrically connected to the first wiring,
wherein one of a source and a drain of the fourth transistor is electrically connected to the first wiring,
wherein one of a source and a drain of the fifth transistor is electrically connected to a third signal line,
wherein the other of the source and the drain of the fifth transistor is electrically connected to the second wiring,
wherein a gate of the fifth transistor is electrically connected to a gate of the third transistor,
wherein one of a source and a drain of the sixth transistor is electrically connected to the second wiring,
wherein a gate of the sixth transistor is electrically connected to a gate of the fourth transistor,
wherein one of a source and a drain of the seventh transistor is electrically connected to the gate of the fourth transistor,
wherein a gate of the seventh transistor is electrically connected to the gate of the third transistor,
wherein one of a source and a drain of the eighth transistor is electrically connected to the gate of the third transistor,
wherein a gate of the eighth transistor is electrically connected to the gate of the fourth transistor,
wherein one of a source and a drain of the ninth transistor is electrically connected to the gate of the fourth transistor,
wherein a gate of the ninth transistor is electrically connected to a fourth signal line,
wherein one of a source and a drain of the tenth transistor is electrically connected to the gate of the third transistor,
wherein the other of the source and the drain of the tenth transistor is electrically connected to the fourth signal line,
wherein a gate of the tenth transistor is electrically connected to the fourth signal line,
wherein one of a source and a drain of the eleventh transistor is electrically connected to the gate of the third transistor,
wherein the other of the source and the drain of the eleventh transistor is electrically connected to the fourth signal line, and
wherein a gate of the eleventh transistor is electrically connected to a fifth signal line.

US Pat. No. 10,971,102

SHIFT REGISTER UNIT AND DRIVING METHOD, GATE DRIVING CIRCUIT, AND DISPLAY DEVICE

Hefei BOE Optoelectronics...

1. A shift register unit, comprising an input circuit, an output circuit, a first node control circuit, and a second node control circuit,wherein the input circuit is connected to a first node, and is configured to provide an input signal to the first node in response to a first control signal;
the output circuit is connected to the first node and an output terminal, and is configured to output an output signal at the output terminal under control of a level of the first node;
the first node control circuit is connected to the first node and a second node, and is configured to reset the first node under control of a level of the second node; and
the second node control circuit is connected to the second node, and is configured to provide a third control signal to the second node in response to a second control signal to control the level of the second node.

US Pat. No. 10,971,101

LIQUID CRYSTAL DISPLAY AND MOBILE TERMINAL

SHENZHEN CHINA STAR OPTOE...

1. A liquid crystal display (LCD), comprising:a substrate and a scanning controller, the substrate being configured with a plurality of thin film transistors (TFTs), each of the TFTs comprising a gate, a drain and a pixel electrode, the gate of each of the TFTs electrically connecting to the scanning controller along a first direction in sequence, one end of the drain connecting to the pixel electrode, and the other end of the drain being a part of the drain that is stacked on the gate and insulated from the gate so that the part of the drain casts a projection on the gate along a third direction perpendicular to the substrate, the projections that the parts of the drains of the plurality of TFTs cast on the gates of the plurality of the TFTs having projection areas that are different from each other,
wherein for multiple TFTs of the plurality of TFTs that are arranged away from the scanning controller in the first direction with distances increasing from the scanning controller, the projection areas of the projections that the parts of the drains of the multiple TFTs cast on the gates of the multiple TFTs are increased one by one in the first direction with the increase of the distances of the multiple TFTs away from scanning controller.

US Pat. No. 10,971,100

PIXEL DRIVING CIRCUIT, DISPLAY PANEL HAVING THE PIXEL DRIVING CIRCUIT AND DRIVING METHOD OF DISPLAY PANEL

CHONGQING BOE OPTOELECTRO...

1. A driving method of a display panel, the display panel comprising a plurality of pixels arranged in an array, wherein each row of pixels corresponds to a gate line, and each column of pixels corresponds to a data line, the method comprising:comparing a current frame of image with a previous frame of image to determine a non-changing row in a pixel array, wherein contents displayed by pixels in the non-changing row for the current frame of image and contents displayed by pixels in the non-changing row for the previous frame of image are the same;
selecting a non-charging row from the non-changing row according to a predetermined time;
providing, when displaying the current frame of image, an invalid signal to the gate line of the non-charging row during a scanning time for the gate line of the non-charging row to not charge the non-charging row,
wherein selecting the non-charging row from the non-changing row according to the predetermined time comprises:
determining whether a time period of the non-changing row from a time when the current frame of image begins to be displayed to a time when a previous charging for the non-changing row is finished reaches a predetermined time, and in response to a negative determination, determining the non-changing row as a non-charging row, and in response to an affirmative determination, determining the non-changing row not as a non-charging row;
wherein the display panel further comprises: a gate line driving circuit for driving each gate line, a data line driving circuit for driving each data line, a timing controller for providing control signals to the gate line driving circuit and the data line driving circuit,
wherein, providing, when displaying the current frame of image, an invalid signal to the gate line of the non-charging row during the scanning time for the gate line of the non-charging row to not charge the non-charging row further comprises:
providing, when displaying the current frame of image, an invalid control signal to the gate line driving circuit and the data line driving circuit through the timing controller during the scanning time for the gate line of the non-charging row, to control the gate line driving circuit to provide an invalid signal to the gate line of the non-charging row and to control the data line driving circuit not to provide a signal to each data line,
wherein the timing controller is configured to generate a control signal based on an input signal at an input terminal thereof, and when an invalid input signal is received by the input terminal of the timing controller, an invalid control signal is output by the timing controller, and when a valid input signal is received by the input terminal of the timing controller, a valid control signal is output by the timing controller,
the display panel further comprises a first control circuit, a second control circuit and an AND gate circuit, a first input terminal of the AND gate circuit is coupled to an output terminal of the first control circuit, and a second input terminal of the AND gate circuit is coupled to an output terminal of the second control circuit, and an output terminal of the AND gate circuit is coupled to the input terminal of the timing controller, wherein the first control circuit is configured to output an original signal to the first terminal of the AND gate circuit, and the second control circuit is configured to generate an additional control signal based on the non-charging row for the current frame of image and output the additional control signal to the second input terminal of the AND gate circuit, and the AND gate circuit is configured to output a signal generated by the AND operation on the original signal and the additional control signal to the timing controller,
wherein, determining whether a time period of the non-changing row from a time when the current frame of image begins to be displayed to a time when a previous charging for the non-changing row is finished reaches a predetermined time, and in response to a negative determination, determining the non-changing row as a non-charging row, and in response to an affirmative determination, determining the non-changing row not as a non-charging row further comprises:
controlling, when displaying the current frame of image, the additional control signal to be invalid during the scanning time for the gate line of the non-charging row, and the additional control signal to be valid during the scanning time for the gate line of any row other than non-charging row in the pixel array.

US Pat. No. 10,971,099

DRIVING METHOD OF DISPLAY DEVICE, DATA DRIVING INTEGRATED CIRCUIT AND DISPLAY PANEL

HKC Corporation Limited, ...

1. A driving method of a display device, comprising: acquiring a voltage signal and a data polarity reversal signal to be transmitted; when the data polarity reversal signal is a predetermined level, comparing a voltage of the voltage signal with a predetermined drive voltage, and selecting a corresponding drive voltage according to a comparing result; and driving liquid crystal molecules according to the selected drive voltage, wherein the corresponding drive voltage comprises a first drive voltage and a second drive voltage, and the predetermined voltage comprises a first predetermined voltage; the step of when the data polarity reversal signal is the predetermined level, comparing the voltage of the voltage signal with the predetermined drive voltage, and selecting the corresponding drive voltage according to the comparing result comprises: when the data polarity reversal signal is the predetermined level, judging whether the voltage of the voltage signal is higher than the first predetermined voltage; when the voltage of the voltage signal is higher than the first predetermined voltage, selecting the first drive voltage to drive the liquid crystal molecules; when the voltage of the voltage signal is lower than the first predetermined voltage, selecting the second drive voltage to drive the liquid crystal molecules; and when the voltage of the voltage signal is equal to the first predetermined voltage, selecting the second drive voltage to drive the liquid crystal molecules.

US Pat. No. 10,971,098

METHOD AND DEVICE FOR ADJUSTING GRAY SCALE OF DISPLAY PANEL

HKC CORPOR ATION LIMITED,...

1. A method for adjusting gray scale of a display panel, wherein the method comprises:performing image acquisition on the display panel, and obtaining a current image;
identifying a nonuniform block in the current image, and detecting an original output brightness and an original input gray scale of the nonuniform block;
determining a target input gray scale corresponding to a preset target brightness according to an actual Gamma curve value, the actual Gamma curve value is obtained through testing the display panel;
using a difference value between the original input gray scale and the target input gray scale as a gray scale compensation value of the nonuniform block;
testing an actual current value of a sub-pixel at an ith gray scale on the display panel, wherein i=0, 1, 2, . . . , n?1, and n is a gray scale grade value;
adjusting the actual current value of the sub-pixel at the ith gray scale to be a preset target current value of the sub-pixel at the ith gray scale, and recording a target gray scale value when the sub-pixel is at the preset target current value corresponding to the ith gray scale;
performing current compensation on at least one sub-pixel to be compensated of the display panel, according to a data distribution table of target gray scale values of each said sub-pixel at each target current value.

US Pat. No. 10,971,097

DISPLAY DEVICE

Japan Display Inc., Toky...

1. A display device comprising:a first insulating layer including a first hole;
a second insulating layer including a second hole;
a plurality of pixel electrodes each including a metal having a light reflection property;
a plurality of switching elements respectively provided for any one of the plurality of pixel electrodes;
a light emitting element on the plurality of pixel electrodes;
a bank between two adjacent pixel electrodes in the plurality of pixel electrodes; and
a scanning signal line driving circuit inputting a driving signal to the plurality of switching elements,
wherein the plurality of pixel electrodes includes a first pixel electrode connected to a first switching element of the plurality of switching elements via a relay wiring,
the first pixel electrode does not overlap the first switching element,
the first pixel electrode overlaps the scanning signal line driving circuit,
the first insulating layer is over the second insulating layer,
the second insulating layer covers a drain of the first switching element,
the relay wiring is between the first insulating layer and the second insulating layer,
the first pixel electrode is on the second insulating layer,
the bank is formed to fill the first hole,
the light emitting element covers the plurality of pixel electrodes and the bank,
the relay wiring is connected to the first pixel electrode via the first hole and the drain of the first switching element via the second hole,
the first hole does not overlap the second hole and the first switching element, and
the bank covers a peripheral edge of the first pixel electrode and the first hole.

US Pat. No. 10,971,096

DISPLAY DEVICE

LG DISPLAY CO., LTD., Se...

1. A display device, comprising:a plurality of gate lines disposed in a first direction;
a plurality of data lines which is disposed in a second direction different from the first direction to define a plurality of sub pixels together with the plurality of gate lines;
a sensing storage line disposed in the first direction;
a sensing data line disposed in the second direction;
pixel thin film transistors, each pixel thin film transistor including a first gate electrode connected to a respective one of the plurality of gate lines, a first source electrode connected to a respective one of the plurality of data lines, and a first drain electrode spaced apart from the first source electrode; and
sensor thin film transistors, each sensor thin film transistor including a second gate electrode connected to the sensing storage line, a second source electrode electrically connected to the sensing data line, and a second drain electrode spaced apart from the second source electrode, the second drain electrode electrically connected to the first drain electrode to share a pixel storage capacitor;
a plurality of common lines disposed in the first direction;
a storage electrode configured by extending the first drain electrode;
an insulating layer above the first gate electrode and the second gate electrode;
at least another insulating layer above the first and second source electrodes and the first and second drain electrodes;
a first contact hole configured by removing a part of the at least another insulating layer to expose the storage electrode; and
a second contact hole configured by removing another part of the at least another insulating layer to expose the second drain electrode.

US Pat. No. 10,971,095

LIQUID CRYSTAL DISPLAY DEVICE AND FAILURE INSPECTION METHOD

PANASONIC CORPORATION, O...

1. A liquid crystal display, comprising:a liquid crystal panel of an active matrix type including a first substrate, a second substrate disposed opposite to the first substrate, and a liquid crystal layer sealed between the first substrate and the second substrate;
a source line and a gate line disposed in a lattice form;
a pixel electrode disposed in a pixel region defined by the source line and the gate line;
a switching element disposed corresponding to the pixel electrode;
a source driver that drives the source line;
a gate driver that drives the gate line; and
a failure inspection circuit that is selectively connected to the source line to perform failure inspection of the source line, and is selectively connected to the gate line to perform failure inspection of the gate line,
wherein the failure inspection circuit includes
a monitor input signal line,
a monitor output signal line,
a determination circuit that detects a voltage level of an output signal from the monitor output signal line, and
an expected value comparison circuit that compares an output from the determination circuit with an expected value,
wherein the source driver, the gate driver, and the failure inspection circuit are mounted on the first substrate or the second substrate,
wherein the failure inspection circuit selectively performs failure inspection of the source line during a blanking period between a plurality of image display periods, and
wherein the failure inspection circuit selectively performs failure inspection of the gate line based on the output signal when a gate signal from the gate driver is applied during an image display period.

US Pat. No. 10,971,094

PIXEL DRIVING CIRCUIT AND LIQUID CRYSTAL DISPLAY DEVICE

SHENZHEN CHINA STAR OPTOE...

1. A pixel driving circuit, comprising: a plurality of sub-pixels arranged in an array, a plurality of scan lines respectively corresponding to a plurality of rows of sub-pixels, a plurality of data lines respectively corresponding to a plurality of columns of sub-pixels, and an array substrate common voltage line;the sub-pixel comprising: a first thin film transistor (TFT), a first liquid crystal (LC) capacitor, a first storage capacitor, a second TFT, a third TFT, a second LC capacitor, and a second storage capacitor;
in each sub-pixel, the first TFT having a gate electrically connected to a corresponding scan line, a source electrically connected to a corresponding data line, and a drain electrically connected to a first end of the first LC capacitor; the first LC capacitor having a second end connected to a color filter (CF) substrate common voltage; the first storage capacitor having a first end electrically connected to the first end of the first LC capacitor, and a second end electrically connected to the array substrate common voltage line; the second TFT having a gate electrically connected to a corresponding scan line, a source electrically connected to a corresponding data line, and a drain electrically connected to a first end of the second LC capacitor; the second LC capacitor having a second end electrically connected to the CF substrate common voltage; the second storage capacitor having a first end electrically connected to the first end of the second LC capacitor, and a second end electrically connected to the array substrate common voltage line; the third TFT having a gate electrically connected to a corresponding scan line, and a source electrically connected to the first end of the second LC capacitor;
for an integer N, except for the last row of sub-pixels, in the N-th row of sub-pixels, the drain of the third TFT of each sub-pixel being electrically connected to the first end of the second LC capacitor of a corresponding sub-pixel in the (N+1)th row of sub-pixels.

US Pat. No. 10,971,093

PIXEL CIRCUIT AND DISPLAY DEVICE

AU OPTRONICS CORPORATION,...

1. A pixel circuit comprising:a storage capacitor;
a first switch electrically connected to a first end of the storage capacitor and configured to provide a data voltage to the first end of the storage capacitor according to a gate signal; and
a second switch electrically connected between the first end of the storage capacitor and a second end of the storage capacitor, and configured to receive a first operating voltage from the second end of the storage capacitor and provide the first operating voltage to the first end of the storage capacitor.

US Pat. No. 10,971,092

DRIVING METHOD AND DRIVING DEVICE OF DISPLAY PANEL

HKC Corporation Limited, ...

1. A driving method of a display panel, comprising:controlling a timing controller to output a start signal to a level shifter;
configuring a parameter of a register of the level shifter;
controlling the level shifter to generate a drive signal according to the parameter upon receiving the start signal, and outputting the drive signal to a first drive circuit; and
controlling the first drive circuit to drive the display panel according to the drive signal.

US Pat. No. 10,971,091

ARRAY SUBSTRATE, DISPLAY PANEL AND DRIVING METHOD THEREOF, AND DISPLAY DEVICE

BEIJING BOE OPTOELECTRONI...

1. An array substrate, comprising a plurality of pixel units arranged in an array, a plurality of data lines, a plurality of switch circuits, and a plurality of control lines,wherein each of the plurality of pixel units comprises at least four sub-pixel units corresponding to different colors, respectively,
when the array substrate displays a frame of image, in each row of the pixel units, polarities of pixel voltages received by two sub-pixel units corresponding to a same color in adjacent two pixel units are different, and
a polarity of each pixel voltage represents a magnitude of each pixel voltage relative to a common voltage;
the plurality of switch circuits is connected to the plurality of pixel units through the plurality of data lines;
the plurality of the switch circuits are divided into a plurality of first switch circuit groups and a plurality of second switch circuit groups, polarities of pixel voltages received by sub-pixel units connected to the plurality of first switch circuit groups are different from polarities of pixel voltages received by sub-pixel units connected to the plurality of second switch circuit groups; and
in each row of the pixel units, at least a part of switch circuits connected to all sub-pixel units of a same color is directly connected to a same control line among the plurality of control lines,
sub-pixel units connected to each of the plurality of switch circuits are located in a same column of sub-pixel units, and receive pixel voltages of a same polarity, and comprise sub-pixel units corresponding to two different colors.

US Pat. No. 10,971,090

METHOD FOR PREVENTING IMAGE STICKING IN DISPLAY PANEL

NOVATEK Microelectronics ...

1. A method for a source driver, for preventing image sticking in a display panel coupled to the source driver, the source driver comprising a first output driver and a second output driver having different polarities, the first output driver configured with a first driving capability and the second output driver configured with a second driving capability, the method comprising:obtaining an effective voltage of a pixel in the display panel, wherein the effective voltage of the pixel is a voltage driving liquid crystal molecules of the pixel to be twisted to a specific angle to generate an image; and
adjusting the second driving capability of the second output driver to be identical to the first driving capability of the first output driver, to allow the adjusted second driving capability to drive the effective voltage to reach a level having the same magnitude as a level of the effective voltage driven by the first source driver with the same variation of display data.

US Pat. No. 10,971,089

DRIVING METHOD OF DISPLAY PANEL AND DISPLAY DEVICE

HKC CORPORATION LIMITED, ...

1. A driving method of a display panel, comprising:dividing pixels on the display panel into a plurality of pairs of pixel sets, wherein each of the pairs of the pixel sets comprises a first pixel set and a second pixel set neighboring upon each other, and each of the first pixel set and the second pixel set comprises a first sub-pixel, a second sub-pixel and a third sub-pixel;
acquiring a first voltage signal and a second voltage signal according to a frame input signal look-up-table, wherein the first voltage signal and the second voltage signal are unequal to each other and correspond to each of the sub-pixels, a front viewing-angle mixed brightness of the sub-pixel driven by the first voltage signal and the second voltage signal alternately is equivalent to a front viewing-angle brightness of the sub-pixel driven by a frame input signal; and
driving the first sub-pixels of the first pixel set and the second pixel set by a first voltage signal and a second voltage signal of the first sub-pixel of the first pixel set, respectively; and driving the second sub-pixels of the first pixel set and the second pixel set by a second voltage signal and a first voltage signal of the second sub-pixel of the second pixel set, respectively,
wherein the first sub-pixels of the first pixel set and the second pixel set acquire a high voltage signal and a low voltage signal, respectively, and the second sub-pixels of the first pixel set and the second pixel set acquire a low voltage signal and a high voltage signal, respectively, to obtain a color shift compensation effect.

US Pat. No. 10,971,088

SUB-PIXEL RENDERING METHOD AND RENDERING APPARATUS

TRULY (HUIZHOU) SMART DIS...

1. A sub-pixel rendering method for a display device, wherein the display device comprises a first pixel array, the first pixel array comprises a plurality of first pixels and each of the first pixels comprises a plurality of sub-pixels, and the method comprises:acquiring a second pixel array of an original image, wherein each of a plurality of sub-pixels of the second pixel array has a grayscale value;
mapping the second pixel array of the original image onto the first pixel array;
searching for central positions of the sub-pixels of the first pixel array and the second pixel array,
determining a sub-pixel of the second pixel array which is located in a predetermined region of each sub-pixel in the first pixel array and has a same color as that of the sub-pixel in the first pixel array, and measuring a distance from the determined sub-pixel to the central position of the sub-pixel in the first pixel array;
calculating, on the basis of the distance, a ratio of the sub-pixels of the second pixel array to the sub-pixels of the first pixel array, and
calculating, on the basis of the grayscale values of the sub-pixels of the second pixel array and the ratio, grayscale values of all sub-pixels of the first pixel array,
wherein the ratio of the sub-pixels of the second pixel array to the sub-pixels of the first pixel array is calculated according to an equation:
coefficientRxCy=(1/rRxCyN)/(?(1/rRxCyN)
where coefficientRxCy represents a ratio of the sub-pixels of the second pixel array to the sub-pixels in the xthrow and the yth column of the first pixel array;
rRxCy represents a distance from the sub-pixel in the second pixel array to the sub-pixel in the xth row and the yth column of the first pixel array; and
N is a constant greater than 1.

US Pat. No. 10,971,087

DISPLAY DEVICE AND METHOD OF DRIVING THE SAME

LG DISPLAY CO., LTD., Se...

1. A display device comprising:a display panel including a left-eye display area and a right-eye display area; and
a timing controller configured to receive video signals having a first frequency to generate video data having a second frequency,
wherein the timing controller comprises a video separator configured to separate the video signals into first video signals including a plurality of frames to be output to the left-eye display area and second video signals including a plurality of frames to be output to the right-eye display area and a video extender configured to extract odd-numbered frames or even-numbered frames among frames of the first video signals and to extract even-numbered frames or odd-numbered frames among frames of the second video signals such that the extracted frames of the second video signals are not overlapped with the extracted frames of the first video signals,
wherein the video extender generates a first video data by extending the frames of the first video signals and a second video data by extending the frames of the second video signals and outputs the first video data and the second video data to the display panel,
wherein the video extender extends the first video signal having a first frame rate, of an nth frame to generate the first video data having a second frame rate for the nth frame and an (n+1)th frame, and extends the second video signal having the first frame rate of an (n+1)th frame (in a case of extending the first video signal of the nth frame) to generate the second video data having the second frame rate for the (n+1)th frame and an (n+2)th frame, where n is an integer, and
wherein the second frame rate is lower than the first frame rate.

US Pat. No. 10,971,086

PULSED BACKLIGHT SYSTEMS AND METHODS

Apple Inc., Cupertino, C...

6. A electronic device with a display, the display comprising:a backlight unit;
a liquid crystal display (LCD) unit configured to display first display content a first LCD frame rate,
a controller configured to cause the backlight unit to pulse a first backlight pulse pattern while the LCD unit provides the first display content at the first LCD frame rate;
the LCD unit further configured to display second display content at a second LCD frame rate;
the controller is further configured to cause the backlight unit to pulse a second backlight pulse pattern while the LCD unit provides the second display content at the second LCD frame rate;
the controller is further configured to split at least a first pulse of the second backlight pulse pattern between at least one pulse of the first backlight pulse pattern and at least one other pulse of the second backlight pulse pattern; and
wherein splitting at least the first pulse of the second backlight pulse pattern comprises preventing execution of the first pulse of the second backlight pulse pattern and adding equal portions of the first pulse of the second backlight pulse pattern to each of an immediately preceding pulse and an immediately following pulse.

US Pat. No. 10,971,085

POWER SAVING DISPLAY HAVING IMPROVED IMAGE QUALITY

Intel Corporation, Santa...

1. A system comprising:a display device that includes a plurality of pixels to form a display image; and
display control circuitry coupled to the display device to:
access an input indicative of a selected display power mode;
determine, for the display image at the selected display power mode:
a baseline power mode relationship between a baseline number of original pixel values and a baseline number of boosted pixel values used to form the display image, the baseline power mode relationship including:
a first line segment having a slope K1 associated with the baseline power mode relationship between the baseline original pixel values and the baseline boosted pixel values; and
a second line segment based on the number of baseline original pixel values and the number of baseline boosted pixel values and having a slope K0 given by the formula:
K0=(255?K1*(255?Xi))/Xi; and
a value representative of an allowable percentage of distorted original pixel values (X1) associated with the selected display power mode;
for respective ones of a plurality of test distorted original pixel percentages (Xin) between an upper distorted original pixel boundary limit and a lower distorted original pixel boundary limit:
select a test distorted original pixel percentage;
determine a test mode relationship between the selected test distorted original pixel percentage, a number of test original pixel values, and a number of test boosted pixel values; and
determine, for the display image, a test Peak Signal to Noise Ratio (PSNR) associated with the selected test distorted original pixel value percentage to provide a plurality of test PSNRs;
associate a quality loss value with the test distorted original pixel percentage, the quality loss value determined using a Mean Squared Error (MSE) and a histogram of the display image; and
select an operating distorted original pixel percentage from the plurality of test distorted original pixel percentages using the determined quality loss value associated with respective ones of the plurality of test distorted original pixel percentages.

US Pat. No. 10,971,084

DISPLAY DEVICE, CONTROL METHOD AND APPARATUS THEREOF

Shanghai Tianma AM-OLED C...

1. A method to control a display device, comprising:providing a preset color shift value;
selecting an initial duty and a target initial brightness which generate a color shift less than or equal to the preset color shift value;
calculating a corresponding initial grayscale according to the initial duty and the target initial brightness;
searching for an initial data voltage corresponding to the initial grayscale according to a gamma curve, wherein the initial data voltage is associated with the initial duty and the target initial brightness; and
performing a brightness adjustment, wherein the brightness adjustment comprises either a segmented or a mixed pulse width modulation dimming technique and a power modulation dimming technique, wherein the brightness adjustment is performed in a brightness interval from the target initial brightness to maximum brightness;
wherein the calculating a corresponding initial grayscale according to the initial duty and the target initial brightness comprises:
calculating the initial grayscale corresponding to the initial duty and the target initial brightness according to a formula (1):
(GrayA/255)k=LA/(Lmax*DA/Dmax)  (1)
wherein GrayA is a grayscale corresponding to a duty DA and brightness LA, k is a gamma value of the gamma curve, Lmax is the maximum brightness of the display device, and Dmax is a duty corresponding to the maximum brightness Lmax.

US Pat. No. 10,971,083

COMPENSATION METHOD AND COMPENSATION APPARATUS FOR DISPLAY PANEL, AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A compensation method for a display panel, wherein the display panel comprises a plurality of pixel units, each pixel unit comprises a pixel circuit and a light-emitting element, and the compensation method comprises:detecting a threshold voltage of a drive transistor in the pixel circuit;
detecting a maximum data voltage corresponding to a maximum brightness of the light-emitting element; and
based on the threshold voltage, the maximum data voltage and an expected display brightness, calculating a compensation display data voltage for the display panel to achieve the expected display brightness,
wherein the compensation display data voltage is calculated according to a following calculation formula:
Vgs=?L(Vgs1?Vth)+Vth
where Vgs represents the compensation display data voltage, Vgs1 represents the maximum data voltage, L represents the expected display brightness, and Vth represents the threshold voltage of the drive transistor.

US Pat. No. 10,971,082

DATA DRIVER AND ORGANIC LIGHT EMITTING DISPLAY DEVICE INCLUDING THE SAME

LG Display Co., Ltd., Se...

1. A data driver, comprising:an analog-to-digital converter;
a first amplifier circuit;
a first switch coupled to an output of the first amplifier circuit, the first switch configured to selectively couple the output of the first amplifier circuit to a first data line of a display panel and to selectively couple the output of the first amplifier circuit to a second data line of the display panel;
a second amplifier circuit;
a second switch coupled to an output of the second amplifier circuit, the second switch configured to selectively couple the output of the second amplifier circuit to the second data line and to selectively couple the output of the second amplifier circuit to the analog-to-digital converter; and
a third switch coupled to the output of the second amplifier circuit, the third switch configured to selectively couple the output of the second amplifier circuit to a sensing line of the display panel
wherein in a sensing driving mode, the output of the first amplifier circuit corresponds to a sensing data voltage to be supplied to a first pixel and a second pixel of the display panel, and the output of the second amplifier circuit corresponds to a reference voltage to be supplied to the first and second pixels, or sensing results of the first and second pixels according to a difference between the sensing data voltage and the reference voltage, and
wherein the first pixel is connected to the first data line and the sensing line, and the second pixel is connected to the second data line and the sensing line.

US Pat. No. 10,971,081

DRIVER CIRCUIT, LIGHT-EMITTING DISPLAY DEVICE, AND DRIVING METHOD

LG DISPLAY CO., LTD., Se...

1. A light-emitting display device comprising:a display panel having a plurality of subpixels, a plurality of data lines, a plurality of gate lines, a plurality of reference voltage lines, and a plurality of connecting lines connected to the plurality of reference voltage lines, respectively;
a data driver circuit driving the plurality of data lines; and
a gate driver circuit driving the plurality of gate lines,
wherein each of the plurality of subpixels is either directly connected to a respective reference voltage line or connected to a respective reference voltage line through a respective connecting line, and the plurality of connecting lines are disposed to cross the plurality of data lines,
wherein the plurality of data lines includes a first data line, and the plurality of reference voltage lines includes a first reference voltage line, and the plurality of connecting lines includes a first connecting line,
wherein a sensing period for a sensing target subpixel selected from among the plurality of subpixels includes:
a first period in which a sensing data voltage is supplied to the sensing target subpixel through the first data line, and a sensing reference voltage is supplied to the sensing target subpixel through either the first reference voltage line or the first connecting line connected to the first reference voltage line;
a second period in which a voltage of the first reference voltage line is increased; and
a third period in which a voltage of the first reference voltage line is detected when a predetermined time has passed after a start of the second period,
wherein, during the first period, the first data line is supplied with the sensing data voltage,
during the second period and the third period, the first data line is maintained at a voltage different from the sensing data voltage, and the first data line crosses the first connecting line that is electrically connected to the first reference voltage line.

US Pat. No. 10,971,080

DIFFERENTIAL DIFFERENCE AMPLIFIER CIRCUIT HAVING VARIABLE TRANSCONDUCTANCE

NOVATEK MICROELECTRONICS ...

1. A differential difference amplifier circuit in a data driver for providing image data to a display panel, the differential difference amplifier circuit comprising:a differential input stage circuit, comprising:
a first differential pair, wherein the first differential pair is biased by a first current source and receives a first input signal and an output signal; and
a second differential pair, wherein the second differential pair is biased by a second current source and receives a second input signal and the output signal;
a loading stage circuit coupled to the differential input stage circuit; and
an output stage circuit coupled to the loading stage circuit, wherein the output stage circuit is configured to generate the output signal;
wherein a magnitude of the first current source is controlled by a bias voltage generated by a bias generation circuit, the bias generation circuit comprises a first transistor, a second transistor, and a third switch coupled between a control terminal of the first transistor and a control terminal of the second transistor, and the third switch is controlled by a control signal.

US Pat. No. 10,971,079

MULTI-FRAME-HISTORY PIXEL DRIVE COMPENSATION

Apple Inc., Cupertino, C...

15. A method for operating a pixel drive compensation circuitry implemented in an electronic device, comprising:retrieving a first input pixel value of a first image frame and a second input pixel value of a second image frame, wherein the first input pixel value and the second input pixel value correspond to a first display pixel on an electronic display, and wherein the second image frame occurs after the first image frame;
performing pixel drive compensation to generate compensated second pixel data to compensate for a transient response variation that would otherwise occur on the electronic display due at least in part to a difference between the first input pixel value and the second input pixel value;
driving the first display pixel of the electronic display using the compensated second pixel data;
in response to determining that the first input pixel value satisfies a first condition, modifying the second input pixel value to produce a historical pixel value based at least in part on the first input pixel value, wherein the historical pixel value differs from the second input pixel value in an amount that takes into account a historical effect of the first input pixel value;
in response to determining that the first input pixel value does not satisfy the first condition, storing the second input pixel value as the historical pixel value without modification;
writing back the historical pixel value to memory;
retrieving a third input pixel value of a third image frame and the historical pixel value, wherein the third input pixel value corresponds to the first display pixel on the electronic display, and wherein the third image frame occurs after the second image frame;
performing pixel drive compensation based at least in part on the third input pixel value and the historical pixel value to generate compensated third pixel value to compensate for a transient response variation that would otherwise occur on the electronic display due at least in part to a difference between the first input pixel value, the second input pixel value, and the third input pixel value; and
driving the first display pixel of the electronic display using the compensated third pixel value.

US Pat. No. 10,971,078

PIXEL MEASUREMENT THROUGH DATA LINE

Ignis Innovation Inc., W...

8. A display system comprising:a plurality of pixel circuits arranged in rows and columns;
a source driver;
a voltage supply for providing a supply voltage;
an address driver;
a first pixel circuit of the plurality of pixel circuits coupled to the source driver over a data line and via a first node directly connected to the first pixel circuit, the first pixel circuit coupled to the voltage supply via a supply line, the first node, a first switch, and a supply voltage switch coupled together in series, the supply voltage switch coupled between the voltage supply and the first node, and coupled to the first switch, the first node coupled between the first pixel circuit and the supply voltage switch, a gate of each of the first switch and the supply voltage switch respectively coupled to the address driver; and
a controller coupled to the source driver, the address driver, and the voltage supply, the controller adapted to control the plurality of pixels and the first switch and the supply voltage switch, the controller further adapted to
provide programming signals to the first pixel circuit from the source driver via the data line and the first node, and
during at least one mode of operation of the first pixel circuit, providing the supply voltage to the first pixel circuit via the first node, the supply voltage switch, and the supply line.

US Pat. No. 10,971,077

ORGANIC LIGHT EMITTING DIODE DISPLAY DEVICE PERFORMING LOW FREQUENCY DRIVING

Samsung Display Co., Ltd....

1. An organic light emitting diode (OLED) display device comprising:a display panel including a plurality of pixels each having an OLED; and
a panel driver configured to drive the display panel,
wherein the panel driver receives input image data at an input frame frequency and determines whether the input image data represent a still image,
wherein, when the input image data do not represent the still image, the panel driver drives the display panel at a first output frame frequency substantially equal to the input frame frequency,
wherein, when the input image data represent the still image, the panel driver drives the display panel at a second output frame frequency lower than the input frame frequency for a low frequency driving time, and drives the display panel at a third output frame frequency higher than the second output frame frequency for a high frequency insertion time after the low frequency driving time, and
wherein the high frequency insertion time is determined based on at least one of a panel characteristic of the display panel and a representative gray level of the input image data.

US Pat. No. 10,971,076

DISPLAY DEVICE AND METHOD OF CONTROLLING THE SAME

TIANMA JAPAN, LTD., Kana...

1. A display device comprising:a pixel circuit on a substrate;
a data line on the substrate, the data line being configured to transmit a data signal for the pixel circuit;
a monitoring line on the substrate, the monitoring line being different from the data line; and
a monitoring circuit,
wherein the monitoring circuit is configured to:
monitor a signal at a monitoring point on a path of the data signal with the monitoring line; and
supply a correction signal in place of the data signal to the pixel circuit via the monitoring line and the monitoring point in response to detection of transmission failure of the data signal.

US Pat. No. 10,971,075

DISPLAY DEVICE AND ELECTRONIC DEVICE INCLUDING THE SAME

Semiconductor Energy Labo...

1. A semiconductor device comprising:a first transistor, a second transistor, a first wiring, a second wiring, a third wiring, and a fourth wiring which outputs a signal,
wherein one of a source electrode and a drain electrode of the first transistor is electrically connected to the fourth wiring,
wherein the other of the source electrode and the drain electrode of the first transistor is electrically connected to the second wiring through a first conductive layer,
wherein one of a source electrode and a drain electrode of the second transistor is electrically connected to the fourth wiring,
wherein the other of the source electrode and the drain electrode of the second transistor is electrically connected to the third wiring,
wherein, in the first transistor, an area where a gate electrode and the one of the source electrode and the drain electrode overlap with each other is larger than an area where the gate electrode and the other of the source electrode and the drain electrode overlap with each other,
wherein, in the second transistor, an area where a gate electrode and the one of the source electrode and the drain electrode overlap with each other is smaller than an area where the gate electrode and the other of the source electrode and the drain electrode overlap with each other,
wherein the first wiring includes a first opening portion,
wherein the second wiring includes a second opening portion,
wherein the first conductive layer includes a region overlapping with the first opening portion.

US Pat. No. 10,971,074

DISPLAYS WITH MULTIPLE SCANNING MODES

Apple Inc., Cupertino, C...

8. A display operable in a first scanning mode and a second scanning mode, the display comprising:a plurality of display pixels arranged in rows and columns;
display driver circuitry configured to provide image data to the display pixels; and
a scan driver, wherein the scan driver comprises a shift register configured to scan rows of display pixels by asserting gate line signals in sequence, wherein while operating in the first scanning mode the scan driver begins scanning a first row for a given frame before scanning a last row for a previous frame, and wherein while operating in the second scanning mode the scan driver begins scanning a first row for a given frame after scanning a last row for a previous frame.

US Pat. No. 10,971,073

DISPLAY ELEMENT, DISPLAY DEVICE, AND ELECTRONIC DEVICE

Sony Corporation, Tokyo ...

1. A display element comprising:a light-emitting unit of a current drive type; and a drive unit that drives the light-emitting unit, wherein
the drive unit includes a capacitance unit, a drive transistor that causes a current corresponding to a voltage held by the capacitance unit to flow through the light-emitting unit, and a write transistor that writes a signal voltage to the capacitance unit,
the drive transistor and the write transistor are formed in a state of being separated by an element isolation region, on a semiconductor substrate, and
a capacitance generated in a portion where the drive transistor and the write transistor face each other through the element isolation region functions as at least a part of the capacitance unit.

US Pat. No. 10,971,072

METHOD AND DEVICE FOR DRIVING DISPLAY PANEL

HEFEI XINSHENG OPTOELECTR...

1. A method for driving a display panel, wherein the display panel comprises a plurality of sub-pixels of different colors, each sub-pixel comprising a driving element, a first switch, a second switch, and a light emitting device; a control terminal of the first switch is coupled to a first control terminal, a first terminal of the first switch is coupled to a data line, and a second terminal of the first switch is coupled to a control terminal of the driving element; a control terminal of the second switch is coupled to a second control terminal, a first terminal of the second switch is coupled to a sensing line, and a second terminal of the second switch is coupled to a first terminal of the driving element and a first terminal of the light emitting device;the method comprises:
during a period of writing a data signal to any one of the plurality of sub-pixels, simultaneously providing an on signal to the first control terminal and the second control terminal of the sub-pixel, and then providing an off signal to the second control terminal before providing an off signal to the first control terminal, wherein a time difference between providing the off signal to the first control terminal and providing the off signal to the second control terminal is determined by:
determining a plurality of candidate time differences according to a highest brightness threshold of the sub-pixels of each color;
for each candidate time difference, displaying, by the display panel, a same test picture using the candidate time difference, and detecting picture display quality of the display panel when the test picture is displayed by the display panel using the candidate time difference; and
determining a candidate time difference corresponding to an optimal picture display quality as the time difference.

US Pat. No. 10,971,071

ORGANIC LIGHT EMITTING DISPLAY PANEL HAVING SUB-PIXELS WITH DIFFERENT COUPLING CAPACITORS

Samsung Display Co., Ltd....

1. An organic light emitting display panel comprising a first sub-pixel, a second sub-pixel, and a third sub-pixel, each of the first and second sub-pixels comprising:a switching transistor connected to a data line, and having a gate electrode configured to receive a scan signal;
a driving transistor connected to the switching transistor;
an emission control transistor connected to the driving transistor, and having a gate electrode configured to receive an emission control signal;
an emission control line of which a part is the gate electrode of the emission control transistor;
an organic light emitting diode electrically connected to the driving transistor through a via hole; and
a coupling capacitor comprising:
a first electrode comprising a portion of the emission control line; and
a second electrode comprising a first electrode layer of the organic light emitting diode overlapping the portion of the emission control line,
wherein capacitances of the coupling capacitors of the first and second sub-pixels are different.

US Pat. No. 10,971,070

DRIVER CIRCUIT AND ITS WORKING METHOD AND DISPLAY DEVICE

CHENGDU BOE OPTOELECTRONI...

1. A driver circuit applicable to a display substrate, comprising:a driver chip coupled with a plurality of signal lines;
a plurality of signal line leads corresponding to the plurality of signal lines in a one-to-one manner; and
a plurality of short-circuit shielding circuits corresponding to the plurality of signal line leads in a one-to-one manner;
wherein each of the plurality of short-circuit shielding circuits is coupled between corresponding one of the plurality of signal line leads and corresponding one of the plurality of signal lines, and is configured to turn on or off a connection between the corresponding one of the plurality of signal line leads and the corresponding one of the plurality of signal lines,
wherein the plurality of signal lines include first signal lines configured to transmit a positive voltage signal and second signal lines configured to transmit a negative voltage signal;
each of the plurality of short-circuit shielding circuits includes one of a first diode and a second diode;
an anode of the first diode is coupled with one signal line lead which is one of the plurality of signal line leads and which is coupled with the short-circuit shielding circuit including the first diode; and a cathode of the first diode is coupled with corresponding one of the first signal lines;
a cathode of the second diode is coupled with one signal line lead which is one of the plurality of signal line leads and which is coupled with the short-circuit shielding circuit including the second diode; and an anode of the second diode is coupled with corresponding one of the second signal lines.

US Pat. No. 10,971,069

PIXEL DRIVING CIRCUIT, DRIVING METHOD THEREOF AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A pixel driving circuit for driving a light-emitting unit, comprising:a driving unit connected to the light-emitting unit;
a capacitor unit, one end of the capacitor unit is connected to the driving unit, and a second end of the capacitor unit is connected to a power source signal input end;
a data write-in unit connected to a corresponding gate line in a row direction, a corresponding data line in a column direction and the driving unit;
a power source control unit connected to a first light-emitting control end, the power source signal input end and the driving unit; and
a first light-emitting control unit connected to a second light-emitting control end, the power source signal input end and the driving unit, and configured to, within a predetermined time period of a light-emitting stage, control the power source signal input end to be electrically connected to the driving unit under the control of the second light-emitting control end, stop the operation of the driving unit, and enable the light-emitting unit stop emitting light.

US Pat. No. 10,971,068

SYSTEM AND METHODS FOR THERMAL COMPENSATION IN AMOLED DISPLAYS

Ignis Innovation Inc., W...

1. A semiconductor display device, comprising:a plurality of select lines;
a plurality of pixels arranged in an array, each pixel coupled to a select line of the plurality of select lines and including a drive transistor and an organic light emitting device coupled to the drive transistor, the plurality of pixels including a first pixel and one or more second pixels; and
a controller coupled to the plurality of pixels via the plurality of select lines, and configured to:
select each pixel of the plurality of pixels with a corresponding select line of the plurality of select lines that each pixel of the plurality of pixels is coupled to for programming each pixel of the plurality of pixels to control the brightness thereof;
select a thermal transistor of each second pixel with use of the select line coupled to the second pixel and measuring an output from the thermal transistor to determine one or more pixel temperatures of the one or more second pixels; and
estimate a temperature of the first pixel at a first time with use of the one or more pixel temperatures determined for the one or more second pixels.

US Pat. No. 10,971,067

AMOLED PIXEL DRIVING CIRCUIT, DRIVING METHOD AND TERMINAL

WUHAN CHINA STAR OPTOELEC...

1. An active matrix organic light-emitting diode (AMOLED) pixel driving circuit, comprising: a first thin film transistor (TFT), a second TFT, a third TFT, a fourth TFT, a fifth TFT, a sixth TFT, a storage capacitor, and an organic light-emitting diode (OLED), wherein the first TFT being a driving TFT;the first TFT having a gate electrically connected to a first node, a source electrically connected to a second node, and a drain electrically connected to a third node;
the second TFT having a gate receiving a second light-emitting control signal, a source receiving a positive power voltage, and a drain electrically connected to the second node;
the third TFT having a gate receiving a scan signal, a source receiving a reference voltage, and a drain electrically connected to a fourth node;
the fourth TFT having a gate receiving the scan signal, a source receiving a data signal, and a drain electrically connected to the first node;
the fifth TFT having a gate receiving a first light-emitting control signal, a source electrically connected to the fourth node, and a drain electrically connected to the first node;
the sixth TFT having a gate receiving the scan signal, a source receiving a low voltage, and a drain electrically connected to the third node;
the storage capacitor having one end electrically connected to the fourth node and the other electrically connected to the second node;
the OLED having an anode connected to the third node and a cathode receiving a negative power voltage;
the AMOLED pixel driving circuit having a reset phase, a compensation phase and a light-emitting phase;
when the AMOLED pixel driving circuit being in a reset phase, the second TFT, the third TFT, and the fourth TFT and the sixth TFT being turned on, and the fifth TFT being turned off; when the AMOLED pixel driving circuit being in the compensation phase, the third TFT, the fourth TFT, and the sixth TFT being turned on, the second TFT and the fifth TFT being turned off; when the AMOLED pixel driving circuit is in the light-emitting phase, the second TFT and the fifth TFT being turned on, the third TFT, the fourth TFT and the sixth TFT being turned off,
wherein the gate of the third TFT, the gate of the fourth TFT, and the gate of the sixth TFT all receive the scan signal that is common to the third TFT, the fourth TFT, and the sixth TFT, such that the third TFT, the fourth TFT, and the sixth TFT are controlled by one same scan signal; and wherein the low voltage supplied to the source of the sixth TFT, the reference voltage supplied to the source of the third TFT, and the data signal supplied to the fourth TFT are different from one another.

US Pat. No. 10,971,066

DISPLAY DEVICE AND DRIVING METHOD THEREOF

SAMSUNG DISPLAY CO., LTD....

1. A display device comprising:a processor; and
a display panel which receives an image signal, an image control signal, and an image processing signal from the processor and displays an image corresponding to the image signal corrected based on the image processing signal
wherein the display panel time-divisionally receives the image signal and the image processing signal through a same plurality of image signal channels as each other based on a level of a same single data enable signal,
wherein the display panel receives a packet header of the image processing signal through a first image signal channel among the plurality of image signal channels, and
wherein the display panel receives a packet data of the image processing signal through at least another image signal channel among the plurality of image signal channels,
wherein the display panel receives the image processing signal in a blank period except an active period in which the image signal is received,
wherein the display panel comprises:
a packet header detector coupled to the processor through a data enable signal channel and the first image signal channel,
a packet data extractor coupled to the processor through the at least another image signal channel, and
an image processor which corrects the image signal based on the image processing signal,
wherein the display panel receives the data enable signal having a first level through the data enable signal channel during the active period, and receives the data enable signal having a second level through the data enable signal channel during the blank period, and
wherein the packet header detector detects whether the packet header of the image processing signal has been transmitted through the first image signal channel while the data enable signal having the second level is being received.

US Pat. No. 10,971,065

DISPLAY DEVICE, AND METHOD OF DETERMINING A POWER SUPPLY VOLTAGE

Samsung Display Co., Ltd....

1. A display device comprising:a display panel comprising first color sub-pixels, second color sub-pixels, and third color sub-pixels;
a data driver configured to provide data signals to the display panel;
a scan driver configured to provide scan signals to the display panel;
a power supply configured to provide a power supply voltage to the display panel; and
a controller configured to control the data driver, the scan driver, and the power supply, the controller comprising:
a pure color index calculator configured to calculate first, second, and third pure color indexes of first, second, and third sub-pixel data for the first, second, and third color sub-pixels;
a pure color index histogram generator configured to:
divide the first, second, and third sub-pixel data into first, second, and third high pure color sub-pixel data, and first, second, and third low pure color sub-pixel data according to the first, second, and third pure color indexes;
generate first, second, and third high pure color index histograms according to gray levels of the first, second, and third high pure color sub-pixel data; and
generate first, second, and third low pure color index histograms according to gray levels of the first, second, and third low pure color sub-pixel data;
a histogram analyzer configured to determine first, second, and third effective maximum gray levels for the first, second, and third color sub-pixels according to the first, second, and third high pure color index histograms and the first, second, and third low pure color index histograms; and
a power supply voltage controller configured to:
determine a voltage level of the power supply voltage according to the first, second, and third effective maximum gray levels; and
provide a power supply voltage control signal to the power supply indicating the determined voltage level of the power supply voltage,
wherein the power supply is configured to generate the power supply voltage having the determined voltage level.

US Pat. No. 10,971,064

DISPLAY APPARATUS

LG DISPLAY CO., LTD., Se...

1. A display apparatus comprising:a display panel including a plurality of pixels configured to display an image,
each of at least one of the plurality of pixels including a pixel circuit and a light emitting device connected to the pixel circuit,
wherein the pixel circuit includes:
a driving transistor controlling a driving current flowing at the light emitting device;
a data supply transistor selectively providing a data voltage to a first node which is at a source electrode of the driving transistor;
a first light emitting control transistor selectively connecting the first node to a second node which is at an electrode of the light emitting device;
a first capacitor connected between the second node and a fourth node which is at a gate electrode of the driving transistor; and
a second capacitor connected between the second node and a gate electrode of the data supply transistor.

US Pat. No. 10,971,063

PIXEL CIRCUIT AND DISPLAY DEVICE

SeeYA Optronics Co., Ltd....

1. A pixel circuit, comprising:a pixel unit, comprising an operating current generating circuitry and a light emission control circuitry, wherein the operating current generating circuitry has a gate voltage terminal and is configured to generate an operating current according to a voltage of the gate voltage terminal, and the light emission control circuitry is connected in series with the operating current generating circuitry, and is configured to control whether to provide the operating current to a light emitting device according to a light emission control signal;
a driving control circuit, comprising a data current circuitry and a current adjusting circuitry, wherein the data current circuitry is configured to provide a data current and to input the data current to the gate voltage terminal, and the current adjusting circuitry is configured to control whether to input a compensation current to the gate voltage terminal according to a current value of the operating current; and
a first transistor, wherein a gate of the first transistor is configured to be input with a reset control signal, a source of the first transistor is configured to be input with a reset voltage, and a drain of the first transistor is coupled with an anode of the light emitting device.

US Pat. No. 10,971,062

CONTROL COMPONENT FOR A CURRENT-DRIVEN OPTICAL MEDIA

Flexenable Limited, Camb...

1. A control component for controlling a current-driven optical media, the control component comprising a thin film transistor (TFT) for driving a pixel of an active matrix optoelectronic device, the control component comprising:a substrate bearing a plurality of conducting layers, each being separated by respective dielectric and/or semiconducting layers, to define a plurality of TFTs and plurality of pixel electrodes, each of the plurality of pixel electrodes being electrically connected to at least one of the plurality of TFTs; wherein each TFT comprises:
first and second ones of the conducting layers defining source/drain electrodes of the TFT and a gate electrode of the TFT, the source/drain and gate electrodes being arranged such that a first storage capacitor (C1) results from the overlap of the source and gate electrode within the TFT, and the drain electrode is connected to a respective pixel electrode;
third one of the conducting layers arranged to more strongly capacitively couple to the source or gate electrode than the pixel electrode or a semiconductor channel,
wherein a first plate of a second capacitor (C2) is defined by the third one of the conducting layers within the TFT, and a second plate of the second capacitor (C2) is defined by the gate electrode or the source electrode, the second capacitor (C2) providing an additional storage capacitance to the gate electrode,
wherein the first storage capacitor and second storage capacitor are electrically connected in parallel, wherein current for the current-driven optical media does not flow through the first plate, and wherein dynamic power is dissipated via the first plate.

US Pat. No. 10,971,061

CONTROL SCHEME FOR A SCANNING DISPLAY

FACEBOOK TECHNOLOGIES, LL...

1. A display system, comprising:a light source including a plurality of emitters arranged in a column and circuitry configured to drive the plurality of emitters based on image data, wherein each emitter of the plurality of emitters corresponds to a separate row in the column, is a same color as other emitters in the column, and is driven based on a same value of the image data, the value of the image data determining a brightness of light emitted by the emitter of the plurality of emitters;
a scanning assembly including a reflective surface facing the light source, the reflective surface being rotatable in at least one dimension; and
a controller configured to:
generate the image data;
control a rotational movement of the reflective surface using a control signal, the control signal including periodic, non-linear pulses that cause the reflective surface to rotate through a range of scan angles, thereby forming an output image based on reflection of light emitted by the plurality of emitters, wherein the rotational movement causes the reflective surface to reflect light emitted by different emitters of the plurality of emitters onto a same pixel of the output image;
supply the image data to the light source in synchronization with the rotational movement of the reflective surface; and
compensate for changes in a speed of the rotational movement, the compensating comprising adjusting emission durations for different rows in the column during emission periods of the plurality of emitters, such that a first emission duration corresponding to the control signal at a first time is different than a second emission duration corresponding to the control signal at a second time, and wherein the compensating further comprises adjusting a rate at which the image data is supplied by the controller such that less time is spent supplying the image data to drive a particular row of the column when the rotational movement is faster than when the rotational movement is slower.

US Pat. No. 10,971,060

METHOD OF ADJUSTING DISPLAY BRIGHTNESS, LIGHT-EMISSION CONTROL CIRCUIT AND DISPLAY DEVICE

Boe Technology Group Co.,...

1. A method of adjusting display brightness applied to a light-emission control circuit, wherein the light-emission control circuit is configured to generate a light-emission control signal configured to control a light-emission of a display device, wherein the method comprises:adjusting, in the case that a display brightness of the display device is not within a predetermined brightness range, a duty ratio of the light-emission control signal, to enable the display brightness of the display device to fall into the predetermined brightness range,
wherein the light-emission control circuit is configured to generate the light-emission control signal in response to a frame start signal, and the adjusting the duty ratio of the light-emission control signal comprises: adjusting the duty ratio of the light-emission control signal by adjusting a duty ratio of the frame start signal.

US Pat. No. 10,971,059

DISPLAY DEVICE AND CONTROL METHOD THEREOF

BOE TECHNOLOGY GROUP CO.,...

1. A display device comprising:a display panel divided into n regions along a horizontal viewing direction, wherein n is a positive integer and n?2;
a detection unit configured to detect a viewing angle corresponding to each of the n regions, the viewing angle being an angle between a sight line of a human eye and the display panel, wherein the detection unit comprises m bending degree detection subunits configured to detect a bending degree of the display panel in the region, wherein m is a positive integer and m?n, wherein if m is greater than n, a region having a larger bending degree among the n regions is provided with at least two said bending degree detection subunits, and wherein each of the m bending degree detection subunits comprises a curvature sensor; and
a control unit configured to adjust, based on the viewing angle, at least one of:
a grayscale voltage value of a region of the display panel corresponding to the viewing angle; and
a brightness of a part of a backlight of the display panel corresponding to the region corresponding to the viewing angle, wherein the viewing angle is represented by at least one of the following parameters:
a distance from a viewing position to each of the n regions of the display panel; and
the bending degree of the display panel in each of the n regions.

US Pat. No. 10,971,058

DISPLAY APPARATUS

Au Optronics Corporation,...

1. A display apparatus, comprising:a plurality of pixels, each of the pixels comprising:
a first pixel driver circuit and a second pixel driver circuit;
a first driver pad and a second driver pad, electrically connected to the first pixel driver circuit and the second pixel driver circuit, respectively;
a first light-emitting diode element, wherein a first electrode of the first light-emitting diode element is electrically connected to the first driver pad;
a first connection line and a second connection line, electrically connected to the first pixel driver circuit and the second pixel driver circuit, respectively; and
a first repair pad and a second repair pad, electrically connected to the first connection line and the second connection line, respectively, and structurally separated from the first driver pad and the second driver pad,
wherein a first pixel of the pixels further comprises a second light-emitting diode element, the second light-emitting diode element overlaps the first repair pad and the second repair pad of the first pixel, and a first electrode of the second light-emitting diode element is electrically connected to the second repair pad.

US Pat. No. 10,971,057

DISPLAY APPARATUS INCLUDING LIGHT EMITTING DIODE MODULE AND LIGHT EMITTING DIODE DRIVER AND CONTROL METHOD THEREOF

Samsung Electronics Co., ...

1. A display apparatus, comprising:a Light Emitting Diode (LED) module including a plurality of light emitting diodes;
an LED driver including a switching element comprising switching circuitry, the LED driver configured to change a switching frequency of the switching element based on an intensity of a current provided to the LED module; and
a processor configured to generate a Pulse Width Modulation (PWM) dimming signal based on pixel information of an input image and to provide the PWM dimming signal to the LED driver,
wherein the processor is further configured to control the LED driver to increase the switching frequency of the switching element within a dimming duty of the PWM dimming signal by reducing the intensity of the current provided to the LED module based on a pixel value of the input image being less than a threshold value.

US Pat. No. 10,971,056

DISPLAY DEVICE

MITSUBISHI ELECTRIC CORPO...

1. A display device comprising:a display unit comprising an image display area capable of individually displaying different images in a first display area and a second display area, the second display area being set in a part of the image display area, the first display area being a part of the image display area except the second display area, the display unit displaying a first image in the first display area and a second image in the second display area to thereby sequentially display, per frame, an entire image in which the first image is superimposed by the second image in the image display area; and
a luminance correction controller to correct luminance of the entire image per the frame, wherein
the luminance correction controller includes
a first luminance information calculator to calculate luminance of the first image,
a second luminance information calculator to calculate luminance of the second image,
a correction coefficient calculator comprising a first correction coefficient calculator to calculate a first luminance correction coefficient for correcting the luminance of the first image; and
a second correction coefficient calculator to calculate a second luminance correction coefficient for correcting the luminance of the second image,
a first correction calculator to correct the luminance of the first image by using the first luminance correction coefficient, and
a second correction calculator to correct the luminance of the second image by using the second luminance correction coefficient,
the correction coefficient calculator performs a determination whether a sum of the luminance of the first image and a predetermined lower-limit value on the luminance of the second image is less than or equal to a predetermined upper-limit value on luminance of the entire image that is based on the luminance of the first and second images,
the first correction coefficient calculator and the second correction coefficient calculator respectively and individually calculate, based on the determination result, the first luminance correction coefficient corresponding to the luminance of the first image and the second luminance correction coefficient corresponding to the luminance of the second image such that the luminance of the entire image is brought to the predetermined upper-limit value or less,
the luminance correction controller gives priority to making the second correction coefficient calculator calculate the second luminance correction coefficient over making the first correction coefficient calculator calculate the first luminance correction coefficient so as to correct the luminance of the second image by using the preferentially calculated second luminance correction coefficient, to thereby perform control to bring the luminance of the entire image to the predetermined upper-limit value or less, and
the display unit displays the first image having the luminance corrected by the first correction calculator in the first display area, and displays the second image having the luminance corrected by the second correction calculator in the second display area.

US Pat. No. 10,971,055

DISPLAY ADJUSTMENT METHOD AND DISPLAY DEVICE

HKC Corporation Limited, ...

1. A display adjustment method, wherein the display adjustment method comprises the steps of:obtaining a first pixel data of an image displayed by the display device;
converting the first pixel data into a second pixel data after the first pixel data enters a timing controller, wherein the amount of stored data of the second pixel data is greater than the amount of stored data of the first pixel data;
converting at least one of the second pixel data into sub-pixel data whose amount of stored data is reduced relative to the second pixel data to obtain a corresponding third pixel data; and
outputting the third pixel data, and wherein
the step of converting at least one of the second pixel data into sub-pixel data whose amount of stored data is reduced relative to the second pixel data to obtain a corresponding third pixel data comprises:
treating at least one sub-pixel data in the second pixel data as reference sub-pixel data, and treating other sub-pixel data as a target sub-pixel data; and
calculating a gray-scale difference between each of the target sub-pixel data and one of the reference sub-pixel data, and replacing the each of the target sub-pixel data with the gray-scale difference regarding the each of the target sub-pixel data, and obtaining the corresponding third pixel data, wherein the corresponding third pixel data comprises the gray-scale difference regarding each of the target sub-pixel data, and the reference sub-pixel data.

US Pat. No. 10,971,054

DISPLAY PANEL

WUHAN CHINA STAR OPTOELEC...

1. A display panel, comprising:at least two pixel repeating units arranged in an array, the pixel repeating units comprising a first pixel, a second pixel, and a third pixel;
wherein the first pixel, the second pixel, and the third pixel are ones of red, green, and blue pixels; the first pixel, the second pixel, and the third pixel are different from each other;
wherein a ratio y1 of an aperture ratio of the red pixel to an aperture ratio of the green pixel is in the range of 0.78e (?1.98r)?y1?2.297e (?1.85r), and 0.1?y1?3, where r is a ratio of a luminous efficiency of the red pixel to a luminous efficiency of the green pixel; and
wherein a ratio y2 of an aperture ratio of the blue pixel to the aperture ratio of the green pixel is in a range of 1.32e (?10.7b)?y2?5.95e (?14.1b), and 0.3?y2?4, where b is a ratio of a luminous efficiency of the blue pixel to the luminous efficiency of the green pixel.

US Pat. No. 10,971,053

ELECTRONIC DEVICE FOR CHANGING CHARACTERISTICS OF DISPLAY ACCORDING TO EXTERNAL LIGHT AND METHOD THEREFOR

Samsung Electronics Co., ...

1. An electronic device comprising:a display;
a sensor;
a memory; and
at least one processor operably connected to the display, the sensor, and the memory,
wherein the at least one processor is configured to:
in response to identifying that the electronic device is being worn by a user, identify first information regarding external light directed to the electronic device by using the sensor,
based on the first information regarding external light and second information regarding the user, acquire first frame data,
in response to acquiring the first frame data, control the display to display the first frame data,
identify second frame data distinguished from the first frame data from an application stored in the memory while the first frame data is displayed on the display,
in response to identifying the second frame data, adjust a color of at least one of multiple pixels included in the second frame data at least partially based on the first frame data, and
control the display based on at least one of the first frame data or the adjusted second frame data.