US Pat. No. 10,171,436

DISTRIBUTED LEARNING AND AGING FOR MANAGEMENT OF INTERNET PROTOCOL (IP) ADDRESSES

Juniper Networks, Inc., ...

1. A method comprising:receiving, by a device, a packet associated with a malicious source,
the device including a plurality of security process units (SPUs) arranged in a ring of SPUs;
receiving back, by a first SPU in the ring of SPUs, a delete query message generated by the first SPU;
changing, by the first SPU, a first entry, associated with the packet, of the first SPU based on receiving back the delete query message; and
providing, by the first SPU and based on changing the first entry of the first SPU, a delete action message to a second SPU in the ring of SPUs,
the delete action message including an instruction to change a state of a second entry of the second SPU, and
the second entry corresponding to the first entry.

US Pat. No. 10,171,435

DEVICES THAT UTILIZE RANDOM TOKENS WHICH DIRECT DYNAMIC RANDOM ACCESS

IronClad Encryption Corpo...

1. One or more devices that encrypt data transmitted to or decrypt data received from or both transmit said data to and decrypt said data received from said devices that utilize one or more master keys comprising:at least one computer processing unit (CPU) with computational capabilities that is connected to and controls a computer memory via an address bus and a data bus where said address bus accesses a designated range of computer memories and range of memory bits and said data bus provides a flow of transmission(s) into and out of said CPU and computer memory;
at least one encrypter or decrypter or both an encrypter and a decrypter that encrypt or decrypt or both encrypt and decrypt said data or associated data files or both said data and said associated data files that utilize one or more master keys and one or more key selectors, where one or more key selectors provide selection and provision of one or more encryption keys for each segment of bit by bit data or byte by byte data or both bit by bit data and byte by byte data, wherein said master keys and said key selectors produce a specific set of one or more executable encryption keys that encrypt or decrypt or both encrypt and decrypt said data or said associated data files or both said data and said associated data files where one or more said key selectors coincide with at least one value that directly corresponds with created cipher data or created cipher data files or both said created cipher data and said created cipher data files,
and wherein said key selectors are also encrypted and decrypted,
and wherein said key selectors and said created cipher data and said created cipher data files produce result data and result data files where said created cipher data and said created cipher data files together with said result data and said result data files are sealed to produce encrypted data and encrypted data files that are only encrypted and decrypted with one or more said master keys and one or more said key selectors.

US Pat. No. 10,171,431

SECURE MESSAGE HANDLING OF AN APPLICATION ACROSS DEPLOYMENT LOCATIONS

International Business Ma...

1. A method for secure message handling of an application across deployment locations, said method comprising:dividing, by one or more processors of a computer system, the application into multiple processing nodes which process messages and which can be deployed in multiple different locations, wherein the application processes a message comprising a plurality of data aspects, wherein each data aspect in the message includes aspect data having a data aspect value in one or more fields in the message, and wherein one or more data aspects of the plurality of data aspects include respective deployment constraints on locations in which the aspect data in the one or more data aspects is deployed;
said one or more processors analyzing the application to identify one or more processing nodes of the multiple processing nodes that reference the one or more data aspects;
said one or more processors ascertaining whether the one or more data aspects are accessed by an identified processing node of the multiple processing nodes, wherein access to each data aspect of the one or more data aspects requires a data aspect value of said each data aspect of the one or more data aspects to be known;
if said ascertaining ascertains that the one or more data aspects are accessed by the identified processing node, then said one or more processors determining a restriction for the identified processing node based on the respective deployment constraints included in the accessed one or more data aspects and deploying the identified processing node according to the determined restriction for the identified processing node;
if said ascertaining ascertains that none of the one or more data aspects are accessed by the identified processing node, then said one or more processors marking the identified processing node or a preceding processing node that precedes the identified processing node to indicate a required tokenization of the one or more data aspects, said tokenization removing the deployment constraints for the identified processing node.

US Pat. No. 10,171,430

MAKING A SECURE CONNECTION OVER INSECURE LINES MORE SECURE

1. A communication system comprising:encryption circuitry;
formatter circuitry electrically coupled with the encryption circuitry; and
transmitter circuitry electrically coupled with the formatter circuitry, wherein:
the encryption circuitry is configured for:
receiving user datagrams;
determining a first packet-to-packet boundary, a second packet-to-packet boundary, and a third packet-to-packet boundary of the user datagrams;
encrypting the user datagrams to provide encrypted datagrams;
calculating a first checksum for encrypted data between the first packet-to-packet boundary and the second packet-to-packet boundary, wherein the first checksum is a first quantity of bits;
inserting the first checksum to the encrypted datagrams at the second packet-to-packet boundary;
calculating a second checksum for encrypted data between the second packet-to-packet boundary and the third packet-to-packet boundary, wherein the second checksum is a second quantity of bits and the second quantity of bits is greater than the first quantity of bits; and
inserting the second checksum to the encrypted data at the third packet-to-packet boundary, and
providing the encrypted datagrams, the first checksum, and the second checksum to the formatter circuitry,
wherein the encryption circuitry is further configured to provide an overhead communications channel having a variable bitrate,
wherein the variable bitrate is determined at least in part by a datagram bitrate and a fixed payload availability of the formatted bit stream;
the formatter circuitry is configured for:
inserting the encrypted datagrams, the first checksum, and the second checksum as payload data to a formatted bit stream having a total bitrate of approximately 10 gigabits per second; and
providing the formatted bit stream to the transmitter circuitry, wherein the formatted bit stream is compliant to a public switched network; and
the transmitter circuitry is configured for optically transmitting the formatted bit stream over the public switched network.

US Pat. No. 10,171,429

PROVIDING SECURITY TO VIDEO FRAMES

ARRIS Enterprises LLC, S...

1. A method of processing a compressed and encrypted video media program, comprising:processing at least a portion of the video media program in a video player that includes a computer processor for processing at least a portion of the video media program, the video player operable for:
receiving the media stream, wherein the video media stream is comprised of one or more chunks;
subdividing the chunks into one or more packets, wherein one or more of the packets include video data;
obfuscating or de-obfuscating at least some of the video data, wherein the step of obfuscating or de-obfuscating comprises obfuscating or de-obfuscating the video data using a caption handling with skip and select approach where only the video data in a first set of packets is de-obfuscated so that caption data is extracted; and
concatenating the video data into one or more frames for playback by the video player.

US Pat. No. 10,171,428

CONFIDENTIAL DATA MANAGEMENT METHOD AND DEVICE, AND SECURITY AUTHENTICATION METHOD AND SYSTEM

Rowem Inc., Seoul (KR)

1. A secure authentication method for performing secure authentication of a user by an authentication system, the secure authentication method comprising:receiving, by a service server, a service request from a first communication terminal;
transmitting, by a security server, a notification message including a stored decryption key to a second communication terminal in response to a notification message transmission request received from the service server;
decrypting, by the second communication terminal, a stored encrypted code table using the decryption key received from the security server;
outputting, by the second communication terminal, a security keypad to a screen, and when at least one input value is received through the security keypad, identifying each code mapped to the received at least one input value in the decrypted code table;
generating, by the second communication terminal, authentication information consisting of a combination of each identified code, and transmitting the authentication information to the service server; and
authenticating, by the service server, the first communication terminal based on the authentication information received from the second communication terminal.

US Pat. No. 10,171,426

HOME NETWORK CONTROLLING APPARATUS AND METHOD TO OBTAIN ENCRYPTED CONTROL INFORMATION

SAMSUNG ELECTRONICS CO., ...

1. A method of controlling, by a control device, at least one device by using control information, the method comprising:receiving, from a server, information used to configure a user interface or process an event related to controlling the at least one device by the control device, which has not been encrypted;
receiving, from the server, control information used to control at least one device, which has been encrypted using an encryption process;
transmitting a control command for controlling the at least one device according to the control information.

US Pat. No. 10,171,425

ACTIVE FIREWALL CONTROL FOR NETWORK TRAFFIC SESSIONS WITHIN VIRTUAL PROCESSING PLATFORMS

Keysight Technologies Sin...

1. A method for network traffic session control within virtual processing environments, comprising:hosting a plurality of virtual machine (VM) platforms within one or more servers;
running a plurality of application instances within the plurality of VM platforms, each of the application instances being configured to provide a network service;
operating a plurality of virtual firewalls associated with the plurality of application instances;
monitoring the plurality of application instances using a plurality of agent instances also running within the plurality of VM platforms, each agent instance being associated with one of the plurality of application instances and one of the plurality of firewalls;
at each of the plurality of agent instances:
receiving firewall rules from an agent controller;
locally storing the firewall rules; and
applying the firewall rules to the firewall associated with the agent instance;
at the agent controller, maintaining a central firewall rules database and transmitting firewall rules to the plurality of agent instances from the central firewall rules database;
with the plurality of agent instances, collecting metadata associated with the plurality of application instances and reporting the metadata to the agent controller, one or more rules stored within the central firewall rules database being based upon the reported metadata; and
at each of the plurality of virtual firewalls:
receiving access requests to the application instance associated with the firewall from one or more network sources; and
controlling access to the application instance based upon the firewall rules applied by the agent instance associated with the firewall.

US Pat. No. 10,171,424

PRIVACY ENHANCING NETWORKS

MINDTOP, INC., Melrose, ...

1. A method for obscuring data flow paths through a network of gateways, the method comprising:providing a controller in communication with each gateway in the network of gateways;
receiving, at the controller, a request for a flow path through the network of gateways from an originating gateway to a destination gateway;
computing, by the controller in response to the request, a unique flow path comprising a random sequence of intervening gateways between the originating gateway and the destination gateway; and
sending, from the controller to each intervening gateway in the computed flow path, flow transformation information to enable each intervening gateway to forward received data traffic to the next intervening gateway in the random sequence.

US Pat. No. 10,171,423

SERVICES OFFLOADING FOR APPLICATION LAYER SERVICES

Juniper Networks, Inc., ...

1. A method, comprising:receiving, by a device, network traffic;
identifying, by the device, a first portion of the network traffic for an application layer inspection;
performing, by the device, the application layer inspection on the first portion of the network traffic based on identifying the first portion of the network traffic;
determining, by the device, a context regarding the network traffic based on the application layer inspection on the first portion of the network traffic;
selectively offloading, by the device, a second portion of the network traffic for transport layer inspection without the application layer inspection based on whether the context regarding the network traffic has changed for the second portion of the network traffic;
providing, by the device, the second portion of the network traffic to a destination without causing the second portion of the network traffic to be provided for application layer inspection;
determining, by the device, that a trigger associated with the network traffic is satisfied;
identifying, by the device, a third portion of the network traffic based on determining that the trigger is satisfied; and
causing, by the device, the third portion of the network traffic to be provided for application layer inspection based on identifying the third portion of the network traffic.

US Pat. No. 10,171,421

INTRUSION PREVENTION AND DETECTION IN A WIRELESS NETWORK

TRAFFIC OBSERVATION VIA M...

1. A non-transitory computer-readable storage medium storing executable instructions which, when executed on one or more processors of a device of a wireless network, causes the one or more processors to:provide a security element comprising an intrusion detection and prevention (IDS) computer program, the security element located in between a physical layer of a receiver of the device and a media access control (MAC) layer of the device, the security element configured to interface with a driver of a wireless network interface of the receiver and control traffic flow between the physical layer of the receiver of the device and the MAC layer of the device;
receive wireless traffic, at the physical layer of the receiver of the device, the wireless traffic comprising first traffic and second traffic;
pass the first traffic and the second traffic to the security element located in between the physical layer of the receiver and the MAC layer of the device;
the security element is further configured to:
detect that the first traffic is allowed to pass to the MAC layer of the device by applying one or more rules from a group of rules comprising: denial of service (DoS), man-in-the-middle (MiTM), traffic inspection, Transport Control Protocol (TCP), and Internet Protocol (IP) rules to:
identify a first MAC management frame in the first traffic, instead of a MAC control frame or a MAC data frame;
detect whether a predefined information element is present in an authentication field of the first MAC management frame; and
determine that the first traffic is allowed and not malicious, responsive to detecting that the predefined information element is present in the authentication field of the first MAC management frame; and
detect that the second traffic is not allowed to pass to the MAC layer of the device by applying the one or more rules from the group of rules to:
identify a second MAC management frame in the second traffic, instead of a MAC control frame or a MAC data frame;
detect whether the predefined information element is present in an authentication field of the second MAC management frame; and
determine that the second traffic is malicious and not allowed, responsive to a failure to detect the predefined information element in the authentication field of the second MAC management frame.

US Pat. No. 10,171,420

SPATIAL REUSE FOR UPLINK MULTIUSER TRANSMISSIONS

Intel IP Corporation, Sa...

1. An apparatus of a station, the apparatus comprising: a memory; andprocessing circuitry coupled to the memory, wherein the processing circuitry is configured to:
decode a first portion of a physical layer convergence procedure (PLCP) protocol data unit (PPDU); and
if the PPDU is an overlapping basic service set (OBSS) PPDU, and a receive power of the PPDU is below an overlapping power detect level, configure the station to transmit a frame.

US Pat. No. 10,171,419

IP ROUTE CACHING WITH TWO SEARCH STAGES ON PREFIX LENGTH

Mellanox Technologies TLC...

1. A method, comprising the steps of:maintaining a routing table of destination addresses in a main memory, the destination addresses comprising binary numbers having respective prefixes of most significant bits;
receiving via a data network a packet having a packet destination address;
providing a cache memory having exactly one table of cache entries stored therein, the cache entries comprising respective cached destination addresses and respective delta values (L),
assigning a global mask size (M), wherein the global mask size specifies a number of most significant bits needed for first comparisons between the packet destination address and the cached destination addresses, and the delta value specifies a number of additional most significant bits needed for second comparisons between the packet destination address and the cached destination address;
deriving the delta values by determining a maximum prefix length of the prefixes of the destination addresses in the routing table that are compatible with the respective cached destination addresses;
in a first search of the table of cache entries making a determination that in one of the first comparisons M most significant bits of the cached destination address of a first cache entry and the packet destination address are identical;
computing a sum of the global mask size and the delta value of the first cache entry to yield a new number (M+L);
performing the second comparisons in a second search of the table of cache entries; and
when in one of the second comparisons the new number (M+L) of most significant bits of the cached destination address of a second cache entry and the packet destination address are identical, performing the steps of:
retrieving routing information from the cache memory; and
processing the packet according to the routing information.

US Pat. No. 10,171,418

METHOD AND APPARATUS FOR ACCESSING DEMILITARIZED ZONE HOST ON LOCAL AREA NETWORK

1. A method for accessing a demilitarized zone host in a local area network (LAN), comprising:configuring a mapping relationship between public internet protocol (IP) addresses obtained from a wide area network (WAN) side and private IP addresses of demilitarized zone hosts at a LAN side;
after receiving an access request sent by a client at the WAN side, modifying a destination IP address in the access request to a private IP address of a corresponding demilitarized zone host at the LAN side according to the configured mapping relationship, and sending the modified access request to the demilitarized zone host;
receiving a reply message returned by the demilitarized zone host, modifying a source IP address contained in the reply message to a public IP address of the client at the WAN side, and sending the modified reply message to the WAN side,
wherein before performing said configuring a mapping relationship between public IP addresses obtained from the WAN side and private IP addresses of demilitarized zone hosts at the LAN side, the method further comprises:
configuring slot information used for storing the public IP addresses obtained from the WAN side, wherein the slot information corresponds to the public IP addresses one-to-one,
wherein after performing said configuring the mapping relationship between the public IP addresses obtained from the WAN side and the private IP addresses of the demilitarized zone hosts at the LAN side, the method further comprises:
when dialing through the WAN side, sending an extension tag used to indicate an identity of the client at the WAN side to a server at the WAN side; and
receiving a plurality of IP addresses sent by the server at the WAN side through the extension tag, and filling public IP addresses therein into corresponding slot information.

US Pat. No. 10,171,416

METHOD FOR ESTABLISHING DATA CONNECTION ON MOBILE NETWORK, MOBILE NETWORK, AND POLICY CONTROL ENTITY

HUAWEI TECHNOLOGIES CO., ...

1. A method for establishing data connections on a mobile network performed by a Packet Data Network Gateway (PDN GW), the PDN GW comprising one or more processor in communication with a computer readable storage medium having instructions stored therein, wherein when the instructions are executed, the one or more processors implement the method comprising:establishing a data channel with a User Equipment (UE);
establishing a policy control session with a policy control entity according to a data channel ID provided by the PDN GW, wherein the policy control session is used to implement policy control on the data channel, and the data channel ID is used to identify the data channel established between the UE and the PDN GW;
receiving an address allocation request from the UE;
allocating an Internet Protocol (IP) address to the UE according to the address allocation request sent by the UE; and
sending a policy control session update request carrying the IP address to the policy control entity for updating the policy control session.

US Pat. No. 10,171,412

EMAIL QUOTA MANAGEMENT SYSTEM

International Business Ma...

1. A computer system comprising:one or more computer processors, one or more computer-readable storage media, and program instructions stored on one or more of the computer-readable storage media for execution by at least one of the one or more processors, the program instructions comprising:
program instructions to receive an out of office status a user has indicated on an email application, the email application using a communications network;
program instructions to determine a quota status of a quota for the user based on a previous quota usage pattern and a current quota usage pattern, wherein the quota includes an amount of storage spaced allotted to the user;
program instructions to receive a new email to be delivered to the user;
program instructions to assign a quota status to the new email;
program instructions to assign priority status to the new email, wherein the priority status is based on at least one of the user email history, the user current email trends, the subject matter of the new email, and/or an identification of the sender of the new email;
in response to the assigned quota status and the assigned priority, program instructions to determine, that the new email should not be delivered to the email application of the user and marking the new email as an outstanding email;
program instructions to receive a removal of the out of office status that the user previously indicated on an email application, the email application using a communications network; and
program instructions in response to receiving the available status of the user, delivering the outstanding email to the email application based on the outstanding email assigned quota status and assigned priority.

US Pat. No. 10,171,411

COMMUNICATION MESSAGE CONSOLIDATION WITH CONTENT DIFFERENCE FORMATTING

INTERNATIONAL BUSINESS MA...

1. A method, comprising:detecting, by a processor, a set of similar messages addressed to a user;
identifying redundantly similar portions of the set of similar messages that provide contextual details related to a progressive set of differences between the set of similar messages;
consolidating the set of similar messages into a single consolidated message comprising the redundantly similar portions preserved in association with sequential entries of the progressive set of differences in a sequence as context usable for interpretation of the progressive set of differences, and with the progressive set of differences formatted differently from formatting applied to the redundantly similar portions within the single consolidated message;
configuring a presentation level of difference details that specifies an amount of content of each of the sequential entries of the progressive set of differences viewable within the single consolidated message by the user depending upon how much time is available to the user to process messages;
filtering and removing from view, within the single consolidated message, additional content of the sequential entries of the progressive set of differences other than the specified amount of content of each of the sequential entries in accordance with the configured presentation level of difference details; and
promoting, in response to detecting a level of detail adjustment entered by the user, at least a portion of the additional content of the sequential entries of the progressive set of differences to be viewable within the single consolidated message.

US Pat. No. 10,171,410

CROSS-MODE COMMUNIATION

Microsoft Technology Lice...

1. A method comprising:receiving, from a first cross-channel account associated with a first channel, a command to initiate a cross-channel communication session, wherein the first cross-channel account receives the command via the first channel and from a first user account associated with the first channel;
generating a session identifier based on the command;
receiving, from a second, different cross-channel account associated with a second channel, a request to join the cross-channel communication session, the second channel being different than the first channel, wherein the second account receives the request via the second channel and from a second user account associated with the second channel, and wherein the request comprises the session identifier;
storing an association between the first channel and the first user account, the second channel and the second user account, and the session identifier; and
based at least in part on receiving the command and the request, relaying communication from the first cross-channel account originating from the first user account via the first channel to the second cross-channel account destined for the second user account via the second channel based on the stored association.

US Pat. No. 10,171,409

SYSTEMS AND METHODS FOR PATH OPTIMIZATION IN A MESSAGE CAMPAIGN

Selligent, Inc., Redwood...

1. A method for path optimization for a message campaign, the method being performed by one or more processors, the method comprising:displaying a graphical user interface representation of the message campaign, wherein the message campaign is electronically connected to one or more sources of destination target information, the one or more sources of destination target information collectively defining a plurality of recipients;
receiving a plurality of sets of input instructions, each respective set of input instructions in the plurality of sets of input instructions corresponding to a path in a plurality of paths in the message campaign, wherein, each path defines non-content characteristics of the message campaign according to which associated messages are sent, including: type, quantity, means for sending, recipient, and at least one of interval, order and frequency;
the plurality of paths in the message campaign including:
a first path specifying that a first subset comprising one or more electronic messages is to be sent following a delay of a first predefined wait period to a first subset of recipients, wherein the first subset of recipients includes two or more recipients; and
a second path specifying that a second subset comprising one or more electronic messages is to be sent following a delay of a second predefined wait period, different from the first predefined wait period, to a second subset of recipients, different from the first subset of recipients, wherein the second subset of recipients includes two or more recipients;
for each respective set of input instructions in the plurality of sets of input instructions, sending a respective subset of electronic messages in a first plurality of electronic messages according to a corresponding path in the plurality of paths to a respective subset of recipients in the plurality of recipients, including sending the first subset comprising one or more electronic messages to the first subset of recipients following the delay of the first predefined wait period and sending the second subset of electronic messages to the second subset of recipients following the delay of the second predefined wait period;
monitoring responses to the first subset comprising one or more electronic messages;
determining a winning path from among the plurality of paths based on a path discriminator, the path discriminator using:
i) a correlation of a criterion with a goal for the message campaign for each respective set of input instructions in the plurality of sets of input instructions, and
ii) the responses to the first subset comprising one or more electronic messages;
upweighting, responsive to the determining, the winning path from among the plurality of paths; and
using the message campaign with the upweighted winning path by causing a second plurality of electronic messages to be sent through the winning path to recipients in the plurality of recipients.

US Pat. No. 10,171,385

DYNAMICALLY PROVIDING SYSTEM COMMUNICATIONS IN A VIRTUAL SPACE TAILORED TO INDIVIDUAL USERS RESPONSIVE TO SPECIFIC USER ACTIONS AND INDIVIDUAL CURRENT STATES

Kabam, Inc., San Francis...

1. A system configured to dynamically provide system communications tailored to individual users responsive to occurrences of trigger events in a virtual space, the system comprising:one or more processors configured by machine-readable instructions to:
execute an instance of the virtual space, wherein the instance is configured to facilitate interaction between the individual users and with the virtual space, wherein the individual users are associated with individual client computing platforms through which command inputs are provided by the individual users that exercise control by the individual users within the virtual space;
provide an admin interface for presentation to an administrative user of the virtual space for managing system communications of the virtual space, the admin interface being configured to receive information from the administrative user, the information including one or more of new system communications, existing system communications, trigger event definitions, and/or information associated with one or more bases for determining whether an individual current state corresponds to one or more system communications;
monitor actions performed by a user within the virtual space for trigger events including a first trigger event, the first trigger event being a specific user action performed by a first user that has been defined as a trigger event, wherein the specific user action is one or more of registering as a user in the virtual space, establishing a relationship with another user and/or user character in the virtual space, customizing a user character, and/or engaging in gameplay within the virtual space;
obtain current states responsive to trigger events occurring within the virtual space, the current states being separate and discrete from the trigger events, a given current state for the first user including information indicating one or more of:
(a) a frequency of engagement by the first user in the virtual space,
(b) an amount of real-world money the first user has spent toward the virtual space, and/or
(c) total time spent by the first user while engaged in gameplay in the virtual space, wherein a first current state is obtained responsive to the first trigger event;
further responsive to trigger events occurring within the virtual space,
(i) determine whether individual current states correspond to one or more of a plurality of system communications, a given system communication being a communication configured to be provided by the system for presentation to users via one or more communication channels,
(ii) determine whether a first system communication corresponds to the first current state, and
(iii) select the first system communication responsive to the first system communication being determined to correspond to the first current state, such selection being further responsive to occurrence of the first trigger event; and
provide system communications for presentation to users via the one or more communication channels, the first system communication being presented to the first user,
wherein the admin interface includes user responsiveness information indicating user responsiveness to the system communications presented via the one or more communication channels.

US Pat. No. 10,171,383

METHODS AND SYSTEMS FOR PORTABLY DEPLOYING APPLICATIONS ON ONE OR MORE CLOUD SYSTEMS

Sony Interactive Entertai...

1. A method, comprising:receiving attributes of one or more resources and services required on a cloud system for executing an application;
generating a descriptor record for the application using the received attributes, the descriptor record defining an environment profile that is specific for the cloud system, wherein the descriptor record is generated by translating the one or more resources and services required into one or more actions to be taken for provisioning the required resources and services in the cloud system for successful execution of the application, wherein the generated descriptor record identifies a predefined sequence for the one or more actions to be taken based on the received attributes; and
storing the descriptor record in a descriptor file maintained in a deployment system database;
detecting a request for the execution of the application, the detection of the request resulting in a retrieval of the descriptor record for the application from the descriptor file, the retrieval causing automatic triggering of the predefined sequence for the one or more actions identified in the descriptor record resulting in the provisioning of the required services and resources on the cloud system to enable successful execution of the application,
wherein method operations are performed by a processor.

US Pat. No. 10,171,368

METHODS AND APPARATUS FOR IMPLEMENTING MULTIPLE LOOPBACK LINKS

Juniper Networks, Inc., ...

1. An apparatus, comprising:a memory; and
a processor operatively coupled to the memory implementing a route module, an encapsulation module operatively coupled to the route module, and a loopback selection module operatively coupled to the route module and the encapsulation module,
the route module configured to receive a data unit having a header portion,
the encapsulation module configured to receive the data unit from the route module and to append a tunnel header to the data unit to define a tunnel data unit,
the loopback selection module configured to receive the tunnel data unit from the encapsulation module and receive a signal representing bandwidth availability of each loopback link from a plurality of loopback links of a loopback link aggregation group (LAG),
the loopback selection module configured to select a loopback link from the plurality of loopback links of the loopback LAG based on the tunnel header and the bandwidth availability such that data traffic can be load balanced across each loopback link from the plurality of loopback links of the loopback LAG,
the route module configured to receive the tunnel data unit from the loopback selection module via the loopback link and send the tunnel data unit via a tunnel based on the tunnel header.

US Pat. No. 10,171,340

INTERWORKING NETWORK ELEMENT

TEJAS NETWORKS LIMITED, ...

1. A method, comprising:comparing Ethertype of a received frame at a network element based on a service level agreement, with an Ethertype associated with a source domain;
recognizing a destination Ethertype associated with a destination domain determined via lookup of a forward database stored in the network element, wherein the recognizing includes determining if the received frame Ethertype is same as the destination Ethertype or not;
determining if the destination domain is of type 802.1Q, 802.1ad, or 802.1ah, wherein the determining includes recognizing domain types of 802.1Q, 802.1ad, and 802.1ah; and
translating the Ethertype of the received frame to include the Ethertype of the destination domain, wherein the translation includes overwriting or appending the Ethertype of the received frame with an Ethertype associated with the destination domain and/or encapsulating the received frame with an Ethertype associated with the destination domain.

US Pat. No. 10,171,339

POPULATING FORWARDING DATABASE TABLES IN A FABRIC ENVIRONMENT

Lenovo Enterprise Solutio...

1. A computer program product comprising computer readable storage media that is not a transitory signal having program instructions embodied therewith, the program instructions executable by a processor to:maintain a forwarding database table in each of a plurality of interconnected switches forming a network, wherein each forwarding database table includes one or more records, each record identifying a media access control address, a port identifier, and a source identifier, and wherein the plurality of switches includes a first switch having a first forwarding database table;
maintain a node sequence table in each of the plurality of interconnected switches, wherein the node sequence table of any one of the switches identifies, for other switches in the network, the source identifier of the other switch and a sequence number of a synchronization packet last received from the other switch;
receive a frame from a first network device at a first port of the first switch, wherein the frame includes a media access control address of the first network device;
prepare a synchronization packet including the media access control address identifying first network device, a port identifier identifying the first port, a source identifier identifying the first switch, a sequence number that the first switch increments each time the first switch sends out a synchronization packet and an instruction, and wherein the synchronization packet is prepared by the first switch in response to determining that the media access control address is not associated with the first switch in a record of the first forwarding database table;
send the synchronization packet from the first switch to each other switch of the plurality of switches;
determine, by each switch that receives the synchronization packet, whether the sequence number in the synchronization packet is in sequence with the sequence number that is stored in the node sequence table of the switch in association with the source identifier of the first switch;
modify the forwarding database table of one or more of the switches that receive the synchronization packet to implement the instruction included in the synchronization packet in response to determining that the sequence number in the synchronization packet is in sequence with the sequence number that is stored in the node sequence table of the switch in association with the source identifier of the first switch; and
send, by any one or more of the switches that receives the synchronization packet, a negative acknowledgement packet to the first switch requesting that the first switch resend one or more synchronization packets in response to determining that the sequence number in the synchronization packet is not in sequence with the sequence number that is stored in the node sequence table of the switch in association with the source identifier of the first switch.

US Pat. No. 10,171,337

METHOD FOR MANAGING A NETWORK, AND NODE FOR IMPLEMENTING SAID METHOD

SERCEL, Carquefou (FR)

1. Method for electing a master routing node of a given subnet of a network, which given subnet comprises nodes connected together by a same type of interface, wherein the nodes comprising at least two activated interfaces enabling a connection with the given subnet and another different subnet of the network are defined as router nodes, one of the nodes of the network being chosen as target node, said method comprising following steps:determining a first-type address associated with the interface of each node on the given subnet, said first-type address being the address given by a routing table of the next hop on the path leading from said node to the target node, the next hop being a router node or said target node;
determining a second-type address associated with the interface of each node on the given subnet, said second-type address being the determined first-type address if the determined first-type address is on said given subnet, or the address of the interface of said node on the given subnet if the determined first-type address is on another subnet of the network than said given subnet;
sending by each router node of the given subnet a message containing its determined second-type address;
collecting at the interface of each node on the given subnet said sent messages containing a second-type address associated with a router node of said given subnet;
selecting for the interface of each node on the given subnet a third-type address among its determined second-type address and the second-type addresses contained in the collected messages, according to a selection rule known by all nodes of said subnet;
electing as master routing node of said given subnet the node having the selected third-type address.

US Pat. No. 10,171,336

OPENFLOW CONFIGURED HORIZONTALLY SPLIT HYBRID SDN NODES

TELEFONAKTIEBOLAGET LM ER...

1. A method implemented by a network element to execute a forwarding information base (FIB) manager to manage an FIB of the network element and to program a packet forwarding function of the network element, where the FIB manager supports a hybrid control plane with software defined networking (SDN) and local control plane processes, the method comprising:receiving a request to configure a node reachability configuration element, where the node reachability configuration element describes a packet processing instruction for the packet forwarding function to forward packets toward a referred node;
selecting a flow control agent from a set of flow control agents that each manage a separate flow control logical switch instance, the flow control agent to update reachability information to the referred node for an associated flow control logical switch instance, each separate flow control logical switch instance being a data plane implementation of a logical view of the FIB and each separate flow control logical switch having a separate service controller; and
updating a logical forwarding information representation to encode a next hop identifier for the referred node.

US Pat. No. 10,171,327

HANDLING OF NETWORK CHARACTERISTICS

TELEFONAKTIEBOLAGET L M E...

1. A network information system, NIS, for handling network characteristics, the NIS comprising:a core network node comprising at least one processor coupled to at least one memory, the memory comprising:
a first set of instructions that when executed by the at least one processor causes the at least one processor be operable to:
estimate an available bitrate for a media flow, wherein the available bitrate is estimated based on available physical resources of a user equipment node to transmit the media flow;
a second set of instructions that when executed by the at least one processor causes the at least one processor be operable to:
acquire information about a permitted share of physical resources to be used during the transmission of the media flow;
update the estimated available bitrate for the media flow by matching the information to the estimated available bitrate for the media flow;
transmit the updated estimated available bitrate to the user equipment node that transmits the media flow;
transmit an instruction to the user equipment node that transmits the media flow to adjust the bitrate for transmission of the media flow according to the updated estimated available bitrate; and
a third set of instructions that when executed by the at least one processor causes the at least one processor be operable to:
invoke handling of network characteristics by triggering execution of the first set of instructions and the second set of instructions by the at least one processor.

US Pat. No. 10,171,324

MEDIA STREAM MONITOR

iHeartMedia Management Se...

1. A media broadcast chain comprises:a media processing server generating a primary media stream of content for broadcast;
an encoding unit receiving the primary media stream of content from the media processing server and encoding the primary stream of content into an encoded media stream of one or more streaming formats;
a streaming server receiving the encoded media stream and outputting multiple individual encoded media streams to different end users via a network;
a stream monitor receiving a plurality of the individual encoded media streams, wherein the streaming monitor includes a computer memory operative with a host web page serving a plurality of extensible markup language (XML) pages executing program instructions, the program instructions including:
receiving, in response to a web page request, a plurality of stream records from a stream manager database, the plurality of stream records including parameters to identify a corresponding plurality of media streams, wherein the plurality of media streams each include packetized media content and associated metadata;
monitoring, based on the plurality of stream records, the plurality of media streams being served by the stream server;
asynchronously and concurrently testing each media stream of the plurality of media streams for streaming errors;
generating results of the testing for each media stream of the plurality of media streams;
discontinuing, by the host web page, the asynchronous and concurrent testing of an individual media stream of the plurality of media streams in response to one or more of: detection of an error with the individual media stream or broadcast of metadata associated with the individual media stream;
removing stream records discontinued from the asynchronous and concurrent testing from computer memory; and
receiving additional stream records associated with other media streams being served by the stream server for testing.

US Pat. No. 10,171,317

MANAGEMENT SERVER FOR REMOTE MONITORING SYSTEM

Yanmar Co., Ltd., Osaka-...

1. A remote monitoring system for monitoring a mobile work vehicle or vessel, the mobile work vehicle or vessel having a remote monitoring terminal device mounted thereon, the remote monitoring system comprising:a management server for communicating with the remote monitoring terminal device, the management server configured to have:
a control section configured to process information; the control section having a storage section configured to store the information processed by the control section; and a communication section configured to communicate with the remote monitoring terminal device, wherein, the communication section receives:
a startup date and time of the remote monitoring terminal device from the remote monitoring terminal device when the remote monitoring terminal device is started up; and
a shutdown date and time of the remote monitoring terminal device, and minimum values, maximum values, and average values of data detected by the remote monitoring terminal device during an operation of the mobile work vehicle or vessel, and occurrence counts and durations of predetermined events from the remote monitoring terminal device when the remote monitoring terminal device is shut down,
wherein the control section distinguishes, by a daily report in a unit of an operation day for at least one operation time period from a startup to shutdown, the startup date and time, the shutdown date and time, the minimum values, the maximum values, the average values, and the occurrence counts and the durations of the predetermined events, which are received by the communication section, and the control section stores the received and distinguished information in the storage section in a unit of terminal identification information of the remote monitoring terminal device,
wherein the control section causes a display screen of a display section to selectably display the at least one operation time period for which the mobile work vehicle or vessel is operated,
wherein, when one of the at least one operation time period is selected on the display screen, the control section reads, from the storage section, the minimum values, the maximum values, the average values, and the occurrence counts and the durations of the predetermined events, all of which correspond to the selected operation time period, out of the startup date and time, the shutdown date and time, the minimum values, the maximum values, the average values, and the occurrence counts and the durations of the predetermined events, which are stored in the storage section in a unit of the terminal identification information, and causes another display screen of the display section to display together with the startup date and time and the shutdown date and time, the minimum values, the maximum values, the average values, and the occurrence counts and the durations of the predetermined events, which are read from the storage section, and
the work vehicle or vessel includes at least one work section and the remote monitoring terminal device further includes a power supply control section and multiple types of connection terminals connected to output elements at which data on an operation state is supplied external to the remote monitoring terminal device to various electronic control devices to control multiple operating states of multiple work sections,
wherein the at least one work section includes a startup switch SW and a battery BT,
wherein the power supply control section has a timer function and is connected to the battery BT via a power supply connecting line Lbt to periodically start up a power supply, no matter whether the startup switch SW is being turned off or on, and
wherein the power supply control section periodically starts up the power supply while the startup switch SW of the mobile work vehicle or vessel is being turned off, such that the power supply control section in the remote monitoring terminal device is always fed with electric power from the battery BT, and that the power supply to the control section is not turned off by the power supply control section when the startup switch SW is turned off.

US Pat. No. 10,171,304

NETWORK POLICY CONFIGURATION

BlackBerry Limited, Wate...

1. A method comprising:as part of a configuration process of a wireless device by a configurator device:
receiving, by the configurator device from the wireless device, a configuration request including a configuration attribute of the wireless device;
mapping, by the configurator device using a first mapping comprising information that maps between configuration attributes and respective credential attributes, the configuration attribute in the configuration request received from the wireless device to a corresponding credential attribute, the corresponding credential attribute to be mapped to a corresponding network policy; and
sending, by the configurator device, a configuration response including the corresponding credential attribute to the wireless device, the corresponding credential attribute useable by the wireless device to access an access point (AP); and
as part of a configuration process of the AP by the configurator device:
sending, by the configurator device to the AP, a second mapping comprising a mapping table including information that maps between credential attributes and respective network policies, for use by the AP in obtaining, responsive to the corresponding credential attribute received by the AP from the wireless device, the corresponding network policy to apply to a communication of the wireless device.

US Pat. No. 10,171,276

UPLINK OPERATION FOR LTE IN AN UNLICENSED BAND

InterDigital Patent Holdi...

8. A method comprising:receiving licensed assisted access (LAA) configuration information for a first cell from a second cell, wherein the first cell is associated with operation in an unlicensed band and the second cell is associated with operation in a licensed band;
receiving a downlink control information (DCI) comprising an uplink (UL) grant for the first cell for a transmission in a first subframe, wherein the UL grant comprises an indication that explicitly indicates that the first subframe is a sounding reference signal (SRS) subframe for the first cell;
determining one or more SRS resources for the first subframe;
determining that a wireless transmit/receive unit (WTRU) is triggered to transmit an SRS transmission in the first subframe; and
transmitting the SRS transmission on the SRS resources for the first subframe.

US Pat. No. 10,171,264

DATA CENTER NETWORKS

Tigera, Inc., San Franci...

1. A method, comprising:advertising an external IP address of a packet forwarding function as a next hop IP address for one or more servers external to a data center network to reach a first virtual system, wherein the packet forwarding function includes an internal IP address that is different than the external IP address;
receiving, at the packet forwarding function comprised within a server in the data center network, a data packet being routed to or from the first virtual system having a first IP address and hosted on the server;
determining, by the packet forwarding function, a destination of the received data packet by querying a packet forwarding data store to determine a next hop IP address associated with a destination IP address of the received data packet; and
forwarding, by the packet forwarding function, the data packet based at least in part on the next hop IP address associated with the destination IP address of the received data packet, wherein the next hop IP address includes at least one of the internal IP address, the external IP address, an IP address associated with a border gateway, or an IP address associated with a device within the data center network.

US Pat. No. 10,171,251

TAMPER-PROTECTED HARDWARE AND METHOD FOR USING SAME

Emsycon GmbH, (DE)

1. A tamper-protected hardware module, comprising:a hardware structure providing a Physical Unclonable Function (PUF), the hardware structure being adapted to provide a response to challenges input to the PUF implemented in the hardware structure,
storage memory to store a set of challenges and a set of correct PUF responses for each of said challenges,
processor circuitry to provide at least one challenge from said set of challenges to the hardware structure implementing the PUF, and to receive a PUF response for each challenge provided to the hardware structure implementing the PUF,
the processor circuitry to verify integrity of the tamper-protected hardware module by checking, for each PUF response received for a challenge provided to the hardware structure implementing the PUF, whether the respective PUF response received from the hardware structure implementing the PUF matches the correct PUF response of said challenge stored in the storage memory, and
wherein the processor circuitry makes the tamper-protected hardware module temporarily or permanently unusable if integrity of the tamper-protected hardware module is not verified by the processor circuitry, and wherein the tamper-protected hardware module is a chip or a die, and wherein the tamper-protected hardware module further comprises an on-chip trusted time source for providing the current date and time, wherein the current date and time is used by the tamper-protected hardware module to verify validity of certificates.

US Pat. No. 10,171,250

DETECTING AND PREVENTING MAN-IN-THE-MIDDLE ATTACKS ON AN ENCRYPTED CONNECTION

Juniper Networks, Inc., ...

1. A method comprising:determining, by a device, one or more verification domains to be used to verify a public key certificate,
the one or more verification domains being different from a host domain associated with the device;
determining, by the device, one or more resources to be requested to verify the public key certificate;
determining, by the device, one or more actions to perform when the public key certificate is not valid;
generating, by the device, executable verification code, for performing the one or more actions without prompting a user to accept or reject the public key certificate, based on determining the one or more verification domains, based on determining the one or more resources, and based on determining the one or more actions;
embedding, by the device, the executable verification code in other code; and
providing, by the device, the other code, with the executable verification code, for execution by a client device.

US Pat. No. 10,171,241

STEP-UP AUTHENTICATION FOR SINGLE SIGN-ON

VMWare, Inc., Palo Alto,...

1. A method for providing step-up authentication in a system providing single-sign on to a plurality of applications on a computing device, comprising:receiving a request to authenticate a user of the computing device for a first application using a primary token associated with a single-sign on capability;
determining that the primary token is insufficient to authenticate the user for the first application;
requesting a token agent executing on the computing device to perform a step-up authentication of the user;
updating the primary token to reflect the step-up authentication of the user after receiving an indication of a successful step-up authentication of the user from the token agent;
providing the updated primary token to the computing device;
receiving, from the computing device, a resubmission of the request to authenticate the user for the first application, the resubmitted request including the updated primary token reflecting the step-up authentication; and
transmitting a secondary token to the token agent executing on the computing device based on granting access to the first application, wherein the secondary token authenticates the user for the first application, and wherein granting access to the first application is based on receiving the resubmitted requesting including the updated primary token.

US Pat. No. 10,171,229

PSEUDO-RANDOM BIT GENERATOR BASED ON MULTIM-MODAL MAPS

Instituto Potosino de Inv...

1. A method for generating binary sequences through a pseudo-random bit generator based on chaos, comprising the following steps:providing a generator block and a validation block;
defining a k-modal map on the generator block; the k-modal map is defined by:
ƒ?=?(dr+1?x)(x?dr),x??r,
generating a set of k independent sequences represented as {x1, x2, x3, x4, . . . xk}, wherein each independent sequence is produced using a dynamic system by a logic unit processing;
combining the k independent sequences to obtain a single sequence (Z);
using the single sequence (Z) as a generator block output;
wherein the set of k independent sequences defines maximal numbers of modals in a family and an interval ?=[a, b] is divided between k subintervals ?0=[d1, d2), . . . , ?k?1=[dk?1, dk], then a system ƒ?is a piecewise function by k; the parameterized family is defined by the following piecewise function
wherein: dr=r/k,(r=0,1,2, . . . , k?1), k is the number of modals, ?=?(k,?) is the bifurcation parameter, ?=1/k is the carrying on capacity; to obtain the maximum value of ? with k modals there is a direct relationship, ?max=4k/?;
entering the generator block output as input on the validation block, the validation block including an encryption algorithm by a stream-cipher;
validating a combined sequence by evaluating the output of the generator to be sure that the sequence is cryptographically secure.

US Pat. No. 10,171,226

SYSTEMS AND METHODS FOR FREQUENCY DIVISION DUPLEX COMMUNICATION

TCL COMMUNICATION LIMITED...

1. A method of wireless communication using half duplex frequency division duplex, HD-FDD, comprising at a wireless communications device:receiving downlink data during a plurality of downlink subframes; and
transmitting a hybrid automatic repeat request acknowledgement, HARQ-ACK, on an uplink;
wherein the HARQ-ACK relates to downlink data received during at least two of the plurality of downlink subframes and the HARQ-ACK is transmitted during one uplink subframe,
wherein the wireless communications device receives timing data on a downlink channel which indicates a timing association between a downlink data subframe and an uplink transmission subframe for transmitting the HARQ-ACK,
wherein the timing data is received as part of a downlink control indicator in a DCI message which is in DCI format 6-1A.

US Pat. No. 10,171,224

METHOD AND ARRANGEMENT FOR RELAYING IN CASE OF EXTENSION AREAS HAVING UPLINK/DOWNLINK IMBALANCE

Telefonaktiebolaget LM Er...

1. A method in a network node associated with a cell area A and a cell extension area B having an uplink/downlink imbalance in relation to a neighboring base station and the network node, the method comprising:signaling a set of event measurement conditions to a User Equipment (UE), causing the UE to indicate to the network node when an event measurement condition in the set of event measurement conditions is fulfilled, wherein the set of event measurement conditions comprises:
an event measurement condition related to the UE entering or leaving the cell area A, the UE being served in both uplink and downlink in the cell area A; and
an event measurement condition related to the UE entering or leaving the cell extension area B, the UE being served in uplink in the cell extension area B;
based on the indication, determining whether the UE is located in the cell area A or the cell extension area B, wherein the fulfilled event measurement condition defines circumstances, based on measurement values, that trigger the UE to indicate to the network node when any event measurement condition in the set of event measurement conditions is fulfilled;
in response to a determination that the UE is located in the cell area A, serving the UE in both uplink and downlink; and
in response to a determination that the UE is located in the cell extension area B, serving the UE in uplink.

US Pat. No. 10,171,221

SCHEDULING METHOD AND APPARATUS OF MULTI-ANTENNA COMMUNICATION SYSTEM, AND METHOD AND APPARATUS FOR FEEDING-BACK CHANNEL QUALITY INDICATOR

Electronics and Telecommu...

1. A method for feeding back a channel quality indicator (CQI) by a terminal, the method comprising:receiving, from a base station, at least one reference signal through at least one of multiple beams of the base station;
measuring a signal-to-interference plus noise ratio (SINR) for the at least one reference signal;
receiving CQI feed-back mode information from the base station;
deciding the number of bits of a first CQI and an SINR increase range depending on a level of the first CQI based on the CQI feed-back mode information;
determining a first level corresponding to the measured SINR among levels of the first CQI having the decided number of bits and the decided SINR increase range; and
feeding back the first CQ having the first level to the base station,
wherein the first CQ is capable of representing an SINR larger than an SINR which a second CQI is capable of maximally representing, the second CQI being used for data transmission.

US Pat. No. 10,171,218

METHOD FOR ESTIMATING SIGNAL QUALITY OF TRANSMISSION TO A USER EQUIPMENT FROM A TRANSMISSION POINT

Telefonaktiebolaget LM Er...

1. A method performed by a network node for enabling transmissions to a user equipment (UE) from transmission points (TPs) in a coordination cell area in a radio communications network, the method comprising:configuring two or more TPs in the coordination cell area not currently serving the UE to transmit signals on interference measurement (IM) resources of two or more Channel State Information (CSI) processes of the UE according to three or more different interference states;
receiving, from the UE, CSI reports based on the transmitted signals on the IM resources of the two or more CSI processes of the UE;
estimating one signal quality value for each of the three or more different interference states of the transmitted signals and at least one further signal quality value corresponding to at least one interference state that is not part of the three or more different interference states of the transmitted signals, based on the received CSI reports of the two or more CSI processes;
one or more of scheduling coordinated transmissions to the UE from TPs in the coordination cell area and selecting transmission configuration settings for TPs in the coordination cell area, using the estimated signal quality values; and
performing coordinated transmissions to the UE from one or more TPs of the coordination cell area.

US Pat. No. 10,171,211

WIRELESS COMMUNICATION SYSTEM AND METHOD, AND WIRELESS COMMUNICATION APPARATUS

PIONEER CORPORATION, Kan...

1. A wireless communication system comprising:a first apparatus and a second apparatus that perform wireless communication with each other,
wherein the first apparatus sends a first reference signal, and starts signal transmission to the second apparatus with a first period from a time point at which a first offset time passes from sending the first reference signal,
the second apparatus starts signal transmission to the first apparatus with the first period from a time point at which a second offset time, which is different from the first offset time, passes from sending the first reference signal, and
the first apparatus transmits a signal indicating a time obtained by adding the first offset time and a fixed time, which is shorter than one period of the first period, as the second offset time to the second apparatus before starting the signal transmission.

US Pat. No. 10,171,199

TUNABLE LASER IN AN OPTICAL ACCESS NETWORK

Google LLC, Mountain Vie...

16. A method comprising:receiving, at data processing hardware, a request to transmit a data packet from an optical network unit (ONU) to an optical line terminal (OLT) of an optical access network having a multiplexer optically coupled between the ONU and the OLT, the multiplexer having a wavelength pass-band, the ONU comprising a tunable laser configured to continuously transmit an optical signal that alternates between a burst-on state and a burst-off state;
triggering, by the data processing hardware, the burst-on state of the tunable laser by transmitting a burst-on current to the tunable laser, the burst-on current biasing the tunable laser to transmit the optical signal at a transmit wavelength within the wavelength pass-band of the multiplexer, the multiplexer configured to allow passage therethrough of the optical signal at the transmit wavelength;
instructing, by the data processing hardware, the tunable laser to transmit the data packet in the optical signal; and
after transmission of the data packet, enabling, by the data processing hardware, the burst-off state of the tunable laser by transmitting a burst-off current to the tunable laser, the burst-off current biasing the tunable laser to transmit the optical signal at a non-transmit wavelength outside of the wavelength pass-band of the multiplexer, the multiplexer configured to block passage therethrough of the optical signal at the non-transmit wavelength.

US Pat. No. 10,171,190

DEVICE AND METHOD FOR TESTING MIMO SCHEME SYSTEM

ANRITSU CORPORATION, Kan...

1. A device for testing a multi input multi output (“MIMO”) scheme system adopting a multicarrier modulation scheme using K carriers in communication with one mobile terminal,a MIMO scheme having the number of transmitting antennas N and the number of receiving antennas M, and a beam forming process scheme for setting radiation beam characteristics based on transmitting antennas having the number of antennas N, in which N×M channels and
a pseudo-propagation channel having U paths in each of the channels are assumed between the transmitting antennas and the receiving antennas, and signals received by the M receiving antennas through the propagation channel are generated to be given to a test object, the device comprising:
a layer frequency domain signal generation unit that generates R×K series of modulation signals in a frequency domain for each of the K carriers with the input of R layers' worth of data signal sequences to be transmitted to the test object;
a window function operation unit that performs a convolution operation of frequency characteristics of a window function in a time domain with the input of the R×K series of modulation signals, output by the layer frequency domain signal generation unit, as a process equivalent to signal excision based on multiplication of the window function in the time domain;
a fading setting unit that obtains propagation channel characteristics of all paths assumed between the transmitting antennas and the receiving antennas;
a beam forming equivalence operation unit that performs an operation process equivalent to the beam forming process for setting the radiation beam characteristics based on the transmitting antennas having the number of antennas N to desired characteristics, with the input of the N×M×U paths' worth of propagation channel characteristics obtained in the fading setting unit;
a Fourier transform unit that performs Fourier transform taking account of a delay for each path with the input of the propagation channel characteristics of all paths obtained by the beam forming equivalence operation unit, and obtains propagation channel characteristics in the frequency domain;
an operation unit that obtains spectrum information of a signal to be received in each of the receiving antennas by multiplications of the propagation channel characteristics in the frequency domain obtained by the Fourier transform unit and operation results of the window function operation unit;
a time domain signal generation unit that performs inverse Fourier transform processes with the input of the operation results of the operation unit, and generates signals in the time domain to be received by the receiving antennas; and
a shift addition unit that shifts and adds the signals in the time domain generated by the time domain signal generation unit by a length of the window function in the time domain, and generates consecutive signals to be received by the receiving antennas.

US Pat. No. 10,171,189

ROBUST POWER DETECTOR FOR WIDEBAND SIGNALS AMONG MANY SINGLE TONE SIGNALS

1. A method performed by a processor of a computing device, the method comprising:receiving signal data from a radar antenna that is in communication with the processor, the signal data comprising a plurality of amplitude values of a signal over a period of time, wherein the signal is received by the antenna, the signal comprising an echo return and a noise signal, the echo return present in the signal for a subset of the period of time;
determining that a ratio of an amplitude value in the amplitude values to a mean amplitude value of the amplitude values over the period of time exceeds a threshold value;
based upon determining that the ratio exceeds the threshold value, outputting an indication that the signal includes the echo return at a time corresponding to the amplitude value; and
isolating the echo return based upon the indication that the signal includes the echo return at the time corresponding to the amplitude value.

US Pat. No. 10,171,184

METHODOLOGY OF USING THE VARIOUS CAPABILITIES OF THE SMART BOX TO PERFORM TESTING OF OTHER FUNCTIONALITY OF THE SMART DEVICE

W2BI, INC., South Plainf...

1. An automatic system level testing (ASLT) system for testing smart devices, said system comprising:a system controller operable to be coupled to a smart device, wherein the system controller comprises a memory comprising test logic and a processor;
an enclosure comprising a plurality of components, the plurality of components comprising:
a robotic arm comprising a stylus, wherein the robotic arm and the stylus are operable to actuate buttons on a screen of the smart device;
a platform comprising a device holder, wherein the device holder is operable to hold the smart device inserted therein; and
a wireless access point, wherein the wireless access point is configured to transmit wireless signals for performing a test selected from the group consisting of: a Bluetooth test, a Wi-Fi test, a Near Field Communication (NFC) test and a wireless charge test;
and wherein the processor is configured to automatically control the smart device and the plurality of components in accordance with the test logic, and wherein the processor is further configured to:
control the smart device to activate a wireless mode therein by actuating a button associated with the wireless mode on the screen of the smart device using the robotic arm and the stylus;
receive wireless signals from the wireless access point using the smart device;
retrieve wireless scan results from the smart device; and
analyze the wireless scan results to determine wireless functionality for the smart device.

US Pat. No. 10,171,183

METHOD AND SYSTEM FOR INTERFERENCE MITIGATION IN WIRELESS COMMUNICATIONS ASSEMBLIES

PERASO TECHNOLOGIES INC.,...

1. A method in a wireless communications assembly having an antenna, a transceiver and a baseband processor, comprising:at the transceiver:
receiving, from the antenna, a modulated carrier signal having a carrier frequency and containing payload data;
demodulating the carrier signal to extract a baseband signal having a baseband frequency and containing the payload data;
generating from the baseband signal, at a converter, a digital baseband signal containing the payload data;
at an encoder:
receiving the digital baseband signal from the converter;
generating an encoded digital baseband signal encoding the payload data for transmission at an operating frequency; the encoded digital baseband signal having at least a threshold proportion of signal level transitions that, when transmitted at the operating frequency, have transition frequencies outside a predefined restricted frequency band; and
transmitting the encoded digital baseband signal to the baseband processor via an interface at the operating frequency.

US Pat. No. 10,171,181

HIGH-BANDWIDTH UNDERWATER DATA COMMUNICATION SYSTEM

Fairfield Industries, Inc...

1. A system to perform seismic exploration in an aqueous medium, comprising:a detector to provide an indication to a wake-up system to turn on one or more of a storage and control system, a sensor, or an optical transmitter;
the wake-up system, in response to the indication from the detector, operational to:
identify an optical communication link established via the optical transmitter through the aqueous medium;
determine a quality control parameter of the optical communication link; and
validate, based on the quality control parameter the optical communication link established via the optical transmitter through the aqueous medium; and
the storage and control system operational to cause the optical transmitter to transmit, via the optical communication link validated by the wake-up system, data indicative of a parameter sensed by the sensor.

US Pat. No. 10,171,170

MULTI-CHANNEL PARALLEL OPTICAL TRANSCEIVER MODULE

Global Technology Inc., ...

1. A multi-channel parallel optical transceiver module, comprising:a shell body and a circuit board located in the shell body;
an optical emitter base soldered to a first end of the circuit board;
a notch located on the optical emitter base for engaging the first end of the circuit board with the first end of the optical emitter base being soldered to two opposite sides of the circuit board;
a plurality of optical emitters disposed in parallel on the optical emitter base, wherein at least two of the optical emitter of the plurality of optical emitters are separated from each other by a block;
a plurality of lasers, each laser of the plurality of lasers disposed at a first side of an associated optical emitter of the plurality of optical emitters;
a plurality of lenses, each lens of the plurality of lenses being associated with a laser of the plurality of lasers and disposed at the first side of an associated optical emitter of the plurality of optical emitters;
a plurality of optical monitors, each optical monitor of the plurality of optical monitors disposed on a second end of the circuit board adjacent to an associated laser of the plurality of lasers, wherein each optical monitor is connected to an associated laser by a bonding wire, each optical monitor of the plurality of optical monitors and laser of the plurality of lasers being connected to a laser controller and a driving chip disposed on the circuit board;
an optical fiber array and a processing chip for received optical signals adhered onto the circuit board;
a first metal shielding mask disposed on the circuit board for covering and sealing the optical fiber array and the processing chip for the received optical signals; and
a second metal shielding mask disposed on the circuit board, for covering and sealing the first metal shielding mask, the optical monitor, the laser controller, and the driving chip.

US Pat. No. 10,171,165

VISIBLE LIGHT SIGNAL GENERATING METHOD, SIGNAL GENERATING APPARATUS, AND PROGRAM

PANASONIC INTELLECTUAL PR...

1. A method comprising:generating a preamble in which a first luminance value and a second luminance value alternately appear along a time axis, the first luminance value and second luminance value being different luminance values from each other;
generating a first payload in which the first luminance value and the second luminance value alternately appear along the time axis by determining a first time length of the first luminance value and a second time length of the second luminance value using a first formula, the first time length being a time length in which the first luminance value continues in the first payload, the second time length being a time length in which the second luminance value continues in the first payload, the first formula determining the first time length and the second time length according to a transmission target signal;
generating a visible light signal by joining the preamble and the first payload; and
transmitting the visible light signal by a change in luminance of a light source.

US Pat. No. 10,171,164

2D BARCODE-BASED BI-DIRECTIONAL WIRELESS TRANSMISSION SYSTEM

NATIONAL CHUNG CHENG UNIV...

1. A 2D barcode-based bi-directional wireless transmission system, comprising:a first apparatus comprising a first display screen, a first processing system and a first camera, the first processing system configured to store information, to execute software, to encode data to be transmitted into one or more 2D barcodes, to capture 2D barcodes of other apparatuses, and to decode the captured 2D barcodes;
a second apparatus comprising a second display screen, a second processing system and a second camera, the second processing system configured to store information, to execute software, to encode data to be transmitted into one or more 2D barcodes, to capture 2D barcode images of other apparatuses and to decode the captured 2D barcode images;
wherein said first apparatus is further configured to encode said data to be sent into multiple 2D barcode images, and then sequentially display said multiple 2D barcode images on the first display screen;
wherein said second apparatus is configured to use the second camera to photograph the first display screen so as to sequentially capture said multiple 2D barcode images from said first apparatus, and then decode the captured said multiple 2D barcode images into a received data for storage;
wherein said second apparatus is further configured to encode a feedback information into a first 2D barcode image and display the first 2D barcode image on the second display screen;
wherein said first apparatus is further configured to capture the first 2D barcode image of said feedback information by aiming the first camera at the second display screen and then decoding the captured first 2D barcode image of said feedback information so as to obtain said feedback information, and
wherein said second apparatus is configured to encode the data to be sent into multiple 2D barcode images and sequentially display the multiple 2D barcode images on the second display screen;
wherein said first apparatus is configured to capture the multiple 2D barcode images from said second apparatus by aiming the first camera at the second display screen, and then decode the captured 2D barcode images into a second received data for storage;
wherein said first apparatus is configured to encode a second feedback information into a second 2D barcode image and display the second 2D barcode image on the first display screen; and
wherein said second apparatus is configured to capture the 2D barcode image of said feedback information by aiming the second camera at the first display screen and then decoding the captured second 2D barcode image of said second feedback information so as to obtain said second feedback information.

US Pat. No. 10,171,157

REPEATER

DENSO CORPORATION, Kariy...

1. A repeater for organizing a communication network, the repeater comprising:a port section having a plurality of ports, the port section configured to transmit and receive frames;
a memory configured to store communication efficiency information and connection information for each of a plurality of communication nodes on the communication network; and
a repeat processor configured
to retrieve a destination address of a frame received by the port section,
to select one of the plurality of the ports of the port section to transmit the received frame based on the destination address and the connection information stored in the memory, and
to transmit the received frame from the selected port, wherein
the repeat processor is further configured to perform a distribute-transfer process when a plurality of frames having a same destination address is received by the port section, by
defining a plurality of communication paths to the same destination address by referencing the connection information stored in the memory,
selecting one or more of the plurality of communication paths as a broadest path based on a preset communication efficiency parameter, the communication efficiency information stored in the memory, and the connection information stored in the memory,
selecting one communication path as the broadest path having a high communication efficiency when more than one of the plurality of communication paths are selected as the broadest path,
distributing one of the plurality of frames having the same destination address and having a highest communication speed to a port in connection with the broadest path, wherein
the communication efficiency information indicates a communication efficiency of each of the plurality of ports of the repeater and of each of a plurality of other ports associated with the communication nodes, and wherein
the connection information indicates connections among the communication nodes on the communication network.

US Pat. No. 10,171,152

COMMUNICATION METHOD AND APPARATUS USING SINGLE RADIO FREQUENCY CHAIN ANTENNA

ELECTRONICS AND TELECOMMU...

1. A communication method of a wireless device to which a single radio frequency (RF) chain antenna is applied, the communication method comprising:storing a plurality of beam sets for the single RF chain antenna and a plurality of quality values for the plurality of beam sets;
selecting a first beam set having a first quality value that is a best quality value among the plurality of stored beam sets;
confirming a second quality value for the first beam set using received data when the data are received using the first beam set; and
selecting a second beam set different from the first beam set among the plurality of stored beam sets when the second quality value is poorer than the first quality value,
wherein the confirming includes receiving a plurality of symbols within a predetermined time for receiving one symbol by beam switching based on the number of beams included in the first beam set.

US Pat. No. 10,171,146

MIMO RANK REDUCTION TO IMPROVE DOWNLINK THROUGHPUT

Telefonaktiebolaget L M E...

13. A device adapted to:determine at least one of that an imbalance between a plurality of parallel channels of a spatial multiplexing downlink transmission to a wireless device based on a plurality of measurements where each measurement is indicative of a signal quality for a corresponding one of the parallel channels is greater than an imbalance threshold and that a Negative Acknowledgement (NACK) rate over time for the plurality of parallel channels of a spatial multiplexing downlink transmission reported by the wireless device is greater than a NACK rate threshold; and
in response to determining at least one of that the imbalance between the plurality of parallel channels is greater than the imbalance threshold and that the NACK rate is greater than the NACK rate threshold, perform a rank reduction for the next downlink transmission whereby a rank is reduced from a rank indicator reported by the wireless device to some lower rank.

US Pat. No. 10,171,143

MICROWAVE RADIO TRANSMITTER AND RECEIVER FOR POLARIZATION MISALIGNMENT COMPENSATION

Telefonaktiebolaget LM Er...

1. A microwave radio transmitter for radio transmission to a microwave radio receiver, the microwave radio transmitter comprising:an antenna arrangement comprising an antenna having a polarization;
a baseband processing circuitry connected to the antenna arrangement, the baseband processing circuitry being configured to:
receive a polarization misalignment indication from the microwave radio receiver, the polarization misalignment indication being indicative of a misalignment between the polarization of the antenna and a corresponding polarization of a receive antenna comprised in the microwave radio receiver; and
compensate for polarization misalignment between the antenna and the receive antenna by adjusting the radio transmission based on the polarization misalignment indication.

US Pat. No. 10,171,103

HARDWARE DATA COMPRESSION ARCHITECTURE INCLUDING SHIFT REGISTER AND METHOD THEREOF

Mellanox Technologies, Lt...

1. A hardware compression architecture, comprising:a shift register including a plurality of sequentially coupled stages and a window stage coupled at an output end of the shift register, the shift register configured to receive an uncompressed data stream at an input end and output the uncompressed data from the window stage;
a plurality of comparators each coupled to receive a data value held in a corresponding stage of the shift register and a data value held in the window stage, each of the comparators being configured to output a comparison result indicating whether the received stage value and the window stage data value match;
logic, coupled to the comparators to receive the comparison results, to selectively compute one or more indexes based on the comparisons; and
an encoder coupled to receive the one or more indexes and output, based on the one or more indexes, a position of a matching data value and a length of a matching sequence of data values.

US Pat. No. 10,171,100

CIRCUIT AND METHOD FOR GENERATING REFERENCE SIGNALS FOR HYBRID ANALOG-TO-DIGITAL CONVERTORS

STMICROELECTRONICS INTERN...

1. A circuit configured to generate a plurality of reference signals for an analog-to-digital convertor (ADC) comprising a first stage and a second stage, the circuit comprising:a first reference source comprising a first output terminal and a second output terminal coupled to respective terminals of the first stage of the ADC, the first reference source being configured to generate a first reference voltage between the first output terminal and the second output terminal of the first reference source, the first reference voltage being configured to be provided as a first reference signal to the first stage of the ADC, the first reference voltage comprising a first transient signal generated by the first stage of the ADC;
a filter coupled to the first output terminal and the second output terminal of the first reference source and configured to filter the first transient signal from the first reference signal to produce a filtered first reference signal; and
a second reference source having input terminals coupled to the filter, wherein the filter comprises at least one first capacitive element coupled between the input terminals of the second reference source, the second reference source comprising a first output terminal and a second output terminal coupled to respective terminals of the second stage of the ADC, the second reference source configured to generate a second reference signal between the first output terminal and the second output terminal of the second reference source based on the filtered first reference signal, the second reference signal being configured to be provided as a second reference signal to the second stage of the ADC.

US Pat. No. 10,171,063

FILTER MODULE

WISOL CO., LTD., Osan-si...

14. A mobile communication terminal comprising:an antenna; and
a filter module connected to the antenna, wherein the filter module includes:
a substrate;
a plurality of filters formed on the substrate;
an amplifier formed on the substrate;
a connection part for connecting the plurality of filters and the amplifier to the substrate;
a cover layer formed on the substrate to cover the plurality of filters and the amplifier; and
a matching element formed on the substrate for matching impedances of the plurality of filters and the amplifier,
wherein the plurality of filters and the amplifier are simultaneously or sequentially packaged, and
wherein the matching element is formed in a shape of a layered spiral in a space between input terminals and output terminals of the plurality of filters.

US Pat. No. 10,171,043

AMPLIFICATION DEVICE INCORPORATING LIMITING

Telefonaktiebolaget LM Er...

1. An amplification device, comprising:an amplifier circuit comprising a signal input for an input signal to be amplified and a first signal output for a first output signal; and
a limiter, wherein the limiter comprises:
a differential amplifier comprising:
a first differential amplifier input for a threshold control signal;
a second differential amplifier input for a feedback signal; and
a differential amplifier output for a threshold signal indicative of a difference between the threshold control signal and the feedback signal;
a first diode having a first anode coupled to the first signal output and a first cathode coupled to the differential amplifier output; and
a feedback stage coupled between the differential amplifier output and the second differential amplifier input, wherein the feedback stage is configured to generate the feedback signal dependent on the threshold signal.

US Pat. No. 10,171,041

PREDISTORTION DEVICE

HUAWEI TECHNOLOGIES CO., ...

1. A device, comprising:an input terminal configured to receive an input signal;
a predistortion filter, connected between the input terminal and a non-linear power amplifier (PA), the predistortion filter having second filter weights;
a first delay element coupled to the input terminal, and configured to delay the input signal by a time delay D to provide a delayed input signal;
an adaptive filter having first filter weights, and configured to filter the delayed input signal; and
an adjuster configured to, according to an adaptive algorithm and the delayed input signal, adjust the first filter weights of the adaptive filter and the second filter weights of the predistortion filter so that the first filter weights are the same as the second filter weights,
wherein both the adaptive filter and the adjuster are coupled to the first delay element to receive the delayed input signal.

US Pat. No. 10,171,037

MULTI-MODE POWER MANAGEMENT SYSTEM SUPPORTING FIFTH-GENERATION NEW RADIO

Qorvo US, Inc., Greensbo...

1. A multi-mode power management system comprising:a power amplifier circuit configured to amplify a fifth-generation new radio (5G-NR) signal to an output power level for transmission in a 5G-NR band, the power amplifier circuit comprising:
a carrier amplifier configured to amplify the 5G-NR signal to a first power level in response to receiving a first bias voltage at a first bias voltage input; and
a peaking amplifier configured to amplify the 5G-NR signal to a second power level in response to receiving a second bias voltage at a second bias voltage input;
wherein a sum of the first power level and the second power level equals the output power level;
first tracker circuitry configured to generate a first voltage at a first voltage output;
second tracker circuitry configured to generate a second voltage at a second voltage output; and
control circuitry configured to:
couple the first voltage output to the first bias voltage input and the second bias voltage input in a 5G-NR low power mode; and
couple the first voltage output and the second voltage output to the first bias voltage input and the second bias voltage input, respectively, in a 5G-NR high power mode.

US Pat. No. 10,171,029

SOILING MEASUREMENT DEVICE FOR PHOTOVOLTAIC ARRAYS EMPLOYING MICROSCOPIC IMAGING

1. A device comprisinga transparent window,
an imaging unit, and
a computing element coupled to said imaging unit,
wherein
said device is configured to allow soiling particles to accumulate on a surface of said transparent window,
said imaging unit is configured to capture an image of said surface, and
said computing element is configured to perform analysis of said image to determine a soiling level of said transparent window,
wherein said analysis comprises
determining a reference brightness of said image corresponding to a clean state of said transparent window, and
determining said soiling level based at least upon a brightness of said image relative to said reference brightness.

US Pat. No. 10,171,028

METHOD AND APPARATUS FOR MONITORING PHOTOVOLTAIC MODULE

HUAWEI TECHNOLOGIES CO., ...

1. A method for monitoring a photovoltaic module, the method being applied to a module voltage monitoring system, the module voltage monitoring system comprising a primary monitoring apparatus and several module voltage monitoring apparatuses, a communication address being allocated to each module voltage monitoring apparatus, the primary monitoring apparatus establishing a connection to the corresponding module voltage monitoring apparatus using the communication address, each module voltage monitoring apparatus corresponding to a module of a photovoltaic string, the module voltage monitoring apparatus being configured to sample a relative voltage of the corresponding module relative to a voltage reference point, and the method comprising:obtaining, by the primary monitoring apparatus, communication addresses of all the module voltage monitoring apparatuses;
establishing a connection to a corresponding module voltage monitoring apparatus using the communication address;
obtaining a relative voltage of a corresponding module relative to the voltage reference point from the module voltage monitoring apparatus to which the connection is established;
obtaining, by the primary monitoring apparatus according to relative voltages obtained from all the module voltage monitoring apparatuses, a physical location that is of a module corresponding to each module voltage monitoring apparatus and that is in the photovoltaic string;
establishing, by the primary monitoring apparatus, an information table according to the communication address of each module voltage monitoring apparatus and the physical location of the module corresponding to each module voltage monitoring apparatus; and
performing module abnormality detection according to the information table, the information table comprising at least a correspondence between the communication address of each module voltage monitoring apparatus and the physical location of the module corresponding to each module voltage monitoring apparatus, the module voltage monitoring apparatus and the module in the photovoltaic string corresponding one-to-one to each other, a module at an odd-number physical location in the photovoltaic string and the module voltage monitoring apparatus corresponding one-to-one to each other when a quantity of modules in the photovoltaic string is an odd number, or the first module of a positive pole of the photovoltaic string and a module at an even-number physical location corresponding one-to-one to the module voltage monitoring apparatuses when a quantity of modules in the photovoltaic string is an even number.

US Pat. No. 10,171,020

INTELLIGENT COOPERATIVE CONTROL SYSTEM AND METHOD FOR MULTI-UNIT PERMANENT MAGNET SYNCHRONOUS MOTOR

NORTHEASTERN UNIVERSITY, ...

1. An intelligent cooperative control system for a multi-unit permanent magnet synchronous motor, comprising a double-parallel PWM rectifier circuit, a first permanent magnet motor cooperative control unit, a second permanent magnet motor cooperative control unit, a third permanent magnet motor cooperative control unit and a multi-unit permanent magnet synchronous motor, wherein the first permanent magnet motor cooperative control unit, the second permanent magnet motor cooperative control unit and the third permanent magnet motor cooperative control unit cooperatively control three stator units of the multi-unit permanent magnet synchronous motor in a parallel connection manner,the first permanent magnet motor cooperative control unit, the second permanent magnet motor cooperative control unit and the third permanent magnet motor cooperative control unit adopt the same structure, each of which comprises a driving circuit, a control unit and an inverter unit, wherein the control units realize cooperative control of the multi-unit permanent magnet synchronous motor by mutual communications,
each of the control units comprises a distributed cooperative controller and a current control and speed estimation unit, wherein the current control and speed estimation unit is used for acquiring A phase, B phase and C phase current detection signals at an input end of the motor, obtaining rotor speed estimation values according to the acquired A Phase, B phase, and C phase current detection signals and simultaneously sending the rotor speed estimation values to the distributed cooperative controller of each control unit, and is also used for receiving output values of the distributed cooperative controllers, obtaining a direct-axis voltage reference value and a quadrature-axis voltage reference value in a two-phase stationary reference frame according to the output values, then obtaining PWM signals by using space vector pulse-width modulation, and sending the obtained PWM signals to the inverter unit through the driving circuits, the distributed cooperative controller is used for describing a communication structure of the three control units by using a method for constructing an undirected graph, obtaining an overall communication association matrix of each of the control units according to the constructed undirected graph, constructing an error function according to the rotor speed estimation value, a set rotor speed reference value and the overall communication association matrix of the control units, setting a real number matrix and real number items, and obtaining an output value of each of the distributed cooperative controllers according to the constructed error function.

US Pat. No. 10,171,012

AIR CONDITIONER AND STARTUP CONTROL METHOD AND SYSTEM FOR OUTDOOR FAN OF THE AIR CONDITIONER

Guangdong Welling Motor M...

1. A method for starting control over an outdoor fan of an air conditioner, wherein a motor of the outdoor fan is driven by a driver, and the method for starting control over the outdoor fan of the air conditioner comprises the following steps of:when a bootstrap capacitor in the driver is charged, detecting an initial rotating state of the motor in real time; and
after the bootstrap capacitor is charged, correspondingly controlling the motor to be started according to the detected initial rotating state;
wherein the step of correspondingly controlling the motor to be started according to the detected initial rotating state comprises the following steps:
Step a: when the initial rotating state of the motor is pneumatic forward direction rotation, judging according to the rotating speed of the motor whether a motor observer converges;
executing Step e if the motor observer converges, or else executing Step d;
Step b: when the initial rotating state of the motor is stillness, performing positioning control over the motor, and executing Step d;
Step c: when the initial rotating state of the motor is pneumatic counter rotation, controlling the motor according to a constant deceleration to stop rotating, and executing Step d;
Step d: controlling the motor to perform accelerated rotation in a vector control mode; and
Step e: controlling the motor to enter into a conventional operation state in a vector control mode.

US Pat. No. 10,171,008

VIBRATION WAVE MOTOR AND DRIVING APPARATUS USING THE VIBRATION WAVE MOTOR

Canon Kabushiki Kaisha, ...

1. A vibration wave motor, comprising:a vibrating plate having a rectangular surface;
a piezoelectric device bonded onto the vibrating plate, and configured to vibrate at high frequency; and
a projection provided on one of the vibrating plate and the piezoelectric device, wherein
a natural vibration mode, which has a resonant frequency equal to or adjacent to a resonant frequency of torsional vibration in a natural vibration mode under a state in which the vibrating plate, the piezoelectric device, and the projection are integrated, is a natural vibration mode of bending vibration in one of a direction parallel to and a direction orthogonal to a torsion center axis of the torsional vibration in the natural vibration mode, and
the projection is provided at a position closer to an antinode than to a node, the node and the antinode being in the direction orthogonal to the torsion center axis of the torsional vibration in the natural vibration mode.

US Pat. No. 10,171,003

CONTROLLING A SWITCHING RESONANT CONVERTER

STMICROELECTRONICS S.R.L....

1. A system, comprising:a converter including a transformer having a primary winding in a primary side of the transformer and a secondary winding in a secondary side of the transformer, the converter including a resonant tank in the primary side; and
a controller including:
a capacitance configured to be charged simultaneously using a first current and a second current that is different than the first current or discharged simultaneously using the first current and the second current;
sourcing and sinking transistors configured to source or sink the first current for charging or discharging the capacitance;
an operational transconductance amplifier configured to determine a level of the second current based on a level of current flowing through the resonant tank, and source or sink the second current for charging or discharging the capacitance; and
logic configured to output a switching signal for operating the converter based on a voltage across the capacitance.

US Pat. No. 10,171,002

SWITCHING POWER SUPPLY AND IMAGE FORMING APPARATUS

BROTHER KOGYO KABUSHIKI K...

1. A switching power supply comprising:a main power supply;
a rectifying-and-smoothing circuit configured to rectify an AC voltage supplying from the main power supply, and to smooth the rectified AC voltage by a smoothing capacitor;
a transformer connected to the rectifying-and-smoothing circuit;
a first switching element connected to a primary coil of the transformer;
a switch controller configured to perform switching-control the first switching element to oscillate the primary side of the transformer, thereby inducing a voltage to a secondary side of the transformer; and
a second switching element connected in series with the smoothing capacitor of the rectifying-and-smoothing circuit and configured to switch between on-and-off states of energization by a control signal that is to be output from the switch controller,
wherein the switch controller is configured to limit an on-time period of the second switching element by the control signal during an output stop mode in which the oscillation of the transformer is to be stopped.

US Pat. No. 10,170,997

SWITCHING POWER SUPPLY APPARATUS

DENSO CORPORATION, Kariy...

1. A switching power supply apparatus comprising:a main circuit including a switching element and an inductor, the switching element turning on to increase a current flowing in the inductor when a driving signal changes to an on-level and turning off to recirculate the current flowing in the inductor to an output side when the driving signal changes to an off-level;
a current detection circuit for outputting a current detection signal corresponding to the current flowing in the inductor through the switching element;
a voltage detection circuit for outputting a detection voltage corresponding to an output voltage of the main circuit;
an error amplification circuit for outputting an error signal in accordance with a difference between a reference voltage corresponding to a target output voltage of the main circuit and the detection voltage;
a PWM signal generation circuit for performing a current mode control to set a PWM signal to the on-level in synchronization with a clock signal and set the PWM signal to the off-level in synchronization with a normal reset signal, which changes a level when the current detection signal reaches the error signal;
a driver circuit for outputting the driving signal in response to the PWM signal;
a switching determination circuit for checking whether the output voltage reached a switching determination voltage higher than the target output voltage; and
a reset signal generation circuit for generating a reset signal for a short-pulse operation, which is delayed by a predetermined delay period from a time point of a change of the PWM signal to the on-level,
wherein the PWM signal generation circuit changes the PWM signal to the off-level in synchronization with the reset signal for short-pulse operation in place of the normal reset signal when the switching determination circuit determines that the output voltage reached the switching determination voltage.

US Pat. No. 10,170,993

CONTROL SYSTEM FOR TRANSITIONING A DC-DC VOLTAGE CONVERTER FROM A BUCK OPERATIONAL MODE TO A SAFE OPERATIONAL MODE

LG Chem, Ltd., Seoul (KR...

1. A control system for transitioning a DC-DC voltage converter from a buck operational mode to a safe operational mode, the DC-DC voltage converter having a high voltage switch, a low voltage switch, and a DC-DC voltage converter control circuit with a high side integrated circuit and a low side integrated circuit therein, the DC-DC voltage converter control circuit being electrically coupled between the high voltage switch and the low voltage switch; the high side integrated circuit having a first plurality of FET switches therein, the low side integrated circuit having a second plurality of FET switches therein, comprising:a microcontroller having a first application and a second application;
the first application commanding the microcontroller to generate a first control signal that is received at a first input pin on the high side integrated circuit to command the high side integrated circuit to transition each of the first plurality of FET switches therein to an open operational state, the first control signal being further received at a first input pin on the low side integrated circuit to command the low side integrated circuit to transition each of the second plurality of FET switches therein to the open operational state; and
the second application commanding the microcontroller to generate a second control signal that is received at a second input pin on the high side integrated circuit to command the high side integrated circuit to transition each of the first plurality of FET switches therein to the open operational state, the second control signal being further received at a second input pin on the low side integrated circuit to command the low side integrated circuit to transition each of the second plurality of FET switches therein to the open operational state.

US Pat. No. 10,170,991

CONTROL CIRCUIT AND CONTROL METHOD FOR A VOLTAGE CONVERTER

Silergy Semiconductor Tec...

1. A control circuit for a voltage converter having a plurality of input voltage signals and one output voltage signal, the control circuit comprising:a) a logic control circuit configured to receive an operation signal, and to generate an enable signal, a trigger signal, and an order signal;
b) a feedback control circuit configured to receive said plurality of input voltage signals, and said output voltage signal, and to generate a plurality of feedback control signals according to said enable signal, said trigger signal, and said order signal; and
c) a channel selection circuit configured to receive said order signal and said plurality of feedback control signals, and to generate a plurality of control signals to control switches in said voltage converter.

US Pat. No. 10,170,985

APPARATUS FOR CURRENT ESTIMATION OF DC/DC CONVERTER AND DC/DC CONVERTER ASSEMBLY

NATIONAL CHUNG SHAN INSTI...

1. An apparatus for current estimation of a DC/DC converter, comprising:a current sensing unit for sensing a current passing through a switch of the DC/DC converter and converting the current into a voltage signal;
a signal sampling unit, coupled to the current sensing unit, for sampling the voltage signal so as to output a sampled signal; and
a current estimator, coupled to the signal sampling unit, for determining a signal indicating estimated magnitude of an inductor current of the DC/DC converter, based on the sampled signal, a scale factor of the current sensing unit, a duty ratio of a driving signal for controlling the switch, an input voltage and an output voltage of the DC/DC converter,
wherein the signal sampling unit is configured to be synchronized to the driving signal, and the signal sampling unit samples the voltage signal at a middle of each ON period of the driving signal so as to output the sampled signal.

US Pat. No. 10,170,980

METHOD FOR SYNCHRONIZING POWER CHARGE-PUMP WITH SYSTEM CLOCK

Dialog Semiconductor (UK)...

1. A power management integrated circuit (PMIC), comprising:a.) a system clock;
b) a PMIC control circuit configured to synchronize a charge-pump with the system clock;
c.) in phase detection and latch circuitry for synchronization and resynchronization of said system clock with said charge-pump;
d.) phase control multiplexers and associated delay circuitry for said self-oscillation; and
e.) a finite state machine for latching said phase and phase transitions,
wherein said charge-pump is configured to self-oscillate and no longer use said system clock, providing continuous phase at a first transition from clock sync-mode to self-oscillate, and
wherein said charge-pump is configured to swap from said self-oscillating and resynchronize with said system clock, providing continuous phase when a second transition from self-oscillate back to clock sync-mode is made.

US Pat. No. 10,170,972

HALBACH ARRAY AND MAGNETIC SUSPENSION DAMPER USING SAME

SHANGHAI MICRO ELECTRONIC...

1. A Halbach magnetic array, comprising a plurality of first and second magnetic units alternately arranged in a width direction of the array, wherein:each of the plurality of first magnetic units comprises a plurality of first magnetic groups and first magnetic columns alternately arranged in a length direction of the array, each of the plurality of first magnetic groups includes four first magnetic bars arranged in a 2*2 matrix;
each of the plurality of second magnetic units comprises a plurality of second magnetic groups and second magnetic columns alternately arranged in the length direction of the array, each of the plurality of second magnetic groups includes four second magnetic bars arranged in a 2*2 matrix;
each of the plurality of first magnetic columns is magnetized in a height direction of the array, and each of the plurality of second magnetic columns is magnetized in a direction opposite to the height direction of the array.

US Pat. No. 10,170,970

STEPPER MOTOR

SANYO DENKI CO., LTD., T...

1. A stepper motor comprising:a rotor including a rotor core and a permanent magnet, the rotor core including a plurality of teeth; and
a stator arranged around the rotor while being spaced apart from the rotor and including eight magnetic poles, each of the magnetic poles including a plurality of teeth and projecting toward the rotor, wherein
a winding is wound around every other magnetic poles, and
a phase of the teeth of a pair of magnetic poles opposing each other and having no winding therearound is shifted by 180 degrees from a phase of the teeth of other pair of magnetic poles opposing each other and having no winding therearound.

US Pat. No. 10,170,969

POWER GENERATION DEVICE

Panasonic Intellectual Pr...

1. A power generation device comprising:a first magnet member;
a second magnet member having its N-pole reversely disposed to an N-pole of the first magnet member;
a center yoke capable of horizontally shifting and disposed between the first magnet member and the second magnet member;
a coil disposed at an outer circumference of the center yoke;
a drive member horizontally shifting while holding the first magnet member and the second magnet member; and
a fixing part, wherein
the drive member and the center yoke horizontally shift in a first direction,
after the horizontal shift of the center yoke in the first direction stops, the drive member further horizontally shifts in the first direction, and the center yoke horizontally shifts in a second direction opposite to the first direction,
the center yoke has a restriction-target part,
the fixing part is disposed in the restriction-target part,
a clearance exists between the restriction-target part and the fixing part, and
when the fixing part and the restriction-target part are brought into contact with each other, the horizontal shifting of the center yoke in the first direction stops.

US Pat. No. 10,170,959

ELECTRICAL MACHINES AND METHODS OF ASSEMBLING THE SAME

Regal Beloit America, Inc...

1. A motor having an axis of rotation, said motor comprising:a housing having a first end cap and an opposite second end cap, wherein said first end cap and said second end cap define an internal cavity;
a first shaft coupled to said housing;
a second shaft rotationally coupled to said first shaft;
a stator coupled to said second end cap and positioned within said internal cavity, said stator comprising an outer circumferential surface and an inner circumferential surface, said inner circumferential surface defining a stator bore around the axis of rotation;
a gearbox coupled to said first shaft and to said second shaft and positioned within said stator bore within said internal cavity, said gearbox comprising a planetary gear system comprising a sun gear, a ring gear, and a plurality of planet gears, said ring gear coupled directly to said second end cap, said gearbox further comprising a fastener extending through at least one planet gear of said plurality of planet gears and said second shaft such that said plurality of planet gears are rotationally coupled to said second shaft; and
a rotor coupled directly to said first shaft and positioned within said internal cavity between said first end cap and said ring gear, said rotor configured to rotate said first shaft, wherein said rotor is offset from said stator in an axial direction.

US Pat. No. 10,170,956

BRUSHLESS MOTOR WITH WATER STOPPING WALLS CREATING LABYRINTH STRUCTURE

DENSO CORPORATION, Aichi...

1. A brushless motor comprising:a motor shaft;
a rotor housing including a circular cylinder-shaped shaft bearing housing section provided at the radial direction outside of the motor shaft, and an outer cylinder section formed at the radial direction outside of the shaft bearing housing section;
a shaft bearing that is housed in the shaft bearing housing section, and that is assembled to the motor shaft;
a stator core that includes a ring-shaped unit provided at the radial direction outside of the shaft bearing housing section, and a plurality of teeth formed in a radiating pattern at the periphery of the ring-shaped unit, and that is housed inside the outer cylinder section;
an insulator that includes a ring-shaped insulating portion covering the ring-shaped unit, and a plurality of teeth insulating portions respectively covering the plurality of teeth;
a plurality of winding coil portions wound around the teeth and over the teeth insulating portions;
a centerpiece that includes a main body section disposed facing an opening of the outer cylinder section, and that supports the motor shaft and the stator core;
a first water stopping wall that is formed in a ring shape along the circumferential direction of the motor shaft, and that extends along an axial direction of the motor shaft from the ring-shaped insulating portion toward the main body section;
a second water stopping wall that is formed in a ring shape along the circumferential direction of the motor shaft, that extends out along the axial direction of the motor shaft from the main body section toward the ring-shaped insulating portion, and that, together with the first water stopping wall, configures a labyrinth structure positioned at a radial direction inside of the plurality of winding coil portions;
a third water stopping wall that is formed in a ring shape along the circumferential direction of the motor shaft, and that extends out along the axial direction of the motor shaft from the ring-shaped insulating portion toward the main body section; and
a fourth water stopping wall that is formed in a ring shape along the circumferential direction of the motor shaft, and that extends out along the axial direction of the motor shaft from the main body section toward the ring-shaped insulating portion, wherein:
the first water stopping wall and the second water stopping wall configure an inner labyrinth structure as the labyrinth structure,
the third water stopping wall and the fourth water stopping wall configure an outer labyrinth structure positioned at the radial direction inside of the plurality of winding coil portions and at a radial direction outside of the inner labyrinth structure, and
portions of the rotor housing run substantially parallel to the center piece, and the inner labyrinth structure and the outer labyrinth structure are each disposed closer to the center piece than to the portions of the rotor housing that run substantially parallel to the center piece.

US Pat. No. 10,170,954

DIRECT CURRENT MOTOR

Hitachi Automotive System...

1. A direct-current motor including an armature including a plurality of armature slots and an armature coil wound to stride over two of the armature slots away from each other with a certain number of the armature slots interposed therebetween, the direct-current motor comprising:at least four armature coils each wound on a lowermost layer of a coil end portion without overlapping with the armature coil wound through the different armature slots,
wherein, on a higher layer than the four armature coils wound on the lowermost layer, at least four armature coils wound in an equal pattern to that of the four armature coils are provided
wherein the four armature coils wound on the lowermost layer have coil sides thereof adjacent to each other housed in the respective equal armature slots, and the four armature coils wound on the higher layer than the lowermost layer have coil sides thereof adjacent to each other housed in the respective equal armature slots,
wherein the armature coils constitute a plurality of coil groups each including coils which get an equal number to the number of pole pairs P, each of the coil groups being wound by one continuous winding conductor, and a coil group including (P?1) coils,
wherein a part between two coils wound by one continuous winding conductor is retained in a conductor retaining portion of a commutator segment in a state in which the two coils are continuous, and
wherein each end portion of each of the coil groups is cut in a state of being retained in a conductor retaining portion of a different commutator segment from the commutator segment.

US Pat. No. 10,170,952

ROTARY ELECTRIC MACHINE AND MANUFACTURING METHOD FOR COIL OF ROTARY ELECTRIC MACHINE

MITSUBISHI ELECTRIC CORPO...

1. A rotary electric machine comprising an armature that includes:an annular armature core in which a plurality of teeth are arranged circumferentially, and in which slots are formed between said teeth; and
an armature winding that is mounted to said armature core,wherein:said armature winding is constituted by a plurality of distributed-winding coils that are each produced by winding a conductor wire that is insulated, that is jointless and continuous, and that has a rectangular cross section;
said coils each include:
2m rectilinear portions that are inserted into a pair of slots that comprise two of said slots so as to have longitudinal directions oriented in an axial direction, where m is an integer that is greater than or equal to one; and
(2m?1) coil end portions that link said 2m rectilinear portions consecutively by each connecting together end portions of two selected rectilinear portions among said 2m rectilinear portions,
said coils being mounted in one or more layers in a radial direction in said armature core so as to be arranged at a pitch of one slot in a circumferential direction;
said coil end portions include:
a bulging portion that protrudes axially outward in a convex shape; and
oblique portions that link said two connected rectilinear portions and said bulging portion;
said bulging portion has a crank portion that displaces radial positions of said two connected rectilinear portions by a set amount; and
a cross-sectional shape of said bulging portion is a rectangular shape and a cross-sectional area of said bulging portion is smaller than a cross-sectional area of said oblique portions.

US Pat. No. 10,170,951

ELECTRICAL MACHINE

VOLABO GMBH, Holzkirchen...

1. An electrical machine having a stator, wherein:the stator comprises a plurality of slots for receiving a stator winding,
one respective conductor section of the stator winding is inserted into each slot,
the conductor sections of at least one pair of poles are short-circuited to one another on a first side of the stator,
the conductor sections on a second side of the stator, opposite from the first side, are each connected to a terminal of a power supply unit,
the power supply unit comprises two annular conductors between which at least one power-electronics component is arranged, and
the number of flat subsurfaces of the inner annular conductor and of the outer annular conductor are each equal to the number of slots of the stator.

US Pat. No. 10,170,950

ROTARY ELECTRIC MACHINE AND METHOD FOR MANUFACTURING AN ARMATURE THAT IS USED IN THE ROTARY ELECTRIC MACHINE

MITSUBISHI ELECTRIC CORPO...

1. A rotary electric machine comprising an armature that is formed by mounting an armature winding to an annular armature core, wherein:a first winding body and a second winding body are each configured so as to have a helical shape in which end portions of rectilinear portions are linked by coil ends, by winding a jointless, continuous conductor wire that is coated with insulation for m turns, where m is a natural number that is greater than or equal to two;
a two-lane winding body is configured by assembling said first winding body and said second winding body such that orbiting portions that are constituted by said rectilinear portions and said coil ends of said first winding body overlap entirely in a radial direction with corresponding orbiting portions that are constituted by said rectilinear portions and said coil ends of said second winding body;
said armature winding is configured by mounting said two-lane winding bodies into respective pairs of slots of said armature core that are separated by a predetermined number of slots;
said coil ends include a top portion that displaces by a predetermined amount in a radial direction at an approximately central portion between said linked rectilinear portions; and
said radial displacement at said top portion is approximately a×d, where a is a natural number that is greater than or equal to 2 and less than or equal to 2×(m?1), and d is a radial thickness of said rectilinear portions that are housed inside said slots, 4×m of said rectilinear portions of two of said two-lane winding bodies being housed inside said slots so as to line up in single columns in a radial direction.

US Pat. No. 10,170,943

WIRELESS INDUCTIVE POWER TRANSFER

KONINKLIJKE PHILIPS N.V.,...

1. A power transmitter for providing a power transfer to a power receiver using a wireless inductive power transfer signal, the power transmitter comprising:a transmitter inductor for generating an inductive carrier signal for load modulation in response to a voltage drive signal applied to at least one of the transmitter inductor and a resonance circuit comprising the transmitter inductor;
a measurement unit arranged to, for cycles of a reference signal synchronized to the voltage drive signal, perform first measurements of at least one of an inductor current and an inductor voltage for the transmitter inductor, each first measurement being over a measurement time interval being a subset of a cycle period of the reference signal and having a first time offset relative to the reference signal;
an adaptor for varying the first time offset and detecting an optimum measurement timing offset for the varying first time offset, the optimum measurement timing offset being detected as a time offset for the varying first time offset which results in a maximum demodulation depth for a demodulation depth reflecting a difference measure for first measurements generated by the measurement unit with the first time offset for different modulation loads of the inductive carrier signal; and
a demodulator for demodulating load modulation of the inductive carrier signal from first measurements with the first time offset set to the optimum measurement timing offset.

US Pat. No. 10,170,942

POWER RECEIVING DEVICE AND WIRELESS POWER TRANSMISSION SYSTEM

Panasonic Intellectual Pr...

1. A power receiving device, comprising:a power receiving antenna that receives AC power from a power transmitting device including a power transmitting antenna that wirelessly transmits the AC power;
a rectifier circuit that converts the AC power into DC power;
a detection circuit that detects a value of the DC power during a time that the power receiving antenna receives the AC power from the power transmitting device;
a load that is driven by the DC power;
a battery that charges the DC power;
a switching circuit that provides i) connection and disconnection between the rectifier circuit and the load and ii) connection and disconnection between the load and the battery; and
a control circuit that controls the power receiving device, the control circuit being configured to control the switching circuit as a function of the value of the DC power detected using the detection circuit,
wherein the control circuit controls the switching circuit to connect the rectifier circuit to the load and disconnect the rectifier circuit from the battery and determines whether the value of the DC power detected using the detection circuit is less than or equal to a power threshold value, and
in response to the value of the DC power reaching less than or equal to the power threshold value, the control circuit controls the switching circuit to disconnect the rectifier circuit from the load and connect the load to the battery to drive the load using the DC power charged by the battery.

US Pat. No. 10,170,941

NON-CONTACT TYPE POWER TRANSFER APPARATUS

Samsung Electro-Mechanics...

1. A non-contact type power transfer apparatus comprising:a power converter configured to convert input power into transmission power;
a power transmitter configured to transmit the transmission power in a non-contact manner; and
a controller configured to provide a power conversion control signal to control a power conversion operation of the power converter according to a state of the transmission power, and to output an input power control signal to control a power level of the input power according to the power conversion control signal,
wherein the input power control signal is set based on the power conversion control signal.

US Pat. No. 10,170,937

DEVICES, SYSTEMS, AND METHODS FOR ADJUSTING OUTPUT POWER USING SYNCHRONOUS RECTIFIER CONTROL

QUALCOMM Incorporated, S...

1. An apparatus for wirelessly receiving power, the apparatus comprising:a receive circuit configured to receive wireless power via a magnetic field sufficient to power or charge a load;
a tuning circuit comprising a variable reactive element, coupled to the receive circuit, and configured to detune the receive circuit away from a resonant frequency to adjust an output power level to a first output power level;
a rectifier electrically coupled to the receive circuit and configured to rectify an alternating current (AC) signal, generated in the receive circuit, to a direct current (DC) signal for supplying power to the load, the rectifier comprising a switch; and
a drive circuit configured to:
determine when a measured current value of the AC signal through the switch is equal to a first non-zero current value;
actuate the switch based on the determination that the measured current value of the AC signal through the switch is equal to the first non-zero current value; and
adjust the first non-zero current value to a second non-zero value to adjust the first output power level to a second output power level.

US Pat. No. 10,170,936

WIRELESS POWER RECEIVER AND POWER SUPPLY APPARATUS USING THE SAME

Samsung Electro-Mechanics...

1. A wireless power receiver of a wearable device, the wireless power receiver comprising:a core part disposed in the wearable device to be adjacent to a surface of an internal part of the wearable device;
a magnetic sheet disposed in the wearable device between the core part and the surface of the internal part;
a receiving coil disposed in the wearable device and wound around the core part; and
a power circuit configured to provide power received from the receiving coil to the wearable device.

US Pat. No. 10,170,934

ELECTROMAGNETIC-COUPLING-MODULE-ATTACHED ARTICLE

MURATA MANUFACTURING CO.,...

1. An article comprising:a metal portion including at least one main surface; and
a power supply circuit including a coil-shaped electrode; wherein
the coil-shaped electrode of the power supply circuit is disposed adjacent to the at least one main surface of the metal portion such that a portion of the coil-shaped electrode overlaps the at least one main surface of the metal portion and another portion of the coil-shaped electrode does not overlap the at least one main surface of the metal portion when viewed in a direction perpendicular to the at least one main surface of the metal portion;
the coil-shaped electrode is disposed on only one side of the at least one main surface of the metal portion;
the coil-shaped electrode of the power supply circuit is magnetically coupled to the at least one main surface of the metal portion; and
the metal portion is configured to perform at least one of transmitting a power supplied from the power supply circuit, and receiving a power and supplying the power to the power supply circuit.

US Pat. No. 10,170,933

NON-CONTACT TYPE POWER SUPPLYING APPARATUS AND NON-CONTACT TYPE POWER SUPPLYING METHOD

Samsung Electro-Mechanics...

1. A non-contact type power supplying apparatus comprising:a first transmitting coil configured to output a detection signal through the first transmitting coil, wherein the detection signal is a plurality of discrete pulses;
a second output comprising a second transmitting coil and configured to output a wake-up signal through the second transmitting coil or transmit power through the second transmitting coil using a non-contact type method, wherein the wake-up signal is a plurality of discrete pulses; and
a controller configured to determine whether or not a first object has approached by using a variation of an impedance of the first transmitting coil, control the second output to output the wake-up signal, determining whether or not an approached first object is a first power receiving apparatus by using a first response signal outputted from the approached first object in response to the wake-up signal, control the second output to transmit power to the first power receiving apparatus when the approached first object is determined to be the first power receiving apparatus, determine whether or not a second object has approached by using a variation of the impedance of the first transmitting coil while the second output transmits the power to the first power receiving apparatus, and control the second output to stop the transmission of the power and output the wake-up signal when it is determined that the second object has approached,
wherein the amplitude of either one or both of the detection signal pulses and the wake-up single pulses varies sequentially from a low level to a high level, and
wherein the first output outputs the detection signal while the second output transmits the power to the first power receiving apparatus.

US Pat. No. 10,170,931

ELECTRIC POWER CONTROL SYSTEM

NEC Corporation, Tokyo (...

1. An electric power control system connected to an electric power supplying unit for supplying electric power and a load unit for accepting supply of electric power and consuming the electric power, the electric power control system comprising:a supplied energy acquiring unit for acquiring a supplied energy, the supplied energy being an amount of electric power supplied from the electric power supplying unit;
a consumed energy acquiring unit for acquiring a consumed energy, the consumed energy being an amount of electric power consumed by the load unit; and
an electric power supply and demand controlling unit for, depending on a total supplied energy and a total consumed energy, transmitting and receiving electric power to and from another device to change the total supplied energy, the total supplied energy being a total of the acquired supplied energy, and the total consumed energy being a total of the acquired consumed energy,
wherein the electric power supply and demand controlling unit calculates an electric power supply and demand difference representing a difference between the total supplied energy and the total consumed energy, and transmits and receives electric power to and from another device to change the total supplied energy, thereby executing control so that the electric power supply and demand difference falls within a predetermined range set in advance,
the system further comprising a plurality of electric power supply and demand controlling units, the electric power supply and demand controlling units each belonging to any of groups determined in advance, and the electric power supply and demand controlling units each targeting the electric power supplying unit and/or the load unit set to belong to its group for control of electric power supply and demand,
wherein the electric power supply and demand controlling units each transmit and receive electric power to and from another device placed outside its group to change the total supplied energy in its group, thereby making the electric power supply and demand difference in its group fall within a predetermined range set in advance,
wherein the electric power supply and demand controlling units each transmit and receive electric power to and from another of the electric power supply and demand controlling units and make the electric power supply and demand difference in its group fall within a predetermined range set in advance, the other electric power supply and demand controlling unit belonging to another of the groups, and
wherein the electric power supplying unit includes an electric power system which supplies a predetermined energy of electric power and a generator which generates and supplies electric power; and
the electric power supply and demand controlling unit belonging to each of a plurality of distribution substations to which different electric power supplying units and/or different load units belong, respectively, transmits and receives electric power to and from another of the electric power supply and demand controlling units and thereby executes control so that a sum of supplied energy in the plurality of distribution substations becomes minimum, the other electric power supply and demand controlling unit belonging to another of the distribution substations.

US Pat. No. 10,170,930

ELECTRICAL POWER RESTORATION SYSTEM FOR A CIRCUIT ASSEMBLY AND METHOD

Runway Energy, LLC, San ...

1. An electrical power restoration system for a circuit assembly having a circuit breaker, an electrical load and a circuit conditioner, the circuit conditioner being configured to condition electrical current flowing through the circuit assembly, the electrical power restoration system comprising:a circuit controller that is positioned along the circuit assembly between the circuit breaker and the electrical load, the circuit controller being electrically connected to the circuit conditioner, the circuit controller selectively controlling activation of the circuit conditioner;
a first hot conductor that selectively conducts AC power from the circuit breaker to the circuit controller; and
a second hot conductor that conducts AC power from the circuit controller to the electrical load only when the first hot conductor conducts AC power from the circuit breaker to the circuit controller.

US Pat. No. 10,170,928

POWER TRANSFER SYSTEM, POWER SUPPLY SYSTEM AND CHARGING COMBINATION

Chervon (HK) Limited, Wa...

1. A power supply system, comprising an electric tool and an electric equipment which can receive electric energy from the electric tool,wherein the electric tool comprises:
a power supply module configured to store electric energy or to obtain electric energy from an external power grid as an energy source of the electric tool;
a first USB connector for being electrically coupled to the power supply module and at least configured to transfer electric energy; and
a first control module comprising a first controller which is at least configured to control an output voltage of the first USB connector when supplying electric energy;
wherein the electric equipment comprises:
a second USB connector configured to be electrically coupled to the first USB connector for transferring electric energy; and
a second control module comprising a second controller at least configured to communicate with the first control module and controlling the second USB connector; and
the second USB connector provides an output voltage greater than or equal to 5V;
wherein the first control module further comprises a first identification unit for indicating power supply characteristics of the electric tool, the power supply characteristics including at least a maximum output voltage of the first connector, and the first identification unit configured to at least communicate with the second control module,
wherein the second control module further comprises a second identification unit for indicating power characteristics of the electric equipment, the power input characteristics of the electric equipment includes at least a maximum input voltage of the second USB connector, and the first controller is configured to at least communicate with the second control module, and
wherein the first controller is electrically coupled to the power supply module and the first USB connector, respectively, the first USB connector has at least two power supply modes, including a precharging power supply mode in which the first USB connector provides an output voltage constantly equal to 5V and an optimum power supply mode in which the first connector provides an output voltage greater than 5V, the first controller controls the first USB connector to switch between the regular power supply mode and the optimum power supply mode, and the second controller controls an output voltage of the first USB connector in the optimum power supply mode by communicating with the first control module.

US Pat. No. 10,170,926

METHOD FOR TRANSMITTING WIRELESS POWER IN WIRELESS CHARGING SYSTEM INCLUDING A WIRELESS POWER TRANSMITTING UNIT AND WIRELESS POWER RECEIVING UNIT

Samsung Electronics Co., ...

1. A method for transmitting wireless power in a wireless charging system, the method comprising:receiving information related to a temperature from each of a plurality of power receiving units (PRUs);
identifying a temperature ratio of each of the plurality of PRUs based on the received information, wherein the temperature ratio is a current temperature relative to an available maximum temperature;
determining a PRU from among the plurality of PRUs based on the identified temperature ratio; and
adjusting transmission power according to a voltage setting value of the determined PRU.

US Pat. No. 10,170,925

INTELLIGENT UNINTERRUPTIBLE POWER CHARGING APPARATUS AND METHOD OF OPERATING THE SAME

DELTA ELECTRONICS, INC., ...

1. An intelligent uninterruptible power charging apparatus comprising:an uninterruptible power module;
a charging module connected to the uninterruptible power module; and
an output port connected to the charging module;
wherein the uninterruptible power module is configured to provide a first charging power source; the charging module is configured to convert the first charging power source into a second charging power source and output the second charging power source through the output port; when an electronic apparatus is connected to the output port, the charging module is configured to receive an identification signal outputted from the electronic apparatus and adjust a voltage level of the second charging power source according to the identification signal.

US Pat. No. 10,170,924

MODELING A CHANGE IN BATTERY DEGRADATION

INTERNATIONAL BUSINESS MA...

1. A computer-implemented method for controlling a battery, comprising:generating a battery capacity prediction model that characterizes a battery capacity decay rate;
predicting future battery capacity for a battery under control based on the battery capacity prediction model and a present value of the battery capacity; and
controlling one or more operational parameters of the battery under control based on the predicted future battery capacity.

US Pat. No. 10,170,921

METHODS AND SYSTEMS FOR EFFICIENT BATTERY CHARGING AND USAGE

POWERPLUG LTD., Tel Aviv...

1. A method for charging a battery associated with a device, wherein the device is configured to draw power from either one of a battery or an external power source, the method comprising the following operations performed by one or more processors:receiving a signal from an external information service, the signal including power rate data reflecting a value at which power is purchasable at a particular time;
determining a usage threshold that reflects a minimum battery level in which a device draws power from the battery and a charge threshold that reflects a maximum battery level to which the device charges the battery from power drawn from the external power source corresponding to the power rate data and a device class of the device; and
enabling the device to draw power from the battery as a function of whether a charge level associated with the battery exceeds the usage threshold, and enabling the device to charge the battery with power drawn from the external power source as a function of whether the charge level is below the charge threshold and whether the external power source is available.

US Pat. No. 10,170,920

SYSTEM AND METHOD FOR ENERGY MANAGEMENT WITHIN A GROUP OF DEVICES

Symbol Technologies, LLC,...

9. A system, comprising:a group of charging stations each of which includes a docking connection, wherein each charging station in the group comprises:
a processor for identifying the docking connection;
a transceiver, responsive to identifying the docking connection, configured to transmit information to other charging stations in the group and receive at least one set of information transmitted from another charging station in the group, wherein each charging station generates a list using the information transmitted by the charging station and the at least one set of information received by the charging station; and
a ranking component configured to at least one of filter, sort, and rank entries in the list, wherein each entry in the list is associated with a charging station with a docking connection and in the group of charging stations,
wherein each charging station in the group is configured to determine that an entry in the list that is associated with the charging station is ranked at a predefined position in the list and provide an indication of the predefined position.

US Pat. No. 10,170,906

SEMICONDUCTOR DEVICE FOR POWER SUPPLY CONTROL

MITSUMI ELECTRIC CO., LTD...

1. A semiconductor device for power supply control, that generates and outputs a driving pulse for controlling turning on or off of a switching element which supplies intermittent current to a primary-side winding wire of a transformer for voltage conversion, by inputting a voltage in proportion to the current flowing in the primary-side winding wire of the transformer and an output voltage detection signal from a secondary side of the transformer, the semiconductor device comprising:an on/off control signal generation circuit which generates a control signal for controlling turning on or off of the switching element;
a current detection terminal to which the voltage in proportion to the current flowing in the primary-side winding wire of the transformer is input;
a pull-up unit comprising a current source circuit, the pull-up unit being provided between the current detection terminal and a terminal to which an internal power supply voltage or a voltage in accordance with the internal power supply voltage is applied; and
a current detection terminal monitoring circuit which determines whether the current detection terminal is open or the transformer is short-circuited by comparing the voltage of the current detection terminal with a predetermined voltage, wherein the current detection terminal monitoring circuit determines that the current detection terminal is open or the transformer is short-circuited when detecting that the voltage of the current detection terminal is higher than the predetermined voltage,
wherein:
when the current detection terminal monitoring circuit has determined that the current detection terminal is open or the transformer is short-circuited, a signal generation operation of the on/off control signal generation circuit is stopped by a signal output from the current detection terminal monitoring circuit.

US Pat. No. 10,170,886

RGB LASER SOURCE FOR LUMINAIRE PROJECTOR SYSTEM

IPG PHOTONICS CORPORATION...

1. A Red Green Blue (RGB) laser light source for luminaire projector system, comprising at least a first channel configured with:a randomly polarized (RP) broadband (BB) single mode (SM) Green laser including
a master oscillator power fiber amplifier (MOPFA) pump which is operative to output a pulsed RP BB SM pump beam at a fundamental wavelength in a 1 ?m wavelength range, and
a second harmonic generator (SHG) which is configured with a lithium triborate (LBO) nonlinear crystal receiving the SM BB pulsed pump beam and outputting a train of pulses of BB Green light in a 5xx nm wavelength range, a broad spectral linewidth ??1 of at least 4 nm;
an RP BB SM Red laser configured with respective quasi continuous wave (QCW) fiber laser pump which is operative to output a RP SM BB pulsed pump beam at a central wavelength, and a frequency converter with an LBO nonlinear crystal receiving the RP SM BB pulsed pump beam so as to output a train of pulses of red light in a 6xx nm wavelength range with a broad spectral line ??2 of at least 4 nm; and
a blue-light laser outputting RP Blue light at a central wavelength in a 4xx nm wavelength range with a broad spectral linewidth ??3 of at least 4 nm.

US Pat. No. 10,170,874

CABLE ASSEMBLY HAVING A SUBSTRATE WITH MULTIPLE PASSIVE FILTERING DEVICES BETWEEN TWO SECTIONS OF THE CABLE ASSEMBLY

TE CONNECTIVITY CORPORATI...

1. A cable assembly comprising:multiple electrical cables arranged in a first cable section and a second cable section, each electrical cable having a pair of signal conductors configured to convey differential signals, each of the first cable section and the second cable section having a connector end and a device end; and
a filtering module including a substrate and multiple passive filtering devices mounted on the substrate, the filtering module disposed between the first cable section and the second cable section along a length of the cable assembly and mechanically connected to the respective device ends of the first and second cable sections, the passive filtering devices electrically connected to the signal conductors of the electrical cables,
wherein the connector ends of the first and second cable sections are configured to be electrically connected to corresponding first and second connectors, and the filtering module is configured to filter electrical signals conveyed along the electrical cables between the first and second connectors.

US Pat. No. 10,170,864

WATERPROOF CONNECTOR

CHENG UEI PRECISION INDUS...

1. A waterproof connector, comprising:a dielectric body having a base portion, and a tongue board protruded from a middle of a front surface of the base portion, a top surface of a front of the tongue board opening a plurality of upper terminal grooves, a bottom surface of the front of the tongue board opening a plurality of lower terminal grooves, a periphery of a rear of the tongue board being recessed inward to form a limiting groove, a plurality of blocking boards being protruded into the upper terminal grooves and the lower terminal grooves from the tongue board and located in front of the limiting groove;
a plurality of terminals integrally molded to the dielectric body, including a plurality of lower terminals arranged transversely and a plurality of upper terminals arranged transversely, each of the plurality of the terminals having a fastening portion, a contact portion connected with a front end of the fastening portion, and a soldering portion connected with a rear end of the fastening portion, the fastening portions of the plurality of the terminals being integrally molded in and fastened in the dielectric body, the contact portions of the plurality of the lower terminals and the upper terminals being received in the plurality of the lower terminal grooves and the upper terminal grooves and being exposed to the bottom surface and the top surface of the front of the tongue board, the soldering portions of the plurality of the terminals projecting beyond a rear surface of the dielectric body;
a shielding assembly being limited in the limiting groove of the dielectric body;
a metal shell surrounding outside the dielectric body to which the plurality of the terminals are integrally molded; and
a waterproof housing integrally molded outside the metal shell,
wherein outer surfaces of rear ends of the contact portions of the plurality of the terminals exposed to the top surface and the bottom surface of the front of the tongue board and adjacent to a front end of the shielding assembly are recessed inward to form a plurality of avoiding areas, each of the plurality of the blocking boards is corresponding to one of the upper terminal grooves and the lower terminal grooves, each of the plurality of the blocking boards is spaced from an inner wall of the one of the upper terminal grooves and the lower terminal grooves facing the blocking board corresponding to the one of the upper terminal grooves and the lower terminal grooves, each of the plurality of the avoiding areas is located under or above one of the plurality of the blocking boards, each of the plurality of the avoiding areas is matched with the one of the plurality of the blocking boards.

US Pat. No. 10,170,862

ELECTRICAL DEVICE HAVING A GROUND BUS TERMINATED TO A CABLE DRAIN WIRE

TE CONNECTIVITY CORPORATI...

1. An electrical device comprising:a circuit board having upper signal contacts and at least one upper ground contact along an upper surface of the circuit board;
a communication cable including a differential pair of signal conductors, a shield layer that surrounds the signal conductors, a drain wire electrically coupled with the shield layer, and a cable jacket that surrounds the shield layer and the drain wire; wherein each of the signal conductors has a wire-terminating end that is engaged to a corresponding upper signal contact of the circuit board, the wire-terminating ends projecting beyond a jacket edge of the cable jacket; and
an upper ground-terminating component electrically coupled to the at least one upper ground contact, the upper ground-terminating component having a main panel with a connective terminal electrically coupled to the drain wire, the connective terminal including an opening and a pair of opposed angled tabs, wherein each of the opposed angled tabs includes a base end and a free end, the free end of each of the opposed angled tabs extending into the opening and away from the main panel.

US Pat. No. 10,170,857

ELECTRICAL CONNECTION DEVICE

Molex, LLC, Lisle, IL (U...

1. An electrical connection device, comprising:a receptacle connector comprising a receptacle body, a front guide-positional limiting portion, a rear guide-positional limiting portion and a first latching member, the receptacle body comprising a base, a front wall and a rear wall which extend upwardly from the base and two side walls respectively positioned on left and right sides, the base, the front wall and the rear wall cooperating to define a plug receiving space, the two side walls each being formed with a side opening communicating with the plug receiving space, the front guide-positional limiting portion comprising the front wall and a guide groove positioned to the front wall and extending along an inserting direction, the rear guide-positional limiting portion comprising the rear wall and at least one rear guide-positional limiting piece formed to the rear wall, the first latching member being provided to the front guide-positional limiting portion; and
a plug connector removably mating with the receptacle connector along the inserting direction and comprising a plug body and a second latching member, the plug body having a front wall, a rear wall, two side walls respectively positioned on left and right sides, the rear wall of the plug body being recessed to form a recessed portion, the recessed portion being formed with a guide recessed groove into which the rear guide-positional limiting piece of the receptacle connector extends, the second latching member being provided to the front wall of the plug body,
when the plug connector mates with the receptacle connector, the plug body being inserted into the plug receiving space of the receptacle body and limited between the front wall of the front guide-positional limiting portion and the rear wall of the rear guide-positional limiting portion, the second latching member of the plug connector being latched to the first latching member of the receptacle connector and limited by the front guide-positional limiting portion, the rear guide-positional limiting piece of the receptacle body extending into the guide recessed groove and the rear wall engaging with the recessed portion of the plug body, the rear wall of the plug connector being generally flush with the rear wall of the receptacle connector, the two side walls of the plug body being respectively exposed to the two side openings of the receptacle body and generally flush with the two side walls of the receptacle body.

US Pat. No. 10,170,849

CONNECTOR AND CONNECTOR ASSEMBLY WITH SLIDABLE LATCH

Molex, LLC, Lisle, IL (U...

1. A connector assembly, comprising:a first connector including: a first housing having two first wall parts extending in a longitudinal direction and opposing in a short direction, two second wall parts positioned on end parts of the two first wall parts and opposing in the longitudinal direction, and a recessed part formed on an inner side of the first wall parts and second wall parts; and a first terminal retained on the first wall parts; and
a second connector including: a second terminal for connecting to the first terminal, and a second housing retaining the second terminal, the second connector being mated to an inner side of the recessed part of the first housing; wherein:
the first connector includes: a slider supported by at least one of the two second wall parts and that can slide in the longitudinal direction; and a first metal fitting attached to at least one second wall part,
the slider can slide between a locking position where the slider locks the second connector mated to the inner side of the recessed part and a lock releasing position where the slider is separated from the second connector to an outer side in the longitudinal direction such that locking of the second connector is released,
the first metal fitting has an engaging part,
the slider has a first engageable part to which the engaging part is engaged,
at least one of the engaging part and first engageable part can elastically deform, and
movement of the slider from the locking position to the lock releasing position is restricted by engagement between the engaging part and the first engageable part, and sliding between the locking position and lock releasing position is permitted by at least one of the aforementioned parts.

US Pat. No. 10,170,844

METHOD FOR DISH REFLECTOR ILLUMINATION VIA SUB-REFLECTOR ASSEMBLY WITH DIELECTRIC RADIATOR PORTION

CommScope Technologies LL...

1. An apparatus comprising:a unitary dielectric block having a waveguide transition portion located at a first end of the unitary dielectric block, a sub-reflector support portion located at a second end of the unitary dielectric block that is opposite from the first end, and a radiator portion between the waveguide transition portion and the sub-reflector support portion;
a waveguide coupled to a dish reflector of a reflector antenna and aligned with a longitudinal axis of the unitary dielectric block;
wherein the waveguide transition portion is dimensioned to couple to a distal end of the waveguide,
wherein the waveguide transition portion has a first portion with a first diameter and a second portion located nearer to the radiator portion than the first portion and having a second diameter greater than the first diameter, and
wherein the waveguide transition portion comprises a shoulder perpendicular to the longitudinal axis and having a third diameter that is greater than the first and second diameters.

US Pat. No. 10,170,842

MULTIPLE-FEED ANTENNA SYSTEM HAVING MULTI-POSITION SUBREFLECTOR ASSEMBLY

Sea Tel, Inc., Concord, ...

1. A multiple-feed antenna system for communicating signals in a plurality of radio frequency (RF) frequency ranges, the multiple-feed antenna system comprising:a primary reflector configured for directing signals along a primary RF signal path;
a subreflector assembly comprising a first subreflector element and a second subreflector element, wherein the subreflector assembly is configured to rotate, about a first axis, between multiple positions that include a first position and a second position, and is configured such that:
when the subreflector assembly is in the first position, the first subreflector element intersects the primary RF signal path and redirects signals traveling from the primary reflector along the primary RF signal path to a first RF signal path, and
when the subreflector assembly is in the second position, the second subreflector element intersects the primary RF signal path and redirects signals traveling from the primary reflector along the primary RF signal path to a second RF signal path, and
a first feed that intersects the first RF signal path, wherein the first feed is configured to communicate signals within a first frequency range of the plurality of frequency ranges;
a second feed that intersects the second RF signal path, wherein the second feed is configured to communicate signals within a second frequency range of the plurality of frequency ranges; and
an actuator configured for moving the subreflector assembly to the first position and to the second position.

US Pat. No. 10,170,841

DUAL MODE SLOTTED MONOPOLE ANTENNA

The United States of Amer...

1. An antenna, capable of being joined to an antenna feed having a first conductor and a second conductor, comprising:a non-conductive base having a first side and a second side;
a radiator having a cylindrical wall portion with a slot formed therein from a first end to a second end of the cylindrical wall portion parallel to an axis of the cylindrical wall portion, said radiator being mounted to and extending axially from said non-conductive base first side, said radiator being capable of being electrically connected to the antenna feed first conductor proximate one side of the slot;
a conductive foil positioned on the second side of said non-conductive base and capable of being electrically connected to the antenna feed second conductor, the antenna feed first conductor being electrically isolated from said conductive foil; and
a reactive load joined between said conductive foil and said radiator proximate an opposite side of the slot from the location of the antenna feed first conductor.

US Pat. No. 10,170,838

ANTENNA-IN-PACKAGE STRUCTURES WITH BROADSIDE AND END-FIRE RADIATIONS

International Business Ma...

1. A package structure, comprising:an antenna package comprising a stack structure, wherein the stack structure comprises a plurality of substrates and metallization layers including a first metallization layer formed on a first surface of a first substrate, and a second metallization layer formed on first surface of a second substrate, wherein the first metallization layer comprises a first planar antenna and an ungrounded planar parasitic element disposed adjacent to the first planar antenna, and wherein the second metallization layer comprises a second planar antenna;
an RFIC (radio frequency integrated circuit) chip flip-chip mounted to the second metallization layer on the first surface of the second substrate of the antenna package;
a first antenna feed line which comprises metalized via holes that are formed through the plurality of substrates from the first surface of the second substrate to the first surface of the first substrate, wherein the first planar antenna is connected to the RFIC chip by the first antenna feed line;
a second antenna feed line formed as part of the second metallization layer on the first surface of the second substrate, wherein the second antenna feed line extends along the first surface of the second substrate to connect the second planar antenna to the RFIC chip;
wherein the first planar antenna is configured to receive or transmit broadside signals and the second planar antenna is configured to receive or transmit end-fire signals; and
wherein the ungrounded planar parasitic element is configured to reduce surface waves on the surface of the first substrate.

US Pat. No. 10,170,833

ELECTRONICALLY CONTROLLED POLARIZATION AND BEAM STEERING

L-3 Communications Corp.,...

15. An antenna system comprising:at least three dual-orthogonally polarized antenna elements, each antenna element comprising a first signal component input for providing a first signal component of a transmit signal to a first antenna component and a second signal component input for providing a second signal component of the transmit signal to a second antenna component, the first antenna component having a polarization that is orthogonal to a polarization of the second antenna component;
for each of the plurality of antenna elements, a signal modifier that is connected to the corresponding antenna element, each signal modifier comprising:
a signal input for receiving the transmit signal and splitting the transmit signal into the first signal component and the second signal component; a first processing path between the signal input and the first signal component input of the corresponding antenna element, the first processing path comprising a first amplitude controller for controlling the amplitude of the first signal component in accordance with a first amplitude parameter and a first phase shifter for controlling the phase of the first signal component in accordance with a first phase-shift parameter, and a second processing path between the signal input and the second signal component input of the corresponding antenna element, the second processing path comprising a second amplitude controller for controlling the amplitude of the second signal component in accordance with a second amplitude parameter and a second phase shifter for controlling the phase of the second signal component in accordance with a second phase-shift parameter; and
a controller that is configured to receive input that specifies a desired value for each of a plurality of characteristics for a transmit beam, the controller including a memory structure for each of the plurality of characteristics, each memory structure including a lookup table for each of the signal modifiers, each lookup table defining a plurality of sets of values for the first amplitude parameter, the first phase-shift parameter, the second amplitude parameter and the second phase-shift parameter, each set of values being specific to one of the desired values of the corresponding characteristic, wherein, in response to receiving input that specifies a particular desired value for each of the plurality of characteristics, the controller is configured to access each memory structure to obtain from each lookup table the set of values that corresponds to the particular desired value for each of the plurality of characteristics and then provide each set of values to the corresponding signal modifier such that, when the first and second signal components of the transmit signal are emitted from the first and second antenna elements of each antenna element, the first and second signal components will combine to form the transmit beam that exhibits the desired value for each of the characteristics.

US Pat. No. 10,170,832

TRANSCEIVER FOR A PHASED ARRAY ANTENNA

Telefonaktiebolaget LM Er...

1. A transceiver for a phased array antenna, comprising:a laser light source arranged to provide an optical spectrum comprising a plurality of spaced wavelengths,
a dispersion unit to introduce a delay to a plurality of spectral components of the optical spectrum associated with the spaced wavelengths, wherein the delay is dependent on the wavelength of the spectral components of the optical spectrum,
a first optical filter to select a plurality of spectral components received from the dispersion unit,
a first heterodyning device to generate a signal for transmission by the phased array antenna by heterodyning the selected spectral components associated with different ones of the spaced wavelengths of the laser light source,
wherein the transceiver is configured to receive signals from the phased array antenna,
the transceiver comprising a modulator configured to modulate said spaced wavelengths from the said laser light source with the received signals, wherein the spaced wavelengths are associated with the spectral components used to generate the signal for transmission, and
a second heterodyning device to heterodyne spectral components associated with different ones of the spaced wavelengths of the laser light source.

US Pat. No. 10,170,829

SELF-COMPLEMENTARY MULTILAYER ARRAY ANTENNA

THALES, Courbevoie (FR)

1. A multilayer antenna array comprising:a radiating structure formed from an array of radiating elements forming self-complementary patterns, each radiating element including:
a plurality of electrical supply points distributed around a perimeter of the respective radiating element; and
four particular points distributed around the perimeter of the respective radiating element between consecutive electrical supply points of the plurality of electrical supply points;
a ground plane;
a dielectric layer that separates said radiating structure from said ground plane; and
an array of metallized vias passing through said dielectric layer between the radiating structure and the ground plane, each via being positioned facing a respective one of the four particular points of each radiating element.

US Pat. No. 10,170,827

HOUSING STRUCTURE HAVING CONDUCTIVE ADHESIVE ANTENNA AND CONDUCTIVE ADHESIVE ANTENNA THEREOF

TENNVAC INC., New Taipei...

1. A housing structure having conductive adhesive antenna, comprising:a housing having a first unit and a second unit, both of which are integrated with each other to form a bonding portion; and
an electrically conductive adhesive bonded to the bonding portion, so that the electrically conductive adhesive and the bonding portion form a sealed structure and the electrically conductive adhesive has at least one electrical connection end for electrically connecting with a wireless module, thereby the electrically conductive adhesive is formed as an antenna structure.

US Pat. No. 10,170,823

EMBEDDED ANTENNA DEVICE FOR GNSS APPLICATIONS

Topcon Positioning System...

1. An antenna assembly comprising:a metal cavity having a generally circular shape;
a stacked patch GNSS antenna located in the metal cavity; and
a conductive parasitic element shaped as a ring and located on top of the metal cavity,
the parasitic element including conductors that are not directly connected to the antenna, the conductors shaped as a plurality of teeth projecting radially inward from the ring,
wherein the stacked patch antenna includes a radiating low-frequency patch and a radiating high-frequency patch, the high-frequency patch being above the low-frequency patch.

US Pat. No. 10,170,821

SELF-CONFIGURING COMMUNICATION NODE ARRANGEMENT

Telefonaktiebolaget LM Er...

1. A communication node arrangement comprising:at least two antenna units, where each antenna unit comprises at least one signal port and at least one antenna element, each signal port being at least indirectly connected to at least one corresponding antenna element,
wherein each antenna unit comprises at least one sensor unit arranged to sense its orientation relative a predetermined reference extension;
at least one control unit arranged to feed a respective test signal into each of at least two different signal ports,
wherein for each such test signal, the communication node arrangement is arranged to receive the test signal via at least one other signal port, and the communication node arrangement is arranged to determine relative positions of said antenna units based on the received test signals, and to determine relative orientations of said antenna units based on data received from the sensor units, and
wherein said control unit is arranged to control at least one ventilation arrangement in dependence of said determined relative positions and said determined relative orientations.

US Pat. No. 10,170,812

ASSEMBLY MODULE COMPRISING ELECTROCHEMICAL CELLS RECEIVED BY LUGS AND CONNECTING CLIPS

1. An electrochemical assembly module of an energy storage system, comprising:an assembly of a plurality of elementary electrochemical cells with a gas electrode, the assembly comprising:
a plurality of lugs associated respectively with the plurality of elementary electrochemical cells, the lugs being connected together by a connecting holder and receiving terminals of the elementary electrochemical cells so that the terminals are all electrically connected together by the connecting holder,
a plurality of elements forming connecting clips each receiving at least two terminals of at least two elementary electrochemical cells so that the at least two terminals are electrically connected to each other by the element forming a connecting clip that is associated therewith,
wherein the elementary electrochemical cells are cells with a double gas electrode.

US Pat. No. 10,170,807

SECONDARY BATTERY COOLING SYSTEM

TOYOTA JIDOSHA KABUSHIKI ...

1. A secondary battery cooling system, comprising:a secondary battery mounted on a vehicle;
a temperature sensor configured to detect a temperature of the secondary battery mounted on a vehicle;
a cooling mechanism configured to cool the secondary battery; and
a control unit configured to stop driving of the cooling mechanism,
wherein the control unit performs,
in response to an ignition switch mounted on the vehicle being turned off, estimating a heat value of the secondary battery after the ignition switch is turned off,
calculating a temperature increase of the secondary battery after the ignition switch is turned off based on the estimated heat value of the secondary battery,
determining that cooling of the secondary battery is necessary after the ignition switch is turned off, under a condition where a temperature, which is obtained by adding the calculated temperature increase to a temperature of the secondary battery detected by the temperature sensor at a time that the ignition switch is turned off, exceeds an upper limit temperature which does not cause deterioration of the secondary battery, and
delaying from the time that the ignition switch is turned off, a start time of driving of the cooling mechanism to cool the secondary battery while the ignition switch of the vehicle is turned off in response to both of the following conditions (1)-(2): (1) the temperature of the secondary battery detected by the temperature sensor at the time that the ignition switch is turned off being lower than the upper limit temperature which does not cause deterioration of the secondary battery, and (2) the estimated heat value of the secondary battery that exceeds a predetermined value in the determination.

US Pat. No. 10,170,806

BATTERY COOLING SYSTEM

Hyundai Motor Company, S...

1. A battery cooling system comprising:a housing in which an inlet duct from which air is introduced and an outlet duct through which the air is discharged are mounted;
a first battery mounted in the housing and disposed between the inlet duct and the outlet duct; and
a second battery disposed between the first battery and the inlet duct,
wherein a cooling channel exchanging heat with the first battery and the second battery by the air moving between the inlet duct and the outlet duct is formed in the housing, and
wherein the housing includes brackets exchanging heat of a portion of the air introduced through the inlet duct with the second battery and then regulating a direction of the cooling channel to move a portion of the air to the first battery.

US Pat. No. 10,170,804

MONITORING DEVICE FOR SECONDARY BATTERY, BATTERY PACK, AND VEHICLE

GS YUASA INTERNATIONAL LT...

1. A monitoring device for a secondary battery, the monitoring device comprising:a controller configured to:
detect whether a use state of the secondary battery is in a first use state or a second use state;
set a first protection condition for the secondary battery, when the controller detects that the secondary battery is in the first use state;
set a second protection condition for the secondary battery, when the controller detects that the secondary battery is in the second use state;
notify, in a case that the first protection condition is set for the secondary battery, a vehicle electronic control unit (ECU) that a condition for interrupting is established, if a voltage or a state of chare (SOC) of the secondary battery reaches a first upper limit value or reaches a first lower limit value, and after a prescribed time, send an interruption command to a current interruption device for interrupting energization of the secondary battery; and
send, in a case that the second protection condition is set for the secondary battery, an interruption command to the current interruption device for interrupting the energization of the secondary battery, if the voltage or the SOC of the secondary battery reaches a second upper limit value or reaches a second lower limit value,
wherein the fit upper limit value is lower than the second upper limit value,
wherein the first lower limit value is higher than the second lower limit value,
wherein the first use state relates to a case where the secondary battery is used in a vehicle during a running or during a running preparation, and
wherein the second use state relates to a case where the secondary battery is used in the vehicle other than the first use state.

US Pat. No. 10,170,803

CONTROLLER FOR LITHIUM ION SECONDARY BATTERY THAT SETS AND MODIFIES A LOWER LIMIT STATE OF CHARGE, AND VEHICLE

TOYOTA JIDOSHA KABUSHIKI ...

1. A controller for a lithium ion secondary battery, the controller comprisingan electronic control unit configured to:
detect a state of charge (SOC) of a lithium ion secondary battery that is a controlled object;
set an upper limit SOC and lower limit SOC of a range of use of the lithium ion secondary battery based on the SOC of the lithium ion secondary battery;
record a charge history and discharge history of the lithium ion secondary battery;
determine whether the lithium ion secondary battery is in an excessive charging state or an excessive discharging state based on the charge history and the discharge history; and
raise the lower limit SOC when the lithium ion secondary battery is in the excessive charging state,
wherein the excessive charging state indicates a state in which charge of the lithium ion secondary battery occurs faster than discharge of the lithium ion secondary battery.

US Pat. No. 10,170,799

MULTI-ELEMENT LIQUID METAL BATTERY

Massachusetts Institute o...

1. An electrochemical cell configured to exchange energy with an external device, the electrochemical cell comprising:a negative electrode comprising at least a first active metal and a second active metal;
a positive electrode comprising a metal or alloy; and
a molten salt electrolyte comprising a first cation of the first active metal and a second cation of the second active metal, the electrolyte defining first and second interfaces, the positive electrode being in contact with the electrolyte at the first interface and the negative electrode being in contact with the electrolyte at the second interface, the electrolyte configured to allow the cations of the first and second active metals to be transferred from the negative electrode to the positive electrode during discharging and to be transferred from the positive electrode to the negative electrode during charging,
wherein
the electrolyte exists as a liquid phase and the negative electrode and the positive electrode exist as liquid or partially liquid phases at operating temperatures of the electrochemical cell,
the first active metal is calcium, and
the second active metal is an alkali metal or an alkaline earth metal.

US Pat. No. 10,170,798

MODERATE TEMPERATURE SODIUM BATTERY

FIELD UPGRADING USA, INC....

1. A cell comprising:a negative electrode compartment housing a negative electrode material, wherein the negative electrode material comprises at least one of a liquid sodium metal and a liquid lithium metal that is oxidized during discharge of the cell;
a positive electrode compartment;
a polar solvent within the positive electrode compartment;
a liquid positive electrode active material within the positive electrode compartment that is reduced during discharge of the cell, wherein the liquid positive electrode active material has a specific gravity greater than the polar solvent such that an interface exists between the liquid positive electrode active material and the polar solvent, wherein the liquid positive electrode active material comprises at least one of elemental sulfur and iodine;
an ion-conductive membrane comprising at least one of NaSICON and LiSICON separator separating the negative electrode compartment from the positive electrode compartment; and
a positive electrode current collector configured to provide electrical contact to the interface between the liquid positive electrode active material and the polar solvent, wherein the interface between the liquid positive electrode active material and the polar solvent moves with respect to the positive electrode current collector as the cell charges or discharges;
wherein the cell is a galvanic cell.

US Pat. No. 10,170,795

ELECTROLYTE FOR HIGH EFFICIENCY CYCLING OF SODIUM METAL AND RECHARGEABLE SODIUM-BASED BATTERIES COMPRISING THE ELECTROLYTE

Battelle Memorial Institu...

1. A rechargeable battery, comprising:a nonaqueous electrolyte comprising
sodium bis(fluorosulfonylimide) (NaN(SO2F)2, NaFSI) or a sodium salt mixture comprising at least 20 mol % NaFSI based on total sodium salt content, and
a nonaqueous solvent comprising an ether, the electrolyte having a solvent-sodium salt mole ratio <4:1;
the nonaqueous solvent is 1,2-dimethoxyethane (DME), diglyme, triglyme, tetraglyme, diethyl ether, 1,3-dioxolane, 1,4-dioxane, tetrahydrofuran, 2,5-dimethyltetrahydrofuran, or a mixture thereof;
an anode current collector in the absence of anode, or an anode comprising Na metal or a sodium intercalation material or a sodium conversion compound; and
a nonaqueous cathode comprising a sodium intercalation compound or a sodium conversion compound, an oxygen cathode, or a sulfur cathode.

US Pat. No. 10,170,794

ELECTROLYTE ADDITIVE FOR LITHIUM BATTERY, ELECTROLYTE FOR LITHIUM BATTERY, AND LITHIUM BATTERY INCLUDING THE ELECTROLYTE ADDITIVE

Samsung SDI Co., Ltd., G...

1. An electrolyte additive for a lithium battery, the electrolyte additive comprising a sulfone compound wherein the sulfonyl group is directly bonded to a halide and an electron withdrawing group; and wherein the sulfone compound is selected from the group consisting of:

US Pat. No. 10,170,790

SODIUM ION SOLID-STATE CONDUCTORS WITH SODIUM OXOFERRATE STRUCTURE

International Business Ma...

1. An apparatus, comprising:a solid-state ion conductor represented by the general formula NaFe3/4X1/4, wherein X is selected from the group consisting of Fe(IV), Si, Sn, Ti, Zr, V, P, and S.

US Pat. No. 10,170,788

VARIABLE LAYER THICKNESS IN CURVED BATTERY CELL

MICROSOFT TECHNOLOGY LICE...

1. A battery, comprising:an anode arranged on an anode substrate, the anode substrate being curved with a first arc length;
a cathode arranged on a cathode substrate, the cathode substrate being curved with a second arc length; and
a separator between the anode and the cathode,
wherein the first arc length differs from the second arc length to define tapered edges of the battery, and
wherein a thickness of the anode differs from a thickness of the cathode.

US Pat. No. 10,170,787

SEPARATOR

BROTHER KOGYO KABUSHIKI K...

1. A separator comprising:a flat plate-shaped first plate member;
a flat plate-shaped second plate member joined with the first plate member, wherein the separator is positioned between an anode electrode and a cathode electrode;
an oxidation gas flow channel wall, which is provided on a first surface of the first plate member and forms a flow channel of oxidation gas;
a fuel gas flow channel wall, which is provided on a second surface of the second plate member and forms a flow channel of fuel gas;
a cooling medium flow channel wall, which is provided on at least one of a second surface that is a surface on a side opposite to the first surface of the first plate member and faces the second plate member, and a first surface that is a surface on a side opposite to the second surface of the second plate member and faces the first plate member, corresponds to at least one of the oxidation gas flow channel wall and the fuel gas flow channel wall, and forms a flow channel of a cooling medium;
a first through hole, which is formed at a position different from the cooling medium flow channel wall and penetrates the first plate member and the second plate member;
a second through hole, which is formed at a position different from the cooling medium flow channel wall and from the first through hole and penetrates the first plate member and the second plate member;
a first cooling medium passage part, which is formed by separating a part of the second surface of the first plate member and a part of the first surface of the second plate member from each other and establishes communication between the first through hole and one end of the cooling medium flow channel wall;
a second cooling medium passage part, which is formed by separating a part of the second surface of the first plate member and a part of the first surface of the second plate member from each other and establishes communication between the second through hole and the other end of the cooling medium flow channel wall;
one projection, which is formed on at least one of the first cooling medium passage part and the second cooling medium passage part, is projected from the second surface of the first plate member toward the first surface of the second plate member, and is separated from the cooling medium flow channel wall;
another projection, which is formed at a position corresponding to the one projection on at least one of the first cooling medium passage part and the second cooling medium passage part, is projected form the first surface of the second plate member to the second surface of the first plate member, is separated from the cooling medium flow channel wall, and comes into contact with the one projection in a state where the first plate member and the second plate member are joined with each other; and
a plurality of spaces formed by the one projection and the other projection, forming at least one of the first cooling medium passage part and the second cooling medium passage part.

US Pat. No. 10,170,779

HUMIDIFIER FOR FUEL CELL

HYUNDAI MOTOR COMPANY, S...

1. A humidifier for a fuel cell, the humidifier comprising:a membrane module which accommodates therein a humidifying membrane;
a first cap unit coupled to one side of the membrane module and supplying supply air to the membrane module;
a second cap unit coupled to another side of the membrane module and discharging humidified air introduced from the membrane module; and
a bypass tube provided in the second cap unit and bypassing condensate water introduced into the second cap unit to the membrane module,
wherein the bypass tube bypasses moisture, which is introduced into the second cap unit from the membrane module, to the membrane module by a pressure difference between the membrane module and the second cap unit.

US Pat. No. 10,170,777

COOLING WATER DIRECT INJECTION TYPE FUEL CELL

Hyundai Motor Company, S...

1. A cooling water direct injection type fuel cell, comprising:an air-side separator having an air channel through which air flows, and a cooling water inlet aperture formed on an introduction portion of the air channel; and
a hydrogen-side separator joined with the air-side separator and having a protrusion inserted into the cooling water inlet aperture, the protrusion having a diameter less than a diameter of the cooling water inlet aperture to form a gap between an outer circumferential surface of the protrusion and an inner circumferential surface of the cooling water inlet aperture,
wherein the cooling water is drawn into a space between adjacent surfaces of the air-side separator and the hydrogen-side separator and is discharged through the gap between the protrusion and the cooling water inlet aperture, and is mixed with introduced air, and is then drawn into the air channel.

US Pat. No. 10,170,775

METHOD FOR PRODUCING A SOLDER GLASS GREEN SEAL

Forschungszentrum Juelich...

1. A method for producing a glass solder green seal, comprising:applying a paste comprising solvents, binding agents, plasticizers, and a glass solder powder to a surface of a screen, wherein the glass solder paste has a solids content of 60% to 95% wt/wt, and wherein the screen on a bottom side and in a screen mesh comprises regions having a coating impermeable to the paste, and the paste is pushed through the screen onto a substrate and subsequently dried, and
printing onto an intermediate carrier serving as the substrate, the intermediate carrier comprising a foil or film adapted to include a non-stick coating onto which the paste is received and from which the dried glass solder green seal can be completely detached from the non-stick coating of the adapted foil or film.

US Pat. No. 10,170,774

FLOW-GUIDING PLATE FOR A FUEL CELL

1. A flow guiding plate for a fuel cell, comprising:a conducting sheet comprising a relief:
defining an alternation of flow channels on opposite first and second faces of the sheet, two successive flow channels of the first face being separated by walls delimiting a flow channel of the second face, the flow channels of the first and second faces extending along a same longitudinal direction;
defining first and second orifices for access respectively to the first and second ends of each of the flow channels of the second face and of a first group of flow channels of the first face, cross section of each of the flow channels between its first and second ends being greater than cross section of its first and second access orifices;
defining a flow restriction in each flow channel of a second group of flow channels of the first face such that a pressure drop across each flow channel of the second group of flow channels is greater than a pressure drop across each flow channel of the first group, a passage cross section at each of the flow restrictions being smaller than cross section of the orifices for access to the flow channels of the first group, the first face comprising an alternation of flow channels of the first group and of flow channels of the second group,
wherein each flow channel of the second group of flow channels includes a first wall at one end of the flow channel and a second wall at an opposite end of the flow channel, each of the first and second walls extending from a bottom of a deepest portion of the flow channel to a top of the deepest portion of the flow channel to form the flow restriction, and
wherein each flow channel of the first group of flow channels includes a first wall at one end of the flow channel and a second wall at an opposite end of the flow channel, each of the first and second walls of the second group of flow channels extending higher than each of the first and second walls of the first group of flow channels.

US Pat. No. 10,170,768

GRID ASSEMBLY FOR A PLATE-SHAPED BATTERY ELECTRODE OF AN ELECTROCHEMICAL ACCUMULATOR BATTERY

1. A grid arrangement (101, 102) for a plate-shaped battery electrode (104, 105) of an electrochemical accumulator (100), having a frame (117, 118, 119, 120) and a grid (113) arranged thereon, wherein the frame (117, 118, 119, 120) comprises at least one upper frame element (120) having a connecting lug (103) of the battery electrode (104, 105) disposed on its side facing away from the grid (113), and wherein the grid (113) is at least formed by horizontal bars (21 to 25), which are bars extending substantially horizontally, and vertical bars (9 to 20), which are bars extending substantially vertically, wherein at least some of the vertical bars (9 to 20) are arranged at different angles to one another in the shape of a fan, characterized by at least features a), c) and d) or all of the following features a), b), c), and d):a) a straight line (G), which runs through the center of gravity of the grid arrangement (101, 102) and is a parallel to the central axis (M) of the vertical bar (14) having the shortest distance to the center of gravity (S) of the grid arrangement (101, 102), passes the connecting lug (103) at a distance (D) of less than 15%, in particular less than 10%, of the connecting lug width (B), or intersects the connecting lug (103),
b) a straight line (G) which runs through the center of gravity of the grid arrangement (101, 102) and is a parallel to the central axis (M) of the vertical bar (14) having the shortest distance to the center of, gravity (S) of the grid arrangement (101, 102), intersecting the upper frame element (120) at a point (1) which is less than 15%, particularly less than 10%, of the length (L) of the upper frame element (120) away from a vertical central axis (A) of the connecting lug (103),
c) the sum of all the angles of those vertical bars (9 to 20) which intersect both the upper as well as a lower frame element (120, 117) of the grid arrangement (101, 102), or at least would intersect in mathematical extension, is greater than 7°, wherein the angles are defined in terms of an axis (A) extending exactly vertically,
d) the sum of the angles of the outermost left and outermost right vertical bar (10, 20) intersecting both the upper as well as the lower frame element (120, 117) of the grid arrangement (101, 102), or at least would intersect in mathematical extension, is greater than 7°, wherein the angles are defined in terms of an axis (A) extending exactly vertically.

US Pat. No. 10,170,756

LI2S BATTERIES HAVING HIGH CAPACITY, HIGH LOADING, AND HIGH COULOMBIC EFFICIENCY

UCHICAGO ARGONNE, LLC, C...

1. A method of preparing graphene-wrapped Li2S nanoparticles, the method comprising:heating lithium metal and a carbon-sulfur source or lithium metal, a carbon source, and a sulfur source in a sealed container at a temperature to produce lithium vapors and vapors of the carbon-sulfur source, or lithium vapors, vapors of the carbon source, and vapors of the sulfur source; and
cooling the sealed container to produce the graphene-wrapped Li2S nanoparticles.

US Pat. No. 10,170,744

ELECTROCHEMICAL CURRENT COLLECTOR SCREEN DESIGNS UTILIZING ULTRASONIC WELDING

Greatbatch Ltd., Clarenc...

1. An electrochemical cell, comprising:a) a casing;
b) an electrode assembly contained within the casing, the electrode assembly comprising:
i) an anode comprising an anode active material contacted to an anode current collector, wherein an anode tab extending outwardly from the anode current collector is connected to the casing serving as a negative terminal for the cell;
ii) a cathode comprising:
A) a first cathode current collector comprising a first bridge extending to spaced apart first cathode current collector first and second screens, the first and second screens each supporting a cathode active material, wherein a first landing strip extends outwardly from the first bridge, the first landing strip comprising a first landing strip proximal portion having a first landing strip proximal end connected to the first bridge and a first weld connection portion connected to a distal end of the first landing strip, the first weld connection portion being spaced outwardly from the first bridge;
B) a second cathode current collector comprising a second bridge extending to spaced apart second cathode current collector third and fourth screens, the third and fourth screens each supporting a cathode active material, wherein a second landing strip extends outwardly from the second bridge, the second landing strip comprising a second landing strip proximal portion having a second landing strip proximal end connected to the second bridge and a second weld connection portion connected to a distal end of the second landing strip, the second weld connection portion being spaced outwardly from the second bridge; and
C) a cathode current collector plate contacted connected to the first and second landing strip weld connection portions at respective first and second welds, wherein the first and second welds are spaced from the respective first and second bridges by the first and second landing strips; and
D) a cathode lead extending from a cathode lead proximal portion to a cathode lead distal portion, wherein the cathode lead proximal portion is conductively connected to the cathode current collector plate, and
iii) wherein the anode is positioned in a facing relationship with:
F) the first and second screens of the first cathode current collector; and
G) the third and fourth screens of the second cathode current collector; and
iv) a separator residing between the anode and the cathode; and
c) a feedthrough comprising a terminal pin of a glass-to-metal seal supported by the casing, the terminal pin extending from a terminal pin proximal end to a terminal pin distal end, wherein the terminal pin proximal end is conductively connected to the cathode lead distal portion, and wherein the terminal pin distal end is located outside the casing to thereby serve as a positive terminal for the cell; and
d) an electrolyte contained within the casing to activate the electrode assembly.

US Pat. No. 10,170,742

BATTERY PACK HAVING ELECTRIC INSULATING PACK CASE

LG CHEM, LTD., Seoul (KR...

1. A battery pack comprising:a plate-shaped battery cell having electrode terminals, including an anode terminal and a cathode terminal formed at an upper end thereof, the upper end of the battery cell further including a sealed surplus portion, wherein the battery cell is formed to have a planar quadrangular structure;
a protection circuit module (PCM) including electrode terminal joint parts bent towards the electrode terminals and being directly and electrically connected to the electrode terminals to control operation of the battery pack, the PCM being adhesively attached to the sealed surplus portion of the battery cell via an insulating double-sided adhesive tape; and
a pack case applied to the sealed surplus portion of the battery cell, the PCM, and opposite sides of the battery cell in a thermally molten state and solidified, the pack case being configured to have a structure to cover the sealed surplus portion of the battery cell, the PCM, and the opposite sides of the battery cell in a state in which a top and a bottom of the battery cell are open, wherein each of the opposite sides of the battery cell are adjacent to the upper end of the battery cell,
wherein the electrode terminals extend outward from an upper end of the pack case at a first surface,
wherein a lower end of the battery cell, opposite to the upper end of the battery cell, is open, and
wherein the pack case is provided with a through hole at a second surface of the upper end thereof through which a side portion of the PCM received in the pack case is exposed outward, wherein the first surface is different from the second surface.

US Pat. No. 10,170,729

ELECTRICALLY CONDUCTIVE POLYMERS

The United States of Amer...

1. A method of forming an electronic device, comprising:forming a first electrode, wherein the first electrode comprises a conductive polymer electrode defining first and second surfaces and having an electrical conductivity gradient between the first and second surfaces, wherein forming the first electrode comprises depositing a solution comprising a conductive polymer and a dopant to form a first layer, and thereafter irradiating the first layer to produce a conductivity gradient in the first layer; and
forming at least one organic material layer intermediate the first electrode and a second electrode.

US Pat. No. 10,170,716

METHOD FOR PREPARING ORGANIC FILM AND ORGANIC DEVICE INCLUDING THE SAME

GWANGJU INSTITUTE OF SCIE...

1. A method of preparing an organic film, comprising:(1) forming a first organic film including nanorods on a substrate using a first organic solution;
(2) introducing a second organic solution at least into spaces between the nanorods of the first organic film; and
(3) crystallizing the introduced second organic solution to form a second organic film,
wherein the first organic film and the second organic film together form the organic film, and
wherein the first organic solution and the second organic solution comprise P(VDF-TrFE), and the second solution contains a lower wt % of P(VDF-TrFE) than the first organic solution.

US Pat. No. 10,170,710

ORGANOMETALLIC COMPLEX, LIGHT-EMITTING ELEMENT, LIGHT-EMITTING DEVICE, ELECTRONIC DEVICE, AND LIGHTING DEVICE

Semiconductor Energy Labo...

1. A light-emitting element comprising:an EL layer between a pair of electrodes,
wherein the EL layer comprises a light-emitting layer, and
wherein the light-emitting layer comprises an organometallic complex represented by a formula (G1-1),

wherein M represents Pt or Pd, and each of R1 to R16 independently represents any one of hydrogen, an alkyl group having 1 to 6 carbon atoms, and a substituted or unsubstituted aryl group having 6 to 13 carbon atoms,
wherein a ring A represents a triazole ring, and
wherein the light-emitting element emits green light.

US Pat. No. 10,170,700

FABRICATION OF CORRELATED ELECTRON MATERIAL DEVICES METHOD TO CONTROL CARBON

ARM Ltd., Cambridge (GB)...

1. A method comprising:in a chamber, exposing a substrate to one or more gases comprising a transition metal oxide, a transition metal or a transition metal compound, or any combination thereof, and a first ligand, the one or more gases comprising an atomic concentration of a ligand comprising carbon so as to bring about an atomic concentration of carbon in a fabricated correlated electron material of between 0.1% and 10.0%;
exposing the substrate to a gaseous oxide to form a first layer of a film of the correlated electron material; and
repeating the exposing of the substrate to the one or more gases and to the gaseous oxide wherein the repeated cycles use gaseous oxides that differ in species or flow rate for the purpose of controlling an incorporation of dopant and are repeated a sufficient number of times so as to form additional layers of the film of the correlated electron material, the film of the correlated electron material exhibiting, as between the first layer and an additional layer, a first impedance state and a second impedance state which are substantially dissimilar from one another.

US Pat. No. 10,170,684

TUNING FORK TYPE CRYSTAL BLANK, TUNING FORK TYPE CRYSTAL ELEMENT, AND CRYSTAL DEVICE

KYOCERA CORPORATION, Kyo...

1. A tuning fork type crystal blank comprising:a base part,
a pair of vibrating parts which extend from the base part in parallel with each other,
an auxiliary part comprising a support part which is located at one side of the base part and the pair of vibrating parts in an alignment direction of the pair of vibrating parts and extends parallel with the pair of vibrating parts, and
a holding part which is located on the side of the base part opposite to the pair of vibrating parts and connects the base part and the support part,
wherein a cut away part is formed in a side surface of the auxiliary part when viewed in a planar view direction which is perpendicular to the alignment direction and the extension direction of the pair of vibrating parts,
wherein the auxiliary part further comprises a protruding part which protrudes from a side surface of the support part, and
wherein the cut away part is formed in a side surface of the protruding part.

US Pat. No. 10,170,683

PIEZOELECTRIC VIBRATION MODULE

MPLUS CO., LTD., Suwon-s...

1. A piezoelectric vibration module comprising:a piezoelectric device which comprises:
one or more first internal electrodes;
one or more second internal electrodes alternately formed with the first internal electrodes without crossing the one or more first internal electrodes;
a first external electrode electrically connected to the one or more first internal electrodes; and
a second external electrode electrically connected to the one or more second internal electrodes,
wherein the first external electrode and the second external electrode are only disposed on lateral surfaces of the piezoelectric device, and
wherein the first external electrode and the second external electrode are fixed to terminals of a flexible printed circuit board (FPCB) through conductive adhesives so that the first external electrode and the second external electrode are electrically connected to the terminals of the FPCB, the conductive adhesives being coated on lateral surfaces of the first external electrode and the second external electrode at corner portions where the piezoelectric device and the terminals of the FPCB intersect.

US Pat. No. 10,170,676

LIGHT EMITTING DEVICE PACKAGE AND LIGHTING APPARATUS HAVING SAME

LG Innotek Co., Ltd., Se...

1. A light emitting device package, comprising:a first lead frame;
a second lead frame spaced apart from the first lead frame;
a body on the first lead frame and the second lead frame;
a light emitting device disposed on the first lead frame;
a protection device disposed on the second lead frame; and
a reflection molding portion on the protective device,
wherein the body includes a first cavity which exposes a first portion of an upper surface of the first lead frame,
wherein the first light emitting device is disposed in the first cavity,
wherein the first cavity includes a first inside surface and a second inside surface facing to each other, and a third inside surface and a fourth inside surface facing to each other,
wherein the third inside surface and the fourth inside surface are connected to the first inside surface,
wherein the reflection molding portion is disposed on the first inside surface,
wherein a portion of the reflection molding portion extends to the upper surface of the first lead frame,
wherein a first boundary part of the reflection molding portion is located between the first inside surface of the first cavity and a first end of the reflection molding portion,
wherein a second boundary part of the reflection molding portion is located between the fourth inside surface of the first cavity and a second end of the reflection molding portion,
wherein a third boundary part of the reflection molding portion is connected between the first boundary part and the second boundary part, and
wherein an area of the first portion exposed to the first cavity in the upper surface of the first lead frame is equal to or less than 40% of entire area of the body.

US Pat. No. 10,170,658

SEMICONDUCTOR PACKAGE STRUCTURES AND METHOD OF MANUFACTURING THE SAME

ADVANCED SEMICONDUCTOR EN...

1. An optical device comprising:a substrate having a top surface;
a plurality of traces disposed on the top surface of the substrate;
a light emitter having an emitting area, the light emitter attached to the top surface of the substrate and electrically connected to at least one of the traces, the emitting area facing the substrate, the light emitter configured to emit light within a range of wavelengths and the substrate configured to pass light within the range of wavelengths;
a light detector having a light receiving area, the light detector attached to the top surface of the substrate and electrically connected to at least one of the traces, the receiving area facing the substrate, wherein the light emitter and the light detector are disposed on a same side of the substrate;
a conductive structure disposed on the top surface of the substrate and electrically connected to at least one of the traces; and
an opaque material disposed on the substrate, the opaque material configured to absorb or attenuate the light within the range of wavelengths.

US Pat. No. 10,170,654

SOLAR POWERED DEVICE WITH SCALABLE SIZE AND POWER CAPACITY

SAGE ELECTROCHROMICS, INC...

1. A photovoltaic assembly, comprising:an insulated glazing unit including a variably transmissive glazing;
a photovoltaic module attached to an outermost surface of the insulated glazing unit and electrically coupled to the variably transmissive glazing, the photovoltaic module extending between a first end of the insulated glazing unit and an opposing second end of the insulated glazing unit, wherein the photovoltaic module has a length smaller than a distance between the first and second ends of the insulated glazing unit;
a trim proposed between an end of the photovoltaic module and one of the first and second ends of the insulated glazing unit; and
a control module attached to an interior face portion of the insulated glazing unit.

US Pat. No. 10,170,650

VERTICALLY STACKED PHOTOVOLTAIC AND THERMAL SOLAR CELL

UNIVERSITY OF HOUSTON SYS...

1. A photovoltaic device adapted for receiving incident light, comprising:a plurality of photovoltaic cells, wherein each of the plurality of photovoltaic cells comprises:
a first conductive layer,
a photoactive layer adjacent the first conductive layer, wherein the photoactive layer comprises an organic material,
a second conductive layer adjacent the photoactive layer,
a substrate adjacent to one of the first conductive layer or second conductive layer,
a first planar interface is formed between the first conductive layer and the photoactive layer, and a second planar interface is formed between the photoactive layer and the second conductive layer;
wherein each layer of the plurality of photovoltaic cells has an upper surface and a lower surface, the lower surface is opposite to the upper surface, and each layer of the plurality of photovoltaic cells are stacked parallel to each other in a stacking direction;
wherein a first top end of the plurality of photovoltaic cells nearer the incident light for receiving the incident light is a first plane formed by the upper surface of each of the first conductive layer, the photoactive layer, the second conductive layer, and the substrate of the plurality of photovoltaic cells, and a second bottom end of the plurality of photovoltaic cells is a second plane formed by the lower surface of each of the first conductive layer, the photoactive layer, and the second conductive layer of the plurality of photovoltaic cells;
wherein the first planar interface and the second planar interface of each of the plurality of photovoltaic cells are oriented perpendicular to both the first plane of the first top end and the second plane of the second bottom end of the plurality of photovoltaic cells;
wherein the first top end of the plurality of photovoltaic cells is spaced apart and parallel to the second bottom end of the plurality of photovoltaic cells in a vertical direction perpendicular to the stacking direction;
wherein a channel runs through the substrate and is oriented to extend perpendicular to both the stacking direction and the vertical direction; and
a reflective surface in contact with the second bottom end of the plurality of photovoltaic cells.

US Pat. No. 10,170,627

NANOWIRE TRANSISTOR WITH SOURCE AND DRAIN INDUCED BY ELECTRICAL CONTACTS WITH NEGATIVE SCHOTTKY BARRIER HEIGHT

Acorn Technologies, Inc.,...

1. A nanowire transistor, comprising:a gate circumferentially surrounding and displaced from a semiconductor nanowire channel by an electrically insulating gate oxide, the semiconductor nanowire channel having no intentional doping;
a source at a first end of the nanowire channel, and a drain at a second end of the nanowire channel, the source and drain each comprising undoped semiconductor material; and
a first metal contact circumferentially surrounding the source and providing an electrically conductive path to the source, and a second metal contact circumferentially surrounding the drain and providing an electrically conductive path to the drain,
wherein the first metal contact electrostatically induces free charge carriers in the source, the first metal contact is separated from the gate by an insulating material layer or a gap, and the second metal contact is separated from the gate by an insulating material layer or a gap.

US Pat. No. 10,170,625

METHOD FOR MANUFACTURING A COMPACT OTP/MTP TECHNOLOGY

GLOBALFOUNDRIES SINGAPORE...

1. A method comprising:providing a substrate having a buried oxide (BOX) layer formed over the substrate;
forming first and second fins on the BOX layer, wherein the second fin is arranged opposite the first fin on the BOX layer such that an end of the second fin is aligned to an end of the first fin with a gap in between;
forming first and second gates, laterally separated, over and perpendicular to the first and second fins, respectively;
forming at least one third gate between the first and second gates and contacting the BOX layer through the gap, each third gate overlapping an end of the first fin, the second fin, or both fins;
forming at least one additional pair of separated first and second fins parallel to and vertically spaced from the first and second fins;
extending the first and second gates over one or more of the additional first and second fins, respectively;
forming a source/drain (S/D) region in each of the first and second fins adjacent to the first and second gates, respectively, remote from the at least one third gate;
utilizing each of the first and second gates as a word line (WL);
utilizing each at least one third gate as a source line (SL) or connecting a SL to the S/D region; and
connecting a bit line (BL) to the S/D region or the at least one third gate.

US Pat. No. 10,170,619

VERTICAL SCHOTTKY CONTACT FET

International Business Ma...

1. A semiconductor structure comprising:a vertical field effect transistor located above a substrate, said vertical field effect transistor comprising:
a bottom Schottky contact source/drain structure located directly on a surface of said substrate, said bottom Schottky contact source/drain structure comprises a base portion and a vertically extending portion;
a semiconductor channel region extending vertically upwards from a surface of said base portion of said bottom Schottky contact source/drain structure;
a top Schottky contact source/drain structure located on a topmost surface of said semiconductor channel region; and
a gate structure located on each side of said semiconductor channel region, wherein said vertically extending portion of said bottom Schottky contact source/drain structure has a topmost surface that is coplanar with a topmost surface of said top Schottky contact source/drain structure.

US Pat. No. 10,170,617

VERTICAL TRANSPORT FIELD EFFECT TRANSISTORS

GLOBALFOUNDRIES, Grand C...

1. A structure, comprising:a vertical fin structure composed of semiconductor material and having a lower dopant region at a lower portion of the vertical fin structure, an upper dopant region at an upper portion of the vertical fin structure and a channel region between the lower dopant region and the upper dopant region;
a recessed portion in the semiconductor material adjacent to the lower dopant region at a lower portion of the vertical fin structure;
shallow trench isolation structures formed in the semiconductor material, adjacent to the recessed portion; and
doped semiconductor material in the recessed portion in the semiconductor material on sides of the vertical fin structure at the lower portion and adjacent to the shallow trench isolation structures, the lower dopant region being composed of the doped semiconductor material at the lower portion,
wherein the doped semiconductor material comprises a tri-layer of material within the recessed portion, with a higher doped semiconductor material in a lower portion and upper portion of the recessed portion, and a lower doped semiconductor material sandwiched therebetween.

US Pat. No. 10,170,616

METHODS OF FORMING A VERTICAL TRANSISTOR DEVICE

GLOBALFOUNDRIES Inc., Gr...

1. A method of forming a vertical transistor device, the method comprising:forming a plurality of layers of material above a bottom source/drain (S/D) layer of semiconductor material that is positioned above a semiconductor substrate, said plurality of layers including a bottom spacer layer of dielectric material positioned on said bottom source/drain (S/D) layer of semiconductor material, a sacrificial gate material layer positioned on said bottom spacer layer of dielectric material, a top spacer layer of dielectric material positioned on said sacrificial gate material layer, and a sacrificial layer of material positioned on said top spacer layer of material;
performing at least one etching process to define a cavity in said plurality of layers of material, wherein a portion of said bottom source/drain (S/D) layer of semiconductor material is exposed at a bottom of said cavity;
performing at least one epi deposition process to form a vertically oriented channel semiconductor structure on said bottom source/drain (S/D) layer of semiconductor material and in said cavity and a top source/drain (S/D) layer of semiconductor material above said vertically oriented channel semiconductor structure;
after performing said at least one epi deposition process, removing at least one of said plurality of layers of material to thereby expose an outer perimeter surface of said vertically oriented channel semiconductor structure; and
forming a gate structure around said exposed outer perimeter surface of said vertically oriented channel semiconductor structure.

US Pat. No. 10,170,610

PSEUDOMORPHIC HIGH ELECTRON MOBILITY TRANSISTOR WITH LOW CONTACT RESISTANCE

QUALCOMM Incorporated, S...

1. A pseudomorphic high electron mobility transistor (pHEMT), comprising:a substrate layer;
a bottom barrier layer on the substrate layer;
a channel layer on the bottom barrier layer;
an upper barrier layer on the channel layer;
a source and a drain on the upper barrier layer, each having a cap layer, an Ohmic contact layer on the cap layer, and a metal contact layer on the Ohmic contact layer, wherein the Ohmic contact layer has a smaller bandgap than the cap layer and comprises InxGa1-xAs, wherein the value of x increases from the bottom of the Ohmic contact layer to the top of the Ohmic contact layer; and
a gate metal stack on the upper barrier layer.

US Pat. No. 10,170,609

INTERNAL SPACER FORMATION FROM SELECTIVE OXIDATION FOR FIN-FIRST WIRE-LAST REPLACEMENT GATE-ALL-AROUND NANOWIRE FET

INTERNATIONAL BUSINESS MA...

1. A method of fabricating a nanowire field-effect transistor (FET) device, the method comprising:forming at least one stacked multi-semiconductor layer fin on an upper surface of a wafer, the at least one stacked multi-semiconductor layer fin including at least one semiconductor fin portion interposed between an opposing pair of sacrificial fin portions;
forming at least one dummy gate stack including a dummy gate on an upper surface of the at least one stacked multi-semiconductor layer fin;
etching the stacked multi-semiconductor layer fin while using the at least one dummy gate stack as a mask to preserve an underlying semiconductor fin portion and an underlying sacrificial fin portion and to expose sidewalls of the underlying sacrificial fin portions;
forming oxidized spacers on the sidewalls of the underlying sacrificial fin portions that are beneath the dummy gate;
after forming the oxidized spacers, epitaxially growing a semiconductor material laterally from exposed sidewalls of at least one of the underlying semiconductor fin portions to form replacement source/drain regions on opposing sides of the at least one stacked multi-semiconductor layer fin such that the oxidized spacers are interposed between the underlying sacrificial fin portions and the replacement source/drain regions;
removing the dummy gate after forming the oxidized spacers to form trenches that expose non-oxidized portions of the sacrificial fin portions and selectively etching the exposed non-oxidized portions of the sacrificial fin portions with respect to the oxidized spacers to form voids that define at least one nanowire of a nanowire FET device; and
utilizing the oxidized spacers to prohibit the voids from extending laterally beyond the oxidized spacers and into the replacement source/drain regions.

US Pat. No. 10,170,608

INTERNAL SPACER FORMATION FROM SELECTIVE OXIDATION FOR FIN-FIRST WIRE-LAST REPLACEMENT GATE-ALL-AROUND NANOWIRE FET

INTERNATIONAL BUSINESS MA...

1. A semiconductor device extending along a first direction to define a length, a second direction to define a width, and a third direction opposite the first and second directions to define a height, comprising:a first source/drain region and a second source/drain region, each on an upper surface of a wafer;
a gate region interposed between the first and second source/drain regions;
a plurality of nanowires, each nanowire having a first end anchored to the first source/drain region and an opposing second end anchored to the second source/drain region such that the at least one nanowire is suspended above the wafer in the gate region, the nanowire extending along the first direction to define a wire length and the second direction to define a wire width, the plurality of nanowires defining a stacked nanowire mesh including a first layer of nanowires interposed between the wafer and a second layer of nanowires;
at least one gate electrode in the gate region, the gate electrode extending along the second direction and contacting an entire surface of the at least one nanowire to define a gate-all-around configuration;
gate spacers on the sidewalls of the gate electrode, the gate spacers having a first thickness and extending along the second direction; and
at least one pair of oxidized spacers having a second thickness and surrounding the at least one gate electrode to electrically isolate the at least one gate electrode from the first and second source/drain regions, the at least one pair of oxidized spacers extending along the second direction parallel with the gate spacers and on sidewalls of the gate electrode beneath the gate spacers, the second thickness of the at least one pair of oxidized spacers being equal to the first thickness of the gate spacers,
wherein the first source/drain region and the second source/drain region are a single layer epitaxial material, and
wherein the first source/drain region includes a first raised replacement source/drain and the second source/drain region includes a second raised replacement source/drain, the first and second raised replacement source/drain regions formed directly against the first end of every nanowire among the plurality of nanowires and the at least one pair of oxidized spacers.

US Pat. No. 10,170,607

SEMICONDUCTOR DEVICE

DENSO CORPORATION, Kariy...

1. A semiconductor device comprisinga semiconductor substrate including:
a first conductivity-type drift layer;
a second conductivity-type base layer disposed in a surface layer portion of the drift layer; and
a second conductivity-type collector layer and a first conductivity-type cathode layer disposed opposite to the base layer with respect to the drift layer, wherein
in the semiconductor substrate, a region operating as an IGBT element is referred to as an IGBT region, and a region operating as a diode element is referred to as a diode region, and the IGBT region and the diode region are alternately and repetitively arranged,
the IGBT region and the diode region are divided from each other by a boundary between the collector layer and the cathode layer,
the collector layer and the cathode layer extend in a direction along a surface of the semiconductor substrate, and the collector layer and the cathode layer are alternately and repetitively arranged in a direction orthogonal to the direction in which the collector layer and the cathode layer extend,
the collector layer is referred to as a first collector layer,
the semiconductor substrate further includes a second collector layer having a second conductivity-type impurity concentration higher than that of the first collector layer, at the surface of the semiconductor substrate along which the first collector layer and the cathode layer are disposed, and
the second collector layer is disposed between the first collector layer and the cathode layer, the second collector layer is located only at a position corresponding to a boundary between the IGBT region and the diode region, and the second collector layer is in contact with the cathode layer.

US Pat. No. 10,170,606

INSULATED GATE BIPOLAR TRANSISTOR AND DIODE

ROHM CO., LTD., Kyoto (J...

1. A semiconductor device comprising:a semiconductor layer having a first principal surface on one side thereof and a second principal surface on the other side thereof;
a channel region of a first conductivity type formed at a surface layer portion of the first principal surface of the semiconductor layer;
an emitter region of a second conductivity type formed at a surface layer portion of the channel region in the semiconductor layer;
a drift region of the second conductivity type formed in a region of the second principal surface side with respect to the channel region in the semiconductor layer so as to be electrically connected to the channel region;
a collector region of the first conductivity type formed at a surface layer portion of the second principal surface of the semiconductor layer so as to be electrically connected to the drift region;
a cathode region of the second conductivity type formed at a surface layer portion of the second principal surface of the semiconductor layer so as to be electrically connected to the drift region and including a line-shaped pattern continuously laid around, the line-shaped pattern including a pattern extending in a meandering form as viewed in plan; and
a gate electrode formed at the first principal surface side of the semiconductor layer so as to face the channel region across an insulating film.

US Pat. No. 10,170,605

MOS-BIPOLAR DEVICE

ECO SEMICONDUCTORS LIMITE...

1. A semiconductor device comprising a cluster of cells, wherein at least a portion of the cells comprise a base region of a first conductivity type having disposed therein at least one cathode region of a first and second conductivity type, the cathode regions being connected together through conductive contacts such that the cells are operative, and wherein at least a portion of the remaining cells comprise a base region of a first conductivity type and no cathode regions so that the remaining cathode regions are configured to be inoperative and designated as dummy cells; a first well region of a second conductivity type; a second well region of a first conductivity type; a drift region of a second conductivity type; an anode region of a first conductivity type; and an anode contact; in which each cell is disposed within the first well region and the first well region is disposed within the second well region; wherein the device comprises an elongate trench that longitudinally intersects the second well region and the drift region and laterally intersects the base region and the first and second well regions, the trench partially extending through a thickness of the second well region, wherein an insulating film is provided to substantially cover the inner surface of the trench and wherein a first gate is formed on the insulating film so as to substantially fill the trench; and in which the device is configured such that during operation of the device a depletion region at a junction between the base region and the first well region extends to a junction between the first well region and the second well region with increasing anode potential until the anode potential reaches a predetermined threshold potential so that the potential of the first well region is isolated from an increase in the potential of the anode contacts above the predetermined threshold.

US Pat. No. 10,170,604

METHOD FOR MAKING A SEMICONDUCTOR DEVICE INCLUDING A RESONANT TUNNELING DIODE WITH ELECTRON MEAN FREE PATH CONTROL LAYERS

ATOMERA INCORPORATED, Lo...

1. A method for making a semiconductor device comprising:forming at least one double-barrier resonant tunneling diode (DBRTD) by
forming a first doped semiconductor layer,
forming a first barrier layer on the first doped semiconductor layer and comprising a first superlattice, the first superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions,
forming a first intrinsic semiconductor layer on the first barrier layer,
forming a second barrier layer on the first intrinsic semiconductor layer and comprising a second superlattice, the second superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions,
forming a second intrinsic semiconductor layer on the second barrier layer,
forming a third barrier layer on the second intrinsic semiconductor layer and comprising a third superlattice, the third superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions,
forming a third intrinsic semiconductor layer on the third barrier layer,
forming a fourth barrier layer on the third intrinsic semiconductor layer, and
forming a second doped semiconductor layer on the fourth barrier layer.

US Pat. No. 10,170,603

SEMICONDUCTOR DEVICE INCLUDING A RESONANT TUNNELING DIODE STRUCTURE WITH ELECTRON MEAN FREE PATH CONTROL LAYERS

ATOMERA INCORPORATED, Lo...

1. A semiconductor device comprising:at least one double-barrier resonant tunneling diode (DBRTD) comprising
a first doped semiconductor layer,
a first barrier layer on the first doped semiconductor layer and comprising a first superlattice, the first superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions,
a first intrinsic semiconductor layer on the first barrier layer,
a second barrier layer on the first intrinsic semiconductor layer and comprising a second superlattice, the second superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions,
a second intrinsic semiconductor layer on the second barrier layer,
a third barrier layer on the second intrinsic semiconductor layer and comprising a third superlattice, the third superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions,
a third intrinsic semiconductor layer on the third barrier layer,
a fourth barrier layer on the third intrinsic semiconductor layer, and
a second doped semiconductor layer on the fourth barrier layer.

US Pat. No. 10,170,602

SEMICONDUCTOR DEVICE WITH MULTIPLE HBTS HAVING DIFFERENT EMITTER BALLAST RESISTANCES

Qorvo US, Inc., Greensbo...

1. A method comprising:providing a first no-contact HBT and a second no-contact HBT formed over a substrate, wherein the first no-contact HBT comprises a first lower cap over a first emitter, a first middle cap over the first lower cap, a first ballast resistor layer over the first middle cap, and a first upper cap over the first ballast resistor layer at a top portion of the first no-contact HBT, and the second no-contact HBT comprises a second lower cap over a second emitter, a second middle cap over the second lower cap, a second ballast resistor layer over the second middle cap, and a second upper cap over the second ballast resistor layer at a top portion of the second no-contact HBT;
removing the second upper cap and the second ballast resistor layer from the second no-contact HBT to form a second etched HBT; and
providing a first emitter contact to the first no-contact HBT to form a first HBT, wherein the first emitter contact is formed over the first upper cap, and providing a second emitter contact to the second etched HBT to form a second HBT, wherein the second emitter contact is formed over the second middle cap.

US Pat. No. 10,170,601

STRUCTURE AND FORMATION METHOD OF SEMICONDUCTOR DEVICE WITH BIPOLAR JUNCTION TRANSISTOR

Taiwan Semiconductor Manu...

1. A semiconductor device structure, comprising:a collector element formed in or over a semiconductor substrate;
a semiconductor element over the collector element, wherein the semiconductor element has a top surface, a bottom surface, and a side surface;
an emitter element over the top surface of the semiconductor element; and
a base element over the collector element and in direct contact with the side surface of the semiconductor element.

US Pat. No. 10,170,600

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

Semiconductor Energy Labo...

1. A manufacturing method of a semiconductor device, comprising the steps of:forming a silicon layer over a substrate;
forming a resin layer over the silicon layer;
forming a transistor over the resin layer;
forming a conductive layer over the silicon layer and the resin layer; and
separating the substrate and the transistor from each other,
wherein the resin layer comprises an opening over the silicon layer,
wherein the conductive layer is in contact with the silicon layer through the opening of the resin layer, and
wherein in the step of separating the substrate and the transistor from each other, silicon contained in the silicon layer and metal contained in the conductive layer react with each other by irradiation of the silicon layer with light to form a metal silicide layer.

US Pat. No. 10,170,599

SEMICONDUCTOR DEVICE INCLUDING INSULATING FILMS WITH DIFFERENT THICKNESSES AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE

Semiconductor Energy Labo...

1. A method for manufacturing a semiconductor device, comprising:forming an oxide semiconductor film over a substrate;
forming a first oxide insulating film over and in contact with the oxide semiconductor film, in an apparatus and by chemical vapor deposition in a first atmosphere, and with a first radio-frequency power supplied to an electrode of the apparatus; and
forming a second oxide insulating film over and in contact with the first oxide insulating film, in the apparatus and by chemical vapor deposition in a second atmosphere, and with a second radio-frequency power supplied to the electrode of the apparatus,
wherein the first radio-frequency power is lower than the second radio-frequency power,
wherein the first oxide insulating film is formed thinner than the second oxide insulating film, and a thickness of the first oxide insulating film is less than or equal to 50 nm, and
wherein spin densities of the first oxide insulating film measured by electron spin resonance are less than or equal to a lower limit of detection at a g-factor of 2.001.

US Pat. No. 10,170,598

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

Semiconductor Energy Labo...

1. A method for manufacturing a semiconductor device, comprising the steps of:forming an oxynitride semiconductor layer over an oxide insulating layer formed over an insulating surface;
forming a gate insulating layer over the oxynitride semiconductor layer; and
forming a gate electrode over the gate insulating layer,
wherein the oxynitride semiconductor layer includes a channel region, a source region, and a drain region,
wherein an amount of oxygen released by the oxide insulating layer in thermal desorption spectroscopy is greater than or equal to 1.0×1020 atoms/cm3, and
wherein the oxynitride semiconductor layer is an n-type semiconductor layer.

US Pat. No. 10,170,597

METHOD FOR FORMING FLASH MEMORY UNIT

Integrated Silicon Soluti...

1. A method for forming flash memory units, each of the flash memory units comprising a select gate PMOS transistor and a control gate PMOS transistor, the method comprising the steps of:providing a P-type substrate and forming an N-type well in the P-type substrate, wherein the N-type well comprises a plurality of flash memory unit areas each comprising a select gate PMOS transistor area and a control gate PMOS transistor area;
forming a channel area, a gate oxide layer, an N-type floating gate and an insulating layer sequentially for the select gate PMOS transistor and the control gate PMOS transistor in the flash memory unit area;
etching a part or all of the insulating layer in the select gate PMOS transistor area, and forming a logic gate on the etched insulating layer in the flash memory unit area;
implanting P-type impurities into the logic gate in the flash memory unit area, wherein a doping concentration of the logic gate is larger than a doping concentration of the N-type floating gate;
separating the logic gate in the select gate PMOS transistor area from the logic gate in the control gate PMOS transistor area by etching;
diffusing the P-type impurities in the logic gate in the select gate PMOS transistor area to the N-type floating gate in the select gate PMOS transistor area using a heating process, such that the N-type floating gate in the select gate PMOS transistor area changes to a P-type floating gate; and
forming electrodes for the select gate PMOS transistor and the control gate PMOS transistor.

US Pat. No. 10,170,596

FABRICATION OF AN ISOLATED DUMMY FIN BETWEEN ACTIVE VERTICAL FINS WITH TIGHT FIN PITCH

International Business Ma...

1. An arrangement of active and inactive fins on a substrate, comprising:a substrate;
a pair of vertical fins on the substrate;
an inactive vertical fin on the substrate between the pair of vertical fins, wherein the inactive vertical fin includes a lower portion made of a semiconductor material and an upper portion made of an insulating material;
a protective liner on a lower portion of each of the pair of vertical fins and the lower portion of the inactive vertical fin; and
a filler layer on the protective liner and the substrate, wherein a top surface of the filler layer is above the protective liner and the lower portion of the inactive vertical fin made of the semiconductor material.

US Pat. No. 10,170,594

PUNCH THROUGH STOPPER IN BULK FINFET DEVICE

INTERNATIONAL BUSINESS MA...

1. A method for forming a semiconductor device comprising:forming a gate structure on a channel region portion of a fin structure after forming an isolation region;
forming a spacer on the gate structure;
exposing a lower portion of a sidewall of the fin structure;
forming a doped material on the lower portion of the fin structure, wherein said forming the doped material on the exposed lower portion of the sidewall of the fin structure comprises epitaxial deposition of a semiconductor material that is in situ doped with an n-type or p-type dopant; and
diffusing dopant from the doped material to a base portion of the fin structure.

US Pat. No. 10,170,593

THRESHOLD VOLTAGE MODULATION THROUGH CHANNEL LENGTH ADJUSTMENT

International Business Ma...

1. A method of forming an arrangement of long fin and short fin devices on a substrate, comprising:forming a plurality of long fins on the substrate;
forming a plurality of short fins on the substrate, wherein the short fins are shorter than the long fins;
forming a first active gate across the plurality of long fins;
forming a second active gate across the plurality of short fins, wherein at least one of the plurality of long fins is adjacent to at least one of the plurality of short fins; and
forming at least two dummy gates across the plurality of long fins.

US Pat. No. 10,170,592

INTEGRATED CIRCUIT STRUCTURE WITH SUBSTRATE ISOLATION AND UN-DOPED CHANNEL

TAIWAN SEMICONDUCTOR MANU...

1. A method of fabricating a circuit device, the method comprising:receiving a substrate having a first semiconductor layer of a first semiconductor material and a second semiconductor layer of a second semiconductor material on the first semiconductor layer, wherein the second semiconductor material is different from the first semiconductor material in composition;
patterning the first semiconductor layer, the second semiconductor layer, and the substrate to form a fin structure that includes the first semiconductor layer, the second semiconductor layer, and a patterned portion of the substrate; and
performing a selective oxidization process to the first semiconductor layer, such that a bottom portion of the first semiconductor layer is fully oxidized while a top portion of the first semiconductor layer directly above the oxidized bottom portion and the patterned portion of the substrate directly below the oxidized bottom portion remain un-oxidized.

US Pat. No. 10,170,591

SELF-ALIGNED FINFET FORMATION

INTERNATIONAL BUSINESS MA...

1. A method for fabricating a semiconductor device, the method comprising:forming a first hardmask on a semiconductor substrate;
forming a planarizing layer on the first hardmask;
forming a second hardmask on the planarizing layer;
removing portions of the second hardmask;
forming alternating blocks of a first material and a second material over the second hardmask;
removing the blocks of the second material to expose portions of the planarizing layer;
removing exposed portions of the planarizing layer to expose portions of the first hardmask and removing portions of the first hardmask to expose portions of the semiconductor substrate;
removing exposed portions of the semiconductor substrate to form a first fin and a second fin, wherein the first fin is arranged under a portion of the planarizing layer;
further removing exposed portions of the semiconductor substrate to further increase the height of the first fin and substantially remove the second fin; and
forming a gate stack over a channel region of the first fin;
wherein the planarizing layer includes an organic planarizing material;
wherein the second hardmask includes a first layer arranged on the planarizing layer, a second layer arranged on the first layer, and a third layer arranged on the second layer; and
wherein a layer of the first material is deposited over portions of the first layer of the second hardmask prior to forming the alternating blocks of the first material and the second material.

US Pat. No. 10,170,590

VERTICAL FIELD EFFECT TRANSISTORS WITH UNIFORM THRESHOLD VOLTAGE

INTERNATIONAL BUSINESS MA...

9. A semiconductor structure, comprising:semiconductor fins on a substrate, the semiconductor fins being arranged in a direction;
a spacer layer between the semiconductor fins, the spacer layer being on a surface of the substrate upon which the semiconductor fins are formed;
a high dielectric constant layer, wherein a first portion of the high dielectric constant layer is on sidewalls of the semiconductor fins, and a second portion of the high dielectric constant layer is over the spacer layer;
a work function metal layer on sidewalls of the semiconductor fins and on the high dielectric constant layer, a thickness of the work function metal layer in the direction being uniform; and
a top spacer layer, wherein the top spacer layer is on a portion of the low resistance metal layer, a portion of the work function metal layer, and a portion of the high-dielectric constant layer.

US Pat. No. 10,170,589

VERTICAL POWER MOSFET AND METHODS FOR FORMING THE SAME

Taiwan Semiconductor Manu...

1. A device comprising:a semiconductor region;
a gate dielectric over the semiconductor region;
a gate electrode over the gate dielectric;
a drain region and a source region at a top surface of the semiconductor region and adjacent to the gate electrode;
a gate spacer on a sidewall of the gate electrode;
a dielectric layer over the gate electrode and the gate spacer, wherein the dielectric layer comprises a portion, with the portion comprising a first sidewall contacting the gate spacer, and a second sidewall opposite to the first sidewall;
a deep metal via in the semiconductor region, wherein an edge of the deep metal via is aligned to the second sidewall of the portion of the dielectric layer;
a source electrode underlying the semiconductor region, wherein the source electrode is electrically shorted to the source region through the deep metal via; and
a Metal-Oxide-Semiconductor (MOS) device selected from the group consisting essentially of a low-voltage MOSFET and a high-side MOSFET formed at a top surface of the semiconductor region, wherein the MOSFET comprises an additional source region and an additional drain region at the top surface of the semiconductor region, and the source electrode extends directly underlying, and is electrically decoupled from, the additional source region and the additional drain region.

US Pat. No. 10,170,588

METHOD OF FORMING VERTICAL TRANSPORT FIN FIELD EFFECT TRANSISTOR WITH HIGH-K DIELECTRIC FEATURE UNIFORMITY

International Business Ma...

1. A method of forming a vertical transport fin field effect transistor, comprising:forming a doped layer on a substrate;
forming a multilayer fin on the doped layer, wherein the multilayer fin includes a lower trim layer portion, an upper trim layer portion, and a fin channel portion between the lower trim layer portion and the upper trim layer portion;
removing a portion of the lower trim layer portion to form a lower trim layer post;
removing a portion of the upper trim layer portion to form an upper trim layer post;
forming an upper recess filler adjacent to the upper trim layer post, and a lower recess filler adjacent to the lower trim layer post; and
removing a portion of the fin channel portion to form a fin channel post between the upper trim layer post and lower trim layer post.

US Pat. No. 10,170,587

HETEROGENEOUS SOURCE DRAIN REGION AND EXTENSION REGION

International Business Ma...

1. A semiconductor device fabrication process comprising:forming a sacrificial portion upon a substrate;
forming a sacrificial gate stack upon the sacrificial portion;
forming a sacrificial gate spacer upon the sacrificial portion against the sacrificial gate;
forming a source drain region of a first doped material upon the substrate against the gate spacer;
removing the sacrificial gate stack forming a replacement gate trench;
forming an extension trench between the sacrificial gate spacer and the substrate by removing the sacrificial portion accessible via the replacement gate trench;
forming an extension region of a second doped material that has a higher mobility relative to the first doped material within the extension trench against the sacrificial gate spacer and against the substrate;
removing the sacrificial gate spacer; and
forming a replacement gate spacer upon the extension region.

US Pat. No. 10,170,586

UNIPOLAR SPACER FORMATION FOR FINFETS

International Business Ma...

1. A method for forming a spacer for a semiconductor device, comprising:depositing a dummy spacer layer over surfaces of gate structures and fins, the gate structures being transversely orientated relative to the fins;
planarizing a dielectric fill formed over the gate structures and the fins to remove a portion of the dummy spacer layer formed on tops of the gate structures and expose the dummy spacer layer at tops of sidewalls of the gate structures;
forming channels by removing the dummy spacer layer along the sidewalls of the gate structures, the fins being protected by the dielectric fill;
forming a spacer by filling the channels with a spacer material; and
removing the dielectric fill and the dummy spacer layer to expose the tins.

US Pat. No. 10,170,585

SEMICONDUCTOR DEVICES HAVING EQUAL THICKNESS GATE SPACERS

International Business Ma...

1. A method of forming equal thickness gate spacers for PFET (p-type field effect transistor) and NFET (n-type field effect transistor) devices, the method comprising:depositing at least a first dielectric layer to pinch-off space between gates;
recessing the first dielectric layer such that a first gate hard mask is exposed;
depositing a first conformal atomic layer deposition (ALD) layer or depositing a first directed self-assembly (DSA) layer adjacent gate masks of the PFET and NFET devices;
masking the NFET device and etching the first dielectric layer in a PFET region using the first ALD layer or the first DSA layer as a mask to form a PFET spacer;
forming PFET epi growth regions;
depositing a first nitride liner and a first inter-level dielectric (ILD) over the PFET and NFET devices;
recessing the ILD and the nitride liner to reveal a second gate hard mask;
depositing a second conformal ALD layer or depositing a second DSA layer adjacent the gate masks of the PFET and NFET devices;
masking the PFET device and etching the first dielectric layer in NFET region using the second ALD layer or the second DSA layer as a mask to form an NFET spacer;
forming NFET epi growth regions;
depositing a second nitride liner and a second inter-level dielectric (ILD) over the PFET and NFET devices; and
removing the gate masks of the PFET and NFET devices to form high-k metal gates (HKMGs) between the PFET and NFET epi growth regions.

US Pat. No. 10,170,584

NANOSHEET FIELD EFFECT TRANSISTORS WITH PARTIAL INSIDE SPACERS

International Business Ma...

1. A method of forming a nanosheet device, comprising:forming a channel stack on a substrate, where the channel stack includes at least one nanosheet channel layer and at least one sacrificial release layer;
forming a stack cover layer on at least a portion of the channel stack, wherein the stack cover layer is formed on at least a portion of exposed sides of the at least one nanosheet channel layer and the at least one sacrificial release layer;
forming a dummy gate on at least a portion of the stack cover layer, wherein at least a portion of the at least one nanosheet channel layer and at least one sacrificial release layer is exposed on opposite sides of the dummy gate;
removing at least a portion of the at least one sacrificial release layer on each side of the dummy gate to form a sacrificial supporting rib; and
forming an inner spacer layer on exposed portions of the at least one nanosheet channel layer and at least one sacrificial supporting rib.

US Pat. No. 10,170,583

FORMING A GATE CONTACT IN THE ACTIVE AREA

INTERNATIONAL BUSINESS MA...

1. A method of making a semiconductor device, the method comprising:patterning a fin in a substrate;
forming a gate between source/drain regions over the substrate, the gate having a dielectric spacer along a sidewall;
removing a portion of the dielectric spacer and filling with a metal oxide to form a spacer, the spacer having a first spacer portion and a second spacer portion;
recessing the gate and depositing a dielectric cap over the gate;
forming a source/drain contact over at least one of the source/drain regions, the source/drain contact contacting the spacer and the dielectric spacer;
forming a via contact over the source/drain contact; and
removing the dielectric cap and forming a gate contact over the gate, the gate contact having a first gate contact portion contacting the gate and a second gate contact portion positioned over the first gate contact portion, the second gate contact portion being wider than the first gate contact portion;
wherein the first spacer portion and the second spacer portion comprise different materials, the first spacer portion lines sidewalls of the gate and extends to a height that is over the gate, and directly contacts the first gate contact portion and the source/drain contact, and the second spacer portion is arranged directly on top of the first spacer portion, directly beneath an overhanging portion of the second gate contact portion, and directly in contact with the source/drain contact.