US Pat. No. 11,116,020

POWER EFFICIENT TUNNELED DIRECT LINK SETUP APPARATUS, SYSTEMS AND METHODS

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14. A first device comprising:a station module configured to:communicate with a second device via a first wireless link; and
communicate with a third device via a second wireless link;

an interprocess communication link coupled to the station module; and
an access point module coupled to the station module via the interprocess communication link, wherein the access point module is configured to:receive, via a third wireless link, a tunneled direct-link setup (TDLS) bridge request from the second device associated with communication between the second device and the third device;
based on receiving the TDLS bridge request, provide, over the interprocess communication link, a wake-up message to the station module;
forward a first TDLS setup request from the station module to the second device; and
forward a second TDLS setup request from the station module to the third device, wherein the station module is further configured to bridge communication between the second device and the third device.


US Pat. No. 11,119,909

METHOD AND SYSTEM FOR IN-LINE ECC PROTECTION

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1. An integrated circuit comprising:an interconnect configured to receive, from a system, commands to read data from and/or write data to physical addresses of a memory device; and
a bridge configured to receive the commands from the interconnect and to perform address translation between system addresses and the physical addresses by:calculating a first ECC memory address for a first ECC data block that is after and adjacent to a first address of a first data block;
calculating a second ECC memory address for a second ECC data block that is after and adjacent to the first ECC memory address of the first ECC data block; and
calculating a second data address for a second data block that is after and adjacent to the second ECC memory address of the second ECC data block.


US Pat. No. 11,108,899

WLAN DEVICE WITH PREAMBLE DECODE-BASED RECEIVE SUSPEND DURING UNDESIRED PACKETS

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8. A method comprising:receiving, by a device, a packet comprising a Physical Layer Convergence Protocol (PLCP) header comprising a length field;
determining, by the device, whether time remaining for turning off and on a first portion of a receive chain of the device is greater than a threshold, based on the length field of the PLOP header of the packet;
turning off the first portion of the receive chain, in response to determining that the time remaining for turning off and on the first portion of the receive chain of the device is greater than the threshold, wherein turning off the first portion of the receive chain comprises sending a receive interrupt signal to a physical (PHY) layer of the device;
maintaining a high Clear Channel Assessment (CCA) setting while the first portion of the receive chain is off;
setting the receive interrupt signal to extend to an end of the packet; and
issuing a receive suspend interrupt for turning on the first portion of the receive chain, in response to detecting the end of the packet.

US Pat. No. 11,106,583

SHADOW CACHES FOR LEVEL 2 CACHE CONTROLLER

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1. An apparatus, comprising:a central processing unit (CPU) core;
a level one (L1) cache subsystem coupled to the CPU core, the L1 cache subsystem comprising:a L1 main cache;
a L1 victim cache; and
a L1 controller; and

a level two (L2) cache subsystem coupled to the L1 cache subsystem, the L2 cache subsystem comprising:a L2 main cache;
a shadow L1 main cache;
a shadow L1 victim cache; and
a L2 controller configured to:receive an indication from the L1 controller that a cache line A is being relocated from the L1 main cache to the L1 victim cache;
in response to the indication, update the shadow L1 main cache to reflect that the cache line A is no longer located in the L1 main cache; and
in response to the indication, update the shadow L1 victim cache to reflect that the cache line A is located in the L1 victim cache.



US Pat. No. 11,106,584

HARDWARE COHERENCE FOR MEMORY CONTROLLER

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1. A system, comprising:a non-coherent component;
a coherent, non-caching component;
a coherent, caching component; and
a level two (L2) cache subsystem coupled to the non-coherent component, the coherent, non-caching component, and the coherent, caching component, the L2 cache subsystem comprising:a L2 cache;
a shadow level one (L1) main cache;
a shadow L1 victim cache; and
a L2 controller configured to:receive and process a first transaction from the non-coherent component;
receive and process a second transaction from the coherent, non-caching component; and
receive and process a third transaction from the coherent, caching component.



US Pat. No. 11,106,591

STREAMING ENGINE WITH SEPARATELY SELECTABLE ELEMENT AND GROUP DUPLICATION

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1. A method comprising:receiving, from a memory of a computing system, a plurality of data elements stored in the memory;
applying duplication to each data element of the plurality of data elements based on an element duplication factor to produce a set of duplicated data elements; and
supplying the set of duplicated data elements to a functional unit of a processing core of the computing system as at least part of a data stream.

US Pat. No. 11,099,994

VIRTUAL NETWORK PRE-ARBITRATION FOR DEADLOCK AVOIDANCE AND ENHANCED PERFORMANCE

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1. An integrated circuit device comprising:a set of processor interfaces;
a data path configured to couple the set of processor interfaces to a shared resource;
an arbiter circuit coupled to the set of processor interfaces and the data path and configured to:receive a set of requests via the set of processor interfaces;
select a first request from among the set of requests for service over the data path;
receive a subsequent request after the set of requests is received;
select a second request from among the first request and the subsequent request for service over the data path; and
cause the data path to service the second request.


US Pat. No. 11,102,405

REAR-STITCHED VIEW PANORAMA FOR REAR-VIEW VISUALIZATION

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1. A device configured to:receive a first image and a second image;
compute a disparity map for the first image and the second image;
receive a third image;
receive a fourth image;
transform the third image, the fourth image, a reference image of the first image or the second image, and the disparity map, to generate a transformed third image, a transformed fourth image, a transformed reference image, and a transformed disparity map; and
compute a seam between the transformed third image and the transformed fourth image in accordance with the transformed disparity map.