US Pat. No. 9,263,667

METHOD FOR MANUFACTURING MTJ MEMORY DEVICE

SPIN TRANSFER TECHNOLOGIE...

1. A method of manufacturing a magnetic tunnel junction (“MTJ”) device, the method comprising:
depositing a plurality of MTJ layers on a substrate wafer, the plurality of MTJ layers including a reference layer, a barrier
layer disposed on the reference layer and a free layer disposed on the barrier layer;

depositing a hard mask above the plurality of MTJ layers;
forming a first photoresist layer on a portion of the hard mask;
etching the hard mask and the plurality of MTJ layers to form an MTJ pillar under the first photoresist layer, wherein the
free layer and barrier layer are etched to expose side surfaces of the free layer and the barrier layer and a surface of the
reference layer adjacent to the MTJ structure;

depositing a first insulating layer on the MTJ pillar, on the exposed side surfaces of the free layer and the barrier layer,
and on the exposed surface of the reference layer;

ion beam etching the MTJ pillar to remove a portion of the first insulating layer that is disposed on horizontal surfaces
of the MTJ pillar and the exposed surface of the reference layer;

etching the MTJ layers to the substrate wafer to electrically isolate the MTJ pillar from adjacent MTJ pillars;and
planarizing the substrate wafer,
wherein the step of etching the MTJ layers includes at least one reactive ion etching and at least one ion beam etching.

US Pat. No. 9,337,412

MAGNETIC TUNNEL JUNCTION STRUCTURE FOR MRAM DEVICE

SPIN TRANSFER TECHNOLOGIE...

1. A magnetic device, comprising
an antiferromagnetic structure including a reference layer;
a barrier layer disposed over the reference layer;
a free layer having a free layer magnetization direction disposed on the barrier layer, the reference layer, the barrier layer
and the free layer forming a magnetic tunnel junction;

a nonmagnetic spacer layer disposed on the free layer; and
a polarizer disposed on the magnetic spacer layer, the polarizer layer having a magnetization direction that is perpendicular
to the free layer magnetization direction,

wherein the nonmagnetic spacer layer is disposed between the free layer of the magnetic tunnel junction and the polarizer,
the nonmagnetic spacer layer comprising a thin layer of magnesium oxide (MgO) on the free layer and a layer of tantalum nitride
(TAN) capping material on the thin layer of MgO.

US Pat. No. 10,032,978

MRAM WITH REDUCED STRAY MAGNETIC FIELDS

SPIN TRANSFER TECHNOLOGIE...

1. A magnetic device, comprising:a first synthetic antiferromagnetic structure in a first plane having a magnetization vector that is perpendicular to the first plane and having a fixed magnetization direction;
an antiferromagnetic coupling layer in a second plane and disposed above the first synthetic antiferromagnetic structure;
a second synthetic antiferromagnetic structure in a third plane and disposed over the antiferromagnetic coupling layer;
a magnetic reference layer in a fourth plane and disposed over the second synthetic antiferromagnetic structure, the magnetic reference layer having a magnetization vector that is perpendicular to the fourth plane and having a fixed magnetization direction;
a non-magnetic tunnel barrier layer in a fifth plane and disposed over the magnetic reference layer;
a free magnetic layer in a sixth plane and disposed over the non-magnetic tunnel barrier layer, the free magnetic layer having a magnetization vector that is perpendicular to the sixth plane and having a magnetization direction that can switch between a first magnetization direction to a second magnetization direction, the magnetic reference layer, the non-magnetic tunnel barrier layer and the free magnetic layer forming a magnetic tunnel junction; and
an auxiliary layer in a seventh plane that adjusts the magnetic-moment imbalance between the first synthetic antiferromagnetic structure and the magnetic reference layer to reduce stray magnetic fields in the free magnetic layer.

US Pat. No. 9,741,926

MEMORY CELL HAVING MAGNETIC TUNNEL JUNCTION AND THERMAL STABILITY ENHANCEMENT LAYER

SPIN TRANSFER TECHNOLOGIE...

1. A magnetic device, comprising
a bottom electrode in a first plane;
a perpendicular synthetic antiferromagnetic structure, the perpendicular synthetic antiferromagnetic structure including a
magnetic reference layer in a second plane, the magnetic reference layer having a magnetization direction that is perpendicular
to the second plane and having a fixed magnetization direction;

a non-magnetic tunnel barrier layer in a third plane and disposed over the magnetic reference layer;
a free magnetic layer in a fourth plane and disposed over the non-magnetic tunnel barrier layer, the free magnetic layer having
a magnetization vector that is perpendicular to the fourth plane and having a magnetization direction that can switch from
a first magnetization direction to a second magnetization direction, the magnetic reference layer, the non-magnetic tunnel
barrier layer and the free magnetic layer forming a magnetic tunnel junction;

a non-magnetic thermal stability enhancement coupling layer in a fifth plane and disposed over the free magnetic layer;
a magnetic thermal stability enhancement layer in a sixth plane that is physically separated from the free magnetic layer
and coupled to the free magnetic layer by the non-magnetic thermal stability enhancement coupling layer, the magnetic thermal
stability enhancement layer having a magnetization direction that is perpendicular to the sixth plane and having a magnetization
direction that can switch from the first magnetization direction to the second magnetization direction, wherein switching
of the magnetic thermal stability enhancement layer from the first magnetization direction to the second magnetization direction
tracks switching in the magnetic free layer; and

a cap layer in a seventh plane and disposed over the thermal stability enhancement layer.

US Pat. No. 9,406,876

METHOD FOR MANUFACTURING MTJ MEMORY DEVICE

SPIN TRANSFER TECHNOLOGIE...

1. A method of manufacturing a magnetic tunnel junction (“MTJ”) device, the method comprising:
depositing a plurality of MTJ layers on a substrate wafer, the plurality of MTJ layers including a reference layer, a barrier
layer disposed on the reference layer and a free layer disposed on the barrier layer;

depositing a hard mask above the plurality of MTJ layers;
forming a first photoresist layer on a portion of the hard mask;
etching the hard mask and the plurality of MTJ layers to form an MTJ pillar under the first photoresist layer, wherein the
free layer and barrier layer are etched to expose side surfaces of the free layer and the barrier layer of the MTJ structure;

depositing a first insulating layer on the MTJ pillar, on the exposed side surfaces of the free layer and the barrier layer,
and on an exposed surface of the reference layer;

etching the MTJ pillar to remove portions of the first insulating layer disposed on horizontal surfaces of the MTJ pillar
but leaves portions of the first insulating layer on the exposed side surfaces of the free layer and barrier layer, and to
electrically isolate the MTJ pillar from adjacent MTJ pillars; and

planarizing the substrate wafer,
wherein the step of etching the hard mask and the plurality of MTJ layers includes at least one reactive ion etching and at
least one ion beam etching, wherein the at least one ion beam etching ends with an ion beam etch at a high ion beam angle.

US Pat. No. 10,199,083

THREE-TERMINAL MRAM WITH AC WRITE-ASSIST FOR LOW READ DISTURB

Spin Transfer Technologie...

1. A magnetic device comprising:a reference magnetic layer in a first plane, the reference magnetic layer having a magnetization vector that is perpendicular to the first plane and having a fixed magnetization direction;
a non-magnetic tunnel barrier layer in a second plane and disposed over the reference magnetic layer;
a free magnetic layer in a third plane and disposed over the non-magnetic tunnel barrier layer, the free magnetic layer having a magnetization vector that is perpendicular to the third plane and having a magnetization direction that can switch from a first magnetization direction to a second magnetization direction and from the second magnetization direction to the first magnetization direction, with a switching process that involves precessions at a precession radius around an axis perpendicular to the third plane, the magnetization vector of the free magnetic layer having a predetermined precession frequency, the reference magnetic layer, the non-magnetic tunnel barrier layer and the free magnetic layer forming a magnetic tunnel junction;
a non-magnetic spacer in a fourth plane and disposed over the free magnetic layer;
an in-plane polarization magnetic layer in a fifth plane disposed over the non-magnetic spacer, the in-plane polarization magnetic layer having a magnetization vector that is parallel to the fifth plane;
a non-magnetic insulator adjacent to the non-magnetic spacer and the in-plane polarization magnetic layer;
a metallic terminal coupled to the magnetic tunnel junction and adjacent to the non-magnetic insulator, the metallic terminal separated from the non-magnetic spacer and the in-plane polarization magnetic layer by the non-magnetic insulator;
a first current source that directs a read current through the metallic terminal and the magnetic tunnel junction, wherein the read current measures the resistance across the magnetic tunnel junction; and
a second current source that directs a programming current pulse through the magnetic tunnel junction, the non-magnetic spacer, and the in-plane polarization magnetic layer, the programming current pulse comprising a direct current pulse and an alternating perturbation pulse, the alternating perturbation pulse alternating between a maximum current value and a minimum current value at a first frequency;
wherein application of the programming current pulse to the magnetic device produces a spin-polarized current having spin-polarized electrons, the spin-polarized current alternating between a maximum spin-current value and a minimum spin-current value at the first frequency, the spin-polarized electrons exerting a spin transfer torque on the magnetization vector of the free magnetic layer, the spin transfer torque alternating between a maximum magnitude and a minimum magnitude at the first frequency;
wherein the first frequency is synchronized with the predetermined precession frequency of the free magnetic layer, thereby causing the spin transfer torque to be at the maximum magnitude when the spin transfer torque increases the precession radius of the magnetization vector of the free magnetic layer, and at the minimum magnitude when the spin transfer torque decreases the precession radius of the magnetization vector of the free magnetic layer, thereby improving the switching process of the free magnetic layer from the first magnetization direction to the second magnetization direction and from the second magnetization direction to the first magnetization direction.

US Pat. No. 9,728,712

SPIN TRANSFER TORQUE STRUCTURE FOR MRAM DEVICES HAVING A SPIN CURRENT INJECTION CAPPING LAYER

SPIN TRANSFER TECHNOLOGIE...

1. A magnetic device, comprising:
a magnetic tunnel junction having a magnetic reference layer and a magnetic free layer, the magnetic reference layer and the
magnetic free layer separated by a non-magnetic tunneling barrier layer, the magnetic reference layer having a magnetic vector
having a fixed magnetic direction, the magnetic free layer having a magnetic vector with a variable magnetic direction;

a magnetic polarizer layer having magnetic vector with a direction that is perpendicular to the magnetic direction of the
magnetic reference layer and the magnetic free layer, wherein the magnetic polarizer aligns polarity of electrons of electric
current passing therethrough in the magnetic direction of the magnetic polarizer, thereby creating a spin current; and

a spin current injection capping layer disposed between the magnetic tunnel junction and the magnetic polarizer, the spin
current injection capping layer comprising a non-magnetic insulator on the magnetic free layer and a magnetic conductor on
the non-magnetic insulator, the spin current injection capping layer injecting spin polarized current into the magnetic tunnel
junction through tunneling.

US Pat. No. 10,192,788

METHODS OF FABRICATING DUAL THRESHOLD VOLTAGE DEVICES WITH STACKED GATES

SPIN TRANSFER TECHNOLOGIE...

1. A method of fabricating a cylindrical device with aligned input terminals, comprising:providing a conductive core corresponding to a first transistor, and forming a plurality of cylindrical layers around the conductive core, including a first dielectric layer, a second layer, a third dielectric layer, and a fourth conductive layer corresponding to a second transistor;
forming a first input terminal coupled with the first transistor; and
forming a second input terminal coupled with the second transistor, wherein:
the first input terminal and the second input terminal extend radially outward from the cylindrical device, and
the first input terminal is vertically aligned with the second input terminal.

US Pat. No. 10,026,892

PRECESSIONAL SPIN CURRENT STRUCTURE FOR MRAM

SPIN TRANSFER TECHNOLOGIE...

1. A magnetic device, comprising:a precessional spin current magnetic layer in a first plane, the precessional spin current magnetic layer having a magnetization vector with a magnetization component in the first plane which freely rotates in any magnetic direction:
a non-magnetic spacer layer in a second plane and disposed over the precessional spin current magnetic layer;
a free magnetic layer in a third plane and disposed over the non-magnetic spacer layer, the free magnetic layer having a magnetization vector that is perpendicular to the third plane and having a magnetization direction that precesses from a first magnetization direction to a second magnetization direction when a spin-polarized current passes there through, wherein the precessional spin current magnetic layer is electronically coupled to the free magnetic layer;
a non-magnetic tunnel barrier layer in a fourth plane and disposed over the free magnetic layer;
a synthetic antiferromagnetic structure in a fifth plane, the synthetic antiferromagnetic structure including a magnetic reference layer, the magnetic reference layer having a magnetization vector that is perpendicular to the fifth plane and having a fixed magnetization direction, the magnetic reference layer, the non-magnetic tunnel barrier and the free magnetic layer forming a magnetic tunnel junction; and
wherein the magnetization vector with the magnetization component in the first plane of the precessional spin current magnetic layer follows precession of the magnetization direction of the free magnetic layer, rotation of the magnetization component in the first plane of the precessional spin current magnetic layer causing spin polarization of electrons of electrical current passing there through to change in a manner corresponding to the magnetic vector of the precessional spin current magnetic layer, thereby creating the spin-polarized current, the spin-polarized current thereby causing spin transfer torque to assist switching of the magnetization vector of the free magnetic layer, the free magnetic layer storing a memory value.

US Pat. No. 9,853,206

PRECESSIONAL SPIN CURRENT STRUCTURE FOR MRAM

SPIN TRANSFER TECHNOLOGIE...

1. A magnetic device, comprising
a synthetic antiferromagnetic structure in a first plane, the synthetic antiferromagnetic structure including a magnetic reference
layer, the magnetic reference layer having a magnetization vector that is perpendicular to the first plane and having a fixed
magnetization direction;

a non-magnetic tunnel barrier layer in a second plane and disposed over the magnetic reference layer;
a free magnetic layer in a third plane and disposed over the non-magnetic tunnel barrier layer, the free magnetic layer having
a magnetization vector that is perpendicular to the third plane and having a magnetization direction that precesses from a
first magnetization direction to a second magnetization direction when a spin-polarized current passes there through, the
magnetic reference layer, the non-magnetic tunnel barrier layer and the free magnetic layer forming a magnetic tunnel junction;

a non-magnetic spacer in a fourth plane and disposed over the free magnetic layer;
a precessional spin current magnetic layer in a fifth plane that is physically separated from the free magnetic layer and
electronically coupled to the free magnetic layer by the non-magnetic spacer, the precessional spin current magnetic layer
having a magnetization vector with a magnetization component in the fifth plane which freely rotates in any magnetic direction
in the fifth plane, and

wherein the magnetization vector with the magnetization component in the fifth plane of the precessional spin current magnetic
layer follows precession of the magnetization direction of the free magnetic layer, rotation of the magnetization component
in the fifth plane of the precessional spin current magnetic layer causing spin polarization of electrons of electrical current
passing there through to change in a manner corresponding to the magnetic vector of the precessional spin current magnetic
layer, thereby creating the spin-polarized current, the spin-polarized current thereby causing spin transfer torque to assist
switching of the magnetization vector of the free magnetic layer, the free magnetic layer storing a memory value.

US Pat. No. 9,773,974

POLISHING STOP LAYER(S) FOR PROCESSING ARRAYS OF SEMICONDUCTOR ELEMENTS

SPIN TRANSFER TECHNOLOGIE...

1. A method manufacturing a semiconductor device comprising:
fabricating a plurality of magnetic tunnel junction (MTJ) pillars on a wafer, each of the plurality of MTJ pillars having
a top surface and a side surface, the top surface extending at an MTJ pillar height from the wafer;

depositing a first layer on the semiconductor wafer, the first layer being comprised of a high chemical-mechanical polish
(CMP) rate material, such that the first layer covers the top surface and side surface of each of the plurality of MTJ pillars,
the first layer forming a first layer bump portion over the top surface of each of the plurality of MTJ pillars and a first
layer side surface portion over the side surface of each of the plurality of MTJ pillars and a plurality of first layer valley
portions in between the plurality of MTJ pillars;

depositing a second layer over the first layer, the second layer being comprised of a low CMP rate material, such that a second
layer bump portion covers the first layer bump portion, a second layer side portion covers the first layer side portion, and
a plurality of second layer valley portions cover the plurality of first layer valley portions, thereby forming a plurality
of MTJ pillar bumps, each of the plurality of MTJ pillar bumps corresponding to the top surface of each of the plurality of
MTJ pillars, the second layer having a thickness selected such that a top surface of the plurality of second layer valley
portions are at a CMP stop height, the low CMP rate material having a lower polish rate than the polish rate of the high CMP
rate material;

chemical-mechanical polishing the plurality of MTJ pillar bumps with a chemical-mechanical polisher;
detecting that the chemical-mechanical polisher has reached the top surface of second layer valley portions; and
stopping the chemical-mechanical polishing step when the polisher has reached the top surface of the plurality of second layer
valley portions such that the side surface of each of the plurality of MTJ pillars remains covered by the first layer and
the second layer.

US Pat. No. 10,192,984

DUAL THRESHOLD VOLTAGE DEVICES WITH STACKED GATES

SPIN TRANSFER TECHNOLOGIE...

1. An annular device, comprising:a core composed of conductive material; and
a plurality of layers surrounding a sidewall of the core in succession, the plurality of layers comprising:
a first layer composed of dielectric material and surrounding a sidewall portion of the core,
a second layer composed of semiconductor material and surrounding a sidewall portion of the first layer,
a third layer composed of dielectric material and surrounding a sidewall portion of the second layer, and
a fourth layer composed of conductive material and surrounding a sidewall portion of the third layer;
wherein:
the core, the first layer, and the second layer correspond to a first transistor including a first input terminal; and
the second layer, the third layer, and the fourth layer correspond to a second transistor including a second input terminal;
the second layer is a common channel;
the first input terminal is coupled to the core, the first input terminal being configured to receive a first voltage for the first transistor;
the second input terminal is coupled to the fourth layer, the second input terminal being configured to receive a second voltage for the second transistor; and
the first input terminal and the second input terminal extend radially outward from the annular device, and wherein the first input terminal is aligned with the second input terminal.

US Pat. No. 10,186,551

BURIED TAP FOR A VERTICAL TRANSISTOR USED WITH A PERPENDICULAR MAGNETIC TUNNEL JUNCTION (PMTJ)

Spin Transfer Technologie...

1. A method, comprising:forming a first masking material above a substrate in a film thickness direction, wherein the substrate comprises crystalline silicon (Si);
removing portions of the first masking material according to a first pattern to form a first mask that comprises a plurality of dots of the first masking material;
removing first portions of the substrate using the first mask to form a plurality of pillars that comprise material of the substrate;
removing second portions of the substrate to form a plurality of strap regions, the strap regions being formed of substrate material and positioned below sets of pillars aligned in a first direction along a plane perpendicular to the film thickness direction, wherein the strap regions extend above a surface of the substrate in the film thickness direction;
forming a spacer layer on sides of the first mask, the pillars, and the strap regions, wherein the spacer layer is not positioned above the strap regions;
forming a second masking material above the strap regions in the film thickness direction and above third portions of the substrate in the film thickness direction to form a second mask, the third portions of the substrate being positioned between the sets of pillars;
removing fourth portions of the substrate using the second mask to create voids beneath each of the sets of pillars;
forming an electrode material within the voids above the substrate and below the strap regions in the film thickness direction;
removing portions of the electrode material between the sets of pillars using the spacer layer as a mask to form electrodes that are positioned beneath the strap regions;
forming a silicide junction between each of the strap regions and a corresponding electrode positioned therebelow;
forming a first insulative layer above the substrate to a height that coincides with a thickness of the strap regions in the film thickness direction;
forming a gate dielectric layer above the first insulative layer and on sides of the pillars to a height greater than a lower edge of the first mask in the film thickness direction;
forming a gate layer on the gate dielectric layer; and
removing portions of the gate layer in a second direction along the plane and perpendicular to the first direction to form gate electrodes that transverse a plurality of sets of pillars;
wherein removing the fourth portions of the substrate using the second mask comprises:
isotropic etching and/or vapor etching silicon (Si) material from the substrate positioned directly beneath the strap regions in the film thickness direction, wherein a lower surface of the strap regions is not in contact with any structures except for portions at two ends of each of the sets of pillars after removing the fourth portions of the substrate, the two ends being opposite each other in the first direction.

US Pat. No. 10,141,499

PERPENDICULAR MAGNETIC TUNNEL JUNCTION DEVICE WITH OFFSET PRECESSIONAL SPIN CURRENT LAYER

Spin Transfer Technologie...

1. A magnetic device, comprising:a first synthetic antiferromagnetic structure in a first plane having a magnetization vector that is perpendicular to the first plane and having a fixed magnetization direction;
an antiferromagnetic coupling layer in a second plane and disposed above the first synthetic antiferromagnetic structure;
a second synthetic antiferromagnetic structure in a third plane and disposed over the antiferromagnetic coupling layer;
a magnetic reference layer in a fourth plane and disposed over the second synthetic antiferromagnetic structure, the magnetic reference layer having a magnetization vector that is perpendicular to the fourth plane and having a fixed magnetization direction;
a non-magnetic tunnel barrier layer in a fifth plane and disposed over the magnetic reference layer;
a free magnetic layer having a first diameter and disposed in a sixth plane over the non-magnetic tunnel barrier layer, the free magnetic layer having a magnetization vector that is perpendicular to the sixth plane and having a magnetization direction that can switch between a first magnetization direction to a second magnetization direction, the magnetic reference layer, the non-magnetic tunnel barrier layer and the free magnetic layer forming a magnetic tunnel junction; and
a precessional spin current magnetic layer having a second diameter that is less than the first diameter and a center that is offset relative to a center of the free magnetic layer, the precessional spin current magnetic layer disposed in a seventh plane that is physically separated from the free magnetic layer and coupled to the free magnetic layer by a filter coupling layer that may induce ferromagnetic or antiferromagnetic coupling between the free magnetic layer and the filter layer.

US Pat. No. 10,115,446

SPIN TRANSFER TORQUE MRAM DEVICE WITH ERROR BUFFER

SPIN TRANSFER TECHNOLOGIE...

1. A random access memory (RAM) device, comprisinga memory array comprised of an array of MRAM storage elements arranged as a plurality of data words, wherein each of the plurality of data words comprises an address;
address and data lines, coupled to the memory array, wherein the data lines carry a data word to be written into the memory array and the address lines carry a corresponding address;
a write buffer, coupled to the address and data lines, wherein the write buffer comprises a number of storage elements, and wherein the write buffer stores the data word and the corresponding address carried on the address and data lines during a write cycle;
an error buffer, coupled to the write buffer, wherein the error buffer comprises a plurality of entries, wherein each of the error buffer entries comprises a plurality of storage elements and an associated buffer memory address; and
a memory control logic that operates during a read cycle and the write cycle, wherein the memory control logic, during the write cycle, is operable to determine whether the data word was written into the memory array within a predefined error budget, and wherein the memory control logic writes the data word and the corresponding address from the write buffer into a selected one of the plurality of entries of the error buffer if the data word was not written into the memory array within the predefined error budget, and wherein the memory control logic, during a read cycle, is further operable to determine whether an address to be read is stored in the write buffer, the error buffer or the memory array.

US Pat. No. 10,186,308

MAGNETIC RANDOM ACCESS MEMORY HAVING IMPROVED RELIABILITY THROUGH THERMAL CLADDING

Spin Transfer Technologie...

1. A magnetic random access memory apparatus, comprising:a magnetic memory element pillar having first and second ends and an outer side extending between the first and second ends;
first and second electrically conductive leads arranged such that the magnetic memory element pillar is between the first and second electrically conductive leads and each of the ends of the magnetic memory element pillar is electrically connected with one of the first and second electrically conductive leads; and
a cladding material contacting the outer side of the magnetic element pillar, the cladding material being constructed of a material that is both dielectric and has a high thermal conductivity.

US Pat. No. 10,192,787

METHODS OF FABRICATING CONTACTS FOR CYLINDRICAL DEVICES

SPIN TRANSFER TECHNOLOGIE...

1. A method of forming a contact, comprising:at an annular device composed of a core and a plurality of layers that surround the core in succession, the plurality of layers including a first layer and a second layer, wherein the core and the second layer are separated by the first layer:
depositing a coating on a surface of the annular device, the surface including the core and the plurality of layers;
determining relative heights of the core, the first layer, and the second layer;
in accordance with a determination that the second layer has the largest relative height:
performing a first removal of the coating to expose the second layer;
depositing a first metal on the second layer;
performing a second removal of the coating to expose the core; and
depositing a second metal on the core;
in accordance with a determination that the core has the largest relative height:
etching a portion of the coating to expose the core; and
forming a first terminal by depositing a conductive material, wherein the conductive material contacts the exposed core and the first input terminal extends radially outward from the annular device.

US Pat. No. 10,211,395

METHOD FOR COMBINING NVM CLASS AND SRAM CLASS MRAM ELEMENTS ON THE SAME CHIP

Spin Transfer Technologie...

1. A method for forming a data memory chip, comprising: providing a substrate: depositing a first magnetic memory element type material; forming a mask over the first magnetic memory element type material the mask defining a first magnetic element type area; performing a material removal process to remove portions of the first magnetic element type material that are not protected by the mask; depositing a second magnetic element type material; and removing the mask, after removing the mask: depositing a hard mask; performing an annealing; forming a magnetic element defining mask configured to define magnetic elements in the first magnetic element type area and also in a second magnetic element type area; and performing a second material removal process to remove portions of the first magnetic element type material and the second magnetic element type material that are not protected by the magnetic element defining mask.

US Pat. No. 10,192,789

METHODS OF FABRICATING DUAL THRESHOLD VOLTAGE DEVICES

SPIN TRANSFER TECHNOLOGIE...

1. A method of fabricating a cylindrical device, comprising:providing a cylindrical device having two transistors sharing a common silicide source; and
creating the silicide source, including:
depositing multiple layers in succession on an oxidized silicon substrate, the multiple layers including at least an oxide layer and a planarization layer;
removing, at least partially, the oxide layer and the planarization layer until the silicon substrate is exposed;
removing, at least partially, the oxide layer to expose a horizontal cross section of the cylindrical device to create an annular silicon substrate area; and
after the removing, depositing a siliciding metal on the annular area to form the silicide source.

US Pat. No. 10,192,602

SMART CACHE DESIGN TO PREVENT OVERFLOW FOR A MEMORY DEVICE WITH A DYNAMIC REDUNDANCY REGISTER

SPIN TRANSFER TECHNOLOGIE...

1. A memory device for storing data, the memory device comprising:a memory bank comprising a plurality of addressable memory cells configured in a plurality of segments wherein each segment contains N rows per segment, wherein the memory bank comprises a total of B entries, and wherein said memory cells are characterized by having a prescribed word error rate, E;
a pipeline comprising M pipestages and configured to process write operations of a first plurality of data words addressed to a given segment of said memory bank; and
a cache memory comprising Y number of entries, said cache memory associated with said given segment of said memory bank wherein said cache memory is operable for storing a second plurality of data words and associated memory addresses, and wherein further each data word of said second plurality of data words is either awaiting write verification associated with said given segment of said memory bank or is to be re-written into said given segment of said memory bank, and wherein said Y number of entries is based on said M, said N and said prescribed word error rate, E, to prevent overflow of said cache memory.

US Pat. No. 10,163,479

METHOD AND APPARATUS FOR BIPOLAR MEMORY WRITE-VERIFY

SPIN TRANSFER TECHNOLOGIE...

1. A method for writing data to a memory device, said method comprising:writing a bit of data into a memory cell, wherein said memory cell comprises a bit line and a source line, said writing comprising:
applying a first differential voltage bias across said bit and source lines provided said data bit is a first logic value; and
applying a second differential voltage bias across said bit and source lines provided said data bit is a second logic value, wherein said second differential voltage bias is opposite in polarity to said first differential voltage bias; and
verifying said bit of said memory cell by applying either said first or second differential voltage bias across said bit and source lines depending on the logic value of said bit.

US Pat. No. 10,147,872

SPIN TRANSFER TORQUE STRUCTURE FOR MRAM DEVICES HAVING A SPIN CURRENT INJECTION CAPPING LAYER

Spin Transfer Technologie...

1. A magnetic device, comprisinga synthetic antiferromagnetic structure in a first plane, the synthetic antiferromagnetic structure including a magnetic reference layer, the magnetic reference layer having a magnetization vector,
a non-magnetic tunnel barrier layer in a second plane and disposed over the magnetic reference layer;
a free magnetic layer in a third plane disposed over the non-magnetic tunnel barrier layer, the free magnetic layer having a magnetization vector and having a magnetization direction that can precess from a first magnetization direction to a second magnetization direction, the free magnetic layer, the non-magnetic tunnel barrier layer and the magnetic reference layer forming a magnetic tunnel junction;
a spin current injection capping layer in a fourth plane, the spin current injection capping layer disposed over the free magnetic layer, the spin current injection capping layer comprising a non-magnetic insulator layer over the free magnetic layer and a magnetic conductor layer over the non-magnetic insulator layer; and
a magnetic polarizer layer that polarizes electrons passing therethrough to create spin polarized current, the magnetic polarizer layer having at least one magnetic vector, the at least one magnetic vector being orthogonal to the magnetization vector of the magnetic reference layer and the magnetization vector of the free magnetic layer;
wherein the spin current injection capping layer is between the magnetic polarizer layer and the free magnetic layer and wherein the spin current injection capping layer injects the spin polarized current into the magnetic tunnel junction through tunneling between the magnetic conductor layer and the free magnetic layer.

US Pat. No. 10,192,601

MEMORY INSTRUCTION PIPELINE WITH AN ADDITIONAL WRITE STAGE IN A MEMORY DEVICE THAT USES DYNAMIC REDUNDANCY REGISTERS

SPIN TRANSFER TECHNOLOGIE...

1. A memory pipeline for performing a write operation in a memory device, the memory pipeline comprising:an input register operable to receive a first data word and an associated address to be written into a memory bank;
a first write register of a first pipe-stage coupled to the input register and operable to receive the first data word and the associated address from the input register in a first clock cycle, wherein the first write register is further operable to perform a first attempt at writing said data word into the memory bank at a location corresponding to the associated address; and
a second write register of a second pipe-stage coupled to the first write register and operable to receive the first data word and the associated address from the first write register in a second clock cycle, wherein the second write register is further operable to perform a second attempt at writing the first data word into the memory bank at the location corresponding to the associated address, and further wherein a second data word is input into the first write register in the second clock cycle subsequent to writing the first data word into the second write register from the first write register, wherein the second pipe-stage follows the first pipe-stage.

US Pat. No. 10,381,553

MEMORY CELL HAVING MAGNETIC TUNNEL JUNCTION AND THERMAL STABILITY ENHANCEMENT LAYER

Spin Transfer Technologie...

1. A magnetic device, comprisinga bottom electrode in a first plane;
a perpendicular synthetic antiferromagnetic structure, the perpendicular synthetic antiferromagnetic structure including a magnetic reference layer in a second plane, the magnetic reference layer having a magnetization direction that is perpendicular to the second plane and having a fixed magnetization direction;
a non-magnetic tunnel barrier layer in a third plane and disposed over the magnetic reference layer;
a free magnetic layer in a fourth plane and disposed over the non-magnetic tunnel barrier layer, the free magnetic layer having a magnetization vector that is perpendicular to the fourth plane and having a magnetization direction that can switch from a first magnetization direction to a second magnetization direction, the magnetic reference layer, the non-magnetic tunnel barrier layer and the free magnetic layer forming a magnetic tunnel junction;
a non-magnetic thermal stability enhancement coupling layer in a fifth plane and disposed over the free magnetic layer, the non-magnetic thermal stability enhancement coupling layer being comprised of an insulator material;
a magnetic thermal stability enhancement layer in a sixth plane that is physically separated from the free magnetic layer of the magnetic tunnel junction and coupled to the free magnetic layer by the non-magnetic thermal stability enhancement coupling layer, the magnetic thermal stability enhancement layer having a magnetization direction that is perpendicular to the sixth plane and having a magnetization direction that can switch from the first magnetization direction to the second magnetization direction, wherein switching of the magnetic thermal stability enhancement layer from the first magnetization direction to the second magnetization direction tracks switching in the magnetic free layer; and
a cap layer in a seventh plane and disposed over the thermal stability enhancement layer.