US Pat. No. 9,230,825

METHOD OF TUNGSTEN ETCHING

Lam Research Corporation,...

1. A method for etching a tungsten containing layer in an etch chamber, comprising:
placing a substrate with a tungsten containing layer in the etch chamber;
provide a plurality of cycles, wherein each cycle comprises:
a passivation phase for forming a passivation layer of silicon oxide on sidewalls and bottoms of features in the tungsten
containing layer; and

an etch phase for etching features in the tungsten containing layer.

US Pat. No. 9,107,284

CHAMBER MATCHING USING VOLTAGE CONTROL MODE

Lam Research Corporation,...

1. A method for compensating for harmonics produced during plasma processing in a plasma chamber, the method comprising:
retrieving a measurement of a combined waveform, the combined waveform including a fundamental waveform and a harmonic waveform,
the combined waveform defining a voltage proximate to a surface of a chuck, the chuck coupled to a radio frequency (RF) transmission
line, the RF transmission line coupled to an impedance matching circuit, the impedance matching circuit coupled to an RF generator;

extracting the fundamental waveform from the combined waveform;
determining a difference between a magnitude of the combined waveform and a magnitude of the fundamental waveform; and
controlling the RF generator to compensate for the difference,
wherein the method is executed by one or more processors.

US Pat. No. 9,466,466

DETERMINATION OF SEMICONDUCTOR CHAMBER OPERATING PARAMETERS FOR THE OPTIMIZATION OF CRITICAL DIMENSION UNIFORMITY

Lam Research Corporation,...

1. A method comprising:
identifying an operation of a recipe for processing a substrate within a chamber, the operation being configured to provide
a pulsed radio frequency (RF) to the chamber;

performing a plurality of tests in the chamber for the operation utilizing the pulsed RF, each test having a duty cycle for
the pulsed RF selected from a plurality of RF duty cycles;

for each test, measuring a critical dimension (CD) value and a critical dimension uniformity (CDU) value for features in the
substrate;

identifying a first range of duty cycles that corresponds to a range of CD values that includes a minimum CD value from the
measured CD values in the plurality of tests;

identifying a second range of duty cycles that corresponds to a range of CDU values that includes a minimum CDU value from
the measured CDU values in the plurality of tests;

selecting a first duty cycle from an overlap of the first range of duty cycles and the second range of duty cycles; and
setting the selected first duty cycle in the operation of the recipe for processing the substrate.

US Pat. No. 9,190,489

SACRIFICIAL PRE-METAL DIELECTRIC FOR SELF-ALIGNED CONTACT SCHEME

Lam Research Corporation,...

1. A method of forming gates and contact cavities, the method comprising:
(a) forming a plurality of dummy gate structures on a substrate, each dummy gate structure comprising (i) a capping layer,
(ii) a layer comprising silicon positioned under the capping layer, and (iii) a spacer layer in contact with vertical sidewalls
of the capping layer and the layer comprising silicon;

(b) depositing a primary contact etch stop layer over the dummy gate structures and over an active region on the substrate;
(c) depositing a sacrificial pre-metal dielectric material in a plurality of gaps positioned between adjacent dummy gate structures;
(d) removing the capping layer and the layer comprising silicon from the dummy gate structures;
(e) depositing a plurality of replacement metal gates comprising a metal structure and a cap layer positioned over the metal
structure, wherein the replacement metal gates are deposited in spaces previously occupied by the capping layer and the layer
comprising silicon of the dummy gate structures;

(f) removing the sacrificial pre-metal dielectric material;
(g) depositing an auxiliary contact etch stop layer, wherein the auxiliary contact etch stop layer is in physical contact
with the primary contact etch stop layer, the spacer layer, and the cap layer of the replacement metal gate;

(h) depositing replacement dielectric material over the auxiliary contact etch stop layer, wherein the replacement dielectric
material is deposited in gaps between adjacent replacement metal gates and over the replacement metal gates; and

(i) etching through the replacement dielectric material, the auxiliary contact etch stop layer, and the primary contact etch
stop layer to expose the active region below the primary contact etch stop layer and between the adjacent replacement metal
gates, thereby forming the contact cavities.

US Pat. No. 9,252,238

SEMICONDUCTOR STRUCTURES WITH COPLANAR RECESSED GATE LAYERS AND FABRICATION METHODS

LAM RESEARCH CORPORATION,...

1. A method comprising:
fabricating a semiconductor structure, the fabricating comprising:
providing a gate structure over a semiconductor substrate, the gate structure comprising multiple conformal gate layers and
a gate material disposed within the multiple conformal gate layers;

recessing a portion of the multiple conformal gate layers below an upper surface of the gate structure, wherein upper surfaces
of the recessed, multiple conformal gate layers are coplanar; and

removing a portion of the gate material to facilitate an upper surface of a remaining portion of the gate material to be coplanar
with an upper surface of the recessed, multiple conformal gate layers.

US Pat. No. 9,175,808

SYSTEM AND METHOD FOR DECREASING SCRUBBER EXHAUST FROM GAS DELIVERY PANELS

Lam Research Corporation,...

1. A gas panel for use with a gas source, a compressed air source and a chamber, the gas source being operable to provide
a flow of gas, the compressed air source being operable to provide a flow of compressed air, said gas panel comprising:
a first gas supply line arranged to receive gas from the gas source;
a compressed air supply line arranged to receive compressed air from the compressed air source;
a mass flow controller operable to receive the gas via said first gas supply line and to provide a controllable output flow
of the gas;

a valve operable to be in a first state and a second state, to pass a first amount of the flow of the gas into the chamber
when in the first state and to pass a second amount of the flow of the gas into the chamber when in the second state;

an exhaust portion operable to remove a portion of the flow of the gas when not passed into the chamber when said valve is
in the first state, wherein the portion of the flow of gas is not passed into the chamber when a broken line is present between
the mass flow controller and the valve;

a nozzle positioned between the mass flow controller and the valve and operable to receive the compressed air via said compressed
air supply line;

a housing;
a gas detector operable to detect a presence of the gas within said housing when the gas is present in said housing; and
a compressed air controller operable to control an amount of compressed air provided by said nozzle based on an amount of
gas detected by said gas detector;

wherein said first gas supply line, said compressed air supply line, said mass flow controller, said valve and said nozzle
are disposed within said housing, and

wherein said nozzle is operable to provide an output flow of the compressed air within said housing to provide a flow of the
portion of the flow of the gas that is not passed into the chamber when said valve is in the first state.

US Pat. No. 9,059,678

TCCT MATCH CIRCUIT FOR PLASMA ETCH CHAMBERS

Lam Research Corporation,...

1. A match circuit coupled between an RF source and a plasma chamber, the match circuit comprising:
a power input circuit, the power input circuit coupled to an RF source;
an inner coil input circuit coupled between the power input circuit and an input terminal of an inner coil, the inner coil
input circuit including an inductor and a first variable capacitor coupled in series to the inductor, the inductor connecting
to the power input circuit, and the capacitor connecting to the input terminal of the inner coil, a first node being defined
between the power input circuit and the inner coil input circuit, wherein the inductor has a value of 0.3 uH to 0.5 uH;

an inner coil output circuit coupled between an output terminal of the inner coil and ground, the inner coil output circuit
defining a direct pass-through connection that does not include an inductor or capacitor and is a direct connection to ground;

an outer coil input circuit coupled between the first node and an input terminal of an outer coil, the outer coil input circuit
having a second variable capacitor, the outer coil input circuit further coupled to the power input circuit via the first
node;

an outer coil output circuit coupled between an output terminal of the outer coil and ground, wherein the outer coil output
circuit includes a third capacitor having a value of about 80 pF to about 120 pF;

wherein the first node splits power from the power input circuit for distribution to the inner coil input circuit and the
outer coil input circuit, the first and second variable capacitors providing for tuning of a ratio of currents between the
inner coil and the outer coil.

US Pat. No. 9,153,482

METHODS AND APPARATUS FOR SELECTIVE DEPOSITION OF COBALT IN SEMICONDUCTOR PROCESSING

Lam Research Corporation,...

1. A method for forming a semiconductor device structure, the method comprising:
(a) providing a semiconductor substrate having a surface comprising
(i) an exposed layer of copper or copper alloy and
(ii) an exposed layer of dielectric;
(b) treating the substrate surface with a process gas comprising H2, while irradiating the substrate with ultraviolet (UV) radiation in an absence of plasma; and

(c) selectively depositing cobalt metal on the layer of copper or copper alloy, while not depositing cobalt on the layer of
dielectric by contacting the treated substrate with an organometallic cobalt compound comprising a substituted allyl ligand,
and with a reducing agent in an absence of plasma, wherein the organometallic cobalt compound comprising a substituted allyl
ligand is:


where R1 is C1-C8-alkyl, R2 is C1-C8 alkyl, x is zero, 1 or 2; and y is 1.

US Pat. No. 9,190,306

DUAL ARM VACUUM ROBOT

LAM RESEARCH CORPORATION,...

1. A dual arm robot for a substrate processing system, comprising:
a base;
a first arm having extended and retracted positions and including:
a first arm portion having one end rotatably connected to the base;
a second arm portion having one end rotatably connected to another end of the first arm portion; and
an end effector having one end rotatably connected to another end of the second arm portion and another end configured to
support a first substrate; and

a second arm having extended and retracted positions including:
a first arm portion having one end rotatably connected to the base;
a second arm portion having one end rotatably connected to another end of the first arm portion; and
an end effector having one end rotatably connected to another end of the second arm portion and another end configured to
support a second substrate,

wherein when the first and second arms are arranged in the retracted position:
a connection between the second arm portion of the first arm and the end effector of the first arm is located directly above
the second substrate;

a connection between the second arm portion of the second arm and the end effector of the second arm is located directly under
the first substrate; and

the first substrate is not located over the second substrate.

US Pat. No. 9,184,029

SYSTEM, METHOD AND APPARATUS FOR COORDINATING PRESSURE PULSES AND RF MODULATION IN A SMALL VOLUME CONFINED PROCESS REACTOR

Lam Research Corporation,...

1. A method of modulating a pressure in-situ in a plasma processing volume of a chamber, the plasma processing volume defined
between a surface of a top electrode, a supporting surface of a substrate support and an outer region defined by a plasma
confinement structure, the plasma confinement structure including at least one outlet port, the method comprising:
injecting at least one processing gas into the plasma processing volume;
providing RF power from at least one RF source coupled to the plasma processing volume;
forming a plasma within the plasma processing volume using the RF power and the at least one processing gas; and
modulating a pressure of the plasma processing volume;
modulating the RF power provided by the at least one RF source, the modulating of the pressure and the RF power being synchronized
to each other during a period of time when the plasma is formed in the plasma processing volume, wherein the modulating of
the pressure and the RF power being synchronized to each other defines a pulsed state of the RF power and a pulsed state of
the pressure, the modulating of the pressure being controlled by at least one of,

a first outlet flow of said processing gas out of the plasma processing volume from the at least one outlet port defined by
the plasma confinement structure, the first outlet flow being through a restricted flow path out of the at least one outlet
port, or

a second outlet flow of said processing gas out of the plasma processing volume from the at least one outlet port defined
by the plasma confinement structure, the second outlet flow being greater than the first outlet flow, wherein the second outlet
flow being through a less restricted flow path out of the at least one outlet port than the first outlet flow.

US Pat. No. 9,174,296

PLASMA IGNITION AND SUSTAINING METHODS AND APPARATUSES

Lam Research Corporation,...

1. An apparatus for generating plasma, comprising: a vessel within which said plasma is generated; and a coil configured to
receive an RF driver signal to at least sustain said plasma, said coil having a coil length; a first spine and a plurality
of fingers extending from said first spine and circumferentially spaced apart from each other, each of said plurality of fingers
are oriented along a longitudinal axis of said vessel and said plurality of fingers of said first spine and said first spine
partially enclose a periphery of said vessel, said plurality of fingers of said first spine being electrically coupled to
a first end of said coil; and a second spine and a plurality of fingers extending from said second spine and circumferentially
spaced apart from each other, each of said plurality of fingers are oriented along said longitudinal axis of said vessel and
said plurality of fingers of said second spine and said second spine partially enclose said periphery of said vessel, said
plurality of fingers of said second spine being electrically coupled to a second end of said coil, wherein tips of said plurality
of fingers of said first spine and second spine are oriented directionally in a direction to face each other and are axially
separated along the longitudinal axis by a distance that is less than said coil length; wherein the first spine, the second
spine and the coil are located exterior to said vessel.

US Pat. No. 9,184,030

EDGE EXCLUSION CONTROL WITH ADJUSTABLE PLASMA EXCLUSION ZONE RING

Lam Research Corporation,...

1. A plasma processing chamber for bevel edge cleaning, the chamber comprising:
an upper electrode;
a lower electrode positioned below the upper electrode;
an upper plasma exclusion zone (PEZ) ring peripheral to the upper electrode, the PEZ ring being settable to multiple positions
toward or away from the lower electrode without vertical adjustment of the upper electrode;

an upper electrode extension peripheral to the upper PEZ ring; and
a lower electrode extension surrounding the lower electrode.

US Pat. No. 9,153,421

PASSIVE CAPACITIVELY-COUPLED ELECTROSTATIC (CCE) PROBE METHOD FOR DETECTING PLASMA INSTABILITIES IN A PLASMA PROCESSING CHAMBER

LAM RESEARCH CORPORATION,...

1. A method for detecting plasma instability within a processing chamber of a plasma processing system during substrate processing,
comprising:
collecting a set of process data including a set of induced current signals, wherein the set of induced current signals corresponds
to current induced to flow through a measuring capacitor by plasma within the processing chamber, and wherein a first plate
of the measuring capacitor is connected to a plasma-facing sensor and the induced current signals are measured at a second
plate of the measuring capacitor;

converting said set of induced current signals into a set of analog voltage signals;
converting said set of analog voltage signals into a set of digital signals; and
analyzing said set of digital signals to detect high frequency perturbations, said high frequency perturbations indicating
said plasma instability.

US Pat. No. 9,530,658

CONTINUOUS PLASMA ETCH PROCESS

Lam Research Corporation,...

1. A method for processing a substrate in a process chamber, comprising:
providing a plurality of cycles to process the substrate, wherein each cycle comprises the steps of:
providing a flow of a first process gas into the process chamber;
performing a first process to etch or provide a protective layer on the substrate with the first process gas;
stopping the flow of the first process gas into the process chamber;
providing a flow of a first transition gas into the process chamber;
neutralizing a component of the first process gas with the first transition gas;
stopping the flow of the first transition gas into the process chamber;
providing a flow of a second process gas into the process chamber;
performing a second process to etch or provide a protective layer on the substrate with the second process gas;
stopping the flow of the second process gas into the process chamber; and
maintaining a continuous plasma during the cycle.

US Pat. No. 9,177,756

E-BEAM ENHANCED DECOUPLED SOURCE FOR SEMICONDUCTOR PROCESSING

Lam Research Corporation,...

1. A semiconductor substrate processing system, comprising:
a processing chamber;
a substrate support defined to support a substrate in the processing chamber;
a plasma chamber defined separate from the processing chamber, the plasma chamber defined to generate a plasma;
a top plate disposed above the substrate support so as to separate the plasma chamber from the processing chamber;
a planar conductive segment disposed within the processing chamber separate from the substrate support, the planar conductive
segment extending across a bottom surface of the top plate, the planar conductive segment positioned in an orientation facing
the substrate support;

an insulating member formed and disposed between the planar conductive segment and the top plate to electrically isolate the
planar conductive segment from the top plate and surrounding structures of the processing chamber;

a plurality of fluid transmission pathways formed through the top plate and the planar conductive segment and the insulating
member so as to extend from the plasma chamber to the processing chamber;

a first power supply electrically connected to the planar conductive segment, the first power supply defined to supply electrical
power to the planar conductive segment;

an electrode disposed within the plasma chamber across a top surface of the plasma chamber, the electrode oriented to drive
charges species from the plasma chamber through the plurality of fluid transmission pathways into the processing chamber;
and

a second power supply electrically connected to the electrode, the second power supply defined to supply electrical power
to the electrode.

US Pat. No. 9,153,486

CVD BASED METAL/SEMICONDUCTOR OHMIC CONTACT FOR HIGH VOLUME MANUFACTURING APPLICATIONS

Lam Research Corporation,...

1. An integrated process tool apparatus comprising:
a controller configured with instructions for performing the following operations:
(a) receiving a semiconductor device, wherein the semiconductor device comprises:
a substrate;
a gate dielectric over the substrate;
a gate electrode over the gate dielectric; and
source and drain regions in the substrate and on laterally opposite sides of the gate electrode;
(b) depositing by chemical vapor deposition (CVD) an interfacial dielectric over the source and drain regions of the substrate;
(c) depositing a pre-metal dielectric over the semiconductor device;
(d) forming one or more vias through the pre-metal dielectric over the source and drain regions of the substrate, wherein
the interfacial dielectric is an etch stop in forming the one or more vias; and

(e) depositing by CVD a metal over the interfacial dielectric to fill the one or more vias, wherein the controller comprises
instructions for depositing the interfacial dielectric before depositing the pre-metal dielectric and before forming the one
or more vias through the pre-metal dielectric.

US Pat. No. 9,224,618

METHOD TO INCREASE MASK SELECTIVITY IN ULTRA-HIGH ASPECT RATIO ETCHES

LAM RESEARCH CORPORATION,...

1. A method of etching features in a dielectric etch layer disposed below a mask in a plasma processing chamber, comprising:
flowing an etch gas into the plasma processing chamber;
maintaining a top outer electrode at a temperature of at least 150° C. during the etching of the features;
forming the etch gas into a high density plasma that is contained using a shroud that extends from the top outer electrode
to a bottom electrode and forms a “C” shaped profile, which etches the etch layer, and

providing a grounded area to powered area ratio of greater than four.

US Pat. No. 9,129,778

FLUID DISTRIBUTION MEMBERS AND/OR ASSEMBLIES

LAM RESEARCH CORPORATION,...

16. A fluid distribution member assembly for a substrate processing system, comprising:
a fluid distribution member configured to (i) be arranged between a plasma generator assembly and a process chamber generator,
separate from the plasma generator assembly, and (ii) receive plasma from the plasma generator assembly for distribution through
the fluid distribution member into the process chamber; and

a first slot formed through the fluid distribution member and including one end and an opposite end,
wherein the first slot extends along a curved path that spirals relative to a fixed point on the fluid distribution member,
wherein the one end of the first slot is located closer to the fixed point than the opposite end,
wherein points along the first slot between the one end and the opposite end are located at an increasing radial distance
from the fixed point,

wherein a length of the first slot is such that the first slot completely circumscribes the fixed point at least one time,
and

wherein the curved path of the first slot allows for thermal expansion of the fluid distribution member such that the central
portion of the fluid distribution member is configured to expand and rotate with respect to the perimeter portion of the fluid
distribution member when the fluid distribution member is heated and to contract and rotate in an opposite direction when
the fluid distribution member cools.

US Pat. No. 9,596,744

RADIO FREQUENCY GENERATOR HAVING MULTIPLE MUTUALLY EXCLUSIVE OSCILLATORS FOR USE IN PLASMA PROCESSING

Lam Research Corporation,...

1. A radio frequency (RF) power supply, comprising,
a first frequency oscillator for generating a first frequency signal;
a second frequency oscillator for generating a second frequency signal;
an amplifier;
a first switch connected to an output of the first frequency oscillator;
a second switch connected to an output of the second frequency oscillator, wherein an output of the first switch and the second
switch connect to an input of the amplifier; and

a switch control coupled to the first switch and the second switch, the switch control is configured to enable a connection
via the first and second switches from only one of the first frequency oscillator or the second frequency oscillator to the
amplifier at one time, wherein the amplifier configured to power amplify both of the first and second frequency signals from
the first and second frequency oscillators.

US Pat. No. 9,123,582

METHODS OF IN-SITU MEASUREMENTS OF WAFER BOW

LAM RESEARCH CORPORATION,...

1. A method to measure bow of a wafer within a plasma processing system, the method comprising:
transferring the wafer into the plasma processing system;
measuring a first plurality of distances from a first sensor to a first surface of the wafer to calculate the bow in the wafer,
wherein the wafer is moving relative to the first sensor in a first direction while the first sensor is stationary, the first
direction including at least one of a z-direction and a theta-direction, and wherein the first sensor is positioned outside
of a set of process modules of the plasma processing system;

determining whether the calculated bow of the wafer is within a pre-determined range;
based on a determination that the calculated bow of the wafer is within the pre-determined range
moving the wafer into a process module of the set of process modules for processing and
adjusting a recipe for processing the wafer based on the calculated bow of the wafer; and
based on a determination that the calculated bow of the wafer is outside the pre-determined range, removing the wafer from
the plasma processing system.

US Pat. No. 9,142,417

ETCH PROCESS WITH PRE-ETCH TRANSIENT CONDITIONING

Lam Research Corporation,...

1. A method for etching features with different aspect ratios in an etch layer, comprising:
a plurality of cycles, wherein each cycle comprises:
a pre-etch transient conditioning of the etch layer, which provides a transient condition of the etch layer, wherein the transient
condition has a duration, wherein the pre-etch transient conditioning comprises

providing a pre-etch transient conditioning gas consisting essentially of He and O2; and

forming the pre-etch transient conditioning gas into a plasma; and
etching the etch layer for a duration, wherein the duration of the etching with respect to the duration of the transient condition
is controlled to control etch aspect ratio dependence, wherein the etching follows the pre-etch transient conditioning, wherein
the etching takes place within the duration of the transient condition, and wherein the etching does not continue past the
duration of the transient condition.

US Pat. No. 9,128,493

METHOD AND APPARATUS FOR PLATING SOLUTION ANALYSIS AND CONTROL

Lam Research Corporation,...

12. A system used to measure a plating solution, the system comprising:
a flow cell;
a solution sampling apparatus having a solution manifold including:
a plurality of process solution tubes including throttling valves with at least one of the process solution tubes configured
to be coupled to the plating solution; and

a first sample tube coupled to the solution manifold and to the flow cell, the first sample tube configured to convey a sample
of the plating solution from the solution manifold to the flow cell; and

a visible light spectrometer configured for visible light measurement technique coupled to the flow cell and having a light
source configured to measure an absorbance of the plating solution in the flow cell;

a Raman spectrometer configured for Raman measurement technique coupled to the flow cell and having a light source configured
to measure a concentration of a component of the plating solution in the flow cell; and

a second sample tube coupled to a flow cell and to a pH probe, the second sample tube configured to convey the sample of the
plating solution from the flow cell, to the pH probe, the pH probe configured to measure a pH value of the plating solution,
wherein the Ramen spectrometer and the visible light spectrometer are operatively connected to the flow cell in parallel and
the flow cell is fluidly connected to the pH probe.

US Pat. No. 9,184,043

EDGE ELECTRODES WITH DIELECTRIC COVERS

Lam Research Corporation,...

1. A plasma processing chamber configured to clean a bevel edge of a substrate, comprising:
a substrate support configured to receive the substrate;
a bottom edge electrode surrounding the substrate support, the bottom edge electrode and the substrate support being electrically
isolated from one another by a bottom dielectric ring, a surface of the bottom edge electrode, facing the substrate, being
covered by a bottom thin dielectric layer, the bottom dielectric ring having a step defined between a first level disposed
at a height of the substrate support and a second level disposed at a height of the bottom edge electrode;

a bottom insulating ring surrounding the bottom edge electrode;
a top edge electrode surrounding a top insulator plate that is opposing the substrate support, the top edge electrode being
electrically grounded, the top edge electrode and the top insulator plate isolated from one another by a top dielectric ring;
and

a top insulating ring surrounding the top edge electrode;
wherein a surface of the top edge electrode facing the substrate being covered by a top thin dielectric layer, the top edge
electrode and the bottom edge electrode opposing one another;

wherein during operation a cleaning plasma to clean the bevel edge of the substrate is generated between the top edge electrode
and the bottom edge electrode, wherein generation of the cleaning plasma uses a gas chemistry that is introduced into the
plasma processing chamber from a center feed in the top insulator plate that allows the gas chemistry to flow over the substrate
toward the bevel edge of the substrate;

wherein a surface of the top insulating ring that faces the substrate aligns with the surface of the top edge electrode that
faces the substrate; and

wherein a surface of the bottom insulating ring that faces the top insulating ring aligns with the surface of the bottom edge
electrode that opposes the top edge electrode, wherein the top insulating ring and the bottom insulating ring confine the
cleaning plasma generated by the top edge electrode and the bottom edge electrode;

wherein the bottom edge electrode is coupled to an RF power supply;
wherein the separation distance between the top edge electrode and the bottom edge electrode is (DEE), and a nearest round distance (DW) is a distance to a chamber wall of the plasma processing apparatus and one of the top or bottom edge electrodes, wherein
a ratio of DW/DEE is at least 4:1.

US Pat. No. 9,293,305

MIXED ACID CLEANING ASSEMBLIES

LAM RESEARCH CORPORATION,...

1. A cleaning assembly comprising a modular electrode sealing housing, an acid injection inlet, and a fluid injection inlet
wherein:
the modular electrode sealing housing comprises a high pressure closure member that contains a first cleaning volume and a
low pressure closure member that contains a second cleaning volume;

the acid injection inlet is formed in the high pressure closure member and in fluid communication with the first cleaning
volume of the high pressure closure member;

the acid injection inlet adapted to supply an acidic solution to the first cleaning volume of the high pressure closure member;
the fluid injection inlet is formed in the low pressure closure member and in fluid communication with the second cleaning
volume of the low pressure closure member;

the fluid injection inlet adapted to supply purified water to the second cleaning volume of the low pressure closure member;
and

an electrode carrier plate adapted to support a showerhead electrode so as to be sealed within the modular electrode sealing
housing such that the high pressure closure member seals against one side of the showerhead electrode, the electrode carrier
plate seals against an opposite side of the showerhead electrode and the low pressure closure member seals against the electrode
carrier plate, the first cleaning volume is located on a first side of the showerhead electrode and the second cleaning volume
is located on a second side of the showerhead electrode, and the first cleaning volume of the high pressure closure member
adapted to operate at a relatively high pressure compared to the second cleaning volume of the high pressure closure member.

US Pat. No. 9,290,843

BALL SCREW SHOWERHEAD MODULE ADJUSTER ASSEMBLY FOR SHOWERHEAD MODULE OF SEMICONDUCTOR SUBSTRATE PROCESSING APPARATUS

LAM RESEARCH CORPORATION,...

1. A semiconductor substrate processing apparatus for processing semiconductor substrates comprising:
a chemical isolation chamber in which individual semiconductor substrates are processed wherein a top plate forms an upper
wall of the chemical isolation chamber;

a process gas source in fluid communication with the chemical isolation chamber for supplying a process gas into the chemical
isolation chamber;

a showerhead module which delivers the process gas from the process gas source to a processing zone of the processing apparatus
wherein the individual semiconductor substrates are processed wherein the showerhead module comprises a base attached to a
lower end of a stem wherein a faceplate having gas passages therethrough forms a lower surface of the base,

a substrate pedestal module which is configured to support the semiconductor substrate in the processing zone below the faceplate
during processing of the substrate; and

a ball screw showerhead module adjuster assembly which supports the showerhead module in the top plate wherein the ball screw
showerhead module adjuster assembly is operable to adjust the planarization of the faceplate of the showerhead module with
respect to an upper surface of the substrate pedestal module adjacent the faceplate, the ball screw showerhead module adjuster
assembly comprising:

a collar supported in a stepped opening of the top plate wherein an O-ring forms an airtight seal between a lower surface
of the collar and a horizontal upper surface of the stepped opening;

a bellows which forms an airtight seal between the collar and an adjuster plate supported above the collar by at least three
adjustable ball screws wherein the at least three adjustable ball screws are operable to adjust the planarization of the adjuster
plate with respect to the collar; and

an insulating sleeve which extends through an opening in the collar, the bellows, and the adjuster plate, wherein a flange
on an upper end of the insulating sleeve is fixedly supported on an upper surface of the adjuster plate and an O-ring forms
an airtight seal therebetween;

wherein the stem of the showerhead module is supported in a stepped opening of the insulating sleeve by a nut assembly, the
nut assembly operable to compress a tapered/conical shoulder of the stem below the nut assembly against a conical shoulder
of the insulating sleeve such that the stem of the showerhead module is fixedly supported and aligned within the insulating
sleeve so that an adjustment of planarization of the adjuster plate thereby adjusts the planarization of the faceplate of
the showerhead module.

US Pat. No. 9,174,249

ULTRASONIC CLEANING METHOD AND APPARATUS THEREFORE

Lam Research Corporation,...

1. An apparatus, comprising:
a substantially circular tank comprising a top portion, a bottom portion, and a sidewall disposed therebetween, the tank being
configured to contain a cleaning fluid and to receive a substantially planar article submerged in the cleaning fluid;

a plurality of cleaning fluid inlets for delivering the cleaning fluid to the tank, each cleaning fluid inlet at least partially
disposed in the sidewall proximate to the bottom portion of the tank;

an intermediate support for receiving a substantially planar article, the intermediate support configured to maintain the
substantially planar article in the tank above the plurality of cleaning fluid inlets and below a plurality of fluid outlet
ports disposed in the sidewall proximate to the top portion of the tank;

an ultrasonic generator coupled to the tank for generating ultrasonic waves in the tank and cleaning fluid received therein;
wherein the intermediate support comprises an upper support surface and a base structure opposite the upper support surface,
and is configured to define (i) a substantially continuous outer circumferential fluid gap between a substantial entirety
of an outer circumference of the intermediate support and an inner circumference of the tank; (ii) a substantially discontinuous
inner circumferential fluid gap between an intermediate circumference of the intermediate support and the substantially planar
article supported by the upper support surface of the intermediate support; and (iii) a plurality of radial cleaning fluid
passages extending through the base structure of the intermediate support from the outer circumference of the intermediate
support to an inner circumference of the intermediate support; and

wherein the apparatus is configured to receive cleaning fluid from the cleaning fluid inlets, remove particles from the substantially
planar article, and direct flow of the cleaning fluid such that removed particles are carried away from the substantially
planar article and out of the tank through the fluid outlet ports.

US Pat. No. 9,251,999

CAPACITIVELY-COUPLED PLASMA PROCESSING SYSTEM HAVING A PLASMA PROCESSING CHAMBER FOR PROCESSING A SUBSTRATE

Lam Research Corporation,...

1. A capacitively-coupled plasma processing system having a plasma processing chamber for processing a substrate, comprising:
at least an upper electrode and a lower electrode for processing said substrate, said substrate being disposed on said lower
electrode during plasma processing;

a generator for providing at least a first RF signal to said lower electrode, said first RF signal having a first RF frequency,
said first RF signal coupling with a plasma in said plasma processing chamber, thereby inducing an induced RF signal on said
upper electrode;

a rectifying arrangement for rectifying said induced RF signal to generate a rectified RF signal such that said rectified
RF signal is more negatively biased than positively biased,

wherein said substrate is configured to be processed while said rectified RF signal is provided to said upper electrode.

US Pat. No. 9,214,333

METHODS AND APPARATUSES FOR UNIFORM REDUCTION OF THE IN-FEATURE WET ETCH RATE OF A SILICON NITRIDE FILM FORMED BY ALD

Lam Research Corporation,...

17. An apparatus for depositing SiN films having reduced wet etch rates on semiconductor substrates, the apparatus comprising:
a processing chamber;
a substrate holder in the processing chamber;
one or more gas inlets for flowing gases into the processing chamber;
a vacuum source for removing gases from the processing chamber;
a plasma generator for generating plasmas within the processing chamber; and
one or more controllers comprising machine-readable instructions for operating the one or more gas inlets, vacuum source,
and plasma generator to deposit SiN film layers onto substrates, the instructions of the one or more controllers comprising
instructions for:

(a) operating the one or more gas inlets to flow a film precursor into the processing chamber and adsorbing the film precursor
onto a semiconductor substrate held in the substrate holder such that the film precursor forms an adsorption-limited layer
on the substrate, the film precursor comprising Si;

(b) operating the vacuum source to remove at least some unadsorbed film precursor from the volume surrounding the adsorbed
film precursor;

(c) after removing unadsorbed film precursor in (b), operating the plasma generator to generate a plasma comprising N-containing
ions and/or radicals, and reacting the adsorbed film precursor by exposing it to said plasma to form a SiN film layer on the
substrate;

(e) after reacting the adsorbed precursor in (c), operating the plasma generator to generate a plasma comprising He having
a power density relative to the substrate surface of between about 0.035 and 2.2 W/cm2, and densifying the SiN film layer by exposing it to said plasma for between 0.5 and 15 seconds; and

(g) repeating (a), (b), (c), and (e) to form another densified SiN film layer on the substrate.

US Pat. No. 9,214,334

HIGH GROWTH RATE PROCESS FOR CONFORMAL ALUMINUM NITRIDE

Lam Research Corporation,...

1. A method of processing a semiconductor substrate having features in a reaction chamber, the method comprising:
(a) exposing the substrate to an aluminum-containing precursor for a duration sufficient to substantially adsorb to a surface
of the substrate;

(b) purging the aluminum-containing precursor from the reaction chamber for a duration insufficient to remove substantially
all of the aluminum-containing precursor from the gas phase;

(c) exposing the substrate to a nitrogen-containing precursor for a duration sufficient to drive a thermally mediated reaction
to form a layer of aluminum nitride on the surface of the substrate, wherein the layer of aluminum nitride is substantially
conformal to the substrate and has a thickness of about 1.5 Å or greater;

(d) purging the nitrogen-containing precursor in gas phase from the reaction chamber; and
(e) repeating (a) through (d).

US Pat. No. 9,293,317

METHOD AND SYSTEM RELATED TO SEMICONDUCTOR PROCESSING EQUIPMENT

LAM RESEARCH CORPORATION,...

1. A system comprising:
a front end robot configured to pull individual wafers from at least one wafer carrier;
a linear robot in operational relationship with the front end robot, wherein the linear robot is configured to (i) receive
the wafers from the front end robot, and (ii) move the wafers along a path;

a first processing chamber;
a second processing chamber;
a first cluster robot disposed between the first processing chamber and the second processing chamber; and
a rack adjacent the first processing chamber and the second processing chamber and isolated from the linear robot preventing
a direct transfer of the wafers between the linear robot and the rack, wherein the rack is configured to store at a same time
a plurality of the wafers for subsequent processing in one or more of the first processing chamber and the second processing
chamber, wherein the plurality of wafers are stacked on the rack, and

wherein the first cluster robot is configured to transfer the plurality of the wafers
between (i) the linear robot, and (ii) the first processing chamber and the second processing chamber, and
between (i) the rack, and (ii) the first processing chamber and the second processing chamber.

US Pat. No. 9,275,838

ARRANGEMENTS FOR MANIPULATING PLASMA CONFINEMENT WITHIN A PLASMA PROCESSING SYSTEM AND METHODS THEREOF

Lam Research Corporation,...

8. A plasma processing system, comprising:
a power source;
a gas distribution system;
a lower electrode, wherein said lower electrode is configured at least for supporting a substrate during said plasma processing;
an upper electrode having an extension that extends a surface of the upper electrode up to a top edge of the substrate, said
upper electrode and the extension disposed over the top surface of the substrate define a minimized gap between said upper
electrode and said lower electrode, a size of the gap defined to prevent formation of a plasma in an area between the upper
electrode and the lower electrode;

a top ring electrode positioned to cover the top edge of said substrate and surrounding the upper electrode;
a bottom ring electrode positioned to cover a bottom edge of said substrate and surrounding said lower electrode, wherein
the top ring electrode is arranged opposite the bottom ring electrode to define a region there-between for forming plasma
around a bevel edge of the substrate when the substrate is disposed over the lower electrode;

a first match arrangement including a first parallel circuit electrically connected between the top ring electrode and ground,
the first parallel circuit includes a series circuit of a variable capacitor and a first inductor connected in parallel to
a series circuit of a second inductor and a switch;

a second match arrangement including a second parallel circuit electrically connected between the bottom ring electrode and
ground, the second parallel circuit includes a series circuit of a variable capacitor and a first inductor connected in parallel
to a series circuit of a second inductor and a switch; and

a third match arrangement being electrically coupled to said upper electrode, a switch from the third match arrangement and
the switch from the first and the second match arrangements used to selectively control plasma formation in specific areas
within a processing chamber of the plasma processing system.

US Pat. No. 9,190,289

SYSTEM, METHOD AND APPARATUS FOR PLASMA ETCH HAVING INDEPENDENT CONTROL OF ION GENERATION AND DISSOCIATION OF PROCESS GAS

Lam Research Corporation,...

1. A system, comprising:
a process chamber including;
a top electrode including,
a plurality of layers comprising a top conductive layer, a middle conductive layer, a bottom conductive layer, a first insulator
layer defined between the top conductive layer and the middle conductive layer and a second insulator layer defined between
the bottom conductive layer and the middle conductive layer, and each of the layers extend across the top electrode, and each
of the top and bottom conductive layers is coupled to a ground potential;

wherein a plurality of hollow cathode cavities is formed in the middle conductive layer, and each hollow cathode cavity is
coupled to an outlet formed in the bottom conductive layer, and the outlets open to a wafer processing region in the process
chamber, the wafer processing region being located between the outlets and a surface to be etched;

a source gas supply plenum coupled to each of the plurality of hollow cathode cavities by a plurality of ports of each cathode
for supplying a source gas mixture,

wherein a dimension of each source gas supply plenum is smaller than a dimension of each hollow cathode cavity, and the source
gas mixture is injected into the wafer processing region through the smaller dimension of each source gas supply plenum, and
further through the larger dimension of each hollow cathode cavity and then through each outlet having a dimension that is
smaller than the dimension of each hollow cathode cavity;

a first biasing signal source coupled to each of the plurality of hollow cathode cavities;
a plurality of injection ports coupled to an etchant gas source, the plurality of injection ports capable of injecting the
etchant gas into the wafer processing region without passing through the plurality of hollow cathode cavities;

a bottom electrode for supporting a semiconductor wafer, the semiconductor wafer including the surface to be etched, the bottom
electrode being opposite to the top electrode; and

a computer controller including computer executable logic on computer readable medium for controlling the etchant gas source
to inject the etchant gas through the plurality of injection ports independent from controlling the injection of the source
gas mixture into the hollow cathode cavities and computer executable logic on computer readable medium for controlling the
generation of plasma within the hollow cathode cavities.

US Pat. No. 9,234,775

METHODS FOR VERIFYING GAS FLOW RATES FROM A GAS SUPPLY SYSTEM INTO A PLASMA PROCESSING CHAMBER

LAM RESEARCH CORPORATION,...

1. A method for verifying process gas flow rates from a gas supply system to a plasma processing chamber, the method comprising:
a) setting a first flow controller to a first set point and flowing a gas at a first set flow rate from the first flow controller,
the gas flowing through a first orifice of an orifice array into a plasma processing chamber;

b) setting the first flow controller to a second set point and flowing the gas at a second set flow rate from the first flow
controller, the gas flowing through the first orifice into the plasma processing chamber which is at ambient temperature;

c) setting the first flow controller to a third set point and flowing the gas at a third set flow rate from the first flow
controller, the gas flowing through the first orifice into the plasma processing chamber;

d) for the first, second and third set flow rates, measuring first, second and third actual flow rates, respectively of the
gas into the plasma processing chamber;

e) measuring a pressure of the gas upstream of the first orifice at the first, second and third set flow rates, respectively;
f) determining an empirical factor Kd for the first, second and third set flow rates and first orifice using the first, second
and third actual flow rates;

g) repeating a)-f) for at least a second orifice of the orifice array;
h), subsequent to f), verifying a flow rate of the gas from the first flow controller or a second flow controller into the
plasma processing chamber by flowing the gas at a selected flow rate from the first or second flow controller through the
first orifice, measuring the pressure of the gas upstream of the first orifice at the selected flow rate, and determining
the actual flow rate of the gas at the selected set flow rate using the measured gas pressure and Kd for the first orifice,
to thereby verify operation of the first or second controller; and

wherein the actual flow rate of the gas is determined by measuring the rate of pressure increase in the plasma processing
chamber as the gas is flowed into the plasma processing chamber at each of the first set flow rate and second set flow rate.

US Pat. No. 9,123,661

SILICON CONTAINING CONFINEMENT RING FOR PLASMA PROCESSING APPARATUS AND METHOD OF FORMING THEREOF

LAM RESEARCH CORPORATION,...

1. A method of forming a silicon containing confinement ring for a plasma processing apparatus useful for processing a semiconductor
substrate, the method comprising:
inserting silicon containing vanes into grooves formed in a grooved surface of an annular carbon template wherein the grooved
surface of the annular carbon template includes an upwardly projecting step at an inner perimeter thereof wherein each groove
extends from the inner perimeter to an outer perimeter of the grooved surface;

surrounding the step of the grooved surface with an annular carbon member wherein the annular carbon member covers an upper
surface of each silicon containing vane in each respective groove;

depositing silicon containing material on the annular carbon template, the annular carbon member, and exposed portions of
each silicon containing vane thereby forming a silicon containing shell of a predetermined thickness;

removing a portion of the silicon containing shell; and
removing the annular carbon template and the annular carbon member from the silicon containing shell leaving a silicon containing
confinement ring wherein the silicon containing vanes are supported by the silicon containing shell of the silicon containing
confinement ring.

US Pat. No. 9,245,720

METHODS AND APPARATUS FOR DETECTING AZIMUTHAL NON-UNIFORMITY IN A PLASMA PROCESSING SYSTEM

Lam Research Corporation,...

1. A plasma processing system having a plasma processing chamber, including a lower electrode assembly, comprising:
a plurality of RF straps to permit RF currents to traverse said plurality of RF straps;
a plurality of sensors, each of said plurality of sensors being coupled with one of said plurality of straps, and each of
said plurality of sensors has a first end and a second end separated by a gap to provide coupling with said one of said plurality
of straps, wherein each sensor represents a non-linear substantially enclosed RF sensor;

wherein said non-linear substantially enclosed RF sensor is coupled to a co-axial cable, a sheath of said co-axial cable is
coupled to a first portion of said non-linear substantially enclosed RF sensor and a core of said co-axial cable is coupled
to a second portion of said non-linear substantially enclosed RF sensor to acquire voltage measurements between said first
portion and said second portion.

US Pat. No. 9,263,284

LINE WIDTH ROUGHNESS IMPROVEMENT WITH NOBLE GAS PLASMA

Lam Research Corporation,...

1. A method for forming lines in an etch layer on a substrate, comprising:
placing the substrate into a vacuum chamber;
forming a photoresist mask having a plurality of patterned lines over the etch layer;
providing a high-intensity vacuum ultra-violet (VUV) producing gas comprising argon gas into the vacuum chamber;
ionizing the argon gas to produce VUV rays to irradiate the photoresist mask; and
etching the lines into the etch layer through the photoresist mask.

US Pat. No. 9,287,110

METHOD AND APPARATUS FOR WAFER ELECTROLESS PLATING

Lam Research Corporation,...

12. A method for semiconductor wafer electroless plating, comprising:
receiving a wafer in a dry state in an upper region of a chamber volume;
moving a platen upward from a lower region of the chamber volume to support the wafer as received in the upper region of the
chamber volume;

moving the platen with the wafer supported thereon downward to the lower region of the chamber volume to a position within
a fluid bowl located within the lower region of the chamber volume so as to cause the platen to engage a seal positioned against
an interior surface of the fluid bowl; and

dispensing an electroless plating solution through a number of fluid nozzles positioned above the seal and below a top surface
of the platen when the platen is engaged with the seal, wherein the electroless plating solution is dispensed from the number
of fluid nozzles within a space between the interior surface of the fluid bowl and an outer surface of the platen when the
platen is engaged with the seal, wherein the space between the interior surface of the fluid bowl and the outer surface of
the platen and above the seal is open to a volume overlying the platen.

US Pat. No. 9,263,350

MULTI-STATION PLASMA REACTOR WITH RF BALANCING

Lam Research Corporation,...

1. A method of cyclic plasma-assisted semiconductor deposition processing in multiple stations in a process chamber of a substrate
processing apparatus, the method comprising:
a) providing substrates at each of the multiple stations;
b) distributing RF power to multiple stations to thereby generate a plasma in the stations, wherein the RF power is distributed
according to a RF power parameter that is adjusted to reduce station to station variations;

c) tuning a frequency of the RF power, wherein tuning the frequency includes:
i) measuring an impedance of the plasma,
ii) determining, according to the impedance measured in (i), a change to the frequency of the RF power, and
iii) adjusting the frequency of the RF power; and
d) depositing a thin film on the substrate at each station, wherein:
the thin film is produced during a single ALD cycle,
(b) through (d) are repeatedly performed, each time during a new ALD cycle of the semiconductor deposition processing,
each ALD cycle comprises igniting the plasma and temporarily delivering one or more process gases to the process chamber,
the station-to-station distribution of the RF power parameter is not changed over the multiple ALD cycles, and
the tuning in (c) produces a first RF power frequency in one ALD cycle and a second RF power frequency in another ALD cycle,
and wherein the first and second RF power frequencies are different.

US Pat. No. 9,184,060

PLATED METAL HARD MASK FOR VERTICAL NAND HOLE ETCH

Lam Research Corporation,...

1. A method of forming recessed features on a substrate, the method comprising:
(a) forming sacrificial posts on the substrate, said substrate comprising a conductive seed layer over an underlying material,
wherein the sacrificial posts are formed directly above regions where the recessed features are to be formed in the underlying
material;

(b) depositing a metal hard mask material on the conductive seed layer around the sacrificial posts to form a metal hard mask
layer through electroplating, electroless plating, or chemical vapor deposition;

(c) removing the sacrificial posts to form openings in the metal hard mask layer;
(d) removing the conductive seed layer in the openings in the metal hard mask layer; and
(e) etching the underlying material to thereby form the recessed features directly under the openings in the metal hard mask
layer.

US Pat. No. 9,129,779

PROCESSING SYSTEM FOR DETECTING IN-SITU ARCING EVENTS DURING SUBSTRATE PROCESSING

Lam Research Corporation,...

1. A processing system for detecting in-situ arcing events during substrate processing, comprising:
at least a plasma processing chamber having a probe arrangement, wherein said probe arrangement is disposed on a surface of
said processing chamber and is configured to measure at least one plasma processing parameter, wherein said probe arrangement
includes

a plasma-facing sensor, and
a measuring capacitor, wherein said plasma-facing sensor is coupled to a first plate of said measuring capacitor; and
a detection arrangement, said detection arrangement is coupled to a second plate of said measuring capacitor, wherein said
detection arrangement is configured for converting an induced current flowing through said measuring capacitor into a set
of digital signals, said set of digital signals being processed to detect said in-situ arcing events.

US Pat. No. 9,245,719

DUAL PHASE CLEANING CHAMBERS AND ASSEMBLIES COMPRISING THE SAME

Lam Research Corporation,...

1. A dual phase cleaning chamber comprising a turbulent mixing chamber, a fluid diffuser, an isostatic pressure chamber and
a rupture mitigating nozzle wherein:
the turbulent mixing chamber is in fluid communication with a first fluid inlet for providing a first phase and a second fluid
inlet for providing a second phase;

the fluid diffuser comprises a turbulent facing surface, an isostatic facing surface and a plurality of diffusing flow-paths
between the turbulent facing surface and the isostatic facing surface;

the fluid diffuser is in fluid communication with the turbulent mixing chamber such that the turbulent facing surface of the
fluid diffuser is facing the turbulent mixing chamber;

the rupture mitigating nozzle comprises a first fluid collecting offset, a second fluid collecting offset, and a displacement
damping projection;

the isostatic pressure chamber is in fluid communication with the fluid diffuser such that the isostatic facing surface of
the fluid diffuser is facing the isostatic pressure chamber;

the displacement damping projection is disposed between the first fluid collecting offset and the second fluid collecting
offset;

the displacement damping projection is offset away from each of the first fluid collecting offset and the second fluid collecting
offset, and towards the fluid diffuser;

each of the first fluid collecting offset and the second fluid collecting offset comprises an outlet passage in fluid communication
with an ambient pressure; and

the rupture mitigating nozzle is in fluid communication with the fluid diffuser such that a pressurized cleaning fluid introduced
from the first fluid inlet, the second fluid inlet, or both flows through the outlet passage of the first fluid collecting
offset and the second fluid collecting offset.

US Pat. No. 9,275,872

METHOD FOR FORMING STAIR-STEP STRUCTURES

Lam Research Corporation,...

1. A method for forming a stair-step structure in a substrate, comprising:
a) forming an organic mask over the substrate;
b) forming a hardmask with a top layer and a sidewall layer over a top and a sidewall of the organic mask;
c) removing the sidewall layer of the hardmask while leaving the top layer of the hardmask;
d) trimming the organic mask;
e) etching the substrate, which etches away the top layer of the hardmask; and
f) repeating steps b-e a plurality of times forming the stair-step structure.

US Pat. No. 9,263,331

METHOD FOR FORMING SELF-ALIGNED CONTACTS/VIAS WITH HIGH CORNER SELECTIVITY

Lam Research Corporation,...

1. A method of forming features in a low-k dielectric layer disposed below first hardmask layer, disposed below a metal hardmask,
disposed below a second hardmask, which is disposed below a planarization layer, disposed below a via mask, comprising:
etching the planarization layer through the via mask to the second hardmask;
etching self-aligned contacts/vias in the low-k dielectric layer through the planarization layer, the metal hardmask, and
the second hardmask, comprising at least one cycle, wherein each cycle comprises:

thinning the planarization layer, comprising the steps of:
flowing a planarization layer thinning gas from the gas source into the plasma processing chamber;
transforming the planarization layer thinning gas into a planarization layer thinning plasma, which thins the planarization
layer; and

stopping the flow of the planarization layer thinning gas;
forming a deposition layer on the second hardmask, the metal hardmask, and planarization layer comprising the steps of:
flowing a deposition gas from the gas source into the plasma processing chamber;
transforming the deposition gas into a deposition plasma, which forms a deposition layer on the hardmask and planarization
layer; and

stopping the flow of the deposition gas; and
etching the low-k dielectric layer masked by the deposition layer comprising the steps of:
flowing an etch gas from the gas source into the plasma processing chamber;
transforming the etch gas into a deposition plasma, which etches the dielectric layer masked by the deposition layer; and
stopping the flow of the etch gas
removing the planarization layer;
etching trenches into the first hardmask layer; and
etching trenches into the low-k dielectric layer through the first hardmask layer.

US Pat. No. 9,236,244

SEQUENTIAL PRECURSOR DOSING IN AN ALD MULTI-STATION/BATCH REACTOR

Lam Research Corporation,...

1. A method of depositing layers of material on multiple semiconductor substrates in multiple reaction chambers, the method
comprising:
(i) dosing the substrates in the reaction chambers with a film precursor by introducing the precursor into the reaction chambers
and allowing the precursor to adsorb onto the surface of the substrates in an adsorption-limited manner;

(ii) removing unadsorbed precursor from the reaction chambers;
(iii) reacting adsorbed precursor with a plasma, after removing unadsorbed precursor, to form a layer of material on the substrates;
(iv) removing desorbed precursor and/or reaction by-product from the reaction chambers when present after reacting adsorbed
precursor; and

(v) repeating (i) through (iv) multiple times to form multiple layers of material on the multiple substrates in the reaction
chambers;
wherein the dosing in (i) comprises dosing a first substrate in a first reaction chamber and a second substrate in a second
reaction chamber with precursor flowing from a common source, the timing of said dosing in (i) staggered such that:
the first substrate is dosed during a first dosing phase during which the second substrate is not substantially dosed; and
the second substrate is dosed during a second dosing phase during which the first substrate is not substantially dosed; andwherein the precursor flows continuously from the common source during the first and second dosing phases.

US Pat. No. 9,151,408

METHOD OF POLISHING A METAL SURFACE OF A BARRIER DOOR OF A GATE VALVE USED IN A SEMICONDUCTOR CLUSTER TOOL ARCHITECTURE

LAM RESEARCH CORPORATION,...

1. A method of polishing a metal sealing surface of a barrier door of a gate valve, the method comprising:
bonding a vacuum seal within a groove, wherein the groove is formed in the metal sealing surface of the barrier door, wherein
the metal sealing surface seals to an exterior wall of the gate valve when closing off an opening in the wall, and wherein
the opening provides access to an interior of a plasma chamber;

after the vacuum seal is bonded to the metal sealing surface, anodizing a first portion of the metal sealing surface without
anodizing an interior face of the barrier door, wherein the interior face is separate from the metal sealing surface and is
exposed to the interior of the plasma chamber when the barrier door is sealed to the wall of the gate valve, and wherein the
metal sealing surface and the interior face are planar surfaces that extend parallel to each other;

subsequent to anodizing the first portion of the metal sealing surface, traversing a polishing path along the first portion
of the metal sealing surface with a polishing head between (i) the interior face and (ii) an edge of the vacuum seal closest
to the interior face, wherein the polishing head engages in frictional contact with the metal sealing surface; and

while the polishing path is traversed, skirting an edge of the vacuum seal with the polishing head including polishing at
least a second portion of the metal sealing surface abutting the edge without touching the vacuum seal.

US Pat. No. 9,408,288

EDGE RAMPING

Lam Research Corporation,...

1. A system comprising:
a base RF generator for generating a first RF signal, wherein the first RF signal transitions from one state to another, the
transition from one state to another of the first RF signal resulting in a change in plasma impedance;

a secondary RF generator for generating a second RF signal, wherein the second RF signal transitions from one state to another
to stabilize the change in the plasma impedance;

a controller coupled to the secondary RF generator, the controller for providing parameter values to the secondary RF generator
to perform edge ramping of the second RF signal when the second RF signal transitions from one state to another, wherein the
edge ramping of the second RF signal is performed to modify a rate of transition of the second RF signal to be different than
a rate of transition of the first RF signal.

US Pat. No. 9,304,396

PECVD FILMS FOR EUV LITHOGRAPHY

Lam Research Corporation,...

6. An apparatus for processing semiconductor substrates, the apparatus comprising:
one or more process chambers;
one or more gas inlets into the one or more process chambers and associated flow-control hardware;
a low frequency radio frequency (LFRF) generator;
a high frequency radio frequency (HFRF) generator; and
a controller having at least one processor and a memory, wherein
the at least one processor and the memory are communicatively connected with one another,
the at least one processor is at least operatively connected with the flow-control hardware, the LFRF generator, and the HFRF
generator, and

the memory stores computer-executable instructions for:
depositing one or more underlayers on a substrate;
depositing an atomically smooth layer having a roughness of less than a monolayer; and
depositing a photoresist layer on top of the atomically smooth layer,
wherein the atomically smooth layer is deposited by plasma-enhanced chemical vapor deposition.

US Pat. No. 9,214,375

END EFFECTOR HAVING MULTIPLE-POSITION CONTACT POINTS

Lam Research Corporation,...

1. An apparatus for lifting a substrate, the apparatus comprising:
a first piece;
a second piece;
a set of first contact points in a first plane, wherein at least one first contact point is on the first piece and at least
one first contact point is on the second piece;

a set of second contact points, wherein at least one second contact point is on the first piece and at least one second contact
point is on the second piece; and

an actuator that translates the first piece, substantially parallel to the first plane, between a first position and a second
position relative to the second piece,

the first position arranging the set of first contact points so that all of the contact points of the set of first contact
points are able to engage the substrate, and further arranging the set of second contact points so that none of the contact
points of the set of second contact points are able to engage the substrate, and wherein the first position also arranges
that all of the contact points of the set of first contact points are included in an area that is defined by the substrate,
and further wherein the first position also arranges that all of the contact points of the set of second contact points are
outside the area that is defined by the substrate, and

the second position arranging the set of second contact points so that all of the contact points of the set of second contact
points are able to engage the substrate, and further arranging the set of first contact points so that none of the contact
points of the set of first contact points are able to engage the substrate, and wherein the second position also arranges
that all of the contact points of the set of second contact points are included in the area that is defined by the substrate,
and further wherein the second position also arranges that all of the contact points of the set of first contact points are
outside the area that is defined by the substrate,
wherein at least one first contact point or at least one second contact point is a flat area of a pad on which the substrate
is configured to rest.

US Pat. No. 9,128,382

PLASMA MEDIATED ASHING PROCESSES THAT INCLUDE FORMATION OF A PROTECTIVE LAYER BEFORE AND/OR DURING THE PLASMA MEDIATED ASHING PROCESS

LAM RESEARCH CORPORATION,...

18. A method for processing a substrate, comprising:
a) arranging a substrate including masked portions and unmasked portions in a process chamber;
b) creating plasma in a process chamber;
c) supplying a passivation gas mixture that includes nitrogen or carbon to create a plasma passivation gas mixture;
d) exposing the substrate to the plasma passivation gas mixture to create a passivation layer on the unmasked portions of
the substrate;

e) supplying a stripping gas mixture that includes oxygen to the plasma to create a plasma stripping gas mixture;
f) exposing the substrate to the plasma stripping gas mixture to strip at least part of the masked portions and at least part
of the passivation layer; and

g) repeating c) to f) to remove a predetermined amount of the masked portions,
wherein repeating c) and f) includes:
subsequent to exposing the substrate to the plasma stripping gas mixture to strip at least part of the masked portions and
at least part of the passivation layer, supplying the passivation gas mixture a second time to create the passivation layer
on the unmasked portions of the substrate; and

exposing the substrate to the plasma stripping gas mixture a second time to strip at least part of the masked portions and
at least part of the passivation layer.

US Pat. No. 9,287,183

USING ELECTROLESS DEPOSITION AS A METROLOGY TOOL TO HIGHLIGHT CONTAMINATION, RESIDUE, AND INCOMPLETE VIA ETCH

Lam Research Corporation,...

1. A method for detecting contamination on a patterned substrate, comprising:
performing a via etch operation on a substrate, wherein the via etch operation is configured to define a via feature on the
substrate and expose an etch-stop layer at a bottom of the via feature;

performing an etch-stop removal operation on the substrate, wherein the etch-stop removal operation is configured for removing
the etch-stop layer at the bottom of the via feature to expose a metallic feature underlying the etch-stop layer;

applying an electroless deposition solution to the substrate, the applied electroless deposition solution being configured
for selectively depositing a metallic material over the exposed metallic feature and on metallic contaminants on exposed surfaces
of the substrate, the metallic contaminants being generated from the metallic feature during the etch-stop removal operation;

performing an inspection operation on the substrate to identify the metallic contaminants that have been deposited with the
metallic material.

US Pat. No. 9,245,716

EDGE-CLAMPED AND MECHANICALLY FASTENED INNER ELECTRODE OF SHOWERHEAD ELECTRODE ASSEMBLY

LAM RESEARCH CORPORATION,...

1. An inner electrode for a showerhead electrode assembly in a capacitively coupled plasma processing chamber, the showerhead
electrode assembly comprising a backing plate having gas injection holes extending between upper and lower faces thereof,
a clamp ring having an inwardly extending flange, the clamp ring configured to fasten the inner electrode to the backing plate,
an outer electrode having an inwardly extending flange and holes configured to receive fasteners which engage openings in
the lower face of the backing plate, an alignment ring, a plurality of threaded fasteners which attach the inner electrode
to the backing plate, and a plurality of alignment pins; the inner electrode comprising:
a plasma exposed surface on a lower face thereof;
a mounting surface on an upper face thereof;
an inner annular step and an outer annular step, the inner annular step configured to mate with the inwardly extending flange
of the outer electrode and the outer annular step configured to mate with the inwardly extending flange of the clamp ring;

a plurality of gas injection holes extending between the plasma exposed surface and the mounting surface thereof and arranged
in a pattern matching the gas injection holes in the backing plate, the gas injection holes including a center gas injection
hole and concentric rings of gas injection holes;

a plurality of unthreaded blind holes in the mounting surface configured to receive the alignment pins;
an annular groove in the mounting surface configured to receive the alignment ring, the annular groove located between the
center gas injection hole and an innermost of the rings of gas injection holes; and

a plurality of threaded blind holes in the mounting surface configured to receive threaded fasteners;
wherein the plurality of threaded blind holes consists of a single circular row of eight equally spaced threaded blind holes
located at a radial distance of about 2.4-2.6 inches from the center of the inner electrode, and having a depth of at least
0.15 inch;

wherein the threaded fasteners are configured to attach the mounting surface of the inner electrode to the backing plate such
that the mounting surface of the inner electrode and the backing plate are immediately adjacent to each other and the alignment
ring and the alignment pins extend between the mounting surface of the inner electrode and the backing plate;

wherein the inner electrode is a planar disk, the inner annular step has a vertical surface and a horizontal surface extending
completely around the inner electrode, the outer annular step has a vertical surface and a horizontal surface extending completely
around the inner electrode, and the inner electrode has a uniform thickness of about 0.4 inch between the mounting surface
and the plasma exposed surface that is surrounded by the vertical surface of the inner annular step.

US Pat. No. 9,245,717

GAS DISTRIBUTION SYSTEM FOR CERAMIC SHOWERHEAD OF PLASMA ETCH REACTOR

LAM RESEARCH CORPORATION,...

1. A gas delivery system useful for supplying process gas to a ceramic showerhead for an inductively coupled plasma processing
apparatus wherein semiconductor substrates supported on a substrate support are subjected to plasma etching, the ceramic showerhead
including radially extending gas inlets extending inwardly from an outer periphery thereof, the gas delivery system comprising:
gas connection blocks adapted to attach to the ceramic showerhead such that a gas outlet of each of the blocks is in fluid
communication with a respective one of the gas inlets in the ceramic showerhead wherein an O-ring groove configured to receive
an O-ring surrounds the gas outlet of each of the blocks so as to provide a seal around the gas outlet of each gas connection
block;

a gas ring having equal length channels of uniform cross section therein and gas outlets in fluid communication with downstream
ends of the channels, each of the gas outlets being located on a mounting surface engaging a respective one of the gas connection
blocks, each of the gas outlets in fluid communication with a respective gas inlet in a respective one of the gas connection
blocks;

wherein the gas ring includes eight gas outlets and the channels include a first channel extending about one-half the length
of the gas ring, two second channels connected at midpoints thereof to downstream ends of the first channel, and four third
channels connected at midpoints thereof to downstream ends of the second channels;

wherein the gas ring includes a bottom ring with the channels therein and an upper cover plate enclosing the channels, the
cover plate having the gas outlets on an upper surface thereof and the gas connection blocks mounted on the gas ring with
each of the gas outlets in fluid communication with the respective gas inlet of the respective gas connection block.

US Pat. No. 9,159,571

TUNGSTEN DEPOSITION PROCESS USING GERMANIUM-CONTAINING REDUCING AGENT

Lam Research Corporation,...

1. A method of filling a feature on a substrate with tungsten, the method comprising:
prior to depositing a bulk tungsten layer, forming a tungsten nucleation layer by exposing the feature to alternating pulses
of a germanium-containing reducing agent and a tungsten-containing precursor.

US Pat. No. 9,279,731

MULTICHANNEL THERMOCOUPLE COMPENSATION FOR THREE DIMENSIONAL TEMPERATURE GRADIENT

Lam Research Corporation,...

1. A method of using a thermocouple, comprising:
disposing at least one temperature sensor at each of two or more respective portions of an electrical connector that receives
thermocouple signals;

measuring temperatures at the two or more portions, wherein at least one portion is inside a housing and at least another
portion is at least partially outside the housing;

calculating the temperatures at each terminal of the electrical connector based on measured temperature values of the two
or more respective portions having the disposed temperature sensors, wherein each of the temperature sensors is electrically
connected to each terminal, wherein the electrical connector has more terminals than temperature sensors; and

calculating a cold junction temperature of a terminal for at least one thermocouple channel carrying the thermocouple signals
based on measured or calculated temperature values of the terminals, or a combination thereof.

US Pat. No. 9,267,605

PRESSURE CONTROL VALVE ASSEMBLY OF PLASMA PROCESSING CHAMBER AND RAPID ALTERNATING PROCESS

LAM RESEARCH CORPORATION,...

1. A pressure control valve assembly of a plasma processing chamber in which semiconductor substrates are processed, comprising:
a housing having an inlet, an outlet and a conduit extending between the inlet and the outlet, the inlet adapted to be connected
to an interior of the plasma processing chamber and the outlet adapted to be connected to a vacuum pump which maintains the
plasma processing chamber at desired pressure set points during processing of a semiconductor substrate in the chamber;

a fixed slotted valve plate having a first set of parallel slots therein and immovably fixed in the conduit such that gasses
withdrawn from the chamber into the conduit pass through the first set of parallel slots;

a movable slotted valve plate in the conduit having a second set of parallel slots therein and movable to first and second
positions with respect to the fixed slotted valve plate so as to partially block the first set of parallel slots in the first
position to a greater extent than in the second position; and

a drive mechanism attached to the movable slotted valve plate and operable to rapidly move the movable slotted valve plate
between the first and second positions to change pressure in the chamber from a higher pressure to a lower pressure or from
a lower pressure to a higher pressure;

wherein the fixed and movable slotted valve plates are circular, the first and second sets of slots having uniform widths
W and varying lengths, and wherein the first and second slots provide an open area of 10 to 20% through the fixed slotted
valve plate and the movable valve plate when the movable valve plate is positioned in the first position and the first and
second slots provide an open area of 25 to 50% through the fixed slotted valve plate and the movable valve plate when the
movable valve plate is positioned in the second position.

US Pat. No. 9,245,761

INTERNAL PLASMA GRID FOR SEMICONDUCTOR FABRICATION

Lam Research Corporation,...

1. An apparatus for etching a feature on a substrate, the apparatus comprising:
a chamber defining an interior where a plasma can be provided;
a substrate holder for holding a substrate in the chamber during etching;
a plasma generator for producing a plasma within the chamber;
a grid assembly dividing the interior of the plasma chamber into an upper sub-chamber proximate the plasma generator and a
lower sub-chamber proximate the substrate holder; and

a controller configured to produce the plasma in the chamber under conditions that use the grid assembly to produce an upper
zone plasma in the upper sub-chamber and a lower zone plasma in the lower sub-chamber, the lower zone plasma being an ion-ion
plasma,

wherein the upper sub-chamber has a height that is at least about ? that of the lower sub-chamber,
wherein the grid assembly comprises at least a first grid and a second grid, each grid comprising a plurality of slots that
substantially prevent formation of induced current in the grid when the plasma is produced within the chamber, wherein at
least one of the plurality of slots in at least one of the first and second grids in the grid assembly has a height to width
aspect ratio between about 0.5-2.

US Pat. No. 9,214,320

INERT-DOMINANT PULSING IN PLASMA PROCESSING SYSTEMS

Lam Research Corporation,...

1. A method for etching using atomic layer etching in a plasma processing chamber of a plasma processing system, said plasma
processing chamber having at least one plasma generating source and at least a gas source for providing a process gas into
an interior region of said plasma processing chamber, comprising providing a plurality of cycles, wherein each cycle comprises:
flowing a first gas comprising a reactant gas and an inert gas into said processing chamber;
providing a first RF signal to form the first gas into a first plasma;
stopping the flow of the first gas into the processing chamber;
flowing a second gas into the processing chamber, wherein the second gas consists essentially of the inert gas;
providing a second RF signal different from the first RF signal to form the second gas into a second plasma; and
stopping the flow of the second gas into said processing chamber.

US Pat. No. 9,279,758

METHOD AND APPARATUS FOR DIAGNOSING STATUS OF PARTS IN REAL TIME IN PLASMA PROCESSING EQUIPMENT

LAM RESEARCH CORPORATION,...

1. A method of diagnosing status of a consumable part of a plasma reaction chamber, the consumable part including conductive
elements embedded therein, comprising:
coupling the conductive elements to a power supply so that a bias potential relative to the ground is applied to the conductive
elements;

exposing the consumable part to plasma erosion until one of the conductive elements draws a current from the plasma upon exposure
of the conductive element to the plasma;

measuring the current; and
evaluating a degree of erosion of the consumable part due to the plasma based on the measured current;
wherein the conductive elements are electrically connected to each other in series by a conducting wire.

US Pat. No. 9,230,819

INTERNAL PLASMA GRID APPLICATIONS FOR SEMICONDUCTOR FABRICATION IN CONTEXT OF ION-ION PLASMA PROCESSING

Lam Research Corporation,...

1. A method of plasma processing, comprising:
receiving a substrate in a reaction chamber, wherein the reaction chamber comprises a grid structure dividing the interior
of the reaction chamber into an upper sub-chamber proximate a plasma generator and a lower sub-chamber proximate a substrate
holder;

flowing a plasma generating gas into the upper sub-chamber;
generating a first plasma in the upper sub-chamber from the plasma generating gas, the first plasma having a first electron
density, and generating a second plasma in the lower sub-chamber, wherein the second plasma is an ion-ion plasma that has
a second electron density at least about 10 times lower than the first electron density; and

processing the substrate with the second plasma to perform a step in a source drain recess etch comprising:
(a) performing a first etching process to etch the substrate in a vertical direction to form vertically etched features;
(b) performing a second etching process to etch the substrate in a horizontal direction within the vertically etched features;
(c) performing an oxidation process to form an oxidized layer within the vertically etched features; and
(d) repeating (a)-(c) at least once to form source drain recesses in the vertically etched features,
wherein the first etching process, second etching process and oxidation process are all performed in the reaction chamber
having the grid structure such that the second plasma in each process is an ion-ion plasma.

US Pat. No. 9,224,583

SYSTEM AND METHOD FOR HEATING PLASMA EXPOSED SURFACES

Lam Research Corporation,...

1. A substrate support apparatus for a plasma processing system, comprising:
a layer of dielectric material having a top surface and a bottom surface, the top surface defined to support a substrate in
exposure to a plasma;

a number of optical fibers each having a first end and a second end, the first end defined to receive photons from a photon
source, the second end oriented to project photons received from the photon source onto the bottom surface of the layer of
dielectric material, wherein each of the number of optical fibers extends from the layer of dielectric material to the photon
source located outside of a chamber in which the layer of dielectric material is located, such that the first end of each
of the number of optical fibers is located outside of the chamber, wherein the second end of each of the number of optical
fibers is spaced apart from and pointed toward the bottom surface of the layer of dielectric material; and

a baseplate of thermally conductive material, the layer of dielectric material affixed to a top surface of the baseplate,
the baseplate including a number of passages through which the number of optical fibers are respectively routed.

US Pat. No. 9,130,158

METHOD TO ETCH NON-VOLATILE METAL MATERIALS

Lam Research Corporation,...

1. A method of etching a stack with at least one metal layer in one or more cycles with each cycle comprising:
performing an initiation step, transforming part of the at least one metal layer into metal oxide, metal halide, or lattice
damaged metallic sites;

performing a reactive step providing one or more cycles, where each cycle, comprises:
providing an organic solvent vapor to form a solvated metal, metal halide, or metal oxide state; and
providing an organic ligand solvent to form volatile organometallic compounds; and
performing a desorption of the volatile organometallic compounds.

US Pat. No. 9,123,651

DENSE OXIDE COATED COMPONENT OF A PLASMA PROCESSING CHAMBER AND METHOD OF MANUFACTURE THEREOF

LAM RESEARCH CORPORATION,...

1. An aluminum component of semiconductor processing equipment comprising:
a pure aluminum layer on a surface of the aluminum component of the semiconductor processing equipment; and
a dense oxide coating on the pure aluminum layer wherein the dense oxide coating has been formed using plasma electrolytic
oxidation, and wherein the plasma electrolytic oxidation causes the pure aluminum layer to undergo microplasmic discharge
forming the dense oxide coating on the aluminum component;

wherein the pure aluminum layer has a thickness of about 0.05 to 3 mm and the dense oxide coating has a thickness between
about 0.02 to 0.2 mm.

US Pat. No. 9,257,638

METHOD TO ETCH NON-VOLATILE METAL MATERIALS

Lam Research Corporation,...

18. A method of etching a stack with a pinned layer disposed below a MTJ stack, disposed below an Ru containing layer, disposed
below a hardmask layer, comprising:
etching the hardmask with a dry etch;
etching the Ru containing layer;
etching the MTJ stack;
capping the MTJ stack with dielectric materials; and
etching the pinned layer with chemistries selective to noble metals, comprising SOCl2/pyridine mixtures, HBr/DMSO mixtures, or a mixture of CCl4 with at least one of DMSO, acetonitrile, benzonitrile, or dimethylformamide (DMF).

US Pat. No. 9,171,702

CONSUMABLE ISOLATION RING FOR MOVABLE SUBSTRATE SUPPORT ASSEMBLY OF A PLASMA PROCESSING CHAMBER

Lam Research Corporation,...

1. A consumable isolation ring of an adjustable gap capacitively-coupled plasma processing chamber,
the consumable isolation ring having a rectangular cross section with an inner diameter of about 14.8 inches, an outer diameter
of about 15.1 inches, and a height of about 0.3 inch, and three recesses azimuthally spaced by 120° and disposed in a lower
outer edge of the consumable isolation ring, each recess consisting of a single semi-cylindrical walled portion connected
with a respective straight walled portion, wherein:

the semi-cylindrical walled portions of each recess have a diameter of about 0.1 inch, a center axis of the respective semi-cylindrical
walled portions located at a radius of about 7.5 inches from a center axis of the consumable isolation ring;

the straight walled portions of each recess open on an outer surface of the consumable isolation ring, the straight walled
portions having a width equal to the diameter of the respective semi-cylindrical walled portions connected to respective straight
walled portions;

each recess has a depth of about 0.09 inch; and
the consumable isolation ring configured to be supported on a step of a movable ground ring and wherein an inner surface of
the consumable isolation ring is vertically above and substantially coextensive with an inner surface of a sidewall of the
movable ground ring and an upper surface of the consumable isolation ring is substantially coextensive with an upper surface
of the sidewall of the movable ground ring, when the consumable isolation ring is supported on the step of the movable ground
ring.

US Pat. No. 9,299,539

METHOD AND APPARATUS FOR MEASURING WAFER BIAS POTENTIAL

Lam Research Corporation,...

1. A device for use in a wafer processing chamber having a plasma forming volume, a hot edge ring, the hot edge ring having
a first surface and a second surface, the first surface being in contact with the plasma forming volume, the second surface
not being in contact with the plasma forming volume, said device comprising:
a detector separated from the plasma forming volume by the hot edge ring and being operable to contact the second surface
of the hot edge ring, wherein said detector comprises indium,

wherein said detector is operable to detect a voltage of the hot edge ring and provide a detected signal based on the detected
voltage.

US Pat. No. 9,236,279

METHOD OF DIELECTRIC FILM TREATMENT

Lam Research Corporation,...

1. A method for cleaning a surface of a substrate after an etching operation, comprising:
providing a first application chemistry having an emulsion of a first immiscible liquid combined with a second immiscible
liquid, the second immiscible liquid dispersed in the form of droplets within the first immiscible liquid and a plurality
of solid particles distributed throughout the first immiscible liquid;

providing a second application chemistry having a wet cleaning chemistry configured to substantially clean the surface of
the substrate, the wet cleaning chemistry of the second application chemistry includes an organic solvent influenced to penetrate
and swell polymer residue contaminants when brought proximal to the polymer residues, the organic solvent is a glycol ether
compound, the second application chemistry includes about 1% to about 10% by weight of the glycol ether compound;

applying a mixture of the first and the second application chemistries directed toward the surface of the substrate using
a plurality of inlet ports of a proximity head, flow of the first and the second application chemistries through the plurality
of inlet ports controlled to provide a downward force so as to allow the solid particles within the first application chemistry
to come within an interactive range of particle contaminants present on the surface of the substrate and allow the second
application chemistry to penetrate and swell polymer residues present on the surface of the substrate,

wherein the downward force allows the solid particles within the first application chemistry to interact with the particle
contaminants and the swollen polymer residues to substantially overcome adhesive forces holding the particle contaminants
and the polymer residues to the surface of the substrate; and

removing the first and the second application chemistries along with the particle contaminants and the polymer residues released
from the surface of the substrate through a plurality of outlet ports of the proximity head.

US Pat. No. 9,245,718

SHOWERHEAD ELECTRODE ASSEMBLY IN A CAPACITIVELY COUPLED PLASMA PROCESSING APPARATUS

LAM RESEARCH CORPORATION,...

1. A showerhead electrode assembly of a plasma processing chamber, comprising:
a showerhead electrode;
a top plate configured to support the showerhead electrode;
a heater plate disposed between the top plate and the showerhead electrode; and
a heat transfer plate disposed between the showerhead electrode and the top plate, wherein the heat transfer plate comprises
a plurality of independently controllable gas volumes such that a gas pressure within any given one of the plurality of independently
controllable gas volumes does not affect another gas pressure within any other of the plurality of independently controllable
gas volumes.

US Pat. No. 9,472,675

METHOD OF MANUFACTURING N-DOPED GRAPHENE AND ELECTRICAL COMPONENT USING NH4F, AND GRAPHENE AND ELECTRICAL COMPONENT THEREBY

Korea Advanced Institute ...

1. A method of manufacturing n-doped graphene, comprising:
(a) preparing graphene and ammonium fluoride (NH4F); and

(b) exposing the graphene to the ammonium fluoride (NH4F),

wherein through (b), a fluorine layer is formed on part or all of upper and lower surfaces of a graphene layer, and ammonium
ions are physisorbed to part or all of the upper and lower surfaces of the graphene layer or defects between carbon atoms
of the graphene layer;

wherein exposing the graphene to the ammonium fluoride (NH4F) in (b) is performed using any one or a combination of two or more selected from among process of immersing graphene in
an ammonium fluoride (NH4F) aqueous solution, a process of spraying an ammonium fluoride (NH4F) aqueous solution onto graphene, and a process of spin coating graphene with an ammonium fluoride (NH4F) aqueous solution.

US Pat. No. 9,353,439

CASCADE DESIGN SHOWERHEAD FOR TRANSIENT UNIFORMITY

Lam Research Corporation,...

22. An apparatus for distributing gas across a semiconductor wafer, the apparatus comprising:
a plenum volume at least partially defined by a first surface of the apparatus, a second surface of the apparatus facing the
first surface, and one or more circumferential surfaces of the apparatus interposed between the first surface and the second
surface;

one or more gas inlets into the plenum volume through the first surface;
a first annular baffle; and
a backplate, wherein:
the first annular baffle is substantially centered on the one or more gas inlets,
the first annular baffle is substantially parallel to the first surface,
the first annular baffle is located between the first surface and the second surface,
the first annular baffle has an outer edge that is offset from the one or more circumferential surfaces such that a radial
gap exists between the first annular baffle and the one or more circumferential surfaces, and

the backplate provides the first surface and the one or more gas inlets are arranged to distribute gas onto the first annular
baffle.

US Pat. No. 9,918,376

HYBRID IMPEDANCE MATCHING FOR INDUCTIVELY COUPLED PLASMA SYSTEM

Lam Research Corporation,...

1. A system comprising:
a plasma system including a reaction chamber and an induction coil around the reaction chamber, the reaction chamber housing
a semiconductor substrate support pedestal;

a generator configured to generate a supply signal to power the induction coil for a plasma-facilitated process; and
an auto-matching network configured to receive the supply signal and to provide the supply signal to the induction coil of
the plasma system;

the generator further configured to detect a reflected power signal from the plasma system, and tune a frequency of the supply
signal to a tuned frequency for which the power of the reflected power signal is minimized; and

the auto-matching network further configured to synchronize with the generator and determine a phase and magnitude of the
supply signal at the tuned frequency after the generator tunes the frequency of the supply signal to the tuned frequency,
determine a phase and magnitude of a reflected power signal from the plasma system, and tune an impedance of the auto-matching
network to an impedance for which the differences in the determined phases and magnitudes, respectively, of the supply signal
and the reflected power signal are minimized.

US Pat. No. 9,583,386

INTERLEVEL CONDUCTOR PRE-FILL UTILIZING SELECTIVE BARRIER DEPOSITION

Lam Research Corporation,...

1. A method for manufacturing a semiconductor device, comprising:
providing a substrate having at least one dual damascene structure formed within a dielectric material over the substrate,
the at least one dual damascene structure including a trench and an opening formed to extend from a bottom of the trench to
an underlying conductive material such that the underlying conductive material is exposed at a bottom of the opening;

forming an amorphous carbon barrier layer on each sidewall of the opening without covering the underlying conductive material
exposed at the bottom of the opening;

performing a cleaning process on the substrate, with structures formed thereon, to remove material residues left over from
formation of the amorphous carbon barrier layer; and

performing an electroless deposition process to fill the opening with a metallic material in a bottom-to-top manner up to
the bottom of the trench, wherein the electroless deposition process initiates on the underlying conductive material exposed
at the bottom of the opening.

US Pat. No. 9,293,353

FARADAY SHIELD HAVING PLASMA DENSITY DECOUPLING STRUCTURE BETWEEN TCP COIL ZONES

Lam Research Corporation,...

1. A plasma processing chamber, comprising:
an electrostatic chuck for receiving a substrate;
a dielectric window connected to a top portion of the chamber, the dielectric window disposed over the electrostatic chuck;
a transformer coupled plasma (TCP) coil having a substantially flat coil distribution that is disposed over the dielectric
window;

a Faraday shield disposed inside of the chamber and defined between the electrostatic chuck and the dielectric window, the
Faraday shield having a flat circular plate structure that is disposed under the dielectric window and inside the chamber;
the Faraday shield includes,

(a) an inner zone having an inner radius range that includes a first and second plurality of slots;
(b) an outer zone having an outer radius range that includes a third plurality of slots, the inner zone being adjacent to
the outer zone; and

(c) a band ring separating the inner zone and the outer zone, such that the first and second plurality of slots do not connect
with the third plurality of slots,

wherein the inner zone and the outer zone are coupled together by way of the band ring,
wherein the band ring is part of the flat circular plate structure and the band ring has a width that is less than about 15
mm, the band ring is configured to decouple magnetic flux generation and having the width of the band ring less than 15 mm
acts to prevent plasma blockage under the band ring that would cause power non-uniformities to transfer to a substrate when
processed in the plasma processing chamber;

wherein the first, second and third plurality of slots are arranged and extend out radially from a center of the Faraday shield,
and the Faraday shield is electrically grounded.

US Pat. No. 9,293,926

PLASMA PROCESSING SYSTEMS HAVING MULTI-LAYER SEGMENTED ELECTRODES AND METHODS THEREFOR

Lam Research Corporation,...

1. A multi-layer segmented electrode defining an upper electrode of a plasma processing chamber, the upper electrode disposed
above a substrate support that defines a lower electrode of the plasma processing chamber, the multi-layer segmented electrode,
comprising:
a first layer comprising a first plurality of electrode segments wherein electrode segments of said first plurality of electrode
segments are spatially separated from one another along a first direction;

a second layer comprising a second plurality of electrode segments, wherein said second layer is spatially separated from
said first layer along a second direction perpendicular to said first direction, and wherein respective ones of said second
plurality of electrode segments are interleaved from respective ones of said first plurality of electrode segments in the
first direction, wherein said first direction is a direction parallel to a layer plane of said first layer, and wherein at
least two segmented electrodes of said first plurality of electrode segments are individually controllable.

US Pat. No. 9,245,739

LOW-K OXIDE DEPOSITION BY HYDROLYSIS AND CONDENSATION

Lam Research Corporation,...

1. A method of depositing a film on a semiconductor substrate, the method comprising:
introducing process gases comprising a silicon-containing precursor, an oxidant, and a halogen-free acid catalyst compound
to a reaction chamber; and

exposing the substrate to the process gases under conditions such that a condensed flowable film forms on the substrate,
wherein the chemical reactions that form the flowable film comprise a SN1 hydrolysis mechanism and condensation.

US Pat. No. 9,490,135

MOVABLE CHAMBER LINER PLASMA CONFINEMENT SCREEN COMBINATION FOR PLASMA PROCESSING APPARATUSES

LAM RESEARCH CORPORATION,...

1. A method of manufacturing a movable chamber liner, comprising:
hydroforming a metal plate to form an assembly consisting of a bottom wall and an outer cylindrical wall;
machining a piece of metal or casting molten metal to form an inner rim;
supporting a heater in thermal contact with the inner rim;
welding the hydroformed assembly of the bottom wall and the outer cylindrical wall to the inner rim; and
machining or drilling openings in the bottom wall to form a movable chamber liner configured to fit around a perimeter of
a substrate support, in a plasma reaction chamber useful for processing a semiconductor substrate.

US Pat. No. 9,455,126

ARRANGEMENT FOR PLASMA PROCESSING SYSTEM CONTROL BASED ON RF VOLTAGE

Lam Research Corporation,...

1. An arrangement for controlling a plasma processing system that includes a plasma processing chamber, the arrangement comprising:
a radio frequency (RF) sensing mechanism, said RF sensing mechanism is proximate to a non-plasma exposing component of an
electrostatic chuck (ESC) disposed within the plasma processing system, to obtain an RF voltage signal;

a voltage probe coupled to said RF sensing mechanism to facilitate acquisition of said RF voltage signal while reducing perturbation
of RF power driving a plasma in said plasma processing system;

a signal processing arrangement including,
an anti-aliasing filter to filter RF voltage signal received from the voltage probe;
a RF splitter to split the filtered RF voltage signal into a plurality of channels and to convert the RF voltage signal for
each of the plurality of channels into a corresponding direct current (DC) signal;

an analog-to-digital converter (ADC) to convert the DC signal of each of the plurality of channels in a digital domain to
a corresponding digital signal;

a digital processing block to process the digital signals within the digital domain, wherein the process includes,
(a) maintaining one of the digital signals as an unfiltered broadband version of the digital signal;
(b) filtering the digital signals, wherein the filtering includes detecting a peak voltage of each frequency of the plurality
of channels and peak voltage of a composite broadband signal;

(c) calibrating each of the plurality of digital signals;
(d) computing a transfer function using the digital signals as input to obtain a transfer function output, the transfer function
output accounting for contribution of frequency of each of the plurality of channels of the RF voltage signal in wafer bias;
and

an ESC power supply subsystem configured to receive said transfer function output as a feedback signal to control said plasma
processing system.

US Pat. No. 9,101,038

ELECTROSTATIC CHUCK INCLUDING DECLAMPING ELECTRODE AND METHOD OF DECLAMPING

LAM RESEARCH CORPORATION,...

1. A semiconductor wafer processing apparatus for processing semiconductor wafers, comprising:
a processing chamber in which a semiconductor wafer is processed;
a process gas source in fluid communication with the processing chamber adapted to supply process gas into the processing
chamber;

a vacuum source adapted to exhaust process gas and byproducts of the processing from the processing chamber; and
an electrostatic chuck assembly comprising a support surface in a layer of ceramic material on which the semiconductor wafer
is supported during processing of the wafer in the chamber; at least one electrostatic clamping electrode embedded in the
layer of ceramic material, the at least one electrostatic clamping electrode operable to apply an electrostatic clamping force
to the wafer on the support surface when an electrostatic clamping voltage is applied to the clamping electrode; and at least
one declamping electrode embedded in the layer of ceramic material above the at least one electrostatic clamping electrode
operable to provide a path for draining any residual charge between the wafer and the support surface when the electrostatic
clamping voltage is no longer applied to the clamping electrode.

US Pat. No. 9,617,638

METHODS AND APPARATUSES FOR SHOWERHEAD BACKSIDE PARASITIC PLASMA SUPPRESSION IN A SECONDARY PURGE ENABLED ALD SYSTEM

Lam Research Corporation,...

1. A method of depositing a film of material on a semiconductor substrate in a processing chamber, the method comprising:
(a) flowing a film precursor into the processing chamber;
(b) adsorbing the film precursor onto a substrate in the processing chamber, such that the precursor forms an adsorption-limited
layer on the substrate;

(c) removing at least some unadsorbed film precursor from the volume surrounding the adsorbed precursor by purging the processing
chamber with a primary purge gas; and

(d) reacting adsorbed film precursor while a secondary purge gas is flowed into the processing chamber, after removing unadsorbed
precursor with the primary purge gas in (c), to form a film layer on the substrate;
wherein the secondary purge gas comprises a chemical species having an ionization energy and/or a disassociation energy equal
to or greater than that of O2.

US Pat. No. 9,412,609

HIGHLY SELECTIVE OXYGEN FREE SILICON NITRIDE ETCH

Lam Research Corporation,...

1. A method for selectively etching silicon nitride with respect to silicon oxide, comprising
providing an oxygen free silicon nitride etch gas comprising H2 and either CF4 or CXHYFZ (X?1, Y?1, Z?1); and

providing an RF power to form the etch gas into a plasma, wherein the silicon nitride is exposed to the plasma, wherein the
RF power is pulsed, wherein the RF pulsing has a duty cycle between 25% to 75% inclusive, wherein during a phase of the duty
cycle when RF power is not provided polymer is deposited and when RF power is provided polymer is removed and the silicon
nitride is selectively etched with respect to silicon oxide and wherein the etch selectivity of silicon nitride to silicon
oxide is greater than 20:1.

US Pat. No. 9,257,300

FLUOROCARBON BASED ASPECT-RATIO INDEPENDENT ETCHING

Lam Research Corporation,...

1. A method for etching features into an etch layer disposed below a patterned mask, comprising performing at least three
cycles, wherein each cycle comprises:
providing by creating a plasma, an ion bombardment of the etch layer to create activated sites in parts of the etch layer
exposed by the patterned mask;

extinguishing the plasma;
while the plasma is extinguished, exposing the etch layer to a plasma free gas comprising a plurality of fluorocarbon containing
molecules, which causes the plurality of fluorocarbon containing molecules to selectively bind to the activated sites, wherein
the selective binding is self limited by the number of activated sites; and

providing an ion bombardment of the etch layer to initiate an etch reaction between the fluorocarbon containing molecules
and the etch layer, wherein the ion bombardment of the etch layer to initiate an etch reaction causes the formation of volatile
etch products formed from the etch layer and the fluorocarbon containing molecule.

US Pat. No. 9,128,473

ARRANGEMENT FOR PLASMA PROCESSING SYSTEM CONTROL BASED ON RF VOLTAGE

Lam Research Corporation,...

1. An arrangement for controlling a plasma processing system including a plasma processing chamber, comprising:
a radio frequency (RF) sensing mechanism, said RF sensing mechanism is proximate to a non-plasma exposing component of said
electrostatic chuck (ESC) to obtain an RF voltage signal;

a voltage probe coupled to said RF sensing mechanism to facilitate acquisition of said RF voltage signal while reducing perturbation
of RF power driving a plasma in said plasma processing system;

a signal processing arrangement configured for
receiving said RF voltage signal,
processing said RF voltage signal in a digital domain to obtain peak voltage information for a fundamental frequency and a
broadband frequency of said RF voltage signal, the processing used to convert the fundamental and broadband frequencies of
the RF voltage signal to direct current (DC) signals,

deriving wafer bias information from said peak voltage information by converting the DC signals of said fundamental and broadband
frequencies of the RF voltage signal to a digital version and applying said digital version of said RF voltage signal to a
transfer function to obtain a transfer function output, the transfer function output accounting for contribution of each frequency
of the RF voltage signal in wafer bias; and

an ESC power supply subsystem configured to receive said transfer function output as a feedback signal to control said plasma
processing system.

US Pat. No. 9,099,398

GAS DISTRIBUTION SHOWERHEAD FOR INDUCTIVELY COUPLED PLASMA ETCH REACTOR

LAM RESEARCH CORPORATION,...

1. A ceramic showerhead of uniform thickness configured to form a vacuum wall at the top of an inductively coupled plasma
processing apparatus wherein semiconductor substrates supported on a substrate support are subjected to plasma etching, comprising:
a lower plate of ceramic material having a planar lower surface, axially extending gas holes having diameters of less than
0.06 inch and aspect ratios of at least 2 located in an annular zone on an outer portion and extending between upper and lower
surfaces, a vacuum sealing surface located on the outer portion at an outer periphery of the lower surface, and inner and
outer vacuum sealing surfaces on the upper surface defining the annular zone in which the axially extending gas holes are
located; an upper plate of ceramic material having planar upper and lower surfaces, the upper plate overlying the lower plate
such that a plenum is located between opposed surfaces of the upper and lower plates and the gas holes are in fluid communication
with the plenum.

US Pat. No. 9,481,942

GEOMETRY AND PROCESS OPTIMIZATION FOR ULTRA-HIGH RPM PLATING

Lam Research Corporation,...

1. An apparatus for electroplating metal onto a substrate, the apparatus comprising:
a substrate support for supporting the substrate at its periphery, wherein when the substrate is present in the substrate
support, a plating face of the substrate is held in a substrate plating plane;

a plating gap formed below the substrate plating plane and above an opposing surface positioned under the substrate plating
plane;

a pump for delivering electrolyte such that the electrolyte flows into the plating gap;
a peripheral passage positioned radially outside of the substrate support, wherein the peripheral passage has a dimensionless
peripheral passage parameter of about 2 or greater, and wherein electrolyte flows through the peripheral passage after the
electrolyte exits the plating gap at the periphery of the plating gap and before the electrolyte reaches an electrolyte-air
interface; and

a controller having instructions to control electroplating in a manner that does not result in the passage of air through
the peripheral passage and under the substrate.

US Pat. No. 9,353,444

TWO-STEP DEPOSITION WITH IMPROVED SELECTIVITY

Lam Research Corporation,...

18. A method for providing an electroless plating over at least one copper containing layer, comprising:
sealing surfaces of the at least one copper containing layer by selectively depositing a sealing layer of catalytically active
metal on the at least one copper containing layer, comprising exposing the at least one copper containing layer to a sealing
bath comprising a borane containing component and that provides an electroless deposition of a catalytically active metal;

exposing the sealing layer to a borane free electroless deposition bath comprising a phosphorous containing component, wherein
the electroless deposition bath is more reactive to the catalytically active metal than to the at least one copper containing
layer to provide an electroless deposition on the sealing layer, and wherein the sealing bath is more reactive to copper than
the electroless deposition bath.

US Pat. No. 9,275,869

FAST-GAS SWITCHING FOR ETCHING

Lam Research Corporation,...

1. A method of for etching a layer in a plasma chamber with an inner injection zone gas feed and an outer injection zone gas
feed, comprising:
placing the layer in the plasma chamber;
providing a pulsed etch gas from the inner injection zone gas feed at a first frequency, wherein flow of pulsed etch gas from
the inner injection zone gas feed ramps down to zero during providing the pulsed etch gas from the inner injection zone gas
feed;

providing the pulsed etch gas from the outer injection zone gas feed at the first frequency and simultaneous with and out
of phase with the pulsed etch gas from the inner injection zone gas feed, wherein the outer injection zone surrounds the inner
injection zone, wherein flow of pulsed etch gas from the outer injection zone gas feed ramps down to zero during providing
the pulsed etch gas from the outer injection zone gas feed at the first frequency; and

forming the etch gas into a plasma to etch the layer, simultaneous with the providing the pulsed etch gas from the inner injection
zone gas feed and providing the pulsed gas from the outer interjection zone gas feed, wherein the inner injection zone gas
feed is above a center of the layer and wherein the inner injection zone gas feed directs the etch gas directly towards the
center of the layer, and wherein the outer injection zone gas feed directs the etch gas at an acute angle with respect to
the layer.

US Pat. No. 9,171,699

IMPEDANCE-BASED ADJUSTMENT OF POWER AND FREQUENCY

Lam Research Corporation,...

1. A system comprising:
a digital pulsing source for generating a pulsed signal;
a primary generator including:
a primary driver and amplifier coupled to an electrode for supplying a primary radio frequency (RF) signal to the electrode;
one or more primary processors coupled to the digital pulsing source for receiving the pulsed signal,
the one or more primary processors configured to:
identify a first one of two states of the pulsed signal and a second one of the two states;
determine to provide a primary power value to the primary driver and amplifier when the pulsed signal is in the first state;
and

determine to provide a primary frequency value of the primary RF signal when the pulsed signal is in the first state; and
a secondary generator including:
a secondary driver and amplifier coupled to the electrode for supplying a secondary RF signal to the electrode;
one or more secondary processors coupled to the digital pulsing source for receiving the pulsed signal,
the one or more secondary processors configured to:
determine whether a parameter associated with plasma exceeds a first boundary when the pulsed signal is in the first state;
determine whether the parameter exceeds a second boundary when the pulsed signal is in the second state;
determine to provide a first secondary power value to the secondary driver and amplifier in response to determining that the
parameter exceeds the first boundary;

determine to provide a second secondary power value to the secondary driver and amplifier in response to determining that
the parameter exceeds the second boundary;

determine to provide a first secondary frequency value to the secondary driver and amplifier in response to determining that
the parameter exceeds the first boundary; and

determine to provide a second secondary frequency value to the secondary driver and amplifier in response to determining that
the parameter exceeds the second boundary.

US Pat. No. 9,117,767

NEGATIVE ION CONTROL FOR DIELECTRIC ETCH

Lam Research Corporation,...

10. A capacitively-coupled plasma chamber, comprising:
a bottom radio frequency (RF) signal generator coupled to a bottom electrode, the bottom RF signal set at a first phase; and
an RF phase controller configured to calculate a predetermined value as a travel time required for negative ions formed near
a top plasma sheath of the plasma to travel a predetermined distance from a top electrode to the bottom electrode, wherein
the RF phase controller is configured to receive the bottom RF signal and generate a top RF signal set at a same frequency
as the bottom RF signal and set at a second phase, the top RF signal being coupled to the top electrode, wherein the RF phase
controller is configured to track the first phase and set a value of the second phase based on the predetermined value, wherein
the RF phase controller is configured to maintain a time difference between a maximum of the top RF signal and a minimum of
the bottom RF signal at the predetermined value.

US Pat. No. 9,230,779

METHODS AND APPARATUS FOR CORRECTING FOR NON-UNIFORMITY IN A PLASMA PROCESSING SYSTEM

Lam Research Corporation,...

1. A plasma processing system having a plasma processing chamber, comprising:
at least one of a chamber wall and a chamber liner,
a plurality of ground straps disposed around a circumference of a chamber surface, said chamber surface being one of said
chamber wall and said chamber liner of said plasma processing chamber;

a plurality of impedance devices disposed around the circumference of the chamber surface and each is associated with a respective
one of the plurality of ground straps; and

a first impedance device of the plurality of impedance devices is coupled to a first ground strap of said plurality of ground
straps, wherein a second impedance device of the plurality of impedance devices is coupled to a second ground strap of said
plurality of ground straps;

wherein the first and second impedance devices are individually tunable to define an intentional non-symmetric impedance at
a region around the circumference of the chamber surface to compensate for azimuthal non-uniformities in the plasma processing
system;

wherein each of the plurality of impedance devices is a coil that is wound around each respective one of the plurality of
ground straps;

wherein a coil current value is provided to each coil to induce a current in each of the plurality of ground straps.

US Pat. No. 9,967,965

DISTRIBUTED, CONCENTRIC MULTI-ZONE PLASMA SOURCE SYSTEMS, METHODS AND APPARATUS

Lam Research Corporation,...

1. A processing chamber comprising:a plurality of plasma sources disposed horizontally over a process chamber top of the processing chamber, wherein each one of the plurality of plasma sources has a ring shaped chamber that is a closed loop that includes a top chamber surface, side chamber surfaces and a bottom chamber surface, such that a primary winding is wrapped around an outer circumference of the ring shaped chamber and a plurality of ferrites encircle the ring shaped chamber, wherein both the primary winding and the ring shaped chamber of each of the plurality of plasma sources pass through a respective set of said plurality of ferrites, wherein the plurality of plasma sources includes at least an inner plasma source and an outer plasma source, the ring shaped chamber of the outer plasma source surrounds the ring shaped chamber of the inner plasma source; and
a plurality of plasma chamber outlets coupling the ring shaped chamber of each one of the plurality of plasma sources to the processing chamber, the ring shaped chambers of plurality of plasma sources being arranged in a concentric arrangement
wherein each of said plurality of ferrites encircle the ring shaped chamber of respective one of each of the plasma sources at discrete cross-sections, such that at each discrete cross-section a ferrite includes a bottom region, side regions and a top region, and the bottom region of each ferrite is disposed adjacent to said bottom chamber surface of the respective ring shaped chamber, the side regions of each ferrite is disposed adjacent to said side chamber surfaces of the respective ring shaped chamber, the top region of each ferrite is disposed adjacent to said top chamber surface of the respective ring shaped chamber, for said encircling of the ring shaped chamber.

US Pat. No. 9,508,529

SYSTEM, METHOD AND APPARATUS FOR RF POWER COMPENSATION IN A PLASMA PROCESSING SYSTEM

Lam Research Corporation,...

1. A plasma processing system comprising:
a plasma processing chamber including an electrostatic chuck;
an RF transmission path including:
at least one RF generator;
a match circuit having an input coupled to an output of the at least one RF generator; and
an RF feed coupling a match circuit output to an RF input to the electrostatic chuck;
an RF return path coupled between the plasma processing chamber and the at least one RF generator; and
a plasma processing system controller coupled to the plasma processing chamber and the RF transmission path, the system controller
including:

a recipe logic including computer readable instructions for at least one plasma processing recipe including a plurality of
plasma processing settings; and

an RF power compensation logic including computer readable instructions for adjusting at least one of the plurality of plasma
processing settings.

US Pat. No. 9,431,268

ISOTROPIC ATOMIC LAYER ETCH FOR SILICON AND GERMANIUM OXIDES

Lam Research Corporation,...

1. A method of controllably etching an oxide layer on a substrate, the method comprising:
(a) contacting the substrate housed in a process chamber with an active hydrogen-containing species to modify the surface
of the oxide on the substrate, wherein the active hydrogen-containing species is a compound containing one or more OH groups,
or a hydrogen-containing species generated in a hydrogen plasma, wherein the oxide is selected from the group consisting of
silicon oxide, germanium oxide, and combinations thereof, and wherein the contacting of the substrate with the active hydrogen-containing
species is performed without flowing HF into the process chamber;

(b) removing non surface-bound active hydrogen species from the process chamber after the surface of the oxide is modified;
(c) flowing an anhydrous HF into the process chamber after (b) without flowing an active hydrogen-containing species into
the process chamber, wherein the anhydrous HF reacts with the modified surface of the oxide and wherein the reaction generates
water;

(d) removing the water generated in (c) from the surface of the substrate.

US Pat. No. 9,349,621

VACUUM SEAL ARRANGEMENT USEFUL IN PLASMA PROCESSING CHAMBER

LAM RESEARCH CORPORATION,...

1. A vacuum seal arrangement comprising:
a one-piece elastomeric gasket having at least first and second O-rings interconnected by a planar web;
a first part having a first planar sealing surface with a dove-tail groove therein holding the first O-ring and a square walled
groove therein holding the second O-ring, wherein the first and second O-rings are concentric and the square walled groove
is radially inward of the dove tail groove with respect to the first planar sealing surface, the first part further including
at least one passage in the first planar sealing surface surrounded by the first O-ring or second O-ring, wherein the passage
opens into an inner portion of the square walled groove; and

a second part attached to the first part;
wherein
the second part has a passage in a second planar sealing surface;
the passage in the second planar sealing surface is aligned with and in fluid communication with the passage in the first
planar sealing surface; and

a third part having a third planar sealing surface clamped against the second O-ring, wherein the third part surrounds the
second part.

US Pat. No. 9,137,884

APPARATUS AND METHOD FOR PLASMA PROCESSING

Lam Research Corporation,...

1. An apparatus for plasma processing, comprising:
a chamber for plasma processing with an external wall; and
at least one inductor adjacent to the chamber for providing a radio frequency induction field, wherein the inductor is a cylindrical
spiral coil that surrounds a part of the chamber, the inductor including,

an end terminal connected to a radio frequency power supply;
another end terminal that is open-ended; and
a grounded terminal that is directly coupled to electrical ground at a position that is substantially central about a length
of the inductor between the end terminal and the other end terminal;

wherein the other end terminal that is open-ended develops equal and opposite voltage against voltage at the end terminal
that is connected to the radio frequency power supply.

US Pat. No. 9,120,201

PLATEN AND ADAPTER ASSEMBLIES FOR FACILITATING SILICON ELECTRODE POLISHING

Lam Research Corporation,...

1. A dual function electrode platen comprising
a plurality of axially yielding electrode mounts arranged to project from an electrode engaging face of the dual function
electrode platen and to complement respective positions of axially yielding mount receptacles formed in a platen engaging
face of a silicon electrode, wherein the axially yielding electrode mounts and the axially yielding mount receptacles are
configured to permit non-destructive engagement and disengagement of the electrode engaging face of the electrode platen and
the platen engaging face of the silicon electrode in a unitary direction; and

platen adapter abutments positioned radially inward of the axially yielding electrode mounts, wherein the platen adapter abutments
are configured to bring a platen adapter centroid of a platen adapter into approximate alignment with an electrode platen
centroid of the dual function electrode platen.

US Pat. No. 9,435,049

ALKALINE PRETREATMENT FOR ELECTROPLATING

Lam Research Corporation,...

1. A method of electroplating a metal on a wafer substrate comprising one or more recessed features, the method comprising:
(a) providing a wafer substrate having an exposed nickel-containing layer on at least a portion of its surface;
(b) contacting the wafer substrate with a pre-wetting liquid, the liquid comprising a buffer and having a pH in a range of
between about 7 and about 13 to pre-wet the nickel-containing layer on the wafer substrate, wherein the wafer substrate retains
the buffer-containing pre-wetting liquid after the pre-wetting; and

(c) electrodepositing the metal onto the pre-wetted nickel-containing layer using an acidic plating solution, such that the
acidic plating solution contacts the pre-wetting liquid retained on the wafer substrate, wherein the electrodeposited metal
at least partially fills the one or more recessed features.

US Pat. No. 9,384,979

APPARATUS FOR THE DEPOSITION OF A CONFORMAL FILM ON A SUBSTRATE AND METHODS THEREFOR

Lam Research Corporation,...

1. An apparatus for depositing a conformal film on a substrate, the apparatus comprising:
a plasma processing chamber, comprising:
a chuck configured to mount a substrate thereon;
a gas system for:
introducing a first gas composition that includes at least carbon and a second gas composition into the chamber, wherein the
first gas composition and the second gas composition comprise different gas compositions, wherein the first gas composition
attains a first pressure, and

evacuating at least one of the first gas and the second gas out of the chamber;
a cooling apparatus coupled with the chuck, the cooling apparatus configured to enable cooling of the chuck such that the
substrate cools to below a condensation temperature of the first gas composition such that at least some of the first gas
composition condenses on the substrate;

a plasma generator suitably arranged to strike a plasma within the plasma processing chamber; and
a controller operatively connected with the apparatus, comprising:
at least one processor; and
non-transitory computer readable media, comprising:
computer readable instructions for cooling a chuck such that a substrate mounted thereon cools to below a condensation temperature
of the first gas composition such that at least some of the first gas composition condenses on the substrate;

computer readable instructions for introducing the first gas composition into the plasma processing chamber;
computer readable instructions for condensing at least some of the first gas mixture onto the substrate;
computer readable instructions for evacuating the first gas composition from the plasma processing chamber;
computer readable instructions for introducing the second gas composition into the plasma processing chamber after the first
gas composition has been evacuated; and

computer readable instructions for striking a plasma from the second gas mixture in the plasma processing chamber; wherein
the computer readable instructions for introducing the first gas introduces the first gas at a first pressure and wherein
the computer readable instructions for introducing the second gas introduces the second gas at a second pressure different
than the first pressure.

US Pat. No. 9,385,021

ELECTRONIC KNOB FOR TUNING RADIAL ETCH NON-UNIFORMITY AT VHF FREQUENCIES

Lam Research Corporation,...

1. A method for processing a wafer, comprising:
providing a chamber with an electrode assembly that includes a support surface and an outer edge region defined therein, the
chamber defined for plasma processing of the wafer;

determining radio frequency (RF) power to be applied to the electrode assembly of the chamber via a conductive delivery connection,
the conductive delivery connection having a dimension;

determining capacitance value to be set at a variable capacitor disposed between a matching circuit of an RF power source
and a first end of the conductive delivery connection so as to cause an impedance adjustment at a first end of the conductive
delivery connection and an opposite impedance adjustment at a second end of the conductive delivery connection, the capacitance
value determined based on the RF power to be applied and the dimension of the conductive delivery connection; and

tuning the variable capacitor at the first end to the capacitance value, the tuning causing the opposite impedance adjustment
at the second end of the conductive delivery connection, the opposite impedance adjustment being transmitted to an outer edge
region of the electrode assembly, wherein the opposite impedance adjustment causes a corresponding change in voltage distribution
at the outer edge region of the electrode assembly.

US Pat. No. 9,119,283

CHAMBER MATCHING FOR POWER CONTROL MODE

Lam Research Corporation,...

1. A method for performing chamber-to-chamber matching, the method comprising:
executing a first test within a first plasma chamber to measure a variable, wherein the first test is executed under a condition
that places the first plasma chamber in a no plasma zone;

executing a second test within a second plasma chamber to measure the variable, wherein the first and second tests are executed
based on one recipe, wherein the second test is executed under a condition that places the second plasma chamber in the no
plasma zone;

determining a first relationship between the variable measured with the first test and power provided during the first test;
determining a second relationship between the variable measured with the second test and power provided during the second
test; and

identifying power adjustment to apply to the second plasma chamber during a subsequent processing operation based on the first
and second relationships, the power adjustment causing the second plasma chamber to perform the processing operation in a
processing condition determined using the first plasma chamber, wherein during the processing operation, plasma is stricken
within the second plasma chamber.

US Pat. No. 9,082,826

METHODS AND APPARATUSES FOR VOID-FREE TUNGSTEN FILL IN THREE-DIMENSIONAL SEMICONDUCTOR FEATURES

Lam Research Corporation,...

1. A method of filling a 3-D structure of a partially manufactured semiconductor substrate with a tungsten-containing material,
the 3-D structure comprising sidewalls, a plurality of openings in the sidewalls leading to a plurality of features having
a plurality of interior regions fluidically accessible through the openings, the method comprising:
providing a substrate having the 3-D structure to a processing chamber;
depositing a first layer of the tungsten-containing material within the 3-D structure such that the first layer partially
fills the plurality of interior regions of the 3-D structure;

etching vertically after depositing the first layer of the tungsten-containing material, the vertical etching comprising removing
portions of the first layer from the sidewalls using a first activated etching material without substantially removing portions
of the first layer from the plurality of interior regions;

etching horizontally after depositing the first layer of the tungsten-containing material, the horizontal etching comprising
removing portions of the first layer from the plurality of interior regions using a second activated etching material; and

depositing a second layer of the tungsten-containing material within the 3-D structure after etching vertically and horizontally
such that the second layer fills at least a portion of the interior regions left unfilled by the first layer.

US Pat. No. 9,576,833

ROBOT FOR A SUBSTRATE PROCESSING SYSTEM

LAM RESEARCH CORPORATION,...

1. A robot for a substrate processing system, the robot comprising:
a first arm including a first arm portion connected to a base, a second arm portion connected to the first arm portion, and
an end effector connected to the second arm portion, wherein the first arm is configured to actuate between a fully retracted
position and a plurality of extended positions; and

a second arm including a first arm portion connected to the base, a second arm portion connected to the first arm portion,
and an end effector connected to the second arm portion, wherein the second arm is configured to actuate between a fully retracted
position and a plurality of extended positions,

wherein the end effector of the first arm is configured to support a first substrate and the end effector of the second arm
is configured to support a second substrate, and

wherein, when the first arm and the second arm are in the respective fully retracted positions, the first substrate is spaced
apart from and does not overlap the second substrate, and

wherein, when the first arm and the second arm are in the fully retracted position:
a connection between the second arm portion of the first arm and the end effector of the first arm is above and overlaps the
second substrate; and

the first substrate is above and overlaps a connection between the second arm portion of the second arm and the end effector
of the second arm.

US Pat. No. 9,476,124

SELECTIVE DEPOSITION AND CO-DEPOSITION PROCESSES FOR FERROMAGNETIC THIN FILMS

LAM RESEARCH CORPORATION,...

1. A method for selectively depositing a ferromagnetic layer on a conducting layer, comprising:
providing a substrate including a conducting layer;
preparing a solution including a metal salt;
adding a complexing agent to the solution;
adding a reducing agent to the solution, wherein the reducing agent comprises titanium trichloride and does not include any
one of hypophosphite, borohydride, and dimethylamine borane;

while a temperature of the solution is less than 50° C., immersing the substrate in the solution for a predetermined period
to deposit a ferromagnetic layer on the conducting layer by electroless deposition, wherein the ferromagnetic layer comprises
one of cobalt (Co), iron (Fe) or CoFe; and

after the predetermined period, removing the substrate from the solution.

US Pat. No. 9,390,893

SUB-PULSING DURING A STATE

Lam Research Corporation,...

1. A method comprising:
receiving a clock signal from a clock source, the clock signal having two states including a first state and a second state;
generating a pulsed signal from the clock signal, the pulsed signal having sub-states within the first state, the sub-states
alternating with respect to each other at a frequency greater than a frequency of the states;

providing the pulsed signal to control power of a first radio frequency (RF) signal that is generated by a first RF generator,
the power controlled to be synchronous with the pulsed signal;

supplying the first RF signal having the sub-states and having the second state to an impedance matching circuit connected
to an electrode of a plasma chamber; and

supplying from a second RF generator a second RF signal having the first state without the sub-states and having the second
state to the impedance matching circuit that is connected to the electrode.

US Pat. No. 9,197,196

STATE-BASED ADJUSTMENT OF POWER AND FREQUENCY

Lam Research Corporation,...

1. A system comprising:
a digital pulsing source for generating a pulsed signal;
a primary generator including:
a primary power supply coupled to an electrode for supplying a primary radio frequency (RF) signal to the electrode;
a primary processor coupled to the digital pulsing source for receiving the pulsed signal, the primary processor for identifying
a first one of two states of the pulsed signal and a second one of the two states;

a first primary power controller coupled to the primary processor to provide a first primary power value to the primary power
supply when the pulsed signal is in the first state;

a second primary power controller coupled to the primary processor to provide a second primary power value to the primary
power supply when the pulsed signal is in the second state;

a first primary automatic frequency control (AFC) coupled to the primary processor to receive the state identification from
the primary processor, the first primary AFC configured to provide a first primary frequency input to the primary RF signal
when the pulsed signal is in the first state; and

a second primary AFC coupled to the primary processor to receive the state identification from the primary processor, the
second primary AFC configured to provide a second primary frequency input to the primary RF signal when the pulsed signal
is in the second state;

a secondary generator including:
a secondary power supply coupled to the electrode for supplying a secondary RF signal to the electrode;
a secondary processor coupled to the digital pulsing source for receiving the pulsed signal to identify whether the pulsed
signal is in the first state or the second state;

a first secondary power controller coupled to the secondary processor to provide a first secondary power value to the secondary
power supply when the pulsed signal is in the first state;

a second secondary power controller coupled to the secondary processor to provide a second secondary power value to the secondary
power supply when the pulsed signal is in the second state;

a first secondary AFC coupled to the secondary processor to receive the state identification from the secondary processor,
the first secondary AFC configured to provide a first secondary frequency input to the secondary RF signal when the pulsed
signal is in the first state; and

a second secondary AFC coupled to the secondary processor to receive the state identification from the secondary processor,
the second secondary AFC configured to provide a second secondary frequency input to the secondary RF signal when the pulsed
signal is in the second state.

US Pat. No. 9,145,607

TANDEM SOURCE ACTIVATION FOR CYCLICAL DEPOSITION OF FILMS

LAM RESEARCH CORPORATION,...

1. A method for processing a substrate in a substrate processing system, comprising:
a) flowing reactant gases into a process chamber;
b) supplying, from a first power source, plasma having a first power level;
c) dosing the process chamber with precursor, wherein the first power level is sufficient to enhance adsorption of the precursor
on a surface of the substrate, and wherein the first power level is insufficient to decompose the precursor that is adsorbed;

d) after a first predetermined period, removing a portion of the precursor that does not adsorb onto the substrate from the
process chamber while the plasma having the first power level is still being supplied from the first power source;

e) activating the precursor that is adsorbed using plasma having a second power level supplied from a second power source
while the plasma having the first power level is still being supplied from the first power source, wherein the second power
level is greater than the first power level and is sufficient to decompose the precursor that is adsorbed; and

f) removing reactants from the process chamber while the plasma having the first power level is still being supplied from
the first power source,

wherein the first power level is supplied from the first power source from (b) to (f) such that supplying the plasma having
the first power level from the first power source occurs at a same time as supplying the plasma having the second power level
from the second power source.

US Pat. No. 9,083,182

BYPASS CAPACITORS FOR HIGH VOLTAGE BIAS POWER IN THE MID FREQUENCY RF RANGE

Lam Research Corporation,...

1. A system for decoupling arcing RF signals in a plasma chamber comprising:
a plasma chamber including:
a top electrode;
an electrostatic chuck for supporting a semiconductor wafer; and
a capacitor coupled between the at least one of a plurality of clamping electrodes in the surface of the electrostatic chuck
and a baseplate of the electrostatic chuck, the capacitor having a capacitance of greater than about 19 nanofarads, the capacitor
disposed within an interior volume of the electrostatic chuck;

a plurality of lift pins supported in a corresponding plurality of lift pin holes in the surface of the electrostatic chuck,
wherein each one of the plurality of lift pins has a clearance of less than about 0.011 inches (0.25 mm) between a corresponding
side in a corresponding one of a plurality of lift pin holes in the surface of the electrostatic chuck.

US Pat. No. 9,076,831

SUBSTRATE CLAMPING SYSTEM AND METHOD FOR OPERATING THE SAME

Lam Research Corporation,...

1. A substrate clamping system, comprising:
an electrostatic chuck including a baseplate and a substrate support member disposed on the baseplate, the baseplate formed
of an electrically conductive material, the electrostatic chuck including a first set of clamp electrodes disposed within
the substrate support member and a second set of clamp electrodes disposed within the substrate support member;

a power supply system including a clamp power supply, a center tap power supply, and a baseplate power supply, the clamp power
supply defined to generate a positive output voltage and a negative output voltage, the positive and negative output voltages
equidistant from a center tap voltage, the positive output voltage electrically connected to the first set of clamp electrodes,
the negative output voltage electrically connected to the second set of clamp electrodes, the center tap power supply defined
to control the center tap voltage of the clamp power supply, the baseplate power supply defined to generate a baseplate output
voltage independent from the center tap voltage, the baseplate output voltage electrically connected to the baseplate; and

a bias resistor electrically connected between a terminal of the clamp power supply at which the negative output voltage is
generated and a ground reference potential.

US Pat. No. 9,609,730

ADJUSTMENT OF VUV EMISSION OF A PLASMA VIA COLLISIONAL RESONANT ENERGY TRANSFER TO AN ENERGY ABSORBER GAS

Lam Research Corporation,...

16. A method of etching a feature on the surface of a semiconductor substrate, the method comprising:
(a) adsorbing an etchant onto the surface of a semiconductor substrate such that the etchant forms an adsorption-limited layer
on the surface;

(b) after (a), removing unadsorbed and/or desorbed etchant from the volume surrounding the adsorbed etchant;
(c) after (b), generating a plasma in the processing chamber, the plasma comprising helium and neon, the plasma emitting VUV
radiation;

(d) contacting the adsorbed etchant with the plasma to etch the surface of the substrate; and
(e) repeating (a)-(d) multiple times and adjusting the emission of VUV radiation from the plasma in (d) by altering the concentration
ratio of helium to neon in the plasma, thereby altering the anisotropy of the etching of the surface of the substrate.

US Pat. No. 9,387,521

METHOD OF WET CLEANING ALUMINUM CHAMBER PARTS

Lam Research Corporation,...

1. A method of wet cleaning an aluminum part comprising bare aluminum surfaces and anodized aluminum surfaces, the method
comprising:
CO2 dry ice blasting at approximately 35 to approximately 45 psi the surfaces of the aluminum part;

masking the aluminum part to conceal the bare aluminum surfaces;
soaking the dry ice blasted and masked aluminum part in deionized water at or above approximately 60° C;
scrubbing the aluminum part with an abrasive pad and deionized water after completion of the soaking in deionized water; and
repeating the soaking and scrubbing in the recited order at least three additional times.

US Pat. No. 9,287,096

METHODS AND APPARATUS FOR A HYBRID CAPACITIVELY-COUPLED AND AN INDUCTIVELY-COUPLED PLASMA PROCESSING SYSTEM

Lam Research Corporation,...

1. A capacitively-coupled plasma (CCP) processing system having a plasma processing chamber capable of both CCP processing
and inductively coupled plasma processing for processing a substrate, comprising:
at least an upper electrode and a lower electrode for processing said substrate, said substrate being disposed on said lower
electrode during plasma processing, wherein the upper electrode has at least one slit extending through the upper electrode;
and

an array of inductor coils arrangement having a plurality of inductor coils, said array of inductor coils arrangement being
disposed above and in contact with said upper electrode, said array of inductor coils arrangement configured to inductively
sustain plasma in a gap between said upper electrode and said lower electrode, wherein individual ones of at least a subset
of said plurality of inductor coils are independently controllable with respect to and between phase and RF power, wherein
said array of inductor coils arrangement includes at least

a set of magnetic cores, wherein each magnetic core is a single unitary magnetic core, and
a set of coils, each single unitary magnetic core is wound with a coil of said set of coils, wherein a first magnetic core
in said set of magnetic cores is separated from an adjacent magnetic core by a distance of about 25 percent to 100 percent
of said gap between said upper electrode and said lower electrode.

US Pat. No. 9,434,071

WAFER HANDLING TRACTION CONTROL SYSTEM

Lam Research Corporation,...

15. A method comprising:
a) moving a first robot arm, including a first end effector supporting a first semiconductor wafer, according to a first calibration
acceleration profile;

b) receiving first optical sensor data from a first optical sensor configured to detect relative movement between the first
semiconductor wafer and the first end effector;

c) analyzing the first optical sensor data to determine first motion data based on relative movement of the first semiconductor
wafer with respect to the first end effector during motion of the first robot arm while the first semiconductor wafer is supported
by the first end effector; and

d) determining whether the first motion data attributable to movement of the first robot arm according to the first calibration
acceleration profile exceeds a first threshold motion metric.

US Pat. No. 9,382,627

METHODS AND MATERIALS FOR ANCHORING GAPFILL METALS

Lam Research Corporation,...

10. A solution comprising:
a solvent;
an anchor compound having at least one functional group capable of forming a chemical bond with an oxide surface and having
at least one functional group capable of forming a chemical bond with a gapfill metal, wherein the anchor compound comprises
inorganic oxoanions having the generic formula AXOYZ? wherein A is a chemical element, O is oxygen, X is an integer, Y is an integer, and Z is an integer;

a reducing agent for electroless deposition; and
ions of one or more metals for electroless deposition of the gapfill metal.

US Pat. No. 9,257,295

ION BEAM ETCHING SYSTEM

Lam Research Corporation,...

1. A method of removing material from sidewalls of features in partially fabricated semiconductor device structures, comprising:
(a) receiving a substrate in a reaction chamber, wherein the reaction chamber is divided into a plasma generation sub-chamber
and a processing sub-chamber by an ion extractor plate, wherein at least a portion of the ion extractor plate is corrugated,
and wherein the ion extractor plate comprises apertures designed or configured to permit the passage of ions therethrough;

(b) flowing a plasma generating gas into and generating a plasma in the plasma generation sub-chamber; and
(c) accelerating ions from the plasma generation chamber, through the ion extractor plate, and into the processing volume
toward the substrate to thereby remove material from feature sidewalls.

US Pat. No. 9,142,416

PROCESS TO REDUCE NODULE FORMATION IN ELECTROLESS PLATING

Lam Research Corporation,...

1. A method for providing electroless deposition of a metal layer on a plurality of metal patterns, wherein a dielectric surface
is between some of the plurality of metal patterns and metal residue is on the dielectric surface, comprising:
pretreating the dielectric surface with an alkaline solution with a pH of at least 8 comprising at least one complexing agent,
wherein the complexing agent forms a metal complex with the metal residue and wherein some metal oxide residue remain;

pretreating the dielectric surface with an acidic solution, wherein the acidic solution dissolves metal oxide residue;
electrolessly depositing metal on the plurality of metal patterns.

US Pat. No. 9,129,902

CONTINUOUS PLASMA ETCH PROCESS

Lam Research Corporation,...

1. A method for etching features with a continuous plasma, comprising:
providing a first plasma process, comprising:
providing a flow of a first process gas into a process chamber;
maintaining the continuous plasma; and
stopping the flow of the first process gas into the process chamber;
providing a transition process, comprising;
providing a flow of a transition gas into the process chamber;
maintaining the continuous plasma; and
stopping the flow of the transition gas into the process chamber; and
providing a second plasma process, comprising:
providing a flow of a second process gas into the process chamber;
maintaining the continuous plasma; and
stopping the second process gas into the process chamber.

US Pat. No. 9,105,676

METHOD OF REMOVING DAMAGED EPOXY FROM ELECTROSTATIC CHUCK

Lam Research Corporation,...

11. A method of removing an epoxy band from an electrostatic chuck comprising:
securing the electrostatic chuck in a servicing fixture;
applying a previously heated tip tool to an outside surface of the epoxy band to heat the epoxy band and breakdown a plurality
of adhesive bonds securing the epoxy band to the electrostatic chuck;

forming a hole in the epoxy band;
directing a coolant nozzle toward the hole in the epoxy band, the coolant nozzle being coupled to a coolant source;
applying the coolant to the hole in the epoxy band at a pressure of between about 50 psi to about 80 psi; and
blowing the epoxy band from the electrostatic chuck with the pressurized coolant flow.

US Pat. No. 9,508,530

PLASMA PROCESSING CHAMBER WITH FLEXIBLE SYMMETRIC RF RETURN STRAP

Lam Research Corporation,...

1. A chamber for processing semiconductor wafers, comprising:
an electrostatic chuck having a surface for supporting a substrate;
a ground assembly surrounding a periphery of the electrostatic chuck, the ground assembly including a first annular part and
a second annular part and a space between the first annular part and the second annular part; and

a conductive strap having flexibility, the conductive strap being annular and having a curved cross-sectional C-shape with
a first end and a second end, the conductive strap disposed in the space such that the first end is electrically connected
to the first annular part and the second end is electrically connected to the second annular part, wherein the curved cross-sectional
C-shape has an opening that faces away from the electrostatic chuck and toward a surround wall of the chamber and the conductive
strap remains within the space;

wherein the first annular part has an L shape in cross-section and the second annular part has an L shape in cross-section,
wherein a long side of the L shapes define a tubular portion and a short side of the L shapes define extensions that are parallel
to each other and the short side of both of the L shapes of the first and second annular parts face in a same direction that
is away from the electrostatic chuck and toward the surround wall of the chamber, wherein the space is between the short sides
of the L shapes that define the extensions;

wherein the first and second annular parts of the ground assembly are disposed below a perforated plasma confinement ring,
and the L shape of the first annular part is configured to move vertically up toward the perforated plasma confinement ring
and move vertically down away from the perforated plasma confinement ring.

US Pat. No. 9,425,041

ISOTROPIC ATOMIC LAYER ETCH FOR SILICON OXIDES USING NO ACTIVATION

Lam Research Corporation,...

1. A method of controllably etching a semiconductor oxide layer on a substrate, the method comprising:
(a) contacting the substrate housed in a process chamber with excess NO species to modify the surface of silicon or germanium
oxide on the substrate by adsorption, forming Si/Ge—O—N—O bonds, such that the oxide on the substrate surface is saturated
with NO bonding, preventing etching from occurring;

(b) contacting the substrate with an F etchant after the surface of the modified oxide is saturated with Si/Ge—O—N—O bonds;
(c) desorbing nitrogen oxide from the surface of the modified oxide, while leaving a surface activated towards etching;
(d) allowing the F etchant to etch the activated surface.

US Pat. No. 9,393,666

ADAPTER PLATE FOR POLISHING AND CLEANING ELECTRODES

LAM RESEARCH CORPORATION,...

1. An adapter plate configured to be attachable to a universal platen of a cleaning unit for cleaning upper electrodes from
a plasma processing chamber, the adapter plate comprising:
a support surface and a mounting surface, the mounting surface configured to be fastened to the universal platen of the cleaning
unit, and the support surface configured to support an inner electrode or an outer electrode of a showerhead electrode assembly
for cleaning upper or lower surfaces thereof, the support surface having a first set of holes configured to receive pins engaged
in an upper surface of the inner electrode, a second set of holes configured to receive pins surrounding an outer periphery
of the inner electrode when the lower surface of the inner electrode is supported on the support surface, a third set of holes
configured to receive pins engaged in an upper surface of the outer electrode, and a fourth set of holes configured to receive
pins surrounding an outer periphery of the outer electrode when the lower surface of the outer electrode is supported on the
support surface wherein the support surface has an annular inner surface, an annular channel, which surrounds the annular
inner surface, and a plurality of outer surfaces surrounding the annular channel, each of the plurality of outer surfaces
having a curved inner edge, a curved outer edge, and a pair of side edges, and a plurality of side channels between adjacent
outer surfaces, and wherein each of plurality of outer surfaces has one or more sets of holes configured to receive a pin
and the adapter plate is an annular plate.

US Pat. No. 9,390,895

GAS INJECTOR PARTICLE REMOVAL PROCESS AND APPARATUS

Lam Research Corporation,...

1. A sonic cleaning tool comprising a component retaining fixture, a sonic bath, and a cleaning fluid circulating system,
wherein:
the sonic bath comprises a sound field transducer and is structurally configured to place the component retaining fixture
in sonic communication with the sound field transducer within the sonic bath;

the component retaining fixture comprises a first end plate, a second end plate, a first component securing member, a second
component securing member, and a plurality of compression studs;

the first component securing member of the component retaining fixture projects from the first end plate and comprises an
advancing shaft, a component engaging saddle and a cleaning fluid delivery channel extending through the advancing shaft and
the component engaging saddle;

the advancing shaft of the first component securing member is structurally configured for repeatable transition between a
retracted position and an extended position;

the second component securing member of the component retaining fixture projects from the second end plate and comprises a
cleaning fluid outlet channel;

the compression studs of the component retaining fixture span from the first end plate of the component retaining fixture
to the second end plate of the component retaining fixture;

the compression studs of the component retaining fixture are spaced to form a plurality of sonic transmission windows between
the compression studs;

the sonic transmission windows collectively place a majority of a component disposed in the component retaining fixture in
substantially unobstructed sonic communication with the sound field transducer of the sonic bath;

the cleaning fluid circulating system comprises a cleaning fluid, a cleaning fluid supply reservoir, a deionized water supply,
and a compressed dry air supply; and

the cleaning fluid supply reservoir, the deionized water supply, and the dry compressed air supply are fluidly connected to
the cleaning fluid delivery channel.

US Pat. No. 9,324,589

MULTIPLEXED HEATER ARRAY USING AC DRIVE FOR SEMICONDUCTOR PROCESSING

LAM RESEARCH CORPORATION,...

1. A heating plate for a substrate support assembly used to support a semiconductor substrate in a semiconductor processing
apparatus, the heating plate comprising:
a first electrically insulating layer; a plurality of heater zones comprising at least first, second, third and fourth heater
zones, the heater zones distributed across the first electrically insulating layer and operable to tune a spatial temperature
profile on the substrate;

a plurality of diodes including at least first, second, third, fourth, fifth, sixth, seventh, and eighth diodes;
a plurality of first power lines comprising a first electrically conductive branch transmission line electrically connected
to the first heater zone via the first diode and the second heater zone via the third diode and a third electrically conductive
branch transmission line electrically connected to the first heater zone via the second diode and the second heater zone via
the fourth diode and a second electrically conductive branch transmission line electrically connected to the third heater
zone via the fifth diode and the fourth heater zone via the seventh diode and a fourth electrically conductive branch transmission
line electrically connected to the third heater zone via the sixth diode and the fourth heater zone via the eighth diode;
and

a plurality of second power lines comprising at least a first electrically conductive common transmission line electrically
connected to the first heater zone and the third heater zone and a second electrically conductive common transmission line
electrically connected to the second heater zone and the fourth heater zone,

wherein the first power lines and/or second power lines are spatially arranged to minimize electromagnetic fields above the
heating plate and reduce plasma non-uniformity caused by such electromagnetic fields;

wherein each heater zone includes at least one resistance heater element.

US Pat. No. 9,257,296

ETCH PROCESS WITH PRE-ETCH TRANSIENT CONDITIONING

Lam Research Corporation,...

1. A method for etching features with different aspect ratios in an etch layer, comprising:
a plurality of cycles, wherein each cycle comprises:
a pre-etch transient conditioning of the etch layer, which provides a transient condition of the etch layer, wherein the transient
condition has a duration, wherein the pre-etch transient conditioning comprises

providing a pre-etch transient conditioning gas consisting essentially of He and O2; and

forming the pre-etch transient conditioning gas into a plasma; and
etching the etch layer for a duration, wherein the duration of the etching with respect to the duration of the transient condition
is controlled to control etch aspect ratio dependence, wherein the etching follows the pre-etch transient conditioning, wherein
the etching taking place within the duration of the transient condition provides a lower aspect ratio dependent etch than
etching past the duration of the transient condition.

US Pat. No. 9,184,028

DUAL PLASMA VOLUME PROCESSING APPARATUS FOR NEUTRAL/ION FLUX CONTROL

Lam Research Corporation,...

1. A semiconductor wafer processing apparatus, comprising:
a first electrode exposed to a first plasma generation volume, the first electrode defined to transmit radiofrequency (RF)
power to the first plasma generation volume, the first electrode further defined to distribute a first plasma process gas
to the first plasma generation volume;

a second electrode exposed to a second plasma generation volume, the second electrode defined to transmit RF power to the
second plasma generation volume, the second electrode further defined to hold a substrate in exposure to the second plasma
generation volume;

a gas distribution unit disposed between the first plasma generation volume and the second plasma generation volume, the gas
distribution unit defined to include an arrangement of through-holes that each extend through the gas distribution unit to
fluidly connect the first plasma generation volume to the second plasma generation volume, the gas distribution unit further
defined to include interior gas supply channels fluidly connected to an arrangement of gas supply ports defined to distribute
a second plasma process gas to the second plasma generation volume, wherein the gas distribution unit includes embedded electrodes
defined around the through-holes and around portions of the gas supply ports and below horizontal portions of the interior
gas supply channels, each of the embedded electrodes defined to connect with any one of one or more direct current bias sources
external to the gas distribution unit; and

an exhaust channel configured to circumscribe the first plasma generation volume outside of a radial periphery of the first
electrode and outside of a radial periphery of the gas distribution unit.

US Pat. No. 9,123,650

PLASMA CONFINEMENT RINGS INCLUDING RF ABSORBING MATERIAL FOR REDUCING POLYMER DEPOSITION

LAM RESEARCH CORPORATION,...

1. A plasma confinement ring assembly for a plasma processing chamber, comprising:
a mounting ring comprising an inner ring of RF transparent material adapted to be supported on an outer ring, the inner ring
including a vertically extending plasma-exposed inner surface, a vertically extending outer surface opposite to the inner
surface, and a coating of an electrically-conductive, low-emissivity material on the outer surface wherein the coating is
not on the inner surface; and

at least two plasma confinement rings arranged in a stack and suspended from the mounting ring; wherein
the outer ring comprises a plurality of circumferentially-spaced depressions;
a support element removably received in each of the respective plurality of circumferentially-spaced depressions; and
the inner ring is adapted to be supported on the support elements; wherein
the support elements are round balls of polytetrafluoroethylene or polyetheretherketone which are configured to reduce contact
area between the support elements and the inner ring.

US Pat. No. 9,059,101

RADIOFREQUENCY ADJUSTMENT FOR INSTABILITY MANAGEMENT IN SEMICONDUCTOR PROCESSING

Lam Research Corporation,...

1. A method for processing a substrate in a semiconductor processing chamber, the method comprising:
identifying a first recipe having a plurality of steps that include an operating frequency equal to a nominal frequency for
a radiofrequency (RF) power supply, the first recipe being used to etch one or more layers of material disposed over a substrate;

analyzing each step with the operating frequency equal to the nominal frequency, the analyzing determining if any step produces
instability at the nominal frequency;

adjusting the operating frequency for one or more of the steps when the instability in the one or more steps exceeds a threshold,
the adjusting acting to find an approximate minimum level of instability; and

constructing a second recipe after the adjusting such that at least one of the steps includes a respective operating frequency
different from the nominal frequency, the second recipe being used to etch the one or more layers disposed over the substrate
in the semiconductor processing chamber.

US Pat. No. 9,051,647

TUNABLE MULTI-ZONE GAS INJECTION SYSTEM

Lam Research Corporation,...

1. A gas injector for supplying process gas into a semiconductor processing chamber comprising:
an injector body which includes
at least first and second gas inlets in an upper portion of an outer side surface of the injector body,
at least first and second gas passages which receive a same gas, wherein the first gas passage is a central passage and the
second gas passage is an annular passage surrounding the central passage, and

at least first and second gas outlets,
the first gas passage being in fluid communication with the first inlet and first outlet,
the second gas passage being in fluid communication with the second inlet and second outlet,
the first and second gas passages being discrete from each other so as to provide independently adjustable flow rates of the
same gas through the first and second outlets,

the first gas outlet comprising at least one on-axis gas outlet in an axial end of the injector body and
the second gas outlet comprising a plurality of off-axis gas outlets in a lower portion of the side surface of the injector
body which inject process gas in a plurality of directions.

US Pat. No. 9,543,158

TECHNIQUE TO DEPOSIT SIDEWALL PASSIVATION FOR HIGH ASPECT RATIO CYLINDER ETCH

Lam Research Corporation,...

1. A method of forming an etched feature in dielectric material on a semiconductor substrate, the method comprising:
(a) generating an etching plasma comprising an etching reactant, exposing the substrate to the etching plasma, and partially
etching the feature in the dielectric material, wherein the substrate comprises a mask layer;

(b) after (a), depositing a protective film on sidewalls of the feature, wherein the protective film is deposited along substantially
the entire depth of the feature, wherein the mask layer is substantially preserved during (b), and wherein depositing the
protective film comprises:

(i) flowing a first deposition reactant into a reaction chamber, generating a deposition plasma comprising the first deposition
reactant, and exposing the substrate to the deposition plasma, wherein the first deposition reactant is a silicon-containing
reactant,

(ii) ceasing the flow of the first deposition reactant,
(iii) flowing a second deposition reactant into the reaction chamber and generating or maintaining the deposition plasma to
thereby drive a surface reaction between the first and second deposition reactants to form the protective film, the deposition
plasma in (iii) comprising the second deposition reactant, wherein the mask layer is substantially preserved during (iii),
and wherein a composition of the deposition plasma changes over the course of (i)-(iii),

(iv) ceasing the flow of the second deposition reactant, and
(v) repeating (i)-(iv) until the protective film reaches a final thickness; and
(c) repeating (a)-(b) until the feature is etched to a final depth, wherein the protective film deposited in (b) substantially
prevents lateral etch of the feature during (a), and wherein the feature has an aspect ratio of about 5 or greater at its
final depth.

US Pat. No. 9,359,673

APPARATUS AND METHOD FOR ATOMIC LAYER DEPOSITION

Lam Research Corporation,...

1. A proximity head for dispensing reactants and purging gas to deposit a thin film by atomic layer deposition (ALD), comprising:
the proximity head disposed in a vacuum chamber, the vacuum chamber being coupled to a carrier gas source to sustain a pressure
for the proximity head during the dispensing of the reactants and the purging gas, the proximity head extending over a portion
of a substrate region and being spaced apart from the portion of the substrate region when present,

wherein the proximity head has a plurality of sides, and each side includes,
a gas conduit through which a reactant gas and the purging gas are sequentially dispensed to deposit a thin ALD film under
the proximity head, and

at least two separate vacuum conduits on each side of the gas conduit to pull excess reactant gas, purging gas, or deposition
byproducts from a reaction volume between a surface of the proximity head facing the substrate region and the portion of the
substrate region, wherein the proximity head is rotatable so as to place each of the plurality of sides in a direction of
the substrate region.

US Pat. No. 9,336,901

TRACK AND HOLD FEEDBACK CONTROL OF PULSED RF

Lam Research Corporation,...

1. A pulsed RF system comprising:
an RF generator having an RF output and a feedback input;
an RF electrode coupled to the RF output; and
an RF sampling circuit having a sampling input coupled to the RF electrode, the sampling circuit including a feedback signal
output coupled to the feedback input of the RF generator;

wherein the RF sampling circuit includes an exclusion time delay circuit delaying the output of the feedback signal until
a selected exclusion time delay after an RF pulse is initially sampled.

US Pat. No. 9,322,795

ELECTRODE FOR USE IN MEASURING DIELECTRIC PROPERTIES OF PARTS

Lam Research Corporation,...

1. A method for defining an electrode for use in measuring dielectric properties of a part, comprising:
forming a plate of electrically conductive material to have an outer perimeter defined to substantially match an outer perimeter
of the part, wherein the part is a dielectric part including a number of embedded conductive material items, wherein the plate
has a top surface and a bottom surface;

identifying a location of each embedded conductive material item within the part;
projecting the identified location of each embedded conductive material item within the part upon either the top surface of
the plate or the bottom surface of the plate with the outer perimeters of the part and the plate substantially aligned; and

removing a portion of the plate at each embedded conductive material item location as projected upon the plate, wherein the
portion of the plate that is removed extends through an entire vertical thickness of the plate from the top surface of the
plate to the bottom surface of the plate.

US Pat. No. 9,295,148

COMPUTATION OF STATISTICS FOR STATISTICAL DATA DECIMATION

Lam Research Corporation,...

1. A method comprising:
receiving a variable from a radio frequency (RF) system;
propagating the variable through a model of the RF system;
counting an output of the model for the variable to generate a count;
determining whether the count meets a count threshold;
generating a statistical value of the variable at the output of the model upon determining that the count meets the count
threshold; and

sending the statistical value to the RF system to adjust the variable.

US Pat. No. 9,184,074

APPARATUS AND METHODS FOR EDGE RING IMPLEMENTATION FOR SUBSTRATE PROCESSING

Lam Research Corporation,...

1. A method for processing a substrate in a plasma processing chamber, said substrate being disposed above a chuck and surrounded
by a first edge ring, said first edge ring being electrically isolated from said chuck, the method comprising:
disposing an edge of said substrate above a second edge ring;
using a coupling ring to facilitate RF coupling from an ESC (electrostatic chuck) assembly to said first edge ring, said ESC
assembly including said chuck;

optimizing said RF coupling to minimize a potential difference between said substrate and said first edge ring;
maximizing a potential difference between said substrate and said second edge ring to induce arcing on said edge of said substrate;
and

using said arcing to remove polymer by-products deposited on said edge of said substrate.

US Pat. No. 9,142,456

METHOD FOR CAPPING COPPER INTERCONNECT LINES

Lam Research Corporation,...

1. A method of forming a capping layer over copper containing contacts in a dielectric layer with a liner comprising a noble
metal liner around the copper containing contacts, comprising:
using electroless deposition to deposit a deposition comprising copper on the noble metal liner and the copper containing
contacts, such that the deposition covers the noble metal liner, covers a first portion of the copper containing contact adjacent
to the noble metal liner, and does not cover at least a second portion of the copper containing contact, wherein the thickness
of the deposition comprising copper over the noble metal liner is thicker than the deposition comprising copper over the first
portion of the copper containing contact; and

forming a capping layer over the deposition comprising copper.

US Pat. No. 9,117,860

CONTROLLED AMBIENT SYSTEM FOR INTERFACE ENGINEERING

Lam Research Corporation,...

1. A cluster architecture for processing a substrate, comprising:
(a) at a first location, a lab-ambient controlled transfer module for accepting substrates into and out of the cluster architecture,
the lab-ambient controlled transfer module being coupled to one or more wet substrate processing modules, the lab-ambient
controlled transfer module and the one or more wet substrate processing modules configured to manage a first ambient environment,
and an interface between the lab-ambient controlled transfer module and one or more wet substrate processing module is defined,
such that an end effector handles the substrate in a dry-in state into one of the wet substrate processing modules and a dry-out
state out of one of the wet substrate processing modules, wherein at least one of the wet substrate processing modules is
a proximity head system, the proximity head system produces a meniscus between a surface of the proximity head and a surface
of the substrate, the substrate is configured to be held by a carrier in the proximity head system and the carrier is movable
along a track of the proximity head system;

wherein the track of the proximity head system is parallel to a track of the end effector of the lab-ambient controlled transfer
module;

(b) at a second location, a vacuum transfer module being directly coupled to a first load lock, with the lab-ambient controlled
transfer module being directly coupled to the same first load lock, the first load lock configured for dry transfer;

the vacuum transfer module being coupled to one or more plasma processing modules, the vacuum transfer module and the one
or more plasma processing modules configured to manage a second ambient environment; and

(c) at a third location, a controlled ambient transfer module being directly coupled to a second load lock, with the vacuum
transfer module being directly coupled to the same second load lock, the second load lock configured for dry transfer;

the controlled ambient transfer module being coupled to one or more ambient processing modules, the controlled ambient transfer
module and the one or more ambient processing modules configured to manage a third ambient environment;

wherein the second location is between the first and third locations;
wherein the cluster architecture defines a controlled processing of the substrate in each of the first, second and third ambient
environments and wherein the first, second and third environments are isolated from an uncontrolled clean room environment
outside of the cluster architecture;

wherein the one or more ambient processing modules include a metallic plating system.

US Pat. No. 9,054,148

METHOD FOR PERFORMING HOT WATER SEAL ON ELECTROSTATIC CHUCK

Lam Research Corporation,...

1. A method of treating a bipolar ESC having an electrode with a front surface and a back surface, the front surface having
an anodized layer, said method comprising: (a) eliminating the anodized layer; (b) disposing a new anodized layer onto the
front surface; and (c) treating the new anodized layer with water to seal the new anodized layer, to obtain a refurbished
ESC,
wherein said disposing a new anodized layer onto the front surface comprises anodizing the front surface to form the new anodized
layer as a first layer of Al2O3 and a second layer of Al2O3 which are formed simultaneously, and the first layer has a greater density than the second layer, wherein the first layer
is in direct contact with the front surface and the second layer is an exposed layer.

US Pat. No. 9,576,811

INTEGRATING ATOMIC SCALE PROCESSES: ALD (ATOMIC LAYER DEPOSITION) AND ALE (ATOMIC LAYER ETCH)

Lam Research Corporation,...

25. A method of processing a substrate, the method comprising:
etching the substrate by atomic layer etch in a chamber; and
depositing a film by atomic layer deposition,
wherein the etching and the depositing are performed without breaking vacuum, and
wherein a plasma is ignited during at least one of the etching and the depositing.

US Pat. No. 9,449,797

COMPONENT OF A PLASMA PROCESSING APPARATUS HAVING A PROTECTIVE IN SITU FORMED LAYER ON A PLASMA EXPOSED SURFACE

LAM RESEARCH CORPORATION,...

1. A component assembly of a plasma processing apparatus, the plasma processing apparatus comprising a plasma processing chamber
wherein plasma is generated and used to process a semiconductor substrate, the component assembly comprising a component of
the plasma processing chamber and a liquid supply,
the component comprising at least one plasma exposed surface,
the liquid supply configured to deliver a plasma compatible liquid through feed passages to the plasma exposed surface so
as to form a protective layer thereon,

the liquid supply configured to deliver the plasma compatible liquid to the feed passages,
wherein (a) the plasma compatible liquid is store in the liquid supply at a predetermined pressure, such that a pressure differential
between the liquid supply and the vacuum chamber forces the liquid to flow in the feed passages towards the plasma exposed
surface of the component, wherein the predetermined pressure may be controlled such that the thickness of the liquid layer
on the plasma exposed surface of the component may be maintained at a predetermined thickness; or

(b) the liquid supply includes a pump wherein the pump is configured to pump the plasma compatible liquid towards the plasma
exposed surface of the component such that the thickness of the liquid on the plasma exposed surface of the component may
be maintained at a predetermined thickness.

US Pat. No. 9,412,555

LOWER ELECTRODE ASSEMBLY OF PLASMA PROCESSING CHAMBER

LAM RESEARCH CORPORATION,...

1. A lower electrode assembly for use in a plasma processing chamber, comprising:
(a) a metal base comprising metal plates:
(i) a braze line on a lower side surface at a location of a brazed joint metallurgically bonding the metal plates together;
(ii) an edge ring support surface extending horizontally inwardly from the lower side surface; and
(iii) an upper side surface above the edge ring support surface;
(b) an upper edge ring comprising a lower surface mounted on the edge ring support surface;
(c) a lower edge ring surrounding the lower side surface; and
(d) a gap between opposed surfaces of the upper and lower edge rings and between the lower edge ring and an outer periphery
of the base, the gap having an aspect ratio of total gap length to average gap width sufficient to impede arcing at a location
of the braze line.

US Pat. No. 9,368,340

METALLIZATION OF THE WAFER EDGE FOR OPTIMIZED ELECTROPLATING PERFORMANCE ON RESISTIVE SUBSTRATES

Lam Research Corporation,...

9. A method for processing a substrate, comprising:
receiving a substrate having a metallic seed layer;
applying an electroless deposition solution to a first portion of the metallic seed layer, defined at an edge exclusion region
of the substrate, to selectively deposit an edge metallization layer over the first portion of the metallic seed layer;

applying electrical contacts to the edge metallization layer;
exposing a second portion of the metallic seed layer, defined at a device region of the substrate, to an electroplating solution;
applying a current to the electrical contacts, to electroplate a metallic bulk layer over the second portion of the metallic
seed layer.

US Pat. No. 9,362,133

METHOD FOR FORMING A MASK BY ETCHING CONFORMAL FILM ON PATTERNED ASHABLE HARDMASK

Lam Research Corporation,...

1. A method of processing a semiconductor substrate, the method comprising:
transferring a pattern from an overlying photoresist to a core amorphous carbon layer;
depositing a conformal film over the patterned core amorphous carbon layer on the semiconductor substrate;
depositing a gap-fill amorphous carbon layer over the conformal film;
planarizing the semiconductor substrate with a process that etches both the conformal film and the gap-fill amorphous carbon
layer to remove the conformal film over the core amorphous carbon layer while leaving the conformal film deposited between
the core amorphous carbon layer and the gap-fill amorphous carbon layer; and

selectively etching the conformal film to form a mask.

US Pat. No. 9,349,606

METAL HARDMASK ALL IN ONE INTEGRATED ETCH

Lam Research Corporation,...

19. A method for forming conductive contacts in a dielectric layer disposed below a trench mask disposed below a via mask
forming a stack, comprising:
etching partial vias into the dielectric layer through the via mask;
exposing the trench mask;
etching trenches into the dielectric layer through the trench mask, wherein the etching the trenches completes and over etches
the vias to widen bottoms of the vias;

rounding tops of the trenches or vias above a planarization line;
filling the vias and trenches with a conductive material; and
planarizing the stack to the planarization line.

US Pat. No. 9,336,996

PLASMA PROCESSING SYSTEMS INCLUDING SIDE COILS AND METHODS RELATED TO THE PLASMA PROCESSING SYSTEMS

Lam Research Corporation,...

1. A plasma processing system for generating plasma to process at least a wafer and for optimizing distribution of generated
plasma on the wafer, the plasma processing system comprising:
a chuck for supporting said wafer;
a chamber structure for containing said plasma, said chamber structure including a cylindrical chamber wall, said chamber
structure further including a dielectric member disposed above said cylindrical chamber wall and coupled with said cylindrical
chamber wall, said dielectric member comprising a one-piece structure having a top, a vertical wall and a flange as integral
parts of the dielectric member, wherein the dielectric member is coupled to said cylindrical wall through said flange, wherein
the flange includes a plurality of channels for transmitting one or more gases into the chamber structure, and wherein the
top is disposed over said chuck;

a set of top coils disposed above said top for initiating generation of said plasma, a horizontal bottom surface of said top
being configured to be exposed to said plasma when said wafer is processed with said plasma;

a set of side coils surrounding said vertical wall and disposed over at least a portion of said flange for affecting distribution
of said plasma; and

a shielding arrangement disposed between the set of side coils and the flange, a vertical inner surface of said vertical wall
being configured to be exposed to said plasma when said wafer is processed with said plasma, the inner diameter of said vertical
wall being smaller than the inner diameter of said cylindrical chamber wall;

wherein the shielding arrangement is at least part of a gas manifold coupled with said flange for delivering said one or more
gases to said plurality of channels, and wherein the shielding arrangement shields the plurality of channels from a magnetic
field associated with the set of side coils.

US Pat. No. 9,257,274

GAPFILL OF VARIABLE ASPECT RATIO FEATURES WITH A COMPOSITE PEALD AND PECVD METHOD

Lam Research Corporation,...

1. A method of filling a gap on a substrate surface, the method comprising:
(a) introducing a first reactant in vapor phase into a reaction chamber having the substrate therein, and allowing the first
reactant to adsorb onto the substrate surface;

(b) introducing a second reactant in vapor phase into the reaction chamber and allowing the second reactant to adsorb onto
the substrate surface;

(c) exposing the substrate surface to plasma to drive a surface reaction between the first and second reactants on the substrate
surface to form a film layer that lines the bottom and sidewalls of the gap;

(d) sweeping the reaction chamber without performing a pumpdown; and
(e) repeating operations (a) through (d) to form additional film layers, wherein the gap is filled through a bottom-up fill
mechanism in which the film layers are deposited thinner near the top of the gap and thicker near the bottom of the gap, and
wherein when opposing film layers on opposite sidewalls of the gap approach one another, surface groups present on the opposing
film layers crosslink with one another to thereby fill the gap without the formation of a void or seam.

US Pat. No. 9,153,449

ELECTROLESS GAP FILL

Lam Research Corporation,...

1. A method for providing copper filled features, comprising:
providing features in a layer on a substrate and forming at least one liner in the features composed of metal;
providing a simultaneous electroless copper plating and anneal, which fills the features with copper deposit, wherein the
simultaneous electroless copper plating and anneal occurs in an electroless copper bath that is maintained at an anneal temperature
and for an anneal time sufficient to perform the electroless copper plating and annealing simultaneously, such that the features
are filled without the formation of voids or seams, wherein the anneal temperature of the electroless copper bath is between
150° C. and 250° C., wherein the electroless copper bath comprises one or more solvents having boiling points above the boiling
point of water; and

chemical-mechanical polishing the copper deposit without an annealing after the simultaneous electroless copper plating and
anneal and before the chemical-mechanical polishing; and
removing the metal from a bevel of the substrate after providing the features in a layer on the substrate and before providing
the simultaneous electroless copper plating and anneal.

US Pat. No. 9,082,594

ETCH RATE MODELING AND USE THEREOF FOR IN-CHAMBER AND CHAMBER-TO-CHAMBER MATCHING

Lam Research Corporation,...

1. A method comprising:
receiving a voltage and a current measured at an output of a radio frequency (RF) generator of a first plasma system;
calculating a sum of a first term, a second term, and a third term, wherein the first term is a first product of a coefficient
and a function of the voltage, the second term is a second product of a coefficient and a function of the current, and the
third term is a third product of a coefficient, a function of the voltage, and a function of the current;

determining the sum to be the etch rate associated with the first plasma system; and
adjusting power output from an RF generator of a second plasma system to achieve the etch rate associated with the first plasma
system,

wherein the method is executed by a processor.

US Pat. No. 9,076,634

REPLACEABLE UPPER CHAMBER PARTS OF PLASMA PROCESSING APPARATUS

Lam Research Corporation,...

15. A replaceable upper chamber part of a plasma reaction chamber in which semiconductor substrates can be processed, the
chamber part comprising:
a top chamber interface, the top chamber interface comprises a monolithic metal cylinder having a uniform diameter inner surface,
an upper flange extending horizontally away from the inner surface and a lower flange extending horizontally away from the
inner surface, an upper annular vacuum sealing surface; a lower annular vacuum sealing surface, a thermal mass at an upper
portion of the cylinder, the thermal mass defined by a wider portion of the cylinder between the inner surface and an outer
surface extending vertically from the upper flange, the thermal mass being effective to provide azimuthal temperature uniformity
of the inner surface, and a thermal choke at a lower portion of the cylinder effective to minimize transfer of heat across
the lower vacuum sealing surface, the thermal choke defined by a thin metal section having a thickness of less than 0.25 inch
and extending at least 25% of the length of the inner surface, and an annular recess in the outer surface of the top chamber
interface, and a plurality of symmetrically arranged side injection ports located in the inner surface.

US Pat. No. 9,385,003

RESIDUE FREE SYSTEMS AND METHODS FOR ISOTROPICALLY ETCHING SILICON IN TIGHT SPACES

LAM RESEARCH CORPORATION,...

10. A method for etching a substrate, comprising:
arranging a substrate including a first structure and a dummy structure in a processing chamber,
wherein the first structure is made of a material selected from a group consisting of silicon dioxide and silicon nitride,
and

wherein the dummy structure is made of silicon;
supplying carrier gas to the processing chamber;
supplying nitrogen trifluoride (NF3) and molecular hydrogen (H2) gas to the processing chamber;

striking plasma in the processing chamber; and
etching the dummy structure,
wherein a ratio of NF3/(NF3+H2) is less than or equal to 0.3.

US Pat. No. 9,320,387

SULFUR DOPED CARBON HARD MASKS

Lam Research Corporation,...

1. A method of forming an ashable hard mask on a first layer to be etched on a semiconductor substrate, comprising:
providing a precursor gas comprising a carbon source and a sulfur source to a deposition chamber housing the semiconductor
substrate, and

generating a plasma from the precursor gas to thereby deposit a sulfur-doped ashable hard mask on the first layer by a plasma
enhanced chemical vapor deposition (PECVD) process.

US Pat. No. 9,284,644

APPARATUS AND METHOD FOR IMPROVING WAFER UNIFORMITY

Lam Research Corporation,...

20. A method for tuning on-wafer uniformity in semiconductor wafer processing, the method comprising:
a) applying process gas to a semiconductor wafer inside a semiconductor processing chamber, wherein process gas enters the
semiconductor processing chamber through a plurality of gas flow paths extending from a first side of a manifold body to a
second side of the manifold body, wherein the first side of the manifold body is outside the semiconductor processing chamber,
and gas flows through the manifold body from the first side to the second side;

b) measuring the uniformity of the semiconductor wafer; and
c) adjusting, from the first side of the manifold body, the gas flow characteristics through at least one of the gas flow
paths in the manifold body by the insertion an orifice into a corresponding one of the manifold gas flow paths, the orifice
comprising:

an orifice body, and
a hole in the orifice body allowing for process gas flow through the hole.

US Pat. No. 9,281,166

PLASMA PROCESSING CHAMBER FOR BEVEL EDGE PROCESSING

Lam Research Corporation,...

1. A chamber for processing a bevel edge of a substrate, comprising:
a bottom electrode defined to support a substrate in the chamber, the bottom electrode having a bottom first level for supporting
the substrate and a bottom second level near an outer edge of bottom electrode, the bottom second level defined at a step
below the bottom first level;

a top electrode oriented above the bottom electrode, the top electrode having a top first level and a top second level, the
top first level being opposite the bottom first level and the top second level being opposite the bottom second level, the
top second level defined at a step above the top first level;

a bottom grounded electrode disposed around the bottom electrode at the bottom second level;
a top grounded electrode disposed around the top electrode at the top second level;
a bottom ring mount oriented at the bottom second level, the bottom ring mount supporting a bottom permanent magnet; and
a top ring mount oriented at the top second level, the top ring mount supporting a top permanent magnet, the top permanent
magnet being oriented opposite the bottom permanent magnet.

US Pat. No. 9,190,302

SYSTEM AND METHOD FOR CONTROLLING PLASMA WITH AN ADJUSTABLE COUPLING TO GROUND CIRCUIT

Lam Research Corporation,...

1. A plasma processing chamber for controlling plasma, comprising:
a powered electrode configured to receive a substrate, the powered electrode having a first diameter and first area;
a first grounded electrode having a second diameter and second area, the second diameter and second area are greater than
the first diameter and first area, a first process region defined between the powered electrode and the first grounded electrode;

a second grounded electrode configured as a first ring that surrounds the first grounded electrode;
a third grounded electrode configured as a second ring that surrounds the powered electrode, a second process region defined
between the second grounded electrode and the third grounded electrode, the third grounded electrode not being disposed over
the powered electrode;

a plurality of stacked confinement rings disposed between the second grounded electrode and the third grounded electrode proximate
to an outer radius of the second grounded electrode and the third grounded electrode so as to maintain the second process
region between the second and third grounded electrodes, such that a processing volume of the plasma processing chamber is
defined by both the first and second processing regions;

a first coupling to ground circuit being electrically coupled to the second grounded electrode;
a second coupling to ground circuit being electrically coupled to the first grounded electrode; and
a direct ground circuit being electrically coupled to the third grounded electrode;
wherein each of the first and second coupling to ground circuits is defined by a variable capacitor and a single RF power
supply is coupled to the powered electrode.

US Pat. No. 9,147,581

DUAL CHAMBER PLASMA ETCHER WITH ION ACCELERATOR

Lam Research Corporation,...

1. A method of etching a substrate, comprising:
(a) receiving a substrate having material for removal thereon in a reaction chamber of a reactor, wherein the reactor comprises:
(i) an upper sub-chamber and a lower sub-chamber,
(ii) a grid assembly positioned in the reaction chamber and thereby dividing the reaction chamber into the upper sub-chamber
and the lower sub-chamber, wherein the grid assembly comprises at least an uppermost grid and a lowermost grid, wherein the
uppermost and lowermost grids are connected with one or more power supplies for independently providing negative bias to the
grids, and wherein each grid of the grid assembly has perforations extending through the thickness of the grid,

(iii) one or more inlets to the upper sub-chamber,
(iv) one or more inlets to the lower sub-chamber, and
(v) a plasma generation source designed or configured to produce a plasma in the upper sub-chamber,
(b) supplying a plasma generating gas to the upper sub-chamber and generating the plasma from the plasma generating gas,
(c) applying a negative bias to at least the uppermost and lowermost grids of the grid assembly, wherein the bias applied
to the lowermost grid is more negative than the bias applied to the uppermost grid, and accelerating ions from the plasma
in the upper sub-chamber through the grid assembly toward the substrate,

(d) supplying an etching gas to the lower sub-chamber through the one or more inlets to the lower sub-chamber, and
(e) etching the substrate to remove at least a portion of the material for removal, wherein the lower sub-chamber is substantially
free of plasma during operations (a)-(e).

US Pat. No. 9,111,724

APPARATUS AND METHOD FOR CONTROLLING PLASMA POTENTIAL

Lam Research Corporation,...

1. An apparatus for semiconductor wafer plasma processing, comprising:
a chamber having a top plate, a bottom plate, and a sidewall extending vertically between the top plate and the bottom plate;
a lower electrode disposed within the chamber and defined to transmit a radiofrequency current through the chamber, the lower
electrode defined to support a semiconductor wafer in exposure to a plasma to be generated within the chamber by the radiofrequency
current;

an upper electrode disposed above and in a spaced apart relationship with the lower electrode, wherein the upper electrode
is electrically isolated from the chamber, wherein the upper electrode is defined by a central section and one or more annular
sections disposed concentrically outside the central section;

one or more inner dielectric material members respectively disposed between adjacent sections of the upper electrode so as
to electrically separate the adjacent sections of the upper electrode and so as to rigidly maintain a physical spacing between
the adjacent sections of the upper electrode;

an outer dielectric material member disposed between an outermost section of the upper electrode and the top plate of the
chamber so as to electrically separate the outermost section of the upper electrode from the top plate of the chamber and
so as to rigidly maintain a physical spacing between the outermost section of the upper electrode and the top plate of the
chamber, the outer dielectric material physically contacting both the outermost section of the upper electrode and the top
plate of the chamber; and

multiple voltage sources respectively connected to the central section and the one or more annular sections of the upper electrode,
wherein each voltage source is defined to control an electric potential of the upper electrode section to which it is connected
relative to the chamber, wherein the electric potential of each upper electrode section influences an electric potential of
the plasma to be generated between the lower electrode and the upper electrode, wherein each of the multiple voltage sources
is a direct current voltage source;

wherein a combination of the central section of the upper electrode, and the one or more annular sections of the upper electrode,
and the one or more inner dielectric material members, and the outer dielectric material member together form a disc shaped
structure having a substantially equal and uniform vertical height as measured in the direction extending perpendicular to
both the upper and lower electrodes;

a radiofrequency power source connected to provide radiofrequency power to the lower electrode; and
a matching network connected between the radiofrequency power source and the lower electrode, such that radiofrequency power
is transmitted through the matching network to the lower electrode, wherein only the lower electrode is connected to receive
radiofrequency power from the radiofrequency power source;

wherein each of the central section of the upper electrode and the one or more annular sections of the upper electrode is
formed as a respective non-perforated solid member.

US Pat. No. 9,076,646

PLASMA ENHANCED ATOMIC LAYER DEPOSITION WITH PULSED PLASMA EXPOSURE

Lam Research Corporation,...

1. A method comprising:
(a) introducing a first reactant in vapor phase into a reaction chamber having a substrate therein, and allowing the first
reactant to adsorb onto a surface of the substrate;

(b) purging the reaction chamber after a flow of the first reactant has ceased;
(c) introducing a second reactant in vapor phase into the reaction chamber while the first reactant is adsorbed onto the substrate
surface;

(d) exposing the substrate surface to plasma to drive a surface reaction between the first and second reactants on the substrate
surface to form a film layer that lines the gap, wherein the plasma is a pulsed plasma;

(e) extinguishing the plasma; and
(f) purging the reaction chamber,
wherein a ratio between a wet etch rate of the film layer at a middle portion of a sidewall of the gap (WEm) and a wet etch rate of the film layer at a top (WEt) and/or bottom (WEb) of the gap is between about 0.25-3.

US Pat. No. 10,044,338

MUTUALLY INDUCED FILTERS

Lam Research Corporation,...

16. A mutually induced filter for filtering radio frequency (RF) power from signals associated with a plurality of loads, comprising:a first portion connected to a first load element of a first one of the loads for filtering RF power from one of the signals supplied to the first load element, wherein the first load is associated with a pedestal of a plasma chamber;
a second portion connected to a second load element of the first load for filtering RF power from another one of the signals supplied to the second load element,
a third portion connected to a first load element of a second one of the loads for filtering RF power from one of the signals received from the first load element of the second load, wherein the second load is associated with the pedestal of the plasma chamber; and
a fourth portion connected to a second load element of the second load for filtering RF power from another one of the signals received from the second load element of the second load,
wherein the first, second, third and fourth portions are twisted and wound with each other to be mutually coupled with each other to further facilitate a coupling of a resonant frequency associated with the first portion to the second, third, and fourth portions,
wherein the first portion includes three or more inductors twisted with each other and one of the three or more inductors of the first portion is connected in series to a first capacitor without being connected to a power supply, wherein remaining two of the three or more inductors of the first portion are coupled to the power supply.

US Pat. No. 9,617,637

SYSTEMS AND METHODS FOR IMPROVING DEPOSITION RATE UNIFORMITY AND REDUCING DEFECTS IN SUBSTRATE PROCESSING SYSTEMS

LAM RESEARCH CORPORATION,...

1. A method for delivering liquid precursor in a substrate processing system, comprising:
supplying liquid precursor using a first valve in fluid communication with a liquid precursor source;
supplying purge gas using a second valve in fluid communication with a purge gas source;
arranging a third valve having a first input port and a second input port independent of the first input port, wherein the
first input port is in fluid communication with an output port of the first valve and the second input port is in fluid communication
with an output port of the second valve, and wherein the third valve is arranged to selectively supply either one of (i) liquid
precursor received via the first valve through the first input port or (ii) purge gas received via the second valve through
the second input port;

arranging an input port of a first divert injector valve in fluid communication with an output port of the third valve; and
operating the first valve, the second valve, the third valve and the first divert injector valve in first, second, third and
fourth modes,

when there is no request for liquid precursor, configuring in the first mode and closing the first valve, opening the second
valve to supply the purge gas to the second input port of the third valve, supplying the purge gas with the third valve and
opening the first divert injector valve,

in response to a request for liquid precursor, configuring sequentially in the second mode, the third mode and the fourth
mode,

wherein configuring in the second mode includes keeping the first valve closed, closing the second valve to stop the supply
of purge gas to the third valve, and closing the third valve and the first divert injector valve to trap the purge gas in
a conduit between the third valve and the first divert injector valve,

wherein configuring in the third mode includes, immediately subsequent to the second mode, keeping the first valve, the second
valve, and the third valve closed and opening the first divert injector valve to allow the purge gas trapped in the second
mode to flow out of the conduit, and

wherein configuring in the fourth mode includes opening the first valve to supply the liquid precursor to the first input
port of the third valve, keeping the second valve closed, opening the third valve to supply the liquid precursor using the
third valve and closing the first divert injector valve.

US Pat. No. 9,490,211

COPPER INTERCONNECT

Lam Research Corporation,...

1. A method of filling features in a dielectric layer, wherein the features comprise via features and trench features, and
wherein metal contacts are at bottoms of the via features, comprising:
selectively electrolessly depositing metal on the bottoms of the via features;
depositing a pure Co or pure Ru adhesion layer against surfaces of the features, wherein the adhesion layer is separated from
some of the surfaces of the features of the low-k dielectric layer by no more than 10 Å; wherein the selective electrolessly
depositing metal on bottoms of the via features is before depositing the pure Co or pure Ru adhesion layer; and

filling the features with Cu or a Cu alloy.

US Pat. No. 9,428,836

ELECTROLESS DEPOSITION OF CONTINUOUS COBALT LAYER USING COMPLEXED TI3+ METAL IONS AS REDUCING AGENTS

Lam Research Corporation,...

1. A solution for electroless deposition of cobalt, comprising:
a complexed reducing agent of Ti3+ ions; and

Co2+ ions, wherein the solution further comprises amine ligands.

US Pat. No. 9,425,078

INHIBITOR PLASMA MEDIATED ATOMIC LAYER DEPOSITION FOR SEAMLESS FEATURE FILL

LAM RESEARCH CORPORATION,...

1. A method for depositing film in a substrate processing system, comprising:
performing at least one atomic layer deposition (ALD) cycle in a processing chamber to deposit at least one layer of film
in a feature of a substrate, wherein the feature includes a hole or a trench;

after the at least one ALD cycle, exposing at least a portion of an outer surface of the at least one layer of film in the
feature to an inhibitor plasma in the processing chamber for a predetermined period to create a varying passivated surface
in the feature, wherein the varying passivated surface inhibits subsequent film deposition in an increasing manner in the
feature as a depth in the feature decreases; and

after the predetermined period, performing an additional ALD cycle in the processing chamber to deposit a layer of film on
the substrate, wherein deposition of the layer of film during the additional ALD cycle is inhibited by the varying passivated
surface.

US Pat. No. 9,418,889

SELECTIVE FORMATION OF DIELECTRIC BARRIERS FOR METAL INTERCONNECTS IN SEMICONDUCTOR DEVICES

Lam Research Corporation,...

1. A method of processing a semiconductor substrate, the method comprising:
(a) providing a partially fabricated semiconductor substrate having an exposed layer of dielectric, and a via formed in the
layer of dielectric, wherein there is an exposed layer of metal at the bottom of the via; and

(b) selectively forming a dielectric diffusion barrier layer on the exposed layer of dielectric, wherein the dielectric diffusion
barrier material is selected from the group consisting of doped or undoped silicon carbide and doped or undoped silicon nitride,
wherein (b) comprises using a method selected from the group consisting of:

(i) selectively depositing the dielectric diffusion barrier material on the layer of dielectric without depositing dielectric
diffusion barrier layer on the layer of metal; and

(ii) depositing the dielectric diffusion barrier material on the exposed layer of dielectric while depositing less dielectric
diffusion barrier material on the exposed metal layer and thereby achieving partial selectivity, and subsequently removing
the dielectric diffusion barrier material over the layer of metal by etching without fully removing the dielectric diffusion
barrier material over the layer of dielectric.

US Pat. No. 9,091,397

SHARED GAS PANELS IN PLASMA PROCESSING CHAMBERS EMPLOYING MULTI-ZONE GAS FEEDS

LAM RESEARCH CORPORATION,...

1. A gas supply delivery arrangement for supplying process gas to a plurality of multi-zone gas feed chambers of a plasma
processing system, comprising:
a plurality of gas supply conduits;
a shared gas panel coupled to receive different gases from said plurality of gas supply conduits, said shared gas panel mixing
said different gases to create mixed gas and evenly splitting said mixed gas to supply a portion of said mixed gas to each
of said plurality of multi-zone gas feed chambers, wherein said shared gas panel is configured to output each of said portions
of said mixed gas from the shared gas panel via different respective conduits;

a plurality of multi-zone gas feed devices comprising at least two multi-zone gas feed devices coupled downstream of said
shared gas panel, each of said plurality of multi-zone gas feed devices configured to (i) separately receive, directly from
said shared gas panel via said different respective conduits, said portion of said mixed gas, and (ii) adjustably split said
portion of said mixed gas received by each of said plurality of multi-zone gas feed devices from said shared gas panel into
a plurality of gas zone flows destined for different zones of a multi-zone gas feed chamber of said plurality of multi-zone
gas feed chambers;

first respective valves disposed between each of said plurality of multi-zone gas feed devices and said shared gas panel;
second respective valves disposed between each of said plurality of multi-zone gas feed devices and said plurality of multi-zone
gas feed chambers; and

logic for receiving optical emission spectroscopy signals from at least two multi-zone gas feed chambers of said plurality
of multi-zone gas feed chambers and for providing a control signal to said first respective valves and said second respective
valves based on said received optical emission spectroscopy signals.

US Pat. No. 9,472,377

METHOD AND APPARATUS FOR CHARACTERIZING METAL OXIDE REDUCTION

Lam Research Corporation,...

1. A method of characterizing metal oxide reduction, the method comprising:
(a) providing oxygen into an anneal chamber;
(b) providing a substrate with a metal seed layer formed thereon in the anneal chamber;
(c) exposing the substrate to conditions for forming a metal oxide of the metal seed layer in the anneal chamber, wherein
the conditions include the substrate being heated to a temperature equal to or greater than about 50° C.;

(d) providing the substrate in a processing chamber; and
(e) exposing the substrate to a reducing treatment under conditions that reduce the metal oxide to metal in the form of a
film integrated with the metal seed layer.

US Pat. No. 9,418,859

PLASMA-ENHANCED ETCHING IN AN AUGMENTED PLASMA PROCESSING SYSTEM

Lam Research Corporation,...

1. A method for etching a substrate in a plasma processing chamber having a semi-barrier structure separating a primary plasma
generating region from a secondary plasma generating region, comprising:
providing a primary feed gas to the primary plasma generating region from outside the secondary plasma generating region;
providing a secondary feed gas into the secondary plasma generating region, the secondary feed gas being different from the
primary feed gas;

generating a primary plasma from the primary feed gas;
generating a secondary plasma from the secondary feed gas; and
exposing the substrate to species in the primary plasma generating region to etch the substrate,
wherein the semi-barrier structure is configured to allow neutral reactive species to migrate from the secondary plasma generating
region to the primary plasma generating region across the semi-barrier structure.

US Pat. No. 9,406,535

ION INJECTOR AND LENS SYSTEM FOR ION BEAM MILLING

Lam Research Corporation,...

1. A method of making an electrode assembly for use in an ion beam etching reactor, the method comprising:
providing a first electrode, a second electrode and a third electrode;
providing and securing a first inter-electrode structure such that it is immobilized between the first electrode and the second
electrode, and providing and securing a second inter-electrode structure such that it is immobilized between the second electrode
and the third electrode, wherein the first electrode, second electrode, third electrode, first inter-electrode structure,
and second inter-electrode structure are substantially vertically aligned with one another to form the electrode assembly;
and

forming a plurality of apertures in the first electrode, second electrode and third electrode while the first inter-electrode
structure and the second inter-electrode structure are immobilized in the electrode assembly.

US Pat. No. 9,335,768

CLUSTER MASS FLOW DEVICES AND MULTI-LINE MASS FLOW DEVICES INCORPORATING THE SAME

LAM RESEARCH CORPORATION,...

1. A cluster mass flow device comprising a controller, a gas manifold, two or more control valves, and two or more flow sensors,
wherein:
the controller is electrically coupled to each control valve and to each flow sensor;
the gas manifold comprises two or more gas distribution flow paths and a gas mixing region each arranged within an interior
of a gas manifold block having at least one mounting surface, and a gas outlet;

each gas distribution flow path of the gas manifold comprises a gas inlet defined within the at least one mounting surface
of the gas manifold block and configured to receive a gas, and a gas flow channel fluidly coupled to the gas inlet;

the gas mixing region of the gas manifold is fluidly coupled to each gas flow channel;
the gas outlet of the gas manifold is defined within the at least one mounting surface of the gas manifold block and is fluidly
coupled to the gas mixing region;

each flow sensor and each control valve are fluidly coupled to a corresponding gas flow channel of the gas distribution flow
path;

each flow sensor is positioned between the control valve and the gas mixing region, and downstream of the control valve;
the controller is programmed to provide a control signal to each control valve for controlling a position of each control
valve such that a desired gas flow is produced; and

the controller is further programmed to utilize a gas flow recipe program to automatically receive and process measured gas
flow signals indicative of a flow rate of the gas flowing through each gas flow channel from each flow sensor and adjust a
position of each control valve to regulate gas flow based on the measured gas flow signals in order to maintain a desired
mass of gas flow for two or more gases to be released from the gas outlet.

US Pat. No. 9,184,084

WAFER HANDLING TRACTION CONTROL SYSTEM

Lam Research Corporation,...

18. A method comprising:
moving a first robot arm, including a first end effector supporting a first semiconductor wafer, according to a first operational
acceleration profile;

receiving a first sensor data from a first sensor configured to detect relative movement between the first semiconductor wafer
and the first end effector;

analyzing the first sensor data to determine first motion data based on relative movement of the first semiconductor wafer
with respect to the first end effector during motion of the first robot arm while the first semiconductor wafer is supported
by the first end effector;

determining that the first motion data attributable to movement of the first robot arm according to the first operational
acceleration profile exceeds a first threshold motion metric; and

moving the first robot arm according to a second operational acceleration profile when the first motion data attributable
to movement of the first robot arm according to the first operational acceleration profile exceeds the first threshold motion
metric, wherein the first motion data attributable to movement of the first robot arm according to the second operational
acceleration profile stays within the first threshold motion metric.

US Pat. No. 9,502,238

DEPOSITION OF CONFORMAL FILMS BY ATOMIC LAYER DEPOSITION AND ATOMIC LAYER ETCH

Lam Research Corporation,...

11. A method of processing substrates in a chamber, the method comprising:
depositing a film by performing one or more cycles, a cycle comprising:
(a) providing a substrate having one or more features, each feature comprising a feature opening;
(b) exposing the substrate to a first precursor under conditions allowing the first precursor to adsorb onto the surface of
the substrate, thereby forming an adsorbed layer of the first precursor;

(c) after exposing the substrate to the first precursor, exposing the substrate to a halogen-containing etchant; and
(d) exposing the substrate to a second reactant and igniting a plasma to selectively etch the adsorbed layer of the first
precursor at or near the feature openings and form a film.

US Pat. No. 9,460,894

CONTROLLING ION ENERGY WITHIN A PLASMA CHAMBER

Lam Research Corporation,...

1. A system for controlling ion energy within a plasma chamber, comprising:
a sinusoidal radio frequency (RF) generator configured to generate a first sinusoidal signal;
an upper electrode coupled to the sinusoidal RF generator and configured to receive the first sinusoidal signal;
a nonsinusoidal RF generator including a sinusoidal waveform generator and a first filter, wherein the sinusoidal waveform
generator is configured to generate a second sinusoidal signal, and the first filter is configured to receive the second sinusoidal
signal and generate a nonsinusoidal signal having no off cycles;

a power amplifier coupled to the nonsinusoidal RF generator, the power amplifier configured to receive the nonsinusoidal signal
and generate an amplified nonsinusoidal signal;

a second filter coupled to the power amplifier, the second filter configured to receive the amplified nonsinusoidal signal
and generate a filtered nonsinusoidal signal having a series of pulses between consecutive off cycles, wherein the pulses
of the filtered nonsinusoidal signal are nonsinusoidal; and

a chuck coupled to the second filter, wherein the chuck includes a lower electrode and is configured to face at least a portion
of the upper electrode, the lower electrode is configured to receive the filtered nonsinusoidal signal to adjust ion energy
at the chuck to be between a lower threshold and an upper threshold.

US Pat. No. 9,437,400

INSULATED DIELECTRIC WINDOW ASSEMBLY OF AN INDUCTIVELY COUPLED PLASMA PROCESSING APPARATUS

Lam Research Corporation,...

1. An insulated dielectric window assembly for use as an upper wall of an inductively coupled plasma processing chamber in
which semiconductor substrates can be processed, the insulated dielectric window assembly comprising:
a dielectric window including a central bore extending between upper and lower surfaces configured to receive a top gas injector
and at least one blind bore in the upper surface configured to receive a temperature monitoring sensor;

an upper polymeric ring of a thermally insulating material on an outer exposed section of the dielectric window, the upper
polymeric ring including a cylindrical side wall and an annular upper wall extending radially inward from an upper end of
the cylindrical side wall, the cylindrical side wall on a side surface of the dielectric window and the annular upper wall
on an outer portion of the upper surface of the dielectric window so as to provide a thermal barrier from a surrounding ambient
atmosphere; and

a lower polymeric ring wherein a lower surface of the dielectric window is positioned on an upper surface of the lower polymeric
ring so as to provide a thermal barrier between the dielectric window and a support surface of the plasma processing chamber.

US Pat. No. 9,328,416

METHOD FOR THE REDUCTION OF DEFECTIVITY IN VAPOR DEPOSITED FILMS

Lam Research Corporation,...

1. A method for preparing a reaction chamber for depositing film on substrates, comprising:
flowing a liquid reagent into a heated injection module;
atomizing the liquid reagent in the heated injection module in the presence of helium to create a source gas comprising the
atomized liquid reagent and helium;

flowing the source gas from the heated injection module into the reaction chamber; and
exposing the reaction chamber to plasma to deposit a film from the source gas on surfaces of the reaction chamber while no
substrate is present in the reaction chamber.

US Pat. No. 9,064,909

METHOD OF PROCESSING A SEMICONDUCTOR SUBSTRATE IN A PLASMA PROCESSING APPARATUS

Lam Research Corporation,...

1. A method of processing a semiconductor substrate in a plasma processing apparatus, the method comprising:
placing a substrate on a substrate support in a reaction chamber of a plasma processing apparatus;
introducing a process gas into the reaction chamber with a composite showerhead electrode assembly comprising:
a backing plate comprising top and bottom surfaces with first gas passages therebetween, the bottom surface having bridged
and unbridged regions, the first gas passages having outlets in unbridged regions to supply a process gas to an interior of
the plasma processing apparatus;

an electrode plate having a top surface, a plasma exposed bottom surface, and second gas passages extending therebetween and
in fluid communication with the first gas passages, wherein the second gas passages have inlets in unbridged regions of the
top surface of the electrode plate; and

an interface gel disposed between facing surfaces at each of the bridged regions which establishes thermal contact between
the electrode plate and the backing plate and maintains the thermal contact during movement in a lateral direction of the
electrode plate relative to the backing plate during temperature cycling due to mismatch of coefficients of thermal expansion
in the electrode plate and the backing plate; wherein the electrode plate is joined to the backing plate to allow the movement;

generating a plasma from the process gas in the reaction chamber between the composite showerhead electrode assembly and the
substrate;

processing the substrate with the plasma.

US Pat. No. 9,058,960

COMPRESSION MEMBER FOR USE IN SHOWERHEAD ELECTRODE ASSEMBLY

Lam Research Corporation,...

11. A temperature-controlled showerhead electrode assembly comprising:
a temperature-controlled top plate;
a showerhead electrode;
a thermal control plate attached to the temperature-controlled top plate and showerhead electrode so as to provide a thermal
path between the showerhead electrode and the temperature-controlled top plate;

a film heater on an upper surface of the thermal control plate;
power supply boots on the thermal control plate and electrically connected to sections of the film heater; and
compression members configured to fit between the temperature-controlled top plate and the thermal control plate such that
a lower surface of each compression member contacts an upper surface of the film heater, adjacent a respective power supply
boot on the thermal control plate wherein a compression force is applied to a portion of the film heater surrounding each
power supply boot.

US Pat. No. 9,111,968

PLASMA PROCESSING CHAMBER WITH A GROUNDED ELECTRODE ASSEMBLY

Lam Research Corporation,...

1. A plasma processing chamber having an electrical management of radio frequency (RF) fields, wherein the plasma processing
chamber comprises:
an upper electrode assembly configured to provide a ground path for the plasma processing chamber, wherein the upper electrode
assembly includes an electrode configured to be exposed to a set of gases and provides conduits for distributing the set of
gases into the plasma processing chamber; and

a lower electrode assembly configured to provide power to the plasma processing chamber to generate plasma from the set of
gases disposed therein, wherein the lower electrode assembly includes a powered electrode configured to receive power from
a set of (RF) generators positioned outside the plasma processing chamber and to provide power to the plasma processing chamber,

wherein the upper electrode assembly comprises:
an electrode configured to be exposed to a plasma;
a heater plate disposed above said electrode, wherein said heater plate is configured to heat said electrode;
a backing plate disposed between the electrode and the heater plate, wherein the backing plate is configured to substantially
electrically isolate the electrode from the heater plate;

a cooling plate disposed above and in contact with said heater plate, wherein said cooling plate is configured to cool said
electrode; and

a plasma chamber lid configured to confine the plasma in the plasma chamber, wherein the plasma chamber lid comprises,
a ground; and
a clamp ring configured to secure the electrode to the plasma chamber lid,
a pocket formed by contacting together:
the clamp ring;
an RF conductive gasket; and
the electrode,
wherein the RF conductive gasket is disposed between the clamp ring and the electrode to form an arrangement for an optimized
RF return path to ground, wherein the pocket comprises a space for receiving the backing plate over the electrode, the heater
plate over the backing plate, and the cooling plate over the heater plate, such that no metal fasteners are used to couple
together any one of the backing plate to the heater plate and the heater plate to the cooling plate when disposed in the space
of the pocket; and

an annular shield covering a bottom surface of the clamp ring, the annular shield including a lateral ledge that overlaps
at a seam between the clamp ring and the electrode.

US Pat. No. 9,074,285

SYSTEMS FOR DETECTING UNCONFINED-PLASMA EVENTS

LAM RESEARCH CORPORATION,...

1. A system for detecting unconfined-plasma events in a plasma processing chamber, the system comprising:
a capacitive sensor comprising:
a conductive plate that is arranged a predetermined distance from a conducting surface of the plasma processing chamber,
wherein the conductive plate includes an outer planar surface facing an interior of the plasma processing chamber and an inner
planar surface arranged parallel to the conducting surface of the plasma processing chamber;

a first insulating layer arranged around and in direct contact with the conductive plate;
a second insulating layer that is arranged between and in direct contact with the first insulating layer and in direct contact
with the conducting surface of the plasma processing chamber; and

a conductor configured to provide a connection though a bore in the conducting surface of the plasma processing chamber, the
first insulating layer and the second insulating layer to the conductive plate,

wherein the second insulating layer extends though the bore in the conducting surface of the plasma processing chamber and
insulates the conductor from the bore in the conducting surface of the plasma processing chamber, and

wherein the capacitive sensor is not biased by a power supply during a normal operating mode;
a converter connected to the conductor and configured to convert current, that is output by the capacitive sensor and that
is generated due to charging of the capacitive sensor during the unconfined-plasma events, to a voltage;

a filter configured to remove noise from the voltage and to generate a first signal; and
a detector configured to detect the unconfined-plasma events in the plasma processing chamber based on the first signal.

US Pat. No. 9,530,620

DUAL CONTROL MODES

Lam Research Corporation,...

18. A plasma system for using different variables based on a state associated with the plasma system, comprising:
a plasma chamber including:
a chuck for supporting a substrate; and
an upper electrode on top of the chuck;
an impedance matching circuit coupled to the plasma chamber via a first communication medium;
a radio frequency (RF) generator coupled to the impedance matching circuit via a second communication medium;
a sensor for generating a first measurement and a second measurement from RF signals transferred via the first communication
medium;

a processor coupled to the RF generator, the processor configured to:
determine whether a state associated with the plasma system is a first state or a second state;
determine an ion energy associated with the plasma chamber upon determining that the state is the second state, the ion energy
determined based on the first measurement;

determine whether the ion energy exceeds a first ion energy threshold;
provide an instruction to reduce power supplied to the plasma chamber upon determining that the ion energy exceeds the first
ion energy threshold; and

provide an instruction to increase the power supplied to the plasma chamber upon determining that the ion energy is below
the first ion energy threshold.

US Pat. No. 9,364,870

ULTRASONIC CLEANING METHOD AND APPARATUS THEREFORE

Lam Research Corporation,...

1. A method of cleaning a substantially planar article, comprising:
providing a tank comprising (i) a top portion, (ii) a bottom portion, and (iii) a sidewall disposed therebetween, the tank
configured to contain a cleaning fluid and to receive a substantially planar article submerged in the cleaning fluid; (iv)
a plurality of cleaning fluid inlets at least partially disposed in the sidewall; (v) a plurality of fluid outlet ports disposed
in the sidewall; (vi) an intermediate support for receiving the substantially planar article, the support comprising an upper
support surface, a base structure opposite the upper support surface, and a plurality of radial cleaning fluid passages extending
through the base structure from an outer circumference of the support to an inner circumference of the support; and (vii)
an ultrasonic generator coupled to the tank for generating ultrasonic waves in the tank and the cleaning fluid received therein;

introducing the substantially planar article to be cleaned into the tank such that the substantially planar article is received
and maintained by the support above the plurality of cleaning fluid inlets and below the plurality of fluid outlet ports;

introducing the cleaning fluid into the tank through the plurality of cleaning fluid inlets;
exciting the cleaning fluid with ultrasonic waves; and
allowing the cleaning fluid to flow out of the tank through the plurality of fluid outlet ports;
wherein particles are removed from the substantially planar article and carried by flow of the cleaning fluid away from the
substantially planar article and out of the tank.