US Pat. No. 9,653,488

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Hannstar Display (Nanjing...

1. A semiconductor device, comprising:
a transparent substrate;
a gate electrode disposed on the transparent substrate;
a gate insulation layer covering the gate electrode;
an oxide semiconductor layer disposed on the gate insulation layer and at least partially over the gate electrode;
an etching stop layer disposed over the gate electrode and at least covering a part of the oxide semiconductor layer, and
including an opening; and

an electrode layer disposed at the opening and on a part of the etching stop layer;
wherein a part of the oxide semiconductor layer uncovered by the etching stop layer and the electrode layer is a pixel electrode.

US Pat. No. 9,538,316

SMART MONITOR SYSTEM AND HAND-HELD ELECTRONIC DEVICE

HANNSTAR DISPLAY (NANJING...

1. A smart monitor system, comprising:
a hand-held electronic device, comprising:
a panel;
an eyeball tracking module, acquiring an eyeball information, wherein the eyeball information corresponds to a position information
on the panel, and the position information corresponds to an object displayed on the panel;

a control unit;
a touch-sensing cover, having a cover and a touch-sensing structure, wherein the cover is disposed on the side of the hand-held
electronic device opposite the panel, partial or total area of the touch-sensing structure is disposed on the cover, and the
touch-sensing structure is electrically connected to the control unit;

a wireless communication unit, having a wireless communication chip and an antenna, wherein the wireless communication chip
is electrically connected to the control unit, and the antenna is disposed on the touch-sensing cover; and

a monitor, having a display panel and a wireless unit, wherein the monitor is wirelessly connected to the wireless communication
unit of the hand-held electronic device by the wireless unit;

wherein the wireless communication unit transmits a display information to the monitor by the wireless connection.

US Pat. No. 9,673,149

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Hannstar Display (Nanjing...

1. A method for manufacturing a semiconductor device, comprising:
providing a transparent substrate having a display region and an non-display region;
forming a gate and at least an alignment mark coplanarly on the transparent substrate, wherein the gate is located in the
display region and the alignment mark is located in the non-display region;

forming a gate insulation layer to cover the gate and cover the alignment mark and prevent the alignment mark from being etched;
forming an oxide semiconductor layer on the gate insulation layer and above the gate; and
forming an etching stop layer above the gate and the alignment mark to cover the alignment mark and prevent the alignment
mark from being etched.

US Pat. No. 9,704,895

DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME

HannStar Display (Nanjing...

1. A display device, comprising:
a first substrate having a displaying area and a non-displaying area, wherein the displaying area comprises a pixel array,
and the non-displaying area comprises a driving circuit, and the driving circuit comprises at least a capacitor which is made
of transparent conductive material;

a second substrate having an opaque area; and
a light curable sealant disposed between the first substrate and the second substrate,
wherein the light curable sealant, the capacitor and the opaque area are at least partially overlapped with each other when
viewing from a normal vector of the first substrate or the second substrate.

US Pat. No. 9,812,514

ANNULAR DISPLAY DEVICE AND FABRICATION METHOD THEREOF

HannStar Display (Nanjing...

1. An annular display device, comprising:
a display module, comprising:
a first flexible substrate having a first ring shape, the first ring shape having a first gap portion, wherein the first flexible
substrate has a first end portion and a second end portion opposite to each other, and the first end portion and the second
end portion form the first gap portion; and

a thin film transistor element layer and an organic light emitting element layer disposed on the first flexible substrate;
a touch module, comprising:
a second flexible substrate disposed on the display module and having a second ring shape, the second ring shape having a
second gap portion, wherein the second flexible substrate has a third end portion and a fourth end portion opposite to each
other, and the third end portion and the fourth end portion form the second gap portion, and the second gap portion corresponds
to the first gap portion; and

a touch sensing layer disposed on the second flexible substrate; and
a flexible circuit board electrically connected to the display module and the touch module.

US Pat. No. 9,865,223

OPTOELECTRONIC MODULATION STACK

Hannstar Display (Nanjing...

1. An optoelectronic modulation stack, comprising:
a substrate;
a plurality of touch sensing units coplanarly disposed on the substrate, wherein a first interval region is formed between
the adjacent touch sensing units;

at least one first anti-interference spot disposed within the first interval region, wherein the width of the first anti-interference
spot is substantially less than that of the substrate or one of the plurality of touch sensing units, and the at least one
first anti-interference spot and the plurality of touch sensing units have the same material; and

a nano-structural layer disposed below the at least one first anti-interference spot and having a plurality of nano structures,
wherein at least a part of the nano-structural layer is disposed directly below the at least one first anti-interference spot;

wherein when a light passes through the plurality of nano structures and the at least one first anti-interference spot, the
optical characteristic of the light is changed.

US Pat. No. 9,846,500

ORGANIC ELECTROLUMINESCENT TOUCH PANEL WITH ANTI-INTERFERENCE STRUCTURES

Hannstar Display (Nanjing...

1. An organic electroluminescent touch panel, comprising:
a protection unit;
a plurality of touch-sensing units coplanarly disposed on the protection unit, wherein a first interval region is formed between
the adjacent touch-sensing units;

at least one first anti-interference spot disposed in the first interval region, wherein a width of the first anti-interference
spot is between 50 ?m and 70 ?m, and a width of the first interval region is between 70 ?m and 130 ?m;

a substrate disposed corresponding to the protection unit;
a first electrode layer disposed on the substrate;
an organic layer stack disposed on the first electrode layer; and
a second electrode layer disposed on the organic layer stack, wherein the first electrode layer, the organic layer stack and
the second electrode layer are disposed in the space formed by the protection unit and the substrate.

US Pat. No. 9,831,348

THIN FILM TRANSISTOR WITH IMPROVED CARRIER MOBILTY

HannStar Display (Nanjing...

1. A thin film transistor (TFT), comprising:
a gate electrode disposed on a substrate;
a first gate dielectric layer disposed on the gate electrode and the substrate and directly contacting the gate electrode,
wherein a ratio of a number of silicon-hydrogen bonds to a number of nitrogen-hydrogen bonds of the first gate dielectric
layer is substantially between 0.2 and 1.0;

a second gate dielectric layer disposed on the first gate dielectric layer, wherein a ratio of the number of silicon-hydrogen
bonds to the number of nitrogen-hydrogen bonds of the second gate dielectric layer is substantially between 0.01 and 0.2;

a channel layer disposed on and directly contacting the second gate dielectric layer; and
a source electrode and a drain electrode, wherein the source electrode and the drain electrode are disposed at two opposite
sides of the channel layer, and a gap exists between the source electrode and the drain electrode.

US Pat. No. 9,842,531

GATE DRIVING CIRCUIT AND DISPLAY DEVICE

HannStar Display (Nanjing...

1. A gate driving circuit, comprising:
first to eighth clock signal lines configured to provide first to eighth clock signals, respectively; and
first 1st to Nth stage shift registers, wherein the first ith stage shift register of the first shift registers is coupled to one of the first to eighth clock signal lines, and the first
ith stage shift register receives one of the first to eighth clock signals, a first input signal and a second input signal and
outputs a first ith stage output signal;

wherein, when i is any integer from 5 to (N?4), the first input signal is a first (i?4)th stage output signal outputted by the first (i?4)th stage shift register, and the second input signal is a first (i+4)th stage output signal outputted by the first (i+4)th stage shift register;

wherein N is an integer greater than or equal to 9, and i is any integer from 1 to N.

US Pat. No. 9,818,772

DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME

HannStar Display (Nanjing...

1. A display device, comprising:
a first substrate having a displaying area and a non-displaying area, wherein the displaying area comprises a pixel array,
and the non-displaying area comprises a driving circuit, and the driving circuit comprises a capacitor;

a second substrate having an opaque area; and
a light curable sealant disposed between the first substrate and the second substrate,
wherein the light curable sealant, the capacitor and the opaque area are at least partially overlapped with each other when
viewing from a normal vector of the first substrate or the second substrate,

wherein the capacitor comprises a lower electrode formed by a first patterned transparent conductive layer and an upper electrode
formed by a second patterned transparent conductive layer.

US Pat. No. 9,842,862

FLEXIBLE ELECTRONIC DEVICE WITH ANTI-INTERFERENCE STRUCTURES AND MANUFACTURING METHOD THEREOF

HANNSTAR DISPLAY (NANJING...

1. A manufacturing method of a flexible electronic structure formed by a carrier separation process, comprising steps of:
providing a carrier;
attaching a flexible substrate to the carrier;
forming a plurality of touch-sensing units coplanarly on the flexible substrate, wherein a first interval region is formed
between the adjacent touch-sensing units;

coplanarly forming at least one first anti-interference spot within the first interval region, wherein a distance is between
the at least one first anti-interference spot and the adjacent touch-sensing unit;

coplanarly forming a ground unit with the plurality of touch-sensing units, wherein the grounding unit and the adjacent touch-sensing
unit have a second interval region therebetween;

forming at least one second anti-interference spot within the second interval region, wherein both the plurality of touch-sensing
units and the ground unit are disposed coplanarly with the at least one second anti-interference spot; and

separating the flexible substrate from the carrier.

US Pat. No. 10,088,715

IN-CELL TOUCH DISPLAY PANEL

HannStar Display (Nanjing...

1. An in-cell touch display panel having a display area and a non-display area, wherein the in-cell touch display panel comprises:a first substrate;
a plurality of data lines disposed on the first substrate along a first direction;
a plurality of gate lines disposed along a second direction, wherein an angle is included between the first direction and the second direction;
a plurality of touch sensing lines disposed on the first substrate, wherein an insulation layer is disposed between the data lines and the gate lines;
a plurality of pixel regions disposed in areas of the display area enclosed by the gate lines that are intersected with the data lines, wherein each of the pixel regions comprises a pixel structure, and each of the pixel structures comprises a pixel electrode;
a common electrode that is disposed in the display area and comprises a plurality of touch electrodes, wherein each of the touch electrodes corresponds to more than one of the pixel electrodes, and each of the pixel electrodes corresponds to a sub-common electrode which is a portion of the touch electrode;
a thin film transistor disposed in one of the pixel structures, wherein the thin film transistor comprises a gate, a source, a drain, and a semiconductor layer;
a second substrate, wherein a liquid crystal layer is disposed between the first substrate and the second substrate;
a plurality of display pads and a plurality of touch pads, wherein the display pads and the touch pads are disposed in the non-display area,
wherein the data lines and the sub-common electrodes are disposed on the insulation layer, and the pixel electrodes are disposed above the sub-common electrodes and are spatially insulated from the sub-common electrodes; and
a plurality of metal connection structures, wherein each of the metal connection structures is electrically connected to two adjacent ones of the sub-common electrodes along the second direction, and the metal connection structures and the data lines are formed by different metal layers.

US Pat. No. 10,115,910

ORGANIC ELECTROLUMINESCENT MATERIAL, ORGANIC ELECTROLUMINESCENT DEVICE AND QUANTUM DOT ELECTROLUMINESCENT UNIT

HANNSTAR DISPLAY (NANJING...

1. An organic electroluminescent material, comprising a structure of the following Formula (1),
wherein one of R2, R4 or R6, or two of R2, R4, R6, R9, or R13 are independent triazole derivatives, and the triazole derivatives have the structure of the following Formula (2),

the other substituents of R1 to R23 are independently selected from the group consisting of a hydrogen atom, a fluorine atom, a cyano group, an alkyl group, a cycloalkyl group, an alkoxy group, a thioalkyl group, a silyl group, and an alkenyl group.

US Pat. No. 10,121,438

SHIFT REGISTER AND DISPLAY DEVICE

HannStar Display (Nanjing...

1. A shift register, comprising:a pre-charge unit configured to receive a first input signal and a second input signal and output a pre-charge signal via a first node based on the first input signal and the second input signal;
a pull-up unit that is coupled to the pre-charge unit, the pull-up unit configured to receive the pre-charge signal and a clock signal and output a scan signal via a second node based on the pre-charge signal and the clock signal;
a first pull-down unit coupled to the pre-charge unit and the pull-up unit, the first pull-down unit configured to receive the pre-charge signal, a first pull-down control signal and a second pull-down control signal and control whether to pull down the scan signal to a reference voltage level based on the pre-charge signal, the first pull-down control signal and the second pull-down control signal; and
a second pull-down unit coupled to the pre-charge unit and the pull-up unit, the second pull-down unit configured to receive the pre-charge signal, the first pull-down control signal and the second pull-down control signal and control whether to keep the scan signal at the reference voltage level based on the pre-charge signal, the first pull-down control signal and the second pull-down control signal;
wherein periods of the first pull-down control signal and the second pull-down control signal are in a range from 12 frames to 180 frames, and a time interval between a rising edge of the first pull-down control signal and a falling edge of the second pull-down control signal is in a range from 2 microseconds to 4 microseconds.

US Pat. No. 10,121,432

SHIFT REGISTER AND DISPLAY DEVICE

HANNSTAR DISPLAY (NANJING...

1. A display device, comprising:a display panel; and
a shift register device configured to drive the display panel, and including at least one shift register unit including:
a primary circuit having an output terminal, a first and a second input terminals, and a first common terminal; and
a secondary circuit electrically connected to the first common terminal, and including:
an inverting circuit; and
a pull-down circuit electrically connected to the inverting circuit, and including:
a first transistor having a first top gate, a first bottom gate, a first first electrode and a first second electrode;
a second transistor having a second top gate, a second bottom gate, a second first electrode and a second second electrode;
a third transistor having a third top gate, a third bottom gate, a third first electrode and a third second electrode; and
a fourth transistor having a fourth top gate, a fourth bottom gate, a fourth first electrode and a fourth second electrode, wherein:
the pull-down circuit has a second and a third common terminals;
the first and the second bottom gates are electrically connected to the second common terminal; and
the third and the fourth bottom gates are electrically connected to the third common terminal.

US Pat. No. 9,910,547

ANTI-INTERFERENCE TOUCH SENSING STRUCTURE

HANNSTAR DISPLAY (NANJING...

1. An anti-interference touch sensing structure, comprising:
a first substrate;
a plurality of touch sensing units coplanarly disposed on the first substrate, wherein a first interval region is formed between
the adjacent touch sensing units; and

at least one first anti-interference spot disposed within the first interval region,
wherein a material of the at least one first anti-interference spot includes indium tin oxide (ITO).

US Pat. No. 10,096,372

SHIFT REGISTER AND DISPLAY APPARATUS

HannStar Display (Nanjing...

1. A shift register, comprising:a pre-charge unit configured to receive a first input signal and a second input signal and to output a pre-charge signal via a first node based on the first input signal and the second input signal, wherein the pre-charge unit comprises:
a first transistor, wherein a gate of the first transistor is configured to receive a scan signal outputted by a previous four stage shift register, a first source/drain of the first transistor is configured to receive a forward input signal, and a second source/drain of the first transistor is configured to output the pre-charge signal; and
a second transistor, wherein a gate of the second transistor is configured to receive a scan signal outputted by a next four stage shift register, a first source/drain of the second transistor is configured to receive a backward input signal, and a second source/drain of the second transistor is coupled to the second source/drain of the first transistor;
a pull-up unit coupled to the pre-charge unit, the pull-up unit configured to receive the pre-charge signal and a clock signal and to output a scan signal via a second node based on the pre-charge signal and the clock signal;
a first pull-down unit coupled to the pre-charge unit and the pull-up unit, the first pull-down unit configured to receive the pre-charge signal, a first pull-down control signal and a second pull-down control signal and to control whether to pull down the scan signal to a first reference voltage level based on the pre-charge signal, the first pull-down control signal and the second pull-down control signal; and
a second pull-down unit coupled to the pre-charge unit and the pull-up unit, the second pull-down unit configured to receive the pre-charge signal, the first pull-down control signal and the second pull-down control signal and to control whether to keep the scan signal at the first reference voltage level based on the pre-charge signal, the first pull-down control signal and the second pull-down control signal;
wherein a duty cycle of the clock signal is less than 50 percent.

US Pat. No. 10,181,303

SHIFT REGISTER CIRCUIT WITH TWO DISCHARGING MODULES

HANNSTAR DISPLAY (NANJING...

1. A shift register circuit, comprising:a first gate driving module having a first node and a first output terminal;
a second gate driving module having a second node and a second output terminal;
a first discharging module comprising a discharge control unit and a level pull-low unit coupled to each other, configured to be coupled to the first node of the first gate driving module, the second node of the second gate driving module and the first output terminal of the first gate driving module respectively; and
a second discharging module comprising a discharge control unit and a level pull-low unit coupled to each other, configured to be coupled to the second node of the second gate driving module, the first node of the first gate driving module, and the second output terminal of the second gate driving module respectively;
wherein both of the first discharging module and the second discharging module each comprising ten transistors respectively; the discharge control unit of the first discharging module comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, and a sixth transistor coupled to each other; the fifth transistor of the first discharging module is configured to be coupled to the first transistor of the first discharging module and a gate electrode of the fifth transistor of the first discharging module is configured to be coupled to the sixth transistor of the first discharging module.

US Pat. No. 10,229,747

DISPLAY PANEL AND GATE DRIVING CIRCUIT THEREOF

HANNSTAR DISPLAY (NANJING...

1. A gate driving circuit disposed on a first substrate, the gate driving circuit comprising:a first transistor unit disposed on the first substrate, the first transistor unit comprising N1 number of gate blocks (N1?2) and at least one connection portion, wherein each of the at least one connection portion is located between adjacent ones of the gate blocks and is electrically connected to the adjacent ones of the gate blocks, the at least one connection portion and the gate blocks are in the same layer, and at least one gap is formed between the adjacent ones of the gate blocks.

US Pat. No. 10,280,339

METHOD FOR MANUFACTURING FLEXIBLE ELECTRICAL DEVICE

HannStar Display (Nanjing...

1. A method for manufacturing a plurality of flexible electrical devices, the method comprising:providing a carrier substrate;
forming a releasing layer on the carrier substrate;
forming a flexible substrate on the releasing layer, wherein the flexible substrate has a first surface and a second surface opposite to the first surface, the first surface faces the releasing layer, and the flexible substrate is not in contact with the carrier substrate;
forming a device layer on the flexible substrate, wherein the device layer has a third surface and a fourth surface opposite to the third surface, and the third surface faces the flexible substrate;
separating the flexible substrate from the releasing layer and keeping the releasing layer remaining on the carrier substrate; and
forming another flexible substrate on the releasing layer after the flexible substrate is separated from the releasing layer.

US Pat. No. 10,254,612

DISPLAY PANEL AND METHOD OF FABRICATING THE SAME

HannStar Display (Nanjing...

1. A display panel, comprising:a first substrate having an active area and a peripheral area;
a pixel unit located on the active area of the first substrate, wherein the pixel unit comprises a pixel thin film transistor (TFT), a pixel electrode and a common electrode;
a connecting structure disposed on the first substrate and located in the peripheral area, wherein the connecting structure is configured to electrically connect different metal layers, and the connecting structure comprises:
a first metal layer disposed on the first substrate;
a first insulating layer disposed on the first substrate and the first metal layer;
a second metal layer disposed on the first insulating layer;
a second insulating layer disposed on the first insulating layer and the second metal layer, wherein a combination of the first insulating layer and the second insulating layer comprises a first through hole, wherein the second insulating layer further comprises a second through hole, and wherein the first through hole and the second through hole expose the first metal layer and the second metal layer, respectively; and
a conductive layer disposed on the second insulating layer, wherein the conductive layer is electrically connected to the first metal layer and the second metal layer respectively through the first through hole and second through hole, and the conductive layer and one of the pixel electrode and the common electrode belong to a transparent conductive layer;
a passivation layer disposed on the connecting structure, wherein the passivation layer covers the conductive layer;
a second substrate disposed opposite to the first substrate; and
a sealant sandwiched between the first substrate and the second substrate;
wherein a vertical projection of the sealant on the first substrate and a vertical projection of the connecting structure on the first substrate are overlapped.

US Pat. No. 10,495,928

IN-CELL TOUCH DISPLAY PANEL

HannStar Display (Nanjing...

1. An in-cell touch display panel having a display area and a non-display area, wherein the in-cell touch display panel comprises:a first substrate;
a plurality of data lines disposed on the first substrate along a first direction;
a plurality of gate lines disposed along a second direction, wherein an angle is formed between the first direction and the second direction;
a plurality of touch sensing lines disposed on the first substrate and electrically insulated from the data lines and the gate lines;
a plurality of pixel regions formed in the display area surrounded by the gate lines and the data lines intersecting with each other, wherein each of the pixel regions comprises a pixel structure, and each of the pixel structures comprises a pixel electrode;
a common electrode comprising a plurality of touch electrodes, wherein each of the touch electrodes corresponds to more than one of the pixel electrodes, and each of the pixel electrodes corresponds to a sub-common electrode which is a part of the touch electrode;
a plurality of thin film transistors (TFTs) formed in the pixel structures, wherein each of the thin film transistors comprises a gate, a source, a drain and a semiconductor layer;
a second substrate, wherein a liquid crystal layer is formed between the first substrate and the second substrate; and
a plurality of display pads and a plurality of touch pads, the display pads and the touch pads being disposed in the non-display area, wherein
each of the touch electrodes is electrically connected to at least one of the touch sensing lines, and each of the touch sensing lines is electrically connected to one of the touch pads;
each of the sources is electrically connected to one of the data lines, and each of the data lines is electrically connected to one of the display pads; and
at least one of the display pads is disposed between two of the touch pads, and at least one of the touch pads is disposed between two of the display pads,
wherein a number of the touch pads is less than a number of the display pads, the display pads and the touch pads are arranged as a plurality of rows, and one of the rows comprises at least part of the touch pads.

US Pat. No. 10,481,448

LIQUID CRYSTAL DISPLAY

HANNSTAR DISPLAY (NANJING...

1. A liquid crystal display device, comprising:a plurality of pixel units;
a first electrode line, wherein the first electrode line is an enclosed conductive ring surrounding the pixel units;
a gate driver coupled with at least some of the pixel units via a plurality of gate lines, wherein the gate driver includes a plurality of signal lines and a plurality of shift registers coupled between the signal lines and the plurality of gate lines, and a plurality of control signals are transmitted to the shift registers through the signal lines;
another gate driver coupled with at least some of the pixel units, wherein the gate driver and the another gate driver are respectively disposed at two opposite sides of an active region of the liquid crystal display device;
an electrostatic discharge protection circuit coupled with the gate driver;
another electrostatic discharge protection circuit coupled with the another gate driver, wherein the another electrostatic discharge protection circuit is electrically connected to the first electrode line;
a second electrode line, wherein the second electrode line is a non-enclosed conductive ring surrounding the first electrode line, and the gate driver is disposed between the first electrode line and the second electrode line; and
a conductive line, wherein the first electrode line and the second electrode line are electrically connected together through the conductive line;
wherein a common voltage is applied to the first electrode line and the second electrode line, and the electrostatic discharge protection circuit is electrically connected to the signal lines and the first electrode line.

US Pat. No. 10,714,203

SHIFT REGISTER AND DISPLAY APPARATUS

HannStar Display (Nanjing...

1. A shift register, comprising:a pre-charge unit configured to receive a first input signal and a second input signal and to output a pre-charge signal via a first node based on the first input signal and the second input signal, wherein the pre-charge unit comprises:
a first transistor, wherein a gate of the first transistor is configured to receive a starting signal, a first source/drain of the first transistor is configured to receive a forward input signal, and a second source/drain of the first transistor is configured to output the pre-charge signal; and
a second transistor, wherein a gate and a first source/drain of the second transistor are configured to receive a scan signal outputted by a next four stage shift register, and a second source/drain of the second transistor is coupled to the second source/drain of the first transistor;
a pull-up unit coupled to the pre-charge unit, the pull-up unit configured to receive the pre-charge signal and a clock signal and to output a scan signal via a second node based on the pre-charge signal and the clock signal;
a first pull-down unit coupled to the pre-charge unit and the pull-up unit, the first pull-down unit configured to receive the pre-charge signal, a first pull-down control signal and a second pull-down control signal and to control whether to pull down the scan signal to a first reference voltage level based on the pre-charge signal, the first pull-down control signal and the second pull-down control signal; and
a second pull-down unit coupled to the pre-charge unit and the pull-up unit, the second pull-down unit configured to receive the pre-charge signal, the first pull-down control signal and the second pull-down control signal and to control whether to keep the scan signal at the first reference voltage level based on the pre-charge signal, the first pull-down control signal and the second pull-down control signal;
wherein a duty cycle of the clock signal is less than 50 percent.

US Pat. No. 10,593,283

DISPLAY PANEL

HannStar Display (Nanjing...

1. A display panel, comprising:a first substrate;
a second substrate disposed opposite to the first substrate;
a plurality of pixel structures disposed between the first substrate and the second substrate, wherein each of the pixel structures comprises a thin film transistor, a pixel electrode and a common electrode;
a liquid crystal layer disposed between the pixel structures and the second substrate; and
a transparent conductive layer disposed between the second substrate and the liquid crystal layer, wherein a voltage of the transparent conductive layer minus a voltage of the common electrode is a voltage difference between the transparent conductive layer and the common electrode,
wherein when a liquid crystal molecule of the liquid crystal layer is a positive liquid crystal molecule, an absolute value of the voltage difference between the transparent conductive layer and the common electrode is smaller than or equal to 2.3 volts(V), the voltage of the transparent conductive layer is greater than or equal to the voltage of the common electrode in a first frame period, the voltage of the transparent conductive layer is smaller than or equal to the voltage of the common electrode in a second frame period next to the first frame period, and the voltage of the common electrode in the first frame period is smaller than that in the second frame; or
when the liquid crystal molecule of the liquid crystal layer is a negative liquid crystal molecule, the absolute value of the voltage difference between the transparent conductive layer and the common electrode is smaller than or equal to 5 V, the voltage of the transparent conductive layer is greater than or equal to the voltage of the common electrode in the first frame period, the voltage of the transparent conductive layer is smaller than or equal to the voltage of the common electrode in the second frame period, and the voltage of the common electrode in the first frame period is smaller than that in the second frame.

US Pat. No. 10,656,434

DISPLAY DEVICE WITH TWO DISPLAY PANELS

HannStar Display (Nanjing...

1. A display device, comprising:a first display panel, comprising:
a first polarizer, a first substrate, a second substrate and a plurality of first pixel structures, wherein the first substrate is disposed between the first polarizer and the second substrate, and the first pixel structures have a first pixel pitch; and
a second display panel, comprising:
a third substrate, a fourth substrate, a second polarizer and a plurality of second pixel structures, wherein the fourth substrate is disposed between the third substrate and the second polarizer, the third substrate is disposed between the second substrate and the fourth substrate, and the second pixel structures have a second pixel pitch, wherein
the first polarizer has a thickness d1 and a refractive index n1;
the first substrate has a thickness d2 and a refractive index n2;
the second substrate has a thickness d3 and a refractive index n3; and
the third substrate has a thickness d6 and a refractive index n6;
a moiré pitch of a moiré pattern generated by the display device is calculated according to the following relationships:

wherein m and n are positive integers, L represents a viewing distance between a user and the first display panel, K represents a distance between the first display panel and the second display panel, Ptop represents the first pixel pitch, Pbottom represents the second pixel pitch, nL represents a refractive index of a medium between the user and the first display panel, nK represents a refractive index of a medium between the first display panel and the second display panel,
wherein for each set of (m,n) in a range of m+n?9, the moiré pitch is less than 500 micrometer.

US Pat. No. 10,649,566

IN-CELL TOUCH DISPLAY PANEL

HannStar Display (Nanjing...

1. An in-cell touch display panel having a display area and a non-display area, wherein the in-cell touch display panel comprises:a first substrate;
a plurality of gate lines and a plurality of data lines that are intersected with each other on the first substrate;
a plurality of touch sensing lines disposed on the first substrate, wherein the touch sensing lines are not spatially connected with the data lines in the display area;
a plurality of pixel regions disposed in areas of the display area enclosed by the gate lines that are intersected with the data lines, wherein each of the pixel regions has a pixel structure, and each of the pixel structures comprises a pixel electrode formed by a first transparent conductive layer;
a common electrode formed by a patterned second transparent conductive layer, wherein the common electrode comprises a plurality of touch electrodes in the display area, each of the touch electrodes corresponds to more than one of the pixel electrodes, each of the pixel electrodes corresponds to a sub-common electrode which is a portion of the touch electrode, and each of the touch electrodes is electrically connected to at least one of the touch sensing lines;
a thin film transistor disposed in one of the pixel structures, wherein the thin film transistor comprises a gate, a source, a drain and a semiconductor layer, the source is electrically connected to one of the data lines, and one of the pixel electrodes is electrically connected to the drain;
a plurality of display pads and a plurality of touch pads disposed in the non-display area;
a second substrate, wherein a liquid crystal layer is disposed between the first substrate and the second substrate;
a first insulation layer disposed between the gate and the semiconductor layer;
a second insulation layer disposed on the first insulation layer;
a third insulation layer disposed on the second insulation layer;
a fourth insulation layer disposed on the third insulation layer;
a first metal layer disposed on the first substrate, wherein the first metal layer comprises the gate, the first insulation layer is disposed on the first metal layer, and the semiconductor layer is disposed on the first insulation layer;
a second metal layer disposed on the semiconductor layer, the second metal layer comprises the source and the drain, the second insulation layer is disposed on the second metal layer, and the second insulation layer has a first contact hole to expose the drain; and
a third metal layer disposed on the second insulation layer, wherein the touch sensing lines are formed by the third metal layer in the display area,
wherein the sub-common electrodes are disposed on one of the third insulation layer and fourth insulation layer;
a thickness of the third insulation layer is greater than or equal to a thickness of the second insulation layer;
a thickness of the third insulation layer is 1.2 or more times of a thickness of the fourth insulation layer;
the thickness of the third insulation layer is greater than or equal to 5000 ?;
a sum of the thickness of the third insulation layer and the thickness of the fourth insulation layer is greater than or equal to 7000 ?;
the third insulation layer is disposed on the third metal layer, the third insulation layer has a second contact hole to expose the touch sensing lines, and the third insulation layer has a third contact hole corresponding to the first contact hole;
the sub-common electrodes are disposed on the third insulation layer, one of the sub-common electrodes is electrically connected to one of the touch sensing lines through the second contact hole;
the fourth insulation layer is disposed on the sub-common electrodes, and the fourth insulation layer has a fourth contact hole corresponding to the third contact hole; and
the pixel electrodes are disposed on the fourth insulation layer, one of the pixel electrodes is electrically connected to the drain through the fourth contact hole, the third contact hole and the first contact hole.