US Pat. No. 9,256,121

MASK PLATE AND A METHOD FOR PRODUCING A SUBSTRATE MARK

Boe Technology Group Co.,...

1. A mask plate comprising:
a display region mask part;
at least one pair of test mark mask parts, a test mark mask part of the pair of test marks mask parts being located on either
side of the display region mask part respectively and the two test mark mask parts' positions being opposite to each other;
and

a protection mark mask part correspondingly disposed on the outside of each test mark mask part relative to the display region
mask part, wherein the pattern outline of the protection mark mask part is larger than that of the test mark mask part.

US Pat. No. 9,201,445

GATE DRIVING CIRCUIT FOR THIN FILM TRANSISTOR LIQUID CRYSTAL DISPLAY AND THIN FILM TRANSISTOR LIQUID CRYSTAL DISPLAY

BOE Technology Group Co.,...

1. A gate driving circuit comprising a plurality of shift register connected in cascade, the shift register comprising:
a signal outputting circuit which receives a forward direction clock signal from an external circuit and comprises a clock
transistor and a level transistor, wherein the signal outputting circuit outputs the forward direction clock signal when the
clock transistor is turned on and outputs a constant-low level signal when the level transistor is turned on;

a signal inputting circuit which is connected to a gate of the clock transistor and receives an output signals from a previous
shift register, and turns on the clock transistor when the received output signal of the previous shift register is valid;

an inverting circuit which is connected to the gate of the clock transistor and a gate of the level transistor, and receives
an inverse direction clock signal from the external circuit, wherein the inverting circuit turns off the clock transistor
and turns on the level transistor at the same time when the inverse direction clock signal is valid;

a logic circuit which is connected to the clock transistor and holds the clock transistor as being turned on before the level
transistor is turned on.

US Pat. No. 9,307,684

LIQUID CRYSTAL DISPLAY PANEL COMPRISING AT LEAST ONE SHIELDING LAYER HAVING OPENINGS POSITIONED ABOVE A PLURALITY OF SIGNAL LEADS

BOE TECHNOLOGY GROUP CO.,...

1. A liquid crystal display (LCD) panel having a display region and a periphery region and comprising an array substrate and
a color filter substrate opposite to each other, wherein the array substrate comprises a plurality of pixel regions defined
by intersecting signal lines in the display region, each pixel region comprises a thin film transistor, and signal leads are
disposed in the periphery region and connected to the signal lines; the LCD panel further comprising:
at least one shielding layer located in the periphery region, which is grounded and electrically conductive,
wherein, the at least one shielding layer is formed on the array substrate and covers at least part of the signal leads, and
an insulating layer is disposed between the at least one shielding layer and the signal leads; and

wherein openings are positioned in the at least one shielding layer above at least the signal leads.

US Pat. No. 9,262,966

PIXEL CIRCUIT, DISPLAY PANEL AND DISPLAY APPARATUS

BOE TECHNOLOGY GROUP CO.,...

1. A pixel circuit comprising a charging sub-circuit, a first driving sub-circuit, a second driving sub-circuit, a first capacitor
and a second capacitor, wherein
a first terminal of the first capacitor is connected to a first terminal of the first driving sub-circuit and a first terminal
of the second driving sub-circuit, and a second terminal of the first capacitor is connected to the charging sub-circuit and
a first terminal of the second capacitor;

a second terminal of the first driving sub-circuit is connected to a first light emitting device, and a second terminal of
the second driving sub-circuit is connected to a second light emitting device, wherein the flow direction of the driving current
flowing into the first light emitting device from the first driving sub-circuit is opposite to that of the driving current
flowing into the second light emitting device from the second driving sub-circuit; and

the charging sub-circuit is used to charge the first capacitor, the second capacitor is used to maintain the voltage at the
second terminal of the first capacitor, and when the first capacitor discharges, the first driving sub-circuit drives the
first light emitting device to emit light or the second driving sub-circuit drives the second light emitting device to emit
light.

US Pat. No. 9,310,937

TOUCH DRIVING CIRCUIT, OPTICAL IN CELL TOUCH PANEL AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A touch driving circuit comprising a photosensitive sub-module, a driving sub-module and a controlling sub-module, wherein,
a first signal input terminal of the photosensitive sub-module is connected with a switch signal terminal, a second signal
input terminal of the photosensitive sub-module is connected with a gate signal terminal, a signal output terminal of the
photosensitive sub-module is connected with a first signal input terminal of the driving sub-module; the photosensitive sub-module
is configured to output a touch signal to the driving sub-module under controls of the switch signal terminal and the gate
signal terminal;

a second signal input terminal of the driving sub-module is connected with a reference signal terminal, a third signal input
terminal of the driving sub-module is connected with a control signal terminal and a first signal input terminal of the controlling
sub-module, respectively, a signal output terminal of the driving sub-module is connected with a second signal input terminal
of the controlling sub-module; the driving sub-module is configured to output a touch sensing signal to the controlling sub-module
under a control of the touch signal, the touch sensing signal decreasing as an intensity of light irradiated on the photosensitive
sub-module increases; and

a signal output terminal of the controlling sub-module is connected with a touch signal reading terminal; the controlling
sub-module is configured to output the touch sensing signal to the touch signal reading terminal when the control signal terminal
controls the controlling sub-module to be in a turn-on state,

wherein the photosensitive sub-module further comprises a photosensitive transistor;
wherein a gate of the photosensitive transistor is connected with the switch signal terminal, a source of the photosensitive
transistor is connected with the gate signal terminal, and a drain of the photosensitive transistor is connected with the
first signal input terminal of the driving sub-module.

US Pat. No. 9,268,161

METHOD FOR MANUFACTURING A LIQUID CRYSTAL PANEL

BOE TECHNOLOGY GROUP CO.,...

1. A method for manufacturing a liquid crystal panel, comprising the followings steps:
bonding a first substrate with a second substrate so as to form a mother substrate;
forming an array pattern on a first substrate side of the mother substrate, the first substrate side being away from the second
substrate;

separating the first substrate and the second substrate of the mother substrate; and
bonding the separated first substrate and the second substrate so that the array pattern is located between the first and
second substrates.

US Pat. No. 9,244,303

WIDE-VIEWING-ANGLE LIQUID CRYSTAL DISPLAY PANEL, COLOR FILM BASE PLATE AND MANUFACTURING METHOD THEREOF AS WELL AS DISPLAY DEVICE

BOE Technology Group Co.,...

1. A color filter substrate, applied to a wide view angle LCD panel comprising an array substrate and the color filter substrate,
wherein the array substrate comprising a planar electrode and a slit electrode, which are overlapped and insulated with each
other and configured to produce an electric field capable of driving liquid crystal molecules to rotate; and the color filter
substrate comprising:
a transparent substrate; and
a color filter arranged on the transparent substrate;
wherein after the array substrate and the color filter substrate are arranged opposite to each other, the color filter corresponds
to the slit electrode on the array substrate, and a ratio between light transmittance T1 of any one position on the color filter and light transmittance T2 of any other position on the color filter is equal to a ratio between LC efficiency X2 at a position, corresponding to the any other position, on the slit electrode and LC efficiency X1 at a position, corresponding to the any one position, on the slit electrode.

US Pat. No. 9,195,100

ARRAY SUBSTRATE, LIQUID CRYSTAL PANEL AND DISPLAY DEVICE WITH PIXEL ELECTRODE AND COMMON ELECTRODE WHOSE PROJECTIONS ARE OVERLAPPED

BOE TECHNOLOGY GROUP CO.,...

1. An array substrate comprising a pixel electrode layer and a common electrode layer,
wherein the common electrode layer is provided with a plurality of common electrodes, and the pixel electrode layer is provided
with a plurality of pixel electrodes, and

wherein projection of each common electrode, projected in a direction vertical to the pixel electrode layer, overlaps or partially
overlaps with a corresponding pixel electrode; and

wherein the pixel electrode layer comprises a first pixel electrode and a second pixel electrode adjacent to each other, and
the common electrode layer comprises a first common electrode located over a data line, and

wherein projection lines of two opposite edges of the first common electrode, projected in a direction vertical to the pixel
electrode layer, are respectively located on the first pixel electrode and on the second pixel electrode; and

the data line and the pixel electrode layer are disposed in the same layer; the first pixel electrode and the second pixel
electrode of the pixel electrode layer are located respectively at two sides of the data line.

US Pat. No. 9,095,031

ORGANIC LIGHT EMITTING DIODE DRIVING CIRCUIT, DISPLAY PANEL, DISPLAY AND DRIVING METHOD

BOE TECHNOLOGY GROUP CO.,...

1. An organic light emitting diode driving circuit comprising an organic light emitting diode, a driving unit controlling
a current of the organic light emitting diode and a threshold compensation unit comprising:
a first electronic switch with a first connection terminal thereof being connected to a cathode of the organic light emitting
diode, a second connection terminal thereof being connected to the driving unit and a switch control terminal thereof being
connected to a second control voltage;

a second electronic switch with a first connection terminal thereof being connected to a high level, a second connection terminal
thereof being connected to a first connection terminal of a third electronic switch, and a switch control terminal thereof
being connected to a first control voltage;

the third electronic switch with a first connection terminal thereof being connected to the second connection terminal of
the second electronic switch, a second connection terminal thereof being connected to a capacitance, and a switch control
terminal thereof being connected to a scan voltage;

a fourth electronic switch, with a first connection terminal thereof being connected to the driving unit, a second connection
terminal thereof being connected to a data voltage, and a switch control terminal thereof being connected to the scan voltage;

a fifth electronic switch with a first connection terminal thereof being connected to ground, a second connection terminal
thereof being connected to the driving unit, and a switch control terminal thereof being connected to the second control voltage;
and

the capacitance with one terminal thereof being connected to ground, and the other terminal thereof being connected to the
second connection terminal of the third electronic switch,

wherein an anode of the organic light emitting diode is connected to the high level, and
the second connection terminal of the second electronic switch is connected to the second connection terminal of the first
electronic switch.

US Pat. No. 9,423,550

BACKLIGHT MODULE HAVING A LIGHT SCATTERING UNIT FOR SCATTERING LIGHT ENTERING THE LIGHT GUIDE PLATE AND DISPLAY DEVICE HAVING THE SAME

BOE TECHNOLOGY GROUP CO.,...

1. A backlight module, comprising a light guide plate and a plurality of light sources, the light guide plate comprising a
light incident surface, the plurality of light sources being arranged opposite to the light incident surface of the light
guide plate, wherein
the backlight module further comprises a light scattering unit arranged between the plurality of light sources and the light
incident surface of the light guide plate, and the light scattering unit is used for scattering and irradiating light rays
from the plurality of light sources to the light guide plate;

wherein the backlight module further comprises a light guide unit used for guiding light rays from the light sources into
the light scattering unit;

wherein the light guide unit comprises a plurality of transparent light guide bars, one end of each of the light guide bars
is arranged at light emitting surfaces of the light sources and the other end thereof is connected to the light scattering
unit; and

wherein the front faces of the light sources are in contact with the light scattering unit, and the light guide bars connect
the sides of the light sources to the light scattering unit.

US Pat. No. 9,423,902

AMOLED PIXEL CIRCUIT, A DRIVING METHOD THEREOF AND A DISPLAY DEVICE

Chengdu BOE Optoelectroni...

1. An AMOLED pixel circuit, comprising:
a light emitting module,
a touching module,
a controlling module, and
a driving and amplifying module;
the light emitting module is connected with the controlling module and a first voltage terminal and is used for performing
light emitting display under the control of the controlling module;

the touching module is connected with the controlling module and a first signal line and is used for receiving an input touch
signal;

the controlling module is connected with the first signal line, a second signal line, a third signal line and a data line,
and is used for controlling the light emitting module and the touching module under input signals of the signal lines, wherein
the controlling module includes

a first transistor which has a gate connected to the first signal line and a first electrode connected to the light emitting
device;

a second transistor has a gate connected to the second signal line, a first electrode connected to a second electrode of the
first transistor, and a second electrode connected to the data line;

a third transistor which has a gate connected to the third signal line, a first electrode connected to the driving and amplifying
module, and a second electrode connected to the data line; and

a fourth transistor which has a gate connected to the first signal line, a first electrode connected to the second electrode
of the first transistor, and a second electrode connected to the driving and amplifying module; and

the driving and amplifying module is connected with the light emitting module, the touching module, the controlling module
and a second voltage terminal, and is used for driving the light emitting module and amplifying the touch signals received
by the touching module.

US Pat. No. 9,275,589

GATE DRIVE CIRCUIT, ARRAY SUBSTRATE AND DISPLAY APPARATUS

BOE Technology Group Co.,...

1. A gate drive circuit, comprising:
a plurality of shift register units each having a signal output end, wherein the signal output end of one of the plurality
of shift register units except the last one is connected to the signal input end of the next one;

L arithmetic units each having a plurality of input ends, wherein L is an integer equal to or larger than 2, and one of the
plurality of input ends of each of the L arithmetic units is connected to the signal output end of a respective shift register
unit; and

a clock generation unit having a plurality of clock output ends for outputting different clock signals, wherein at least one
of the plurality of clock output ends is connected to at least one of the other input ends of a respective arithmetic unit
except the one input end connected to the signal output end of the shift register unit, so that the L arithmetic units output
L different drive signals,

wherein the clock generation unit comprising:
a sub clock generation unit configured to generate m different first clock signals and output the m first clock signals through
m first clock output ends of the plurality of clock output ends, wherein m is an integer equal to or larger than 1 and less
than L; and

a sub shift register unit connected to the sub clock generation unit and configured to shift the m first clock signals generated
by the sub clock generation unit so as to generate (L?m) different second clock signals and output the (L?m) different second
clock signals through (L?m) second clock output ends of the plurality of clock output ends,

wherein at least one of the first clock output ends and the second clock output ends is connected to the at least one of the
other input ends of each of the L arithmetic unit, so that L clock output ends of the clock generation unit consist of first
clock output ends of the sub clock generation unit and second clock output ends of the sub shift register unit.

US Pat. No. 9,324,764

ARRAY SUBSTRATE AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. An array substrate, comprising:
a terminal region; and
an active pixel region, the active pixel region comprising:
a plurality of pixel units;
a plurality of gate lines;
a plurality of data lines; and
a plurality of gate leading wires,
wherein two columns of the plurality of pixel units are provided between two adjacent data lines among the plurality of data
lines, each of the plurality of gate leading wires is disposed between the two columns of the plurality of pixel units, and
each of the plurality of gate lines is connected to respective one of the plurality of gate leading wires,

wherein two of the plurality of gate leading wires are provided between the two columns of the plurality of pixel units,
wherein the array substrate further comprises a dummy line, the dummy line is disposed between the two columns of the pixel
units and is a leading wire not being connected to every gate line of the plurality of gate lines, the number of the dummy
line disposed between the two columns of the pixel units is two,

the dummy line is floated.

US Pat. No. 9,285,938

ORGANIC LIGHT-EMITTING DIODE PIXEL CIRCUIT, DRIVING METHOD THEREOF, AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. An organic light emitting dioxide (OLED) pixel circuit, comprising a data writing unit, a driving unit, an OLED, a first
control unit, a second control unit and a touch detecting unit, wherein,
the first control unit, in a touch detecting stage and an OLED light-emitting stage, is used for importing a power supply
voltage signal into the data writing unit under the control of a scanning line, and, in the OLED light-emitting stage, is
used for turning on the OLED and the driving unit;

the data writing unit, in the touch detecting stage and the OLED light-emitting stage, is used for importing the power supply
voltage signal under the control of a first light-emitting control line, and importing a data line signal under the control
of the scanning line and a second light-emitting control line, and meanwhile is used for supplying voltage to the driving
unit;

the touch detecting unit, in the touch detecting stage, is used for sensing touch under the control of a touch signal level
control line, and generating a detecting signal;

the driving unit, in the touch detecting stage, is used for converting the detecting signal into a touch output signal, which
is output to a driving integrated circuit (IC) via the touch detecting unit, under the control of the touch signal level control
line, and in the OLED light-emitting stage, is used for providing driving current for the OLED; and

the second control unit, in the OLED light-emitting stage, is used for connecting the driving unit to a ground level under
the control of a third light-emitting control line.

US Pat. No. 9,355,838

OXIDE TFT AND MANUFACTURING METHOD THEREOF

BOE TECHNOLOGY GROUP CO.,...

1. A method of manufacturing an oxide thin film transistor, comprising: forming a conductive film on a substrate and forming
a gate electrode by a patterning process; forming an insulation film on the substrate to cover the gate electrode and function
as a gate insulation layer; forming an oxide film on the gate insulation layer and forming an active layer comprising a source
region, a drain region and a channel by a patterning process,
wherein the method further comprises:
sequentially forming a lower metal film and an upper metal film on the active layer, forming a source electrode and a drain
electrode by performing a patterning process on the upper metal film which is away from the active layer, and remaining the
lower metal film which is adjacent to the active layer, and

wherein the lower metal film functions as an etching barrier layer, the etching barrier layer covering the active layer and
the gate insulation layer;

wherein the etching barrier layer comprises a channel protective layer, the channel protective layer is located on the channel
and corresponds to a position of the channel, and the channel protective layer is formed by performing an oxidation treatment
on the lower metal film;

wherein the etching barrier layer is provided below the source and drain electrodes and covers both upper surface and side
surface of the active layer and further covers a portion of the gate insulation layer on which the active layer is not formed,
and

wherein the oxidation treatment is an oxygen plasma oxidation treatment, and an oxygen plasma employed in the oxygen plasma
oxidation treatment is a mixed gas of O2 and BCl2.

US Pat. No. 9,298,330

CAPACITIVE TOUCH PANEL HAVING COMPLEMENTARILY MATCHING ADJACENT ELECTRODE UNITS AND DISPLAY DEVICE INCLUDING THE CAPACITIVE TOUCH PANEL

BOE TECHNOLOGY GROUP CO.,...

1. A capacitive touch panel, comprising at least one column of electrode set, the electrode set comprising a plurality of
electrode units which are sequentially arranged, and adjacent electrode units complementarily matching each other, wherein
each electrode unit comprises a first touch electrode, a second touch electrode and a third touch electrode, the first touch
electrode, the second touch electrode and the third touch electrode complementarily match each other, and the first touch
electrode is used for keeping patterns of the second touch electrode and the third touch electrode included in the same electrode
unit from contacting with each other, the second touch electrode is used for keeping a pattern of the electrode unit from
contacting with a pattern of an immediately previous electrode unit, the third touch electrode is used for keeping the pattern
of the electrode unit from contacting with a pattern of an immediately next electrode unit, and the first touch electrode,
the second touch electrode, and the third touch electrode have the same length in a direction perpendicular to a column direction.

US Pat. No. 9,470,949

ELECTROPHORETIC DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME

CHENGDU BOE OPTOELECTRONI...

1. An electrophoretic display (EPD) device, comprising an electrophoretic substrate and a drive substrate arranged opposite
to each other and a plurality of microcups disposed between the electrophoretic substrate and the drive substrate,
wherein each microcup includes a cup body for defining an accommodating space; a thickness of the cup body on one side of
the microcup closer to the electrophoretic substrate is less than a thickness of the cup body on one side of the microcup
closer to the drive substrate; and a cup surface of the microcup is a cambered surface which is away from a vertical central
axis of the microcup and concave towards the cup body, wherein

the cup body is formed by a plurality of partition walls arranged in an array; upper surfaces and lower surfaces of the partition
walls are parallel to each other; and both the two side-walls of the partition wall are cambered surfaces, and

a height of the partition walls is ranged from 1 to 10 micrometers; and a radius of the cambered surface of the two side-walls
of the partition walls is ranged from 4 to 10 micrometers.

US Pat. No. 9,269,289

SHIFT REGISTER UNIT, GATE DRIVING CIRCUIT AND DISPLAY APPARATUS

BOE Technology Group Co.,...

1. A shift register unit including an input terminal, an output terminal, a first clock signal input terminal, a second clock
signal input terminal, a low potential connecting terminal and a reset terminal, the shift register unit further consisting
of:
a first Thin Film Transistor TFT having a first electrode connected to the input terminal and a gate connected to the second
clock signal input terminal;

a second TFT having a first electrode connected to the second electrode of the first TFT, a gate connected to the reset terminal,
and a second electrode connected to the low potential connecting terminal;

a third TFT having a second electrode connected to the output terminal, a first electrode connected to the first clock signal
input terminal, and a gate connected to a second electrode of the first TFT;

a fourth TFT having a first electrode connected to the output terminal, a gate connected to the reset terminal, and a second
electrode connected to the low potential connecting terminal;

a fifth TFT having a gate directly connected to the second clock signal input terminal, a first electrode directly connected
to the output terminal, and a second electrode connected to the low potential connecting terminal; and

a capacitor connected between the gate and the second electrode of the third TFT;
wherein a first clock signal input from the first clock signal input terminal and a second clock signal input from the second
clock signal input terminal have a same period and are inverted to each other.

US Pat. No. 9,240,141

PIXEL UNIT DRIVING CIRCUIT, PIXEL UNIT DRIVING METHOD AND PIXEL UNIT

BOE TECHNOLOGY GROUP CO.,...

1. A pixel unit driving circuit for driving OLED, including: a driving thin Film Transistor TFT, a matching TFT, a first switching
element, a storage capacitor and a driving control unit; wherein the driving control unit includes a second switching element
and a third switching element, the first switching element, the second switching element and the third switching element are
different from each other,
the driving TFT has a gate connected to a first terminal of the storage capacitor, a source connected to the OLED and connected
to a second terminal of the storage capacitor through the first switching element, and a drain connected to a driving power
source;

the matching TFT has a gate and a drain connected to the gate of the driving TFT, and a source connected to the source of
the driving TFT through the second switching unit; and

the second terminal of the storage capacitor is also connected to a data line through the third switching unit.

US Pat. No. 9,383,488

COLOR FILTER SUBSTRATE, MANUFACTURING METHOD THEREFOR AND 3D DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A color filter substrate comprising
a substrate,
a color filter unit, and
a lenticular lens structure which is disposed between the substrate and the color filter unit, wherein the lenticular lens
structure is a single-layer lenticular lens array, which is composed of a plurality of lenticular lenses arranged in a planar
direction where the color filer unit is located; and

each lenticular lens consists of two kinds of lenses having different refractive indexes,
wherein the two kinds of lenses having different refractive indexes include a first lens and a second lens in order from the
substrate to the color filter unit; the refractive index of the first lens is smaller than that of the second lens and larger
than or equal to that of the substrate,

wherein the first lens is a plane-concave lens, and the second lens is a plane-convex lens, said plane-convex lens is correspondingly
embedded in the plane-concave lens;

wherein a thickness H of the plane-convex lens is obtained by:

where n1 is the refractive index of the plane-convex lens, n2 is the refractive index of the plane-concave lens, and p is the size of the color filter resin, and

wherein a thickness h of the plane-concave lens is obtained by:

where Wp is the interpupillary distance of human eyes, D is the distance between human eyes and the display device, ? is the
incident angle of the light emitted from the side of the plane-concave lens to the interface between the plane-concave lens
and the substrate, and the emergent angle of the light is refraction angle ?.

US Pat. No. 10,021,759

PIXEL UNIT DRIVING CIRCUIT AND DRIVING METHOD, AND DISPLAY APPARATUS

BOE TECHNOLOGY GROUP CO.,...

1. A pixel unit driving circuit, including:a light-emitting device, a driving transistor, a first switching transistor, a second switching transistor, a third switching transistor, a fourth switching transistor, a first capacitor, and a second capacitor, wherein,
the driving transistor includes a source, a drain and a gate, all of the first switching transistor, the second switching transistor, the third switching transistor include a gate, a first terminal and a second terminal, and the fourth switching transistor includes a source, a drain and a gate;
the drain of the driving transistor is connected to a power supply;
the gate of the first switching transistor is connected to a control line, the first terminal of the first switching transistor is connected to the power supply, and the second terminal of the first switching transistor is connected to the gate of the driving transistor;
the gate of the second switching transistor is connected to the control line, the first terminal of the second switching transistor is connected to the source of the driving transistor, and the second terminal of the second switching transistor is connected to the gate of the driving transistor via the first capacitor;
the gate of the third switching transistor is connected to the control line, the first terminal of the third switching transistor is connected to one terminal of the light-emitting device, and the second terminal of the third switching transistor is connected to the source of the driving transistor;
the gate of the fourth switching transistor is connected to a scan line, the drain of the fourth switching transistor is connected to a data line, and the source of the fourth switching transistor is directly connected to the second terminal of the second switching transistor;
a first terminal of the first capacitor is connected to the gate of the driving transistor, and a second terminal of the first capacitor is connected to the source of the fourth switching transistor; and
a first terminal of the second capacitor is connected to the source of the fourth switching transistor, and a second terminal of the second capacitor is connected to the other terminal of the light-emitting device and to ground;
wherein, the first switching transistor and the second switching transistor are turned on or turned off together, and a timing sequence of the third switching transistor being turned on or turned off is completely opposite those of the first and second switching transistors, and the light-emitting device starts to emit light when a voltage at the second terminal of the first capacitor is equal to a data voltage applied to the data line.

US Pat. No. 9,261,750

ARRAY SUBSTRATE, METHOD FOR FABRICATING THE SAME AND LIQUID CRYSTAL PANEL

BOE TECHNOLOGY GROUP CO.,...

1. An array substrate, comprising:
a display region; and
a frame region surrounding the display region;
the display region comprising a plurality of data lines, a plurality of scan lines and a plurality of scan connection lines,
the plurality of data lines and the plurality of scan lines intersecting each other to divide the display region into a plurality
of pixel regions,

wherein the plurality of scan lines are electrically connected to the plurality of scan connection lines in a one-to-one correspondence
in the display region;

the array substrate has a top-gate configuration, the display region further comprises a bridge connection line, the scan
lines are electrically connected to the scan connection lines by way of the bridge connection line; and

the bridge connection line is disposed in the same layer as the data lines, the scan connection lines are disposed in the
same layer as the scan lines, the bridge connection line is electrically connected to the scan lines by way of a first via
hole, the bridge connection line is electrically connected to the scan connection lines by way of a second via hole.

US Pat. No. 9,391,100

DISPLAY SUBSTRATE AND FABRICATING METHOD THEREOF, MASK PLATE, AND MASK PLATE GROUP

BOE TECHNOLOGY GROUP CO.,...

1. A display substrate, comprising a plurality of sub display substrate, each of the sub display substrate comprising a plurality
of pixel units, each pixel unit comprising a pixel electrode, a common electrode and a source-drain channel, wherein from
the center of the display substrate to the edge of the display substrate, the plurality of sub display substrates are arranged
from large to small according to overlapping area of the pixel electrode and the common electrode,
and/or the plurality of sub display substrates are arranged from small to large according to width to length ratio of the
source-drain channel of the sub display substrate.

US Pat. No. 9,269,299

PIXEL CIRCUIT, METHOD FOR DRIVING PIXEL CIRCUIT, AND DISPLAY PANEL

CHENGDU BOE OPTOELECTRONI...

1. A pixel circuit, comprising at least two electroluminescence elements, wherein: an electrode in a first polarity of each
of the at least two electroluminescence elements is coupled to a corresponding current control terminal; the current control
terminals coupled to the electrodes in the first polarity of the at least two electroluminescence elements are different from
each other; a direction of current supplied by one of the current control terminals is opposite to that supplied by the rest
of the current control terminals and said one of the current control terminals is alternately selected among the current control
terminals; and
an electrode in a second polarity of each of the at least two electroluminescence elements is directly coupled to a same node
which is coupled to a drive unit that supplies a drive current for the at least two electroluminescence elements.

US Pat. No. 9,230,479

PIXEL DRIVING CIRCUIT, DISPLAY DEVICE AND PIXEL DRIVING METHOD

BOE Technology Group Co.,...

1. A pixel driving circuit comprising: a light emitting device, a driving transistor, a control unit, a first charging unit,
a second charging unit, a first power supply terminal and a second power supply terminal; the control unit is connected with
a data line, a first control line, a second control line, a first gate line and a second gate line; the first charging unit
and the second charging unit are both connected with the control unit, a gate of the driving transistor is connected with
the first charging unit, a drain of the driving transistor is connected with the first power supply terminal, a source of
the driving transistor is connected with the control unit; a first electrode of the light emitting device is connected with
the control unit and the second charging unit, and a second electrode of the light emitting device is connected with the second
power supply; wherein
the control unit is used for charging the first charging unit and the second charging unit in turn based on signals on the
first control line, the second control line, the first gate line and the second gate line, such that the voltage across the
first charging unit is equal to the threshold voltage of the driving transistor and the voltage across the second charging
unit is equal to the data voltage provided by the data line;

the first charging unit and the second charging unit are used for providing a driving voltage for the driving transistor under
the control of the control unit, the driving voltage is equal to the sum of the threshold voltage of the driving transistor
and the data voltage; and

the driving transistor is used for driving the light emitting device to emit light.

US Pat. No. 9,310,537

COLOR FILTER SUBSTRATE AND DISPLAY DEVICE

BOE Technology Group Co.,...

1. A color filter substrate, comprising:
a substrate;
a color filter layer provided on the substrate; and
a photochromic material, the photochromic material and the color filter layer cooperating to display different colors by adjusting
the light irradiated onto the color film substrate,

wherein the color filter layer comprises a red filter layer unit, a blue filter layer unit and a green filter layer unit;
wherein black matrixes are formed on the substrate, and grooves are formed between the adjacent black matrixes, at least four
grooves corresponding to one pixel unit; and

wherein three grooves of the at least four grooves corresponding to each pixel unit are filled respectively with a red colloid,
a blue colloid and a green colloid to form the red filter layer unit, the blue filter layer unit and the green filter layer
unit, and a remainder of the at least four grooves are filled with a transparent colloid containing the photochromic material
or a photochromic transparent colloid.

US Pat. No. 9,377,631

3D GRATING BOX AND THE MANUFACTURING METHOD THEREOF, COLOR FILTER SUBSTRATE AND DISPLAY DEVICE

BOE Technology Group Co.,...

1. A 3D grating box, comprising:
a photoelectric conversion device configured to convert optical energy into electric energy;
a transparent electrode electronically connected to a first side of the photoelectric conversion device;
a grating electrode electronically connected to a second side of the photoelectric conversion device opposite to the first
side, the grating electrode comprises a plurality of opaque strip conductors that are arranged side by side at intervals to
shield line of sight, so that the left eye and the right eye of a user see the pictures with parallax, respectively;

a storage battery comprising a first end electronically connected to the transparent electrode and a second end electronically
connected to the grating electrode, the electric energy generated by the photoelectric conversion device being transferred
to the storage battery through the transparent electrode and the granting electrode to be stored into the storage battery;
and

a substrate, the grating electrode is arranged on one side of the substrate.

US Pat. No. 9,337,312

METHOD FOR SYSTEM FOR MANUFACTURING TFT, TFT, AND ARRAY SUBSTRATE

BOE TECHNOLOGY GROUP CO.,...

1. A method for manufacturing a TFT, comprising a step of forming a pattern of source/drain electrode, a pattern of doped
semiconductor layer, and a pattern of semiconductor layer, wherein
the step of forming the pattern of source/drain electrode, the pattern of doped semiconductor layer, and the pattern of semiconductor
layer comprises:

forming a semiconductor film, a doped semiconductor film, a source/drain electrode film, and a first patterned photoresist
layer sequentially, the first patterned photoresist layer covering a region of the pattern of source/drain electrode and a
channel region;

performing first etching so as to remove the source/drain electrode film on a region that is not covered by the first patterned
photoresist layer;

performing second etching so as to remove the doped semiconductor film and the semiconductor film on a region that is not
covered by the first patterned photoresist layer, thereby forming the pattern of semiconductor layer;

performing ashing treatment on the photoresist layer so as to remove the photoresist layer on the channel region;
hard-baking the photoresist layer after the ashing treatment;
performing third etching so as to remove the source/drain electrode film on a region that is not covered by the photoresist
layer after the ashing treatment, thereby forming the pattern of source/drain electrode; and

performing fourth etching so as to remove the doped semiconductor film on the region that is not covered by the photoresist
layer after the ashing treatment, thereby forming the pattern of doped semiconductor layer.

US Pat. No. 9,318,540

LIGHT EMITTING DIODE PIXEL UNIT CIRCUIT AND DISPLAY PANEL

BOE TECHNOLOGY GROUP CO.,...

1. A LED pixel unit circuit comprising a driving module and a LED, the driving module comprising a driving TFT, a first switching
element, a second switching element, a first capacitor and a driving control unit, wherein
a gate of the driving TFT is connected to a first node, a source of the driving TFT is connected to a positive voltage output
terminal of a power source, and a drain of the driving TFT is connected to an anode of the LED;

a cathode of the LED is connected to a negative voltage output terminal of the power source;
the first capacitor is located between the first node and a second node as a first connection terminal of the driving control
unit;

the first switching element is connected between a third node as a second connection terminal of the driving control unit
and a data line in series;

the second switching element is connected between the positive voltage output terminal of the power source and the first node;
and

the driving control unit comprises a matching TFT whose threshold voltage is matched with the threshold voltage of the driving
TFT, is located between the first switching element and the first capacitor, and is configured to control charging and discharging
of the first capacitor so as to write the threshold voltage of the matching TFT and a new data voltage into the first capacitor
while eliminating the original data voltage in the first capacitor, and thereby compensate for the threshold voltage of the
driving TFT.

US Pat. No. 9,310,640

DISPLAY DEVICE

CHENGDU BOE OPTOELECTRONI...

1. A display device, comprising:
a display panel, comprising a display region and a peripheral region around the display region; and
an optical module, disposed on a light-exiting side of the display panel, the optical module configured to shift light emitted
from the display panel towards edges of the display panel so as to make a part of the light shift into the peripheral region
and emit from the peripheral region,

the optical module comprises a refracting layer, wherein a set angle is provided between a light incident surface of each
of the refracting layers and a light-exiting surface of the display panel and each of the refracting layers is used to shift
the light towards the edges of the display panel by a set distance,

the set distance h satisfies the formula:

 wherein d is a thickness of each of the refracting layers, n is a refractive index of each of the refracting layers, A is
an incident angle of light entering into each of the refracting layers, B is a refraction angle of the light in each of the
refracting layers, and the incident angle is equal to the set angle.

US Pat. No. 9,316,842

SLIT GRATING AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A passive slit grating, comprising a plurality of grating structures,
wherein, each of the grating structures is symmetric about its axial line in a length direction, an edge in the length direction
for each of the grating structures has a non-linear shape, and among adjacent edges of any two of the grating structures that
are adjacent, a position of a protrusion at one edge corresponds to a position of a recess at another edge, and wherein edges
in the length direction for two adjacent grating structures are different, edges in the length direction for grating structures
in odd-numbered columns have the same shape, and edges in the length direction for grating structures in even-numbered columns
have the same shape.

US Pat. No. 9,305,479

DETECTION CIRCUIT FOR DARK POINT ON PANEL

BOE TECHNOLOGY GROUP CO.,...

1. A detection circuit for detecting an Advanced Super Dimension Switch (ADS) display panel, comprising a preset voltage generation
module and a N channel analog switch comprising N inputting terminals and an outputting terminal,
wherein the preset voltage generation module comprises N operational amplifiers which are connected to the N inputting terminals
of the N channel analog switch respectively, and are used for generating N preset analog voltages and transferring the N preset
analog voltages generated to the N inputting terminals of the N channel analog switch respectively, N?2,

the N channel analog switch selects and outputs one of the N preset analog voltages according to an original gate line voltage.

US Pat. No. 9,240,353

METHOD FOR MANUFACTURING ARRAY SUBSTRATE BY FORMING COMMON ELECTRODE CONNECTING NMOS IN DISPLAY AREA AND PMOS IN DRIVE AREA

BOE TECHNOLOGY GROUP CO.,...

1. A method for manufacturing an array substrate, comprising:
forming a shielding layer, an insulating buffer layer, a first active layer and a second active layer, a gate insulating layer
and an NMOS gate electrode in a display area on a substrate in sequence, and implanting phosphorous ions into the first active
layer;

forming a PMOS gate electrode in the drive area on the gate insulating layer, in which the NMOS gate electrodes and the PMOS
gate electrode are provided on tile same layer; meanwhile forming a first through hole in a common electrode connecting area,
in which the first through hole is configured to connect the shielding layer and a source/drain electrode layer; and implanting
boron ions into the second active layer;

forming an intermediate insulating layer on the substrate, and forming a second through hole in the common electrode connecting
area and third through holes in the display area and the drive area, in which the second through hole is formed at a same
position as the first through hole and configured to connect the shielding layer and a source/drain electrode layer, and the
third through holes are configured to connect the active layers and the source/drain electrode layer; and

forming the source/drain electrode layer on the substrate, in which the source/drain electrode layer is connected with the
shielding layer and the active layers through the second through hole and the third through holes.

US Pat. No. 9,947,267

LIGHT EMITTING DIODE PIXEL UNIT CIRCUIT AND DISPLAY PANEL FOR LIGHT EMITTING DIODE DISPLAY

BOE Technology Group Co.,...

1. An LED pixel unit circuit comprising a driving module and an LED, the driving module comprising a driving TFT, a first switching element, a first capacitor, a second capacitor and a driving control unit, whereinthe LED is located between the drain of the driving TFT and a negative voltage output terminal of a power source, the anode of the LED is connected to the drain of the driving TFT and the cathode of the LED is connected to the negative voltage output terminal of the power source;
the gate of the driving TFT is connected to a first node, and the source of the driving TFT is connected to a positive voltage output terminal of the power source;
the first capacitor is located between the first node and the first switching element;
a first terminal of the second capacitor is connected to the positive voltage output terminal of the power source, and a second terminal of the second capacitor is connected to the first node;
the first switching element is connected between the first capacitor and a data line, in series; and
the driving control unit comprises a matching TFT whose threshold voltage is matched with the threshold voltage of the driving TFT, and a first terminal of the driving control unit together with the first terminal of the second capacitor are connected to the positive voltage output terminal of the power source and to the source of the driving TFT, a second terminal of the driving control unit together with the second terminal of the second capacitor are connected to the first node and to the gate of the driving TFT, such that the driving control unit is connected with the second capacitor in parallel between the positive voltage output terminal of the power source and the first node, and is configured to control charging and discharging of the second capacitor so as to hold the threshold voltage of the matching TFT and thereby compensate for the threshold voltage of the driving TFT.

US Pat. No. 9,372,578

DETECTION METHOD AND DEVICE FOR TOUCH POINT, TOUCH DRIVING CIRCUIT, AND TOUCH SCREEN

BOE TECHNOLOGY GROUP CO.,...

1. A touch point detection method comprising:
determining a to-be-determined touch point among touch detection points of a touch panel;
determining whether the to-be-determined touch point is influenced by noise of a display driving circuit according to a touch
signal, a first noise value and a second noise value of touch detection points in a line where the to-be-determined touch
point is located; wherein the first noise value is a noise value of the touch driving circuit when the display driving circuit
is not turned on, and the second noise value is a noise value of the touch driving circuit when the display driving circuit
is turned on;

upon determining that the to-be-determined touch point is influenced by the noise of the display driving circuit, determining
whether the to-be-determined touch point is a touch point according to the second noise value and a first threshold value;
the first threshold value being greater than the first noise value and smaller than the second noise value.

US Pat. No. 9,305,512

ARRAY SUBSTRATE, DISPLAY DEVICE AND METHOD FOR CONTROLLING REFRESH RATE

BOE Technology Group Co.,...

1. An array substrate, including a plurality of pixel structures, each pixel structure including: a gate line, a data line,
a common electrode line, a first switching element at intersection of the gate line and the data line, and a pixel electrode,
wherein, gate of the first switching element is connected to the gate line, source of the first switching element is connected
to the date line, drain of the first switching element is connected to the pixel electrode, and a first storage capacitance
is formed between the pixel electrode and the common electrode line and/or between the pixel electrode and the gate line,

the pixel structure further includes:
a second switching element; and
a first transparent electrode,
wherein, gate of the second switching element is connected to a second switching controlling line for controlling conduction
or disconnection of the second switching element, source of the second switching element is connected to a common electrode
signal terminal, drain of the second switching element is connected to the first transparent electrode, and when the second
switching element is conducted, a second storage capacitance is formed between the pixel electrode and the first transparent
electrode,

wherein, the pixel structure further includes:
a third switching element; and
a second transparent electrode,
wherein, gate of the third switching element is connected to a third switching controlling line for controlling conduction
or disconnection of the third switching element, source of the third switching element is connected to the common electrode
signal terminal, drain of the third switching element is connected to the second transparent electrode, and when the third
switching element is conducted, a third storage capacitance is formed between the pixel electrode and the second transparent
electrode.

US Pat. No. 9,443,462

GATE DRIVING CIRCUIT, GATE LINE DRIVING METHOD AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A gate driving circuit comprising multiple shift register units connected in series, wherein the gate driving circuit further
comprising a shift delay module and a repeat output module, the shift delay module being connected in series between j-th
stage of shift register unit and (j+1)-th stage of shift register unit which are adjacent, where j is a positive integer greater
than 1;
the shift delay module is connected to an output terminal of the j-th stage of shift register unit and an input terminal of
the (j+1)-th stage of shift register unit and is further connected to the repeat output module;

the repeat output module is connected to an output terminal of the (j?n+1)-th stage of shift register unit;
the shift delay module is configured to control, after a preset touch time terminates, the repeat output module to output
a repeat scanning signal to the output terminal of the (j?n+1)-th stage of shift register unit after the j-th stage of shift
register unit outputs a gate scanning signal, so that the scanning signals are output again to gate lines by the (j?n+1)-th
stage of shift register unit to the j-th stage of shift register unit, where n is a positive integer greater than or equal
to 1.

US Pat. No. 9,317,153

ACTIVE MATRIX ORGANIC LIGHT-EMITTING DIODE PIXEL CIRCUIT, METHOD FOR DRIVING THE SAME, AND DISPLAY DEVICE

Chengdu BOE Optoelectroni...

1. An AMOLED pixel circuit, characterized by comprising a light-emitting module, a touch control module, a control module,
an output module and a driving and amplifying module; wherein
the light-emitting module is connected to the control module and a first voltage terminal, and is used for emitting light
for display under a control of the control module;

the touch control module is connected to the control module, a fourth signal line and a second voltage terminal, and is used
for receiving a touch input of a user and generating a first touch control signal;

the control module is further connected to a first signal line, a second signal line, a third signal line, and a data line,
and is used for controlling the light-emitting module and the touch control module according to signals input from the signal
lines, wherein the signal input from the first signal line is generated by delaying the signal input from the fourth signal
line for a predetermined time, the data line is used for inputting a grayscale data for display by the light-emitting module
or for outputting a second touch control signal indicating the touch input in a time division mode;

the driving and amplifying module is connected to the touch control module, the control module and the second voltage terminal,
and is used for driving the light-emitting module or amplifying the first touch control signal from the touch control module
to generate the second touch control signal; and

the output module is connected to a fifth signal line, the control module and the data line, and is used for outputting the
second touch control signal to the data line, wherein the signal input from the second signal line is generated by delaying
the signal input from the fifth signal line for a predetermined time.

US Pat. No. 9,311,854

PIXEL UNIT DRIVING CIRCUIT, PIXEL UNIT AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A pixel unit driving circuit comprises:
a switching unit having a first terminal connected to a high-voltage signal terminal, a second terminal connected to a light-emitting
device, a third terminal connected to a first control line, and a fourth terminal connected to a second control line;

a driving transistor having a drain connected to the switching unit, and a source connected to a low-voltage signal terminal;
and

a capacitance storage unit having a first terminal connected to the gate of the driving transistor, a second terminal connected
to the source of the driving transistor, and a third terminal connected to the second control line,

wherein said capacitance storage unit includes: a first capacitor, a second capacitor, and a fifth transistor, wherein
said first capacitor having one terminal connected to the gate of said driving transistor, and another terminal connected
to the source of the driving transistor;

said second capacitor having one terminal connected to the gate of said driving transistor, and another terminal connected
to the drain of said fifth transistor;

said fifth transistor having a gate connected to said second control line, and a source connected to the source of said driving
transistor.

US Pat. No. 9,536,466

SHIFT REGISTER UNIT, GATE DRIVING CIRCUIT AND DISPLAY PANEL

BOE TECHNOLOGY GROUP CO.,...

1. A shift register unit comprising:
an access control module for controlling access of an input signal and a reset signal, the access control module comprising
a depletion field effect transistor;

a shift register module for outputting the accessed input signal or reset signal under the driving of a clock signal;
the shift register unit further comprising: a connection control module arranged between the access control module and the
shift register module for blocking the connection between the access control module and the shift register module when the
shift register module performs outputting,

wherein the connection control module comprises a sixth switch element, a seventh switch element, an eighth switch element
and a third capacitor;

a second end of the sixth switch element is connected with a first end of the eighth switch element and a first end of the
third capacitor;

a second end of the seventh switch element is connected with a second end of the third capacitor;
a first end of the sixth switch element is connected with the shift register module, a second end of the eighth switch element
is connected with the access control module;

the clock signal comprises a first clock signal and a second clock signal, the first clock signal is connected to a control
end of the seventh switch element, the second clock signal is connected to control ends of the sixth switch element and the
eighth switch element;

a first end of the seventh switch element is connected with the low level working voltage line.

US Pat. No. 9,318,509

ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME, DISPLAY PANEL

BOE Technology Group Co.,...

1. An array substrate comprising:
a first substrate on which a thin film transistor and a data line are formed; and
a shield metal layer comprising a first shield metal zone positioned at a location corresponding to a channel of the thin
film transistor and a second shield metal zone positioned at a location corresponding to the data line,

wherein the array substrate further comprising:
a common electrode, an insulation layer formed above the common electrode, and a pixel electrode formed above the insulation
layer.

US Pat. No. 9,471,177

DRIVE CIRCUIT AND DRIVE METHOD, SHIFT REGISTER, PIXEL UNIT AND DISPLAY DEVICE

BOE Technology Group Co.,...

1. A drive circuit for driving an OLED and a touch screen in an embedded OLED touch screen in a time-sharing manner, comprising
a driving and amplifying module, a touch screen driving module and a time-sharing drive control module, wherein
the time-sharing drive control module is coupled respectively to a touch sensor signal output terminal, the driving and amplifying
module, a first control signal output terminal, a second control signal output terminal and a first voltage terminal, and
is configured to send a time-sharing drive control signal according to a first control signal and a second control signal;

the touch screen driving module is coupled respectively to the driving and amplifying module and a touch control signal output
terminal, and is coupled to the touch screen via a touch screen drive signal output terminal; and

the driving and amplifying module is coupled respectively to the OLED, a second voltage terminal, a data line and a scan line,
and is configured to drive the OLED during an OLED drive phase according to the time-sharing drive control signal, amplify
a touch sensor output signal during a touch screen drive phase, and control the touch screen driving module to drive the touch
screen according to a touch control signal and the amplified touch sensor output signal.

US Pat. No. 9,460,655

PIXEL CIRCUIT FOR AC DRIVING, DRIVING METHOD AND DISPLAY APPARATUS

BOE TECHNOLOGY GROUP CO.,...

1. A pixel circuit for AC driving comprising:
a capacitor, a first voltage input unit, a second voltage input unit, a data signal input unit, a first light emitting unit,
a second light emitting unit and a light emitting control unit; wherein

the first light emitting unit is configured to emit light under the control of a driving control terminal, a first light emitting
control terminal, a first voltage input terminal and a second voltage input terminal;

the second light emitting unit is configured to emit light under the control of the driving control terminal, a second light
emitting control terminal, the first voltage input terminal and the second voltage input terminal; wherein the first light
emitting unit emits light during a preset first time period and the second light emitting unit emits light during a preset
second time period;

the first voltage input unit is configured to supply a first input voltage at a first voltage terminal to the first light
emitting unit and the second light emitting unit under the control of a first scan terminal;

the second voltage input unit is configured to supply a second input voltage at a second voltage terminal to the first light
emitting unit and the second light emitting unit under the control of the first scan terminal;

the data signal input unit is configured to supply a data line signal to the first voltage input terminal through a data line
under the control of a second scan terminal;

the light emitting control unit is configured to make the first light emitting unit or the second light emitting unit emit
light by aid of the driving control terminal, the first light emitting control terminal and the second light emitting control
terminal under the control of a third scan terminal;

a first electrode of the capacitor is connected to the first voltage terminal and a second electrode of the capacitor is connected
to the driving control terminal.

US Pat. No. 9,306,572

OUTPUT BUFFER, GATE ELECTRODE DRIVING CIRCUIT AND METHOD FOR CONTROLLING THE SAME

BOE TECHNOLOGY GROUP CO.,...

1. An output buffer, comprising:
a first transistor, a second transistor and an input signal control unit; wherein the input signal control unit controls an
input signal to obtain a pull-up signal and a pull-down signal, the pull-up signal and the pull-down signal are input to input
terminals of the first transistor and the second transistor, respectively,

wherein input terminals of the input signal control unit comprises an input terminal of the input signal and input terminals
of at least two control signals,

wherein the input signal control unit further comprises at least two NAND gates; at least one control signal and the input
signal are input to input terminals of the NAND gates; output terminals of the NAND gates output the pull-up signal of the
input terminal of the first transistor and the pull-down signal of the input terminal of the second transistor, respectively,
and the output terminals of the NAND gates are directly connected to the input terminal of the first transistor and the input
terminal of the second transistor,

wherein the at least two control signals are clock signals, the clock signals are designed so that time periods where the
pull-up signal and the pull-down signal jump from a high level to a low level and from a low level to a high level are not
overlapped to each other.

US Pat. No. 9,240,421

DISPLAY PANEL, METHOD FOR FABRICATING THE SAME AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A display panel, comprising an array substrate and a color filter substrate, wherein
a gate line and a gate connection line of the array substrate are disposed perpendicular to each other;
a passivation layer is formed on a side of a source electrode or a drain electrode of the array substrate which is close to
the color filter substrate, a first via hole is disposed in a region of the passivation layer which corresponds to the source
electrode or the drain electrode;

the color filter substrate comprises a first substrate; a data line parallel to the gate connection line is formed on a side
of the first substrate which is close to the array substrate; a protection layer, a black matrix and a common electrode are
sequentially formed on a side of the data line which is close to the array substrate; a second via hole is disposed in a region
of the protection layer, the black matrix and the common electrode which corresponds to the data line; a conductive spacer
is disposed in the second via hole, a first end of the conductive spacer is connected to the source electrode or the drain
electrode by way of the first via hole, a second end of the conductive spacer is connected to the data line by way of the
second via hole, and the conductive spacer is insulated from the common electrode.

US Pat. No. 9,389,719

TOUCH SCREEN, METHOD FOR MANUFACTURING THE SAME, 3D DISPLAY APPARATUS

BOE Technology Group Co.,...

1. A touch screen having a touch control electrode, the touch control electrode comprising:
a first electrode unit having a first strip body and a first teeth-like structure perpendicular to the first strip body and
extending from a side of the first strip body; and

a second electrode unit having a second strip body and a second teeth-like structure perpendicular to the second strip body
and extending from a side of the second strip body,

wherein the first teeth-like structure of the first electrode unit and the second teeth-like structure of the second electrode
unit are arranged to face each other and spaced away from each other,

wherein the first strip body and the second strip body extend in a first direction, the first teeth-like structure and the
second teeth-like structure extend in a second direction perpendicular to the first direction,

wherein the first teeth-like structure comprises a plurality of first teeth arranged in the first direction and spaced away
from each other, the second teeth-like structure comprises a plurality of second teeth arranged in the first direction and
spaced away from each other,

wherein the plurality of first teeth of the first electrode unit and the plurality of second teeth of the second electrode
unit are arranged to be staggered with each other,

wherein the first teeth and the second teeth are configured to prohibit a light from transmitting there through, and there
are spaces between the first teeth and the second teeth to allow the light to transmit there through, so that the first teeth-like
structure of the first electrode unit and the second teeth-like structure of the second electrode unit are configured as a
grating for shading light.

US Pat. No. 9,286,831

AC DRIVE CIRCUIT FOR OLED, DRIVE METHOD AND DISPLAY APPARATUS

BOE TECHNOLOGY GROUP CO.,...

1. An AC drive circuit for OLED, comprising:
a storage unit and a drive unit;
a first signal input terminal, a second signal input terminal, and a third signal input terminal;
a light emitting control unit including:
a light emitting control signal input terminal for inputting a light emitting control signal,
a first transistor having a gate electrode thereof connected to the light emitting control signal input terminal, a source
electrode thereof connected to the first signal input terminal, and a drain electrode thereof connected to the drive unit,
and

a fourth transistor having a gate electrode thereof connected to the light emitting control signal input terminal, a source
electrode thereof transistor connected to the drive unit, and a drain electrode thereof connected to an anode of the OLED;
and

a charging control unit including:
a scanning signal input terminal for inputting a scanning signal,
a data signal input terminal for inputting a data signal,
a second transistor having a gate electrode thereof connected to the scanning signal input terminal, a source electrode thereof
connected to the data signal input terminal, and a drain electrode thereof connected to the drain electrode of the first transistor,

a third transistor having a gate electrode thereof connected to the scanning signal input terminal, a source electrode thereof
connected to the storage unit, and a drain electrode thereof connected to the drive unit, and

a fifth transistor having a gate electrode thereof connected to the scanning signal input terminal, a source electrode thereof
direct connected to the drain electrode of the fourth transistor, and a drain electrode thereof directly connected to the
third signal input terminal,

wherein the charging control unit is used for controlling the AC drive circuit to charge the storage unit,
wherein the light emitting control unit is used for controlling the AC drive circuit so that the storage unit controls the
drive unit to drive an OLED to emit light, and

wherein the first signal input terminal is connected with the light emitting control unit and the storage unit, the second
signal input terminal is connected with a cathode of the OLED, and the third signal input terminal is connected with the charging
control unit.

US Pat. No. 9,240,781

SHIFT REGISTER, DISPLAY APPARATUS, GATE DRIVING CIRCUIT, AND DRIVING METHOD

BOE TECHNOLOGY GROUP CO.,...

1. A shift register comprising a plurality of stages of shift register circuits, a Nth stage shift register circuit among the plurality of stages of shift register circuits comprising:
a pre-charging circuit for pre-charging a pulling-up circuit;
the pulling-up circuit for enabling an outputting terminal to output a high level after the pre-charging is completed;
a resetting circuit for resetting the Nth stage shift register circuit after the outputting terminal outputs the high level;

a retaining circuit for retaining an output potential of the Nth stage shift register circuit after the Nth stage shift register circuit is reset;

a control terminal and an inputting terminal of the pre-charging circuit are connected with an outputting terminal of a previous
stage shift register circuit, an outputting terminal thereof is connected with an inputting terminal of the resetting circuit;

an inputting terminal of the pulling-up circuit is connected with a first control signal terminal;
a control terminal of the resetting circuit is connected with an outputting terminal of a next stage shift register circuit,
an outputting terminal thereof is grounded;

the retaining circuit is connected with the outputting terminal of the pre-charging circuit, the inputting terminal of the
resetting circuit, a control terminal of the pulling-up circuit and an outputting terminal of the pulling-up circuit, a first
control terminal is connected with the first control signal terminal, and a second control terminal is connected with a second
control signal terminal; and

the retaining circuit is equipped with one transistor whose gate is connected with the first control signal terminal, source
and drain are connected with each other.

US Pat. No. 10,059,021

SUBSTRATE CUTTING SYSTEM

BOE TECHNOLOGY GROUP CO.,...

1. A substrate cutting system, comprising:a cutting tank;
an object stage;
a cutter assembly comprising a cutter wheel;
an injection pump; and
a drain pump;
wherein the injection pump is connected to the cutting tank through a first pipeline and configured to inject water into the cutting tank; the drain pump is connected to the cutting tank through a second pipeline and configured to draw water from the cutting tank; and the injection pump and the drain pump are connected through a third pipeline, the third pipeline being provided with a centrifugal separation tank, a reservoir between the centrifugal separation tank and the injection pump, and a filter provided between the reservoir and the injection pump and configured to filter water from the reservoir, the reservoir being provided with a water adding valve, so as to supply the reservoir with a water source;
a flowable water environment is formed in the cutting tank by an action of the injection pump and the drain pump;
the object stage is a movable base and is configured to transport a substrate to be cut to the water environment in the cutting tank; and
the cutter assembly is configured to cut the substrate.

US Pat. No. 9,812,080

DRIVING MODE SWITCHING METHOD AND MODULE, AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A driving mode switching method, comprising:
acquiring a pre-processed reference image;
identifying an image characteristic of the reference image;
generating a color block set included in the reference image by dividing the reference image into color blocks in accordance
with the identification of the image characteristic of the reference image;

calculating a coupling voltage of each of the color blocks and a brightness difference corresponding to the coupling voltage
in accordance with an order of the color blocks included in the color block set;

determining a crosstalk in accordance with the brightness difference corresponding to the coupling voltage; and
switching a driving mode in accordance with the crosstalk.

US Pat. No. 9,436,100

EXPOSURE MACHINE

BOE TECHNOLOGY GROUP CO.,...

1. An exposure machine, comprising:
a loading frame, for placing an object to be exposed;
a light source device, located at one side of a plane where the loading frame is positioned, wherein the light emitting direction
of the light source device is perpendicular to a plane where the object to be exposed is positioned; and

a supporting table which is horizontally disposed, the light source device is placed on the supporting table, and the loading
frame is provided vertically on the supporting table;

wherein the loading frame is of a hollow structure, such that after the object to be exposed is placed onto the frame, a surface
of the object to be exposed is not in surface contact with the loading frame;

wherein the loading frame and the light source device are configured and arranged so that during exposing, the loading frame
does not reflect the light transmitting through the object to be exposed, thus avoiding stage spots forming on the object
to be exposed;

wherein the light source device comprises one light source and a prism located under the light source, wherein the light emitted
vertically from the light source is reflected in the horizontal direction from two sides of the prism towards an exposure
surface of the object to be exposed, and the reflected light is perpendicular to the exposure surface of the object to be
exposed; and

wherein two loading frames are provided at two sides of the light source device respectively, and the light reflected in the
horizontal direction from two sides of the prism is capable of exposing the objects to be exposed in the two loading frames
at the same time.

US Pat. No. 9,341,938

MASK PLATE, EXPOSURE SYSTEM AND EXPOSING METHOD

BOE TECHNOLOGY GROUP CO.,...

1. An exposure system, comprising a mask plate and a principal reflection structure that is provided above the mask plate,
wherein the mask plate comprises a light transmitting region and a light shielding region, the pattern of the light transmitting
region corresponds to the pattern of the region to be exposed of a first substrate, a light reflecting region for reflecting
exposure light is provided in the light shielding region, and the pattern of the light reflecting region corresponds to the
pattern of the region to be exposed of a second substrate; and
when exposure light irradiates on the mask plate, passes through the light transmitting region of the mask plate and exposes
the first substrate, the light reflecting region of the mask plate reflects the exposure light to the principal reflection
structure, and the principal reflection structure further reflects the light, which is reflected by the light reflecting region,
to the region to be exposed of the second substrate to expose the second substrate.

US Pat. No. 10,114,490

COLOR FILTER SUBSTRATE, METHOD OF MANUFACTURING THE SAME, TOUCH SCREEN AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A color filter substrate, comprising:a transparent substrate; and
a touch screen panel pattern provided on a side of the transparent substrate, a surface of the touch screen panel pattern being provided with a plurality of concave curved faces,
wherein the plurality of concave curved faces comprise first concave curved faces and second concave curved faces, and
wherein the touch screen panel pattern comprises a plurality of touch screen panel wires, and an upper surface of each of the plurality of touch screen panel wires is formed with a plurality of the first concave curved faces arranged in an array, and side surfaces of each of the plurality of touch screen panel wires are formed with the second concave curved faces.

US Pat. No. 10,032,401

PIXEL STRUCTURE, DISPLAY SUBSTRATE AND DISPLAY APPARATUS

BOE TECHNOLOGY GROUP CO.,...

1. A pixel structure comprising a plurality of repeating units, wherein:each of the repeating units comprises a first portion, a second portion, a third portion, and a fourth portion which are arranged in a shape of a matrix of two rows by two columns;
each of the first through fourth portions comprises four rows by four columns of sub-pixels, and comprises, in each of the rows, the columns, and diagonals thereof, one first sub-pixel, one second sub-pixel, one third sub-pixel, and one fourth sub-pixel which are different in color from one another; and
two sub-pixels, which have the same color, and are in the same one of the four rows in any left-right adjacent two of the first through fourth portions, are in an odd-numbered column of one of the two left-right adjacent portions and an even-numbered column of the other of the two left-right adjacent portions, respectively; and two sub-pixels, which have the same color, and are in the same one of the four columns in any up-down adjacent two of the first through fourth portions, are in an odd-numbered row of one of the two up-down adjacent portions and an even-numbered row of the other of the two up-down adjacent portions, respectively.

US Pat. No. 9,461,074

MOTHERBOARD, ARRAY SUBSTRATE AND FABRICATION METHOD THEREOF, AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. An array substrate, comprising a pixel region and a peripheral wiring region, wherein,
the peripheral wiring region comprises a transparent conductive contact electrode disposed on a base substrate, the transparent
conductive contact electrode is electrically connected with a metal electrode line disposed below the transparent conductive
contact electrode through via holes disposed in different insulating layers, and the via holes disposed in different insulating
layers do not overlap with each other in a projection direction.

US Pat. No. 9,082,342

AMOLED PANEL AND DRIVING CIRCUIT AND METHOD THEREFOR

BOE TECHNOLOGY GROUP CO.,...

1. A driving circuit of an active matrix organic light emitting diode (AMOLED) panel, comprising a driving transistor, a first
transistor, a second capacitor, an organic light emitting diode, and a voltage adjustment module,
wherein the driving transistor comprises a gate which is connected to one terminal of the second capacitor, a source which
is connected to the other terminal of the second capacitor, and a drain which is connected to the voltage adjustment module;

the first transistor comprises a gate which is connected to a row scan signal terminal, a source which is connected to the
voltage adjustment module, and a drain which is connected to a data signal terminal;

the second capacitor is connected between the gate of the driving transistor and the source of the driving transistor;
the organic light emitting diode is connected between a low level signal terminal and the source of the driving transistor,
or is connected between a high level signal terminal and the drain of the driving transistor; and

the voltage adjustment module is connected to a first control signal terminal, a second control signal terminal and a high
level signal terminal, and is further connected with the one terminal of the second capacitor, the gate of the driving transistor,
and the source of the first transistor, for adjusting a gate-source voltage of the driving transistor such that a driving
current of the driving transistor in a saturation status is independent of the threshold voltage of the driving transistor.

US Pat. No. 9,760,169

LINE-OF-SIGHT PROCESSING METHOD, LINE-OF-SIGHT PROCESSING SYSTEM AND WEARABLE DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A line-of-sight (LOS) processing method, comprising:
a setting step of setting an LOS reference point of a user, and when the user fixes the user's eyes on the LOS reference point,
acquiring initial LOS data of the user, wherein the initial LOS data comprises an initial junction between an iris and a sclera
of the user's eyeball;

a collecting step of collecting a head deflection angle and an eyeball deflection angle of the user, wherein detecting the
head deflection angle of the user includes using a microelectronic mechanical gyroscope located at the user's head, so as
to acquire the head deflection angle of the user, and collecting an image of the user's eyeball using an image collector,
so as to determine a junction between the iris and the sclera of the user's eyeball, thereby to calculate the eyeball deflection
angle of the user;

a positioning step of determining a position of the user's LOS at a display interface in accordance with the head deflection
angle and the eyeball deflection angle of the user;

an acquiring step of acquiring action information of the user's eyeball, wherein the action information of the user's eyeball
includes, where or not the user's LOS remains at an identical region for a period of time exceeding a predetermined time,
a blinking action of the user, pupil contraction, pupil dilation and a squinting action;

an identifying step of identifying an action command corresponding to the action information of the user's eyeball; and
a processing step of performing a corresponding operation on a display image at the position of the user's LOS in accordance
with the identified action command, wherein when the user's LOS remains at an identical region for a period of time exceeding
the predetermined time, an image at the region is zoomed in, and after the user's LOS is moved away, the image at the region
is recovered; during the blinking action, the image at the position of the user's LOS is cancelled; during the pupil contraction
or the squinting action, brightness of the image at the user's LOS is reduced; and during the pupil dilation, the brightness
of the image at the user's LOS is increased.

US Pat. No. 9,595,226

PIXEL CIRCUIT FOR AC DRIVING, DRIVING METHOD AND DISPLAY APPARATUS

BOE TECHNOLOGY GROUP CO.,...

1. A pixel circuit for AC driving comprising: a first capacitor, a second capacitor, a voltage input unit, a data signal input
unit, a first light emitting unit, a second light emitting unit and a light emitting control unit; wherein
the first light emitting unit is configured to emit light under the control of a driving control terminal, a first light emitting
control terminal, a first voltage input terminal and a second voltage input terminal;

the second light emitting unit is configured to emit light under the control of the driving control terminal, a second light
emitting control terminal, the first voltage input terminal and the second voltage input terminal; wherein the first light
emitting unit emits light during a preset first time period and the second light emitting unit emits light during a preset
second time period, and the first voltage input terminal is configured to supply a first input voltage at a first voltage
terminal to the first light emitting unit and the second light emitting unit;

the voltage input unit is configured to supply a second input voltage at a second voltage terminal to the first light emitting
unit and the second light emitting unit under the control of a first scan terminal;

the data signal input unit is configured to input a data line signal of a data line to the second capacitor under the control
of a second scan terminal;

the light emitting control unit is configured to control the first light emitting unit or the second light emitting unit to
emit light by aid of the driving control terminal, the first light emitting control terminal and the second light emitting
control terminal under the control of a third scan terminal;

a first electrode of the first capacitor is connected to the first voltage terminal and a second electrode of the first capacitor
is connected to the driving control terminal; and

a first electrode of the second capacitor is connected to the data signal input unit and a second electrode of the second
capacitor is connected to the driving control terminal.

US Pat. No. 9,383,853

ACTIVE MATRIX ORGANIC LIGHT EMITTING DIODE PIXEL UNIT CIRCUIT, DISPLAY PANEL AND ELECTRONIC PRODUCT

CHENGDU BOE OPTOELECTRONI...

1. An Active Matrix Organic Light Emitting Diode (AMOLED) pixel unit circuit, comprising a light emitting module, a driving
module, a threshold compensating module, a light emission controlling module, a touch sensing module and an induction signal
outputting module,
wherein the driving module is configured to amplify an induction signal generated by the touch sensing module, output the
induction signal through the induction signal outputting module, and drive the light emitting module;

the light emission controlling module is configured to control the light emitting module to emit light;
the threshold compensating module is configured to compensate a threshold voltage for the driving module;
the touch sensing module is configured to generate the induction signal and output the induction signal to the driving module;
and

the induction signal outputting module is configured to output the induction signal amplified by the driving module;
wherein the driving module comprises a first transistor, a gate electrode of which is coupled to a first node of the circuit,
and the other two electrodes of which are coupled to a second node and a third node of the circuit, respectively, wherein
the first node is a connection point between the driving module and the threshold compensating module, the second node is
a common connection point among the driving module, the light emission controlling module, and the threshold compensating
module, and the third node is a common connection point among the driving module, the light emission controlling module and
the induction signal outputting module;

wherein the light emission controlling module comprises a second transistor and a fifth transistor, wherein a gate electrode
of the second transistor is coupled to a first control signal line of the AMOLED pixel unit circuit at the same stage, and
the other two electrodes are coupled to a power line and the second node of the circuit, respectively, and wherein a gate
electrode of the fifth transistor is coupled to a second control line of the AMOLED pixel unit circuit at the same stage,
and the other two electrodes are coupled to the third node of the circuit and the light emitting module, respectively;

wherein the light emitting module comprises a first LED, one end of which is coupled to the fifth transistor and the other
end of which is coupled to a low voltage level signal line;

wherein the threshold compensating module comprises a third transistor and a first capacitor,
wherein a gate electrode of the third transistor is coupled to a third control signal line of the AMOLED pixel unit circuit
at the same stage, and the other two electrodes are coupled to the second node and the first node, respectively, and wherein
the first capacitor is coupled between the first node and the low voltage level signal line; and

wherein the touch sensing module comprises a sixth transistor and a second LED, a gate electrode of the sixth transistor is
coupled to a first control signal line of an AMOLED pixel unit circuit at the previous stage, the other two electrodes are
coupled to the second LED and the first node, respectively, one end of the second LED is coupled to the sixth transistor,
and the other end is coupled to the low voltage level signal line; or
the touch sensing module comprises the sixth transistor and an induction capacitor, the gate electrode of the sixth transistor
is coupled to the first control signal line the AMOLED pixel unit circuit at the previous stage, the other two electrodes
are coupled to the induction capacitor and the first node, respectively, one end of the induction capacitor is coupled to
the sixth transistor, and the other end detects a touch signal.

US Pat. No. 9,355,595

PIXEL UNIT DRIVING CIRCUIT HAVING AN ERASING TRANSISTOR AND MATCHING TRANSISTOR, AND METHOD THEREOF

BOE TECHNOLOGY GROUP CO.,...

1. A pixel unit driving circuit for driving an organic light emitting diode (OLED), comprising a driving thin film transistor,
a matching thin film transistor, a signal-erasing thin film transistor, a charging control unit, a driving control unit and
a storage capacitor, wherein the charging control unit comprises a first thin film transistor and a second thin film transistor:
a gate of the driving thin film transistor is connected with a first end of the storage capacitor and is connected with a
low level output terminal of a driving power supply only via the second thin film transistor, a source thereof is connected
with the low level output terminal of the driving power supply directly, and a drain thereof is connected with a cathode of
the OLED;

a gate and a drain of the matching thin film transistor are connected with a data line via the first thin film transistor,
and a source thereof is connected with a second end of the storage capacitor;

a gate and a drain of the signal-erasing thin film transistor are connected with the second end of the storage capacitor,
a source of the signal-erasing thin film transistor is connected with the gate and the drain of the matching thin film transistor,
and is connected with the data line via the first thin film transistor;

the second end of the storage capacitor is connected with a high level output terminal of the driving power supply via the
driving control unit, and an anode of the OLED is connected to the high level output terminal of the driving power supply;
and

the driving thin film transistor, the matching thin film transistor and the signal-erasing thin film transistor are n-type
TFTs;

wherein a gate of the second thin film transistor is connected with the first control line, a source thereof is connected
with the low level output terminal of the driving power supply, and a drain thereof is connected with the gate of the driving
thin film transistor; and the second thin film transistor is configured to pull down a potential of the gate of the driving
thin film transistor so as to turn off the driving thin film transistor during a non-light-emitting period of the OLED.

US Pat. No. 10,101,836

ARRAY SUBSTRATE WITH DUAL GATE STRUCTURE TOUCH PANEL AND DISPLAY APPARATUS CONTAINING THE SAME

BOE TECHNOLOGY GROUP CO.,...

1. An array substrate, comprising:a plurality of first lines along a row direction;
a plurality of second lines along a column direction intersecting with the plurality of first lines to form a plurality of pixel units comprising a plurality of pixel electrodes in rows and columns;
a plurality of touch electrodes in rows along the row direction and columns along the column direction; and
a plurality of auxiliary lines along the column direction; wherein:
two first lines are between adjacent rows of pixel electrodes and two adjacent columns of the pixel electrodes form a pixel electrode group with one second line in between;
each auxiliary line is between two adjacent pixel electrode groups, each touch electrode being connected to at least one auxiliary line for transferring touch signals;
at least one auxiliary line includes a first portion and one or more second portions disconnected from the first portion at a position between two adjacent touch electrodes;
the first portion electrically connects a touch electrode to a touch-sensing signal terminal, and each second portion is electrically connected to a different touch electrode that is disconnected from the first portion of a same auxiliary line along the column direction; and
each second portion is continuously spreading across the touch electrode that is electrically connected to the second portion.

US Pat. No. 9,166,059

THIN FILM TRANSISTOR, ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, AND DISPLAY PANEL

BOE TECHNOLOGY GROUP CO.,...

1. A thin film transistor, comprising an active layer pattern, a source electrode, a drain electrode and a gate electrode,
wherein the gate electrode is positioned above the active layer pattern, the source electrode and the drain electrode, the
source electrode is connected with the active layer pattern, the drain electrode is connected with the active layer pattern,
and the source electrode and the drain electrode are disposed in an adjacent layer of the active layer pattern without any
layer formed between the active layer pattern and the source electrode, or between the active layer pattern and the drain
electrode.

US Pat. No. 10,412,823

CIRCUIT COMPONENTS AND METHODS FOR MANUFACTURING THE SAME AND BONDING DEVICES

BOE TECHNOLOGY GROUP CO.,...

1. A circuit component, comprising:a first circuit board; and
a second circuit board,
wherein at least one of the first circuit board and the second circuit board comprises a bonding detection layer operable to:
detect a bonding parameter between the first circuit board and the second circuit board; and
emit a detection signal when the bonding parameter reaches a preset value, and
wherein the bonding detection layer comprises at least one of the group consisting of:
a pressure detection layer, wherein the bonding parameter is a bonding pressure value; and
a deformation quantity detection layer, wherein the bonding parameter is a deformation quantity of the bonding detection layer.

US Pat. No. 9,905,154

EMISSION ELECTRODE SCANNING CIRCUIT, ARRAY SUBSTRATE AND DISPLAY APPARATUS

BOE TECHNOLOGY GROUP CO.,...

1. An emission electrode scanning circuit comprising a plurality of sub scanning circuits connected in cascades which have
identical structures, each of which comprises:
a shift register unit configured to shift a received start signal to obtain a start signal of a next stage of sub scanning
circuit and an emission electrode driving control signal, and output the start signal of the next stage of sub scanning circuit
to a shift register unit of the next stage of sub scanning circuit;

a scanning signal generation unit connected to an emission electrode driving signal line and an output of the shift register
unit, and configured to generate an emission electrode scanning signal according to only these two received signals, the emission
electrode driving control signal received from the shift register unit and an emission electrode driving signal received from
the emission electrode driving signal line; and

a driving output unit configured to receive the emission electrode scanning signal from the scanning signal generation unit,
convert a high level of a received emission electrode scanning signal into an emission electrode driving high level, convert
a low level of the emission electrode scanning signal into an emission electrode driving low level, and output them to an
emission electrode,

wherein each of the plurality of sub scanning circuits provides a driving signal to the emission electrode respectively, and
the plurality of sub scanning circuits shares the emission electrode driving signal line and needs only an input of one start
signal to drive the emission electrode scanning circuit to send the emission electrode driving signal progressively.

US Pat. No. 9,329,399

NAKED-EYE THREE-DIMENSIONAL IMAGE DISPLAY METHOD AND DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A naked-eye three-dimensional image display method, comprising:
with a control means, making a two-dimensional display screen display a left-eye image at a first moment, and synchronously
applying a first set of voltages to a liquid crystal lens located at a light-exiting side of the two-dimensional display screen,
so that the left-eye image is projected through the liquid crystal lens to a left eye of an observer; and

with the control means, making the two-dimensional display screen display a right-eye image at a second moment, and synchronously
applying a second set of voltages to the liquid crystal lens, so that the right-eye image is projected through the liquid
crystal lens to a right eye of the observer;

wherein a time interval between the first moment and the second moment is not more than visual persistence time of human eyes.

US Pat. No. 9,158,148

LIQUID CRYSTAL DISPLAY PANEL AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A LCD panel comprising:
an array substrate which comprises: a first transparent substrate, a data line and a pixel electrode disposed on an inner
side of the first transparent substrate;

a color filter substrate which comprises: a second transparent substrate comprising a pixel region and a non-pixel region,
a color resin disposed in the pixel region, a first black matrix disposed in the non-pixel region and above the data line;
and a common electrode overlaying the color resin and the first black matrix;

wherein the first black matrix comprises: a flat bottom layer and a protrusion formed on the flat bottom layer, the protrusion
has slant surfaces near a boundary between the non-pixel region and the pixel region, such that an electric field for rotating
liquid crystal molecules at edges of the first black matrix is generated between the common electrode overlaying the slant
surfaces and the pixel electrode,

wherein the boundary between the non-pixel region and the pixel region is a boundary between the first black matrix and the
color resin,

wherein the slant surfaces of the protrusions near the boundary between the first black matrix and the color resin are conjoined
with the flat bottom layer at first positions, the slant surfaces incline, from the first positions, towards a perpendicular
bisection plane of the first black matrix extending along the direction of the data line, and

wherein distance between the first position and the boundary between the first black matrix and the color resin is 0.9 ?m˜1.1
?m.

US Pat. No. 9,508,287

PIXEL CIRCUIT AND DRIVING METHOD THEREOF, DISPLAY APPARATUS

Chengdu BOE Optoelectroni...

1. A pixel circuit comprising:
a light-emitting device, one terminal thereof is connected with a supply voltage terminal;
a driving transistor for driving the light-emitting device, whose source is connected with a common connection terminal;
a first switch transistor, whose gate receives a first scan signal, source is connected with a gate of the driving transistor,
and drain is directly connected with a drain of the driving transistor;

a third switch transistor, whose drain is connected with the other terminal of the light-emitting device, source is connected
with the drain of the driving transistor, and gate is connected with a control signal;

a storage capacitor, whose first terminal is connected with the gate of the driving transistor; a second switch transistor,
whose drain is connected with a second terminal of the storage capacitor, and source is connected with the common connection
terminal;

a fourth switch transistor, whose gate is connected with the first scan signal, and source is directly connected with the
second terminal of the storage capacitor;

a fifth switch transistor, whose gate is connected with the control signal, drain is directly connected with a data signal
terminal, and source is connected with a drain of the fourth switch transistor; and

a first capacitor, whose first terminal is connected with the source of the fifth switch transistor, and second terminal is
connected with the common connection terminal.

US Pat. No. 9,053,678

SHIFT REGISTER UNIT CIRCUIT, SHIFT REGISTER, ARRAY SUBSTRATE AND LIQUID CRYSTAL DISPLAY

BOE TECHNOLOGY GROUP CO.,...

1. A shift register unit circuit, comprising:
input terminals including a start signal input terminal, a first clock signal input terminal and a second clock signal input
terminal;

a pre-charging circuit for outputting a turn-on level in response to an enable level of a start signal and of a first clock
signal, and keeping the turn-on level being output during one clock period of the first clock signal;

a first level pulling-down circuit for pulling down the turn-on level output from the pre-charging circuit and outputting
a low level, after the turn-on level is input; and for outputting the low level in response to the enable level of the first
clock signal and a disable level of a second clock signal, and outputting a high level in response to a disable level of the
first clock signal and an enable level of the second clock signal, after the turn-on level is turned off;

a second level pulling-down circuit, which is coupled to an output terminal of the first level pulling-down circuit, for pulling
down a level at an output terminal of the second level pulling-down circuit and outputting the low level in response to the
high level output from the first pulling-down circuit; for pulling down the level at the output terminal of the second level
pulling-down circuit and outputting the low level in response to the enable level of the first clock signal; and for outputting
the high level in response to the low level output from the first level pulling-down circuit and the disable level of the
first clock signal; and

a scan signal output terminal, which is coupled to the output terminal of the second level pulling-down circuit, for outputting
a scan signal.

US Pat. No. 9,519,189

LIQUID CRYSTAL CELL, METHOD FOR FABRICATING THE SAME AND DISPLAY DEVICE

BOE Technology Group Co.,...

1. A method for fabricating a liquid crystal cell comprising:
forming photosensitive-type alignment films on an upper substrate and a lower substrate respectively;
removing all or part of portions of the alignment films that are located outside of display areas after performing an optical
alignment on the alignment films on the upper substrate and the lower substrate;

applying a frame-sealing adhesive on areas of the upper substrate or the lower substrate that are located outside of the display
areas and where there is no alignment film;

dripping liquid crystal on one or more of the upper substrate and the lower substrate, and cell-aligning the upper substrate
and the lower substrate; and

curing the frame-sealing adhesive and cutting the cell-aligned upper substrate and lower substrate into a plurality of liquid
crystal cells.

US Pat. No. 9,448,676

TOUCH DISPLAY DRIVING CIRCUIT, DRIVING METHOD AND DISPLAY DEVICE

BOE Technology Group Co.,...

1. A touch display driving circuit, comprising a data writing control unit, a storage unit, a touch sensing unit, a driving
compensation control unit, a driving unit, a light-emitting control unit and a light-emitting unit, wherein
the data writing control unit is used for controlling a voltage signal of a data line to be written into the storage unit;
the storage unit is used for providing a voltage for the driving unit;
the light-emitting control unit is used for controlling the light-emitting unit to emit light;
the driving unit is used for providing a touch detecting current in a touch detecting stage and providing a driving current
for the light-emitting unit in a light-emitting stage;

the driving compensation control unit is used for compensating a voltage value of the storage unit; and
the touch sensing unit is used for outputting the touch detecting current in the touch detecting stage and changing the voltage
value of the storage unit when no touch occurs in the touch detecting stage,

wherein the data writing control unit is connected with the storage unit through a second node; the storage unit is connected
with the driving unit through a first node; the driving unit is connected with the light-emitting control unit through a fourth
node; the light-emitting control unit is connected with the light-emitting unit through a fifth node; the driving compensation
control unit is connected with both ends of the storage unit through the first node and the second node, respectively; the
driving compensation control unit is connected with the driving unit through the first node and the fourth node, respectively;
and the touch sensing unit is connected with the driving unit through a third node, the first node and the fourth node, respectively.

US Pat. No. 10,001,893

TOUCH SCREEN AND DISPLAY APPARATUS

BOE TECHNOLOGY GROUP CO.,...

1. A touch screen, comprising:a plurality of first electrode strips arranged on a substrate and extending in a first direction, at least one of the plurality of first electrode strips comprising a plurality of first electrodes spaced apart from each other;
a plurality of second electrode strips extending in a second direction crossing the first direction and disposed in the same layer as the plurality of first electrode strips, at least one of the plurality of second electrode strips comprising a plurality of second electrodes spaced apart from each other;
a first connection line, a second connection line, a third connection line and a fourth connection line arranged in at least one crossing region of the plurality of first electrode strips with the plurality of second electrode strips; and
a transparent first connection part and a transparent second connection part provided within the at least one crossing region in the same layer as the plurality of first electrode strips and the plurality of second electrode strips, the second connection part being insulated from the first connection part;
wherein the first connection part is electrically connected with two adjacent ones of said first electrodes via the first connection line and the second connection line respectively, and a sum of lengths of the first connection line and the second connection line is less than a distance between the two adjacent ones of the first electrodes; and
wherein the second connection part is electrically connected with two adjacent ones of said second electrodes via the third connection line and the fourth connection line respectively, and a sum of lengths of the third connection line and the fourth connection line is less than a distance between the two adjacent ones of the second electrodes.

US Pat. No. 9,911,766

ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, AND DISPLAY APPARATUS

BOE TECHNOLOGY GROUP CO.,...

1. A manufacturing method of an array substrate, comprising the following steps:
S1, forming a data line metal layer on a substrate, and forming a pattern of a data line by a patterning process of the data
line metal layer;

S2, forming a semiconductor layer on the substrate formed with the data line thereon, and forming a pattern of an active layer
by a patterning process of the semiconductor layer, wherein the data line is connected with the active layer, and wherein
the step S2 further comprises:

depositing a polycrystalline silicon layer on the substrate formed with the data line thereon by a molecular beam deposition
method or a low pressure chemical vapor deposition method, or first depositing an amorphous silicon layer by a low pressure
chemical vapor deposition method or a plasma enhanced chemical vapor deposition method, then forming a polycrystalline silicon
layer by utilizing excimer laser annealing;

forming the pattern of the active layer by patterning the polycrystalline silicon layer;
forming an active region, a source region and a drain region by doping the active layer, wherein the source region and the
drain region are located on two sides of the active region respectively, and the data line is connected with the source region;
and, after step S2,

S3, forming a gate insulator and a conducting metal layer on the substrate formed with the active layer thereon, and forming
a pattern of a gate line by a patterning process of the conducting metal layer, wherein an overlapped region between projections
of the gate line and the active layer on the substrate corresponds to the active region, and a part of the gate line corresponding
to the overlapped region functions as a gate electrode;

wherein, in step S1, both of the pattern of the data line and a pattern of a shield metal for shielding the active region are formed by a same
layer through the patterning process of the data line metal layer, and the shield metal is not electrically connected with
any electrical components formed on the array substrate.

US Pat. No. 9,905,166

PIXEL DRIVING CIRCUIT, PIXEL DRIVING METHOD AND DISPLAY APPARATUS

BOE TECHNOLOGY GROUP CO.,...

1. A pixel driving circuit for driving a light-emitting element, comprising:
a scanning line configured to provide a scanning signal; a power line comprising a first power line and a second power line
and configured to provide power to the pixel driving circuit; and a data line configured to provide a data signal;

a light-emitting control signal line configured to provide a light-emitting control signal;
a driving transistor having an input terminal connected to a first terminal of the light-emitting element, a control terminal
connected to a first intermediate node, and an output terminal connected to a second intermediate node, wherein the light-emitting
element has the other terminal connected to the first power line;

a charging sub-circuit having an input terminal connected to the data line, a control terminal connected to the scanning line,
and an output terminal connected to the first intermediate node;

a storage capacitor having a first terminal connected to the second intermediate node and a second terminal connected to a
third intermediate node;

a reset sub-circuit having an input terminal connected to a reference signal line, a control terminal connected to the scanning
line, and an output terminal connected to the third intermediate node; and

a light-emitting control sub-circuit having a first input terminal connected to the second power line, a second input terminal
connected to the first intermediate node, a control terminal connected to the light-emitting control signal line, a first
output terminal connected to the second intermediate node, and a second output terminal connected to the third intermediate
node;

wherein the data line and the first intermediate node are connected electronically by the charging sub-circuit and the reference
signal line and the third intermediate node are connected electronically by the reset sub-circuit under a control of the scanning
signal, the driving transistor provides a charging voltage related to a data voltage and a threshold voltage thereof at the
output terminal under a control of the data signal, and the storage capacitor storages the charging voltage; and

the first intermediate node and the third intermediate node are connected electronically by the light-emitting control sub-circuit
under a control of the light-emitting control signal, so that the second terminal of the storage capacitor and the control
terminal of the driving transistor are connected electronically;

wherein the reference signal line provides a direct current reference voltage larger than the data voltage, and the reset
sub-circuit comprises:

a switch transistor having a gate connected to the scanning line, a first electrode connected to the reference signal line,
and a second electrode connected to the third intermediate node, wherein the first electrode is one of a source and a drain,
and the second electrode is the other of the source and the drain.

US Pat. No. 9,535,531

ACTIVE MATRIX ORGANIC LIGHT EMITTING DIODE PIXEL UNIT CIRCUIT, DISPLAY PANEL AND ELECTRONIC PRODUCT

CHENGDU BOE OPTOELECTRONI...

1. An Active Matrix Organic Light Emitting Diode (AMOLED) pixel unit circuit, comprising a light emitting circuit, an amplifying
and driving circuit, a threshold compensation circuit, a light emitting control-circuit, a touch sensing circuit and a sensing
signal outputting circuit, wherein
the amplifying and driving circuit is configured to amplify a sensing signal generated by the touch sensing circuit, output
the sensing signal through the sensing signal outputting circuit, and drive the light emitting circuit;

the light emitting control-circuit is configured to control the light emitting circuit to emit light;
the threshold compensation circuit is configured to compensate a threshold voltage of the amplifying and driving circuit;
the touch sensing circuit is configured to generate the sensing signal and output the sensing signal to the amplifying and
driving circuit; and

the sensing signal outputting circuit is configured to output the sensing signal amplified by the amplifying and driving circuit,
wherein the amplifying and driving circuit comprises a first transistor, wherein a gate electrode of the first transistor
is directly connected to a first node of the AMOLED pixel unit circuit, and a source electrode and a drain electrode of the
first transistor are directly connected to a second node and a third node of the AMOLED pixel unit circuit, respectively,
wherein the first node is a point directly connecting the amplifying and driving circuit and the threshold compensation circuit;
the second node is a point directly connecting the amplifying and driving circuit, the light emitting control circuit, and
the sensing signal outputting circuit; and the third node is a point directly connecting the amplifying and driving circuit,
the light emitting control circuit, and the threshold compensation circuit.

US Pat. No. 9,054,198

PIXEL UNIT STRUCTURE, ARRAY SUBSTRATE AND DISPLAY DEVICE

BOE Technology Group Co.,...

1. A pixel unit structure, comprising a thin film transistor and a first barrier layer, wherein the first barrier layer is
opposite to a drain region of an active layer of the thin film transistor, and the first barrier layer is connected to a common
electrode of an array substrate, and a capacitor is formed between the first barrier layer and the drain region of the active
layer.

US Pat. No. 10,417,983

SHIFT REGISTER UNIT, GATE DRIVING CIRCUIT AND DISPLAY APPARATUS

BOE TECHNOLOGY GROUP CO.,...

1. A shift register unit, comprising:an input circuit configured to provide a first input signal to a first node based on a first clock signal;
a first control circuit connected to the input circuit at the first node and configured to provide a pull-up output by providing a third clock signal to an output node of the shift register unit based on the first input signal and the third clock signal, and then provide a pull-down output by providing a source voltage to the output node based on a second input signal that is provided by the input circuit to the first node based on a second clock signal; and
a second control circuit configured to maintain a level at the output node at the source voltage based on a fourth clock signal,
wherein the first control circuit comprises a first transistor that remains on after the pull-up output to provide the pull-down output, and wherein the second control circuit comprises a second transistor that maintains the level at the output node; and
wherein the second transistor has its gate connected to a second node, its drain connected to the source voltage and its source connected to the output node;
wherein the second control circuit further comprises: a fifth transistor having its gate and drain connected to the fourth clock signal and its source connected to the second node; and a sixth transistor having its gate connected to the second node, its source connected to the first node and its drain connected to the source voltage.

US Pat. No. 9,499,746

ALIGNMENT AND FLATTENING MATERIAL COMPOSITIONS, DISPLAY DEVICE COMPRISING SAME AND PROCESS FOR ADJUSTING DISPLAY COLOR

BOE TECHNOLOGY GROUP CO.,...

1. An alignment material composition comprising,
60-65 wt % of a solvent;
10-30 wt % of a butylcellosolve;
0.5-20 wt % of an organic additive; and
5-10 wt % of a polyimide resin;
wherein the organic additive is Schiff base compounds, which are complexes of Schiff bases derived from condensation of salicylaldehyde
and aniline and represented by the following formula 3 with Cu+:


wherein the carboxylic group is at the ortho or para position of the C—N bond.

US Pat. No. 9,470,636

DEVICE AND METHOD FOR DETECTING LIQUID CRYSTAL DISPLAY PANEL

BOE Technology Group Co.,...

1. A device comprising:
a transparent bearing platform for bearing the liquid crystal display panel to be detected;
a first polarizer, positioned over the transparent bearing platform;
a second polarizer, positioned under the transparent bearing platform;
a backlight source, positioned below the second polarizer, wherein light emitted from the backlight source is capable of arriving
at the first polarizer after passing through the second polarizer and the transparent bearing platform;

a first transparent electrode layer, provided over the transparent bearing platform;
a second transparent electrode layer, provided under the transparent bearing platform; and
a signal loading unit, electrically connected to the first transparent electrode layer and the second transparent electrode
layer, for loading an electric signal to the first transparent electrode layer and the second transparent electrode layer,
so that an electric field is generated between the first transparent electrode layer and the second transparent electrode
layer, liquid crystal molecules of the liquid crystal display panel to be detected on the transparent bearing platform are
deflected under control of the electric field;

wherein the first transparent electrode layer is a first transparent glass substrate on which a transparent conductive film
is coated; an area of the first transparent glass substrate is larger than an area of the liquid crystal display panel to
be detected; and

wherein the second transparent electrode layer is a second transparent glass substrate on which a transparent conductive film
is coated; an area of the second transparent glass substrate is larger than an area of the liquid crystal display panel to
be detected.

US Pat. No. 9,323,068

SPATIAL STEREOSCOPIC DISPLAY DEVICE AND OPERATING METHOD THEREOF

Chengdu BOE Optoelectroni...

1. A spatial stereoscopic display device, comprising:
a laser source, connected with a 3D modulator and emitting laser light;
a two-dimensional scanning unit, connected with the 3D modulator and receiving the laser light emitted by the laser source
and projecting the laser light onto a variable isoclinic transflective unit according to specific addressing information under
the control of the 3D modulator;

the variable isoclinic transflective unit, receiving the laser light projected thereon by the two-dimensional scanning unit
and dividing the laser light into a first splitting light and a second splitting light intersecting in an imaging space, by
transmission and reflection;

a power source and position sensor unit, connected with the variable isoclinic transflective unit to control an intersection
of the first splitting light and the second splitting light in the imaging space;

the imaging space, provided with an up-conversion material inside, and the up-conversion material at the intersection of the
first splitting light and the second splitting light is excited to form a light-emitting point; and

the 3D modulator, connected with the laser source, the two-dimensional scanning unit, the power source and position sensor
unit to respectively control the laser source, the two-dimensional scanning unit, the power source and position sensor unit,

wherein the variable isoclinic transflective unit includes a transflective film and a reflector arranged under the transflective
film; the laser light from the two-dimensional scanning unit is directly projected onto the transflective film; and the reflector
is obliquely arranged at an initial inclination angle relative to a plane where the transflective film is positioned,

the reflector is movable, and
there are a plurality of light-emitting points in the imaging space to provide a volumetric three dimensional image being
consistent with a motion trajectory of the intersection of the first splitting light and the second splitting light.

US Pat. No. 9,136,013

SHIFT REGISTER, GATE DRIVER, AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A shift register, comprising:
an input programming unit, a latch unit, and output programming unit and an inverting output unit, wherein the input programming
unit is connected to an input end of the latch unit to program the input end of the unit;

the latch unit being used for latching an output signal, and a non-inverting output end and an inverting output end of the
latch unit being connected through the output programming unit;

the output programming unit having one input end connected to the non-inverting output end of the latch unit and another input
end connected to the inverting output end of the latch unit for programming the output ends of the latch unit and generating
an output signal of the register; and

the inverting output unit being connected to the inverting output end of the latch unit and being used for generating an inverting
output signal of the shift register, wherein

the input programming unit comprises a first thin-film transistor, a gate thereof being connected to a first clock signal
end, a source being connected to an input signal end, and a drain being connected to the input end of the latch unit, and

the output programming unit comprises;
a second thin-film transistor, a third thin-film transistor, and a fourth thin-film transistor, wherein a gate of the second
thin-film transistor being connected to a second clock signal end, a source and a drain being connected to the non-inverting
output end of the latch unit and the gate of the third thin-film transistor respectively, a source and a drain of the third
thin-film transistor being connected to a first output signal end and the operating voltage end respectively, a gate of the
fourth thin-film transistor being connected to the inverting output end of the latch unit, and a source and a drain thereof
being connected to the digital ground voltage end and the first output signal end respectively.

US Pat. No. 9,773,451

PIXEL CIRCUIT, METHOD FOR DRIVING PIXEL CIRCUIT AND DISPLAY APPARATUS

BOE TECHNOLOGY GROUP CO.,...

1. A pixel circuit, comprising a plurality of rows of pixel units and a row-shared unit, wherein each row of the pixel units
comprises a plurality of sub-pixel units, and the row-shared unit comprises a plurality of row-driving light-emitting control
modules;
all of the plurality of sub-pixel units comprised in each row of pixel units are connected to a corresponding signal line;
and

each row-driving light-emitting control module among the plurality of row-driving light-emitting control modules is connected
to all of the sub-pixel units comprised in a corresponding one row of the pixel units among the plurality of rows of pixel
units through the signal line, so as to provide a threshold compensation function,

wherein each of the sub-pixel units comprised in an n-th row of pixel units comprises a sub-pixel driving circuit and a light-emitting
element, wherein n is an integer not greater than the total number of rows of the plurality of rows of pixel units comprised
in the pixel circuit, and an (n?1)-th scanning line is an initial scanning line if n equals 1;

the sub-pixel driving circuit comprises a driving compensation module, a data writing module and a driving transistor;
a first electrode of the driving transistor is connected to a first end of the light-emitting element, a second electrode
of the driving transistor is inputted with a first level, and a second end of the light-emitting element is connected to the
signal line;

the driving compensation module is connected to the (n?1)-th scanning line, a gate electrode of the driving transistor, the
first electrode of the driving transistor, and the second electrode of the driving transistor respectively, inputted with
a second level, and configured to control a gate-source voltage of the driving transistor to compensate for a threshold voltage
of the driving transistor when a scanning signal outputted by the (n?1)-th scanning line is effective during a first stage
of a time period;

the data writing module is connected to the n-th scanning line, a data line and the driving compensation module respectively,
and configured to control a data voltage on the data line to be written into the gate electrode of the driving transistor
by the driving compensation module when the scanning signal outputted by the n-th scanning line is effective during a second
stage of the time period; and

each of the row-driving light-emitting control module is inputted with a light-emitting control signal and the second level
respectively, connected to the second end of the light-emitting element through the signal line, and configured to control
a level of the signal line to be the second level when the light-emitting control signal is effective during a third stage
of the time period,

the driving compensation module is further configured to maintain a level of the gate electrode of the driving transistor,
so as to control the driving transistor to drive the light-emitting element to emit light and control the threshold voltage
of the driving transistor to be compensated, when both the scanning signal outputted by the (n?1)-th scanning line and the
scanning signal outputted by the n-th scanning line are ineffective during the third stage of the time period.

US Pat. No. 9,626,035

OLED PIXEL CIRCUIT, DRIVING METHOD THEREOF AND DISPLAY PANEL

BOE TECHNOLOGY GROUP CO.,...

1. An organic light emitting diode pixel circuit comprising: a light emitting module which comprises an organic light emitting
diode for emitting light; a light emitting control module comprising a fourth thin film transistor and a fifth thin film transistor,
which is configured for controlling the light emitting module to emit light; a driving module comprising a first thin film
transistor, which is configured for driving the light emitting control module, so as to control the light emitting module
to emit light; a threshold compensation module comprising a second thin film transistor and a storage capacitor, which is
configured for compensating threshold voltage of the driving module; and a data signal input module comprising a sixth thin
film transistor, which is configured for inputting a data signal;
wherein the organic light emitting diode pixel circuit further comprises:
a touch sensing module, which is configured for generating a touch sensing signal and outputting the touch sensing signal
to the driving module, the touch sensing module comprising a seventh thin film transistor and a detection device for touch
detection, a gate electrode of the seventh thin film transistor is connected to a first control signal for the preceding row
of pixels each including the OLED pixel circuit a source electrode and a drain electrode of the seventh thin film transistor
are connected to the first node and one terminal of the detection device respectively; wherein, the first node is a connection
point of the threshold compensation module and the driving module;

a touch detection module comprising a third thin film transistor, which is configured for detecting the touch sensing signal
from the driving module, and providing an initial voltage for the threshold compensation module;

wherein the driving module amplifies the touch sensing signal generated by the touch sensing module and then outputs it to
the touch detection module.

US Pat. No. 9,330,604

ORGANIC LIGHT-EMITTING DIODE PIXEL CIRCUIT, DRIVE METHOD THEREOF, AND DISPLAY DEVICE

BOE Technology Group Co.,...

1. An OLED pixel circuit, comprising:
a data writing unit, a storage unit, a drive unit, an OLED, a light-emitting control unit and a touch detecting unit; wherein,
the data writing unit, in a touch detecting stage and an OLED light-emitting stage, is used for writing a power supply voltage
signal into the storage unit under the control of a light-emitting control line and a scanning line, and writing a data line
voltage signal into the storage unit under the control of the scanning line;

the storage unit is used for supplying voltage to the drive unit;
the touch detecting unit, in the touch detecting stage, is used for sensing touch under the control of a touch signal level
control line, and generating a detecting signal;

the drive unit, in the touch detecting stage, is used for converting the detecting signal into a touch output signal, which
is output via the touch detecting unit, under the control of the touch signal level control line, and, in the OLED light-emitting
stage, is used for providing drive current for the OLED; and

the light-emitting control unit, in the OLED light-emitting stage, is used for turning on the drive unit and the OLED under
the control of the touch signal level control line.

US Pat. No. 9,097,931

COLOR FILTER SUBSTRATE AND LIQUID CRYSTAL DISPLAY

BOE TECHNOLOGY GROUP CO.,...

1. A color filter substrate comprising:
a base substrate;
a black matrix formed on the base substrate, which defines an array formed by a plurality of pixels; and
a color filter layer formed on the base substrate and comprising color filter units each in a corresponding pixel;
a common electrode layer formed on the color filter layer; and
a liquid crystal molecule alignment layer formed on the common electrode layer;
wherein the color filter layer is formed integrally with at least two post projections to be used as post spacers and formed
on the base substrate and the black matrix, and the post projections to be used as post spacers are formed on the black matrix;

wherein the at least two post projections to be used as the post spacers are formed only by and integrally with the color
filter layer in the corresponding single color filter unit on the black matrix, and are different in height.

US Pat. No. 10,095,905

FINGERPRINT IDENTIFICATION DEVICE, DRIVING METHOD THEREOF, DISPLAY PANEL AND DISPLAY APPARATUS

BOE TECHNOLOGY GROUP CO.,...

1. A fingerprint identification device, comprising:a plurality of fingerprint identification units arranged in a matrix;
a signal input line for loading a detection signal and a signal reading line for reading an identification signal which are in one-to-one correspondence with each column of fingerprint identification units;
wherein each fingerprint identification unit comprises a fingerprint identification electrode, a first switch unit and a second switch unit, the first switch unit is connected to the fingerprint identification electrode and the signal input line respectively for controlling an electrical conduction between the fingerprint identification electrode and the signal input line, the second switch unit is connected to the fingerprint identification electrode and the signal reading line respectively for controlling an electrical conduction between the fingerprint identification electrode and the signal reading line.

US Pat. No. 9,907,162

DISPLAY SUBSTRATE, DISPLAY PANEL AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A display substrate comprising a flexible base substrate, wherein the flexible base substrate comprises a display area
and a non-display area disposed outside the display area, and the non-display area of the base substrate is divided to form
at least one carrying unit by at least one buffer member, the buffer member is a slit on an edge of the flexible base substrate,
a reinforcing member is disposed at an edge of the slit, and in a plan view of the display substrate, a part of the reinforcing
member is disposed in the slit.

US Pat. No. 9,824,633

PIXEL DRIVING CIRCUIT AND METHOD FOR DRIVING THE SAME

BOE TECHNOLOGY GROUP CO.,...

1. A pixel driving circuit, comprising:
a data signal input unit configured to receive a data signal and provide a data voltage;
a light emitting unit configured to emit light and display;
a light emitting control unit configured to control the light emission of the light emitting unit at a pixel driving display
phase;

a reference voltage providing unit configured to provide a reference voltage;
a driving unit configured to receive the reference voltage provided by the reference voltage providing unit and drive the
light emitting unit via the light emitting control unit at the pixel driving display phase; and

a threshold voltage compensating unit configured to receive the data voltage via the data signal input unit at the initialization
phase, and store the data voltage and the threshold voltage of the driving unit at the threshold voltage compensating phase,
such that the voltage provided to the gate of the driving unit at the pixel driving display phase is able to compensate the
threshold voltage of the driving unit and the driving current of the driving unit is controlled accurately,

wherein the data signal input unit is connected to a data signal terminal, a first control signal terminal, and the threshold
voltage compensating unit, wherein the light emitting unit is connected to the light emitting control unit and a high voltage
terminal, wherein the light emitting control unit is connected to the light emitting unit, the driving unit, the threshold
voltage compensating unit, a second control signal terminal, a third control signal terminal, and a low voltage terminal,
wherein the reference voltage providing unit is connected to the driving unit, a reference voltage terminal, and the first
control signal terminal, wherein the driving unit is connected to the light emitting control unit, the reference voltage providing
unit, and the threshold voltage compensating unit, and wherein the threshold voltage compensating unit is connected to the
data signal input unit, the light emitting control unit, the driving unit, and the first control signal terminal, and

wherein the reference voltage providing unit provides, under the control of the first control signal, a driving transistor
with the reference voltage, such that, when the driving transistor is connected in a form of diode, a gate of the driving
transistor is charged by the reference voltage via the driving transistor such that a voltage at the gate of the driving transistor
is equal to the difference between the reference voltage and a threshold voltage of the driving transistor.

US Pat. No. 9,691,328

PIXEL DRIVING CIRCUIT, PIXEL DRIVING METHOD AND DISPLAY APPARATUS

BOE TECHNOLOGY GROUP CO.,...

1. A pixel driving circuit for driving a light-emitting element, comprising:
a light-emitting control signal line configured to provide a light-emitting control signal;
a driving unit having an input end connected to a first intermediate node, a control end connected to a third intermediate
node, and an output end connected to one end of the light-emitting element, wherein the light-emitting element has the other
end connected to a first power line;

a first switch unit having an input end connected to a second power line, a control end connected to the light-emitting control
signal line, and an output end connected to the first intermediate node;

a second switch unit having an input end connected to a reference signal line, a control end connected to a second level of
scanning signal lines, and an output end connected to a second intermediate node;

a first storage unit having a first end connected to the first intermediate node and a second end connected to the second
intermediate node;

a second storage unit having a first end connected to the second intermediate node and a second end connected to the third
intermediate node;

a third switch unit having an input end connected to the third intermediate node, a control end connected to a third level
of scanning signal lines, and an output end connected to the second intermediate node;

a charging control unit having a first input end connected to the reference signal line, a second input end connected to a
data line, a control end connected to the first level of scanning signal lines, a first output end connected to the second
intermediate node, and a second output end connected to the third intermediate node;

wherein, in a first operation phase of the pixel driving circuit,
the second power line and the first intermediate node are conducted by the first switch unit under the control of the light-emitting
control signal output by the light-emitting control signal line,

the reference signal line and the second intermediate node are conducted by the charging control unit under the control of
a first level of scanning signals output by the first level of scanning signal lines, to charge the first storage unit connected
to the first intermediate node and the second intermediate node, and the data line and the third intermediate node are conducted
by the charging control unit to charge the second storage unit connected to the third intermediate node and the second intermediate
node;

in a second operation phase of the pixel driving circuit,
the reference signal line and the second intermediate node are conducted by the second switch unit under the control of a
second level of scanning signals output by the second level of scanning signal lines, to maintain a voltage across the second
storage unit so as to stable a voltage at the control end of the driving unit, while the first switch unit is turned off by
the light-emitting control signal, and the first storage unit is self-discharged through the driving unit, to store a data
voltage and a threshold voltage of the driving unit in a self-discharge manner;

in a third operation phase of the pixel driving circuit,
the third intermediate node and the second intermediate node are conducted by the third switch unit under the control of the
third level of scanning signals output by the third level of scanning signal lines, to discharge the second storage unit;

in a driving phase of the pixel driving circuit,
the second power line and the first intermediate node are conducted by the first switch unit under the control of the light-emitting
control signal output by the light-emitting control signal line, so that a voltage difference between the control end and
the input end of the driving unit is equal to a voltage of the first storage unit, to compensate for the threshold voltage
of the driving unit, so as to make driving current provided by the driving unit to the light-emitting element be unrelated
to the threshold voltage of the driving unit.

US Pat. No. 9,515,191

THIN-FILM FIELD EFFECT TRANSISTOR, DRIVING METHOD THEREOF, ARRAY SUBSTRATE, DISPLAY DEVICE, AND ELECTRONIC PRODUCT

CHENGDU BOE OPTOELECTRONI...

1. A thin film field effect transistor, comprising a gate metal layer and a semiconductor layer,
wherein the thin film field effect transistor further comprises a guide layer,
wherein when an electric field is formed between the gate metal layer and the semiconductor layer, an electric field is also
formed between the guide layer and the gate metal layer, the semiconductor layer accumulates electrons or holes to reinforce
the electric field between the gate metal layer and the semiconductor layer by utilizing the electric field between the guide
layer and the gate metal layer,

wherein a projection area of the guide layer on a substrate where the thin film field effect transistor is arranged is larger
than that of the semiconductor layer, and the projection area of the semiconductor layer on the substrate is larger than that
of the gate metal layer, so as to increase an overlapping area between the projection area of the guide layer on the substrate
and the projection area of the semiconductor layer on the substrate, and

wherein the guide layer is not in contact with the gate metal layer and wherein the guide layer is disposed over the substrate,
the semiconductor layer is disposed over the guide layer, and the gate metal layer is disposed over the semiconductor layer.

US Pat. No. 9,494,804

ACTIVE-SHUTTER 3D GLASSES AND OPERATING METHOD THEREOF

BOE Technology Group Co.,...

1. An active-shutter 3D glasses, comprising:
a frame, comprising temples;
left and right magneto-optical eyeglasses, supported by the frame, and comprising left and right transparent mediums and left
and right rear polarizers, respectively;

a magnetic field apparatus, located outside the left and right magneto-optical eyeglasses, and providing the left and right
magneto-optical eyeglasses with a magnetic field which causes polarization planes of polarized light entering the left and
right magneto-optical eyeglasses to rotate; and

a signal module, connected with the magnetic field apparatus, and providing a electric-current signal to the magnetic field
apparatus so that the magnetic field corresponds to the electric-current signal, and the electric-current signal is changed
so that the magnetic field which rotates the polarized light is induced,

wherein the generated magnetic field causes the polarization planes of the polarized light entering the left and right transparent
mediums to rotate, respectively,

wherein the left and right magneto-optical eyeglasses are not a liquid crystal eyeglass,
the left and right transparent mediums are transparent mediums with a predetermined Verdet constant
wherein the active-shutter 3D glasses further comprising an infrared sensing transmitter and an infrared sensing receiver;
the infrared sensing receiver is connected with the signal module; the infrared sensing transmitter transmits infrared light
in a predetermined direction, and the infrared sensing receiver receives the transmitted infrared light, and according to
the transmitting position and the receiving position of the infrared light, obtains a tilt angle of the active-shutter 3D
glasses, and feeds the tilt angle to the signal module, so that the signal module adjusts the electric-current signal according
to the tilt angle, so as to cause the magnetic field apparatus to change the magnetic field; and

wherein the absolute value of the Verdet constant of the left and right transparent mediums is greater than 0.3 min/(Oe·cm).

US Pat. No. 9,459,730

SHIFT REGISTER UNIT, DISPLAY DEVICE AND DRIVING METHOD

BOE TECHNOLOGY GROUP CO.,...

1. A shift register unit, comprising:
an inputting module configured to enable a first node to be in electrical connection to a first voltage signal line under
the control of a signal applied to an input end, the first node being a connection point between the inputting module and
a pulling-up module;

a resetting module configured to enable the first node to be in electrical connection to a second voltage signal line under
the control of a signal applied to a reset end;

the pulling-up module located between the first node and an output end, and configured to enable a first clock signal line
to be in electrical connection to the output end under the control of a voltage at the first node;

a pulling-down controlling module configured to control a voltage at a second node according to the voltage at the first node,
the second node being a connection point between the pulling-down controlling module and a pulling-down module; and

the pulling-down module configured to pull down the voltage at the first node and a voltage at the output end according to
the voltage at the second node,

wherein the pulling-down module comprises a tenth switch element which is controlled so as to enable the first node to be
in electrical connection to a first low-level voltage line, and

the pulling-down module further comprises a cut-off enhancement unit configured to cut off a connection between one end of
the tenth switch element and the first low-level voltage line when the tenth switch element is in an off state.

US Pat. No. 9,224,762

ARRAY SUBSTRATE AND DISPLAY DEVICE

Boe Technology Group Co.,...

1. An array substrate comprising a thin film transistor, a pixel electrode, and a common electrode, wherein the array substrate
further comprises:
a first material layer located on the thin film transistor, the first material layer having a first via hole;
a conductive interlayer located on the first material layer, the conductive interlayer being electrically connected with the
drain of the thin film transistor through the first via hole; and

a second material layer located on the conductive interlayer, the second material layer having a second via hole staggered
with the first via hole;

wherein the pixel electrode is located on the second material layer;
wherein the conductive interlayer is electrically connected with the pixel electrode through the second via hole, so as to
form a storage capacitance with the common electrode;

wherein the material of a part of the first material layer located within a pixel opening area of the array substrate is photoresist;
wherein the material of a part of the second material layer located within the pixel opening area of the array substrate is
photoresist;

wherein the material of the conductive interlayer is a transparent conductive material; and
wherein the second via hole is located in a part of the second material layer that corresponds to the thin film transistor
or the second via hole is located in a part of the second material layer that corresponds to the common electrode.

US Pat. No. 10,147,367

MEMORY IN PIXEL, DATA STORAGE METHOD IN PIXEL AND PIXEL ARRAY

BOE TECHNOLOGY GROUP CO.,...

1. A memory in pixel, comprising:a data input circuit, connected to a data line (DATA), a first control signal terminal (S1), a first data latching terminal (IN1) and a second data latching terminal (IN2), and configured to read data voltage (Vdata) on the data line onto the first data latching terminal (IN1) and the second data latching terminal (IN2) when a first control signal of the first control signal terminal is at its effective level;
a first data latching circuit, connected to the first data latching terminal (IN1) and configured to hold a level of the first data latching terminal (IN1);
a second data latching circuit, connected to the second data latching terminal (IN2) and configured to hold a level of the second data latching terminal (IN2);
a drive control circuit, connected to the first data latching terminal (IN1) and a drive node (M) and configured to enable a level of the drive node (M) to be opposite to that of the first data latching terminal (IN1); and
a drive circuit, connected to the drive node (M), the second data latching terminal (IN2) and an output terminal (OUT), and configured to output a third power source voltage of a third power source voltage terminal to the output terminal (OUT) when the drive node (M) is at its effective level and output a fourth power source voltage of a fourth power source voltage terminal to the output terminal (OUT) when the second data latching terminal (IN2) is at its effective level.

US Pat. No. 10,139,681

ARRAY SUBSTRATE AND LIQUID CRYSTAL DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. An array substrate, comprising:a plurality of gate lines and a plurality of data lines, the plurality of gate lines and the plurality of data lines defining a plurality of sub-pixels arranged in an array, each of the sub-pixels being provided with a pixel electrode; and
a common electrode located over the plurality of sub-pixels and comprising a plurality of first sub-common electrodes and a plurality of second sub-common electrodes, and the plurality of first sub-common electrodes are in one-to-one correspondence with the plurality of sub-pixels;
wherein each second sub-common electrode is connected between two adjacent first sub-common electrodes which correspond to two sub-pixels respectively;
each of the first sub-common electrodes is provided with first slits therein, and the second sub-common electrode is provided with second slits therein; and there is an angle between an extension direction of the second slits and an extension direction of the first slits.

US Pat. No. 10,127,875

SHIFT REGISTER UNIT, RELATED GATE DRIVER AND DISPLAY APPARATUS, AND METHOD FOR DRIVING THE SAME

BOE TECHNOLOGY CO., LTD.,...

1. A shift register unit, comprising:a pre-charge reset module;
a pull-up module;
a pull-down module;
a first pull-down control module; and
a second pull-down control module, wherein:
the pre-charge reset module is connected to a forward scanning control signal input terminal, a reverse scanning control signal input terminal, a first signal input terminal, a second signal input terminal, and a pull-up control node;
the pull-up module is connected to the pull-up control node, an input terminal of a first clock signal, and a signal output terminal;
the first pull-down control module is connected to a pull-down control node, the forward scanning control signal input terminal, the reverse scanning control signal input terminal, the first signal input terminal, and the second signal input terminal;
the second pull-down control module is connected to the pull-down control node and an input terminal of a clock control signal, the input terminal of the clock control signal including an input terminal of a third clock signal and an input terminal of a fourth clock signal, and the second pull-down control module including a tenth transistor, an eleventh transistor, a twelfth transistor, and a thirteenth transistor;
the pull-down module is connected to the pull-down control node, the pull-up control node, and the signal output terminal;
a first terminal of the tenth transistor is connected to the input terminal of the third clock signal, a second terminal of the tenth transistor is connected to a control terminal of the eleventh transistor, and a control terminal of the tenth transistor is connected to the forward scanning control signal input terminal;
a first terminal of the eleventh transistor is connected to the forward scanning control signal input terminal, and a second terminal of the eleventh transistor is connected to the pull-down control node;
a first terminal of the twelfth transistor is connected to the input terminal of the fourth clock signal, a second terminal of the twelfth transistor is connected to a control terminal of the thirteenth transistor, and a control terminal of the twelfth transistor is connected to the reverse scanning control signal input terminal; and
a first terminal of the thirteenth transistor is connected to the reverse scanning control signal input terminal, and a second terminal of the thirteenth transistor is connected to the pull-down control node.

US Pat. No. 9,911,618

LOW TEMPERATURE POLY-SILICON THIN FILM TRANSISTOR, FABRICATING METHOD THEREOF, ARRAY SUBSTRATE AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

8. A method for fabricating a low temperature poly-silicon thin film transistor, comprising:
forming an active layer, wherein the active layer comprises a source contact region, a drain contact region, and a channel
region located between the source contact region and the drain contact region, and thicknesses of the source contact region
and the drain contact region are both larger than that of the channel region; and

forming a source and a drain above the source contact region and the drain contact region, respectively, so that the source
is connected to the source contact region and the drain is connected to the drain contact region,

wherein the method further comprises forming a gate insulating layer on the active layer; and forming a gate on the gate insulating
layer, wherein the gate insulating layer comprises a silicon oxide layer formed on the active layer and contacting the active
layer and a silicon nitride layer formed on a side of the silicon oxide layer distal to the active layer, and

wherein a groove is formed on a surface of the source contact region contacting the source, and a groove is formed on a surface
of the drain contact region contacting the drain.

US Pat. No. 9,799,287

SHIFT REGISTER UNIT AND DRIVING METHOD THEREOF, GATE DRIVING CIRCUIT AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A shift register unit, comprising:
a latch module having a first voltage terminal, a second voltage terminal, a first clock signal terminal, an input terminal
and an output terminal, the latch module being provided with a latch function; and

a latch output module having a first voltage terminal, a second clock signal terminal, a control terminal and a present-stage
signal output terminal, the first voltage terminal of the latch output module being connected with the first voltage terminal
of the latch module, the control terminal of the latch output module being connected with the output terminal of the latch
module;

wherein the latch module is configured for controlling switching on and off of the latch function and the latch output module
depending on a signal inputted via the input terminal of the latch module and a signal inputted via the first clock signal
terminal; and

wherein the latch output module is configured for outputting a signal inputted via the second clock signal terminal to the
present-stage signal output terminal when the latch output module is switched on such that a signal outputted via the present-stage
signal output terminal follows the signal inputted via the second clock signal terminal, and for isolating the signal inputted
via the second clock signal terminal when the latch output module is switched off.

US Pat. No. 9,519,372

GATE DRIVING CIRCUIT FOR TIME DIVISION DRIVING, METHOD THEREOF AND DISPLAY APPARATUS HAVING THE SAME

BOE TECHNOLOGY GROUP CO.,...

1. A gate driving circuit comprising multiple shift register units connected in series, wherein it further comprises a shift
delay module and a repeat output module, and the shift delay module is connected in series between the jth stage of shift register unit and the (j+1)th stage of shift register unit which are adjacent to each other wherein j is a positive integer;
the shift delay module is connected to the output terminal of the jth stage of shift register unit and the input terminal of the (j+1)th stage of shift register unit, and also connected to the repeat output module;

the repeat output module is connected to the output terminal of the (j?n+1)th stage of shift register unit and a clock control terminal, wherein n is a positive integer and n is equal to or less than
j; and

after the jth stage of shift register unit outputs a gate scan signal, a clock signal is input from the clock control terminal to turn on
the repeat output module after a preset touch time ends, such that the shift delay module outputs a repeat scan signal to
the output terminal of the (j?n+1)th stage of shift register unit through the repeat output module, and each of the shift register units from the (j?n+1)th stage to the jth stage re-outputs a scan signal to a gate line in sequence.

US Pat. No. 9,519,377

GATE DRIVING CIRCUIT, ARRAY SUBSTRATE, DISPLAY DEVICE AND DRIVING METHOD

BOE TECHNOLOGY GROUP CO.,...

1. A gate driving circuit, comprising a plurality of shift register units connected in cascade, wherein, the gate driving
circuit further comprises:
at least two delay shift modules, each delay shift module being located between adjacent shift register units, and at least
one cascaded shift register unit being further provided between the delay shift modules; and

a switch control module respectively connected with the delay shift modules, the switch control module being used for controlling
different delay shift modules to be connected between the adjacent shift register units between adjacent frames, and enabling
transmission of a gate line drive signal to skip other delay shift modules not connected therein within each frame;

the delay shift module being used for suspending a clock signal connected with the delay shift module for a predetermined
time when connected between the adjacent shift register units, storing the gate line drive signal from a shift register unit
at an adjacent previous stage within the predetermined time for which the clock signal is suspended, and transmitting the
gate line drive signal to a shift register unit at an adjacent next stage after the clock signal is restored.

US Pat. No. 9,495,908

PIXEL CIRCUIT, ORGANIC ELECTROLUMINESCENT DISPLAY PANEL AND DISPLAY DEVICE

BOE Technology Group Co.,...

1. A pixel circuit, comprising: a drive sub-module, a data write sub-module, a touch detection sub-module having a photosensitive
device, and a light-emitting control sub-module having a luminous device, wherein,
a first terminal of the drive sub-module is connected to a first terminal of the data write sub-module and a first terminal
of the touch detection sub-module, respectively, a second terminal of the drive sub-module is connected to a second terminal
of the data write sub-module, a second terminal of the touch detection sub-module and a first reference signal terminal, respectively,
a third terminal of the drive sub-module is connected to a third terminal of the data write sub-module, a third terminal of
the touch detection sub-module and a first terminal of the light-emitting control sub-module, respectively;

a fourth terminal of the data write sub-module is connected to a reset signal terminal, a fifth terminal of the data write
sub-module is connected to a scan signal terminal, a sixth terminal of the data write sub-module is connected to a data signal
terminal; under the control of the reset signal terminal, the scan signal terminal and the data signal terminal, a data signal
is transmitted to the first terminal of the drive sub-module by the data write sub-module;

a fourth terminal of the touch detection sub-module is connected to a touch control signal terminal, a fifth terminal of the
touch detection sub-module is connected to a touch signal read terminal; under the control of the touch control signal terminal,
the touch detection sub-module controls output of a touch detection signal from the drive sub-module to the touch signal read
terminal, the touch detection signal being decreased as the light intensity irradiated onto the photosensitive device is increased;

a second terminal of the light-emitting control sub-module is connected to a second reference signal terminal, a third terminal
of the light-emitting control sub-module is connected to a light-emitting control signal terminal; under the control of the
light-emitting control signal terminal, the light-emitting control sub-module controls the drive sub-module to drive the luminous
device to give off light,

wherein, the data write sub-module comprises a first switch transistor, a second switch transistor, a first capacitor and
a second capacitor,

wherein, a gate electrode of the first switch transistor is connected to the reset signal terminal, a source electrode of
the first switch transistor is connected to the third terminal of the drive sub-module, and a drain electrode of the first
switch transistor is connected to the first terminal of the drive sub-module, a first end of the first capacitor and a first
end of the second capacitor, respectively;

a gate electrode of the second switch transistor is connected to the scan signal terminal, a source electrode of the second
switch transistor is connected to the data signal terminal, and a drain electrode of the second switch transistor is connected
to a second end of the first capacitor;

a second end of the second capacitor is connected to the first reference signal terminal, the second terminal of the drive
sub-module and the second terminal of the touch detection sub-module, respectively.

US Pat. No. 9,489,893

AMOLED PIXEL DRIVING CIRCUIT AND DRIVING METHOD THEREOF, AND ARRAY SUBSTRATE

BOE TECHNOLOGY GROUP CO.,...

1. An AMOLED pixel driving circuit comprising a driving thin film transistor, a storage capacitor, and an organic light emitting
diode, wherein it further comprises:
a coupling capacitor connected to a first terminal of the storage capacitor;
a gate initial voltage writing module configured to write an initial voltage signal into a gate of the driving thin film transistor,
the first terminal of the storage capacitor, and a second terminal of the coupling capacitor;

a data voltage writing module configured to write a data voltage signal into a source of the driving thin film transistor;
an initializing module configured to initialize a voltage at the source of the driving thin film transistor;
a light emitting control module configured to control one terminal of the organic light emitting diode to be connected to
a drain of the driving thin film transistor; and

a saturation discharging module connected between a first terminal of the coupling capacitor and the drain of the driving
thin film transistor.

US Pat. No. 9,477,869

MUTUAL-CAPACITANCE PALM PRINT IDENTIFICATION METHOD, MUTUAL-CAPACITANCE PALM PRINT IDENTIFICATION DEVICE AND MUTUAL-CAPACITANCE PALM PRINT IDENTIFICATION TOUCH PANEL

BOE TECHNOLOGY GROUP CO.,...

1. A mutual-capacitance palm print identification method, which includes:
forming palm template information by using a touch sensor of a mutual-capacitance touch panel to acquire capacitive sensing
data obtained from a palm pressing by a user;

forming current user's palm information by using the touch sensor of the mutual-capacitance touch panel to acquire capacitive
sensing data obtained from a palm pressing by the current user; and

comparing the current user's palm information with the palm template information and outputting the result of the comparison,
wherein, the comparing the current user's palm information with the palm template information and outputting the result of
the comparison includes:

performing a data processing on the current user's palm information, and performing a feature information point detection,
a large area information point detection, a line information detection, a non-reporting detection and a relative position
detection successively, and performing an analysis on an error detected by each of the detections, wherein

the feature information point detection is used for detecting unique point features of the palm print;
the large area information point detection is used for detecting the large area geometric feature of the root of the thumb
of the palm;

the line information detection is used for detecting the line feature for each of the main lines;
the non-reporting detection is used for detecting the information about the non-pressing positions of the palm; and
the relative position detection is used for detecting the relative positions among the detected results obtained from the
feature information point detection, the large area information point detection, the line information detection and the non-reporting
detection.

US Pat. No. 9,466,242

PIXEL CIRCUIT FOR ORGANIC LIGHT EMITTING DIODE, DRIVING METHOD FOR PIXEL CIRCUIT AND ACTIVE MATRIX ORGANIC LIGHT EMITTING DIODE DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A pixel circuit comprising an electroluminescent device, a driving transistor, a first switching unit, a compensating unit,
an insulating unit, a storage capacitor, and a touch control circuit;
the first switching unit is configured to control writing of a data voltage on a data line, a first terminal of the first
switching unit is connected with a first terminal of the storage capacitor, and a second terminal thereof is connected with
the data line;

a second terminal of the storage capacitor is connected with a gate of the driving transistor and a first terminal of the
compensating unit;

the compensating unit is configured to pre-store a threshold voltage of the driving transistor into the storage capacitor,
and a second terminal of the compensating unit is connected with a drain of the driving transistor;

a source of the driving transistor is connected with a power supply terminal, and the drain thereof is connected with a first
terminal of the insulation unit;

the insulating unit is configured to insulate an electric connection between the driving transistor and the electroluminescent
device, and a second terminal of the insulating unit is connected with a first terminal of the electroluminescent device;
and

a second terminal of the electroluminescent device is connected with a ground terminal;
the touch control circuit comprises a charging transistor, a coupling capacitor, a sensing electrode, an amplifying transistor,
a third switching transistor, a second scan signal terminal and a sensing line;

a gate of the charging transistor is connected with a third control signal terminal, a source thereof is connected with the
second terminal of the storage capacitor, and a drain thereof is connected with a first terminal of the coupling capacitor,
the sensing electrode and a gate of the amplifying transistor;

a second terminal of the coupling capacitor is connected with a first control signal terminal;
a source of the amplifying transistor is connected with the power supply terminal, and a drain thereof is connected with a
source of the third switching transistor; and

a gate of the third switching transistor is connected with the second scan signal terminal, and a drain thereof is connected
with the sensing line.

US Pat. No. 9,367,164

PIXEL CIRCUIT INTEGRATING THRESHOLD VOLTAGE COMPENSATION WITH TOUCH DETECTION, DRIVING METHOD THEREOF, AND ORGANIC LIGHT-EMITTING DISPLAY PANEL

BOE TECHNOLOGY GROUP CO.,...

1. A pixel circuit comprising a driving transistor, a driving control circuit and a light-emitting circuit, wherein
the driving transistor is connected with the driving control circuit and the light-emitting circuit, respectively;
the driving control circuit is connected with an input terminal for a first level signal, an input terminal for a second level
signal, an input terminal for a first timing control signal, an input terminal for a second timing control signal, an input
terminal for a third timing control signal, an input terminal for a second timing control signal of a previous stage of a
pixel circuit, an input terminal for a second timing control signal of a next stage of a pixel circuit, the driving transistor
and the light-emitting circuit, respectively, and is configured to compensate for a threshold voltage of the driving transistor
and control the driving transistor to drive the light-emitting circuit to emit light under control of timing control signals
as inputted; and

the light-emitting circuit is connected with the input terminal for the third timing control signal, the input terminal for
the second level signal, the driving transistor and the driving control circuit, respectively, and is configured to emit light
as driven by the driving transistor, under the control of the inputted timing control signal;

wherein the pixel circuit further comprises a touch sensing circuit, wherein the touch sensing circuit is connected with the
input terminal for the first level signal, the input terminal for the second timing control signal of the previous stage of
the pixel circuit and a node A, and is configured to detect a touch signal on a touch screen under a control of the second
timing control signal of the previous stage of the pixel circuit;

wherein the driving control circuit comprises a fifth transistor, wherein a drain of the fifth transistor is connected with
a data line, and a gate of the fifth transistor is connected with the input terminal for the second timing control signal,
a source of the fifth transistor is connected to the source of the driving transistor;

the fifth transistors is turned on during a touch detecting phase so as to transmit a voltage variation at the node A due
to a touch on a touch screen to the data line, and is turned on during a compensating phase to write a data voltage to the
source of the driving transistor.

US Pat. No. 9,330,600

ACTIVE MATRIX ORGANIC LIGHT-EMITTING DIODE PIXEL CIRCUIT HAVING A TOUCH CONTROL MODULE AND METHOD FOR DRIVING THE SAME

CHENGDU BOE OPTOELECTRONI...

1. An active matrix organic light-emitting diode (AMOLED) pixel circuit, characterized by comprising a light-emitting module,
a touch control module, a control module, and a driving and amplifying module; wherein
the light-emitting module is connected to the control module and a first voltage terminal, and is used for emitting light
for display under the control of the control module;

the touch control module is connected to the control module and a second signal line, and is used for receiving a touch control
signal as input;

the control module comprises a third transistor having a gate connected to a third signal line, a first electrode connected
to the light-emitting module and the touch control module, and a second electrode connected to the data line; and a fourth
transistor having a gate connected to the second signal line, a first electrode connected to the driving and amplifying module,
and a second electrode connected to the data line, and the control module is used for controlling the light-emitting module
and the touch control module according to signals input from the signal lines; and

the driving and amplifying module is connected to the light-emitting module, the touch control module, the control module
and a second voltage terminal, and is used for driving the light-emitting module or amplifying the touch control signal received
by the touch control module, the driving and amplifying module comprises a storage capacitor, one terminal of the storage
capacitor is connected to the first electrode of the third transistor and one terminal of the touch control module, and the
other terminal of the storage capacitor is connected to the second voltage terminal.

US Pat. No. 10,137,837

REARVIEW MIRROR

BOE TECHNOLOGY GROUP CO.,...

1. A rearview mirror, comprising:a first substrate,
a second substrate cell-assembled to the first substrate,
a liquid crystal material filled between the first substrate and the second substrate, and
a control circuit,
wherein a plurality of strip electrodes are disposed on a side of the first substrate that faces to the second substrate, an interval is formed between two adjacent strip electrodes, and a planar electrode capable of at least partially reflecting light is disposed on a side of the second substrate, which side faces to the first substrate; the rearview mirror is configured to have a normal operation mode, in which the control circuit is configured to provide the plurality of strip electrodes with a same electric signal concurrently.

US Pat. No. 9,905,179

SHIFT REGISTER, DRIVING METHOD, GATE DRIVING CIRCUIT AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A shift register comprising an input terminal, a reset terminal, a trigger terminal and an output terminal, further comprising:
an input module connected to the input terminal and the reset terminal and with an output terminal connected to a first input
terminal of an flip-flop output module, and configured to deliver a signal received from the input terminal or a signal received
from the reset terminal to the first input terminal of the flip-flop output module under the control of an external signal;

a trigger module connected to the input terminal, the reset terminal and the trigger terminal with an output terminal connected
to a second input terminal of the flip-flop output module, and configured to deliver a signal received from the trigger terminal
to the second input terminal of the flip-flop output module when a signal is received from the input terminal or from the
reset terminal; and

the flip-flop output module connected to the input module, the trigger module and the output terminal and configured to flip
a signal outputted from the output terminal between an output state and a reset state according to the signal from the input
module under the trigger of the signal from the trigger module.

US Pat. No. 9,805,658

SHIFT REGISTER, GATE DRIVING CIRCUIT AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A shift register, comprising a set/reset unit, a pull down control unit, a pull down unit and an output unit,
wherein the set/reset unit sets or resets a pull up node in the output unit in response to a set signal or a reset signal,
when the pull up node is set to be in a first level state, the output unit outputs an output signal in response to a first
control signal through an output terminal of the shift register, and

wherein the pull down control unit sets a pull down node in the pull down unit in response to a second control signal, when
the pull down node is set to be in the first level state, the pull up node is pulled down to be in a second level state different
from the first level state,

the pull down control unit comprises a transistor and a capacitor, and the second control signal is applied to a gate of the
transistor through the capacitor,

when the pull up node is set to be in the first level state, the gate of the transistor of the pull down control unit and
the pull down node of the pull down unit are in the second level state.

US Pat. No. 9,570,472

ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, AND LIQUID CRYSTAL DISPLAY

BOE TECHNOLOGY GROUP CO.,...

1. An array substrate, comprising:
a base substrate, comprising a pixel region and a peripheral region;
data lines and gate lines formed to transversely and longitudinally cross each other on the base substrate to form a plurality
of pixel units in the pixel region, wherein each of the pixel units comprises a switching element, a pixel electrode and a
common electrode above the pixel electrode, and the common electrode has slits in each pixel unit and is a plate-shaped electrode
in the pixel region, and when powered on, the common electrode forms a horizontal electric field together with the pixel electrode
of each pixel unit; and

a plurality of common electrode lines formed in the pixel region and connected with the common electrode,
wherein the switching element comprises a gate electrode, a active layer, a source electrode and a drain electrode,
each of the plurality of common electrode lines has a double-layer structure comprising a lower layer and an upper layer,
the lower layer is provided as a same layer as the active layer and is formed as a same material as the active layer, and
the upper layer is provided as a same layer as the source and drain electrodes and is formed as a same material as the source
and drain electrodes.

US Pat. No. 9,535,196

COLOR FILTER SUBSTRATE, METHOD FOR FABRICATING THE SAME, DISPLAY PANEL AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A color filter substrate, comprising a color filter layer which comprises color filter units with at least two colors and
distributed in the form of a matrix, and a black matrix being arranged between two adjacent color filter units, wherein
the color filter substrate further comprises: light-shielding bulges each of which is located at a part of the area of the
black matrix and faces towards an incident light direction and projects from the surface of the color filter layer, for preventing
the occurrence of the color mixture among the color filter units with different colors;

wherein the longitudinal length of the light-shielding bulge is greater than or equal to the maximum longitudinal length of
the color filter layer;

wherein the light-shielding bulge is an integral structure extending along the longitudinal length of the color filter layer.

US Pat. No. 9,396,813

SHIFT REGISTER CELL, SHIFT REGISTER, GATE DRIVER AND DISPLAY PANEL

BOE TECHNOLOGY GROUP CO.,...

1. A shift register cell comprising a first drive signal input terminal, a first drive signal output terminal, a first clock
signal input terminal, a first pull-up transistor, a first output pull-down transistor, a switch transistor, a reset transistor
and a bootstrap capacitor, wherein a drain of the switch transistor is connected with the first drive signal input terminal,
a drain of the first output pull-down transistor is connected with the first drive signal output terminal, one terminal of
the bootstrap capacitor is connected with a gate of the first pull-up transistor, the other terminal of the bootstrap capacitor
is connected with the first drive signal output terminal, the gate of the first pull-up transistor is connected with a source
of the switch transistor, a drain of the first pull-up transistor is connected with the first clock signal input terminal,
a source of the first pull-up transistor is connected with the first drive signal output terminal, and a drain of the reset
transistor is connected with the source of the switch transistor, which is characterized in that:
the shift register cell further comprises a pull-down unit, wherein a first terminal of the pull-down unit is connected with
a gate of the switch transistor, a second terminal of the pull-down unit is connected with a gate of the reset transistor,
a third terminal of the pull-down unit is connected with a gate of the first output pull-down transistor, a source of the
reset transistor is connected with a second low level input terminal capable of outputting a second low level, and a source
of the first output pull-down transistor is connected with a third low level input terminal capable of outputting a third
low level, during an evaluation stage, the pull-down unit outputs a first low level to the gate of the first output pull-down
transistor, the gate of the switch transistor and the gate of the reset transistor, wherein difference between the first low
level and the second low level is less than threshold voltage of the reset transistor, and difference between the first low
level and the third low level is less than threshold voltage of the first output pull-down transistor.

US Pat. No. 9,385,144

ARRAY SUBSTRATE AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. An array substrate, comprising a base substrate, a plurality of scan lines and a plurality of data lines that are provided
on the base substrate and intersect with each other, and a plurality of sub-pixel regions arranged evenly, each of which comprises
one thin film transistor, wherein
sub-pixel regions in two adjacent rows are configured as one pixel row group, so that a plurality of pixel row groups are
arranged longitudinally, and two scan lines are provided in at least one of Position A and Position B, Position A being between
two rows of sub-pixel regions within each of the pixel row groups, Position B being between every two adjacent pixel row groups,
each of which is electrically connected to gate electrodes of thin film transistors within one of sub-pixel regions of the
two rows of sub-pixel regions that are adjacent to them, respectively, and these two scan lines overlap in partial and are
insulated from each other;

wherein each of the sub-pixel regions further includes a pixel electrode;
the two scan lines are a first scan line and a second scan line, respectively;
the first scan line and gate electrodes of thin film transistors corresponding to the first scan line are located in a same
layer;

the second scan line comprises at least one overlapping section and at least one non-overlapping section; the overlapping
section is a portion of the second scan line that overlaps the first scan line, and the overlapping section and a data line
or the pixel electrode are located in a same layer; the non-overlapping section is a portion of the second scan line that
does not overlap the first scan line, and is electrically connected to a gate electrode of a thin film transistor corresponding
to the second scan line, and the non-overlapping section and the gate electrode of the thin film transistor corresponding
to the second scan line are located in a same layer;

the overlapping section and the non-overlapping section of the second scan line are electrically connected so as to provide
a continuous scan line capable of transmitting signals.

US Pat. No. 10,331,252

TOUCH SCREEN, DISPLAY DEVICE AND METHOD OF DRIVING TOUCH SCREEN

BOE TECHNOLOGY GROUP CO.,...

1. A touch screen, comprising:an array substrate having a common electrode layer;
a display driving unit configured to provide a common electrode driving signal;
a touch driving unit configured to provide a touch electrode driving signal,
wherein the array substrate further comprises a first switching unit configured to switch so as to output the common electrode driving signal to the common electrode layer,
the touch screen further comprises a second switching unit configured to output the touch electrode driving signal provided by the touch driving unit to the common electrode layer, wherein the common electrode driving signal and the touch electrode driving signal are time-division output to the common electrode layer,
wherein the second switching unit comprises a plurality of second thin film transistors, a control terminal of each of the second thin film transistors receiving a touch electrode switching signal from the display driving unit, an input terminal of each of the second thin film transistors receiving a respective one of a plurality of touch electrode driving signals generated by the touch driving unit, and an output terminal of each of the second thin film transistors being connected to the common electrode layer.

US Pat. No. 9,905,149

DRIVING CIRCUIT, DRIVING METHOD, AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A driving circuit, comprising:
a gate driving unit for sequentially inputting a gate voltage to gates of pixel cells in each row on a display panel, the
display panel being divided into a plurality of regions along a gate scanning direction, each region including at least one
row of pixel cells controlled by a gate line;

a control unit for controlling the gate driving unit to input different gate voltages to gates in at least two different regions,
and to input the same gate voltage to gates in the same region; and

a data driving unit for, when gates in each row are turned on, inputting a data voltage to sources of pixel cells in the corresponding
row,

wherein the regions are divided according to a flicker degree or a grayscale luminance of pixel cells on the display panel
in a test scenario.

US Pat. No. 9,835,901

REFLECTIVE TYPE DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A reflective type display device comprising:
a polarizer;
a transparent first substrate;
a liquid crystal molecular layer;
a second substrate; and
a selective reflecting layer;
wherein the polarizer, the transparent first substrate, the liquid crystal molecular layer, and the second substrate are arranged
in sequence;

wherein the selective reflecting layer is located between the liquid crystal molecular layer and the second substrate;
wherein the selective reflecting layer reflects light with wavelength within a specific wavelength range;
wherein the selective reflecting layer comprises: a first portion, wherein the first portion reflects light with wavelength
within red wavelength range; a second portion, wherein the second portion reflects light with wavelength within green wavelength
range; and a third portion, wherein the third portion reflects light with wavelength within blue wavelength range; and

wherein the first portion of the selective reflecting layer, the second portion of the selective reflecting layer, and the
third portion of the selective reflecting layer transmit light with wavelength within a wavelength range not reflected; and
wherein the first portion of the selective reflecting layer, the second portion of the selective reflecting layer, and the
third portion of the selective reflecting layer are electrically conductive.

US Pat. No. 9,626,026

GRATING SUBSTRATE AND FABRICATION METHOD THEREOF, DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A fabrication method of a grating substrate, comprising:
forming an array of comb-shaped, opaque touch electrodes and a plurality of first conductive bridges on a base substrate,
wherein the array of touch electrodes comprises a plurality of first touch electrodes and a plurality of second touch electrodes
which are disconnected from each other, and the plurality of first touch electrodes in the array are connected to each other
by the first conductive bridges;

forming an insulating spacing layer on the base substrate on which the array of the touch electrodes and the plurality of
first conductive bridges are formed, the insulating spacing layer covering the first conductive bridges; and

forming second conductive bridges on the insulating spacing layer, the plurality of second touch electrodes in the array being
connected to each other by the second conductive bridges;

wherein the forming an array of comb-shaped, opaque touch electrodes and a plurality of first conductive bridges on a base
substrate comprises:

forming the array of comb-shaped, opaque touch electrodes on the base substrate at the same time of forming the first conductive
bridges, to connect the plurality of first touch electrodes in the array; and

wherein the first conductive bridges are made of the same material with the first touch electrodes and the second touch electrodes.

US Pat. No. 9,613,578

SHIFT REGISTER UNIT, GATE DRIVING CIRCUIT AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A shift register unit, comprising:
a latch module; and
at least two levels of output control modules connected with the latch module,
wherein:
input ends of the latch module are connected with a start signal and a clock signal respectively,
an output end of the latch module is connected with input ends of the at least two levels of output control modules respectively,
the latch module is configured to latch the start signal according to the clock signal inputted,
input ends of respective output control modules among the at least two levels of the output control modules are connected
with clock signals,

the respective output control modules are configured to output corresponding gate line driving signals sequentially according
to the clock signals latched,

all the clock signals and the clock signals latched are inputted sequentially to the latch module and each level of output
control modules in accordance with a timing sequence,

the latch module comprises a first tri-state gate, a second tri-state gate, and a first inverter,
an input end of the first tri-state gate is connected with the start signal,
a control end of the first tri-state gate is connected with the corresponding clock signal,
an output end of the first tri-state gate is connected with an output end of the second tri-state gate,
an input end of the second tri-state gate is connected with input ends of the at least two levels of output control modules,
a control end of the second tri-state gate is connected with the corresponding clock signal,
an input end of the first inverter is connected with the output end of the second tri-state gate,
an output end of the first inverter is connected with the input end of the second tri-state gate,
each of the at least two levels of output control modules includes a transmission gate and a buffer,
an input end of the transmission gate is connected with the corresponding clock signal,
a first control end of the transmission gate is connected with the output end of the second tri-state gate,
a second control end of the transmission gate is connected with the input end of the second tri-state gate,
an output end of the transmission gate is connected with an input end of the buffer, and
an output end of the buffer outputs the gate line driving signal.

US Pat. No. 9,589,504

OLED AC DRIVING CIRCUIT, DRIVING METHOD AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. An OLED AC driving circuit comprising a light-emitting control circuit, a charging circuit, a driving circuit, a first
storage circuit, a second storage circuit, a first light-emitting device, a second light-emitting device, a first voltage
control circuit and a second voltage control circuit, wherein
a first terminal of the light-emitting control circuit is connected to a first terminal of the driving circuit, a second terminal
of the light-emitting control circuit is connected to the second storage circuit and the first voltage control circuit, and
the light-emitting control circuit is configured to connect the first terminal of the driving circuit to the first voltage
control circuit so as to control the first light-emitting device or the second light-emitting device to emit light under the
control of a light-emitting control signal;

the charging circuit (T2, T3) is connected to the driving circuit, the first storage circuit, the second storage circuit, the first light-emitting device,
the second light-emitting device and the second voltage control circuit, and is configured to short the anode and the cathode
of the first light-emitting device (OLED1) and short the anode and the cathode of the second light-emitting device (OLED2) under the control of a scan signal, and to charge the first storage circuit (C1) or the second storage circuit (C2) under the control of the scan signal, a data signal, a first voltage control signal supplied from the first voltage control
circuit and a second voltage control signal supplied from the second voltage control circuit;

a second terminal of the driving circuit is connected to a second terminal of the first storage circuit (C1), the first light-emitting device and the second light-emitting device, and the driving circuit is configured to drive the
first light-emitting device or the second light-emitting device to emit light under the control of a signal at its control
terminal, the first voltage control signal supplied from the first voltage control circuit and the second voltage control
signal supplied from the second voltage control circuit;

a first terminal of the first storage circuit (C1) is connected to a control terminal of the driving circuit and a first terminal of the second storage circuit (C2), the second terminal of the first storage circuit (C1) is connected to the first light-emitting device, the second light-emitting device, the driving circuit and the charging
circuit, and is configured to store the data signal or turn on the driving circuit;

a second terminal of the second storage circuit (C2) is connected to the first voltage control circuit and the driving circuit, and is configured to store the data signal or
turn on the driving circuit;

the first light-emitting device (OLED1) has an anode connected to a second terminal of the first storage circuit (C1) and a cathode connected to the second voltage control circuit, and is configured to emit light under the control of the
first voltage control circuit, the second voltage control circuit, the charging circuit and the driving circuit;

the second light-emitting device (OLED2) has a cathode connected to the second terminal of the first storage circuit (C1) and an anode connected to the second voltage control circuit, and is configured to emit light under the control of the first
voltage control circuit, the second voltage control circuit, the charging circuit and the driving circuit;

the first voltage control circuit is connected to the second terminal of the light-emitting control circuit and the second
terminal of the second storage circuit (C2), and is configured to supply power to the second storage circuit (C2) and the first light-emitting device; and

the second voltage control circuit is connected to the charging circuit, the cathode of the first light-emitting device and
the anode of the second light-emitting device, and is configured to supply power to the first storage circuit (C1) and the second light-emitting device.

US Pat. No. 9,508,450

SHIFT REGISTER UNIT, SHIFT REGISTER AND DISPLAY APPARATUS

BOE Technology Group Co.,...

1. A shift register, comprising:
a driving transistor;
a first capacitor for storing an electrical signal from a previous stage;
an output pulling-up module, which is connected with a drain of the driving transistor and used for pulling-up the drain of
the driving transistor to a high level;

a drive output terminal connected with a source of the driving transistor;
a carry signal output terminal, which is connected with a gate of the driving transistor or the drive output terminal and
used for outputting an electrical signal to a next stage;

an output pulling-down module, which is connected with a source of the driving transistor and used for pulling-down the source
of the driving transistor to a second level

a first pulling-down module, which is connected with the gate of the driving transistor through a pulling-up node, connected
with the output pulling-down module through a pulling-down node, and used for pulling down the pulling-up node to the second
level or a first level, the pulling-up node being a connection node of the first pulling-down module and the gate of the driving
transistor, and the pulling-down node being a connection node of the first pulling-down module and the output pulling-down
module; and

an insulation pulling-up module, which is connected between the pulling-up node and the first capacitor and used for pulling-up
the pulling-up node to the high level.

US Pat. No. 9,496,293

PIXEL CIRCUIT AND METHOD FOR DRIVING THE SAME, DISPLAY PANEL AND DISPLAY APPARATUS

BOE Technology Group Co.,...

1. A pixel circuit comprising a charging sub-circuit, a capacitor, a first driving sub-circuit and a second driving sub-circuit
different from the first driving sub-circuit, wherein
a first terminal of the capacitor is connected to a first terminal of the first driving sub-circuit and a first terminal of
the second driving sub-circuit, and a second terminal of the capacitor is connected to the charging sub-circuit, wherein the
first terminal of the capacitor is different from the second terminal of the capacitor;

a second terminal of the first driving sub-circuit is connected to a first light emitting device, a second terminal of the
second driving sub-circuit is connected to a second light emitting device, and a driving current flowing from the first driving
sub-circuit to the first light emitting device is in an opposite direction to a driving current flowing from the second driving
sub-circuit to the second light emitting device, wherein the first terminal of the first driving sub-circuit is different
from the second terminal of the first driving sub-circuit, and the first terminal of the second driving sub-circuit is different
from the second terminal of the second driving sub-circuit; and

the charging sub-circuit is configured to charge the capacitor, and when the capacitor is discharged, the first driving sub-circuit
drives the first light emitting device to emit light or the second driving sub-circuit drives the second light emitting device
to emit light.

US Pat. No. 9,466,254

SHIFT REGISTER UNIT, GATE DRIVING CIRCUIT AND DISPLAY APPARATUS

BOE TECHNOLOGY GROUP CO.,...

1. A shift register unit comprising a bidirectional scan pre-charging module, a pulling-up module, a pulling-down control
module, a reset module and a pulling-down module;
wherein the bidirectional scan pre-charging module is connected to a first signal input terminal, a first voltage terminal,
a second signal input terminal, a second voltage terminal and a pulling-up control node, and is configured to control a potential
at the pulling-up control node according to signals inputted from the first signal input terminal and the second signal input
terminal, wherein the pulling-up control node is a connection point where the bidirectional scan pre-charging module and the
pulling-up module are connected;

the pulling-up module is connected to the pulling-up control node, a first clock signal terminal and a signal output terminal,
and is configured to allow the signal output terminal to output a signal at the first clock signal terminal under the control
of the potential at the pulling-up control node;

the pulling-down control module is connected to a second clock signal terminal, a third clock signal terminal, a fourth clock
signal terminal and a pulling-down control node, and is configured to control a potential at the pulling-down control node
under the control of signals inputted from the second clock signal terminal, the third clock signal terminal, and the fourth
clock signal terminal, wherein the pulling-down control node is a connection point where the pulling-down control module and
the pulling-down module are connected;

the reset module is connected to a third signal input terminal and the pulling-down control node, and is configured to control
the potential at the pulling-down control node according to a signal inputted from the third signal input terminal, and to
reset the potential at the pulling-up control node and an output signal of the signal output terminal under the control of
the potential at the pulling-down control node prior to an operation of the shift register unit; and

the pulling-down module is connected to the pulling-down control node, the pulling-up control node, a third voltage terminal
and the signal output terminal, and is configured to pull down the potential at the pulling-up control node and the output
signal of the signal output terminal to a level at the third voltage terminal under the control of the potential at the pulling-down
control node.

US Pat. No. 9,437,324

SHIFT REGISTER UNIT, DRIVING METHOD THEREOF, SHIFT REGISTER AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A shift register unit comprising a first capacitor, a pull-up module, a precharge module and a pull-down module, a first
end of the first capacitor being coupled to the pull-up module at a pull-up node, the shift register unit further comprising:
a switch-off module coupled to the pull-up node and to a first node located between the precharge module and the pull-down
module, configured to disconnect electrical connections (i) between the pull-up node and the precharge module and (ii) between
the pull-up node and the pull-down module at a pull-up stage,

wherein the switch-off module comprises:
a first TFT, a source electrode of the first TFT is coupled to the first node, a gate electrode of the first TFT is coupled
to a second clock signal input, and a drain electrode of the first TFT is coupled to the pull-up node; and

a switch-off controlling unit configured to control a source voltage of the first TFT at the pull-up stage so as to enable
the first TFT to be in a fully off state, thereby to disconnect the electrical connections (i) between the pull-up node and
the precharge module and (ii) between the pull-up node and the pull-down module.

US Pat. No. 10,565,934

DRIVE COMPENSATION CIRCUIT, DISPLAY PANEL AND DRIVING METHOD THEREOF

BOE TECHNOLOGY GROUP CO.,...

1. A drive compensation circuit, comprising a first power supply terminal, a second power supply terminal, a drive circuit, a voltage detection circuit and an organic light emitting diode (OLED),wherein the drive circuit comprises an input terminal and an output terminal, the OLED comprises an anode and a cathode, the input terminal of the drive circuit is electrically connected to the first power supply terminal,
the anode of the OLED is electrically connected to the output terminal of the drive circuit, the cathode of the OLED is electrically connected to the second power supply terminal,
an input terminal of the voltage detection circuit is electrically connected to a first node between the anode of the OLED and the output terminal of the drive circuit, and the voltage detection circuit is configured to obtain a voltage value of the anode of the OLED,
the first power supply terminal is configured to enable a first output voltage of the first power supply terminal to be larger than a second output voltage of the second power supply terminal, and the second power supply terminal is configured to allow the second output voltage of the second power supply terminal to be adjusted according to the voltage value of the anode of the OLED.

US Pat. No. 10,403,202

DRIVING CIRCUIT AND DRIVING METHOD THEREOF, AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A driving circuit for driving a light emitting element, the driving circuit comprising a signal line, a control line, a driving unit, a power supply unit, a compensation unit, a light emitting control unit, a data writing unit, a storage unit, and an aging alleviation unit, whereinthe control line comprises a scan control line, a compensation control line, and a light emitting control line;
the power supply unit is configured to provide a power supply signal for the driving circuit,
the driving unit is configured to drive the light emitting element,
the signal line is configured to provide a data signal for the data writing unit,
the control line is configured to provide control signals for the compensation unit, the light emitting control unit, the data writing unit, and the aging alleviation unit,
the light emitting control unit is connected to the light emitting control line, and is configured to control the light emitting element to emit a light,
the data writing unit is connected to the scan control line, and is configured to write the data signal into the storage unit,
the storage unit is configured to store a voltage of the data signal written by the data writing unit and includes a capacitor,
the compensation unit is connected to the compensation control line, and is configured to perform a threshold voltage compensation for the driving unit according to the control signal, and
the aging alleviation unit is configured to short-circuit a cathode and an anode of the light emitting element according to the control signal,
wherein the light emitting control unit comprises a first switching tube and a fourth switching tube, a gate of the first switching tube is connected to the light emitting control line, a first electrode of the first switching tube is connected to a second electrode of the capacitor and a second electrode of a driving tube, and a second electrode of the first switching tube is connected to the anode of the light emitting element, and
a gate of the fourth switching tube is connected to the light emitting control line, a first electrode of the fourth switching tube is connected to a gate of the driving tube and a second electrode of a third switching tube, and a second electrode of the fourth switching tube is connected to a first electrode of the capacitor.

US Pat. No. 10,095,910

FINGERPRINT IDENTIFICATION CIRCUIT, TOUCH APPARATUS AND FINGERPRINT IDENTIFICATION METHOD

BOE TECHNOLOGY GROUP CO.,...

1. A fingerprint identification circuit, comprising a plurality of reading sub-circuits, and a plurality of fingerprint identification sub-circuits arranged in rows and columns, wherein each column of fingerprint identification sub-circuits are connected with one of the reading sub-circuits, each of the fingerprint identification sub-circuits comprises a writing sub-circuit, a sensing sub-circuit and a output sub-circuit connected in sequence, a control terminal of the writing sub-circuit is connected with a scan signal input terminal and is turned on upon an active signal is input to the scan signal input terminal so as to write a detection signal to the sensing sub-circuit; the sensing sub-circuit senses a fingerprint and transmits an obtained sensing signal to the output sub-circuit, the output sub-circuit is turned on and outputs the sensing signal upon the writing sub-circuit is turned off, and is turned off upon the writing sub-circuit is turned on, and wherein each of the fingerprint identification sub-circuits further comprising:a converting and amplifying sub-circuit, which is provided between the sensing sub-circuit and the output sub-circuit, for converting the sensing signal output from the sensing sub-circuit into a current signal, amplifying the current signal by a preset multiple and then outputting it to the output sub-circuit, wherein
the reading sub-circuit is connected with an output terminal of the output sub-circuit, and is configured to read the sensing signal output from the output sub-circuit and convert the current signal into a voltage signal to output.

US Pat. No. 9,740,344

TOUCH SCREEN AND MANUFACTURING METHOD THEREOF, DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A touch screen comprising:
a plurality of first transparent electrodes and a plurality of second transparent electrodes disposed on a substrate;
first conductive layers disposed on two sides of the first transparent electrodes and connected in parallel with the first
transparent electrodes, and/or second conductive layers disposed on two sides of the second transparent electrodes and connected
in parallel with the second transparent electrodes;

wherein one set of the first transparent electrodes and the second transparent electrodes are touch driving electrodes, the
other set are touch sensing electrodes, and the first conductive layers and the second conductive layers are metal layers
or alloy layers; and

wherein the first conductive layers comprise a plurality of first electrodes, the first transparent electrodes are slit-like,
and projections of slits of the first transparent electrodes overlap with projections of slits between the first electrodes
of the first conductive layers on the substrate.

US Pat. No. 9,405,143

LIQUID CRYSTAL PANEL, LIQUID CRYSTAL DISPLAY AND METHOD FOR MANUFACTURING THE SAME

BOE TECHNOLOGY GROUP CO.,...

1. A liquid crystal panel, comprising:
a color filter substrate;
an array substrate;
a piezoelectric material spacer disposed between the color filter substrate and the array substrate;
one signal line disposed between the color filter substrate and the piezoelectric material spacer; and
another signal line disposed between the piezoelectric material spacer and the array substrate,
wherein the two signal lines respectively contact a color filter substrate side surface and an array substrate side surface
of the piezoelectric material spacer, a projection of the signal line at the color filter substrate side onto the array substrate
side surface of the piezoelectric material spacer intersects with the signal line at the array substrate side, and the two
signal lines are insulated from each other; and the piezoelectric material spacer is configured for producing an electric
signal under an external pressure, and the two signal lines transmit the electric signal.

US Pat. No. 9,348,183

THIN FILM TRANSISTOR LIQUID CRYSTAL DISPLAY PANEL AND COLOR FILTER SUBSTRATE

BOE TECHNOLOGY GROUP CO.,...

1. A thin film transistor liquid crystal display (TFT-LCD) panel, comprising:
a color filter substrate and a thin film transistor array substrate facing each other, and a liquid crystal layer interposed
therebetween;

an electrostatic discharge circuit; and
a common electrode and a pixel electrode with an insulating layer therebetween,
wherein the color filter substrate comprises:
a base substrate and a color filter film which has a first surface attached to the base substrate;
a conductive layer attached to a second surface of the color filter film and electrically connected to the electrostatic discharge
circuit to directly release charges on the conductive layer,

wherein the common electrode and the pixel electrode of the panel are only provided on the array substrate,
wherein the electrostatic discharge circuit comprises: a first transistor having a first gate, a first drain, and a first
source; the first gate being configured to receive a switching signal which controls the switching of the first transistor;
one of the first drain and the first source being electrically connected to the conductive layer, and the other one being
grounded,

wherein the switching signal is a periodic pulse signal, a gate signal for the TFT-LCD panel, or a master switching signal
for controlling the TFT-LCD panel,

wherein the conductive layer is only electrically connected to the electrostatic discharge circuit.

US Pat. No. 9,119,259

AMOLED PIXEL UNIT DRIVING CIRCUIT AND METHOD, AMOLED PIXEL UNIT AND DISPLAY APPARATUS

BOE TECHNOLOGY GROUP CO.,...

1. An AMOLED pixel unit driving circuit for driving an OLED, the AMOLED pixel unit driving circuit including:
a switching unit with a first input terminal connected to a current source for supplying a charging current and a second input
terminal connected to the OLED;

a storage capacitor with a first terminal connected to an output terminal of the switching unit and a second terminal connected
to a low level;

a driving TFT(Thin Film Transistor) with a gate electrode connected to the first terminal of the storage capacitor and a source
electrode connected to the low level; and

a current dividing TFT with a gate electrode connected to the gate electrode of the driving TFT and a source electrode connected
to the low level,

wherein the switching unit, during a first time period, switches on paths from the first input terminal to a drain electrode
of the driving TFT and a drain electrode of the current dividing TFT so as to charge the storage capacitor by means of the
current source, and switches off paths from the second input terminal to the drain electrode of the driving TFT and the drain
electrode of the current dividing TFT; and

the switching unit, during a second time period, switches on the path from the second input terminal to the drain electrode
of the driving TFT, switches off the path from the second input terminal to the drain electrode of the current dividing TFT,
and switches off the paths from the first input terminal to the drain electrode of the driving TFT and the drain electrode
of the current dividing TFT.

US Pat. No. 10,043,445

PIXEL DRIVING CIRCUIT AND DRIVING METHOD THEREOF AND DISPLAY APPARATUS

BOE TECHNOLOGY GROUP CO.,...

1. A pixel driving circuit comprising a storage module, a light emitting module, a driving transistor and a voltage-adjusting module, whereinthe storage module is connected to a first control signal terminal, a data current input terminal, the driving transistor and the voltage-adjusting module respectively, and is configured to store a gate-source voltage of the driving transistor when data current flows through the driving transistor under the control of a first control signal, and comprises at least a storage capacitor and a matching transistor connected to each other in series, and wherein the matching transistor and the driving transistor have the same threshold voltage;
the light-emitting module is connected to a second control signal terminal, a power voltage terminal and the driving transistor respectively, and is configured to emit light according to the light emitting current in the driving transistor under the control of a second control signal;
the voltage-adjusting module is connected to the second control signal terminal and the storage module respectively, and is configured to decrease the voltage stored by the storage module under the control of the second control signal to control to reduce the light emitting current in the driving transistor by a preset scale with respect to the data current.

US Pat. No. 9,728,413

METHOD FOR PREPARING FILM PATTERNS

BOE Technology Group Co.,...

1. A method for preparing film patterns, comprising:
forming a first film pattern with an erasable formulation on a substrate;
preparing a second film on the substrate provided with the first film pattern; and
removing the first film pattern on the substrate and an area of the second film covering the first film pattern and obtaining
a second film pattern complementary to the first film pattern,

wherein the erasable formulation comprises a composite solution of a dispersant, an erasable agent and a solution; the dispersant
is polymeric polycarboxylic acid salt or fatty acyl diethanol amine; the erasable agent is a long-chain fatty acid ester;
and the solution is polyvinyl alcohol (PVA) or lower alcohol.

US Pat. No. 9,728,133

PIXEL UNIT DRIVING CIRCUIT, PIXEL UNIT DRIVING METHOD, PIXEL UNIT AND DISPLAY APPARATUS

BOE TECHNOLOGY GROUP CO.,...

1. A pixel unit driving circuit for driving a lighting element, the pixel unit driving circuit comprising:
a scanning signal line configured to provide scanning signal;
a power supply line configured to supply voltage to the pixel unit driving circuit;
a data line configured to provide data signals;
a driving unit configured to drive the lighting element, the driving unit comprising a driving transistor;
a charging unit configured to provide data signal voltage for the driving unit during a charging stage of the pixel unit driving
circuit;

a storage unit configured to be charged during the charging stage of the pixel unit driving circuit, and provide a control
voltage to the driving unit during a driving stage of the pixel unit driving circuit;

a lighting control unit configured such that a driving current provided from the driving unit to the lighting element during
the driving stage of the pixel unit driving circuit is independent on a threshold voltage of the driving unit; and

a driving control unit connected to the lighting control unit, the storage unit and the driving unit and configured to control
the supply of the control voltage of the driving unit,

wherein the driving control unit comprises a fourth switching transistor and the storage unit comprises a capacitor; a gate
of the driving transistor is connected to a first electrode of the fourth switching transistor; a first electrode of the driving
transistor is connected to a first supply voltage provided by the power supply line; a second electrode of the driving transistor
is connected to a first electrode of the capacitor and a second electrode of the fourth switching transistor; and a gate of
the fourth switching transistor is connected to a first scanning signal provided by the scanning signal line, so that when
the fourth switching transistor is turned on, the voltage at the second electrode of the driving transistor is pulled up to
be close to the voltage at the gate of the driving transistor to cause the driving transistor to reach the saturation state;
and

wherein the lighting control unit comprises a first switching transistor and a second switching transistor, and the charging
unit comprises a fifth switching transistor; a gate of the first switching transistor is connected to a second scanning signal
provided by the scanning signal line; a first electrode of the first switching transistor is connected to a second supply
voltage supplied by the power supply line; a second electrode of the first switching transistor is connected to a first electrode
of the second switching transistor, the gate of the driving transistor and the first electrode of the fourth switching transistor;
a gate of the second switching transistor is connected to a third scanning signal provided by the scanning signal line; a
second electrode of the second switching transistor is connected to a second electrode of the capacitor; a gate of the fifth
switching transistor is connected to the second scanning signal; a first electrode of the fifth switching transistor is connected
to data signal provided by the data line; and a second electrode of the fifth switching transistor is connected to the second
electrode of the capacitor and the second electrode of the second switching transistor.

US Pat. No. 9,721,974

ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME, AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. An array substrate, comprising: a substrate, and a first region and a second region that are provided on the substrate
and adjacent to each other, wherein a difference in level between the first region and the second region exceeds a threshold,
a difference-in-level compensation pattern is provided on the substrate, and the difference-in-level compensation pattern
overlaps with both the first region and the second region in a direction perpendicular to the substrate, and the difference-in-level
compensation pattern does not exceed the first region and the second region, and the difference-in-level compensation pattern
is formed by an active layer.

US Pat. No. 9,594,280

THIN FILM TRANSISTOR ARRAY SUBSTRATE, DISPLAY DEVICE AND METHOD

CHENGDU BOE OPTOELECTRONI...

1. A thin film transistor array substrate comprising a base substrate and a thin film transistor, a second insulation layer,
a first electrode and a second electrode formed on the base substrate,
wherein the first electrode and the second electrode are used to form an electric field, and the second insulation layer is
interposed between the first electrode and the second electrode;

the second electrode is a comb-like electrode, and located at a side of the second insulating layer away from the base substrate,
the comb-like electrode includes a plurality of slit portions and stripe electrode portions arranged alternately;

the base substrate further includes a protrusion structure located at a side of the first electrode close to the base substrate,
a position of the protrusion structure corresponds to the slit portions of the comb-like electrode,

wherein a protruding shape of the protrusion structure is a prism shape, an extending direction of the prism shape is parallel
with an extending direction of the slits, and a maximum width of a cross section of the protrusion structure along a direction
parallel with the surface of the base substrate is smaller than a width of the slit portions of the comb-like electrode.

US Pat. No. 9,411,183

LIQUID CRYSTAL DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME

BOE TECHNOLOGY GROUP CO.,...

1. A liquid crystal display device comprising:
a color filter substrate including a first transparent substrate; and
an array substrate including a second transparent substrate,
wherein the first transparent substrate has a first transparent magnetic film layer formed thereon, the second transparent
substrate has a second transparent magnetic film layer formed thereon, and the first transparent magnetic film layer and the
second transparent magnetic film layer have the same magnetism to produce uniform magnetic fields of same polarities that
repulse each other to form a cell gap between the color filter substrate and the array substrate,

wherein the color filter substrate further comprises:
a black matrix and color filters which are formed on the first transparent substrate; and
a common electrode formed on the black matrix and the color filters; and
wherein the first transparent magnetic film layer is formed between the common electrode and an alignment film.

US Pat. No. 9,400,595

UNLOCKING METHOD AND DEVICE FOR TOUCH SCREEN TERMINAL AND TOUCH SCREEN TERMINAL

BOE TECHNOLOGY GROUP CO.,...

1. An unlocking method of a touch screen terminal, comprising:
performing a touch unlocking operation to an unlocking unit, wherein the unlocking unit is at least one active area corresponding
to the unlocking operation and provided on the touch screen with an area smaller than that of the entire screen; and when
the touch screen terminal is in a non-service state, the active area is in a service state or a standing by state;

generating an unlocking request signal upon detecting the touch unlocking operation; and
providing an unlocking operation interface for the user to input relevant unlocking schemes according to the unlocking request
signal.

US Pat. No. 9,373,283

PIXEL CIRCUIT, ORGANIC ELECTROLUMINESCENT DISPLAY PANEL AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A pixel circuit, comprising: a luminous device, a photosensitive device, a drive control sub-module, a data write sub-module,
a light-emitting control sub-module and a touch detection sub-module; wherein,
a first terminal of the drive control sub-module is connected to a first terminal of the data write sub-module and a first
terminal of the photosensitive device, respectively, a second terminal of the drive control sub-module is connected to a first
terminal of the luminous device and a second terminal of the data write sub-module, respectively, a third terminal of the
drive control sub-module is connected to a first terminal of the light-emitting control sub-module and a first terminal of
the touch detection sub-module, respectively;

a third terminal of the data write sub-module is connected to a data signal terminal, a fourth terminal of the data write
sub-module is connected to a scan signal terminal, a fifth terminal of the data write sub-module is connected to a first reference
signal terminal, a second terminal of the luminous device and a second terminal of the light-emitting control sub-module,
respectively, a sixth terminal of the data write sub-module is connected to a third terminal of the light-emitting control
sub-module; under the control of the scan signal terminal, a data signal at the data signal terminal is transmitted to the
drive control sub-module by the data write sub-module;

a fourth terminal of the light-emitting control sub-module is connected to a second reference signal terminal and a second
terminal of the touch detection sub-module, respectively, a fifth terminal of the light-emitting control sub-module is connected
to a light-emitting control signal terminal; under the control of the light-emitting control signal terminal, the light-emitting
control sub-module controls the drive control sub-module to drive the luminous device to give off light;

a third terminal of the touch detection sub-module is connected to a second terminal of the photosensitive device, a fourth
terminal of the touch detection sub-module is connected to a touch signal read terminal, a fifth terminal of the touch detection
sub-module is connected to a touch control signal terminal; under the control of the touch control signal terminal, the touch
detection sub-module controls output of a touch detection signal from the drive control sub-module to the touch signal read
terminal, the touch detection signal being decreased as the light intensity irradiated onto the photosensitive device is increased.

US Pat. No. 10,510,708

ANISOTROPIC CONDUCTIVE FILM (ACF) AND FORMING METHOD THEREOF, ACF ROLL, BONDING STRUCTURE AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. An anisotropic conductive film (ACF), comprising:an insulating adhesive layer, including a plurality of preset regions corresponding to electrodes to be bonded and spaced from each other; and
capsule structures, dispersed in the insulating adhesive layer of the plurality of preset regions and configured to realize a electrical connection in a direction perpendicular to a surface of the ACF when the ACF is subjected to a pressure in the direction perpendicular to the surface of the ACF,
wherein a number of the capsule structures in each of the plurality of preset regions is greater than a preset number,
wherein the anisotropic conductive film is disposed on a non-display region of a display device, and the capsule structure is not disposed outside the plurality of preset regions.

US Pat. No. 10,409,107

SEMI-TRANSMISSIVE, SEMI-REFLECTIVE DISPLAY PANEL AND METHOD OF MANUFACTURING THE SAME AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A semi-transmissive, semi-reflective display panel, comprising a display substrate having a transmissive region and a reflective region,wherein the semi-transmissive, semi-reflective display panel further comprises an optical device including a first reflective portion and a second reflective portion;
wherein the first reflective portion is configured to reflect light irradiating the reflective region of the display substrate from a backlight source to the second reflective portion; and
the second reflective portion is configured to transmit therethrough light irradiating the transmissive region of the display substrate from the backlight source and reflect light reflected from the first reflective portion to the transmissive region of the display substrate.

US Pat. No. 10,001,853

TOUCH GRATING CELL AND TOUCH STEREOSCOPIC DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A touch grating cell, comprising:a first substrate and a second substrate, arranged opposite to each other;
a liquid crystal layer, arranged between the first substrate and the second substrate;
a first transparent electrode structure, arranged on the first substrate; and
a second transparent electrode structure, arranged on the second substrate,
wherein each of the first transparent electrode structure and the second transparent electrode structure includes a plurality of multiplex electrodes; in a touch period, all of the multiplex electrodes in the first transparent electrode structure and all of the multiplex electrodes in the second transparent electrode structure are used as a touch driving electrode and a touch sensing electrode, respectively, and are perpendicular to each other in extending directions; and in a grating forming period, all of the multiplex electrodes in the first transparent electrode structure and all of the multiplex electrodes in the second transparent electrode structure are used as a common electrode and a grating electrode, respectively;
the first transparent electrode structure includes the plurality of multiplex electrodes and a plurality of first electrodes, the first electrodes being used as the common electrode in the grating forming period, and being used as a touch signal blank region in the touch period; and
the second transparent electrode structure includes a plurality of strip electrodes, and each of the multiplex electrodes of the second transparent electrode structure includes at least two adjacent strip electrodes which are electrically connected with each other by connecting both ends thereof to a signal line, respectively.

US Pat. No. 9,978,595

PHOTO MASK AND EXPOSURE SYSTEM

BOE TECHNOLOGY GROUP CO.,...

1. A photo mask, comprising a patterning structure for forming a resulting pattern, the patterning structure comprising a strip-like main body for forming a rectilinear pattern, wherein the patterning structure further comprises a patterning structure auxiliary unit provided at two sides of the strip-like main body, the patterning structure auxiliary unit being capable of adjusting and compensating direction and intensity of light during exposure, and the patterning structure auxiliary unit comprises a columnar part spaced apart from the strip-like main body.

US Pat. No. 9,966,389

ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF AND DISPLAY DEVICE

BOE Technology Group Co.,...

1. A manufacturing method of an array substrate comprising steps of:S10, forming a pattern including a common electrode line and a gate of a thin film transistor on a base;
S11, forming a gate insulation layer above the pattern including the common electrode line and the gate of the thin film transistor;
S12, forming an active layer of the thin film transistor on the gate insulation layer above the gate;
S13, forming an etch stop layer above the gate insulation layer and the active layer of the thin film transistor;
S15, forming a passivation layer above the etch stop layer,wherein the manufacturing method further comprises steps of:S14, forming a main via, so that the main via is above the common electrode line and reaches the common electrode line;
S16, forming a pattern including a main connection portion, so that the main connection portion is at least partially provided in the main via, the main connection portion comprises an upper main connection portion and a lower main connection portion, the lower main connection portion comprises a main body and a flange provided on the main body and extending towards a direction away from a center of the main via, a lower end of the upper main connection portion is connected to the flange, and the main body is connected to the common electrode line; and
S17, forming a pattern of a common electrode, so that the common electrode is connected to an upper end of the upper main connection portion.

US Pat. No. 9,852,693

PIXEL UNIT DRIVING CIRCUIT HAVING ERASING TRANSISTOR AND MATCHING TRANSISTOR, METHOD DRIVING THE SAME, PIXEL UNIT AND DISPLAY APPARATUS

BOE Technology Group Co.,...

1. A pixel unit driving circuit for driving an Organic Light Emitting Diode (OLED), comprising a driving thin film transistor,
a matching thin film transistor, a signal-erasing thin film transistor, a charging control unit, a driving control unit and
a storage capacitor, wherein:
a gate of the driving thin film transistor is connected with a first end of the storage capacitor and is connected with a
high level output terminal of a driving power supply via the charging control unit, a source thereof is connected with the
high level output terminal of the driving power supply, and a drain thereof is connected with an anode of the OLED;

a gate and a source of the matching thin film transistor are connected with a data line via the charging control unit, and
a drain thereof is connected with a second end of the storage capacitor;

a gate and a source of the signal-erasing thin film transistor are connected with the second end of the storage capacitor;
a drain of the signal-erasing thin film transistor is connected with the gate and the source of the matching thin film transistor,
and is connected with the data line via the charging control unit;

the second end of the storage capacitor is connected with a low level output terminal of the driving power supply via the
driving control unit;

the driving control unit and a cathode of the OLED are both connected without intervention of any transistor to the low level
output terminal of the driving power supply; and

wherein during a period in which the OLED emits light, the driving control unit is configured to supply the second end of
the storage capacitor with a voltage output from the low level output terminal of the driving power supply,

wherein during a charging period, the charging control unit is configured to apply a voltage output from the high level output
terminal of the driving power supply to the gate of the driving thin film transistor so as to turn off the driving thin film
transistor.

US Pat. No. 9,818,774

FABRICATION METHOD OF PIXEL STRUCTURE

BOE TECHNOLOGY GROUP CO.,...

1. A fabrication method of a pixel structure, comprising:
forming a gate electrode, a gate insulating layer, an active layer, a pixel electrode layer and a source-drain electrode layer
on a substrate, and etching the source-drain electrode layer by using a photoresist pattern to form a source electrode and
a drain electrode;

ashing both sides of the photoresist pattern, and removing indium-containing material remained on both sides of the source
electrode and the drain electrode, so as to align edges of the ashed photoresist pattern with edges of the source electrode
and the drain electrode;

etching a silicon oxide generated when ashing the photoresist pattern; and
etching a semiconductor layer between the source electrode and the drain electrode by a dry etching process to form a channel,
wherein a width etched of the semiconductor layer is equal to a distance between the source electrode and the drain electrode.

US Pat. No. 9,741,291

PIXEL CIRCUIT, METHOD FOR DRIVING PIXEL CIRCUIT AND DISPLAY APPARATUS

BOE TECHNOLOGY GROUP CO.,...

1. A pixel circuit, comprising a plurality of rows of pixel units and a row-shared unit, wherein each row of the pixel units
comprises a plurality of sub-pixel units, and the row-shared unit comprises a plurality of row-driving light-emitting control
modules;
all of the plurality of sub-pixel units comprised in each row of pixel units are connected to a corresponding signal line;
and

each row-driving light-emitting control module among the plurality of row-driving light-emitting control modules is connected
to all of the sub-pixel units comprised in a corresponding one row of the pixel units among the plurality of rows of pixel
units through the signal line, so as to provide a threshold compensation function,

wherein each of the sub-pixel units comprised in an n-th row of pixel units comprises a sub-pixel driving circuit and a light-emitting
element, wherein n is an integer not greater than the total number of rows of the plurality of rows of pixel units comprised
in the pixel circuit, and an (n?1)-th scanning line is an initial scanning line if n equals 1;

the sub-pixel driving circuit comprises a driving compensation module, a data writing module and a driving transistor;
a first electrode of the driving transistor is connected to a first end of the light-emitting element, a second electrode
of the driving transistor is inputted with a first level, and a second end of the light-emitting element is connected to the
signal line;

the driving compensation module is connected to the (n?1)-th scanning line, a gate electrode of the driving transistor, the
first electrode of the driving transistor, and the second electrode of the driving transistor respectively, inputted with
a second level, and configured to control a gate-source voltage of the driving transistor to compensate for a threshold voltage
of the driving transistor when a scanning signal outputted by the (n?1)-th scanning line is effective during a first stage
of a time period;

the data writing module is connected to the n-th scanning line, a data line and the driving compensation module respectively,
and configured to control a data voltage on the data line to be written into the gate electrode of the driving transistor
by the driving compensation module when the scanning signal outputted by the n-th scanning line is effective during a second
stage of the time period; and

each of the row-driving light-emitting control module is inputted with a light-emitting control signal and the second level
respectively, connected to the second end of the light-emitting element through the signal line, and configured to control
a level of the signal line to be the second level when the light-emitting control signal is effective during a third stage
of the time period,

the driving compensation module is further configured to maintain a level of the gate electrode of the driving transistor,
so as to control the driving transistor to drive the light-emitting element to emit light and control the threshold voltage
of the driving transistor to be compensated, when both the scanning signal outputted by the (n?1)-th scanning line and the
scanning signal outputted by the n-th scanning line are ineffective during the third stage of the time period.

US Pat. No. 9,720,275

DISPLAY DEVICE, COLOR FILTER AND MANUFACTURING METHOD THEREOF

BOE TECHNOLOGY GROUP CO.,...

1. A method of manufacturing a color filter, comprising:
step 1, at least forming black matrix electrodes, first electrodes, second electrodes and third electrodes insulated from
each other on a base substrate; and

step 2, at least forming a black matrix layer, a first color filter pattern, a second color filter pattern and a third color
filter pattern on the base substrate using an electrophoretic deposition process respectively by the black matrix electrodes,
the first electrodes, the second electrodes and the third electrodes; wherein the step 1 comprises:

forming the black matrix electrodes with a plurality of opening areas on the base substrate, the plurality of opening areas
of the black matrix electrodes defining at least a first sub-pixel area, a second sub-pixel area and a third sub-pixel area;

forming an insulating layer on a side of the black matrix electrode facing away from the base substrate; and
forming the first electrodes, the second electrodes and the third electrodes on a side of the insulating layer facing away
from the black matrix electrodes, wherein the first electrodes are formed in portions of the side corresponding to the first
sub-pixel areas, the second electrodes are formed in portions corresponding to the second sub-pixel areas and the third electrodes
are formed in portions corresponding to the third sub-pixel areas.

US Pat. No. 9,697,767

LED PIXEL UNIT CIRCUIT, DRIVING METHOD THEREOF, AND DISPLAY PANEL

BOE TECHNOLOGY GROUP CO.,...

1. An active matrix light emitting diode pixel unit circuit, comprising:
a light emitting module configured to emit light under the driving of a driving current;
a driving module configured to drive the light emitting module;
a light emitting control module configured to turn on the light emitting module to make the light emitting module emit light;
a threshold compensation module configured to perform threshold voltage compensation for the driving module;
a data voltage writing module configured to input a data voltage to the driving module; and
an initialization module configured to initialize the threshold compensation module;
wherein the driving module, the light emitting control module and the data voltage writing module are commonly connected to
a first node of the circuit; the driving module, the light emitting control module, one terminal of the threshold compensation
module and the initialization module are commonly connected to a second node of the circuit; and the initialization module,
the light emitting control module and the other terminal of the threshold compensation module are commonly connected to a
third node of the circuit.

US Pat. No. 9,651,839

ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, DISPLAY PANEL AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A manufacturing method of an array substrate comprising a step of forming light-shielding layers on a base substrate, and
a step of forming first type transistors and second type transistors above the light shielding layers, wherein
the step of forming light-shielding layers on a base substrate comprises:
forming a pattern of the light-shielding layers on the base substrate through a patterning process by using a light-shielding
layer-doping multiplexing mask plate, wherein the light-shielding layer-doping multiplexing mask plate has a shielding portion
corresponding to a conductive region of an active layer of each of the first type transistors in a driving region on the base
substrate, and a shielding portion corresponding to a conductive region of an active layer of each of the first type transistors
in a display region on the base substrate, the light-shielding layers are formed in positions corresponding to the conductive
regions of the active layers of the first type transistors in the driving region and positions corresponding to the conductive
regions of the active layers of the first type transistors in the display region,

the step of forming first type transistors and second type transistors above the light-shielding layers comprises:
performing a first type doping on active layers of the first type transistors and the second type transistors; and
performing a second type doping on the second type transistors by shielding the conductive regions of the active layers of
the first type transistors using the light-shielding layer-doping multiplexing mask plate.

US Pat. No. 9,564,354

VIA-HOLE ETCHING METHOD

BOE TECHNOLOGY GROUP CO.,...

1. A via-hole etching method, comprising:
forming a structure for via-hole etching, comprising a low-temperature poly-silicon layer, a gate insulating layer, a gate
metal layer and an interlayer insulating layer, which are sequentially formed on a substrate;

forming a mask layer comprising a via-hole masking pattern on the structure for via-hole etching;
by using a first etching process, etching the structure for via-hole etching to a first thickness of the gate insulating layer;
by using a second etching process, etching the structure for via-hole etching to etch away a remaining thickness of the gate
insulating layer uncovering the low-temperature poly-silicon layer and ending the second etching process so as to retain the
low-temperature poly-silicon layer that is uncovered; and

removing the mask layer to form a via-hole structure;
wherein the second etching process is dry etching with an organic etching gas, which is a mixed gas including CF4, hydrogen (H2), C4F8, Ar and O2.

US Pat. No. 9,501,170

PIXEL CIRCUIT, DISPLAY DEVICE, AND METHOD FOR DRIVING PIXEL CIRCUIT

BOE TECHNOLOGY GROUP CO.,...

1. A pixel circuit, comprising: a driver amplifying unit, a compensating unit, a light-emitting unit, a light-emission controlling
unit, a charging unit, a touching unit and an outputting unit, wherein
the light-emitting unit is coupled with the light-emission controlling unit and a low voltage end, configured to emit light
under the control of the light-emission controlling unit;

the light-emission controlling unit is coupled with the light-emitting unit and the driver amplifying unit, configured to
control the light-emitting unit to emit light at a display stage;

the touching unit, coupled with the driver amplifying unit and the low voltage end, configured to generate a touch signal;
the driver amplifying unit, coupled with the compensating unit, a high voltage end, the touching unit and the light-emission
controlling unit, configured to amplify the touch signal generated by the touching unit at a touch stage and drive the light-emitting
unit to emit light at the display stage;

the outputting unit, coupled with the driver amplifying unit, configured to output the touch signal amplified by the driver
amplifying unit;

the charging unit, coupled with the compensating unit configured to charge the compensating unit; and
the compensating unit, coupled with the charging unit, the driver amplifying unit, the low voltage end and the high voltage
end, configured to be charged by the high voltage end prior to the display stage so that a gate voltage of the driver amplifying
unit is equal to a threshold voltage of the driver amplifying unit, and be charged by the charging unit at the display stage
so that the gate voltage of the driver amplifying unit is equal to a sum of a data voltage output by the charging unit and
the threshold voltage;

wherein the driver amplifying unit comprises a first TFT, a gate electrode of the first TFT is coupled with the compensating
unit and the touching unit, a first electrode of the first TFT is coupled with the high voltage end, and a second electrode
of the first TFT is coupled with the light-emission controlling unit and the outputting unit;

wherein the compensating unit comprises a third TFT, a fourth TFT, a first capacitor and a second capacitor;
a gate electrode of the third TFT is coupled with a first control signal input end, a first electrode of the third TFT is
coupled with the high voltage end, and a second electrode of the third TFT is coupled with the gate electrode of the first
TFT;

a gate electrode of the fourth TFT is coupled with the first control signal input end, a first electrode of the fourth TFT
is coupled with the charging unit, and a second electrode of the fourth TFT is coupled with the second electrode of the first
TFT;

one end of the first capacitor is coupled with the gate electrode of the first TFT and the second electrode of the third TFT,
and the other end of the first capacitor is coupled with one end of the second capacitor, the first electrode of the fourth
TFT and the charging unit; and

one end of the second capacitor is coupled with the low voltage end, and the other end of the second capacitor is coupled
with one end of the first capacitor, the first electrode of the fourth TFT and the charging unit.

US Pat. No. 9,058,893

SHIFT REGISTER AND THE DRIVING METHOD THEREOF, GATE DRIVING APPARATUS AND DISPLAY APPARATUS

BOE TECHNOLOGY GROUP CO.,...

1. A shift register, comprising a pull-up unit, a reset unit and a signal output, wherein,
said pull-up unit is connected to said signal output and is configured to pull up an output signal, so that the output signal
is at high level;

said reset unit is connected to a control end of said pull-up unit and said signal output respectively, and is configured
to reset the potential of the control end of said pull-up unit after said output signal is at high level, so that said output
signal is at low level; and

wherein said shift register further comprises a pull-down unit;
said pull-down unit is connected to a control end of said pull-up unit and said signal output respectively and is configured
to pull down the potential of the control end of said pull-up unit and said output signal after said reset unit has reset
the potential of the control end of said pull-up unit, so that said pull-up unit switches off to control said output signal
to maintain a low level,

said pull-down unit comprises a dual-pull-down control module, and said dual-pull-down control module is connected to a first
clock signal input;

said dual-pull-down control module comprises an eighth thin film transistor (TFT), a ninth TFT, a tenth TFT and an eleventh
TFT;

said eighth TFT is configured so that the gate is connected to the gate of a first TFT, the source is connected to a low level
output, and the drain is connected to the source of the tenth TFT and the gate of the eleventh TFT respectively;

said ninth TFT is configured so that the gate is connected to said signal output, the source is connected to the low level
output, and the drain is connected to the source of said eleventh TFT;

said tenth TFT is configured so that the gate and the drain are connected to the first clock signal input, and the source
is connected to the gate of the eleventh TFT; and

said eleventh TFT is configured so that the drain is connected to the first clock signal input.

US Pat. No. 9,923,040

ARRAY SUBSTRATE AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. An array substrate, comprising a first thin film transistor and a second thin film transistor, the first thin film transistor
is arranged on a non-display area of the array substrate, the second thin film transistor is arranged on a display area of
the array substrate, a part of a first active layer corresponding to a region between a first source and a first drain in
the first thin film transistor forms a first trench, and a part of a second active layer corresponding to a region between
a second source and a second drain in the second thin film transistor forms a second trench, and
wherein an extending direction of the first trench and an extending direction of the second trench each forms an included
angle with a direction of a gate line, each of the included angles is larger than 0 degree and less than 90 degree, the first
trench has at least one first bent portion, the second trench has a second bent portion, and bending angles of the first bent
portion and the second bent portion are the same or explementary angles.

US Pat. No. 9,753,342

COLOR FILTER ARRAY SUBSTRATE, DISPLAY DEVICE AND MANUFACTURING METHOD OF COLOR FILTER ARRAY SUBSTRATE

BOE TECHNOLOGY GROUP CO.,...

7. A manufacturing method of a color filter array substrate, comprising steps of:
providing a substrate and forming a thin film transistor array on the substrate;
forming a color filter on the thin film transistor array;
forming a black matrix on the color filter; and
forming a planarization layer on the black matrix, wherein a dielectric constant of the planarization layer is between 3.0
and 5.0 and a resistivity of the planarization layer is between 1012?·cm and 1014?·cm,

wherein the manufacturing method of a color filter array substrate further includes a step of:
sequentially forming a first electrode layer, a passivation layer and a second electrode layer on the planarization layer,
and

wherein after the step of forming a planarization layer on the black matrix, and before the step of sequentially forming a
first electrode layer, a passivation layer and a second electrode layer on the planarization layer, the manufacturing method
of a color filter array substrate further includes a step of:

forming via holes, which directly pass through both the color filter and the planarization layer, through dry etching, so
that first electrodes in the first electrode layer to be formed subsequently on the planarization layer are connected to drains
of corresponding thin film transistors in the thin film transistor array through the via holes, wherein the black matrix is
formed on an area of the color filter where the via holes do not pass.

US Pat. No. 9,703,106

PARALLAX BARRIER, DESIGNING METHOD THEREOF AND PARALLAX BARRIER TYPE 3D DISPLAY DEVICE

BOE Technology Group Co.,...

1. A parallax barrier, comprising:
a plurality of grating sheets, utilized to shield light, disposed in an arrangement direction and spaced apart from each other,
wherein the plurality of grating sheets are divided into 2K grating sections each of which comprises two or more grating segments,
each grating segment comprises one or more grating sheets with an identical grating pitch C, and in each grating section,
the grating sheets included in different grating segments have different grating pitches, any two grating sections of the
2K grating sections comprises a same number of the grating segments and the grating pitches C of the grating segments comprised
in one of the any two grating sections and the grating pitches C of the grating segments comprised in another of the any two
grating sections are in a one-to-one corresponding relationship, the grating segments with the same grating pitch comprises
the same number of grating sheets, and each of the grating sections comprises i grating segments, which are respectively a
first grating segment comprising n1 grating sheets with a grating pitch of C1, a second grating segment comprising n2 grating sheets with a grating pitch of C2, . . . an ith grating segment comprising ni grating sheets with a grating pitch of Ci, wherein K is a natural number assigned according to an equation of K=N÷2÷(n1+n2+ . . . +ni) to allow n1, n2, . . . ni to be coprime numbers, where i is a natural number larger than or equal to 2, C1, C2, . . . , Ci are relevant to a practical fabrication accuracy of the parallax barrier, N is the number of the grating sheets of the parallax
barrier, and

arrangement orders of the grating segments in different grating sections are different along the arrangement direction.

US Pat. No. 9,627,455

TOUCH DISPLAY DRIVING CIRCUIT, METHOD THEREOF AND DISPLAY APPARATUS

BOE TECHNOLOGY GROUP CO.,...

1. A touch display driving circuit comprising a driving transistor, a touch sensing unit and a compensation driving unit,
wherein
the driving transistor is configured to drive a pixel display element to perform the displaying of the pixel;
the touch sensing unit is configured to receive a touch control signal, and to control the compensation driving unit to drive
the driving transistor to perform the displaying of the pixel according to the received touch control signal; and

the compensation driving unit is configured to drive the driving transistor to perform the displaying of the pixel, and to
adjust a gate-source voltage of the driving transistor as driving the driving transistor to perform the displaying of the
pixel, so that a compensation amount of the gate-source voltage and a threshold voltage are counteracted,

wherein the compensation driving unit comprises a first switch transistor and a voltage-regulating module;
a gate of the first switch transistor is connected to a first control line, a first electrode of the first switch transistor
is connected to a data line, and a second electrode of the switch transistor is connected to the voltage-regulating module;

a gate of the driving transistor is connected to the voltage-regulating module, a first electrode of the driving transistor
is connected to the voltage-regulating module, and a second electrode of the driving transistor is connected to the voltage-regulating
module; and

the voltage-regulating module is connected to a first power supply and the first control line, and is further connected to
the touch sensing unit; the touch sensing unit is connected to a third power supply.

US Pat. No. 9,626,017

TOUCH PANEL AND MANUFACTURING METHOD THEREOF, DISPLAY DEVICE

CHENGDU BOE OPTOELECTRONI...

1. A touch panel comprising a first sensing electrode layer, a second sensing electrode layer, and an insulating layer between
the first sensing electrode layer and the second sensing electrode layer,
wherein the first sensing electrode layer comprises first sensing electrode patterns; the second sensing electrode layer comprises
second sensing electrode patterns; and the insulating layer comprises insulating patterns, and

a size of the insulating patterns is the same as that of the first sensing electrode patterns or the second sensing electrode
patterns when viewed in a direction perpendicular to the substrate plane.

US Pat. No. 9,581,852

COLOR FILTER SUBSTRATE, DISPLAY PANEL AND DISPLAY DEVICE

CHENGDU BOE OPTOELECTRONI...

1. A color filter substrate, comprising a substrate and a color filter layer provided on the substrate, wherein
the color filter layer comprises a plurality of pixel units in a matrix form, each of the pixel units comprises at least three
subpixels in different colors, and each of the subpixels comprises a sub-subpixel in one color;

each of the pixel units includes at least three subpixels of different colors, each subpixel includes a sub-subpixel of a
color and a brightening sub-subpixel closely adjoins with the sub-subpixel of the color, areas of the sub-subpixels are inversely
proportional to corresponding wavelengths of the sub-subpixels to allow the sub-subpixels to visually have equal width.

US Pat. No. 9,495,051

CAPACITIVE TOUCH PANEL

BOE Technology Group Co.,...

1. A capacitive touch panel, comprising:
an electrostatic protection touching layer, disposed on another side of a color filter substrate with a black matrix being
formed thereon, wherein the electrostatic protection touching layer comprises a touching array pattern and an electrostatic
protection discharging pattern, and the electrostatic protection discharging pattern is disposed in a space of the touching
array pattern, complementing with the touching array pattern, the electrostatic protection discharging pattern and the touching
array pattern are insulated from each other,

wherein the touching array pattern comprises multiple columns of touching units disposed side by side at an interval, and
the multiple touching units are insulated from each other,

wherein each touching unit comprises a charge pattern and a plurality of signal receiving patterns,
wherein the charge pattern and the plurality of signal receiving patterns in each touch unit are located in a same layer,
the touching array pattern and the electrostatic protection discharging pattern are located in a same layer.

US Pat. No. 9,239,508

OPTICAL DEVICE AND DISPLAY DEVICE WITH THE SAME

BOE Technology Group Co.,...

1. An optical device comprising an optical structure, at least one pair of electrodes and a control unit, wherein
the optical structure includes a first set of prisms and a second set of prisms which engage with each other, the second set
of prisms are formed from electro-optical effect material or contain electro-optical effect material, and when no electric
field is applied to the second set of prisms, the first set of prisms and the second set of prisms have the same refractivity;

wherein each electrode of the at least one pair of electrodes resides on a respective one of end faces at two sides of the
second set of prisms perpendicular to a plane on which the second set of prisms are located, for generating an electric field
to change refractivities of the prisms of the second set in the direction of the electric field, so that light transmitted
through the prisms of the first set can be totally reflected by the prisms of the second set; and

the control unit is connected to the at least one pair of electrodes and performs control so as to power on the electrodes
or power off the electrodes, and controls the intensity of the electric field when the electrodes are powered on.

US Pat. No. 10,657,916

SHIFT REGISTER UNIT, GATE DRIVING CIRCUIT AND DRIVING METHOD THEREOF, AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A shift register unit, comprising two transfer gate modules, four AND gate modules, and two capacitor modules, as well as a pulse signal input terminal, four pulse signal output terminals, and a plurality of clock signal input terminals;a first terminal of a first capacitor module is connected to a first node; a first terminal of a second capacitor module is connected to a third node;
a first input terminal of a first transfer gate module is connected to the pulse signal input terminal, a second input terminal of the first transfer gate module is connected to a first clock signal input terminal, a third input terminal of the first transfer gate module is connected to a second clock signal input terminal, and an output terminal of the first transfer gate module is connected to the first node; a first input terminal of a second transfer gate module is connected to a second node, a second input terminal of the second transfer gate module is connected to a third clock signal input terminal, a third input terminal of the second transfer gate module is connected to a fourth clock signal input terminal, and an output terminal of the second transfer gate module is connected to the third node;
each transfer gate module is configured to be turned on when a first level is inputted to the second input terminal thereof and the third input terminal thereof is at a second level, so as to write a scan signal inputted to the first input terminal thereof to a node connected to the output terminal thereof; a level of the scan signal is the first level, the second level being opposite to the first level;
a first input terminal of a first AND gate module is connected to a fifth clock signal input terminal, a second input terminal of the first AND gate module is connected to the second node, and an output terminal of the first AND gate module is connected to a first pulse signal output terminal; a first input terminal of a second AND gate module is connected to a sixth clock signal input terminal, a second input terminal of the second AND gate module is connected to the second node, and an output terminal of the second AND gate module is connected to a second pulse signal output terminal; a first input terminal of a third AND gate module is connected to a seventh clock signal input terminal, a second input terminal of the third AND gate module is connected to a fourth node, and an output terminal of the third AND gate module is connected to a third pulse signal output terminal; a first input terminal of the fourth AND gate module is connected to an eighth clock signal input terminal, a second input terminal of the fourth AND gate module is connected to the fourth node, and an output terminal of the fourth AND gate module is connected to a fourth pulse signal output terminal;
each AND gate module is configured to output the first level through an output terminal thereof when both the first input terminal thereof and the second input terminal thereof are at the first level; and
the second node is electrically connected to the first node, a level state of the second node is in synchronization with a level state of the first node; the fourth node is electrically connected to the third node, a level state of the fourth node is in synchronization with a level state of the third node,
the shift register unit further comprising a first OR gate unit and/or a second OR gate unit;
one input terminal of the first OR gate unit is connected to a clock signal line connected to the fifth clock signal input terminal in each shift register unit, the other input terminal of the first OR gate unit is connected to a clock signal line connected to the sixth clock signal input terminal in each shift register unit, and an output terminal of the first OR gate unit is connected to a clock signal line connected to the first clock signal input terminal in each shift register unit;
one input terminal of the second OR gate unit is connected to a clock signal line connected to the seventh clock signal input terminal in each shift register unit, the other input terminal of the second OR gate unit is connected to a clock signal line connected to the eighth clock signal input terminal in each shift register unit, and an output terminal of the second OR gate unit is connected to a clock signal line connected to the third clock signal input terminal in each shift register unit; and
each OR gate unit is configured to output the first level through the output terminal thereof when either one of the two input terminals thereof is inputted with the first level.

US Pat. No. 9,846,503

TOUCH DRIVER CIRCUIT, IN-CELL OPTICAL TOUCH PANEL COMPRISING THE TOUCH DRIVER AND DISPLAY DEVICE COMPRISING THE IN-CELL OPTICAL TOUCH PANEL

BOE TECHNOLOGY GROUP CO.,...

1. A touch driver circuit, comprising a photosensor module, a data writing module, a driver module, and a control module,
wherein a first terminal of the photosensor module is connected to a first reference signal terminal, a second terminal of
the photosensor module is connected to a signal output terminal of the data writing module and a first signal input terminal
of the driver module;

a first signal input terminal of the data writing module is connected to a scan signal terminal, a second signal input terminal
of the data writing module is respectively connected to a second reference signal terminal and a second signal input terminal
of the driver module, the data writing module is configured to transmit a scan signal to the driver module under control of
the scan signal terminal;

a signal output terminal of the driver module is connected to a first signal input terminal of the control module; the driver
module is configured to output a touch sensing signal to the control module where the driver module is turned-ON under control
of the scan signal, and the touch sensing signal decreases with increase of an intensity of light irradiated on the photosensor
module; and

a second signal input terminal of the control module is connected to a control signal terminal, a signal output terminal of
the control module is connected to a touch signal sensing terminal; the control module is configured to output the touch sensing
signal output by the driver module to the touch signal sensing terminal under control of the control signal terminal, and
the data writing module comprises a first switch transistor and a capacitor,

wherein a first terminal of the capacitor is connected to the second reference signal terminal, a second terminal of the capacitor
is connected to a source electrode of the first switch transistor; and

a drain electrode and a gate electrode of the first switch transistor are respectively connected to the same scan signal terminal,
wherein the touch driver circuit further comprises a reset module, the reset module comprises a third switch transistor, a
gate electrode of the third switch transistor is connected to a reset control signal terminal, a source electrode of the third
switch transistor is connected to the first signal input terminal of the driver module, and a drain electrode of the third
switch transistor is connected to a reset signal terminal that is different from the second reference signal terminal,

wherein the reset module is configured to reset a voltage of the first signal input terminal of the driver module to an initial
state under control of the reset control signal terminal.

US Pat. No. 9,804,705

FLEXIBLE PRINTED CIRCUIT BOARD, METHOD FOR MANUFACTURING THE SAME, AND CAPACITIVE TOUCH DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A flexible printed circuit board (FPCB) for a capacitive touch display device, comprising an FPCB substrate and a common
electrode voltage (VCOM) filter circuit arranged on the FPCB substrate, wherein
the FPCB further comprises one or more filter units, and
the filter unit comprises:
a conduction layer, arranged on the FPCB substrate and electrically connected to a VCOM output end of the VCOM filter circuit;
an isolation layer, arranged on the conduction layer; and
a shielding film, which is grounded, arranged on the isolation layer, and arranged parallel with the conduction layer,
wherein the FPCB comprises a plurality of layers of the FPCB substrate arranged one on top of another, the VCOM filter circuit
is arranged on at least one layer of the FPCB substrate; an electrostatic discharging metal layer, which is grounded, is arranged
on an area on the at least one layer of the FPCB substrate where the conduction layer is not arranged, and the electrostatic
discharging metal layer is insulated from the conduction layer, and

the conduction layer is arranged on each of at least two adjacent layers of the plurality of layers of the FPCB substrate,
the conduction layer arranged on any one of the at least two adjacent layers of the FPCB substrate is not overlapped with
the conduction layer arranged on any other one of the at least two adjacent layers of the FPCB substrate in a top-view direction.

US Pat. No. 9,791,968

SHIFT REGISTER, ITS DRIVING METHOD, GATE DRIVER CIRCUIT AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A shift register, comprising an input module, a resetting module, a touch switching module, a node control module, a first
output module and a second output module, wherein
a first end of the input module is configured to receive an input signal, a second end of the input module is configured to
receive a first clock signal, and a third end of the input module is connected to a first node;

the input module is configured to enable the first node to be at a first potential in the case that the input signal and the
first clock signal are both at the first potential;

a first end of the resetting module is configured to receive a resetting signal, a second end of the resetting module is configured
to receive a third clock signal, and a third end of the resetting module is connected to the first node;

the resetting module is configured to enable the first node to be at the first potential in the case that the resetting signal
and the third clock signal are both at the first potential;

a first end of the touch switching module is configured to receive a first touch-control signal, a second end of the touch
switching module is connected to the first node, and a third end of the touch switching module is connected to a second node;

the touch switching module is configured to, under the control of the first touch-control signal, enable the first node to
be electrically connected to the second node at a display stage, and enable the first node to be electrically disconnected
from the second node at a touch stage;

a first end of the node control module is configured to receive a direct current (DC) signal, a second end of the node control
module is configured to receive a fourth clock signal, a third end of the node control module is configured to receive a second
touch-control signal, a fourth end of the node control module is connected to the first node, a fifth end of the node control
module is connected to the second node, and a sixth end of the node control module is connected to a third node;

the node control module is configured to apply the DC signal to the first node in the case that the third node is at the first
potential, apply the fourth clock signal to the third node in the case that the fourth clock signal is at the first potential,
apply the second touch-control signal to the third node in the case that the second node is at the first potential, and maintain
a voltage difference between the first end of the node control module and the third node to be a voltage difference within
a previous time period in the case that the third node is in a floating state;

a first end of the first output module is connected to the second node, a second end of the first output module is configured
to receive a second clock signal, and a third end of the first output module is connected to a driving signal output end of
the shift register;

the first output module is configured to apply the second clock signal to the driving signal output end in the case that the
second node is at the first potential, and maintain a voltage difference between the second node and the driving signal output
end to be the voltage difference within the previous time period in the case that the second node is in the floating state;

a first end of the second output module is connected to the third node, a second end of the second output module is configured
to receive the DC signal, and a third end of the second output module is connected to the driving signal output end;

the second output module is configured to apply the DC signal to the driving signal output end in the case that the third
node is at the first potential;

in the case that a valid pulse signal of the input signal is at a high potential, the first potential is a high potential,
the DC signal is at a low potential, and the second touch-control signal is at a low potential at the display stage and at
a high potential at the touch stage; and

in the case that the valid pulse signal of the input signal is at a low potential, the first potential is a low potential,
the DC signal is at a high potential, and the second touch-control signal is at the high potential at the display stage and
at the low potential at the touch stage.

US Pat. No. 9,740,346

TOUCH SCREEN, MANUFACTURING METHOD THEREOF AND DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A touch screen, comprising:
a plurality of first sensing units connected to each other by a first connection line in a first direction; and
a plurality of second sensing units connected to each other by a second connection line in a second direction,
wherein, the first sensing units and the second sensing units are arranged alternatively in the first and second direction;
and in the first direction, at least part of the second sensing units is overlapped with the first connection line between
two first sensing units adjacent to this second sensing unit, and in the second direction, at least part of the first sensing
units is overlapped with the second connection line between two second sensing units adjacent to this first sensing unit,

wherein, an overlap region between the first connection line and the second sensing unit is provided in a line matching a
direction of an edge of the second sensing unit, and

an overlap region between the second connection line and the first sensing unit is provided in a line matching a direction
of an edge of the first sensing unit.

US Pat. No. 9,726,931

LIQUID CRYSTAL DISPLAY PANEL, METHOD FOR MANUFACTURING THE SAME, AND LIQUID CRYSTAL DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. A liquid crystal display panel, comprising:
a screen body including a plurality of pixel units arranged in an array form; and
a plurality of light sources arranged at a peripheral region of the screen body so as to provide back light to the pixel units,
wherein an aperture ratio of the pixel unit increases along with an increase in a distance between the pixel unit and the
light source arranged at the peripheral region,

when the light from the plurality of light sources to the pixel unit is of a brightness value of 991 cd/m2 to 1009 cd/m2, the aperture ratio of the pixel unit is 56.5% to 57.5%;

when the light from the plurality of light sources to the pixel unit is of a brightness value of 942 cd/m2 to 958 cd/m2, the aperture ratio of the pixel unit is 59.5% to 60.5%; and

when the light from the plurality of light sources to the pixel unit is of a brightness value of 892 cd/m2 to 906 cd/m2, the aperture ratio of the pixel unit is 62.9% to 63.9%.

US Pat. No. 9,753,365

MASK PLATE

BOE TECHNOLOGY GROUP CO.,...

1. A mask plate, comprising opaque regions and transparent regions, wherein spacers of the same height are arranged in said
opaque regions, and an edge of said spacers is spaced from an edge of said opaque regions by 3-10 ?m.

US Pat. No. 9,684,401

TOUCH ELECTRODE AND FABRICATING METHOD THEREOF, CAPACITIVE TOUCH DEVICE AND TOUCH DISLAY DEVICE

BOE Technology Group Co.,...

1. A touch electrode structure, comprising a plurality of electrode assemblies and a plurality of electrode pins for connecting
a touch circuit, and at least two tag pins which are distributed at two sides of all the electrode pins, wherein,
each electrode assembly comprises two electrodes which are disposed at a same layer and insulated from each other and cross
with each other complementarily, and each electrode comprises at least two sub-electrodes which are in mutual electrical connection
with each other, and the sub-electrodes of different electrodes of each electrode assembly are spaced apart from each other
one by one, and each electrode is connected with one of the electrode pins,

wherein the touch electrode structure is formed on a color filter substrate, wherein the color filter substrate is formed
with a black matrix layer which is provided with an alignment tag for connecting the electrode pins with the touch circuit,
and

wherein the alignment tag is a hollowed-out shape on the black matrix layer, and the hollowed-out shape is the same as a shape
of the tag pins.

US Pat. No. 9,620,537

DISPLAY SUBSTRATE AND FABRICATING METHOD THEREOF, MASK PLATE, AND MASK PLATE GROUP

BOE TECHNOLOGY GROUP CO.,...

1. A mask plate for fabricating a display substrate,
wherein the display substrate comprises a plurality of sub display substrates, each of the sub display substrates comprises
a plurality of pixel units, and each of the pixel units comprises a pixel electrode, a common electrode and a source-drain
channel,

wherein the mask plate comprises a plurality of mask units which are in one-to-one correspondence with the plurality of sub
display substrates,

wherein the plurality of mask units are arranged in such a manner that areas of the mask units for forming the pixel electrodes
or the common electrodes decrease from a center of the mask plate to an edge of the mask plate, or in such a manner that width
to length ratios of the mask units for forming the source-drain channels increase from the center of the mask plate to the
edge of the mask plate.

US Pat. No. 9,570,005

PIXEL CIRCUIT, DRIVING METHOD THEREFOR AND DISPLAY DEVICE

CHENGDU BOE OPTOELECTRONI...

1. A pixel circuit, characterized by comprising an electroluminescent element, a driving transistor, a first switching circuit,
a compensating circuit, an isolating circuit, a storage capacitor and a resetting transistor, wherein the first switching
circuit controls input of a data voltage on a data line under control of a first scan signal terminal, and a control terminal
of the first switching circuit is connected to the first scan signal terminal, a first terminal of the first switching circuit
is connected to a first terminal of the storage capacitor, a second terminal of the first switching circuit is connected to
the data line;
a second terminal of the storage capacitor is connected to a gate of the driving transistor and a first terminal of the compensating
circuit;

the compensating circuit controls the storage capacitor to pre-store a threshold voltage of the driving transistor under control
of a first control signal terminal, a control terminal of the compensating circuit is connected to the first control signal
terminal, and a second terminal of the compensating circuit is connected to a drain of the driving transistor;

a source of the driving transistor is connected to a power supply terminal, the drain of the driving transistor is connected
to a first terminal of the electroluminescent element;

the isolating circuit isolates an electrical connection between the electroluminescent element and a grounded terminal under
control of a second control signal terminal, wherein a control terminal of the isolating circuit is connected to the second
control signal terminal, a first terminal of the isolating circuit is connected to a second terminal of the electroluminescent
element, and a second terminal of the isolating circuit is connected to the grounded terminal; and

a gate of the resetting transistor is connected to the first terminal of the isolating circuit, a source of the resetting
transistor is connected to the first terminal of the storage capacitor, and a drain thereof is connected to the second control
signal terminal.

US Pat. No. 9,569,047

DISPLAY DEVICE AND METHOD FOR PREPARING THE SAME

BOE TECHNOLOGY GROUP CO.,...

1. A display device, comprising:
a display panel;
a 3D grating configured to realize 3D display; and
a touch detection unit configured to realize touch detection, wherein
the 3D grating comprises a base substrate arranged opposite to a display side of the display panel; and
a grating structure of the 3D grating and the touch detection unit are both provided between the base substrate and the display
panel,

wherein the 3D grating is a liquid crystal shutter slit grating;
the base substrate and the display panel are oppositely arranged to form a cell;
the 3D grating further comprises:
a liquid crystal layer filled between the base substrate and the display panel,
a plurality of parallel strip electrodes formed on the base substrate and having a one-to-one correspondence with pixel units
spaced apart on the display panel; and

a plate electrode formed at a surface of the display panel adjacent to the base substrate;
wherein, the strip electrodes extend along the column direction;
the display device further comprises an insulating layer, a plurality of first bridges and a plurality of second bridges;
the insulating layer has a plurality of windows located between the first transparent conductive film and a second transparent
conductive film;

the first bridges are located at a non-display region of the display panel and formed by the first transparent conductive
film, and electrically connect a plurality of first slit electrode strips constituting the driving electrodes; and

the second bridges are located at a display region of the display panel and formed by the second transparent conductive film;
two ends of the second bridges correspond to two adjacent second slit electrode strips in a row direction, respectively, and
a plurality of second slit electrode strips constituting the sensing electrodes is electrically connect to each other by the
second bridges through the corresponding windows in the insulating layer.

US Pat. No. 9,543,040

SHIFT REGISTER UNIT AND DRIVING METHOD THEREOF, GATE DRIVER AND DISPLAY DEVICE

CHENGDU BOE OPTOELECTRONI...

1. A shift register unit, including a signal input unit, a latch unit, a pull-down unit and a signal output unit, wherein
the signal input unit is used for outputting a first level signal or a second level signal to a first terminal of the latch
unit under the control of an input signal and a reset signal;

the latch unit is used for latching the signal input from the signal input unit and outputting a latched processed signal
to the pull-down unit;

the pull-down unit is used for outputting the first level signal or a pull-down signal to the signal output unit under the
control of the latched processed signal; and

the signal output unit is used for receiving and inverting the signal output from the pull-down unit to generate an output
signal, and outputting a signal being opposite to the output signal,

wherein the pull-down unit includes a fourth thin film transistor T4 and a fifth thin film transistor T5;

the fourth thin film transistor T4 has a drain connected to a drain of the fifth thin film transistor T5 and the signal output unit, a gate connected to a gate of the fifth thin film transistor T5 and a second terminal of the latch unit, and a source connected to a pull-down signal; and

the fifth thin film transistor T5 has a source directly connected to the signal output unit and the first level signal input terminal.

US Pat. No. 9,459,721

ACTIVE MATRIX ORGANIC LIGHT EMITTING DIODE PIXEL UNIT CIRCUIT, DISPLAY PANEL AND ELECTRONIC PRODUCT

CHENGDU BOE OPTOELECTRONI...

1. An Active Matrix Organic Light Emitting Diode (AMOLED) pixel unit circuit, comprising a light emitting module, a driving
module, a threshold compensating module, a light emission controlling module, a touch sensing module and an induction signal
outputting module,
wherein the driving module is configured to amplify an induction signal generated by the touch sensing module, output the
induction signal through the induction signal outputting module, and drive the light emitting module;

the light emission controlling module is configured to control the light emitting module to emit light;
the threshold compensating module is configured to compensate a threshold voltage for the driving module;
the touch sensing module is configured to generate the induction signal and output the induction signal to the driving module;
and

the induction signal outputting module is configured to output the induction signal amplified by the driving module;
wherein the driving module comprises a first transistor, a gate electrode of which is coupled to a first node of the circuit,
and the other two electrodes of which are coupled to a second node and a third node of the circuit, respectively, wherein
the first node is a connection point between the driving module and the threshold compensating module, the second node is
a common connection point among the driving module, the light emission controlling module, and the threshold compensating
module, and the third node is a common connection point among the driving module, the light emission controlling module and
the induction signal outputting module;

wherein the light emission controlling module comprises a second transistor and a fifth transistor, wherein a gate electrode
of the second transistor is coupled to a first control signal line of the AMOLED pixel unit circuit at the same stage, and
the other two electrodes are coupled to a power line and the second node of the circuit, respectively, and wherein a gate
electrode of the fifth transistor is coupled to a second control line of the AMOLED pixel unit circuit at the same stage,
and the other two electrodes are coupled to the third node of the circuit and the light emitting module, respectively;

wherein the light emitting module comprises a first LED, one end of which is coupled to the fifth transistor and the other
end of which is coupled to a low voltage level signal line;

wherein the threshold compensating module comprises a third transistor and a first capacitor,
wherein a gate electrode of the third transistor is coupled to a third control signal line of the AMOLED pixel unit circuit
at the same stage, and the other two electrodes are coupled to the second node and the first node, respectively, and wherein
the first capacitor is coupled between the first node and the low voltage level signal line; and

wherein the touch sensing module comprises a sixth transistor and a second LED, a gate electrode of the sixth transistor is
coupled to a first control signal line of an AMOLED pixel unit circuit at the previous stage, the other two electrodes are
coupled to the second LED and the first node, respectively, one end of the second LED is coupled to the sixth transistor,
and the other end is coupled to the low voltage level signal line; or
the touch sensing module comprises the sixth transistor and an induction capacitor, the gate electrode of the sixth transistor
is coupled to the first control signal line the AMOLED pixel unit circuit at the previous stage, the other two electrodes
are coupled to the induction capacitor and the first node, respectively, one end of the induction capacitor is coupled to
the sixth transistor, and the other end detects a touch signal.

US Pat. No. 9,349,319

AMOLED DRIVING CIRCUIT, AMOLED DRIVING METHOD, AND AMOLED DISPLAY DEVICE

BOE TECHNOLOGY GROUP CO.,...

1. An AMOLED driving circuit, comprising:
a light emitting device, a first switching transistor, a second switching transistor, a third switching transistor, a fourth
switching transistor, a fifth switching transistor, a voltage regulator, a driving transistor and a capacitor, the first switching
transistor, the second switching transistor, the third switching transistor, the fourth switching transistor, the fifth switching
transistor and the driving transistor are all N-type thin film transistors, wherein,

a gate of the first switching transistor is connected with a first control line, a first electrode of the first switching
transistor is connected with a data line, and a second electrode of the first switching transistor is connected with a first
terminal of the capacitor;

a gate of the second switching transistor is connected with a second control line, a first electrode of the second switching
transistor is connected with the first terminal of the capacitor, a second electrode of the second switching transistor is
connected with and a gate of the driving transistor;

a gate of the third switching transistor is connected with the first control line, a first electrode of the third switching
transistor is connected with the gate of the driving transistor, a second electrode of the third switching transistor is connected
with a second electrode of the driving transistor and negative electrode of the light emitting device;

a gate of the fifth switching transistor is connected with the second control line, a first electrode of the fifth switching
transistor is connected with a reference voltage power supply, and a second electrode of the fifth switching transistor is
connected with a first electrode of the driving transistor;

the first electrode of the driving transistor is connected with a second terminal of the capacitor, and the second electrode
of the driving transistor is connected with the negative electrode of the light emitting device;

a gate of the fourth switching transistor is connected with the first control line, a first electrode of the fourth switching
transistor is connected with a positive electrode of the light emitting device, and a second electrode is connected with the
negative electrode of the light emitting device,

the positive electrode of the light emitting device is connected with a high voltage power supply, and a level of the high
voltage power supply is higher than a level of the reference voltage power supply,

wherein in a first stage, the first control line is at an active level, the first switching transistor, the third switching
transistor and the fourth switching transistor are turned on so that the data line provides a voltage to the capacitor; the
second control line is at an inactive level, the second switching transistor and the fifth switching transistor are turned
off, such that the first electrode of the capacitor is charged to a voltage at the data line and the second electrode of the
capacitor is charged to a voltage equal to the voltage at the high voltage power supply minus a threshold voltage of the driving
transistor, wherein the threshold voltage of the driving transistor is bigger than 0;

in a second stage, the first control line is at an inactive level, the first switching transistor, the third switching transistor
and the fourth switching transistor are turned off; the second control line is at an inactive level, the second switching
transistor and the fifth switching transistor are turned off so that the capacitor remains the voltage; and

in a third stage, the first control line is at an inactive level, the first switching transistor, the third switching transistor
and the fourth switching transistor are turned off; the second control line is at an active level, the second switching transistor
and the fifth switching transistor are turned on so that the driving transistor drives the light emitting device to emit light.

US Pat. No. 10,627,678

DISPLAY APPARATUS HAVING TRANSPARENT MAGNETIC LAYER, AND FABRICATING METHOD THEREOF

BOE Technology Group Co.,...

1. A display apparatus, comprising:a display module comprising a first display substrate and a second display substrate facing the first display substrate;
a touch panel on a side of the second display substrate distal to the first display substrate; and
a first substantially transparent magnetic layer and a second substantially transparent magnetic layer both of which on a side of the second display substrate distal to the first display substrate and spaced apart from each other;
wherein the first substantially transparent magnetic layer is on a side of the second substantially transparent magnetic layer distal to the second display substrate; and
the first substantially transparent magnetic layer and the second substantially transparent magnetic layer are configured to face each other with their sides having a same magnetic polarity to generate a mutually repulsive force between each other;
wherein the touch panel comprises a base substrate;
the first substantially transparent magnetic layer is on a side of the base substrate proximal to the second display substrate; and
the second substantially transparent magnetic layer is on the side of the second display substrate proximal to the touch panel.

US Pat. No. 10,591,789

CONNECTOR, DISPLAY SCREEN AND METHOD FOR MANUFACTURING THE DISPLAY SCREEN

BOE Technology Group Co.,...

1. A display screen, comprising: a display panel, a driver IC and a connector,wherein the driver IC is arranged on a non-display side of the display panel, and the connector is configured to connect the display panel and the driver IC; and
the connector comprises a substrate on which a conductor structure is arranged, one end of the conductor structure is connected to a data signal line on the display panel, the other end of the conductor structure is connected to the driver IC arranged on the non-display side of the display panel, and a target surface, away from the substrate, of the conductor structure is uneven,
wherein the display panel comprises: a substrate base, and an active layer, a first gate insulating layer, a first gate signal line, a second gate insulating layer, a second gate signal line, an interlayer dielectric layer and a data signal line which are arranged on the substrate base in sequence;
the connector comprises a substrate on which two conductor layers and two target insulating layers are arranged, the two target insulating layers being stacked between the two conductor layers;
wherein the first conductor layer close to the substrate is formed of the same material layer as that of the first gate signal line; the first target insulating layer close to the substrate is formed of the same material layer as that of the second gate insulating layer; the second target insulating layer close to the substrate is formed of the same material layer as that of the interlayer dielectric layer; the second conductor layer close to the substrate is formed of the same material layer as that of the data signal line; and
the second conductor layer close to the substrate is connected to the data signal line, and any one of the two conductor layers is connected to the driver IC.