US Pat. No. 9,453,906

PHASE CALIBRATION CIRCUIT AND METHOD FOR MULTI-CHANNEL RADAR RECEIVER

North Carolina State Univ...

20. A phase calibration method for adjusting a plurality of frequency-modulated carrier-wave (FMCW) radar receiver chips to
have reduced phase offset comprising:
providing a circuit comprising a single local oscillator reference and built-in-test circuitry; said built-in-test circuitry
comprising phase shifters, a multi-frequency nonlinear phase detection circuit, and power coupling circuits;

splitting a signal in a first splitter;
adjusting an output from said splitter in a first phase shifter;
splitting output from a first amplifier circuit in a second splitter;
adding a signal A and a signal B in a first adder;
applying outputs of said first adder to a phase detection circuit;
integrating phase difference signal from said phase detection circuit;
outputting said integrated signal to said first amplifier; and
converging in negative feedback loop whereby phase offset is reduced.

US Pat. No. 9,094,026

DIGITAL PHASE-LOCKED LOOP DEVICE WITH AUTOMATIC FREQUENCY RANGE SELECTION

Asahi Kasei Microdevices ...

1. A digital phase-locked loop (DPLL) device with automatic frequency range selection, comprising:
a multiband voltage-controlled oscillator (VCO) module comprising
an output configured to deliver a VCO signal with a VCO frequency pertaining to one frequency range selected among several
frequency ranges;

at least one digital input configured to select the frequency range based on a code value received at the digital input; and
an analog input configured to receive a VCO-control voltage so each value for the VCO frequency within the frequency range
selected is produced for one value of the VCO-control voltage;

a frequency converter configured to connect with the VCO signal and to output a phase signal derived from the VCO signal by
Q-dividing the VCO frequency, wherein Q is a non-zero division factor;

a time-to-digital converter comprising a first input to receive a reference phase signal from a reference clock, and a second
input to receive the phase signal outputted by the frequency converter, and an output to deliver a digital PLL-error signal;

a digital loop filter comprising
an input connected to the output of the time-to-digital converter; and
a VCO-loop output to deliver a digital VCO-control signal based on filtering of the digital PLL-error signal as received at
the input of the digital loop filter;

a digital-to-analog converter connected at an input to the VCO-loop output of the digital loop filter, and connected at an
output to the analog input of the multiband VCO module, to produce the VCO-control voltage based on the digital VCO-control
signal;

wherein the digital loop filter further has a DCO-loop output suitable for delivering the code value based on a filtering
of the digital PLL-error signal as received at the input of the digital loop filter;

and wherein the DPLL device further comprises
a lock detector configured to detect from the digital PLL-error signal whether a lock condition of the DPLL device is met;
and

a DCO controller configured to transmit the code value to the digital input of the multiband VCO module, and to control several
successive operations of the DPLL device, comprising

at least one frequency range selection operation where the VCO-control voltage is maintained at fixed voltage value and the
code value varies until the lock condition is met; and

an analog VCO-tuning operation where a final code value corresponding to the meeting of the lock condition is maintained at
the digital input of the multiband VCO module and the digital VCO-control signal varies so as to maintain the lock condition.

US Pat. No. 9,246,502

CONTROL METHOD OF D/A CONVERTER, D/A CONVERTER, CONTROL METHOD OF A/D CONVERTER, AND A/D CONVERTER

Asahi Kasei Microdevices ...

1. A D/A converter, comprising:
a D/A conversion unit including an operational amplifier and a feedback switch, the feedback switch including a PMOS transistor
and an NMOS transistor connected in parallel to the PMOS transistor and being provided in a feedback portion of the operational
amplifier; and

a control unit changing an on-timing of at least one of the PMOS transistor and the NMOS transistor.

US Pat. No. 9,453,890

MAGNETIC SENSOR AND MAGNETIC DETECTING METHOD OF THE SAME

Asahi Kasei Microdevices ...

1. A magnetic sensor comprising:
a plurality of magnetic flux concentrator units substantially parallel to each other and substantially parallel to a substrate,
one of two adjacent ones of the plurality of magnetic flux concentrator units being displaced with respect to another of the
two adjacent ones in a longitudinal direction;

a plurality of magnetic detectors substantially parallel to the plurality of magnetic flux concentrator units, disposed between
two adjacent magnetic flux concentrator units of the plurality of magnetic flux concentrator units in a planar view;

wherein, the plurality of magnetic detectors includes a first and a second magnetic detectors disposed to be close to the
two adjacent ones of the plurality of magnetic flux concentrator units, respectively, in the planar view.

US Pat. No. 9,299,831

FIELD EFFECT TRANSISTOR AND SEMICONDUCTOR DEVICE

Asahi Kasei Microdevices ...

1. A field effect transistor comprising:
a drift region of a first conductivity type disposed between a region to be a channel of a semiconductor substrate and a drain
of a first conductivity type;

a field oxide film disposed on the drift region; and
a first impurity diffusion layer of a second conductivity type disposed beneath the drift region of the semiconductor substrate,
wherein the drift region includes a first drift layer of a first conductivity type, and a second drift layer, disposed on
the first drift layer, having a higher first conductivity type impurity concentration than the first drift layer.

US Pat. No. 9,219,415

SWITCHING POWER SUPPLY CIRCUIT

Asahi Kasei Microdevices ...

1. A switching power supply circuit for supplying a power supply voltage to a load through a transmission line, the switching
power supply circuit comprising:
a voltage conversion unit for receiving an input voltage, converting the input voltage into an output voltage having a magnitude
corresponding to a control signal, and outputting the output voltage to the transmission line;

a signal generation unit for generating a signal corresponding to a voltage to be dropped in the transmission line on the
basis of a current flowing through the transmission line, the signal generation unit including a sense resistance electrically
connected in series to the transmission line, and a level shift circuit for level-shifting a voltage across both ends of the
sense resistance to a voltage based on a reference voltage corresponding to the power supply voltage; and

a low pass filter for receiving the signal generated in the signal generation unit, smoothing the input signal, and outputting
the control signal to the voltage conversion unit, the low pass filter including a resistance element having one end connected
to an output end of the level shift circuit, and a capacitance element having one end connected to the other end of the resistance
element, and the other end connected to a reference voltage terminal having the reference voltage.

US Pat. No. 9,063,198

CURRENT SENSOR HAVING SELF-DIAGNOSIS FUNCTION AND SIGNAL PROCESSING CIRCUIT

Asahi Kasei Microdevices ...

1. A current sensor having a self-diagnosis function comprising:
an offset component output circuit which extracts an offset component by frequency modulation from an output signal of a Hall
element including a signal component and an offset component;

a reference signal output unit which outputs a reference signal; and
an error signal generation circuit generating an error signal based on the offset component which the offset component output
circuit outputs and the reference signal.

US Pat. No. 9,343,554

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME

Asahi Kasei Microdevices ...

1. A semiconductor device, comprising:
a collector region formed in a substrate;
a base layer formed on the collector region;
an emitter region formed in an upper part of the base layer;
an insulating film formed on the base layer to partially cover a joint portion of the base layer and the emitter region; and
an emitter electrode made of a polysilicon film formed on the emitter region,
wherein a density of halogen existent at an interface between the joint portion and the insulating film is equal to or higher
than 1×1020 cm?3.

US Pat. No. 9,136,833

POWER SOURCE CONNECTION CIRCUIT

Asahi Kasei Microdevices ...

1. A power source connection circuit, comprising:
a MOS switch having a drain connected to an input terminal and a source connected to an output terminal;
a step-up circuit for supplying electric charges to a gate of the MOS switch;
an electric-charge discharging unit coupled between the gate and a ground terminal; and
a comparator for comparing a voltage of the output terminal with a reference voltage,
wherein the electric-charge discharging unit includes:
a switch coupled between the gate and the ground terminal, and
a clock signal providing unit for providing a clock signal to a control terminal of the switch according to an output signal
of the comparator.

US Pat. No. 9,625,278

ROTATION ANGLE MEASUREMENT APPARATUS

Asahi Kasei Microdevices ...

1. A rotation angle information output apparatus comprising:
a plurality of Hall elements;
a magnetic flux concentrator provided on magnetosensitive planes of the plurality of Hall elements;
a rotating magnet arranged in proximity to the magnetic flux concentrator to cover the magnetic flux concentrator in a planer
view;

an angle information output unit configured to output a plurality of pieces of rotation angle information of the rotating
magnet; and

a failure information output unit configured to output failure information in consideration of the plurality of pieces of
rotation angle information when at least a part of the rotation angle information output apparatus has a failure.

US Pat. No. 9,432,049

INCREMENTAL DELTA-SIGMA A/D MODULATOR AND A/D CONVERTER

Asahi Kasei Microdevices ...

1. An incremental delta-sigma A/D modulator comprising:
an analog integrator configured to integrate input signals;
a quantizer configured to quantize output signals of the analog integrator;
a D/A converter configured to D/A convert based on an output of the quantizer; and
a reset signal output device configured to output a reset signal for resetting the analog integrator, the incremental delta-sigma
A/D modulator operating at a predetermined oversampling ratio,

wherein the analog integrator includes a first plurality of switched capacitors, an operational amplifier connected to the
first plurality of switched capacitors, and a feedback capacitor connecting an input and an output of the operational amplifier;

respective identical signals are input to respective corresponding switched capacitors of the first plurality of switched
capacitors, and

the first plurality of switched capacitors are configured to sequentially transfer electric charges stored in the respective
switched capacitors to the feedback capacitor at each oversampling of the incremental delta-sigma A/D modulator.

US Pat. No. 9,236,875

D/A CONVERTER

Asahi Kasei Microdevices ...

1. A D/A converter comprising:
a first capacitative element unit including a plurality of capacitative elements configured to store a first charge depending
on a reference voltage corresponding to a first digital code;

a first switching element unit including a plurality of switching elements configured to store the first charge in the plurality
of capacitative elements of the first capacitative element unit, respectively, and to transfer the first charge;

a second capacitative element unit including a plurality of capacitative elements configured to store a second charge depending
on a reference voltage corresponding to a second digital code;

a second switching element unit including a plurality of switching elements configured to store the second charge in the plurality
of capacitative elements of the second capacitative element unit, respectively, and to transfer the second charge;

an integral capacity element to which the first and the second charges stored in the first capacitative element unit and the
second capacitative element unit are transferred; and

an operational amplifier connected to the first switching element unit and the second switching element unit, wherein
the first switching element unit is configured to store the first charge in the plurality of capacitative elements of the
first capacitative element unit at different sampling timings for the plurality of capacitative elements of the first capacitative
element unit, the different sampling timings being within a time interval after a previous transferring of the first charge
stored in the first capacitative element unit to the integral capacity element and before a subsequent transferring of the
first charge stored in the first capacitative element unit to the integral capacity element, and

the second switching element unit is configured to store the second charge in the plurality of capacitative elements of the
second capacitative element unit at different sampling timings for the plurality of capacitative elements of the second capacitative
element unit, the different sampling timings being within a time interval after a previous transferring of the second charge
stored in the second capacitative element unit to the integral capacity element and before a subsequent transferring of the
second charge stored in the second capacitative element unit to the integral capacity element.

US Pat. No. 9,142,608

MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE

Asahi Kasei Microdevices ...

1. A manufacturing method of a semiconductor device comprising:
(a) a step of preparing a semiconductor substrate;
(b) a step of forming a first insulating film on the semiconductor substrate;
(c) a step of forming a first conductive film on the first insulating film;
(d) a step of forming a second insulating film on the first conductive film;
(e) a step of forming a second conductive film on the second insulating film;
(f) a step of forming a first electrode made of the second conductive film by patterning the second conductive film; and
(g) after the step (f), a step of forming a capacitive film made of the second insulating film and disposed under the first
electrode and a second electrode made of the first conductive film and disposed under the capacitive film by patterning the
second insulating film and the first conductive film,

wherein, in the step (g), a capacitive element is formed from the first electrode, the capacitive film, and the second electrode,
the step (c) includes:
(c1) a step of forming a first film containing titanium on the first insulating film;
(c2) a step of forming a second film containing titanium and nitrogen on the first film;
(c3) a step of forming a third film containing aluminum on the second film;
(c4) a step of forming a fourth film containing titanium on the third film; and
(c5) a step of forming a fifth film containing titanium and nitrogen on the fourth film,
in the step (c), the first conductive film composed of the first film, the second film, the third film, the fourth film, and
the fifth film is formed by performing the step (c1), the step (c2), the step (c3), the step (c4), and the step (c5), and

a ratio of a surface roughness of an upper surface of the first conductive film to a thickness of the second insulating film
is 14% or less.

US Pat. No. 9,046,410

LIGHT RECEIVING DEVICE

Asahi Kasei Microdevices ...

1. A light receiving device comprising a circuit pattern including a first light receiving part, a second light receiving
part, a first output terminal, and a second output terminal, which are formed on a same substrate, each of the first light
receiving part and the second light receiving part having:
a semiconductor layered part forming a PN or PIN junction photodiode structure having a first conductivity type semiconductor
layer and a second conductivity type semiconductor layer;

a first electrode connected to the first conductivity type semiconductor layer; and
a second electrode connected to the second conductivity type semiconductor layer,
wherein the first electrode of the first light receiving part is connected to the first electrode of the second light receiving
part,

the second electrode of the first light receiving part is connected to the first output terminal,
the second electrode of the second light receiving part is connected to the second output terminal, and
wherein a difference between signals generated in the first light receiving part and the second light receiving part is output
between the first output terminal and the second output terminal.

US Pat. No. 9,263,932

DC-DC CONVERTER

Asahi Kasei Microdevices ...

1. A DC-DC converter for operating in a bypass mode of outputting the input voltage, unchanged, from an output terminal as
an output voltage when an input voltage applied at an input terminal is higher than the predetermined voltage and for operating
in a boost mode of increasing the input voltage and outputting the output voltage from the output terminal when the input
voltage is lower than the predetermined voltage, comprising:
an error amplifier for outputting an error between an output voltage and a predetermined voltage;
a phase compensation impedance element for performing phase compensation, and for accumulating the error across one end to
generate an error voltage;

a determination unit for monitoring a voltage output of the error amplifier to determine whether the voltage output of the
error amplifier is higher, or lower than a reference voltage according to the predetermined voltage, and for outputting a
determination signal indicating results of the determination; and

a voltage setting unit comprising:
a first latch circuit for receiving the determination signal at a set terminal, and for outputting a first output signal and
a second output signal having an opposite polarity of the first output signal;

a first switch, connected between an output terminal of the error amplifier and one end of the phase compensation impedance
element, for receiving the second output signal and the first switch is turned on when the second output signal have the same
polarity as that of the determination signal, or is turned off when the second output signal has an opposite polarity of the
determination signal; and

a second switch, connected between one end and the other end of the phase compensation impedance element, for receiving the
first output signal and the second switch is turned on when the first output signal has the same polarity as that of the determination
signal, or is turned off when the second output signal has an opposite polarity of the determination signal.

US Pat. No. 9,134,383

HALL DEVICE, MAGNETIC SENSOR HAVING SAME, AND SIGNAL CORRECTING METHOD THEREOF

Asahi Kasei Microdevices ...

1. A Hall device comprising:
a p-type impurity region; and
an n-type impurity region disposed on the p-type impurity region and serving as a magnetosensitive portion,
wherein an n-type impurity concentration N (atoms/cm3) and a distribution depth D (?m) of the n-type impurity region satisfy following relational expressions:

N<1.0×1016 and

N>3.802×1016×D?1.761,

wherein the n-type impurity concentration N represents a maximum concentration of the n-type impurity concentration in the
n-type impurity region and the distribution depth D represents a length in depth direction from a point at which the n-type
impurity concentration is a maximum to a point at which the n-type impurity concentration is 1/10 of the n-type impurity concentration
N.

US Pat. No. 9,048,252

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

Asahi Kasei Microdevices ...

1. A semiconductor device comprising a MOS transistor, the MOS transistor comprising:
a source region and a drain region both formed in a semiconductor substrate; and
a channel region formed between the source region and the drain region, wherein
a concentration of a charged particle which is emitted from a first impurity with a first polarity injected in the channel
region and which contributes to an electrical conduction in the channel region is lower at a side close to the drain region
than at a side close to the source region,

the drain region includes a drift region into which a second impurity with a second polarity is injected, and
the drift region extends toward the channel region from the drain region to form an extending portion that is immediately
below the channel region.

US Pat. No. 9,581,426

MAGNETIC FIELD MEASURING DEVICE

Asahi Kasei Microdevices ...

1. A magnetic field measuring device that detects the strength of a magnetic field produced from a magnetic field-producing
body, comprising:
first to fourth magnetoelectric transducers;
magnetic convergence plates made up of a magnetic body; and
a calculation unit that calculates the strength of a magnetic field applied in a horizontal direction and/or a vertical direction
with respect to a magneto-sensing surface of the magnetoelectric transducers;

wherein the magnetic convergence plates are placed in the vicinity of the first to fourth magnetoelectric transducers so as
to

convert magnetic field vectors produced in a horizontal direction with respect to the magneto-sensing surface of the first
magnetoelectric transducer and the magneto-sensing surface of the second magnetoelectric transducer into magnetic field vectors
in a vertical direction with respect to the magneto-sensing surface of the first magnetoelectric transducer and the magneto-sensing
surface of the second magnetoelectric transducer, and also in opposite directions at the respective magneto-sensing surfaces,
and further,

convert magnetic field vectors produced in a horizontal direction with respect to the magneto-sensing surface of the third
magnetoelectric transducer and the magneto-sensing surface of the fourth magnetoelectric transducer into magnetic field vectors
in a vertical direction with respect to the magneto-sensing surface of the third magnetoelectric transducer and the magneto-sensing
surface of the fourth magnetoelectric transducer, and also in opposite directions at the respective magneto-sensing surfaces,
and

wherein the calculation unit comprises a first calculation block that adds or subtracts outputs from the first to fourth magnetoelectric
transducers to output a calculation result.

US Pat. No. 9,395,422

MAGNETISM DETECTION DEVICE AND MAGNETISM DETECTION METHOD

Asahi Kasei Microdevices ...

1. A magnetism detection device comprising:
a hall sensor that detects magnetism;
a bias generating unit that drives the hall sensor;
a switch unit that is connected to the hall sensor, that carries out a switch operation of switching a direction of current
flown from the bias generating unit across two opposite terminals of four terminals of the hall sensor, and switching the
direction of a voltage to be available in remaining two opposite terminals in a direction orthogonal to the direction of the
current, so that in a first period, a polarity of a hall electromotive force of the hall sensor is a first polarity and a
polarity of the hall offset voltage of the hall sensor alternates four times, and in a second period, the polarity of the
hall electromotive force of the hall sensor is a second polarity opposite to the first polarity and the polarity of the hall
offset voltage of the hall sensor alternates four times;

an amplifier that amplifies the voltage made available by the switch operation of the switch unit; and
a reversing unit that reverses the polarity of the voltage from the amplifier in synchronization with the switching operation
between the first period and the second period out of switching operations of the current and the voltage switched by the
switch unit,

wherein the switch unit carries out, in the first period:
a first switch operation of connecting the bias generating unit with a first terminal of the hall sensor and a second terminal
of the hall sensor opposite to the first terminal so that the current is to be flown from the first terminal toward the second
terminal, and also connecting a third terminal of the hall sensor and a fourth terminal of the hall sensor opposite to the
third terminal with a positive input terminal and a negative input terminal of the amplifier, respectively;

a second switch operation of connecting the bias generating unit with the third terminal and the fourth terminal so that the
current is to be flown from the third terminal toward the fourth terminal, and also connecting the second terminal and the
first terminal with the positive input terminal and the negative input terminal of the amplifier, respectively;

a third switch operation of connecting the bias generating unit with the second terminal and the first terminal so that the
current is to be flown from the second terminal toward the first terminal, and also connecting the fourth terminal and the
third terminal with the positive input terminal and the negative input terminal of the amplifier, respectively; and

a fourth switch operation of connecting the bias generating unit with the fourth terminal and the third terminal so that the
current is to be flown from the fourth terminal toward the third terminal, and also connecting the first terminal and the
second terminal with the positive input terminal and the negative input terminal of the amplifier, respectively, and

wherein the switch unit carries out, in the second period:
a fifth switch operation of connecting the bias generating unit with the first terminal and the second terminal so that the
current is to be flown from the first terminal toward the second terminal, and also connecting the fourth terminal and the
third terminal with the positive input terminal and the negative input terminal of the amplifier, respectively;

a sixth switch operation of connecting the bias generating unit with the third terminal and the fourth terminal so that the
current is to be flown from the third terminal toward the fourth terminal, and also connecting the first terminal and the
second terminal with the positive input terminal and the negative input terminal of the amplifier, respectively;

a seventh switch operation of connecting the bias generating unit with the second terminal and the first terminal so that
the current is to be flown from the second terminal toward the first terminal, and also connecting the third terminal and
the fourth terminal with the positive input terminal and the negative input terminal of the amplifier, respectively; and

an eighth switch operation of connecting the bias generating unit with the fourth terminal and the third terminal so that
the current is to be flown from the fourth terminal toward the third terminal, and also connecting the second terminal and
the first terminal with the positive input terminal and the negative input terminal of the amplifier, respectively.

US Pat. No. 9,385,553

BALANCE CHARGING CIRCUIT FOR SERIES-CONNECTED STORAGE CELLS AND BALANCE CHARGING METHOD FOR SERIES-CONNECTED STORAGE CELLS

Asahi Kasei Microdevices ...

1. A balance charging circuit for series-connected storage cells for charging, in a balanced manner, a first storage cell
and a second storage cell connected in series and having one series-connected end connected to an output terminal and another
series-connected end connected to a reference voltage terminal, the balancing charging circuit comprising:
a coil provided in common for the first storage cell and the second storage cell and temporarily storing a power supplied
from a power supply to charge the first storage cell and the second storage cell; and

a switch section for electrically connecting the coil to one of the first storage cell and the second storage cell to charge
the one of the first storage cell and the second storage cell, and then for electrically connecting the coil to the other
one of the first storage cell and the second storage cell to charge the other one of the first storage cell and the second
storage cell;

wherein the switch section includes a plurality of switches for switching a path of a charging current flowing in the coil,
the balance charging circuit further comprising:
a control circuit for controlling the plurality of switches to be turned on and off and for setting repeatedly in turn a first
charging period in which the coil is charged with a charging current to charge the second storage cell, a second charging
period in which the second storage cell is charged with the charging current thus charged in the coil, a third charging period
in which the coil is charged with a charging current to charge the first storage cell, and a fourth charging period in which
the first storage cell is charged with the charging current thus charged in the coil, wherein:

in the first charging period, the control circuit controls the plurality of switches to be turned on and off to form a path
of a charging current flowing into the reference voltage terminal through the coil;

in the second charging period, the control circuit controls the plurality of switches to be turned on and off to form a path
of a charging current flowing into the second storage cell from the coil; and

in the third charging period, the control circuit controls the plurality of switches to be turned on and off to form a path
of a charging current flowing into the reference voltage terminal through the coil; and

in the fourth charging period, the control circuit controls the plurality of switches to be turned on and off to electrically
conduct one end of the coil to one end of the first storage cell, electrically conduct another end of the coil to another
end of the first storage cell, and form a path of a charging current flowing into the first storage cell from the coil;

wherein the plurality of switches includes:
a first switch having one end connected to a contact point where the first storage cell and the second storage cell are connected
to each other,

a second switch having one end connected to an input terminal,
a third switch having one end connected to the reference voltage terminal,
a fourth switch having one end connected to the output terminal,
a fifth switch having one end connected to the reference voltage terminal, and
a sixth switch having one end connected to the contact point where the first storage cell and the second storage cell are
connected to each other,

wherein one end of the coil is connected to another end of the first switch, another end of the second switch, and another
end of the third switch, and another end of the coil is connected to another end of the fourth switch, another end of the
fifth switch, and another end of the sixth switch, and

wherein in the first charging period, the control circuit turns on the second and sixth switches and turns off the first,
third, fourth, and fifth switches,

in the second charging period, the control circuit turns on the third and sixth switches and turns off the first, second,
fourth, and fifth switches,

in the third charging period, the control circuit turns on the second and fifth switches and turns off the first, third, fourth,
and sixth switches, and

in the fourth charging period, the control circuit turns on the first and fourth switches and turns off the second, third,
fifth, and sixth switches.

US Pat. No. 9,374,104

SAMPLE HOLD CIRCUIT, A/D CONVERTER, CALIBRATION METHOD OF THE SAMPLE HOLD CIRCUIT, AND CIRCUIT

Asahi Kasei Microdevices ...

1. A sample hold circuit, comprising:
a sampling capacitor;
a first amplifier having an input end to which the sampling capacitor is connected; and
a second amplifier connected to the first amplifier,
wherein the second amplifier comprises:
a differential pair;
a load unit connected to the differential pair; and
a variable current unit configured to supply a current to at least one of the differential pair or the load unit, and
wherein in a holding phase, the second amplifier is configured to monitor a voltage at a summing point that is a connection
point of the sampling capacitor at the input end of the first amplifier.

US Pat. No. 9,666,287

VOLTAGE DETECTOR, METHOD FOR SETTING REFERENCE VOLTAGE AND COMPUTER READABLE MEDIUM

Asahi Kasei Microdevices ...

1. A voltage detector for detecting whether an input voltage is no lower than a predetermined threshold voltage, comprising:
a reference voltage generator configured to generate a reference voltage; and
a comparator configured to receive the input voltage and the reference voltage and to detect whether the input voltage is
no lower than the threshold voltage that is determined by the reference voltage, wherein

the reference voltage generator includes:
a first write MOS transistor including a control gate and a floating gate;
a second write MOS transistor connected in series with the first write MOS transistor, the second write MOS transistor including
a control gate and a floating gate;

a first output MOS transistor including a control gate and a floating gate that are electrically connected to the control
gate and the floating gate of the first write MOS transistor; and

a second output MOS transistor connected in series with the first output MOS transistor, the second output MOS transistor
including a control gate and a floating gate that are electrically connected to the control gate and the floating gate of
the second write MOS transistor,

the first write MOS transistor and the second write MOS transistor each include a tunnel oxide film that allows electric charges
to tunnel therethrough to be injected into the floating gates, and

the first output MOS transistor and the second output MOS transistor do not include the tunnel oxide film and the reference
voltage is output from a connection point between the first output MOS transistor and the second output MOS transistor.

US Pat. No. 9,601,427

SEMICONDUCTOR DEVICE INCLUDING PLURAL TYPES OF RESISTORS AND MANUFACTURING METHOD OF THE SEMICONDUCTOR DEVICE

Asahi Kasei Microdevices ...

1. A semiconductor device, comprising:
a first metal wiring layer formed on a substrate;
an interlayer insulating film formed on the first metal wiring layer;
a second metal wiring layer formed on the interlayer insulating film;
a first resistor including a first resistance metal film formed between the first metal wiring layer and the second metal
wiring layer, a first insulating film formed on the first resistance metal film, and a second resistance metal film formed
on the first insulating film and being different in a sheet resistance from the first resistance metal film; and

a second resistor including a third resistance metal film formed between the first metal wiring layer and the second metal
wiring layer, a second insulating film formed on the third resistance metal film, and a fourth resistance metal film formed
on the second insulating film and being different in a sheet resistance from the third resistance metal film;

wherein the interlayer insulating film includes a first interlayer insulating film and a second interlayer insulating film
formed on the first interlayer insulating film,

wherein the first resistance metal film and the third resistance metal film are formed on the first interlayer insulating
film,

wherein the second metal wiring layer is formed on the second interlayer insulating film,
wherein the first resistor is formed by connecting the first resistance metal film and the first metal wiring layer through
two lower metal plugs that only penetrate through the first interlayer insulating film such that the entire second resistance
metal film is electrically insulated by only contacting with surrounding first dielectric materials,

wherein the second resistor is formed by connecting the fourth resistance metal film and the second metal wiring layer through
two upper metal plugs that only penetrate through the second interlayer insulating film such that the entire third resistance
metal film is electrically insulated by only contacting with surrounding second dielectric materials,

wherein the first resistance metal film and the third resistance metal film are made of a same material, and
wherein the second resistance metal film and the fourth resistance metal film are made of a same material.

US Pat. No. 9,599,681

MAGNETIC SENSOR AND MAGNETIC DETECTING METHOD OF THE SAME

Asahi Kasei Microdevices ...

1. A magnetic sensor comprising a first structure, the first structure comprising:
a first arrangement pattern; and
a second arrangement pattern,
wherein each of the first arrangement pattern and the second arrangement pattern comprises:
a first magnetic detection unit;
a second magnetic detection unit; and
a connecting unit configured to electrically connect the first magnetic detection unit and the second magnetic detection unit,
wherein each of the first magnetic detection unit and the second magnetic detection unit comprises:
a quadrangular magnetic sensitivity material having a first length in a longitudinal direction; and
a quadrangular magnetic convergence material having a second length in a longitudinal direction different from the first length
of the quadrangular magnetic sensitivity material,

wherein the first magnetic detection unit and the second magnetic detection unit of each of the first arrangement pattern
and the second arrangement pattern are arranged such that a first virtual line and a second virtual line are parallel to each
other, the first virtual line passing to be parallel to a plane of a substrate and passing through a midpoint in the longitudinal
direction of the quadrangular magnetic sensitivity material perpendicularly to the longitudinal direction of the quadrangular
magnetic sensitivity material, the second virtual line passing to be parallel to the plane of the substrate and passing through
a midpoint in the longitudinal direction of the quadrangular magnetic convergence material perpendicularly to the longitudinal
direction of the quadrangular magnetic convergence material,

wherein in each of the first arrangement pattern and the second arrangement pattern, the connecting unit is configured to
electrically connect the quadrangular magnetic sensitivity material of the first magnetic detection unit and the quadrangular
magnetic sensitivity material of the second magnetic detection unit in series with each other,

wherein in each of the first arrangement pattern and the second arrangement pattern, the quadrangular magnetic sensitivity
material of the first magnetic detection unit and the quadrangular magnetic sensitivity material of the second magnetic detection
unit are arranged between the quadrangular magnetic convergence material of the first magnetic detection unit and the quadrangular
magnetic convergence material of the second magnetic detection unit, and

wherein in each of the first arrangement pattern and the second arrangement pattern, the first magnetic detection unit and
the second magnetic detection unit are arranged to be line-symmetric to each other.

US Pat. No. 9,450,600

DIGITAL-ANALOG CONVERTER AND DIGITAL-ANALOG CONVERSION DEVICE EXECUTING DIGITAL-ANALOG CONVERSION AFTER DELTA SIGMA

Asahi Kasei Microdevices ...

1. A digital-analog converter comprising:
a first analog segment unit including a first sampling switch group and a first sampling capacitor group having a plurality
of capacitors, the plurality of capacitors being charged according to a signal level of a first digital signal in a sampling
phase;

a second analog segment unit including a second sampling switch group and a second sampling capacitor group having a plurality
of capacitors, the plurality of capacitors being charged according to a signal level of a second digital signal in the sampling
phase; and

a calculation unit including an operational amplifier and an integration capacitor, the calculation unit outputting an analog
signal according to a charged voltage of each capacitor of the first sampling capacitor group or a charged voltage of each
capacitor of the second sampling capacitor group in an integral phase, the operational amplifier having a summing node and
an output terminal, the integration capacitor being connected between the summing node and the output terminal,

wherein, one analog segment unit of the first and second analog segment units is in the sampling phase and disconnected to
the summing node while the other analog segment unit is in the integral phase and connected to the summing node.

US Pat. No. 9,864,038

HALL ELECTROMOTIVE FORCE COMPENSATION DEVICE AND HALL ELECTROMOTIVE FORCE COMPENSATION METHOD

Asahi Kasei Microdevices ...

1. A Hall electromotive force compensation device comprising:
a Hall element configured to generate a Hall electromotive force;
a compensation signal generation circuit configured to generate a compensation signal for compensating the Hall electromotive
force of the Hall element; and

a temperature measurement circuit configured to measure an environmental temperature of the Hall element to output temperature
information of the Hall element,

wherein the compensation signal generation circuit is configured to generate the compensation signal for compensating the
Hall electromotive force of the Hall element on a basis of information of temperature characteristic of a piezo-resistance
coefficient of the Hall element, information on temperature characteristic of a piezo-Hall coefficient of the Hall element,
and the temperature information of the Hall element output by the temperature measurement circuit.

US Pat. No. 9,467,603

POSITION DETECTION APPARATUS

Asahi Kasei Microdevices ...

16. A correction mechanism comprising:
a camera module configured to accommodate a lens, a first magnet for optical image stabilization, and a second magnet for
optical image stabilization;

the first magnet being arranged at a corner region in a first direction orthogonal to an optical axis direction in the camera
module and configured to move as the lens moves in an in-plane direction orthogonal to an optical axis;

the second magnet being arranged at a corner region in a second direction orthogonal to the optical axis direction different
from the first direction in the camera module and configured to move as the lens moves in the in-plane direction orthogonal
to the optical axis;

a first hall element configured to be arranged oppositely to the first magnet in the optical axis direction and to sense a
first magnetic field to be changed according to a movement of the first magnet in the plane orthogonal to the optical axis
direction of the first magnet;

a second hall element configured to be arranged oppositely to the second magnet in the optical axis direction and to sense
a second magnetic field to be changed according to a movement of the second magnet in the plane orthogonal to the optical
axis direction of the second magnet;

a first coil for the optical image stabilization configured to be provided in a vicinity of the first magnet and configured
such that an axial direction is arranged in parallel to the optical axis direction; and

a second coil for the optical image stabilization configured to be provided in a vicinity of the second magnet and configured
such that an axial direction is arranged in parallel to the optical axis direction,

wherein when an A axis is a first direction orthogonal to the optical axis and an X axis is an axis obtained by rotating the
A axis, the first hall element is configured to detect the position of the lens on the A axis and the position of the lens
on the X axis, and

wherein when a B axis is a second direction orthogonal to the optical axis and the first direction and a Y axis is an axis
obtained by rotating the B axis, the second hall element is configured to detect the position of the lens on the B axis and
the position of the lens on the Y axis.

US Pat. No. 9,448,256

CURRENT SENSOR SUBSTRATE AND CURRENT SENSOR

Asahi Kasei Microdevices ...

1. A current sensor substrate, comprising:
a primary conductor having a U-shaped current path;
a support portion for supporting a magneto-electric conversion element; and
a lead terminal connected to the support portion,wherein the U-shaped current path is not overlapped with the support portion in a plan view, while being formed so as to have
a height different from a height of the support portion in a side view.

US Pat. No. 9,438,776

POSITION DETECTION APPARATUS

Asahi Kasei Microdevices ...

16. A correction mechanism comprising:
a camera module configured to accommodate a lens, a first magnet for optical image stabilization, and a second magnet for
optical image stabilization;

the first magnet being arranged at a corner region in a first direction orthogonal to an optical axis direction in the camera
module and configured to move as the lens moves in an in-plane direction orthogonal to an optical axis;

the second magnet being arranged at a corner region in a second direction orthogonal to the optical axis direction different
from the first direction in the camera module and configured to move as the lens moves in the in-plane direction orthogonal
to the optical axis;

a first hall element configured to be arranged oppositely to the first magnet in the optical axis direction and to sense a
first magnetic field to be changed according to a movement of the first magnet in the plane orthogonal to the optical axis
direction of the first magnet;

a second hall element configured to be arranged oppositely to the second magnet in the optical axis direction and to sense
a second magnetic field to be changed according to a movement of the second magnet in the plane orthogonal to the optical
axis direction of the second magnet;

a first coil for the optical image stabilization configured to be provided in a vicinity of the first magnet and configured
such that an axial direction is arranged in parallel to the optical axis direction; and

a second coil for the optical image stabilization configured to be provided in a vicinity of the second magnet and configured
such that an axial direction is arranged in parallel to the optical axis direction,

wherein when an A axis is a first direction orthogonal to the optical axis and an X axis is an axis obtained by rotating the
A axis, the first hall element is configured to detect the position of the lens on the A axis and the position of the lens
on the X axis, and

wherein when a B axis is a second direction orthogonal to the optical axis and the first direction and a Y axis is an axis
obtained by rotating the B axis, the second hall element is configured to detect the position of the lens on the B axis and
the position of the lens on the Y axis.

US Pat. No. 9,407,799

POSITION DETECTION APPARATUS

Asahi Kasei Microdevices ...

1. A position detection apparatus that detects a position of a lens on a plane orthogonal to an optical axis direction of
the lens to detect a position for optical image stabilization, and detects a position of the lens in the optical axis direction
to detect a position for autofocus, the position detection apparatus comprising:
a magnet configured to move as the lens moves in the optical axis direction and in an in-plane direction orthogonal to the
optical axis, the magnet being made of a single body including an S pole and an N pole aligned in a direction parallel to
the optical axis direction, and the S pole and the N pole aligned in a direction orthogonal to the optical axis direction;

a first position sensor for the autofocus configured to sense a magnetic field to be changed according to the movement of
the magnet in the optical axis direction to detect the position of the lens in the optical axis direction; and

a second position sensor for the optical image stabilization configured to sense a magnetic field to be changed according
to the movement of the magnet in the plane orthogonal to the optical axis direction to detect the position of the lens on
the plane orthogonal to the optical axis direction.

US Pat. No. 9,166,476

CHARGE EXTRACTION CIRCUIT FOR VOLTAGE CONVERTER

Asahi Kasei Microdevices ...

1. A power supply circuit, comprising:
a voltage conversion circuit for outputting to an output voltage terminal an output voltage stepped up or down from an input
voltage applied to an input voltage terminal;

an output capacitor coupled to the output voltage terminal; and
a charge extraction circuit for extracting a charge from the output capacitor,
wherein:
the charge extraction circuit comprises a first switching device between the output voltage terminal and a ground terminal,
the charge extraction circuit further comprises a charge extraction portion coupled in series to the first switching device
between the output voltage terminal and the ground terminal,

the charge extraction portion extracts the charge from the output capacitor when the first switching device is turned on,
the charge extraction portion comprises a parallel circuit comprising the resistor and a capacitor coupled in parallel to
the resistor,

the charge extraction portion further comprises a second switching device directly physically and directly electrically coupled
in parallel to both terminals of the capacitor of the charge extraction portion, and

the second switching device is turned on when the first switching device is off.

US Pat. No. 10,101,368

CURRENT SENSOR

Asahi Kasei Microdevices ...

1. A current sensor comprising:a conductor through which a current to be measured flows;
a first magnetoelectric conversion element disposed near the conductor;
a second magnetoelectric conversion element disposed on the opposite side of the first magnetoelectric conversion element across the conductor;
an isolating member for supporting the first and second magnetoelectric conversion elements; and
a metal plate isolated from the conductor, and wherein:
the isolating member is not supported by the conductor, but is supported by the metal plate, and
a part of the conductor has a level difference, and the conductor is disposed so as not to contact with the isolating member by the level difference.

US Pat. No. 9,638,576

INFRARED-SENSOR FILTER MEMBER, MANUFACTURING METHOD THEREOF, INFRARED SENSOR, AND MANUFACTURING METHOD THEREOF

Asahi Kasei Microdevices ...

1. An infrared-sensor filter member, comprising:
an optical filter for an infrared sensor; and
a recess portion formed by one surface of the optical filter and a first member, wherein
a bottom surface of the recess portion includes a center portion formed by one surface of the optical filter and a peripheral
portion formed by the first member, and

side walls of the recess portion are formed by the first member.

US Pat. No. 9,577,124

INFRARED SENSOR AND METHOD FOR MANUFACTURING SAME, FILTER MEMBER FOR INFRARED SENSOR, AND PHOTOCOUPLER

Asahi Kasei Microdevices ...

1. An infrared sensor comprising:
a filter member;
a connection member; and
a sensor member,
wherein the filter member includes
a first lead terminal,
an optical filter, and
a first mold member configured to mold to the first lead terminal and the optical filter,
a light incidence surface and a light emission surface of the optical filter are exposed from the first mold member,
the sensor member includes
an infrared sensor element,
a second lead terminal electrically connected to the infrared sensor element, and
a second mold member configured to mold to the infrared sensor element and the second lead terminal,
a light-receiving surface of the infrared sensor element is exposed from the second mold member,
the filter member is disposed on the sensor member, wherein the light emission surface of the optical filter faces the light-receiving
surface of the infrared sensor element in the sensor member; and

the connection member is disposed between the filter member and the sensor member, and hollow portions are present between
the filter member and the sensor member.

US Pat. No. 9,535,139

MAGNETIC SENSOR

Asahi Kasei Microdevices ...

1. A magnetic sensor, comprising:
a Hall-effect sensor including a first output electrode pad and a second output electrode pad;
an IC including a first Hall output electrode pad, a second Hall output electrode pad, a signal processing unit, a first metal
interconnection connecting the first Hall output electrode pad and the signal processing unit, and a second metal interconnection
connecting the second Hall output electrode pad and the signal processing unit;

a first wire interconnection connecting the first output electrode pad of the Hall-effect sensor and the first Hall output
electrode pad of the IC; and

a second wire interconnection connecting the second output electrode pad of the Hall-effect sensor and the second Hall output
electrode pad of the IC, wherein

the first metal interconnection and the second metal interconnection are formed on the IC such that when the first and second
metal interconnections are projected on a plane parallel to a magneto-sensitive surface of the Hall-effect sensor, (1) at
least one of the projected first metal interconnection and the projected second metal interconnection crosses itself on the
plane, or (2) the projected first metal interconnection and the projected second metal interconnection cross each other on
the plane.

US Pat. No. 9,577,551

MOTOR DRIVE APPARATUS

Asahi Kasei Microdevices ...

1. A motor drive apparatus that controls a current flowing through a coil of a motor, comprising:
a comparing section that compares the current flowing through the coil to a control current input thereto;
an operation selecting section that selects an operational state from among a drive state, a regenerative state, and a braking
state, according to a comparison result of the comparing section;

a driving section that receives a designation signal designating a current mode that includes a conductive mode in which the
current flows through the coil and a stop mode in which the current flowing through the coil is stopped, drives the coil in
the operational state selected by the operation selecting section when the designation signal designating the conductive mode
is received, and drives the coil in the braking state when the designation signal designating the stop mode is received; and

a setting section that controls a start of the designation signal designating the stop mode or a start of a period during
which the control current is zero.

US Pat. No. 9,534,923

SENSOR DEVICE WITH SAMPLING FUNCTION, AND SENSOR DATA PROCESSING SYSTEM USING SAME

Asahi Kasei Microdevices ...

1. A sensor device with sampling functionality comprising:
a counter for counting the number of count commandsfor performing measurements while maintaining among multiple sensor devices a ratio of measurement intervals;
a ratio-of-measurement-intervals-holding-unitfor holding a setting value of desired ratio of measurement intervals;
a sampling-timing-generating-unitfor generating sampling timing signal from count value of the counter and the setting value of the ratio of measurement intervals
which value is held by the ratio-of-measurement-intervals-holding-unit, based on the comparison result between the count value
and the setting value; and
a sampling-unitfor starting, according to the sampling timing signal generated by the sampling-timing-generating-unit, the sampling of detected
signals of various types of information detected by detecting-unit.

US Pat. No. 9,513,348

HALL ELECTROMOTIVE FORCE SIGNAL DETECTION CIRCUIT AND CURRENT SENSOR THEREOF

Asahi Kasei Microdevices ...

1. A Hall electromotive force signal detection circuit configured to select a terminal position for applying a drive current
to a Hall element including a plurality of terminals and detect a Hall electromotive force signal voltage, the Hall electromotive
force signal detection circuit comprising:
one Hall element including one set of first to fourth terminals, for generating a Hall electromotive force signal voltage;
wherein the first terminal is disposed in a position having 0 degree angle with respect to a preset direction, the second
terminal is disposed in a position having 90 degree with respect to the preset direction, the third terminal is disposed in
a position having 180 degree with respect to the preset direction, and the fourth terminal is disposed in a position having
270 degree with respect to the preset direction;

another Hall element including another set of first to fourth terminals, for generating another Hall electromotive force signal
voltage;

wherein the first terminal is disposed in a position having 0 degree angle with respect to the preset direction, the second
terminal is disposed in a position having 90 degree with respect to the preset direction, the third terminal is disposed in
a position having 180 degree with respect to the preset direction, and the fourth terminal is disposed in a position having
270 degree with respect to the preset direction;

a first switching circuit for selecting a terminal position for applying a drive current from the first to fourth terminals
of the one Hall element;

a second switching circuit for selecting a terminal position for applying a drive current from the first to fourth terminals
of the another Hall element, the terminal position selected by the second switching circuit being different from the terminal
position selected by the first switching circuit;

a chopper clock generation circuit for supplying a chopper clock signal to the first switching circuit and the second switching
circuit; and

a Hall electromotive force signal addition circuit for simultaneously adding the Hall electromotive force signal voltage and
the another Hall electromotive force signal voltage,

wherein a layout of the Hall electromotive force signal detection circuit is that the one Hall element and the another Hall
element are arranged in parallel and adjacent to each other,

wherein the first switching circuit switches the terminal position for applying the drive current in the one Hall element
between the first terminal and the second terminal of the one Hall element based on the chopper clock signal generated by
the chopper clock generation circuit,

wherein the second switching circuit switches the terminal position for applying the drive current in the another Hall element
between the fourth terminal and the third terminal of the another Hall element based on the chopper clock signal generated
by the chopper clock generation circuit,

wherein the chopper clock generation circuit is a circuit for supplying the chopper clock signal having two different phases,
to the first switching circuit and the second switching circuit,

wherein, in the first switching circuit, the drive current is applied from the first terminal by electrifying the first terminal
and the third terminal when the chopper clock signal is in one of the two phases, and the drive current is applied from the
second terminal by electrifying the second terminal and the fourth terminal when the chopper clock signal is in another one
of the two phases,

wherein, in the second switching circuit, the drive current is applied from the fourth terminal by electrifying the second
terminal and the fourth terminal when the chopper clock signal is in the one of the two phases and the drive current is applied
from the third terminal by electrifying the third terminal and the first terminal when the chopper clock signal is in the
another one of the two phases,

wherein the first switching circuit measures electric potential of the second terminal with respect to the fourth terminal
of the one Hall element and the second switching circuit measures electric potential of the first terminal with respect to
the third terminal of the another Hall element in the one of the two phases, and

wherein the first switching circuit measures electric potential of the first terminal with respect to the third terminal of
the one Hall element and the second switching circuit measures electric potential of the second terminal with respect to the
fourth terminal of the another Hall element in the another one of the two phases.

US Pat. No. 10,312,906

SWITCH APPARATUS

Asahi Kasei Microdevices ...

1. A switch apparatus comprising:a main switch that is connected between a first terminal and a second terminal and electrically connects or disconnects the first terminal and the second terminal according to gate voltage applied to a gate terminal;
a voltage output unit that has a voltage divider including a first voltage-division resistance on the first terminal side and a second voltage-division resistance whose one end is connected to the second terminal side, and outputs voltage corresponding to voltage of the first terminal and voltage of the second terminal in response to the main switch entering a connected state;
a buffer that outputs voltage following output voltage of the voltage output unit in a connected state of the main switch; and
a switch control circuit that supplies first voltage corresponding to output voltage of the buffer to the gate terminal of the main switch, and supplies a second voltage corresponding to output voltage of the buffer to a bulk terminal of the main switch;
wherein the voltage output unit:
outputs an average voltage of voltage of the first terminal and voltage of the second terminal in response to the main switch entering a connected state, and
outputs voltage corresponding to either the voltage of the first terminal or the voltage of the second terminal and to first reference potential in response to the main switch entering a disconnected state;
wherein the voltage output unit has:
a first output resistance having one end that is connected between the first voltage-division resistance and the second voltage-division resistance and another end that outputs output voltage of the voltage output unit,
a second output resistance having one end that is connected to the other end of the first output resistance and another end to which the first reference potential is supplied, and
a third sub-switch that is provided between the second output resistance and the first reference potential, and enters a disconnected state in response to the main switch entering a connected state, and enters a connected state in response to the main switch entering a disconnected state.

US Pat. No. 9,853,540

POWER SUPPLY CIRCUIT

Asahi Kasei Microdevices ...

1. A power supply circuit comprising:
a transistor configured to turn on and off a voltage supplied to a load;
a booster circuit configured to boost a voltage of input power and supplies the power of which the voltage is boosted as power
for driving the transistor; and

a power supply capability switching circuit configured to switch power supply capability of the booster circuit depending
on the number of pulses per unit time of a load control signal that controls on and off of the transistor,

wherein the power supply capability switching circuit includes a drive pattern decoder that determines a drive pattern for
the load control signal, and the booster circuit is controlled based on the drive pattern without directly specifying an operation
mode of the boost circuit.

US Pat. No. 9,755,588

SIGNAL OUTPUT CIRCUIT

Asahi Kasei Microdevices ...

1. A signal output circuit, including an operational amplifier including an amplification stage configured to amplify differential
input voltage and an output stage configured to amplify an input signal outputted from the amplification stage and output
the amplified input signal as an output signal,
wherein the output stage is a switched capacitor circuit comprising:
switches; and
a capacitor configured to sample differential voltage between input voltage outputted from the amplification stage and a given
voltage other than the input voltage, and

wherein the switched capacitor circuit transfers the differential voltage sampled by the capacitor by switching of the switches
based on the input voltage, and

wherein the operational amplifier further includes at least one resistor connected between an input terminal and an output
terminal of the operational amplifier, the output stage outputs a signal having a larger amplitude than a potential difference
between a power supply voltage and a ground voltage, and the input voltage outputted from the amplification stage ranges between
the power supply voltage and the ground voltage.

US Pat. No. 9,523,589

ROTATION ANGLE MEASUREMENT APPARATUS

Asahi Kasei Microdevices ...

1. A rotation angle measurement apparatus comprising:
a plurality of Hall element pairs;
a magnetic flux concentrator provided on magnetosensitive planes of the plurality of Hall element pairs;
a rotating magnet arranged in proximity to the magnetic flux concentrator to cover the magnetic flux concentrator in a planer
view;

an angle calculation unit configured to calculate a plurality of pieces of rotation angle information of the rotating magnet
based upon output signals from a plurality of sets of the plurality of Hall element pairs, and

a rotation angle information correction unit configured to correct the rotation angle information in consideration of the
plurality of pieces of rotation angle information.

US Pat. No. 9,998,610

CONTROL APPARATUS, CONTROL METHOD, AND COMPUTER-READABLE MEDIUM

Asahi Kasei Microdevices ...

1. A control apparatus for an electronic apparatus comprising:a processor configured to
receive a reception signal providing notification of reception,
output a sound output signal causing a sound output section to generate a sound of the notification of reception,
acquire a sound input signal generated from external sound that includes at least the sound output from the sound output section,
generate an echo tap coefficient corresponding to an echo of the at least sound output from the sound output section, based on the sound output signal and the sound input signal,
determine a correlation between the echo tap coefficient and a corresponding one of a plurality of stored reference echo tap coefficients, wherein the plurality of reference echo tap coefficients correspond to a plurality of states representing surrounding environments where the electronic apparatus is placed,
select a corresponding one of the plurality of states based on the correlation, and
adjust the sound output signal according to the corresponding one of the states.

US Pat. No. 9,980,336

LIGHT RECEIVING DEVICE, LIGHT EMITTING DEVICE AND LIGHT RECEIVING/EMITTING DEVICE

Asahi Kasei Microdevices ...

1. A light receiving device comprising:a first light receiving element configured to output a first output signal corresponding to an amount of received light;
a temperature information acquisition unit configured to acquire temperature information of the first light receiving element;
a storage unit configured to store compensation information used for compensation of the first output signal;
a control unit configured to supply power to the first light receiving element to change the first light receiving element to a plurality of temperature states;
a generation unit configured to generate the compensation information, based on a plurality of the first output signals and the temperature information in the plurality of temperature states; and
a compensation unit configured to compensate the first output signal, based on the temperature information and the compensation information.

US Pat. No. 9,863,808

OUTPUT-CURRENT DETECTION CHIP FOR DIODE SENSORS, AND DIODE SENSOR DEVICE

Asahi Kasei Microdevices ...

1. An output-current detection IC chip for diode sensors, comprising:
a common terminal connected to one ends of N diode sensors, wherein N is an integer of 2 or more;
N input terminals connected to the other ends of the respective diode sensors;
N+1 protection circuits connected to the N input terminals and the common terminal;
a chopper circuit which switches the polarity of an output current of each diode sensor;
an I-V conversion circuit which converts the output current from the chopper circuit into a voltage; and
a current supplying unit which supplies a compensation current to an input of the I-V conversion circuit.

US Pat. No. 9,612,600

CONTROLLER OF LINEAR MOTION DEVICE AND CONTROL METHOD OF THE SAME

Asahi Kasei Microdevices ...

1. A controller of a linear motion device including a magnet attached to a moving body and disposed adjacent to a driving
coil, the controller comprising:
a magnetic field sensor configured to detect a magnetic field generated by the magnet and output a detection position signal
value corresponding to a value of the magnetic field;

a calibration operation circuit configured to obtain the detection position signal value and generate a detection position
operation signal value;

a device position instruction signal generation circuit configured to output a target position signal value for instructing
a target position to which the linear motion device is to move;

a leak magnetic field correction circuit configured to correct the target position signal value and output a target correction
position signal value;

a PID control circuit configured to output a control signal based on the detection position operation signal value and the
target correction position signal value; and

an output driver configured to supply a driving current to the driving coil to move the moving body to the target position
based on the control signal,

wherein the leak magnetic field correction circuit is configured to correct the target position signal value based on the
control signal and a value of a leak magnetic field caused by the driving coil, and the value of the leak magnetic is calculated
based on a difference between the detection position signal value when an electric power is not supplied to the driving coil
and the detection position signal value when the electric power is supplied to the driving coil.

US Pat. No. 9,740,661

PHYSICAL QUANTITY MEASURING APPARATUS AND PHYSICAL QUANTITY MEASURING METHOD

Asahi Kasei Microdevices ...

1. A geomagnetic sensor comprising:
a detecting unit that detects a magnetism and outputs a geomagnetic sensor signal, on which noises are superimposed; and
a computing apparatus that computes the magnetism from the geomagnetic sensor signal,
wherein the computing apparatus comprises:
a memory unit that stores the geomagnetic sensor signal detected by the detecting unit;
a fluctuation estimating unit that estimates a fluctuation in the geomagnetic sensor signal detected by the detecting unit;
and

a filter coefficient output unit which sets a filter coefficient based on the fluctuation estimated by the fluctuation estimating
unit, and which outputs the filter coefficient,

wherein the fluctuation estimating unit comprises:
a first fluctuation estimating unit that estimates a first fluctuation in the geomagnetic sensor signal based on a distribution
of geomagnetic sensor signals obtained at multiple measurements at different timings by the detecting unit; and

a second fluctuation estimating unit that estimates a second fluctuation in the geomagnetic sensor signal based on relation
between the geomagnetic sensor signal obtained at a given measurement time by the detecting unit and a first corrected geomagnetic
sensor signal obtained at a measurement time close to the given measurement time, both of the geomagnetic sensor signal and
the first corrected geomagnetic sensor signal being stored in the memory unit,

wherein the filter coefficient output unit comprises:
a first filter coefficient output unit that outputs a first filter coefficient based on the first fluctuation;
a second filter coefficient output unit that outputs a second filter coefficient based on the second fluctuation; and
a filter coefficient selecting unit that selects either one of the first and second filter coefficients as the filter coefficient,
wherein the computing apparatus further comprises a correction signal output unit that outputs a second corrected geomagnetic
sensor signal, in which the noises and delay to the geomagnetic sensor signal have been reduced, based on the filter coefficient,
the geomagnetic sensor signal, and the first corrected geomagnetic sensor signal.

US Pat. No. 10,141,962

DEMODULATOR

Asahi Kasei Microdevices ...

1. A demodulator comprising:a filter configured to reduce a high frequency component of a downconverted signal downconverted from a modulated signal;
a demodulation section configured to output a demodulated signal demodulated from the downconverted signal, in which the high frequency component is reduced; and
a noise remover configured to reduce a noise in the demodulated signal demodulated from the downconverted signal by using:
an integration section configured to integrate the demodulated signal;
a zone detection section configured to detect a replacement target zone in the demodulated signal based on an integrated signal output by the integration section; and
a replacement section configured to replace a signal of the replacement target zone in the demodulated signal with a replacement target signal.

US Pat. No. 9,964,601

MAGNETIC SENSOR

Asahi Kasei Microdevices ...

1. A magnetic sensor comprising:a magnetic flux concentrator unit including one or more magnetic flux concentrator members provided on or in a substrate;
a first magnetic detector, a second magnetic detector, and a third magnetic detector, each of which is arranged adjacent to the one or more magnetic flux concentrator members and has a sensitivity axis in a direction of a common first axis parallel to a plane of the substrate; and
a calculator configured to calculate a magnetic field in a direction of a second axis parallel to the plane of the substrate and perpendicular to the first axis and a magnetic field in a direction of a third axis perpendicular to the plane of the substrate based on an output of the first magnetic detector, an output of the second magnetic detector, and an output of the third magnetic detector, the second axis and the third axis being common to the first, second, and third magnetic detectors,
wherein, a shape of each of the one or more magnetic flux concentrator members has a width in the direction of the first axis and a length in the direction of the second axis in plan view,
one of directions along the first axis is a positive direction of the first axis and the other direction is a negative direction of the first axis, and one of directions along the second axis is a positive direction of the second axis and the other direction is a negative direction of the second axis,
the first magnetic detector is arranged on a negative side of the first axis with respect to a closest magnetic flux concentrator member to the first magnetic detector out of the one or more magnetic flux concentrator members and on a positive side of the second axis with respect to a midpoint of the closest magnetic flux concentrator member to the first magnetic detector in a length direction, in plan view,
the second magnetic detector is arranged on a positive side of the first axis with respect to a closest magnetic flux concentrator member to the second magnetic detector out of the one or more magnetic flux concentrator members and on the positive side of the second axis with respect to a midpoint of the closest magnetic flux concentrator member to the second magnetic detector in the length direction, in plan view,
the third magnetic detector is arranged on the negative side of the first axis with respect to a closest magnetic flux concentrator member to the third magnetic detector out of the one or more magnetic flux concentrator members and on a negative side of the second axis with respect to a midpoint of the closest magnetic flux concentrator member to the third magnetic detector in the length direction, in plan view, and
the calculator is configured to calculate the magnetic field in the direction of the second axis based on the output of the first magnetic detector and the output of the third magnetic detector, and to calculate the magnetic field in the direction of the third axis based on the output of the second magnetic detector and the output of the third magnetic detector.

US Pat. No. 9,921,273

HALL ELECTROMOTIVE FORCE SIGNAL DETECTION CIRCUIT, CURRENT SENSOR THEREOF, AND HALL ELEMENT DRIVING METHOD

Asahi Kasei Microdevices ...

1. A Hall electromotive force signal detection circuit comprising:
a first Hall element including a first to a fourth terminals and configured to generate a first Hall electromotive force signal
voltage, the first terminal and the third terminal facing each other, the second terminal and the fourth terminal facing each
other, the first terminal, the second terminal, the third terminal, and the fourth terminal being arranged in this order in
the counterclockwise direction;

a second Hall element including a first to a fourth terminals and configured to generate a second Hall electromotive force
signal voltage, the first terminal and the third terminal facing each other, the second terminal and the fourth terminal facing
each other, the first terminal, the second terminal, the third terminal, and the fourth terminal being arranged in this order
in the counterclockwise direction;

a first switching circuit configured to select a terminal position for injecting a driving current and terminal positions
for outputting the first Hall electromotive force signal voltage, out of the plurality of terminals of the first Hall elements;

a second switching circuit configured to select a terminal position for injecting a driving current and terminal positions
for outputting the second Hall electromotive force signal voltage, out of the plurality of terminals of the second Hall elements;
and

a Hall electromotive force signal processing circuit configured to simultaneously process the first Hall electromotive force
signal voltage and the second Hall electromotive force signal voltage, wherein

the first Hall electromotive force signal voltage output from the first switching circuit and the second Hall electromotive
force signal voltage output from the second switching circuit are shorted,

the first switching circuit is configured to perform switching to shift the terminal position for injecting the driving current,
at least:

(1) from any terminal position to a terminal located in a counterclockwise direction; or
(2) from any terminal position to a terminal located in a clockwise direction, and
the second switching circuit is configured to perform switching to shift the terminal position for injecting the driving current:
(1) from any terminal position to a terminal located in the clockwise direction, when switching to shift the terminal position
for injecting the driving current in the first Hall element to the terminal located in the counterclockwise direction; or

(2) from any terminal position to a terminal located in the counterclockwise direction, when switching to shift the terminal
position for injecting the driving current in the first Hall element to the terminal located in the clockwise direction, and

wherein
the first switching circuit is configured to perform switching to shift the terminal position for injecting the driving current,
at least:

(1) from any terminal position to a terminal located in a direction rotating by +90 degrees and in the counterclockwise direction;
(2) from any terminal position to a terminal located in a direction rotating by ?90 degrees and in the clockwise direction;
or

(3) from any terminal position to a terminal located in a direction reversed by ±180 degrees, and
the second switching circuit is configured to perform switching to shift the terminal position for injecting the driving current:
(1) from any terminal position to a terminal located in a direction rotating by ?90 degrees and in the clockwise direction,
when switching to shift the terminal position for injecting the driving current in the first Hall element by +90 degrees and
in the counterclockwise direction;

(2) from any terminal position to a terminal located in a direction rotating by +90 degrees and in the counterclockwise direction,
when switching to shift the terminal position for injecting the driving current in the first Hall element to shift by ?90
degrees and in the clockwise direction; or

(3) from any terminal position to a terminal located in a direction reversed by ±180 degrees, when switching to shift the
terminal position for injecting the driving current in the first Hall element by ±180 degrees.

US Pat. No. 9,897,446

PHYSICAL QUANTITY DATA CORRECTING DEVICE AND PHYSICAL QUANTITY DATA CORRECTING METHOD

Asahi Kasei Microdevices ...

1. A physical quantity data correcting device comprising:
a physical quantity data acquiring unit that acquires physical quantity data output from an n-axis (where n is an integer
of two or greater) physical quantity detecting unit;

an approximate ellipsoid computing unit that computes an approximate expression of an n-dimensional ellipsoid approximating
a distribution shape obtained by distributing the physical quantity data in an n-axis coordinate space;

a correction coefficient computing unit that computes a correction coefficient for correcting the n-dimensional ellipsoid
to an n-dimensional sphere;

a computation control unit that has a control parameter group, and controls at least one of the approximate ellipsoid computing
unit and the correction coefficient computing unit on the basis of the control parameter group; and

a correction data output unit that corrects the physical quantity data on the basis of the correction coefficient and that
outputs corrected physical quantity data,

wherein the computation control unit sets accuracy of the corrected physical quantity data, and the control parameter group
varies depending on the accuracy of the corrected physical quantity data; and

wherein the control parameter group includes a parameter for evaluating validity of the computation of the approximate ellipsoid
computing unit or validity of the computation of the correction coefficient computing unit.

US Pat. No. 10,082,464

GAS SENSOR

Asahi Kasei Microdevices ...

1. A gas sensor comprising:a first light source;
a first sensor unit and a second sensor unit disposed to receive light output from the first light source;
a first substrate having a first principal surface and a second principal surface opposite to the first principal surface, the first light source and the first sensor unit being provided on the first principal surface of the first substrate; and
a second substrate having a first principal surface and a second principal surface opposite to the first principal surface, the second sensor unit being provided on the first principal surface of the second substrate, wherein
the first sensor unit is disposed at a location where a first portion of light output from the first light source passes through the first substrate, is reflected off the second principal surface of the first substrate, and is returned through the first substrate to directly strike the first sensor unit,
the second sensor unit is disposed at a location where a second portion of light output from the first light source radiates from the second principal surface of the first substrate, passes through the inside of the second substrate, and strikes the second sensor unit, and
the first substrate and the second substrate are two individual parts and physically separate from each other.

US Pat. No. 10,212,776

LIGHT RECEIVING DEVICE AND LIGHT EMITTING AND RECEIVING DEVICE

Asahi Kasei Microdevices ...

1. A light receiving device comprising:a light receiving element configured to receive at least a portion of light incident from an outside and output an output signal corresponding to amount of received light;
a molded resin portion configured to seal at least a portion of the light receiving element;
a temperature information acquiring unit configured to acquire temperature information relating to temperature of the light receiving element or temperature of the molded resin portion;
a measuring unit configured to measure information relating to at least one of electrical characteristics or optical characteristics of the light receiving element;
a humidity information calculating unit configured to calculate humidity information including information of the humidity of the molded resin portion, based on the information relating to the at least one of the electrical characteristics or the optical characteristics and the temperature information; and
a compensating unit configured to compensate the output signal, based on the temperature information and the humidity information.

US Pat. No. 10,126,463

LIVING BODY DETECTOR AND POWER-SAVING MODE SETTING METHOD

Asahi Kasei Microdevices ...

1. A living body detector, comprising:a temperature signal acquisition unit configured to acquire a temperature signal output from a temperature sensor detecting a temperature in a visual field; and
a living body use signal output unit configured to output a signal representing that a living body in the visual field is in a state where the living body can use a device, when a temperature represented by the temperature signal has a peak lower than a direct current component of the temperature signal, after the temperature represented by the temperature signal is lower than a temperature threshold, the direct current component being acquired by performing a low-pass filter process on the temperature signal.

US Pat. No. 10,063,195

AMPLIFIER CIRCUIT AND AMPLIFIER CIRCUIT IC CHIP

Asahi Kasei Microdevices ...

1. An amplifier circuit, comprising:a first bias unit connected to a first end of a first variable resistance sensor;
a second bias unit connected to a first end of a second variable resistance sensor, a second end of the first variable resistance sensor and a second end of the second variable resistance sensor being connected; and
an I-V converter circuit configured to convert currents output from the first end of the first variable resistance sensor and the first end of the second variable resistance sensor into voltages and output the voltages, respectively,
wherein the I-V converter circuit comprises:
a full differential operational amplifier having an inverting input terminal, a non-inverting input terminal, a non-inverting output terminal, and an inverting output terminal;
a first feedback resistance connected between the inverting input terminal and the non-inverting output terminal; and
a second feedback resistance connected between the non-inverting input terminal and the inverting output terminal, and
where the first end of the first variable resistance sensor is connected to the inverting input terminal, and
the first end of the second variable resistance sensor is connected to the non-inverting input terminal.

US Pat. No. 10,193,557

OSCILLATION CONTROL APPARATUS AND OSCILLATION APPARATUS

Asahi Kasei Microdevices ...

1. An oscillation control apparatus comprising:a first control section that generates a first control signal that controls an oscillation frequency of an oscillator, based on a temperature detection result of a temperature detecting section;
an encoder that generates a feedback signal;
a second control section that generates a second control signal that controls the oscillation frequency of the oscillator, based on the temperature detection result of the temperature detecting section, an external input signal input from outside, and the feedback signal;
an oscillation circuit that sets the oscillation frequency of the oscillator, based on the first control signal and the second control signal; and
a reference voltage generating section that generates a reference voltage, wherein
the encoder generates the feedback signal by comparing the second control signal and the reference voltage.

US Pat. No. 10,330,775

TRANSMITTER, TRANSMISSION METHOD, PHASE ADJUSTMENT DEVICE, AND PHASE ADJUSTMENT METHOD

Asahi Kasei Microdevices ...

1. A transmitter comprising:a phase shifter configured to shift a phase of an input signal and to output a shifted signal the phase of which is shifted;
a first control circuit configured to change, within a predetermined range, a phase shift amount by which the phase shifter shifts the phase of the input signal;
a phase difference signal output circuit configured to receive the shifted signal output by the phase shifter and a reference signal and to output a phase difference signal based on a phase difference between the shifted signal and the reference signal;
an extreme value output circuit configured to, when the phase difference signal takes an extreme value while the first control circuit is changing the phase shift amount, output a value of the phase difference signal at the phase shift amount at which the phase difference signal becomes the extreme value;
a target value output circuit configured to, based on an output from the extreme value output circuit, output a target value; and
a second control circuit configured to control the phase shift amount of the phase shifter in such a way that a value of the phase difference signal output by the phase difference signal output circuit coincides with the target value output from the target value output circuit,
wherein the phase shifter shifts the phase of the input signal in accordance with the phase shift amount controlled by the second control circuit and outputs the input signal the phase of which is shifted as a transmission wave.

US Pat. No. 10,215,781

CURRENT SENSOR

Asahi Kasei Microdevices ...

1. A current sensor comprising:a conductor having a gap;
a support part for supporting a signal processing IC, the support part having a space for electrically insulating the support part from the conductor in plan view;
a magnetoelectric conversion element configured to be electrically coupled to the signal processing IC, and disposed in the gap of the conductor so as to detect a magnetic field generated by a current flowing through the conductor; and
an insulation member supporting the magnetoelectric conversion element,
wherein the conductor, the support part, the magnetoelectric conversion element, and the insulation member are sealed with resin and accommodated inside a house formed by the resin.

US Pat. No. 10,154,189

ADJUSTING METHOD OF CAMERA MODULE, LENS POSITION CONTROL DEVICE, CONTROL DEVICE OF LINEAR MOVEMENT DEVICE, AND CONTROLLING METHOD OF THE SAME

Asahi Kasei Microdevices ...

8. A calibrating method of a camera module, the camera module comprising:a lens;
an imaging element outputting an image signal of an object;
a storage unit storing a conversion factor that can be rewritten;
a conversion unit converting the image signal with the conversion factor into a target position signal that moves the lens to a target position;
a position sensor detecting a position of the lens and outputting a detection position signal;
a control unit generating a control signal based on the target position signal and the detection position signal; and
a drive unit moving the lens based on the control signal,
the method comprising:
a first step of moving the lens to a first lens position to focus on the object located at a first position for a first focus distance;
a second step of moving the lens to a second lens position to focus on the object located at a second position for a second focus distance; and
rewriting the conversion factor stored in the storage unit to limit a moving range of the lens based on the first focus distance and the second focus distance,
wherein an adjustment signal stored in the storage unit beforehand adjusts the conversion factor such that the lens moves from one end of a movable range of the lens to another end in the camera module.

US Pat. No. 10,433,387

LIGHT EMITTING DEVICE AND LIGHT EMITTING AND RECEIVING DEVICE

Asahi Kasei Microdevices ...

1. A light emitting device comprising:a light emitting element;
a molded resin portion configured to seal at least a portion of the light emitting element;
a temperature information acquiring unit configured to acquire temperature information;
a humidity information calculating unit configured to calculate humidity information, based on information relating to at least either electrical characteristics or optical characteristics of the light emitting element and the temperature information;
a controlling unit configured to control the light emitting element, based on the temperature information and the humidity information; and
an auxiliary element at least a portion of which is sealed by the molded resin portion, wherein
the light emitting element is disposed to be influenced by a stress of the molded resin portion,
the temperature information includes information relating to temperature of the light emitting element or temperature of the molded resin portion, and the humidity information includes information relating to humidity of the molded resin portion based on change in swelling stress, and
at least either the temperature information or the humidity information includes information relating to at least either electrical characteristics or optical characteristics of the auxiliary element.

US Pat. No. 10,333,057

HALL ELEMENT

Asahi Kasei Microdevices ...

1. A hall element comprising:a substrate;
a magnetosensitive portion formed on the substrate;
an insulating film formed on the magnetosensitive portion;
four conductive portions configured formed on the insulating film and electrically connected to the magnetosensitive portion through the insulating film; and
ball portions connected to the conductive portions,
wherein at least one of the ball portions is disposed on a diagonal line of a quadrangle formed by a region surrounded by the four conductive portions and is disposed above a region covering a portion where the magnetosensitive portion, the conductive portions and the insulating film are in contact with each other in view of a cross section.

US Pat. No. 10,247,759

CURRENT SENSOR

Asahi Kasei Microdevices ...

1. A current sensor comprising:a first current pathway through which a first measured current flows;
a first magnetic sensor arranged near the first current pathway;
a second magnetic sensor arranged opposite the first magnetic sensor with the first current pathway in between;
a second current pathway through which a second measured current flows;
a third magnetic sensor arranged near the second current pathway;
a fourth magnetic sensor arranged opposite the third magnetic sensor with the second current pathway in between; and
a signal processor configured to generate a signal based on a quantity of the first measured current from output of the first magnetic sensor and output of the second magnetic sensor, and generate a signal based on a quantity of the second measured current from output of the third magnetic sensor and output of the fourth magnetic sensor, and
wherein the first magnetic sensor and the second magnetic sensor are arranged at an equal distance from the second current pathway, and the third magnetic sensor and the fourth magnetic sensor are arranged at an equal distance from the first current pathway;
the first current pathway includes a first pathway, a second pathway curving from the first pathway, and a third pathway additionally curving from the second pathway;
the second current pathway includes a fourth pathway, a fifth pathway curving from the fourth pathway, and a sixth pathway additionally curving from the fifth pathway; and
the second pathway is a pathway parallel to a line segment joining the third magnetic sensor and the fourth magnetic sensor, and the fifth pathway is a pathway parallel to a line segment joining the first magnetic sensor and the second magnetic sensor.

US Pat. No. 10,337,887

MAGNETIC SENSOR INHIBITING INFLUENCE OF INDUCED ELECTROMOTIVE FORCE

Asahi Kasei Microdevices ...

1. A magnetic sensor comprising:a magnetic converging plate;
an electromagnetic converting element disposed on one surface side of the magnetic converging plate;
at least two wires that connect to the electromagnetic converting element; and
a circuit that connects to the at least two wires and receives a signal from the electromagnetic converting element, wherein
between the electromagnetic converting element and the circuit, the at least two wires cross while being spaced apart from each other in a direction perpendicular to the one surface of the magnetic converging plate to form a compensation loop between a cross of the at least two wires and the circuit, and
in a planar view as seen in a direction perpendicular to the one surface of the magnetic converging plate, at least part of a region occupied by the compensation loop is covered by the magnetic converging plate.

US Pat. No. 10,388,299

HOWLING SUPPRESSION DEVICE

Asahi Kasei Microdevices ...

1. A howling suppression device comprising:a plurality of filters in which a passband and a stopband are arranged alternately on a frequency axis, including a first comb filter in which a passband and a stopband are arranged alternately on a frequency axis and a second comb filter in which a passband is arranged in a frequency band that is different from that of the passband of the first comb filter;
a gain control unit which temporally varies an output gain of each of the plurality of filters and sums signals thus varied to output; and
a sound detector which detects a sound signal in each of at least one detection band, each detection band being a divided predetermined frequency band in which sound is detected, wherein
each of the plurality of filters has a passband in at least part of a stopband of another filter,
the gain control unit temporally varies a first output gain of the first comb filter and a second output gain of the second comb filter, and
the sound detector pairs each detection band with an adjustment band in one-to-one correspondence among the divided predetermined frequency bands and adjusts attenuation amounts of the first comb filter and the second comb filter in an adjustment band that corresponds to the paired detection band, based on the sound signal detected in the paired detection band.

US Pat. No. 10,429,455

HALL ELEMENT AND METHOD OF MANUFACTURING HALL ELEMENT

Asahi Kasei Microdevices ...

1. A hall element comprising:a substrate;
a magnetosensitive portion formed on the substrate;
an insulating film configured formed on the magnetosensitive portion; and
four conductive portions,
wherein each of the conductive portions includes an electrode portion formed on the insulating film to extend in a direction in which the conductive portions are close to each other, and a contact portion that electrically connects the electrode portion and the magnetosensitive portion to each other through the insulating film,
wherein an entire region surrounded by the four contact portions is included in the magnetosensitive portion, and
wherein ratios r1 and r2 defined by the following expressions are both equal to or less than 75% in each of a pair of the conductive portions positioned on a diagonal line of a quadrangle formed by the four contact portions and a pair of adjacent the conductive portions on a side of the quadrangle,
r1=(a1?b1)/a1
r2=(a2?b2)/a2
a1: a distance between the contact portions positioned on the diagonal line of the quadrangle
b1: a distance between the electrode portions positioned on the diagonal line of the quadrangle
a2: a distance between the adjacent contact portions on the side of the quadrangle
b2: a distance between the adjacent electrode portions positioned on the side of the quadrangle.